WO2024055570A1 - 光模块 - Google Patents

光模块 Download PDF

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Publication number
WO2024055570A1
WO2024055570A1 PCT/CN2023/085202 CN2023085202W WO2024055570A1 WO 2024055570 A1 WO2024055570 A1 WO 2024055570A1 CN 2023085202 W CN2023085202 W CN 2023085202W WO 2024055570 A1 WO2024055570 A1 WO 2024055570A1
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WO
WIPO (PCT)
Prior art keywords
optical
chip
shaped groove
carrier
optical fiber
Prior art date
Application number
PCT/CN2023/085202
Other languages
English (en)
French (fr)
Inventor
吴涛
慕建伟
Original Assignee
青岛海信宽带多媒体技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from CN202211114847.3A external-priority patent/CN117741876A/zh
Priority claimed from CN202211114726.9A external-priority patent/CN117741875A/zh
Priority claimed from CN202222442112.5U external-priority patent/CN218037458U/zh
Priority claimed from CN202222442111.0U external-priority patent/CN217879744U/zh
Priority claimed from CN202211114725.4A external-priority patent/CN117741874A/zh
Application filed by 青岛海信宽带多媒体技术有限公司 filed Critical 青岛海信宽带多媒体技术有限公司
Publication of WO2024055570A1 publication Critical patent/WO2024055570A1/zh

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Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements

Definitions

  • the present disclosure relates to the field of communication technology, and in particular, to an optical module.
  • optical communication technology As one of the key components in optical communication equipment, can realize photoelectric signal conversion. With the development of optical communication technology, the data transmission rate of optical modules is required to continue to increase.
  • An optical module provided according to some embodiments of the present disclosure includes: a circuit board and at least one carrier coherent component; wherein the carrier coherent component includes a U-shaped groove cover, a U-shaped groove substrate and a carrier component; the side of the U-shaped groove cover A limiting protrusion is formed, and a first U-shaped groove is formed on the surface.
  • the first U-shaped groove is configured to avoid the connecting plate and expose the silicon photonic chip optical waveguide; a limiting groove is formed on the side of the U-shaped groove substrate to limit the position.
  • the groove is connected to the limiting protrusion; a second U-shaped groove is formed on the surface of the U-shaped groove substrate, and the U-shaped groove substrate is configured to raise the height of the silicon photonic chip and transfer electrical signals;
  • the carrier component includes a laser box, a silicon Optical chip, optical fiber connector, connecting board, first electrical chip and second electrical chip;
  • the laser box is connected to the silicon optical chip, and the laser box is configured to input light without signals into the silicon optical chip;
  • the silicon optical chip is arranged on the first On the surface of the second U-shaped groove, the edge of the silicon photonic chip is not aligned with the edge of the second U-shaped groove.
  • An optical port is provided on the side of the silicon photonic chip.
  • the silicon photonic chip is configured to modulate or IOU the optical signal;
  • the optical fiber connector is provided on the surface of the circuit board. , one end of which extends into the second U-shaped groove, an optical fiber is provided inside the optical fiber connector, and the optical fiber end face and the optical port end face are coupled and connected;
  • the connecting plate is connected between the silicon optical chip and the optical fiber connector;
  • at least one carrier coherent component includes a dual carrier coherent component, and in the dual carrier coherent component, the U-shaped groove cover shell includes a double U-shaped groove cover shell, and the double U-shaped slot Two first U-shaped grooves are formed on the surface of the cover shell, and limited protrusions are formed on the side of the double U-shaped groove cover shell;
  • the U-shaped groove base plate includes a double U-shaped groove base plate, and two second U-shaped grooves are formed on the surface of the double U-shaped groove base plate.
  • Figure 1 is a partial architecture diagram of an optical communication system provided according to some embodiments of the present disclosure
  • Figure 2 is a partial structural diagram of a host computer provided according to some embodiments of the present disclosure.
  • Figure 3 is a structural diagram of an optical module provided according to some embodiments of the present disclosure.
  • Figure 4 is an exploded view of an optical module provided according to some embodiments of the present disclosure.
  • Figure 5 is a schematic diagram of the coherence principle of an optical module provided according to some embodiments of the present disclosure.
  • Figure 6 is a structural diagram of a dual-carrier coherent component provided according to some embodiments of the present disclosure.
  • Figure 7 is an exploded view of a dual-carrier coherent component provided according to some embodiments of the present disclosure.
  • Figure 8 is a structural diagram of a carrier component provided according to some embodiments of the present disclosure.
  • Figure 9 is a cross-sectional view of a dual-carrier coherent component provided according to some embodiments of the present disclosure.
  • Figure 10 is a cross-sectional view 2 of a dual-carrier coherent component provided according to some embodiments of the present disclosure
  • Figure 11 is a cross-sectional view three of a dual-carrier coherent component provided according to some embodiments of the present disclosure.
  • Figure 12 is a cross-sectional view of the assembly relationship between a double U-shaped groove cover shell and a double U-shaped groove base plate according to some embodiments of the present disclosure
  • Figure 13 is a structural diagram of a double U-shaped groove cover shell provided according to some embodiments of the present disclosure.
  • Figure 14 is a structural diagram of the first laser box provided according to some embodiments of the present disclosure.
  • Figure 15 is a second structural diagram of a first laser box provided according to some embodiments of the present disclosure.
  • Figure 16 is a structural diagram of a second laser box provided according to some embodiments of the present disclosure.
  • Figure 17 is a schematic diagram of a first dual-carrier coherent component and a second dual-carrier coherent component provided according to some embodiments of the present disclosure
  • Figure 18 is an internal diagram of the first dual-carrier coherent component and the second dual-carrier coherent component provided according to some embodiments of the present disclosure
  • Figure 19 is a cross-sectional view of the first dual-carrier coherent component and the second dual-carrier coherent component provided according to some embodiments of the present disclosure
  • Figure 20 is a side view of the first dual-carrier coherent component and the second dual-carrier coherent component provided according to some embodiments of the present disclosure
  • Figure 21 is a second cross-sectional view of the first dual-carrier coherent component and the second dual-carrier coherent component provided according to some embodiments of the present disclosure
  • Figure 22 is a schematic diagram of a first single-carrier coherent component and a second single-carrier coherent component provided according to some embodiments of the present disclosure
  • Figure 23 is an internal diagram of the first single carrier coherent component and the second single carrier coherent component provided according to some embodiments of the present disclosure.
  • Figure 24 is a schematic diagram of the partial structure of a first single-carrier coherent component provided according to some embodiments of the present disclosure.
  • Figure 25 is a schematic diagram of the partial internal structure of the first single-carrier coherent component provided according to some embodiments of the present disclosure.
  • Figure 26 is a cross-sectional view of the first single-carrier coherent component and the second single-carrier coherent component provided according to some embodiments of the present disclosure
  • Figure 27 is an exploded view of another optical module structure provided according to some embodiments of the present disclosure.
  • Figure 28 is a schematic structural diagram of the lower surface of a circuit board according to some embodiments of the present disclosure.
  • Figure 29 is a schematic diagram of separation of a circuit board and a carrier coherent component according to some embodiments of the present disclosure
  • Figure 30 is a structural diagram of another first single-carrier coherent component and a second single-carrier coherent component provided according to some embodiments of the present disclosure
  • Figure 31 is a cross-sectional view of another first single-carrier coherent component and a second single-carrier coherent component provided according to some embodiments of the present disclosure
  • Figure 32 is a schematic cross-sectional view of a circuit board separated from a first single-carrier coherent component and a second single-carrier coherent component according to some embodiments of the present disclosure
  • Figure 33 is a schematic structural diagram of a base provided according to some embodiments of the present disclosure.
  • Figure 34 is a structural diagram of a third laser box provided according to some embodiments of the present disclosure.
  • Optical communication technology establishes information transmission between information processing devices.
  • Optical communication technology loads information onto light and uses the propagation of light to realize the transmission of information.
  • Light loaded with information is an optical signal.
  • the propagation of optical signals in information transmission equipment can reduce the loss of optical power and achieve high-speed, long-distance, and low-cost information transmission.
  • the information that information processing equipment can process exists in the form of electrical signals.
  • Optical network terminals/gateways, routers, switches, mobile phones, computers, servers, tablets, and televisions are common information processing equipment.
  • Optical fibers and optical waveguides are common information processing equipment. transmission device.
  • Information processing equipment and information transmission equipment can realize mutual conversion of optical signals and electrical signals through optical modules.
  • an optical fiber is connected to the optical signal input end and/or the optical signal output end of the optical module, and an optical network terminal is connected to the electrical signal input end and/or the electrical signal output end of the optical module.
  • the first optical signal from the optical fiber is transmitted into the optical module, the optical module converts the first optical signal into a first electrical signal, and the optical module transmits the first electrical signal into the optical network terminal.
  • the second electrical signal from the optical network terminal is transmitted into the optical module, the optical module converts the second electrical signal into a second optical signal, and the optical module transmits the second optical signal into the optical fiber.
  • information processing equipment can be connected to each other through electrical signal networks, at least one type of information processing equipment needs to be directly connected to the optical module. It is not required that all types of information processing equipment are directly connected to the optical module. The information of the optical module is directly connected. The processing equipment is called the host computer of the optical module.
  • Figure 1 is a partial architecture diagram of an optical communication system according to some embodiments of the present disclosure. As shown in Figure 1, the optical communication system is partially represented by a remote information processing device 1000, a local information processing device 2000, a host computer 100, an optical module 200, an optical fiber 101 and a network cable 103.
  • One end of the optical fiber 101 extends toward the remote information processing device 1000, and the other end is connected to the optical interface of the optical module 200.
  • the optical signal can undergo total reflection in the optical fiber 101.
  • the propagation of the optical signal in the total reflection direction can almost maintain the original optical power.
  • the optical signal undergoes total reflection multiple times in the optical fiber 101 and will come from the direction of the remote information processing device 1000.
  • the optical signal is transmitted into the optical module 200, or the light from the optical module 200 is propagated toward the remote information processing device 1000 to realize long-distance information transmission with low power loss.
  • the number of optical fibers 101 may be one or multiple (two or more); the optical fibers 101 and the optical module 200 may be pluggable or fixedly connected.
  • the host computer 100 has an optical module interface 102, and the optical module interface 102 is configured to access the optical module 200, so that the host computer 100 and the optical module 200 establish a one-way/bi-directional electrical signal connection; the host computer 100 is configured to connect to the optical module 200.
  • 200 provides data signals, or receives data signals from the optical module 200, or monitors and controls the working status of the optical module 200.
  • the host computer 100 has an external electrical interface, such as a Universal Serial Bus interface (Universal Serial Bus, USB) and a network cable interface 104.
  • the external electrical interface can be connected to an electrical signal network.
  • the network cable interface 104 is configured to connect to the network cable 103 so that the host computer 100 and the network cable 103 establish a one-way/bi-directional electrical signal connection.
  • Optical Network Unit Optical Line Terminal
  • ONT Optical Network Equipment
  • data center servers are common host computers.
  • the network cable 103 establishes an electrical signal connection between the local information processing device 2000 and the host computer 100.
  • the third electrical signal sent by the local information processing device 2000 is transmitted to the host computer 100 through the network cable 103.
  • the host computer 100 generates a second electrical signal based on the third electrical signal, and the second electrical signal from the host computer 100 is transmitted into the optical module. 200.
  • the optical module 200 converts the second electrical signal into a second optical signal.
  • the optical module 200 transmits the second optical signal into the optical fiber 101.
  • the second optical signal is transmitted to the remote information processing device 1000 in the optical fiber 101.
  • the first optical signal from the direction of the remote information processing device 1000 is propagated through the optical fiber 101.
  • the first optical signal from the optical fiber 101 is transmitted into the optical module 200.
  • the optical module 200 converts the first optical signal into a first electrical signal.
  • the optical module 200 transmits the first electrical signal to the host computer 100.
  • the host computer 100 generates a fourth electrical signal based on the first electrical signal.
  • the host computer 100 transmits the fourth electrical signal to the local information processing device 2000.
  • the optical module is a tool that realizes the mutual conversion of optical signals and electrical signals. During the above-mentioned conversion process of optical signals and electrical signals, the information does not change, and the encoding and decoding method of the information can change.
  • FIG. 2 is a partial structural diagram of a host computer provided according to some embodiments of the present disclosure.
  • the host computer 100 also includes a PCB circuit board 105 provided in the housing, a cage 106 provided on the surface of the PCB circuit board 105, a radiator 107 provided on the cage 106, and a heat sink 107 provided inside the cage 106.
  • the heat sink 107 has a protruding structure that increases the heat dissipation area, and the fin-like structure is a common protruding structure.
  • the optical module 200 is inserted into the cage 106 of the host computer 100, and the optical module 200 is fixed by the cage 106.
  • the heat generated by the optical module 200 is conducted to the cage 106, and then diffused through the heat sink 107.
  • the electrical interface of the optical module 200 is connected to the electrical connector inside the cage 106.
  • Figure 3 is a structural diagram of an optical module provided according to some embodiments of the present disclosure
  • Figure 4 is an exploded view of an optical module provided according to some embodiments of the present disclosure.
  • the optical module 200 includes a housing, a circuit board 206 disposed in the housing, and at least one carrier coherent component.
  • the housing includes an upper housing 201 and a lower housing 202.
  • the upper housing 201 is covered on the lower housing 202 to form the above-mentioned housing with two openings 204 and 205; the outer contour of the housing generally presents a square body.
  • the lower case 202 includes a bottom plate 2021 and two lower side plates 2022 located on both sides of the bottom plate 2021 and perpendicular to the bottom plate 2021; the upper case 201 includes a cover plate 2011, and the cover plate 2011 covers the lower case. on the two lower side plates 2022 of 202 to form the above-mentioned housing.
  • the lower case 202 includes a bottom plate 2021 and two lower side plates 2022 located on both sides of the bottom plate 2021 and perpendicular to the bottom plate 2021;
  • the upper case 201 includes a cover plate 2011, and two lower side plates 2022 located on both sides of the cover plate 2011.
  • the two upper side plates arranged perpendicularly to the cover plate 2011 are combined with the two lower side plates 2022 to realize that the upper housing 201 is covered on the lower housing 202 .
  • the direction of the connection between the two openings 204 and 205 may be consistent with the length direction of the optical module 200 , or may be inconsistent with the length direction of the optical module 200 .
  • the opening 204 is located at the end of the optical module 200 (the right end of FIG. 3 ), and the opening 205 is also located at the end of the optical module 200 (the left end of FIG. 3 ).
  • the opening 204 is located at an end of the optical module 200 and the opening 205 is located at a side of the optical module 200 .
  • the opening 204 is an electrical interface, and the golden finger of the circuit board 206 extends from the electrical interface and is inserted into the electrical connector of the host computer; the opening 205 is an optical port, which is configured to access the optical fiber 101 so that the optical fiber 101 is connected. Receive the light emitting device and/or the light receiving device in the light module 200 .
  • the assembly method of combining the upper housing 201 and the lower housing 202 is used to facilitate the installation of the circuit board 206, light emitting components, light receiving components, etc. into the above housing. These components can be installed by the upper housing 201 and the lower housing 202. Shape encapsulation protection. In addition, when assembling the circuit board 206, carrier coherent components and other components, it is convenient to deploy the positioning components, heat dissipation components and electromagnetic shielding components of these devices, which is conducive to automated production.
  • the upper housing 201 and the lower housing 202 are made of metal materials, which facilitates electromagnetic shielding and heat dissipation.
  • the light module 200 also includes an unlocking component 203 located outside its housing.
  • the unlocking component 203 is configured to realize a fixed connection between the optical module 200 and the host computer, or to release the fixed connection between the optical module 200 and the host computer.
  • the unlocking component 203 is located outside the two lower side plates 2022 of the lower housing 202 and includes an engaging component that matches the cage 106 of the host computer.
  • the optical module 200 is inserted into the cage 106, the optical module 200 is fixed in the cage 106 by the engaging parts of the unlocking part 203; when the unlocking part 203 is pulled, the engaging parts of the unlocking part 203 move accordingly, thereby changing the engaging parts.
  • the connection relationship with the host computer is to release the fixed connection between the optical module 200 and the host computer, so that the optical module 200 can be pulled out of the cage 106 .
  • the circuit board 206 includes circuit wiring, electronic components, chips, etc.
  • the electronic components and chips are connected together according to the circuit design through the circuit wiring to realize functions such as power supply, electrical signal transmission, and grounding.
  • Electronic components may include, for example, capacitors, resistors, transistors, and Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET).
  • the chip may include, for example, a microcontroller unit (Microcontroller Unit, MCU), a laser driver chip, a transimpedance amplifier (Transimpedance Amplifier, TIA), a limiting amplifier (Limiting Amplifier, LIA), and a clock data recovery chip (Clock and Data Recovery, CDR). , power management chip, digital signal processing (Digital Signal Processing, DSP) chip.
  • the circuit board 206 is generally a rigid circuit board. Due to its relatively hard material, the rigid circuit board can also perform a load-bearing function. For example, the rigid circuit board can smoothly carry the above-mentioned electronic components and chips; the rigid circuit board can also be easily inserted into the host computer cage. in electrical connectors.
  • the circuit board 206 also includes gold fingers formed on its end surface, and the gold fingers are composed of a plurality of independent pins.
  • the circuit board 206 is inserted into the cage 106, and the golden finger is connected to the electrical connector in the cage 106.
  • the golden fingers may be provided only on one side of the circuit board 206 (for example, the upper surface as shown in FIG. 4 ), or they may be provided on the upper and lower surfaces of the circuit board 206 to provide more pins.
  • the golden finger is configured to establish an electrical connection with the host computer to realize power supply, grounding, I2C signal transmission, data signal transmission, etc.
  • Flexible circuit boards are also used in some optical modules. Flexible circuit boards are generally used in conjunction with rigid circuit boards to supplement the rigid circuit boards.
  • the surface of the circuit board 206 is provided with at least one carrier coherent component.
  • the carrier coherent component includes a carrier component, a U-shaped groove cover and a U-shaped groove substrate.
  • the carrier component includes a silicon optical chip, a laser box, an optical fiber connector, a connecting board, a first electrical chip and a second electrical chip.
  • a first U-shaped groove is formed on the surface of the U-shaped groove cover shell, and the first U-shaped groove is configured to avoid the connecting plate and expose the optical waveguide of the silicon photonic chip.
  • a second U-shaped groove is formed on the surface of the U-shaped groove substrate.
  • the U-shaped groove substrate is electrically connected to the circuit board, and the silicon photonic chip is electrically connected to the U-shaped groove substrate. Therefore, the U-shaped groove substrate can realize the connection between the circuit board and the silicon photonic chip.
  • the transfer of electrical signals, and the U-shaped groove substrate can also raise the height of the silicon photonic chip.
  • the structural form of the carrier coherent component may be a dual-carrier coherent component or a single-carrier coherent component.
  • the dual-carrier coherent component integrates two 800G silicon optical chips.
  • the silicon optical chips can realize the modulation or demodulation of optical signals, thereby realizing the transmission or reception of optical signals.
  • the single-carrier coherent component integrates an 800G silicon photonic chip.
  • the surface of the circuit board 206 is provided with a DSP chip 2061.
  • the DSP chip 2061 converts the 16 PAM-4 electrical signals sent by the host computer into four transmitting end PAM-4 electrical signals.
  • the silicon optical chip converts the four received PAM-4 electrical signals.
  • the PAM-4 electrical signal is modulated to the transmitter light source to generate a transmit optical signal.
  • the local oscillator light at the receiving end is coherently mixed with the external optical signal. After coherent mixing, the output photocurrent increases significantly; after further amplification by the transimpedance amplifier, the four-channel PAM-4 electrical signals are transmitted to the DSP chip 2061 .
  • the structures of the U-shaped groove cover and the U-shaped groove substrate will also be different.
  • the carrier coherent component is a dual carrier coherent component
  • the U-shaped groove cover is a double U-shaped groove cover
  • the U-shaped groove substrate is a double U-shaped groove substrate
  • the carrier coherent component is a single carrier coherent component
  • the U-shaped groove cover shell is a single U-shaped groove cover shell
  • the U-shaped groove base plate is a single U-shaped groove base plate.
  • the number of dual-carrier coherent components included in the at least one carrier coherent component may be one, two, or more.
  • the structural form of the at least one carrier coherent component is a single carrier coherent component
  • the number of single carrier coherent components included in the at least one carrier coherent component may be one, two, or more.
  • the laser box and the silicon optical chip can be connected through a variety of connection methods.
  • the laser box and the silicon photonic chip can be connected through optical fibers.
  • the laser box and the silicon optical chip are not connected through optical fibers, but are coupled to the silicon optical chip through the optical window of the laser box.
  • electrical signals can be transmitted between the silicon optical chip and the circuit board in various ways.
  • the silicon photonic chip and the circuit board realize the transmission of electrical signals through the U-shaped groove substrate.
  • the silicon photonic chip is directly wired to the circuit board to realize the transmission of electrical signals.
  • FIG. 5 is a schematic diagram of the coherence principle of an optical module provided according to some embodiments of the present disclosure.
  • the silicon material in the silicon photonic chip is not an ideal light-emitting material for laser chips, the light-emitting unit cannot be integrated in the silicon photonic chip manufacturing process, so the silicon photonic chip needs to provide light from an external light source.
  • a laser box is used as an external light source to provide light for the silicon photonic chip. After the light emitted from the laser box is coupled into the silicon optical chip, it is split by the optical splitter built into the silicon optical chip.
  • One beam of light is used as the light source of the transmitting end, which is called the transmitting end light source; the other beam of light is used as the local oscillator of the receiving end. Light, this beam of light is called the local oscillator light of the receiving end.
  • the light source at the transmitting end is coupled to the silicon optical chip, it is divided into two optical signals with vertical polarization directions through the polarization beam splitter built into the silicon optical chip, namely TE polarized light and TM polarized light. Then the TE polarized light and TM polarized light enter the first IQ modulator and the second IQ modulator respectively.
  • the first IQ modulator performs high-order modulation on the TE polarized light, and the second IQ modulator performs high-order modulation on the TM polarized light.
  • the modulated polarized light signals pass through the polarization beam combiner and are combined to generate the emitted light signal, which is then emitted.
  • the local oscillation light at the receiving end is coupled to the silicon optical chip, it is split into two lights with perpendicular polarization directions through the polarization beam splitter, namely TE polarized light and TM polarized light.
  • the external optical signal is coupled to the silicon optical chip, it is also divided into two optical signals with perpendicular polarization directions through the polarization beam splitter, namely TE polarized light and TM polarized light.
  • the TE polarized light of the local oscillation light at the receiving end and the TE polarized light of the external optical signal are mixed and amplified in the optical mixer to obtain the first mixed light.
  • the TM polarized light of the local oscillator light at the receiving end and the TM polarized light of the external optical signal are mixed and amplified in the optical mixer to obtain the second mixed frequency light.
  • the first mixed frequency light and the second mixed frequency light are both amplified optical signals. They are received through coherent detection.
  • the first mixed frequency light and the second mixed frequency light are converted into corresponding electrical signals.
  • the optical mixer is a 90° optical mixer.
  • the above-mentioned at least one carrier coherent component includes a dual-carrier coherent component.
  • Figure 6 is a structural diagram of a dual-carrier coherent component provided according to some embodiments of the present disclosure
  • Figure 7 is a structural diagram of a dual-carrier coherent component provided according to some embodiments of the present disclosure. Exploded view of a dual-carrier coherent component.
  • a dual-carrier coherent component 300 is provided on the surface of the circuit board 206.
  • the dual-carrier coherent component 300 includes a double U-shaped groove cover 310, a double U-shaped groove substrate 320, a first carrier component 330 and a second carrier component 300.
  • Carrier component 340 As shown in FIG.
  • part of the structure of the first carrier component 330 and part of the second carrier component 340 are disposed in a cavity composed of a double U-shaped groove cover 310 and a double U-shaped groove base plate 320 .
  • Part of the structure of the first carrier component 330 and part of the structure of the second carrier component 340 are provided outside the cavity composed of the double U-shaped groove cover 310 and the double U-shaped groove base plate 320 .
  • the double U-shaped groove cover shell 310 and the double U-shaped groove base plate 320 are snap-fitted.
  • the dual-carrier coherent component 300 integrates two 800G silicon photonic chips, and the first carrier group in the dual-carrier coherent component
  • the component 330 and the second carrier component 340 respectively realize a single carrier of 800Gb/s, thereby achieving a transmission rate of 1.6Tb/s.
  • the dual-carrier coherent component 300 can be made into a whole to achieve modularity, facilitate connection with the circuit board, and facilitate application to other structures, such as in a host computer.
  • the side walls of the double U-shaped groove cover 310 respectively form its first U-shaped groove 311 and the second U-shaped groove 312; the double U-shaped groove cover 310 is connected to the upper housing 201 of the optical module to play a heat dissipation role; first The carrier component 330 and the second carrier component 340 generate a certain amount of heat when working.
  • the double U-shaped groove cover 310 is connected to the upper housing 201 of the optical module to dissipate the generated heat through the upper housing 201 of the optical module; Furthermore, the double U-shaped groove cover 310 also plays a protective role, thereby protecting the first carrier component 330 and the second carrier component 340 .
  • a first U-shaped groove 321 and a second U-shaped groove 322 are formed on the side wall of the double U-shaped groove substrate 320; the double U-shaped groove substrate 320 is provided on the surface of the circuit board 206, and the double U-shaped groove substrate 320 plays a supporting role; The first carrier component 330 and the second carrier component 340 are disposed on the upper surface of the double U-shaped groove substrate 320.
  • the upper surface of the double U-shaped groove substrate 320 carries the first carrier component 330 and the second carrier component 340;
  • the bottom surface of the U-shaped groove substrate 320 is implanted with solder balls, such as BGA solder balls, which are electrically connected to the circuit board 206 through the solder balls; for example, the back surface of the double U-shaped groove substrate 320 is implanted with solder balls, and then through the SMT process
  • the dual U-shaped groove substrate 320 together with the first carrier component 330 and the second carrier component 340 is assembled on the circuit board 206 to realize the electrical connection between the dual carrier coherent component 300 and the circuit board 206, and then the circuit board 206 provides the silicon photonic chip with a signal from
  • the data signal of the host computer is modulated into light by the silicon optical chip. After the external optical signal is demodulated into an electrical signal by the silicon optical chip, it is output to the host computer through the circuit board 206.
  • the bottom surface of the double U-shaped groove substrate 320 is provided with solder balls, and the top surface is provided with a soldering pad.
  • the solder balls can realize the electrical connection between the double U-shaped groove substrate 320 and the circuit board 206, and the soldering pads can realize the double U-shaped groove substrate. 320 and the electrical connections between the chips on the surface.
  • Figure 8 is a structural diagram of a carrier component provided according to some embodiments of the present disclosure.
  • the first carrier component 330 includes: a first silicon optical chip 331, a first electrical chip, a second electrical chip, an optical fiber connector 334, a first laser box 338 and an optical fiber.
  • the first electrical chip may be a driving modulator, and the second electrical chip may be a transimpedance amplifier; the first electrical chip is disposed on a side surface of the double U-shaped groove substrate facing the double U-shaped groove cover, and the first electrical chip The chip is disposed on the side of the first silicon photonic chip; the second electrical chip is disposed on the side surface of the double U-shaped groove substrate facing the double U-shaped groove cover, and the second electrical chip is disposed on the side of the first silicon photonic chip.
  • the first electrical chip and the second electrical chip are respectively disposed on the side of the first silicon optical chip 331.
  • the first silicon optical chip 331 is connected to the first electrical chip by wires, and the first silicon optical chip 331 is connected to the second electrical chip by wires.
  • the first silicon photonic chip 331, the first electrical chip and the second electrical chip are arranged in the cavity composed of the double U-shaped groove cover 310 and the double U-shaped groove substrate 320; one end of the optical fiber connector 334 is placed in the double U-shaped groove cover The other end is placed outside the cavity formed by the double U-shaped groove cover shell 310 and the double U-shaped groove base plate 320; the first laser box 338 and the optical fiber are located in the double U-shaped groove.
  • the cover shell 310 and the double U-shaped groove base plate 320 are outside the cavity.
  • the electrical signals on the circuit board 206 can pass through the double U-shaped groove substrate 320, and then transmitted to the inside of the first silicon photonic chip 331; it can be seen that the double U-shaped groove substrate 320 plays the role of electrical signal transfer; in some embodiments, when the silicon photonic chip is wired and connected to the circuit board, in order to ensure The wire length is short, and a gap is formed on the surface of the circuit board, so that the silicon photonic chip is embedded in the gap, and the wire length is shorter when connected to the circuit board; in this disclosure, the circuit board is connected through the double U-shaped groove substrate 320.
  • the signal is transferred from the circuit board 206 to the inside of the first silicon photonic chip 331, which can avoid providing gaps on the surface of the circuit board, thus ensuring the integrity of the circuit board.
  • the first side of the first silicon optical chip 331 is provided with a first modulation driver 332, the second side is provided with a first transimpedance amplifier 333, and the third side is provided with an optical fiber connector 334.
  • the optical fiber connectors 334 are respectively connected to the first optical fiber and the second optical fiber.
  • the first optical fiber, the second optical fiber and the third optical fiber are respectively connected to the first laser box 338, the transmitting optical fiber adapter and the receiving optical fiber adapter. Therefore, the first optical fiber, the second optical fiber and the third optical fiber are respectively described as light sources.
  • the side of the first silicon optical chip 331 receives the light from the first laser box 338; the modulation of the emitted optical signal and the demodulation of the received optical signal are completed by the first silicon optical chip 331; the circuit board 206 passes through the double U-shaped groove substrate 320
  • the first silicon optical chip 331 is provided with a data signal from the host computer, and the first silicon optical chip 331 modulates the data signal into light to generate an optical signal; the optical signal from the outside is demodulated by the first silicon optical chip 331 into electrical signals. After receiving the signal, it is output to the host computer through the double U-shaped groove substrate 320 and the circuit board 206 in sequence.
  • the first silicon optical chip 331 is connected to the light source optical fiber 335, the emitting optical fiber 336 and the receiving optical fiber 337; the first silicon optical chip 331 and the light source optical fiber 335, the emitting optical fiber 336 and the receiving optical fiber 337 can be connected through the optical fiber connector 334; the light source optical fiber One end of 335 is coupled and connected to the first receiving optical port of the first silicon optical chip 331, and the other end is connected to the first laser box 338 to transmit the light emitted by the first laser box 338; one end of the emitting optical fiber 336 is connected to the first silicon optical chip 331 The output optical port is coupled and connected, and the other end is connected to the transmitting optical fiber adapter to transmit the emitting optical signal generated by the first silicon optical chip 331; one end of the receiving optical fiber 337 is coupled and connected to the second receiving optical port connected to the first silicon optical chip 331, The other end is connected to the receiving optical fiber adapter to transmit external optical signals to the first silicon optical chip 331 .
  • the first receiving light port, the output light port, and the second receiving light port of the first silicon photonic chip 331 are provided on the side of the first silicon photonic chip 331 , and the side of the first silicon photonic chip 331 receives light from the first laser box 338 of light.
  • the optical fiber connector 334 is thicker than the first silicon optical chip 331.
  • the first silicon optical chip 331 is disposed on the surface of the double U-shaped groove substrate 320, thereby raising the height of the first silicon optical chip 331 so that the optical fiber connector
  • the optical fiber end face inside 334 is on a horizontal line with the optical port end face of the first silicon optical chip 331, realizing the coupling connection between the optical fiber end face and the optical port end face, thereby realizing signal transmission between the optical fiber and the silicon optical chip.
  • a gap will be provided on the surface of the circuit board to embed the optical fiber connector, so that the optical fiber connector sinks to the position where the end face of the optical fiber in the optical fiber connector is in line with the end face of the optical port of the silicon photonic chip.
  • the notch on the surface of the circuit board will affect the signal transmission performance of the circuit board, and because the optical fiber connector sinks and is closer to the circuit board, the optical fiber inside the optical fiber connector will interfere with the circuit board.
  • the light emitted by the first laser box 338 is coupled to the first silicon optical chip 331 through the light source optical fiber 335, and then is split. Part of it is used as the transmitting end light source, and part is used as the receiving end local oscillator light.
  • the first laser box 338 transmits light to the first silicon optical chip 331.
  • the light provided by the optical chip 331 is light with a single wavelength and stable power, and does not carry data.
  • the first silicon optical chip 331 modulates the light to load data into the light; the first silicon optical chip 331 has an internal IQ modulator, since the IQ modulator has high requirements on the amplitude of the received electrical signal, the electrical signal transmitted from the DSP chip 2061 is processed through the first modulation driver 332, thereby increasing the amplitude of the electrical signal. Meet the requirements of the IQ modulator; then load the electrical signal to the transmitter light source through the IQ modulator to generate a transmit optical signal carrying information, and then the transmit optical signal is transmitted to the outside of the optical module through the transmit optical fiber 336; the external optical signal passes through the receiving optical fiber 337 It is transmitted to the first silicon photonic chip 331 and coherently mixed with the local oscillator light of the receiving end.
  • the converted photocurrent signal is amplified, and then further amplified by the first transimpedance amplifier 333 and transmitted to the DSP chip 2061 .
  • the light emitted by the first laser box 338 enters the first silicon optical chip 331.
  • the optical signal is modulated by the first silicon optical chip 331, it is transmitted to the emission optical fiber adapter through the emission optical fiber 336 to realize the light emission of the optical module; the external optical signal passes through The receiving optical fiber adapter and the receiving optical fiber 337 are transmitted to the first silicon optical chip 331, and the electrical signal is demodulated by the first silicon optical chip 331 and then output to the host computer to realize light reception of the optical module.
  • the light source optical fiber 335 is a polarization-maintaining optical fiber, and the transmitting optical fiber 336 and the receiving optical fiber 337 are non-polarization-maintaining optical fibers; the light source optical fiber 335 uses a polarization-maintaining optical fiber to ensure that the local oscillation light at the receiving end is polarized during transmission. The state remains unchanged.
  • a reasonable optical fiber connection method is adopted and the assembly process is reasonably arranged.
  • the corresponding laser box and the optical fiber array assembly are first assembled together to form a component with a light source, and then it is combined with the corresponding silicon light source.
  • the chips are coupled to avoid fiber coiling operations during assembly, greatly improving assembly efficiency and reducing assembly costs.
  • the second carrier component 340 includes: a second silicon optical chip 341, a first electrical chip, a second electrical chip, an optical fiber connector 344, a second laser box 348 and an optical fiber.
  • the first electrical chip may be a driving modulator
  • the second electrical chip may be a transimpedance amplifier.
  • the second silicon photonic chip 314, the first The electrical chip and the second electrical chip are placed in the cavity formed by the double U-shaped groove cover 310 and the double U-shaped groove base plate 320; one end of the optical fiber connector 334 is placed in the cavity formed by the double U-shaped groove cover 310 and the double U-shaped groove base plate 320.
  • the other end is placed outside the cavity composed of the double U-shaped groove cover 310 and the double U-shaped groove base plate 320; the second laser box 348 and the optical fiber are located in the double U-shaped groove cover 310 and the double U-shaped groove base plate 320. outside the cavity.
  • the second silicon photonic chip 341 is provided with a second modulation driver 342 on the first side, a second transimpedance amplifier 343 on the second side, and an optical fiber connector 344 on the third side.
  • the optical fiber connectors 344 are respectively connected to the first optical fiber and the second optical fiber.
  • the first optical fiber, the second optical fiber and the third optical fiber are respectively connected to the second laser box 348, the transmitting optical fiber adapter and the receiving optical fiber adapter. Therefore, the first optical fiber, the second optical fiber and the third optical fiber are respectively described as light sources.
  • the light emitted by the second laser box 348 is coupled to the second silicon optical chip 341 through the light source optical fiber 345, and then is split. Part of it is used as the transmitting end light source, and part is used as the receiving end local oscillator light; the second silicon optical chip 341 is equipped with an IQ inside Modulator, similarly, since the IQ modulator has high requirements on the amplitude of the received electrical signal, the electrical signal transmitted from the DSP chip 2061 is processed through the second modulation driver 342, thereby increasing the amplitude of the electrical signal.
  • the electrical signal is loaded onto the transmitting end light source through the IQ modulator to generate a transmitted optical signal carrying information, and then the transmitted optical signal is transmitted to the outside of the optical module through the transmitting optical fiber 346; the external optical signal passes through the receiving optical fiber 347 is transmitted to the second silicon optical chip 341, coherently mixed with the local oscillator light of the receiving end, the converted photocurrent signal is amplified, and then further amplified by the second transimpedance amplifier 343, and transmitted to the DSP chip 2061 .
  • Figure 9 is a cross-sectional view of a dual-carrier coherent component provided according to some embodiments of the present disclosure.
  • first silicon optical chip 331 is thin, in order to increase the connection firmness between the first silicon optical chip 331 and the optical fiber connector 334 , there is a cross-section on the surface of the first silicon optical chip 331 and the optical fiber connector 334 .
  • Connection plate 350 is provided across the surfaces of the second silicon optical chip 341 and the optical fiber connector 344 .
  • the connecting plate 350 covers the surfaces of the optical fiber connector 334 in the first carrier component 330 and the optical waveguide of the first silicon optical chip 331. One end of the connecting plate 350 is connected to the surface of the optical fiber connector 334 in the first carrier component 330. The other end is connected across the optical waveguide surface of the first silicon optical chip 331 .
  • a first U-shaped groove 311 is formed on the surface of the double U-shaped groove cover 310 to avoid the connecting plate 350; at the same time, the first U-shaped groove 311 can also allow the optical waveguide of the first silicon photonic chip 331 to exposed to the outside.
  • the second U-shaped groove 312 can avoid the connecting plate 360 and can also expose the optical waveguide of the second silicon optical chip 341 to the outside.
  • the first silicon optical chip 331 is exposed relative to the first U-shaped groove 311, and the optical waveguide of the first silicon optical chip 331 is exposed relative to the first U-shaped groove 311, which facilitates the connection between the optical fiber and the optical waveguide of the first silicon optical chip 331.
  • Perform coupling connection the second silicon optical chip 341 is exposed relative to the second U-shaped groove 312, and the optical waveguide of the second silicon optical chip 341 is exposed relative to the second U-shaped groove 312, which facilitates the connection between the optical fiber and the second silicon optical chip.
  • 341 optical waveguide for coupling connection.
  • the first silicon photonic chip 331 is disposed across the surface of the first U-shaped groove 321, and the second silicon photonic chip 341 is disposed across the surface of the second U-shaped groove 322; the first modulation driver 332 and the first transimpedance amplifier 333 are both disposed on The side of the first silicon photonic chip 331; the second modulation driver 342 and the second transimpedance amplifier 343 are arranged on the side of the second silicon photonic chip 341; the optical fiber connector 334 is arranged in the first U-shaped groove 321, and the optical fiber is The connector 344 is provided in the second U-shaped groove 322; the double U-shaped groove cover 310 is covered on the surface of each of the above devices, and the first silicon photonic chip 331 is exposed relative to the first U-shaped groove 311, then the first silicon photonic chip 331 is exposed relative to the first U-shaped groove 311.
  • the optical waveguide of the optical chip 331 is exposed relative to the first U-shaped groove 311 to facilitate the coupling connection between the optical fiber and the optical waveguide of the first silicon optical chip 331; the second silicon optical chip 341 is exposed relative to the second U-shaped groove 312.
  • the optical waveguide of the second silicon optical chip 341 is exposed relative to the second U-shaped groove 312 to facilitate the coupling connection between the optical fiber and the optical waveguide of the second silicon optical chip 341; for example, the optical fiber connector in the first carrier component 330
  • the coupling glue is filled between 334 and the first silicon optical chip 331 to realize the coupling connection between the optical fiber and the optical waveguide of the first silicon optical chip 331; the coupling is filled between the optical fiber connector 344 in the second carrier component 340 and the second silicon optical chip 341 Glue to realize the coupling connection between the optical fiber and the optical waveguide of the second silicon optical chip 341.
  • Figure 10 is a second cross-sectional view of a dual-carrier coherent component provided according to some embodiments of the present disclosure.
  • the optical fiber connector 334 includes a first substrate 3341 and a second substrate 3342.
  • the first substrate 3341 and the second substrate 3342 are stacked.
  • the light source optical fiber 335, the transmitting optical fiber 336 and the receiving optical fiber 337 are passed through the first substrate 3341. and the second substrate 3342; each optical fiber channel is provided inside the second substrate 3342, each optical fiber channel is set in the form of a V-shaped groove, and the light source optical fiber 335, the transmitting optical fiber 336 and the receiving optical fiber 337 are arranged in the V-shaped groove; V
  • the shape of the groove is conducive to better positioning of the corresponding optical fiber.
  • Figure 11 is a cross-sectional view three of a dual-carrier coherent component provided according to some embodiments of the present disclosure.
  • the first silicon photonic chip 331 is disposed on the surface of the double U-shaped groove substrate 320. Since the edge of the first silicon photonic chip 331 is not aligned with the edge of the double U-shaped groove substrate 320, in order to avoid the optical fiber connector 334,
  • the U-shaped groove substrate 320 has a first U-shaped groove 311 and a second U-shaped groove 312 respectively, so that one end of the optical fiber connector 334 extends into the first U-shaped groove 311, and one end of the optical fiber connector 344 extends into the second U-shaped groove 312. .
  • Figure 12 is a cross-sectional view of the assembly relationship between a double U-shaped groove cover shell and a double U-shaped groove base plate provided according to some embodiments of the present disclosure
  • Figure 13 is a cross-sectional view of a double U-shaped groove cover shell provided according to some embodiments of the present disclosure.
  • Structural diagram as shown in Figure 12 and Figure 13, the double U-shaped groove cover shell 310 has a cavity 314 inside, and the first carrier component 330 and the second carrier component 340 are assembled through the cavity 314; the double U-shaped groove cover shell 310 side
  • the wall is provided with a limiting protrusion 313, and the side wall of the double U-shaped groove base plate 320 is provided with a limiting groove 323.
  • the limiting protrusion 313 and the limiting groove 323 are embedded with each other for limiting, so that the double U-shaped groove cover shell is 310 and the double U-shaped groove base plate 320 are fixed together; for example, the double U-shaped groove cover shell 310 is buckled on the surface of the double U-shaped groove base plate 320, so that the double U-shaped groove cover shell 310 is buckled on the double U-shaped groove Fixation between substrates 320.
  • the opening length of the first U-shaped groove 311 and the second U-shaped groove 312 along the long side of the double U-shaped groove cover 310 is greater than that of the first U-shaped groove 321 and the second U-shaped groove 322 along the double U-shaped groove cover 310
  • the opening length in the long side direction is to facilitate the assembly of the optical fiber connector 334 in the first carrier assembly 330 and the optical fiber connector 344 in the second carrier assembly 340, and also to facilitate the assembly of the first connection plate 350 and the second connection plate. 360.
  • Figure 14 is a structural diagram 1 of the first laser box provided according to some embodiments of the present disclosure
  • Figure 15 is a structural diagram 2 of the first laser box provided according to some embodiments of the present disclosure.
  • the first laser box 338 includes a cavity 3381, and the surface of the cavity 3381 is connected with the cover; a receiving cavity 3382 is provided in the middle of the cavity 3381, and the two opposite ends of the cavity 3381 are respectively
  • a boss 3383 and a through hole 3384 are provided; the surface of the boss 3383 is higher than the surface of the accommodation cavity 3382; a transfer circuit board 370 is provided on the surface of the boss 3383, and an optical fiber adapter 3385 is provided in the through hole 3384.
  • the light source optical fiber 335 is a polarization-maintaining optical fiber
  • the optical fiber adapter 3385 is a polarization-maintaining optical fiber adapter.
  • the accommodation cavity 3382 is provided with a TEC381 and a carrier plate 382.
  • the surface of the TEC381 is provided with a laser chip 383 and a collimating lens 384.
  • the surface of the carrier plate 382 is provided with an isolator 385 and a condensing lens 386.
  • the wavelength difference (or frequency difference) between the received optical signal and the local oscillator optical signal needs to be less than a certain value to cause interference and ensure that the DSP chip can process the corresponding signal
  • the wavelength of the laser chip 383 needs to be maintained at Very stable state, such as ⁇ 0.015nm range, so TEC381 is used as the key temperature control component to control the wavelength of the laser chip 383, and a high-precision temperature sensor is used to detect the temperature of the laser chip 383.
  • the isolator 385 is used to prevent the light emitted by the laser chip 383 from being emitted and returned to the laser chip 383. Therefore, the isolator 385 is arranged in the light emitting direction of the laser chip 383. For example, the isolator 385 is arranged behind the collimating lens 384. A collimating lens 384 is provided in the direction of the laser chip 383, that is, between the isolator 385 and the laser chip 383.
  • the carrier plate 382 is used to raise the height of the isolator 385 and the condensing lens 386 so that the optical axes of the isolator 385 and the condensing lens 386, the optical axis of the laser chip 383, and the optical axis of the collimating lens 384 are on the same straight line.
  • the collimating lens 384 is used to convert the divergent light emitted by the laser chip 383 into parallel light
  • the condensing lens 386 is used to convert the parallel light into condensed light, thereby coupling into the first silicon light along the fiber adapter 3386 and the light source fiber 335 in a converged state.
  • Inside chip 331 is used to convert the divergent light emitted by the laser chip 383 into parallel light
  • the condensing lens 386 is used to convert the parallel light into condensed light, thereby coupling into the first silicon light along the fiber adapter 3386 and the light source fiber 335 in a converged state.
  • Part of the adapter circuit board 370 is located inside the cavity 3381 and part is located outside the cavity 3381; one end of the adapter circuit board 370 located outside the cavity 3381 is electrically connected to the circuit board 206 through wiring or a flexible circuit board, thereby connecting the circuit board
  • the driving electrical signal from 206 is transmitted to the cavity 3381, that is, to the laser chip 383.
  • the laser chip 383 emits light under the action of the driving electrical signal.
  • the opening of the first laser box 338 can face the optical module upper housing 201; among the two opposite surfaces of the first laser box 338, One surface is provided with an opening, and the other surface is not provided with an opening.
  • the surface with the opening is connected with the corresponding cover plate, and the surface without the opening is in contact with the circuit board 206; then the surface with the opening is relative to the surface without the opening.
  • the surface with the opening is further away from the circuit board 206 and closer to the upper housing 201 of the optical module. The same is true for the second laser box 348.
  • the wavelength of the output light of the laser box needs to be controlled within the range of ⁇ 1.75GHz, and the corresponding wavelength change in the O-band is ⁇ 0.01 nm, corresponding to the operating temperature change of the laser chip ⁇ 0.11°C. Since there are certain differences in wavelength requirements between lasers and coherent light sources, the wavelength of the laser needs to be adjusted within a certain range. For example, TEC is used to control the operating temperature of the laser to achieve wavelength adjustment.
  • TEC control and its control circuit can achieve a control accuracy of 0.1°C.
  • the parameters of the control circuit will also change slightly with changes in ambient temperature, which will also cause the locked wavelength to deviate from the target wavelength. Therefore, simply using temperature control cannot truly achieve the goal of controlling the wavelength within a very small range.
  • Figure 16 is a structural diagram of a second laser box provided according to some embodiments of the present disclosure; the structure of the laser box shown in Figure 16 is based on the laser box shown in Figure 14 with the following additions: a beam splitter 391, a first backlight detector 392, an optical Etalon 393, second backlight detector 394, etalon TEC395, temperature sensor 396.
  • One end of the beam splitter 391 is disposed between the isolator 385 and the condensing lens 386. There is still a lens carrier plate below the isolator 385 and the converging lens 386. Then, one end of the beam splitter 391 is disposed on the surface of the lens carrier plate, and the other end is connected to the first backlight.
  • the detector 392 is connected, and the spectrometer 391 includes a first reflective surface 3911 and a second reflective surface 3912 arranged oppositely.
  • the first reflective surface 3911 is used to divide the light emitted by the laser chip into emitted light and first reflected light, where the emitted light
  • the energy ratio to the first reflected light may be 95:5, that is, most of the light provides light source for the silicon photonic chip in the form of emitted light, and a small part of the light is separated for wavelength monitoring;
  • the second reflective surface 3912 is used to convert the first The reflected light is divided into reference light and second reflected light.
  • the second reflective surface 3912 is semi-transparent and semi-reflective, and the energy ratio of the reference light and the second reflected light is 50:50.
  • the first backlight detector 392 is located on the same base as the spectrometer 391 and faces the light transmission direction of the second reflective surface 3912. It is used to receive and detect the optical power of the reference light. The detected optical power of the reference light is recorded as is the first optical power P1, and the first optical power P1 is the reference optical power.
  • the optical etalon 393 is provided between the spectrometer 391 and the second backlight detector 394, and is used for receiving the second reflected light and outputting the monitoring light.
  • the second backlight detector 394 is provided at the output end of the optical etalon 393 and is used to receive and detect the optical power of the monitoring light.
  • the detected optical power of the monitoring light is recorded as the second optical power P2.
  • the second optical power P2 is the monitored optical power. Since the transmittance curve of the optical etalon is close to linear within the transmittance range of 50% ⁇ 10%, the input wavelength can be adjusted to the wavelength value at which the transmittance of the etalon is 50%, and the transmittance can be monitored by rate changes to monitor changes in input wavelength.
  • the etalon is placed on the etalon TEC395.
  • the optical path of the etalon will change accordingly, causing its transmittance curve to shift relative to the wavelength.
  • the wavelength point with a transmittance of 50% of the optical etalon can be adjusted to be the same as the wavelength of the input laser.
  • the first laser box 338 has a set wavelength
  • the set wavelength is a wavelength that meets the wavelength requirements of the coherent light source; when the wavelength changes, the ratio of the first optical power P1 to the second optical power P2 changes, Therefore, the change in the ratio of the first optical power P1 to the second optical power P2 can represent the optical power change rate due to the change in wavelength.
  • the changed wavelength is then used as the control variable of the TEC of the laser according to the relationship between the set wavelength and the changed wavelength, forming a closed-loop control.
  • the wavelength of the light emitted by the laser chip can be adjusted to the set wavelength, achieving Precise control of wavelength.
  • the set wavelength of the first laser box 338 is 1309.81 nm ( ⁇ 0), and the laser wavelength is exactly at the position of 50% optical power of the optical etalon 393; if the first optical power P1 and the second optical power P2 The ratio change is 10%, then the optical power corresponding to the optical etalon 393 is 60%.
  • the transmission spectrum of the optical etalon 393 find the wavelength corresponding to the optical power 60%, such as 1309.82nm, then the changed wavelength is 1309.82 nm; the difference between 1309.81nm and 1309.82nm is used as the control variable of the TEC of the laser to form a negative feedback closed-loop control.
  • the wavelength of the light emitted by the laser chip can be adjusted to the set wavelength of 1309.81nm to achieve the wavelength precise control.
  • the optical etalon 393 should ensure a certain temperature stability.
  • the optical etalon 393 has a unique low expansion coefficient and refractive index temperature change coefficient, and has a certain temperature change; for example, when the temperature of the optical etalon 393 changes by ⁇ 3°, the change in transmittance is ⁇ 10%.
  • the etalon TEC4805 is used to control the temperature of the optical etalon 393, and its temperature can be controlled at ⁇ 0.5°. At this time, the change in transmittance is ⁇ 1.5%, which can meet the requirements for wavelength stability.
  • a temperature sensor 396 is also provided on the surface of the optical etalon 393 to monitor the temperature of the optical etalon so that it operates within a set temperature range.
  • the present disclosure provides a first backlight detector 392, a second backlight detector 394, and an optical etalon 393 in the laser box.
  • the wavelength of the light emitted from the laser box and the set Monitor the deviation of a certain wavelength, and then perform closed-loop control to accurately control the laser wavelength, thereby controlling the wavelength within the requirements of coherent optical communication.
  • a thermal pad is provided between the DSP chip 2061 and the upper housing of the optical module; in order to conduct the heat generated when the corresponding laser box operates To conduct heat away, a thermal pad is provided between the laser box and the upper housing of the optical module; in order to conduct away the heat generated when the corresponding silicon photonic chip, modulation driver and transimpedance amplifier are working, the double U of the dual-carrier coherent component is There is a thermal pad between the groove cover shell and the upper shell of the optical module. Through the contact between the thermal pad and the upper housing of the optical module, the heat can be better dissipated to the outside of the optical module through the upper housing of the optical module.
  • a dual-carrier coherent component 300 is provided on one surface of the circuit board.
  • the first carrier component and the second carrier component in the dual-carrier coherent component respectively achieve a single-carrier 800Gb/s transmission rate. , thereby achieving a transmission rate of 1.6Tb/s.
  • the above-mentioned at least one carrier coherent component includes a first dual-carrier coherent component and a second dual-carrier coherent component.
  • Figure 17 shows the first dual-carrier coherent component and the second dual-carrier coherent component provided according to some embodiments of the present disclosure. Component diagram. As shown in Figure 17, a first dual-carrier coherent component 400 and a second dual-carrier coherent component 500 are respectively provided on the upper and lower surfaces of the circuit board 206.
  • the first dual-carrier coherent component 400 has the same composition structure as the dual-carrier coherent component 300
  • the second dual-carrier coherent component 500 has the same composition structure as the dual-carrier coherent component 300 .
  • the first dual-carrier coherent component 400 integrates two 800G silicon photonic chips
  • the second dual-carrier coherent component 500 integrates two 800G silicon photonic chips. If any carrier component achieves a single-carrier 800Gb/s transmission rate, a 3.2Tb/s transmission rate can be achieved.
  • Figure 18 is an internal diagram of the first dual-carrier coherent component and the second dual-carrier coherent component provided according to some embodiments of the present disclosure
  • Figure 19 is an internal diagram of the first dual-carrier coherent component and the second dual-carrier coherent component provided according to some embodiments of the present disclosure.
  • the first dual-carrier coherent component 400 includes a first dual U-shaped groove cover 410, a first dual U-shaped groove substrate 420, a first carrier component 430 and a second carrier component 440
  • the carrier component 440 includes a second silicon optical chip 441 and a second optical fiber connector 444
  • a connecting board 460 is provided across the second silicon optical chip 441 and the second optical fiber connector 444.
  • the second dual-carrier coherent component 500 includes a second dual-U-shaped groove cover 510, a second dual-U-shaped groove substrate 520, and a first carrier component. and a second carrier component; the second carrier component includes a second silicon optical chip 541 and a second optical fiber connector 544; a connecting board 560 is provided across the second silicon optical chip 541 and the second optical fiber connector 544.
  • the relative assembly relationship between the first double U-shaped groove cover 410, the first double U-shaped groove base plate 420, the first carrier component 430, and the second carrier component 440 is as in the previous embodiment.
  • the relative assembly relationships of the U-shaped groove substrate 320, the first carrier component 330, and the second carrier component 340 are the same and will not be described in detail.
  • the first carrier component 430 includes a first silicon optical chip 431, a first modulation driver 432, a first transimpedance amplifier 433, a first optical fiber connector 434, a first light source optical fiber 435, a first transmitting optical fiber 436, a first receiving optical fiber 437, First Laser Box 438.
  • the second carrier component 440 includes a second silicon optical chip 441, a second modulation driver 442, a second transimpedance amplifier 443, a second optical fiber connector 444, a second light source optical fiber 445, a second transmitting optical fiber 446, a second receiving optical fiber 447, Second laser box 448.
  • the working principle between the structures is the same as that of the first silicon optical chip 331, the first modulation driver 332, the first transimpedance amplifier 333, the optical fiber connector 334, the light source optical fiber 335, the transmitting optical fiber 336, the receiving optical fiber 337, and the first optical fiber in the previous embodiment.
  • the working principles of these structures of the laser box 338 are the same.
  • the working principle between the structures is the same as that of the second silicon optical chip 341, the second modulation driver 342, the second transimpedance amplifier 343, the optical fiber connector 344, the light source optical fiber 345, the transmitting optical fiber 346, the receiving optical fiber 347, and the second optical fiber in the previous embodiment.
  • the working principles of these structures of the laser box 348 are the same.
  • Figure 20 is a side view of the first dual-carrier coherent component and the second dual-carrier coherent component provided according to some embodiments of the present disclosure. As shown in Figure 20, the first dual-carrier coherent component 400 and the second dual-carrier coherent component 500 are staggered relative to the circuit board 206; from a top view, the projection of the first carrier component 430 on the lower surface of the circuit board is different from the second dual-carrier coherent component 430.
  • the first carrier component 440 of the dual-carrier coherent component 500 does not coincide with the second carrier component 440 on the lower surface of the circuit board 500; for example, the first carrier component 430 of the first dual-carrier coherent component 400 includes a first laser box 438, and the second carrier component 440 includes a second laser box 448; the first carrier component of the second dual-carrier coherent component 500 includes a first laser box 538, and the second carrier component includes a second laser box 548; from From the upper surface of the circuit board to the lower surface of the circuit board, the first laser box 438 and the first laser box 538 are not on the same vertical axis, but are relatively staggered; the second laser box 448 and the second laser box 548 are also not on the same vertical axis. On the same vertical axis, but relatively staggered.
  • the staggered arrangement of the components of the first dual-carrier coherent component 400 and the second dual-carrier coherent component 500 can prevent the corresponding components from being stacked on the same cross-section of the circuit board 206, thereby avoiding excessive concentration of heat, thereby facilitating heat dissipation and ensuring the first The dual-carrier coherent component 400 and the second dual-carrier coherent component 500 work normally.
  • Figure 21 is a second cross-sectional view of the first dual-carrier coherent component and the second dual-carrier coherent component provided according to some embodiments of the present disclosure; as shown in Figure 21, in the first dual-carrier coherent component 400, the first silicon photonic chip 431 and A connecting plate 450 is provided across the surface of the first optical fiber connector 434; a connecting plate 460 is provided across the surface of the second silicon optical chip 441 and the second optical fiber connector 444; in the second dual-carrier coherent component 500, the first silicon optical chip 531 A connecting plate 550 is provided across the surface of the first optical fiber connector 534 , and a connecting plate 560 is provided across the surface of the second silicon optical chip 541 and the second optical fiber connector 544 .
  • the openings of the first U-shaped groove cover 410 and the second U-shaped groove cover 510 both face the circuit board 206; the first U-shaped groove cover 410 and the upper housing 201 of the optical module are arranged close to each other, and the second U-shaped groove The cover shell 510 and the lower shell 202 of the optical module are arranged close to each other. Since the first U-shaped groove cover shell 410 and the second U-shaped groove cover shell 510 have better heat dissipation effects, when the first double U-shaped groove cover shell 410 is used, The U-shaped groove cover 410 and the upper housing 201 of the optical module are placed close to each other.
  • the second double U-shaped groove cover 510 and the lower housing 202 of the optical module are placed close to each other, it is beneficial for the heat to pass through the first double U-shaped groove cover 510 and the lower housing 202 of the optical module respectively.
  • the U-shaped groove cover shell 410 and the second double U-shaped groove cover shell 510 are in contact with the corresponding shells and are transmitted out.
  • the optical module in the embodiment of the present disclosure includes a first dual-carrier coherent component 400 and a second dual-carrier coherent component 500.
  • the first dual-carrier coherent component 400 and the second dual-carrier coherent component 500 are respectively provided on two sides of the circuit board.
  • the at least one carrier coherent component includes a single carrier coherent component, there are at least two single carrier coherent components, and the at least two single carrier coherent components include a first single carrier coherent component and a second single carrier coherent component.
  • Figure 22 is a schematic diagram of a first single-carrier coherent component and a second single-carrier coherent component provided according to some embodiments of the present disclosure. As shown in Figure 22, a first single-carrier coherent component 600 and a second single-carrier coherent component 700 are respectively provided on the upper and lower surfaces of the circuit board 206.
  • the first single-carrier coherent component 600 integrates an 800G silicon photonic chip.
  • the single-carrier coherent component 700 integrates an 800G silicon photonic chip.
  • the first single-carrier coherent component 600 and the second single-carrier coherent component 700 respectively achieve a single-carrier 800Gb/s transmission rate, thereby achieving a 1.6Tb/s transmission rate.
  • the first single carrier coherent component 600 includes a first single U-shaped groove cover 610.
  • a U-shaped groove is formed on the surface of the first single U-shaped groove cover 610, and the opening of the first single U-shaped groove cover 610 faces the circuit board 206;
  • the second single carrier coherent component 700 includes a second single U-shaped groove cover 710.
  • a U-shaped groove is formed on the surface of the second single U-shaped groove cover 710.
  • the second single U-shaped groove cover 710 opens toward the circuit board 206.
  • Figure 23 is an internal diagram of a first single carrier coherent component and a second single carrier coherent component provided according to some embodiments of the present disclosure.
  • the first single carrier coherent component 600 includes a first single U-shaped slot cover 610, a first single U-shaped slot substrate 620, and a carrier component;
  • the second single carrier coherent component 700 includes a second single U-shaped slot Cover shell 710, second single U-shaped groove substrate 720, and carrier component.
  • the carrier component in the first single-carrier coherent component 600 is described as the up-carrier component 630
  • the carrier component in the second single-carrier coherent component 700 is described as the down-carrier component 730.
  • the up-carrier component 630 and the down-carrier component 730 have the same composition.
  • the assembly relationship between the first single U-shaped groove cover 610, the first single U-shaped groove base plate 620, and the upper carrier component 630 is similar to that of the double U-shaped groove cover 310, the double U-shaped groove base plate 320, the first carrier component 330, The assembly relationship between the second carrier components 340.
  • the first single U-shaped groove cover shell 610 and the first single U-shaped groove base plate 620 are snap-connected, and the two have a certain space; similarly, the second single U-shaped groove cover shell 710 and the second single U-shaped groove base plate 720 Snap-on connection, the two components have a certain space.
  • FIG. 24 is a schematic diagram of the partial structure of the first single-carrier coherent component provided according to some embodiments of the present disclosure
  • FIG. 25 is a schematic diagram of the partial internal structure of the first single-carrier coherent component provided according to some embodiments of the present disclosure.
  • the structure of the first single U-shaped groove cover 610 is similar to the double U-shaped groove cover 310. The difference is that the first single U-shaped groove cover 610 has a U-shaped groove and a double U-shaped groove.
  • the U-shaped groove cover shell 310 has two U-shaped grooves;
  • the first single U-shaped groove cover shell 610 is a shell with a certain space, a U-shaped groove 611 is formed in the middle, and a limiting protrusion 612 is provided on the side wall;
  • the structure of the U-shaped groove base plate 620 is similar to the double U-shaped groove base plate 320, except that the first single U-shaped groove base plate 620 has one U-shaped groove, and the double U-shaped groove base plate 320 has two U-shaped grooves.
  • the first single U-shaped groove cover 610 is provided with a U-shaped groove 611 in the middle, and the side walls are provided with limiting protrusions 612; the first single U-shaped groove base plate 620 is provided with a U-shaped groove 621 in the middle, and the side walls are provided with limiting grooves 622. , through the connection between the limiting protrusion 612 and the limiting groove 622, the first single U-shaped groove cover 610 and the first single U-shaped groove base plate 620 are limited and connected.
  • the upper carrier component 630 includes an upper silicon optical chip 631, an upper driving modulator 632, an upper transimpedance amplifier 633, an upper optical fiber connector 634, an upper light source optical fiber 635, an upper transmitting optical fiber 636, an upper receiving optical fiber 637 and a laser box 638.
  • a connecting plate 640 is provided across between the upper silicon optical chip 631 and the upper optical fiber connector 634. That is to say, one end of the connecting plate 640 is provided on the surface of the upper silicon optical chip 631, and one end is provided on the upper optical fiber connector 634 to increase the upper surface area. The stability of the connection between the silicon photonic chip 631 and the upper optical fiber connector 634.
  • the download wave component 730 includes a lower silicon optical chip 731, a lower drive modulator 732, a lower transimpedance amplifier 733, a lower optical fiber connector 734, a lower light source optical fiber 735, a lower transmitting optical fiber 736, a lower receiving optical fiber 737 and a laser box 738.
  • a connecting plate 740 is provided across the lower silicon optical chip 731 and the lower optical fiber connector 734; the lower silicon optical chip 731, the lower drive modulator 732, the lower transimpedance amplifier 733, the lower optical fiber connector 734, the lower light source optical fiber 735, and the lower emission
  • the assembly relationship and functional relationship between the optical fiber 736, the lower receiving optical fiber 737 and the laser box 738 are the same as those of the corresponding components in the first carrier component 330 in the previous embodiment, and will not be described again.
  • Figure 26 is a cross-sectional view of a first single-carrier coherent component and a second single-carrier coherent component provided according to some embodiments of the present disclosure.
  • the first single-carrier coherent component 600 and the second single-carrier coherent component 700 are staggered relative to the circuit board 206, just as the first dual-carrier coherent component 400 and the second dual-carrier coherent component 500 are staggered relative to the circuit board 206.
  • the setting purpose is the same, which can prevent corresponding devices from being stacked on the same cross-section of the circuit board 206, thereby preventing excessive concentration of heat, thereby facilitating heat dissipation.
  • the solder balls provided on the backs of the first single U-shaped groove substrate 620 and the second single U-shaped groove substrate 720 are connected to the circuit board 206 by soldering; the first single U-shaped groove cover 610 is relative to the first single U-shaped groove cover 610
  • the U-shaped groove base plate 620 is closer to the optical module upper housing 201
  • the second single U-shaped groove cover 710 is closer to the optical module lower housing 202 than the second single U-shaped groove base plate 720, which is conducive to heat passing through the first single U-shaped groove respectively.
  • the U-shaped groove cover shell 610 and the second single U-shaped groove cover shell 710 are in contact with the corresponding shells to conduct heat dissipation, thereby increasing the heat dissipation performance.
  • the optical module in the embodiment of the present disclosure includes a first single-carrier coherent component 600 and a second single-carrier coherent component 700.
  • the first single-carrier coherent component 600 integrates an 800G silicon optical chip
  • the second single-carrier coherent component 700 integrates an 800G silicon optical chip.
  • the 800G silicon photonic chip, the first single-carrier coherent component 600 and the second single-carrier coherent component 700 respectively achieve a single-carrier 800Gb/s transmission rate, thereby achieving a 1.6Tb/s transmission rate.
  • the laser box and the silicon optical chip can be connected through optical fibers, and the silicon optical chip and the circuit board realize the transmission of electrical signals through the U-shaped groove substrate.
  • Embodiments of the present disclosure also provide an optical module, in which the laser box and the silicon optical chip are not connected through optical fibers, but are coupled to the silicon optical chip through the optical window of the laser box, and the silicon optical chip is connected to the circuit The boards are directly connected with wires to realize the transmission of electrical signals.
  • Figure 27 is an exploded view of another optical module structure provided according to some embodiments of the present disclosure. As shown in FIG. 27 , a first single-carrier coherent component 800 and a second single-carrier coherent component 900 are provided on the surface of the circuit board 206 .
  • the first single-carrier coherent component 800 and the second single-carrier coherent component 900 are arranged side by side and adjacent to the surface of the circuit board 206 .
  • the first single-carrier coherent component 800 integrates an 800G silicon photonic chip
  • the second single-carrier coherent component 900 integrates an 800G silicon photonic chip.
  • the first single-carrier coherent component 800 and the second single-carrier coherent component 900 respectively implement single-carrier 800Gb /s transfer rate, thereby achieving a 1.6Tb/s transfer rate.
  • FIG. 28 is a schematic diagram of the lower surface structure of a circuit board according to some embodiments of the present disclosure
  • FIG. 29 is a schematic diagram of the separation of a circuit board and a carrier coherent component according to some embodiments of the present disclosure.
  • the surface of the circuit board 206 has a notch 2062 , and both the first single-carrier coherent component 800 and the second single-carrier coherent component 900 are embedded in the notch 2062 .
  • the first single-carrier coherent component 800 includes a first base 810
  • the second single-carrier coherent component 900 includes a second base 910.
  • the first base 810 and the second base 910 are respectively embedded in the gaps 2062.
  • Figure 30 is a structural diagram of another first single carrier coherent component and a second single carrier coherent component provided according to some embodiments of the present disclosure
  • Figure 31 is another first single carrier coherent component provided according to some embodiments of the present disclosure.
  • the surface of the first base 810 is respectively provided with a first silicon optical chip 801, a first drive modulator 802, a first transimpedance amplifier 803, a first laser box 804, a first optical fiber connector 805, a first optical fiber 806, and a second optical fiber 807.
  • the silicon photonic chip needs to provide light from an external light source; for example, the first laser box 804 is used as the second laser chip.
  • a silicon photonic chip 801 provides an external light source, and the side of the first silicon photonic chip 801 receives the light from the first laser box 804 .
  • a first drive modulator 802 and a first transimpedance amplifier 803 are respectively provided on the surface of the first silicon photonic chip 801.
  • the side of the first silicon photonic chip 801 has a first input optical port, a second input optical port and an output optical port.
  • the light emitted by the first laser box 804 is coupled into the first silicon photonic chip 801 through the first input optical port.
  • the emitted optical signal generated by the first silicon optical chip 801 is emitted to the outside of the optical module through the output optical port, and the external optical signal is coupled into the inside of the first silicon optical chip 801 through the second input optical port.
  • the first input optical port, the second input optical port and the output optical port may be in the form of a first input optical waveguide, a second input optical waveguide and an output optical waveguide.
  • the first silicon photonic chip 801 has built-in components such as an optical splitter and an IQ modulator.
  • the first drive modulator 802 is used to modulate the electrical signal output by the host computer so as to increase the amplitude of the electrical signal, thereby meeting the parameter requirements of the IQ modulator for the electrical signal.
  • the first transimpedance amplifier 803 is used to amplify the photoelectric signal generated at the receiving end.
  • the first optical fiber connector 805 is used for the first optical fiber 806 and the second optical fiber 807 to pass through, thereby fixing the first optical fiber 806 and the second optical fiber 807;
  • the first optical fiber connector 805 includes a first substrate and a second substrate, the first substrate and the second optical fiber 807.
  • the second substrates are stacked, with the first optical fiber 806 and the second optical fiber 807 passing between the first substrate and the second substrate; each optical fiber channel is provided inside the second substrate, and each optical fiber channel is in the form of a V-shaped groove.
  • An optical fiber 806 and a second optical fiber 807 are arranged in a V-shaped groove; the V-shaped groove form is conducive to better positioning of the first optical fiber 806 and the second optical fiber 807.
  • One end of the first optical fiber 806 is coupled and connected to the output optical port of the first silicon optical chip 801, and the other end is coupled and connected to the first optical fiber adapter 808 to transmit the emitted optical signal generated by the first silicon optical chip 801.
  • the first optical fiber 806 is for transmitting Optical fiber
  • the first optical fiber adapter 808 is a transmitting optical fiber adapter.
  • One end of the second optical fiber 807 is coupled and connected to the first input optical port or the second input optical port of the first silicon optical chip 801 , and the other end is coupled and connected to the second optical fiber adapter 809 to input external optical signals to the first silicon optical chip 801 ; Therefore, the second optical fiber 807 is the receiving optical fiber, and the second optical fiber adapter 809 is the receiving optical fiber adapter.
  • the layout of the first optical fiber 806 and the second optical fiber 807 in the embodiment of the present disclosure avoids fiber coiling operations during assembly, greatly improves assembly efficiency, and reduces assembly costs.
  • the second single-carrier coherent component 900 includes a second base 910 , and the second base 910 is used to carry each component of the second single-carrier coherent component 900 .
  • the surface of the second base 910 is respectively provided with a second silicon photonic chip 901, a second drive modulator 902, a second transimpedance amplifier 903, a second laser box 904, a second optical fiber connector 905, a first optical fiber 906, and a second optical fiber 907. , the first optical fiber adapter 908 and the second optical fiber adapter 909.
  • the second laser box 904 is used to provide an external light source for the second silicon photonic chip 901, and the sides of the second silicon photonic chip 901 receive the light from the second laser box 904.
  • a second driving modulator 902 and a second transimpedance amplifier 903 are respectively provided on the surface of the second silicon photonic chip 901.
  • the first base 810 and the second base 910 are close to the optical module lower housing 202 and function as heat dissipation bases.
  • the first single carrier coherent component 800 and the second single carrier coherent component can be connected through the first base 810 and the second base 910 respectively.
  • the heat generated by 900 is conducted to the outside of the optical module through the optical module housing.
  • the first base 810 and the second base 910 both support the circuit board; both the first base 810 and the second base 910 are square, and they are adjacent and arranged side by side.
  • the first laser box 804 is placed downwardly so that the optical axis of the internal laser chip is coupled with the first input optical port of the first silicon photonic chip 801 . Further, the optical axis of the internal laser chip is coupled with the first input optical port of the first silicon photonic chip 801 . One input optical port is on the same horizontal line.
  • the optical fiber inside the first optical fiber connector 805 The end face is coupled with the second input optical port and the output optical port of the first silicon optical chip 801. Further, the optical fiber end face inside the first optical fiber connector 805 is connected with the second input optical port and the output optical port of the first silicon optical chip 801. on the same level.
  • the first single-carrier coherent component 800 and the second single-carrier coherent component 900 have the same design composition and design functions; taking the first single-carrier coherent component 800 as an example, the first laser box 804 provides light for the first silicon optical chip 801, The light provided by the first laser box 804 to the first silicon optical chip 801 is light with a single wavelength and stable power, and does not carry data; the coupling connection between the first laser box 804 and the first silicon optical chip 801 can be achieved through coupling glue. Coupling connections while improving coupling efficiency.
  • the light emitted by the first laser box 804 is coupled into the first silicon optical chip 801 and is divided into two parts of light through the built-in optical splitter of the first silicon optical chip 801.
  • the circuit board 206 provides the data signal from the host computer to the first silicon optical chip 801.
  • the first silicon optical chip 801 modulates the data signal into the transmitting end light source to generate an emitted optical signal.
  • the emitted optical signal passes through the first optical fiber 806,
  • the first fiber optic adapter 808 launches to the outside of the optical module.
  • the external optical signal is sequentially coupled into the first silicon optical chip 801 through the second optical fiber adapter 809 and the second optical fiber 807.
  • the external optical signal is coherently mixed with the local oscillator light of the receiving end, and the converted photocurrent signal is amplified. , and then further amplified by the first transimpedance amplifier 803 and transmitted to the DSP chip 2061 .
  • the circuit board 206 provides the data signal from the host computer to the first silicon optical chip 801.
  • the first silicon optical chip 801 modulates the data signal into light.
  • the optical signal from the outside passes through the first
  • the silicon photonic chip 801 is demodulated into an electrical signal, it is output to the host computer through the circuit board 206 .
  • the light emitted by the first laser box 804 is coupled into the first silicon photonic chip 801 and then split. Part of it is used as the transmitting end light source and part is used as the receiving end local oscillator light.
  • the first laser box 804 provides the first silicon photonic chip 801 with The light is light with a single wavelength and stable power, and does not carry data.
  • the light is modulated by the first silicon optical chip 801 to load data into the light; the first silicon optical chip 801 is equipped with an IQ modulator inside.
  • the IQ modulator has certain requirements on the amplitude of the received electrical signal. Therefore, the first drive modulator 802 processes the electrical signal transmitted from the DSP chip 301d and increases the amplitude of the electrical signal so that it meets the IQ modulator requirements. ; Then, the electrical signal is loaded onto the transmitting end light source through the IQ modulator to generate a transmitted optical signal carrying information, and then the transmitted optical signal is sequentially transmitted to the outside of the optical module through the first optical fiber 806 and the first optical fiber adapter 808.
  • the external optical signal is sequentially coupled into the first silicon optical chip 801 through the second optical fiber adapter 809 and the second optical fiber 807, coherently mixed with the local oscillator light of the receiving end, and is received by the photodetector in the first silicon optical chip 801.
  • the converted photocurrent signal is further amplified by the first transimpedance amplifier 803 and transmitted to the DSP chip 2061 .
  • the first silicon photonic chip 801 and the circuit board 206 are connected through wire bonding, and the second silicon photonic chip 901 and the circuit board 206 are also connected through wire bonding.
  • the first silicon photonic chip 801 is provided with high-frequency signal pads and low-frequency signal pads on the side close to the circuit board 206.
  • the high-frequency signal pads and low-frequency signal pads are wired to the surface of the circuit board 206, thereby realizing the circuit board 206.
  • the second silicon photonic chip 901 is provided with high-frequency signal pads and low-frequency signal pads on the side close to the circuit board 206.
  • the high-frequency signal pads and low-frequency signal pads are wired to the surface of the circuit board 206, thereby achieving Transmission of high-frequency signals and low-frequency signals between the circuit board 206 and the second silicon photonic chip 901.
  • the length of the wiring between the first silicon photonic chip 801 and the circuit board 206 is short, it is beneficial to the integrity of high-frequency signal and low-frequency signal transmission. Therefore, the surfaces of the first silicon photonic chip 801 and the circuit board 206 are flush with each other. Ground, the second silicon photonic chip 901 is flush with the surface of the circuit board 206 .
  • first silicon photonic chip 801 is disposed on the surface of the first base 810 and the second silicon photonic chip 901 is disposed on the surface of the second base 910, if the first base 810 and the second base 910 are disposed on the surface of the circuit board 206, then There is a height difference between the first silicon photonic chip 801 and the surface of the circuit board 206. Similarly, there is a height difference between the second silicon photonic chip 901 and the surface of the circuit board 206. Therefore, a gap 2062 is formed in a local area of the surface of the circuit board 206 to form a gap.
  • the first base 810 and the second base 910 are embedded in the gap 2062, so that the first base 810 and the second base 910 sink relative to the surface of the circuit board 206 until the first silicon photonic chip 801 is flush with the surface of the circuit board 206. Similarly, the second silicon photonic chip 901 is flush with the surface of the circuit board 206 .
  • FIG. 32 is a schematic cross-sectional view of a circuit board and a first single-carrier coherent component and a second single-carrier coherent component according to some embodiments of the present disclosure
  • FIG. 33 is a schematic structural diagram of a base provided according to some embodiments of the present disclosure. As shown in Figures 32 and 33, a first support protrusion 814 is formed between two adjacent side walls of the first base 810, and a second support protrusion 815 is formed between two adjacent side walls.
  • the second base 910 is provided with a third support protrusion 914 on two adjacent side walls, and a fourth support protrusion 915 is formed between the two adjacent side walls.
  • the first support protrusion 814 and the third support protrusion 914 are arranged adjacently, and the second support protrusion 815 and the fourth support protrusion 915 are arranged adjacently; the first support protrusion 814 and the second support protrusion 815 are arranged oppositely, The third support protrusion 914 and the fourth support protrusion 915 are arranged opposite to each other.
  • the top surface of the area surrounded by the first support protrusion 814 , the second support protrusion 815 , the third support protrusion 914 and the fourth support protrusion 915 is connected with the bottom surface at the notch 2062 to realize the first base 810
  • the second base 910 sinks relative to the surface of the circuit board 206 until the first silicon photonic chip 801 is flush with the surface of the circuit board 206.
  • the second silicon photonic chip 901 is flush with the surface of the circuit board 206.
  • the side walls of the first base 810 and the side walls of the second base 910 are connected to form a connection area between the first base 810 and the second base 910.
  • the protrusion 914 and the fourth support protrusion 915 are provided in the non-connected area between the first base 810 and the second base 910, so that the first base 810 and the second base 910 can be as close as possible and the gap between them can be minimized. This reduces the space occupied on the circuit board 206 .
  • the first support protrusion 814, the second support protrusion 815, the third support protrusion 914, and the fourth support protrusion 915 are used to support the circuit board 206; the notch 2062 is embedded in the first support protrusion 814, the second support protrusion 814, and the fourth support protrusion 915. On the surface of the protrusion 815, the third support protrusion 914, and the fourth support protrusion 915, the notch 2062 is connected to the first support protrusion 814, the second support protrusion 815, the third support protrusion 914, and the fourth support protrusion 915 respectively. , to realize the connection between the circuit board 206 and the first base 810 or the second base 910 .
  • first support protrusion 814 , the second support protrusion 815 , the third support protrusion 914 and the fourth support protrusion 915 support the bottom surface of the circuit board 206 , especially the bottom surface at the notch 2062 .
  • first base 810 and the second base 910 need to sink relative to the surface of the circuit board 206, sink until the first silicon photonic chip 801 is flush with the surface of the circuit board 206.
  • the second silicon photonic chip 901 and the circuit board 206 The surfaces are flush, so the height of the surfaces of the first support protrusion 814 and the second support protrusion 815 is lower than the top surface of the first base 810, and the height of the surfaces of the third support protrusion 914 and the fourth support protrusion 915 is lower than that of the top surface of the first base 810. The height is lower relative to the top surface of the second base 910 .
  • the height from the surface of the first support protrusion 814 and the second support protrusion 815 to the surface of the first silicon photonic chip 801 can be the thickness of the circuit board 206, and the height from the surface of the third support protrusion 914 and the fourth support protrusion 915 is The height to the surface of the second silicon photonic chip 901 can be the thickness of the circuit board 206, so as to embed the notch 2062 of the circuit board 206 into the first support protrusion 814, the second support protrusion 815, and the third support protrusion.
  • the first silicon photonic chip 801 can be flush with the surface of the circuit board 206.
  • the second silicon photonic chip 901 can be flush with the surface of the circuit board 206.
  • “Top surface” and "bottom surface” mean that in Figure 33, the upper surface is the top surface and the lower surface is the bottom surface.
  • Both the first base 810 and the second base 910 are lower relative to the top surface of the circuit board 206, so that the first silicon photonic chip 801 is flush with the surface of the circuit board 206.
  • the second silicon photonic chip 901 is flush with the circuit board 206.
  • 206 surface is flush; the bottom surface of the notch 2062 is respectively provided on the surface of the first support protrusion 814, the second support protrusion 815, the third support protrusion 914, and the fourth support protrusion 915 to realize the circuit board 206, The connection between the first base 810 and the second base 910.
  • the bottom surface at the notch 2062 is connected to the top surfaces of the first support protrusion 814, the second support protrusion 815, the third support protrusion 914, and the fourth support protrusion 915; for example, the bottom surface at the notch 2062
  • the top surfaces of the first support protrusion 814 , the second support protrusion 815 , the third support protrusion 914 and the fourth support protrusion 915 may be bonded with glue.
  • the first base 810 includes a first silicon photonic chip setting area 811, a first optical fiber connector setting area 812, and a first laser box receiving cavity 813.
  • the first laser box containing cavity 813 is formed by the top surface of the first base 810 being recessed downward.
  • the first laser box containing cavity 813 is relative to the first silicon photonic chip setting area 811,
  • the surface of the first optical fiber connector setting area 812 is sunk deeper.
  • the first silicon photonic chip setting area 811 and the first optical fiber connector setting area 812 are arranged perpendicularly to each other, and the first optical fiber connector setting area 812a and the first laser box receiving cavity 813 are arranged parallel to each other.
  • the second base 910 includes a second silicon photonic chip setting area 911, a second fiber connector setting area 912, and a second laser box receiving cavity 913.
  • the second laser box containing cavity 913 is formed by the top surface of the second base 910 being recessed downward.
  • the second laser box containing cavity 913 is sunk deeper relative to the surfaces of the second silicon photonic chip setting area 911 and the second fiber connector setting area 912 .
  • the second silicon photonic chip setting area 911 and the second optical fiber connector setting area 912 are arranged perpendicularly to each other, and the second optical fiber connector setting area 912 and the second laser box receiving cavity 913 are arranged parallel to each other.
  • the first silicon photonic chip setting area 811 is used to set the first silicon photonic chip 801, and the first driving modulator 802 and the first transimpedance amplifier 803 are respectively provided on the surface of the first silicon photonic chip 801. ;
  • the first driving modulator 802 and the first transimpedance amplifier 803 are flip-chip mounted on the surface of the first silicon photonic chip 801, thereby avoiding the passage between the first silicon photonic chip 801 and the first driving modulator 802.
  • the electrical connection is realized through wire bonding.
  • electrical connection between the first silicon photonic chip 801 and the first transimpedance amplifier 803 can be avoided.
  • the flip chip method can directly realize the electrical connection between the first silicon photonic chip 801 and the first driver.
  • the modulators 802 are electrically connected through opposing bonding pads.
  • the first silicon photonic chip 801 and the first transimpedance amplifier 803 can be electrically connected through opposing bonding pads directly.
  • the first optical fiber connector setting area 812 is used to set the first optical fiber connector 805; the first optical fiber connector 805 is used for the first optical fiber 806 and the second optical fiber 807 to pass through, thereby fixing the first optical fiber 806 and the second optical fiber 807;
  • the optical fiber connector 805 includes a first substrate and a second substrate. The first substrate and the second substrate are stacked. The first optical fiber 806 and the second optical fiber 807 are passed between the first substrate and the second substrate; the second substrate is provided with Each optical fiber channel is set in the form of a V-shaped groove, and the first optical fiber 806 and the second optical fiber 807 are arranged in the V-shaped groove; the V-shaped groove is conducive to better positioning of each optical fiber.
  • the first laser box accommodating cavity 813 can be provided with the first laser box 804. Since the first laser box 804 has a built-in laser chip and a TEC is provided below the laser chip, the laser chip is positioned relatively high relative to the first silicon photonic chip 801. Therefore, in order to Make the optical axis of the laser chip and the optical axis of the first silicon optical chip 801 be on the same straight line; for example, the first laser box accommodation cavity 813 is set to be recessed so that the first laser box 804 sinks, thereby realizing laser The optical axis of the chip is on the same straight line as the optical axis of the first silicon optical chip 801, which increases the optical coupling efficiency between the first laser box 804 and the first silicon optical chip 801.
  • the arrangement between the first base 810 and the second base 910 can not only carry each device in the first single-carrier coherent component 800 and the second single-carrier coherent component 900 respectively, but also can sink To the bottom of the notch 2062, the first silicon photonic chip 801 is flush with the circuit board 206, and the second silicon photonic chip 901 is flush with the circuit board 206. The two can also be brought as close as possible to reduce the occupied space.
  • the first laser box 804 and the second laser box 904 are respectively used to provide light that does not carry data to the first silicon photonic chip 801 and the second silicon photonic chip 901; the first laser box 804, The composition of the second laser box 904 is the same; taking the first laser box 804 as an example, the structure of the laser box will be described.
  • Figure 34 is a structural diagram of a third laser box provided according to some embodiments of the present disclosure.
  • the first laser box 804 includes a first cover 8041 and a first cavity 8042; the first cover 8041 and the first cavity 8042 are connected together and form a certain space; the first cavity 8042 There is an accommodation cavity 80422 in the middle, and the two opposite ends are respectively provided with openings 80421 and bosses 80423; the surface of the boss 80423 protrudes relative to the surface of the accommodation cavity 80422, and the surface of the boss 80423 is relative to the surface of the accommodation cavity 80422. higher.
  • An adapter circuit board 8049b is provided on the surface of the boss 80423, and a light window 8049a is provided in the opening 80421.
  • the light window 8049a and the first silicon photonic chip 801 are coupled and connected through optical matching glue.
  • the light emitted by the first laser box 804 passes through the light window 8049a and is coupled into the first silicon optical chip 901a.
  • the accommodation cavity 80422 is provided with a TEC8043 and a carrier plate 8045.
  • the surface of the TEC8043 is provided with a laser chip 8044 and a collimating lens 8046.
  • the surface of the carrier plate 8045 is provided with an isolator 8047 and a converging lens 8048.
  • TEC8043 is used as a key temperature control element to control the wavelength of the laser chip 9044a, and a high-precision temperature sensor is used to detect the temperature of the laser chip 8044.
  • the isolator 8047 is used to prevent the light emitted by the laser chip 8044 from returning to the laser chip 8044 after being emitted, so the isolator 8047 is set in the light emitting direction of the laser chip 8044; the isolator 8047 is set on the side of the collimating lens 8046 facing away from the laser chip 8044. direction, that is, a collimating lens 8046 is provided between the isolator 8047 and the laser chip 8044.
  • the carrier plate 8045 is used to raise the height of the isolator 8047 and the convergence lens 8048 so that the optical axes of the isolator 8047 and the convergence lens 8048, the optical axis of the laser chip 8044, and the optical axis of the collimator lens 8046 are on the same straight line.
  • the collimating lens 8046 is used to convert the divergent light emitted by the laser chip 8044 into parallel light
  • the converging lens 8048 is used to convert the parallel light into convergent light, thereby passing through the light window 8049a in a converged state and coupling into the first silicon optical chip 801 .
  • the adapter circuit board 8049b is partially located inside the first cavity 8042 and part is located outside the first cavity 8042; one end of the adapter circuit board 8049b located outside the first cavity 8042 is electrically connected to the circuit board 206 through wiring or a flexible circuit board. connection, thereby transmitting the driving electrical signal from the circuit board 206 to the first cavity 8042, that is, to the laser chip 8044.
  • the laser chip 8044 emits light under the action of the driving electrical signal.
  • a spectrometer, an optical etalon, a first backlight detector and a second backlight detector can be provided in the first laser box 804; in some embodiments, through spectrometry
  • the device separates a small part of the light emitted by the first laser box 804. This small part of the light continues to be divided into two beams of light through the spectrometer. One beam of light enters the first backlight detector, and the other beam of light passes through the optical etalon, the second backlight detector; the optical power detected by the first backlight detector is the first optical power P1, and the optical power detected by the second backlight detector is the second optical power P2.
  • the first The laser box 804 has a set wavelength
  • the set wavelength is a wavelength that meets the wavelength requirements of the coherent light source; when the wavelength changes, the ratio of the first optical power P1 to the second optical power P2 changes, therefore, the first optical power P1 and the second optical power P2 change.
  • the ratio of the second optical power P2 can represent the optical power change rate caused by the change in wavelength.
  • the changed wavelength can be obtained, and then according to the set wavelength and change
  • the relationship between the last wavelength is used as the control variable of the TEC of the laser to form a closed-loop control.
  • the wavelength of the light emitted by the laser chip can be adjusted to the set wavelength, achieving precise control of the wavelength.
  • the opening of the first cavity 8042 can face the optical module upper housing 201.
  • a thermal pad is provided between the DSP chip 2061 and the optical module upper housing 201; in order to conduct the first single carrier coherent component 800 , the heat generated by the second single-carrier coherent component 900 is conducted out.
  • Thermal conductive pads are respectively provided between the first base 810, the second base 910 and the optical module lower housing 202. The thermal conductive pads are connected to the optical module upper housing. The contact between the thermal pad and the lower housing of the optical module can better dissipate heat to the outside of the optical module through the upper housing of the optical module.
  • a notch 2062 is provided on the surface of the circuit board 206, and the first single carrier coherent component 800 and the second single carrier coherent component 900 are embedded in the notch 2062.
  • the first single carrier coherent component 800 and the second single carrier coherent component 900 are embedded in the notch 2062.
  • the component 800 achieves a single carrier 800Gb/s transmission rate
  • the second single carrier coherent component 900 achieves a single carrier 800Gb/s transmission rate, thereby increasing the transmission rate of the optical module.

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Abstract

提供一种光模块（200），包括电路板（206）、至少一个载波相干组件，载波相干组件包括U形槽盖壳、U形槽基板以及载波组件，U形槽盖壳表面形成有第一U形槽，第一U形槽被配置为避让连接板，并使硅光芯片光波导暴露出来；U形槽基板表面形成有第二U形槽，第二U形槽被配置为抬高硅光芯片所在高度，并进行电信号的转接；载波组件包括激光盒、硅光芯片、光纤接头、连接板、第一电芯片以及第二电芯片；U形槽基板与电路板（206）电连接，硅光芯片与U形槽基板电连接，进而电路板（206）与硅光芯片之间传输信号通过双U形槽基板进行转接；通过载波相干组件的各种布局形式，从而将载波相干组件集成于光模块（200）内部，以提高光模块（200）传输速率。

Description

光模块
本申请要求在2022年9月14日提交中国专利局、申请号为202211114726.9的优先权；在2022年9月14日提交中国专利局、申请号为202222442111.0的优先权；在2022年9月14日提交中国专利局、申请号为202211114847.3的优先权；在2022年9月14日提交中国专利局、申请号为202222442112.5的优先权；在2022年9月14日提交中国专利局、申请号为202211114725.4的优先权；其全部内容通过引用结合在本申请中。
技术领域
本公开涉及通信技术领域，尤其涉及一种光模块。
背景技术
随着云计算、移动互联网、视频等新型业务和应用模式的发展，光通信技术的进步变的愈加重要。在光通信技术中，光模块作为光通信设备中的关键器件之一，可以实现光电信号转换。随着光通信技术的发展，要求光模块的数据传输速率不断提高。
发明内容
根据本公开一些实施例提供的光模块，包括：电路板、至少一个载波相干组件；其中，载波相干载波相干组件包括U形槽盖壳、U形槽基板以及载波组件；U形槽盖壳侧面形成有限位凸起，表面形成有第一U形槽，第一U形槽被配置为避让连接板，以及使硅光芯片光波导暴露出来；U形槽基板侧面形成有限位凹槽，限位凹槽与限位凸起连接；U形槽基板表面形成有第二U形槽，U形槽基板被配置为抬高硅光芯片的高度，以及进行电信号的转接；载波组件包括激光盒、硅光芯片、光纤接头、连接板、第一电芯片以及第二电芯片；激光盒与硅光芯片连接，激光盒被配置为向硅光芯片内部输入不携带信号的光；硅光芯片设置于第二U形槽表面，硅光芯片边缘与第二U形槽边缘不对齐，硅光芯片侧面设有光口，硅光芯片被配置为进行光信号的调制或借条；光纤接头设于电路板表面，其一端伸入第二U形槽内，光纤接头内部设有光纤，光纤端面与光口端面耦合连接；连接板跨接于硅光芯片与光纤接头之间；第一电芯片与硅光芯片电连接，第二电芯片与硅光芯片电连接；其中至少一个载波相干组件包括双载波相干组件，在双载波相干组件中，U形槽盖壳包括双U形槽盖壳，双U形槽盖壳表面形成有两个第一U形槽，双U形槽盖壳侧面形成有限位凸起；U形槽基板包括双U形槽基板，双U形槽基板表面形成有两个第二U形槽，双U形槽基板侧面形成有限位凹槽；至少一个载波组件包括第一载波组件和第二载波组件。
附图说明
为了更清楚地说明本公开中的技术方案，下面对本公开一些实施例中需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例的附图，对于本领域普通技术人员来讲，还可以根据这些附图获得其他的附图。此外，以下描述中的附图可以视作示意图，并非对本公开实施例所涉及的产品的实际尺寸、方法的实际流程、信号的实际时序等的限制。
图1为根据本公开一些实施例提供的一种光通信系统局部架构图；
图2为根据本公开一些实施例提供的一种上位机的局部结构图；
图3为根据本公开一些实施例提供的一种光模块的结构图；
图4为根据本公开一些实施例提供的一种光模块的分解图；
图5为根据本公开一些实施例提供的一种光模块的相干原理示意图；
图6为根据本公开一些实施例提供的一种双载波相干组件的结构图；
图7为根据本公开一些实施例提供的一种双载波相干组件的分解图；
图8为根据本公开一些实施例提供的一种载波组件的结构图；
图9为根据本公开一些实施例提供的一种双载波相干组件的剖面图一；
图10为根据本公开一些实施例提供的一种双载波相干组件的剖面图二；
图11为根据本公开一些实施例提供的一种双载波相干组件的剖面图三；
图12为根据本公开一些实施例提供的一种双U形槽盖壳和双U形槽基板装配关系剖面图；
图13为根据本公开一些实施例提供的一种双U形槽盖壳的结构图；
图14为根据本公开一些实施例提供的第一种激光盒的结构图一；
图15为根据本公开一些实施例提供的第一种激光盒的结构图二；
图16为根据本公开一些实施例提供的第二种激光盒的结构图；
图17为根据本公开一些实施例提供的第一双载波相干组件和第二双载波相干组件示意图；
图18为根据本公开一些实施例提供的第一双载波相干组件和第二双载波相干组件内部图；
图19为根据本公开一些实施例提供的第一双载波相干组件和第二双载波相干组件剖面图一；
图20为根据本公开一些实施例提供的第一双载波相干组件和第二双载波相干组件侧视图；
图21为根据本公开一些实施例提供的第一双载波相干组件和第二双载波相干组件剖面图二；
图22为根据本公开一些实施例提供的第一单载波相干组件和第二单载波相干组件示意图；
图23为根据本公开一些实施例提供的第一单载波相干组件和第二单载波相干组件内部图；
图24为根据本公开一些实施例提供的第一单载波相干组件局部结构示意图；
图25为根据本公开一些实施例提供的第一单载波相干组件局部内部结构示意图；
图26为根据本公开一些实施例提供的第一单载波相干组件和第二单载波相干组件剖面图；
图27为根据本公开一些实施例提供的另一种光模块结构分解图；
图28为根据本公开一些实施例提供的一种电路板下表面结构示意图；
图29为根据本公开一些实施例提供的一种电路板与载波相干组件分离示意图；
图30为根据本公开一些实施例提供的另一种第一单载波相干组件和第二单载波相干组件结构图；
图31为根据本公开一些实施例提供的另一种第一单载波相干组件和第二单载波相干组件剖面图；
图32为根据本公开一些实施例提供的一种电路板与第一单载波相干组件和第二单载波相干组件分离剖面示意图；
图33为根据本公开一些实施例提供的一种底座结构示意图；
图34为根据本公开一些实施例提供的第三种激光盒的结构图。
具体实施方式
光通信技术在信息处理设备之间建立信息传递，光通信技术将信息加载到光上，利用光的传播实现信息的传递，加载有信息的光就是光信号。光信号在信息传输设备中传播，可以减少光功率的损耗，实现高速度、远距离、低成本的信息传递。信息处理设备能够处理的信息以电信号的形态存在，光网络终端/网关、路由器、交换机、手机、计算机、服务器、平板电脑、电视机是常见的信息处理设备，光纤及光波导是常见的信息传输设备。
信息处理设备与信息传输设备之间可以通过光模块实现光信号与电信号的相互转换。例如，在光模块的光信号输入端和/或光信号输出端连接有光纤，在光模块的电信号输入端和/或电信号输出端连接有光网络终端。来自光纤的第一光信号传输进光模块，光模块将该第一光信号转换为第一电信号，光模块将第一电信号传输进光网络终端。来自光网络终端的第二电信号传输进光模块，光模块将该第二电信号转换为第二光信号，光模块将第二光信号传输进光纤。由于信息处理设备之间可以通过电信号网络相互连接，所以至少需要一类信息处理设备直接与光模块连接，并不需要所有类型的信息处理设备均直接与光模块连接，直接连接光模块的信息处理设备被称为光模块的上位机。
图1为根据本公开一些实施例提供的一种光通信系统局部架构图。如图1所示，光通信系统的局部呈现为远端信息处理设备1000、本地信息处理设备2000、上位机100、光模块200、光纤101以及网线103。
光纤101的一端向远端信息处理设备1000方向延伸，另一端接入光模块200的光接口。光信号可以在光纤101中发生全反射，光信号在全反射方向上的传播几乎可以维持原有光功率，光信号在光纤101中发生多次的全反射，将来自远端信息处理设备1000方向的光信号传输进光模块200中，或将来自光模块200的光向远端信息处理设备1000方向传播，实现远距离、功率损耗低的信息传递。
光纤101的数量可以是一根，也可以是多根(两根及以上)；光纤101与光模块200采用可插拔式的活动连接，也可采用固定连接。
上位机100具有光模块接口102，光模块接口102被配置为接入光模块200，从而使得上位机100与光模块200建立单向/双向的电信号连接；上位机100被配置为向光模块200提供数据信号，或从光模块200接收数据信号，或对光模块200的工作状态进行监测、控制。
上位机100具有对外电接口，如通用串行总线接口(Universal Serial Bus，USB)、网线接口104，对外电接口可以接入电信号网络。示例地，网线接口104被配置为接入网线103，从而使得上位机100与网线103建立单向/双向的电信号连接。
光网络终端(Optical Network Unit，ONU)、光线路终端(Optical Line Terminal，OLT)、光网络设备(Optical Network Terminal，ONT)及数据中心服务器为常见的上位机。
网线103的一端连接本地信息处理设备2000，另一端连接上位机100，网线103在本地信息处理设备2000与上位机100之间建立电信号连接。
示例地，本地信息处理设备2000发出的第三电信号通过网线103传入上位机100，上位机100基于第三电信号生成第二电信号，来自上位机100的第二电信号传输进光模块200，光模块200将第二电信号转换为第二光信号，光模块200将第二光信号传输进光纤101，第二光信号在光纤101中传向远端信息处理设备1000。
示例地，来自远端信息处理设备1000方向的第一光信号通过光纤101传播，来自光纤101的第一光信号传输进光模块200，光模块200将第一光信号转换为第一电信号，光模块200将第一电信号传输进上位机100，上位机100基于第一电信号生成第四电信号，上位机100将第四电信号传入本地信息处理设备2000。
光模块是实现光信号与电信号相互转换的工具，在上述光信号与电信号的转换过程中，信息并未发生变化，信息的编解码方式可以发生变化。
图2为根据本公开一些实施例提供的一种上位机的局部结构图。为了清楚地显示光模块200与上位机100的连接关系，图2仅示出了上位机100与光模块200相关的结构。如图2所示，上位机100还包括设置于壳体内的PCB电路板105、设置在PCB电路板105的表面的笼子106、设置于笼子106上的散热器107、以及设置于笼子106内部的电连接器(图中未示出)，散热器107具有增大散热面积的凸起结构，翅片状结构是常见的凸起结构。
光模块200插入上位机100的笼子106中，由笼子106固定光模块200，光模块200产生的热量传导给笼子106，然后通过散热器107进行扩散。光模块200插入笼子106中后，光模块200的电接口与笼子106内部的电连接器连接。
图3为根据本公开一些实施例提供的一种光模块的结构图；图4为根据本公开一些实施例提供的一种光模块的分解图。如图3和图4所示，光模块200包括壳体、设置于壳体内的电路板206、至少一个载波相干组件。
壳体包括上壳体201和下壳体202，上壳体201盖合在下壳体202上，以形成具有两个开口204和205的上述壳体；壳体的外轮廓一般呈现方形体。
在一些实施例中，下壳体202包括底板2021以及位于底板2021两侧、与底板2021垂直设置的两个下侧板2022；上壳体201包括盖板2011，盖板2011盖合在下壳体202的两个下侧板2022上，以形成上述壳体。
在一些实施例中，下壳体202包括底板2021以及位于底板2021两侧、与底板2021垂直设置的两个下侧板2022；上壳体201包括盖板2011，以及位于盖板2011两侧、与盖板2011垂直设置的两个上侧板，由两个上侧板与两个下侧板2022结合，以实现上壳体201盖合在下壳体202上。
两个开口204和205的连线所在方向可以与光模块200的长度方向一致，也可以与光模块200的长度方向不一致。例如，开口204位于光模块200的端部(图3的右端)，开口205也位于光模块200的端部(图3的左端)。或者，开口204位于光模块200的端部，而开口205则位于光模块200的侧部。开口204为电接口，电路板206的金手指从电接口伸出，插入上位机的电连接器中；开口205为光口，被配置为接入光纤101，以使光纤101连 接光模块200中的光发射装置和/或光接收装置。
采用上壳体201、下壳体202结合的装配方式，便于将电路板206、光发射部件、光接收部件等安装到上述壳体中，由上壳体201、下壳体202可以对这些组件形状封装保护。此外，在装配电路板206、载波相干组件等组件时，便于这些器件的定位部件、散热部件以及电磁屏蔽部件的部署，有利于自动化地实施生产。
在一些实施例中，上壳体201及下壳体202采用金属材料制成，利于实现电磁屏蔽以及散热。
在一些实施例中，光模块200还包括位于其壳体外部的解锁部件203。解锁部件203被配置为实现光模块200与上位机之间的固定连接，或解除光模块200与上位机之间的固定连接。
例如，解锁部件203位于下壳体202的两个下侧板2022的外侧，包括与上位机的笼子106匹配的卡合部件。当光模块200插入笼子106里时，由解锁部件203的卡合部件将光模块200固定在笼子106里；拉动解锁部件203时，解锁部件203的卡合部件随之移动，进而改变卡合部件与上位机的连接关系，以解除光模块200与上位机的卡合固定连接，从而可以将光模块200从笼子106里抽出。
电路板206包括电路走线、电子元件及芯片等，通过电路走线将电子元件和芯片按照电路设计连接在一起，以实现供电、电信号传输及接地等功能。电子元件例如可以包括电容、电阻、三极管、金属氧化物半导体场效应管(Metal-Oxide-Semiconductor Field-Effect Transistor，MOSFET)。芯片例如可以包括微控制单元(Microcontroller Unit，MCU)、激光驱动芯片、跨阻放大器(Transimpedance Amplifier，TIA)、限幅放大器(Limiting Amplifier，LIA)、时钟数据恢复芯片(Clock and Data Recovery，CDR)、电源管理芯片、数字信号处理(Digital Signal Processing，DSP)芯片。
电路板206一般为硬性电路板，硬性电路板由于其相对坚硬的材质，还可以实现承载作用，如硬性电路板可以平稳的承载上述电子元件和芯片；硬性电路板还便于插入上位机笼子中的电连接器中。
电路板206还包括形成在其端部表面的金手指，金手指由独立的多个引脚组成。电路板206插入笼子106中，由金手指与笼子106内的电连接器导通。金手指可以仅设置在电路板206一侧的表面(例如图4所示的上表面)，也可以设置在电路板206上下两侧的表面，以提供更多的引脚。金手指被配置为与上位机建立电连接，以实现供电、接地、I2C信号传递、数据信号传递等。
部分光模块中也会使用柔性电路板，柔性电路板一般与硬性电路板配合使用，以作为硬性电路板的补充。
电路板206的表面设置有至少一个载波相干组件。载波相干组件包括载波组件、U形槽盖壳以及U形槽基板。其中，载波组件包括硅光芯片、激光盒、光纤接头、连接板、第一电芯片和第二电芯片。U形槽盖壳表面形成有第一U形槽，第一U形槽被配置为避让连接板，并使硅光芯片的光波导暴露出来。U形槽基板表面形成有第二U形槽，U形槽基板与电路板电连接，硅光芯片与U形槽基板电连接，因此通过U形槽基板能够实现电路板和硅光芯片之间电信号的转接，而且U形槽基板还可以抬高硅光芯片所在的高度。
在一些实施例中，载波相干组件的结构形式可以为双载波相干组件，也可以为单载波相干组件。双载波相干组件内部集成两个800G硅光芯片，通过硅光芯片可以实现光信号的调制或解调，从而实现光信号的发射或接收。单载波相干组件内部集成有一个800G硅光芯片。
电路板206的表面设有DSP芯片2061，在发射端，DSP芯片2061将上位机发出的16路PAM-4电信号转换为四路发射端PAM-4电信号，硅光芯片将接收到的四路PAM-4电信号调制至发射端光源，从而生成发射光信号。在接收端，接收端本振光与外部光信号进行相干混频，经相干混合后，输出的光电流大幅增加；经过跨阻放大器进一步放大后，四路PAM-4电信号输送至DSP芯片2061。
在一些实施例中，载波相干组件的结构形式不同时，U形槽盖壳以及U形槽基板的结构也会不同。示例性地，在载波相干组件为双载波相干组件时，U形槽盖壳为双U形槽盖壳，U形槽基板为双U形槽基板；在载波相干组件为单载波相干组件时，U形槽盖壳为单U形槽盖壳，U形槽基板为单U形槽基板。
在一些实施例中，在至少一个载波相干组件的结构形式为双载波相干组件时，至少一个载波相干组件包括的双载波相干组件的数量可以为一个，也可以两个，还可以为更多个。至少一个载波相干组件的结构形式为单载波相干组件时，至少一个载波相干组件包括的单载波相干组件的数量可以为一个，也可以两个，还可以为更多个。
本公开实施例提供的光模块中，激光盒与硅光芯片之间可以通过多种连接方式连接。例如，在一些实施例中，激光盒与硅光芯片之间可以通过光纤连接。在另一些实施例中，激光盒与硅光芯片之间不通过光纤连接，而是通过激光盒的光窗与硅光芯片耦合连接。
本公开实施例提供的光模块中，硅光芯片与电路板之间可以通过多种方式传输电信号。例如，在一些实施例中，硅光芯片与电路板通过U形槽基板实现电信号的传输。在另一些实施例中，硅光芯片与电路板直接打线连接，从而实现电信号的传输。
图5为根据本公开一些实施例提供的一种光模块的相干原理示意图。如图5所示，由于硅光芯片中的的硅材料不是理想的激光芯片发光材料，不能在硅光芯片制作过程集成发光单元，所以硅光芯片需要由外部光源提供光。示例性地，采用激光盒作为外部光源，为硅光芯片提供光。激光盒射出的光耦合至硅光芯片内后，经硅光芯片内置的分光器进行分光，一束光作为发射端的光源，该束光称为发射端光源；另一束光作为接收端的本振光，该束光称为接收端本振光。
发射端光源被耦合至硅光芯片后，通过硅光芯片内置的偏振分束器被分成两个偏振方向垂直的光信号，也就是TE偏振光、TM偏振光。然后TE偏振光、TM偏振光分别进入第一IQ调制器和第二IQ调制器，第一IQ调制器对TE偏振光进行高阶调制，第二IQ调制器对TM偏振光进行高阶调制，调制好的偏振光信号通过偏振合束器，合并生成发射光信号，从而发射出去。
接收端本振光被耦合至硅光芯片后，通过偏振分束器被分成两个偏振方向垂直的光，即TE偏振光、TM偏振光。外部光信号耦合至硅光芯片后，同样经偏振分束器被分成两个偏振方向垂直的光信号，即TE偏振光、TM偏振光。接收端本振光的TE偏振光与外部光信号的TE偏振光在光混频器中进行混频放大，得到第一混频光。接收端本振光的TM偏振光与外部光信号的TM偏振光在光混频器中进行混频放大，得到第二混频光。第一混频光和第二混频光均为放大光信号，通过相干检测接收，第一混频光和第二混频光转换成相应地电信号，通过数字信号处理，去除色散、噪声、非线性等干扰因素后，还原得到电信号码流。示例性地，光混频器为90°光混频器。
在一些实施例中，上述至少一个载波相干组件包括双载波相干组件，图6为根据本公开一些实施例提供的一种双载波相干组件的结构图；图7为根据本公开一些实施例提供的一种双载波相干组件的分解图。如图6和图7所示，电路板206表面设有双载波相干组件300，双载波相干组件300包括双U形槽盖壳310、双U形槽基板320、第一载波组件330和第二载波组件340。如图7所示，第一载波组件330的部分结构和第二载波组件340的部分结构设于双U形槽盖壳310、双U形槽基板320组成的腔体内。第一载波组件330的部分结构和第二载波组件340的部分结构设于双U形槽盖壳310、双U形槽基板320组成的腔体外。示例性地，双U形槽盖壳310和双U形槽基板320扣合连接。
在本公开的一些实施例中，双载波相干组件300集成两个800G硅光芯片，双载波相干组件中的第一载波组 件330和第二载波组件340分别实现单载波800Gb/s，进而实现1.6Tb/s传输速率。
在本公开的一些实施例中，双载波相干组件300可以做成一个整体，实现其模块化，便于与电路板的连接，且便于应用于其他结构上，如上位机中。
双U形槽盖壳310侧壁分别形成其第一U形槽311和第二U形槽312；双U形槽盖壳310与光模块的上壳体201连接，起到散热作用；第一载波组件330及第二载波组件340在工作时产生一定热量，双U形槽盖壳310通过与光模块的上壳体201连接，可将产生的热量通过光模块的上壳体201散发出去；进一步，双U形槽盖壳310还起到保护作用，进而保护第一载波组件330及第二载波组件340。
双U形槽基板320侧壁形成有第一U形槽321和第二U形槽322；双U形槽基板320设于电路板206的表面，双U形槽基板320起到承托作用；第一载波组件330及第二载波组件340设于双U形槽基板320的上表面，也就是，双U形槽基板320的上表面承载着第一载波组件330及第二载波组件340；双U形槽基板320的底表面植有焊球，如BGA焊球，通过焊球与电路板206实现电连接；示例性地，双U形槽基板320的背面植有焊球，然后通过SMT工艺将双U形槽基板320连同第一载波组件330及第二载波组件340组装到电路板206上，实现双载波相干组件300与电路板206的电连接，进而电路板206向硅光芯片提供来自上位机的数据信号，由硅光芯片将数据信号调制到光中，来自外部的光信号经硅光芯片解调成电信号后，通过电路板206输出至上位机中。
双U形槽基板320的底表面设有焊球，顶表面设有焊盘，其中，焊球可以实现双U形槽基板320与电路板206的电连接，焊盘可以实现双U形槽基板320与表面各芯片之间的电连接。
图8为根据本公开一些实施例提供的一种载波组件的结构图。如图8所示，第一载波组件330包括：第一硅光芯片331、第一电芯片、第二电芯片、光纤接头334、第一激光盒338及光纤。示例性，第一电芯片可以为驱动调制器，第二电芯片可以为跨阻放大器；第一电芯片设于双U形槽基板朝向双U形槽盖壳的一侧表面，且第一电芯片设于第一硅光芯片的侧面；第二电芯片设于双U形槽基板朝向双U形槽盖壳的一侧表面，且第二电芯片设于第一硅光芯片的侧面。
第一电芯片和第二电芯片分别设于第一硅光芯片331的侧面，第一硅光芯片331与第一电芯片打线连接，第一硅光芯片331与第二电芯片打线连接。其中，第一硅光芯片331、第一电芯片以及第二电芯片设于双U形槽盖壳310与双U形槽基板320组成的腔体内；光纤接头334一端置于双U形槽盖壳310与双U形槽基板320组成的腔体内，另一端置于双U形槽盖壳310与双U形槽基板320组成的腔体外；第一激光盒338及光纤设于双U形槽盖壳310与双U形槽基板320组成的腔体外。
通过在电路板206的表面设置双U形槽基板320，然后在双U形槽基板320表面设置第一硅光芯片331，从而可将电路板206上的电信号通过双U形槽基板320，进而传输至第一硅光芯片331内部；由此可见，双U形槽基板320起到了电信号转接的作用；在一些实施例中，硅光芯片与电路板打线连接时，为了保证打线长度较短，电路板表面形成有缺口，从而将硅光芯片嵌设至缺口内，进而实现与电路板打线连接时打线长度较短；本公开通过双U形槽基板320，将电信号从电路板206转接至第一硅光芯片331内部，可避免在电路板表面设置缺口，从而保证电路板的完整性。
第一硅光芯片331的第一侧设有第一调制驱动器332，第二侧设有第一跨阻放大器333，第三侧设有光纤接头334，光纤接头334分别连接第一光纤、第二光纤及第三光纤，第一光纤、第二光纤及第三光纤分别连接第一激光盒338、发射光纤适配器及接收光纤适配器，因此，第一光纤、第二光纤及第三光纤分别描述为光源光纤335、发射光纤336及接收光纤337。
第一硅光芯片331的侧面接收来自第一激光盒338的光；发射光信号的调制以及接收光信号的解调均由第一硅光芯片331完成；电路板206通过双U形槽基板320向第一硅光芯片331提供来自上位机的数据信号，由第一硅光芯片331将数据信号调制到光中以生成光信号；来自外部的光信号经第一硅光芯片331解调成电信号后，依次通过双U形槽基板320、电路板206而输出至上位机中。
第一硅光芯片331与光源光纤335、发射光纤336及接收光纤337连接；第一硅光芯片331与光源光纤335、发射光纤336及接收光纤337之间可通过光纤接头334实现连接；光源光纤335一端与第一硅光芯片331的第一接收光口耦合连接，另一端与第一激光盒338连接，以传输第一激光盒338射出的光；发射光纤336一端与第一硅光芯片331的输出光口耦合连接，另一端与发射光纤适配器连接，以传输第一硅光芯片331生成的发射光信号；接收光纤337一端与第一硅光芯片331连接的第二接收光口耦合连接，另一端与接收光纤适配器连接，以将外部光信号传输至第一硅光芯片331内。其中，第一硅光芯片331的第一接收光口、输出光口、第二接收光口设于第一硅光芯片331的侧面，第一硅光芯片331的侧面接收来自第一激光盒338的光。
光纤接头334厚度比第一硅光芯片331更厚一些，将第一硅光芯片331设于双U形槽基板320表面，进而可抬高第一硅光芯片331所在的高度，以使光纤接头334内部的光纤端面与第一硅光芯片331的光口端面在一水平线上，实现光纤端面与光口端面耦合连接，进而实现光纤与硅光芯片之间的信号传输。在一些实施例中，不设置双U形槽基板时，则电路板表面会设置缺口，以嵌设光纤接头，使光纤接头下沉至光纤接头内光纤的端面与硅光芯片光口的端面在一水平线上，然而电路板表面设置缺口会影响电路板信号传输性能，且由于光纤接头下沉而与电路板之间的距离靠近，光纤接头内部的光纤会对电路板产生干涉。
第一激光盒338射出的光经光源光纤335耦合至第一硅光芯片331内，然后经分光，一部分作为发射端光源，一部分作为接收端本振光，其中第一激光盒338向第一硅光芯片331提供的光为波长单一、功率稳定的光，不携带数据，由第一硅光芯片331对该光进行调制，以实现将数据加载到光中；第一硅光芯片331内部设有IQ调制器，由于IQ调制器对接收到的电信号的幅度等具有较高的要求，因此通过第一调制驱动器332将DSP芯片2061传输过来的电信号进行处理，从而增加电信号的幅度，以满足IQ调制器要求；然后通过IQ调制器将电信号加载至发射端光源上，生成携带信息的发射光信号，进而发射光信号经发射光纤336传输至光模块外部；外部光信号经接收光纤337传输至第一硅光芯片331内，与接收端本振光进行相干混频，转换而成的光电流信号得到放大，然后经第一跨阻放大器333进一步放大，而传输至DSP芯片2061中。
第一激光盒338发出的光进入第一硅光芯片331中，经第一硅光芯片331调制出光信号后，通过发射光纤336传输至发射光纤适配器，实现光模块的光发射；外部光信号通过接收光纤适配器、接收光纤337传输至第一硅光芯片331中，经第一硅光芯片331解调出电信号后输出至上位机，实现光模块的光接收。
在本公开的一些实施例中，光源光纤335为保偏光纤，发射光纤336和接收光纤337为非保偏光纤；光源光纤335采用保偏光纤，以保证接收端本振光在传输过程中偏振态不变。
在本公开的一些实施例中，采用合理的光纤连接方式，并合理安排装配工艺，先将相应激光盒与光纤阵列组件组装在一起，形成一个带有光源的部件，再将其与相应硅光芯片进行耦合，避免了装配中的盘纤操作，极大提高装配效率，降低装配成本。
第二载波组件340包括：第二硅光芯片341、第一电芯片、第二电芯片、光纤接头344、第二激光盒348及光纤。示例性，第一电芯片可以为驱动调制器，第二电芯片可以为跨阻放大器。其中，第二硅光芯片314、第一 电芯片以及第二电芯片设于双U形槽盖壳310与双U形槽基板320组成的腔体内；光纤接头334一端置于双U形槽盖壳310与双U形槽基板320组成的腔体内，另一端置于双U形槽盖壳310与双U形槽基板320组成的腔体外；第二激光盒348及光纤设于双U形槽盖壳310与双U形槽基板320组成的腔体外。
第二硅光芯片341的第一侧设有第二调制驱动器342，第二侧设有第二跨阻放大器343，第三侧设有光纤接头344，光纤接头344分别连接第一光纤、第二光纤及第三光纤，第一光纤、第二光纤及第三光纤分别连接第二激光盒348、发射光纤适配器及接收光纤适配器，因此，第一光纤、第二光纤及第三光纤分别描述为光源光纤345、发射光纤346及接收光纤347。
第二激光盒348射出的光经光源光纤345耦合至第二硅光芯片341内，然后经分光，一部分作为发射端光源，一部分作为接收端本振光；第二硅光芯片341内部设有IQ调制器，同样地由于IQ调制器对接收到的电信号的幅度等具有较高的要求，因此通过第二调制驱动器342将DSP芯片2061传输过来的电信号进行处理，从而增加电信号的幅度，以满足IQ调制器要求；然后通过IQ调制器将电信号加载至发射端光源上，生成携带信息的发射光信号，进而发射光信号经发射光纤346传输至光模块外部；外部光信号经接收光纤347传输至第二硅光芯片341内，与接收端本振光进行相干混频，转换而成的光电流信号得到放大，然后经第二跨阻放大器343进一步放大，而传输至DSP芯片2061中。
图9为根据本公开一些实施例提供的一种双载波相干组件的剖面图一。如图9所示，由于第一硅光芯片331较薄，为了增加第一硅光芯片331与光纤接头334之间的连接牢固性，在第一硅光芯片331与光纤接头334表面跨设有连接板350。相应地，在第二硅光芯片341与光纤接头344的表面跨设有连接板360。
连接板350盖设在第一载波组件330中的光纤接头334与第一硅光芯片331的光波导二者的表面，连接板350一端跨接于第一载波组件330中的光纤接头334表面，另一端跨接于第一硅光芯片331的光波导表面。
为了避让连接板350，在双U形槽盖壳310表面形成有第一U形槽311，以避让连接板350；同时，第一U形槽311还可以使第一硅光芯片331的光波导暴露于外面。相应地，第二U形槽312可避让连接板360，还可以使第二硅光芯片341的光波导暴露于外面。
第一硅光芯片331相对于第一U形槽311暴露出来，则第一硅光芯片331的光波导相对于第一U形槽311暴露出来，便于光纤与第一硅光芯片331的光波导进行耦合连接；第二硅光芯片341相对于第二U形槽312暴露出来，则第二硅光芯片341的光波导相对于第二U形槽312暴露出来，便于光纤与第二硅光芯片341的光波导进行耦合连接。
第一硅光芯片331跨设于第一U形槽321表面，第二硅光芯片341跨设于第二U形槽322表面；将第一调制驱动器332、第一跨阻放大器333均设于第一硅光芯片331的侧面；将第二调制驱动器342、第二跨阻放大器343均设于第二硅光芯片341的侧面；将光纤接头334设于第一U形槽321内，将光纤接头344设于第二U形槽322内；将双U形槽盖壳310盖设于上述各器件的表面，第一硅光芯片331相对于第一U形槽311暴露出来，则第一硅光芯片331的光波导相对于第一U形槽311暴露出来，便于光纤与第一硅光芯片331的光波导进行耦合连接；第二硅光芯片341相对于第二U形槽312暴露出来，则第二硅光芯片341的光波导相对于第二U形槽312暴露出来，便于光纤与第二硅光芯片341的光波导进行耦合连接；示例性地，第一载波组件330中的光纤接头334与第一硅光芯片331之间填充耦合胶，实现光纤与第一硅光芯片331光波导的耦合连接；第二载波组件340中的光纤接头344与第二硅光芯片341之间填充耦合胶，实现光纤与第二硅光芯片341光波导的耦合连接。
图10为根据本公开一些实施例提供的一种双载波相干组件的剖面图二。如图10所示，光纤接头334包括第一基板3341和第二基板3342，第一基板3341和第二基板3342堆叠设置，光源光纤335、发射光纤336及接收光纤337穿设于第一基板3341和第二基板3342之间；第二基板3342内部设有各光纤通道，各光纤通道设为V形凹槽形式，光源光纤335、发射光纤336及接收光纤337设于V形凹槽内；V形凹槽形式有利于较好地定位相应光纤。
图11为根据本公开一些实施例提供的一种双载波相干组件的剖面图三。如图11所示，第一硅光芯片331设于双U形槽基板320表面，由于第一硅光芯片331边缘与双U形槽基板320边缘不对齐，为了避让光纤接头334，则在双U形槽基板320分别具有第一U形槽311、第二U形槽312，以使光纤接头334一端伸入第一U形槽311内，光纤接头344一端伸入第二U形槽312内。
图12为根据本公开一些实施例提供的一种双U形槽盖壳和双U形槽基板装配关系剖面图；图13为根据本公开一些实施例提供的一种双U形槽盖壳的结构图；如图12和图13所示，双U形槽盖壳310内部具有空腔314，通过空腔314装配第一载波组件330和第二载波组件340；双U形槽盖壳310侧壁设有限位凸起313，双U形槽基板320侧壁设有限位凹槽323，限位凸起313与限位凹槽323相互镶嵌在一起进行限位，从而将双U形槽盖壳310和双U形槽基板320固定在一起；示例性地，将双U形槽盖壳310扣设于双U形槽基板320表面，实现双U形槽盖壳310扣设于双U形槽基板320之间的固定。
第一U形槽311、第二U形槽312沿双U形槽盖壳310长边方向上的开设长度大于第一U形槽321、第二U形槽322沿双U形槽盖壳310长边方向上的开设长度；这是为了便于装配第一载波组件330中的光纤接头334、第二载波组件340中的光纤接头344，同时也是为了便于装配第一连接板350、第二连接板360。
图14为根据本公开一些实施例提供的第一种激光盒的结构图一，图15为根据本公开一些实施例提供的第一种激光盒的结构图二。如图14和图15所示，第一激光盒338包括腔体3381，腔体3381表面与盖板盖合连接；腔体3381中间设有容纳腔3382，腔体3381相对的两个端部分别设有凸台3383、通孔3384；凸台3383的表面相对于容纳腔3382的表面较高；凸台3383表面设有转接电路板370，通孔3384内设有光纤适配器3385，光纤适配器3385与光源光纤335耦合连接，光源光纤335为保偏光纤，则光纤适配器3385为保偏光纤适配器。
容纳腔3382内设有TEC381、载板382，TEC381的表面设有激光芯片383和准直透镜384，载板382表面设有隔离器385及汇聚透镜386。
由于在相干通信中，接收光信号与本振光信号的波长差(或频率差)需要小于某一特定值才能产生干涉并保证DSP芯片可以处理相应的信号，所以激光芯片383的波长需要保持在非常稳定的状态，比如±0.015nm范围，因此采用了TEC381作为关键温控元件控制激光芯片383的波长，同时采用高精度温度传感器检测激光芯片383的温度。
隔离器385用于防止激光芯片383发出的光被发射后回到激光芯片383中，所以隔离器385设置在激光芯片383出光方向上，示例性地，隔离器385设置在准直透镜384背向激光芯片383的方向，即隔离器385与激光芯片383之间设置有准直透镜384。
载板382用于抬高隔离器385及汇聚透镜386所在的高度，使得隔离器385及汇聚透镜386的光轴、激光芯片383的光轴、准直透镜384的光轴在同一直线上。
准直透镜384用于将激光芯片383发出的发散光转化为平行光，汇聚透镜386用于将平行光转化为汇聚光，从而以汇聚状态沿光纤适配器3386、光源光纤335耦合进入第一硅光芯片331内。
转接电路板370，一部分位于腔体3381内，一部分位于腔体3381外；转接电路板370位于腔体3381外部的一端通过打线或柔性电路板与电路板206电连接，从而将电路板206发出的驱动电信号传输至腔体3381内，即传输至激光芯片383内，激光芯片383在驱动电信号作用下发出光。
本公开的一些实施例中，第一激光盒338设于电路板206表面时，可将第一激光盒338的开口朝向光模块上壳体201；第一激光盒338相对的两个表面中，一个表面设有开口，另一个表面未设有开口，设有开口的表面与相应盖板盖合连接，未设有开口的表面与电路板206相接触连接；则设有开口的表面相对于未设有开口的表面更远离电路板206，更靠近光模块的上壳体201。同样地，第二激光盒348如此。
相应的在做第一激光盒338的光耦合时，需要考虑后续第一激光盒338在电路板上的安装方向，调制光源光纤335的摆放位置，以避免在将第一激光盒338安装到模块电路板上时产生光源光纤335的扭转。
在相干光通信中，为实现在接收端外部光信号与本振光的相干作用，需要将激光盒输出光的波长控制在±1.75GHz的范围以内，在O-band对应的波长变化为±0.01nm，对应于激光芯片的工作温度变化±0.11℃。由于激光器相对于相干光源的波长要求有一定的差异，需要在一定范围内对激光器的波长进行调整，示例性地，通过TEC来控制激光器的工作温度，从而实现波长调节。
通过TEC控制激光芯片的温度和波长是作为较宽范围的波长控制。虽然理论上TEC控制及其控制电路可以实现0.1℃的控制精度。但在实际操作中，由于温度传感器与激光芯片的有一定距离，当环境温度变化时，二者会出现一定的偏差，因而导致锁定波长的偏移。同时控制电路的参数也会随环境温度变化产生细微的变化，也会造成锁定波长偏离目标波长。因此单纯采用温度控制，无法真正达到将波长控制在一个极小的范围的目标。
图16为根据本公开一些实施例提供的第二种激光盒的结构图；图16所示激光盒结构在图14所示激光盒基础上增加：分光器391、第一背光探测器392、光学标准具393、第二背光探测器394、标准具TEC395、温度传感器396。
分光器391一端设于隔离器385及汇聚透镜386之间，隔离器385及汇聚透镜386的下方依然设有透镜载板，则分光器391一端设于透镜载板表面，另一端与第一背光探测器392连接，分光器391包括相对设置的第一反射面3911和第二反射面3912，第一反射面3911用于将激光芯片发出的光分为射出光及第一反射光，其中射出光与第一反射光的能量比例可以为95:5，即大部分光以射出光形式为硅光芯片提供光源，小部分光被分出以进行波长监测；第二反射面3912用于将第一反射光分为参考光和第二反射光，进一步，第二反射面3912为半透半反，参考光和第二反射光的能量比例为50:50。
第一背光探测器392与分光器391位于同一个底座上，并面向第二反射面3912的透光方向，用于接收并探测所述参考光的光功率，所探测到的参考光光功率记为第一光功率P1，第一光功率P1为参考光功率。
光学标准具393，设于分光器391与第二背光探测器394之间，用于接收所述第二反射光，并输出监测光。
第二背光探测器394，设于光学标准具393的输出端，用于接收并探测所述监测光的光功率，所探测到的监测光光功率记为第二光功率P2，第二光功率P2为监测光功率。由于光学标准具的透过率曲线在透过率为50％±10％的范围内接近线性，可以通过将输入波长调整至标准具透过率为50％处的波长值，并通过监测透过率的变化来监测输入波长的变化。标准具被放置在标准具TEC395，当标准具TEC395的温度改变时，标准具的光程会发生相应的变化，从而导致其透过率曲线相对于波长发生移动。当选择适当温度时，就可以将光学标准具的透过率为50％的波长点与输入激光的波长调整至相同。
在实际应用中，假设第一激光盒338具有设定波长，设定波长为满足相干光源波长要求的波长；当波长发生变化时，第一光功率P1与第二光功率P2的比值发生变化，因此，第一光功率P1与第二光功率P2的比值的变化量可表征由于波长发生变化产生的光功率变化率，根据光功率变化率与设定波长对应的光功率之间的关系可以得到变化后波长，然后根据设定波长与变化后波长之间的关系，以此作为激光器的TEC的控制变量，形成闭环控制，调整温度便可将激光芯片射出光的波长调节至设定波长，实现波长的精确控制。
在一些实施例中，第一激光盒338的设定波长为1309.81nm(λ0)，则激光波长恰好位于光学标准具393 50％光功率的位置；若第一光功率P1与第二光功率P2的比值变化量为10％，则光学标准具393对应的光功率为60％，根据光学标准具393的透射光谱找到光功率为60％对应的波长，如1309.82nm，则得到变化后波长为1309.82nm；以1309.81nm与1309.82nm之间的差值，作为激光器的TEC的控制变量，形成负反馈闭环控制，调整激光器温度便可将激光芯片射出光的波长调节至设定波长1309.81nm，实现波长的精确控制。
光学标准具393作为控制激光器波长的关键部件，其自身应保证一定的温度稳定性。光学标准具393具有特有的低膨胀系数和折射率温度变化系数，其具有一定的温度变化；如当光学标准具393的温度变化±3°时，透过率的变化为±10％。为此，采用标准具TEC4805对光学标准具393进行控温，可以将其温度控制在±0.5°，则此时透过率的变化为±1.5％,可以满足对波长稳定性的要求。在光学标准具393的表面还设有温度传感器396以便监控光学标准具温度，使其工作在设定的温度范围内。
因此，本公开在激光盒内设置第一背光探测器392、第二背光探测器394、光学标准具393，通过实时测量光功率比值P1/P2的变化率实现对激光盒射出光波长和与设定波长的偏差的监控，进而进行闭环控制，精确控制激光器波长，进而实现将波长控制在相干光通信的要求之内。
在本公开的一些实施例中，为了更好地将DSP芯片2061产生的热量传导出去，在DSP芯片2061与光模块上壳体之间设有导热垫片；为了将相应激光盒工作时产生的热量传导出去，在激光盒与光模块上壳体之间设有导热垫片；为了将相应硅光芯片、调制驱动器及跨阻放大器工作时产生的热量传导出去，在双载波相干组件的双U形槽盖壳与光模块上壳体之间设有导热垫片。通过导热垫片与光模块上壳体的接触，可以更好地将热量通过光模块上壳体散发至光模块外部。
综合上述，在本公开的一些实施例中，在电路板其中一个表面上设置双载波相干组件300，双载波相干组件中的第一载波组件和第二载波组件分别实现单载波800Gb/s传输速率，进而实现1.6Tb/s传输速率。
在一些实施例中，上述至少一个载波相干组件包括第一双载波相干组件和第二双载波相干组件，图17为根据本公开一些实施例提供的第一双载波相干组件和第二双载波相干组件示意图。如图17所示，电路板206上下表面分别设置有第一双载波相干组件400和第二双载波相干组件500。第一双载波相干组件400的组成结构与双载波相干组件300的组成结构相同，第二双载波相干组件500的组成结构与双载波相干组件300的组成结构相同。
第一双载波相干组件400集成两个800G硅光芯片，第二双载波相干组件500集成两个800G硅光芯片，任一载波组件实现单载波800Gb/s传输速率，则实现3.2Tb/s传输速率。
图18为根据本公开一些实施例提供的第一双载波相干组件和第二双载波相干组件内部图；图19为根据本公开一些实施例提供的第一双载波相干组件和第二双载波相干组件剖面图一。如图18和图19所示，第一双载波相干组件400包括第一双U形槽盖壳410、第一双U形槽基板420、第一载波组件430以及第二载波组件440；第二载波组件440包括第二硅光芯片441、第二光纤接头444；在第二硅光芯片441与第二光纤接头444之间跨接设有连接板460。第二双载波相干组件500包括第二双U形槽盖壳510、第二双U形槽基板520、第一载波组件 以及第二载波组件；第二载波组件包括第二硅光芯片541、第二光纤接头544；在第二硅光芯片541与第二光纤接头544之间跨接设有连接板560。
第一双U形槽盖壳410、第一双U形槽基板420、第一载波组件430、第二载波组件440之间的相对装配关系如前述实施例中双U形槽盖壳310、双U形槽基板320、第一载波组件330、第二载波组件340的相对装配关系相同，不再详述。
第一载波组件430包括第一硅光芯片431、第一调制驱动器432、第一跨阻放大器433、第一光纤接头434、第一光源光纤435、第一发射光纤436、第一接收光纤437、第一激光盒438。
第二载波组件440包括第二硅光芯片441、第二调制驱动器442、第二跨阻放大器443、第二光纤接头444、第二光源光纤445、第二发射光纤446、第二接收光纤447、第二激光盒448。
第一硅光芯片431、第一调制驱动器432、第一跨阻放大器433、第一光纤接头434、第一光源光纤435、第一发射光纤436、第一接收光纤437、第一激光盒438这些结构之间的工作原理，与前述实施例中第一硅光芯片331、第一调制驱动器332、第一跨阻放大器333、光纤接头334、光源光纤335、发射光纤336、接收光纤337、第一激光盒338这些结构之间的工作原理相同。
第二硅光芯片441、第二调制驱动器442、第二跨阻放大器443、第二光纤接头444、第二光源光纤445、第二发射光纤446、第二接收光纤447、第二激光盒448这些结构之间的工作原理，与前述实施例中第二硅光芯片341、第二调制驱动器342、第二跨阻放大器343、光纤接头344、光源光纤345、发射光纤346、接收光纤347、第二激光盒348这些结构之间的工作原理相同。
图20为根据本公开一些实施例提供的第一双载波相干组件和第二双载波相干组件侧视图。如图20所示，第一双载波相干组件400与第二双载波相干组件500相对于电路板206错开设置；从俯视视角看，第一载波组件430在电路板下表面的投影，与第二双载波相干组件500的第一载波组件不重合，第二载波组件440在电路板下表面的500的第二载波组件不重合；示例性地，第一双载波相干组件400的第一载波组件430包括第一激光盒438，第二载波组件440包括第二激光盒448；第二双载波相干组件500的第一载波组件包括第一激光盒538，第二载波组件包括第二激光盒548；从电路板上表面至电路板下表面方向上，第一激光盒438与第一激光盒538不处于同一竖直轴线上，而是相对错开；第二激光盒448与第二激光盒548同样不处于同一竖直轴线上，而是相对错开。
第一双载波相干组件400与第二双载波相干组件500的各器件错开设置可避免相应器件集中堆叠在电路板206的同一截面上，进而避免热量过于集中，从而有利于散热，进而保证第一双载波相干组件400与第二双载波相干组件500正常工作。
图21为根据本公开一些实施例提供的第一双载波相干组件和第二双载波相干组件剖面图二；如图21所示，第一双载波相干组件400中，第一硅光芯片431与第一光纤接头434表面跨接设有连接板450；第二硅光芯片441与第二光纤接头444表面跨接设有连接板460；第二双载波相干组件500中，第一硅光芯片531与第一光纤接头534表面跨接设有连接板550，第二硅光芯片541与第二光纤接头544表面跨接设有连接板560。
第一U形槽盖壳410和第二U形槽盖壳510开口均朝向电路板206；第一U形槽盖壳410与光模块的上壳体201二者靠近设置，第二U形槽盖壳510与光模块的下壳体202二者靠近设置，由于第一U形槽盖壳410、第二U形槽盖壳510二者具有较好的散热作用，因此当在第一双U形槽盖壳410与光模块的上壳体201二者靠近设置，第二双U形槽盖壳510与光模块的下壳体202二者靠近设置时，有利于热量分别通过第一双U形槽盖壳410、第二双U形槽盖壳510与相应壳体的接触而传导出去。
本公开实施例中未尽之处参考前述实施例中双载波相干组件300的相关描述。
综合上述，本公开实施例中光模块包括第一双载波相干组件400、第二双载波相干组件500，第一双载波相干组件400、第二双载波相干组件500分别设于电路板的两个表面；第一双载波相干组件400包括第一载波组件、第二载波组件，第二双载波相干组件500包括第一载波组件、第二载波组件，任一载波组件实现单载波800Gb/s传输速率，进而实现3.2Tb/s传输速率。
在一些实施例中，上述至少一个载波相干组件包括单载波相干组件，该单载波相干组件至少为两个，至少两个单载波相干组件包括第一单载波相干组件和第二单载波相干组件。图22为根据本公开一些实施例提供的第一单载波相干组件和第二单载波相干组件示意图。如图22所示，电路板206的上下两个表面上分别设有第一单载波相干组件600及第二单载波相干组件700，第一单载波相干组件600集成一个800G硅光芯片，第二单载波相干组件700集成一个800G硅光芯片，第一单载波相干组件600及第二单载波相干组件700分别实现单载波800Gb/s传输速率，进而实现1.6Tb/s传输速率。第一单载波相干组件600包括第一单U形槽盖壳610，第一单U形槽盖壳610表面形成有一个U形槽，第一单U形槽盖壳610开口朝向电路板206；第二单载波相干组件700包括第二单U形槽盖壳710，第二单U形槽盖壳710表面形成有一个U形槽，第二单U形槽盖壳710开口朝向电路板206。
图23为根据本公开一些实施例提供的第一单载波相干组件和第二单载波相干组件内部图。如图23所示，第一单载波相干组件600包括第一单U形槽盖壳610、第一单U形槽基板620、载波组件；第二单载波相干组件700包括第二单U形槽盖壳710、第二单U形槽基板720、载波组件。第一单载波相干组件600中的载波组件描述为上载波组件630，第二单载波相干组件700中的载波组件描述为下载波组件730。上载波组件630与下载波组件730的组成相同。
第一单U形槽盖壳610、第一单U形槽基板620、上载波组件630之间装配关系类似于双U形槽盖壳310、双U形槽基板320、第一载波组件330、第二载波组件340之间装配关系。
第一单U形槽盖壳610、第一单U形槽基板620扣合连接，二者组成具有一定空间；同样地，第二单U形槽盖壳710、第二单U形槽基板720扣合连接，二者组成具有一定空间。
图24为根据本公开一些实施例提供的第一单载波相干组件局部结构示意图；图25为根据本公开一些实施例提供的第一单载波相干组件局部内部结构示意图。如图24和图25所示，第一单U形槽盖壳610的结构类似于双U形槽盖壳310，区别在于：第一单U形槽盖壳610具有一个U形槽，双U形槽盖壳310具有两个U形槽；第一单U形槽盖壳610为具有一定空间的壳体，其中间形成有U形槽611，侧壁设有限位凸起612；第一单U形槽基板620的结构类似于双U形槽基板320，区别在于：第一单U形槽基板620具有一个U形槽，双U形槽基板320具有两个U形槽。
第一单U形槽盖壳610中间设有U形槽611，侧壁设有限位凸起612；第一单U形槽基板620中间设有U形槽621，侧壁设有限位凹槽622，通过限位凸起612与限位凹槽622的连接，实现第一单U形槽盖壳610与第一单U形槽基板620的限位及连接。
上载波组件630，包括上硅光芯片631、上驱动调制器632、上跨阻放大器633、上光纤接头634、上光源光纤635、上发射光纤636、上接收光纤637及激光盒638。上硅光芯片631、上驱动调制器632、上跨阻放大器633、 上光纤接头634、上光源光纤635、上发射光纤636、上接收光纤637及激光盒638之间的装配关系、功能关系，与前述实施例中第一载波组件430中的相应各器件的装配关系、功能关系相同，不再详述。
在上硅光芯片631与上光纤接头634之间横跨设有连接板640，也就是说，连接板640一端设于上硅光芯片631的表面，一端设于上光纤接头634的以增加上硅光芯片631与上光纤接头634之间连接的稳固性。
下载波组件730，包括下硅光芯片731、下驱动调制器732、下跨阻放大器733、下光纤接头734、下光源光纤735、下发射光纤736、下接收光纤737及激光盒738。在下硅光芯片731与下光纤接头734之间横跨设有连接板740；下硅光芯片731、下驱动调制器732、下跨阻放大器733、下光纤接头734、下光源光纤735、下发射光纤736、下接收光纤737及激光盒738之间的装配关系、功能关系，与前述实施例中第一载波组件330中的相应各器件的装配关系、功能关系相同，不再相述。
图26为根据本公开一些实施例提供的第一单载波相干组件和第二单载波相干组件剖面图。如图26所示，第一单载波相干组件600、第二单载波相干组件700相对电路板206错开设置，如同第一双载波相干组件400与第二双载波相干组件500相对于电路板206错开设置目的一样，可避免相应器件集中堆叠在电路板206的同一截面上，进而避免热量过于集中，从而有利于散热。
第一单U形槽盖壳610、第二单U形槽盖壳710开口都朝向电路板206，第一单U形槽基板620、第二单U形槽基板720分别与电路板206上下表面相接触；通过第一单U形槽基板620、第二单U形槽基板720各自背面设置的焊球与电路板206实现焊接连接；第一单U形槽盖壳610相对于第一单U形槽基板620更靠近光模块上壳体201，第二单U形槽盖壳710相对于第二单U形槽基板720更靠近光模块下壳体202，有利于热量分别通过第一单U形槽盖壳610、第二单U形槽盖壳710与相应壳体的接触而传导出去，增加散热性能。
本公开实施例中未尽之处参考前述实施例中双载波相干组件300、第一双载波相干组件400、第二双载波相干组件500的相关描述。
综合上述，本公开实施例中光模块包括第一单载波相干组件600及第二单载波相干组件700，第一单载波相干组件600集成一个800G硅光芯片，第二单载波相干组件700集成一个800G硅光芯片，第一单载波相干组件600及第二单载波相干组件700分别实现单载波800Gb/s传输速率，进而实现1.6Tb/s传输速率。
上述实施例提供的光模块中激光盒与硅光芯片之间可以通过光纤连接，硅光芯片与电路板通过U形槽基板实现电信号的传输。本公开实施例还提供一种光模块，在该光模块中激光盒与硅光芯片之间不通过光纤连接，而是通过激光盒的光窗与硅光芯片耦合连接，而且硅光芯片与电路板直接打线连接，从而实现电信号的传输。图27为根据本公开一些实施例提供的另一种光模块结构分解图。如图27所示，电路板206表面设有第一单载波相干组件800和第二单载波相干组件900。第一单载波相干组件800和第二单载波相干组件900并列、相邻设置于电路板206表面。第一单载波相干组件800集成一个800G的硅光芯片，第二单载波相干组件900集成一个800G的硅光芯片，第一单载波相干组件800和第二单载波相干组件900分别实现单载波800Gb/s传输速率，进而实现1.6Tb/s传输速率。
图28为根据本公开一些实施例提供的一种电路板下表面结构示意图；图29为根据本公开一些实施例提供的一种电路板与载波相干组件分离示意图。如图28和图29所示，电路板206表面具有缺口2062，第一单载波相干组件800和第二单载波相干组件900均嵌设于缺口2062内。
第一单载波相干组件800包括第一底座810，第二单载波相干组件900包括第二底座910，第一底座810和第二底座910分别嵌设于缺口2062内。
图30为根据本公开一些实施例提供的另一种第一单载波相干组件和第二单载波相干组件结构图；图31为根据本公开一些实施例提供的另一种第一单载波相干组件和第二单载波相干组件剖面图；如图30和图31所示，第一单载波相干组件800包括第一底座810，第一底座810用于承载第一单载波相干组件800的各器件。第一底座810表面分别设有第一硅光芯片801、第一驱动调制器802、第一跨阻放大器803、第一激光盒804、第一光纤接头805、第一光纤806、第二光纤807、第一光纤适配器808、第二光纤适配器809。由于硅光芯片采用的硅材料不是理想的激光芯片发光材料，不能在硅光芯片制作过程集成发光单元，所以硅光芯片需要由外部光源提供光；示例性地，采用第一激光盒804作为第一硅光芯片801的提供外部光源，则第一硅光芯片801的侧边接收来自第一激光盒804的光。第一硅光芯片801表面分别设有第一驱动调制器802、第一跨阻放大器803。
第一硅光芯片801的侧边具有第一输入光口、第二输入光口及输出光口，第一激光盒804射出的光通过第一输入光口以耦合进入第一硅光芯片801内，第一硅光芯片801生成的发射光信号通过输出光口以发射至光模块外部，外部光信号通过第二输入光口以耦合进入第一硅光芯片801内部。第一输入光口、第二输入光口及输出光口的形式可为第一输入光波导、第二输入光波导及输出光波导。第一硅光芯片801内置有分光器、IQ调制器等元器件。
第一驱动调制器802用于对上位机输出的电信号进行调制，以使电信号幅度增加，进而满足IQ调制器对电信号的参数要求。第一跨阻放大器803用于对接收端产生的光电信号进行放大。
第一光纤接头805用于供第一光纤806、第二光纤807穿过，从而固定第一光纤806、第二光纤807；第一光纤接头805包括第一基板和第二基板，第一基板和第二基板堆叠设置，第一光纤806、第二光纤807穿设于第一基板和第二基板之间；第二基板内部设有各光纤通道，各光纤通道设为V形凹槽形式，第一光纤806、第二光纤807设于V形凹槽内；V形凹槽形式有利于较好地定位第一光纤806、第二光纤807。
第一光纤806一端与第一硅光芯片801的输出光口耦合连接，另一端与第一光纤适配器808耦合连接，以传输第一硅光芯片801产生的发射光信号，第一光纤806为发射光纤，第一光纤适配器808为发射光纤适配器。
第二光纤807一端与第一硅光芯片801的第一输入光口或第二输入光口耦合连接，另一端与第二光纤适配器809耦合连接，以向第一硅光芯片801输入外部光信号；因此，第二光纤807为接收光纤，第二光纤适配器809为接收光纤适配器。本公开实施例中第一光纤806和第二光纤807布局避免了装配中的盘纤操作，极大提高装配效率，降低装配成本。
第二单载波相干组件900，包括第二底座910，第二底座910用于承载第二单载波相干组件900的各器件。第二底座910表面分别设有第二硅光芯片901、第二驱动调制器902、第二跨阻放大器903、第二激光盒904、第二光纤接头905、第一光纤906、第二光纤907、第一光纤适配器908、第二光纤适配器909。在一些实施例中，采用第二激光盒904为第二硅光芯片901提供外部光源，则第二硅光芯片901的侧边接收来自第二激光盒904的光。第二硅光芯片901表面分别设有第二驱动调制器902、第二跨阻放大器903。
第一底座810与第二底座910靠近光模块下壳体202，其作用为散热底座，通过第一底座810与第二底座910可分别将第一单载波相干组件800、第二单载波相干组件900产生的热量通过光模块壳体传导至光模块外部。第一底座810与第二底座910均承托着电路板；第一底座810与第二底座910均呈方形，二者相邻、并列设置。
第一激光盒804下沉设置以使内部的激光芯片出光轴与第一硅光芯片801的第一输入光口耦合在一起，进一步，内部的激光芯片出光轴与第一硅光芯片801的第一输入光口在同一水平线上。第一光纤接头805内部的光纤 端面与第一硅光芯片801的第二输入光口、输出光口耦合在一起，进一步，第一光纤接头805内部的光纤端面与第一硅光芯片801的第二输入光口、输出光口在同一水平线上。
第一单载波相干组件800和第二单载波相干组件900的设计组成、设计功能均相同；以第一单载波相干组件800为例，第一激光盒804为第一硅光芯片801提供光，第一激光盒804向第一硅光芯片801提供的光为波长单一、功率稳定的光，不携带数据；第一激光盒804与第一硅光芯片801之间耦合连接，可通过耦合胶实现耦合连接，同时提高耦合效率。第一激光盒804射出的光耦合进入第一硅光芯片801内，通过第一硅光芯片801内置的分光器被分为两部分光，一部分光作为发射端光源，另一部分光作为接收端本振光。电路板206向第一硅光芯片801提供来自上位机的数据信号，由第一硅光芯片801将数据信号调制到发射端光源中，生成发射光信号，发射光信号依次经过第一光纤806、第一光纤适配器808发射至光模块外部。
来自外部的光信号依次经过第二光纤适配器809、第二光纤807耦合进入第一硅光芯片801内，该外部光信号与接收端本振光相干混频，转换而成的光电流信号得到放大，然后经第一跨阻放大器803进一步放大，而传输至DSP芯片2061中。
在本公开的一些实施例中，电路板206向第一硅光芯片801提供来自上位机的数据信号，由第一硅光芯片801将数据信号调制到光中，来自外部的光信号经第一硅光芯片801解调成电信号后，通过电路板206输出至上位机中。第一激光盒804射出的光耦合至第一硅光芯片801内，然后经分光，一部分作为发射端光源，一部分作为接收端本振光，其中第一激光盒804向第一硅光芯片801提供的光为波长单一、功率稳定的光，不携带数据，由第一硅光芯片801对该光进行调制，以实现将数据加载到光中；第一硅光芯片801内部设有IQ调制器，IQ调制器对接收到的电信号的幅度等具有一定要求，因此，第一驱动调制器802将DSP芯片301d传输过来的电信号进行处理，增加电信号的幅度，以使其满足IQ调制器要求；然后通过IQ调制器将电信号加载至发射端光源上，生成携带信息的发射光信号，进而发射光信号依次经过第一光纤806、第一光纤适配器808发射至光模块外部。外部光信号依次经过第二光纤适配器809、第二光纤807耦合进入第一硅光芯片801内，与接收端本振光进行相干混频，由第一硅光芯片801中的光探测器接收，转换成的光电流信号经第一跨阻放大器803进一步放大，而传输至DSP芯片2061中。
在本公开的一些实施例中，第一硅光芯片801与电路板206之间通过打线连接，第二硅光芯片901与电路板206之间同样通过打线连接。第一硅光芯片801靠近电路板206的侧边设有高频信号焊盘及低频信号焊盘，通过高频信号焊盘及低频信号焊盘打线至电路板206表面，从而实现电路板206与第一硅光芯片801之间的高频信号及低频信号的传递。同样地，第二硅光芯片901靠近电路板206的侧边设有高频信号焊盘及低频信号焊盘，通过高频信号焊盘及低频信号焊盘打线至电路板206表面，从而实现电路板206与第二硅光芯片901之间的高频信号及低频信号的传递。第一硅光芯片801与电路板206之间的打线长度较短时，有利于高频信号及低频信号传递的完整性，因此，第一硅光芯片801与电路板206表面平齐，同样地，第二硅光芯片901与电路板206表面平齐。由于第一硅光芯片801设于第一底座810表面，第二硅光芯片901设于第二底座910表面，若将第一底座810、第二底座910之间设于电路板206表面则第一硅光芯片801与电路板206的表面存在高度差，同样地，第二硅光芯片901与电路板206的表面存在高度差，因此，在电路板206表面局部区域挖空形成缺口2062，将第一底座810及第二底座910嵌设于缺口2062内，使得第一底座810及第二底座910相对于电路板206表面下沉，下沉至第一硅光芯片801与电路板206表面平齐，同样地，第二硅光芯片901与电路板206表面平齐。
图32为根据本公开一些实施例提供的一种电路板与第一单载波相干组件和第二单载波相干组件分离剖面示意图；图33为根据本公开一些实施例提供的一种底座结构示意图。如图32和图33所示，第一底座810的相邻两个侧壁之间形成有第一支撑凸起814，相邻两个侧壁之间形成有第二支撑凸起815。第二底座910相邻两个侧壁设置形成有第三支撑凸起914，相邻两个侧壁之间形成有第四支撑凸起915。
第一支撑凸起814与第三支撑凸起914相邻设置，第二支撑凸起815与第四支撑凸起915相邻设置；第一支撑凸起814与第二支撑凸起815相对设置，第三支撑凸起914与第四支撑凸起915相对设置。
第一支撑凸起814、第二支撑凸起815、第三支撑凸起914、第四支撑凸起915所围城的区域的顶表面与缺口2062处的底表面相连接，以实现第一底座810及第二底座910相对于电路板206表面下沉，下沉至第一硅光芯片801与电路板206表面平齐，同样地，第二硅光芯片901与电路板206表面平齐。
第一底座810的侧壁与第二底座910的侧壁相连接形成第一底座810与第二底座910之间的连接区域，第一支撑凸起814、第二支撑凸起815、第三支撑凸起914、第四支撑凸起915设于第一底座810与第二底座910不连接区域，这样可以使第一底座810与第二底座910尽量靠近，尽量减小二者之间的空隙，从而减小在电路板206上的占用空间。
第一支撑凸起814、第二支撑凸起815、第三支撑凸起914、第四支撑凸起915用于支撑电路板206；缺口2062嵌设至第一支撑凸起814、第二支撑凸起815、第三支撑凸起914、第四支撑凸起915表面，缺口2062分别与第一支撑凸起814、第二支撑凸起815、第三支撑凸起914、第四支撑凸起915连接，以实现电路板206与第一底座810或第二底座910之间的连接。示例性地，第一支撑凸起814、第二支撑凸起815、第三支撑凸起914、第四支撑凸起915承托着电路板206的底表面，尤其指缺口2062处的底表面。
由于第一底座810及第二底座910需相对于电路板206表面下沉，下沉至第一硅光芯片801与电路板206表面平齐，同样地，第二硅光芯片901与电路板206表面平齐，因此第一支撑凸起814、第二支撑凸起815表面所在的高度相对于第一底座810的顶表面更低，第三支撑凸起914、第四支撑凸起915表面所在的高度相对于第二底座910的顶表面更低。
第一支撑凸起814、第二支撑凸起815表面所在的高度至第一硅光芯片801表面的高度可为电路板206的厚度，第三支撑凸起914、第四支撑凸起915表面所在的高度至第二硅光芯片901表面的高度可为电路板206的厚度，以实现将电路板206的缺口2062嵌设至第一支撑凸起814、第二支撑凸起815、第三支撑凸起914、第四支撑凸起915表面时，可实现第一硅光芯片801与电路板206表面平齐，同样地，第二硅光芯片901与电路板206表面平齐。“顶表面”、“底表面”指的是在附图33中，在上的一表面为顶表面，在下的一表面为底表面。
第一底座810和第二底座910均相对于电路板206的顶表面更下沉，以使第一硅光芯片801与电路板206表面平齐，同样地，第二硅光芯片901与电路板206表面平齐；缺口2062处的底表面分别设于第一支撑凸起814、第二支撑凸起815、第三支撑凸起914、第四支撑凸起915表面，以实现电路板206、第一底座810、第二底座910之间的连接。
缺口2062处底表面与第一支撑凸起814、第二支撑凸起815、第三支撑凸起914、第四支撑凸起915的顶表面之间进行连接；示例性地，缺口2062处底表面与第一支撑凸起814、第二支撑凸起815、第三支撑凸起914、第四支撑凸起915的顶表面之间可通过胶水粘结。
第一底座810包括第一硅光芯片设置区811、第一光纤接头设置区812、第一激光盒容纳腔813。第一激光盒容纳腔813为第一底座810顶表面向下凹陷而形成，第一激光盒容纳腔813相对于第一硅光芯片设置区811、 第一光纤接头设置区812的表面更下沉。
第一硅光芯片设置区811、第一光纤接头设置区812相互垂直设置，第一光纤接头设置区812a、第一激光盒容纳腔813相互平行设置。
第二底座910包括第二硅光芯片设置区911、第二光纤接头设置区912、第二激光盒容纳腔913。第二激光盒容纳腔913为第二底座910顶表面向下凹陷而形成，第二激光盒容纳腔913相对于第二硅光芯片设置区911、第二光纤接头设置区912的表面更下沉。
同样地，第二硅光芯片设置区911、第二光纤接头设置区912相互垂直设置，第二光纤接头设置区912、第二激光盒容纳腔913相互平行设置。
以第一底座810为例，第一硅光芯片设置区811用于设置第一硅光芯片801，且第一硅光芯片801表面分别设有第一驱动调制器802、第一跨阻放大器803；其中第一驱动调制器802、第一跨阻放大器803采用倒装芯片方式倒装在第一硅光芯片801表面，则可避免第一硅光芯片801与第一驱动调制器802之间通过打线实现电连接，同样地，可避免第一硅光芯片801与第一跨阻放大器803之间通过打线实现电连接；倒装芯片方式可直接实现第一硅光芯片801与第一驱动调制器802之间通过相对的焊盘实现电连接，同样地，可直接实现第一硅光芯片801与第一跨阻放大器803之间通过相对的焊盘实现电连接。
第一光纤接头设置区812用于设置第一光纤接头805；第一光纤接头805用于供第一光纤806、第二光纤807穿过，从而固定第一光纤806、第二光纤807；第一光纤接头805包括第一基板和第二基板，第一基板和第二基板堆叠设置，第一光纤806、第二光纤807穿设于第一基板和第二基板之间；第二基板内部设有各光纤通道，各光纤通道设为V形凹槽形式，第一光纤806、第二光纤807设于V形凹槽内；V形凹槽有利于较好地定位各光纤。
第一激光盒容纳腔813可设置第一激光盒804，由于第一激光盒804内置激光芯片，且激光芯片下方设置TEC，使得激光芯片相对于第一硅光芯片801相对位置较高，因此为了使激光芯片的光轴与第一硅光芯片801的光轴在同一直线上；示例性地，将第一激光盒容纳腔813作凹陷设置，以使第一激光盒804下沉，进而实现激光芯片的光轴与第一硅光芯片801的光轴在同一直线上，增加第一激光盒804与第一硅光芯片801之间的光耦合效率。
在本公开的一些实施例中，第一底座810、第二底座910之间的设置既可以分别承载第一单载波相干组件800、第二单载波相干组件900中的各器件，还可以下沉至缺口2062的下方，实现第一硅光芯片801与电路板206平齐，第二硅光芯片901与电路板206平齐，还可以实现二者尽量靠近，减小占用空间。
在本公开的一些实施例中，第一激光盒804、第二激光盒904分别用于为第一硅光芯片801、第二硅光芯片901提供不携带数据的光；第一激光盒804、第二激光盒904的组成相同；以第一激光盒804为例对激光盒的结构进行说明。
图34为根据本公开一些实施例提供的第三种激光盒的结构图。如图34所示，第一激光盒804包括第一盖板8041和第一腔体8042；第一盖板8041和第一腔体8042盖合连接，二者形成一定空间；第一腔体8042中间设有容纳腔80422，相对的两个端部分别设有开口80421和凸台80423；凸台80423的表面相对于容纳腔80422的表面突出设置，凸台80423的表面相对于容纳腔80422的表面较高。凸台80423表面设有转接电路板8049b，开口80421内设有光窗8049a，光窗8049a与第一硅光芯片801通过光学匹配胶耦合连接。第一激光盒804发出的光穿过光窗8049a，耦合进入第一硅光芯片901a。
容纳腔80422内设有TEC8043、载板8045，TEC8043的表面设有激光芯片8044和准直透镜8046，载板8045表面设有隔离器8047及汇聚透镜8048。
由于在相干通信中，接收光信号与本振光信号的波长差(或频率差)需要小于某一特定值才能产生干涉并保证DSP芯片可以处理相应的信号，所以激光芯片4044的波长需要保持在非常稳定的状态，比如±1.5nm范围。因此本公开实施例中采用了TEC8043作为关键温控元件控制激光芯片9044a的波长，同时采用高精度温度传感器检测激光芯片8044的温度。
隔离器8047用于防止激光芯片8044发出的光经发射后回到激光芯片8044中，所以隔离器8047设置在激光芯片8044出光方向上；隔离器8047设置在准直透镜8046背向激光芯片8044的方向，即隔离器8047与激光芯片8044之间设置有准直透镜8046。
载板8045用于抬高隔离器8047及汇聚透镜8048所在的高度，使得隔离器8047及汇聚透镜8048的光轴、激光芯片8044的光轴、准直透镜8046的光轴在同一直线上。
准直透镜8046用于将激光芯片8044发出的发散光转化为平行光，汇聚透镜8048用于将平行光转化为汇聚光，从而以汇聚状态穿过光窗8049a，耦合进入第一硅光芯片801。
转接电路板8049b，一部分位于第一腔体8042内，一部分位于第一腔体8042外；转接电路板8049b位于第一腔体8042外部的一端通过打线或柔性电路板与电路板206电连接，从而将电路板206发出的驱动电信号传输至第一腔体8042内，即传输至激光芯片8044内，激光芯片8044在驱动电信号的作用下发出光。
为了进一步精准控制第一激光盒804发出的光波长，可在第一激光盒804内设置分光器、光学标准具、第一背光探测器及第二背光探测器；在一些实施例中，通过分光器将第一激光盒804发出的光分出一小部分，这一小部分光继续通过分光器分成两束光，一束光进入第一背光探测器，另一束光依次经过光学标准具、第二背光探测器；第一背光探测器所探测到的光功率为第一光功率P1，第二背光探测器所探测到的光功率为第二光功率P2，在实际应用中，假设第一激光盒804具有设定波长，设定波长为满足相干光源波长要求的波长；当波长发生变化时，第一光功率P1与第二光功率P2的比值发生变化，因此，第一光功率P1与第二光功率P2的比值可表征由于波长发生变化产生的光功率变化率，根据光功率变化率与设定波长对应的光功率之间的关系可以得到变化后波长，然后根据设定波长与变化后波长之间的关系，以此作为激光器的TEC的控制变量，形成闭环控制，调整温度便可将激光芯片射出光的波长调节至设定波长，实现波长的精确控制。
在本公开的一些实施例中，第一激光盒804在安装到电路板206上时，可将第一腔体8042的开口朝向光模块上壳体201。同样地，第二激光盒904如此。
在本公开的一些实施例中，为了更好地将DSP芯片产生的热量传导出去，在DSP芯片2061与光模块上壳体201之间设有导热垫片；为了将第一单载波相干组件800、第二单载波相干组件900产生的热量传导出去，在第一底座810、第二底座910与光模块下壳体202之间分别设有导热垫片，通过导热垫片与光模块上壳体的接触、导热垫片与光模块下壳体的接触可以更好地将热量通过光模块上壳体散发至光模块外部。
综合上述，本公开提供的光模块中，电路板206表面设有缺口2062，第一单载波相干组件800和第二单载波相干组件900嵌设于缺口2062内，本公开中第一单载波相干组件800实现单载波800Gb/s传输速率，第二单载波相干组件900实现单载波800Gb/s传输速率，从而提高光模块的传输速率。
以上所述，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，想到变化或替换，都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以所述权利要求的保护范围为准。

Claims (24)

  1. 一种光模块，包括：
    电路板；
    至少一个载波相干组件，设置于所述电路板表面，所述载波相干组件包括：
    至少一个载波组件，其中，所述载波组件包括：
    硅光芯片，侧面设有光口，所述硅光芯片被配置为进行光信号的调制与解调；
    激光盒，与所述电路板电连接，所述激光盒与所述硅光芯片连接，所述激光盒被配置为向所述硅光芯片输入不携带信号的光；
    光纤接头，设于所述电路板表面，所述光纤接头内部设有光纤，所述光纤端面与所述光口端面耦合连接；
    连接板，跨接于所述硅光芯片与所述光纤接头之间，所述连接板被配置为固定所述硅光芯片与所述光纤接头；
    第一电芯片，与所述硅光芯片电连接；以及
    第二电芯片，与所述硅光芯片电连接；
    U形槽盖壳，侧面形成有限位凸起，表面形成有第一U形槽，所述第一U形槽被配置为避让所述连接板，并使硅光芯片的光波导暴露出来；
    U形槽基板，与所述电路板电连接，所述U形槽基板侧面形成有限位凹槽，所述限位凹槽与所述限位凸起连接；所述U形槽基板表面形成有第二U形槽，所述硅光芯片与所述U形槽基板电连接，所述硅光芯片设于所述第二U形槽表面，且所述硅光芯片边缘与所述U形槽基板边缘不对齐；所述U形槽基板被配置为抬高所述硅光芯片所在高度，并进行电信号的转接；
    其中，所述至少一个载波相干组件包括双载波相干组件，在所述双载波相干组件中，所述U形槽盖壳包括双U形槽盖壳，所述双U形槽盖壳表面形成有两个所述第一U形槽，所述双U形槽盖壳侧面形成有所述限位凸起；所述U形槽基板包括双U形槽基板，所述双U形槽基板表面形成有两个所述第二U形槽，所述双U形槽基板侧面形成有所述限位凹槽；所述至少一个载波组件包括第一载波组件和第二载波组件。
  2. 根据权利要求1所述的光模块，其中，所述第一电芯片设于所述U形槽基板朝向所述U形槽盖壳的一侧表面，且所述第一电芯片设于所述硅光芯片的侧面；
    所述第二电芯片设于所述U形槽基板朝向所述U形槽盖壳的一侧表面，且所述第二电芯片设于所述硅光芯片的侧面。
  3. 根据权利要求1所述的光模块，其中，所述光纤接头内部分别设有第一光纤、第二光纤和第三光纤；
    所述载波组件还包括：
    第一光纤适配器，与所述第一光纤连接；
    第二光纤适配器，与所述第二光纤连接；以及
    第三光纤适配器，与所述第三光纤连接。
  4. 根据权利要求1所述的光模块，其中，所述至少一个载波相干组件包括第一双载波相干组件和第二双载波相干组件；所述第一双载波相干组件和所述第二双载波相干组件分别设于所述电路板的上下表面。
  5. 根据权利要求4所述的光模块，其中，所述第一双载波相干组件的双U形槽盖壳朝向所述电路板；
    所述第二双载波相干组件的双U形槽盖壳朝向所述电路板。
  6. 根据权利要求4所述的光模块，其中，所述第一双载波相干组件的第一载波组件在所述电路板下表面的投影，与所述第二双载波相干组件的第一载波组件不重合；
    所述第一双载波相干组件的第二载波组件在所述电路板下表面的投影，与所述第二双载波相干组件的第二载波组件不重合。
  7. 根据权利要求1所述的光模块，其中，所述至少一个载波相干组件包括单载波相干组件，在所述单载波相干组件中：
    所述U形槽盖壳包括单U形槽盖壳，所述单U形槽盖壳表面形成有一个所述第一U形槽，所述单U形槽盖壳侧面形成有所述限位凸起；
    所述U形槽基板包括单U形槽基板，所述单U形槽基板表面形成有一个所述第二U形槽，所述单U形槽基板侧面形成有所述限位凹槽；
    所述至少一个载波组件包括第一载波组件。
  8. 根据权利要求7所述的光模块，其中，所述单载波相干组件至少为两个，至少两个所述单载波相干组件包括第一单载波相干组件和第二单载波相干组件，所述第一单载波相干组件和所述第二单载波相干组件分别设于所述电路板的上下表面。
  9. 根据权利要求8所述的光模块，其中，所述第一单载波相干组件的单U形槽盖壳朝向所述电路板；
    所述第二单载波相干组件的单U形槽盖壳朝向所述电路板。
  10. 根据权利要求8所述的光模块，其中，所述第一单载波相干组件的第一载波组件在所述电路板下表面的投影，与所述第二单载波相干组件的第一载波组件不重合；
    所述第一单载波相干组件的第二载波组件在所述电路板下表面的投影，与所述第二单载波相干组件的第二载波组件不重合。
  11. 根据权利要求1所述的光模块，其中，所述激光盒包括：
    盖板，相对于腔体更远离所述电路板；
    所述腔体，包括相对设置的第一表面和第二表面，所述第一表面具有开口，所述第一表面与所述盖板盖合连接，所述第二表面与所述电路板接触连接，内部具有容纳腔，一端部具有通孔，另一端部设有凸台；
    所述容纳腔，内部设有TEC和载板，所述TEC表面设有激光芯片和准直透镜，所述载板表面设有隔离器和汇聚透镜；
    所述通孔，内部设有光纤适配器，所述光纤适配器与所述第一光纤连接；
    所述凸台，表面设有转接电路板；
    所述转接电路板，设于所述腔体内部的一端与所述激光芯片电连接，设于所述腔体外部的一端与所述电路板电连接，以实现所述电路板与所述激光芯片之间的电连接。
  12. 根据权利要求11所述的光模块，其中，所述激光盒还包括：
    激光芯片，用于发出光；
    分光器，包括第一反射面和第二反射面，所述第一反射面用于将所述激光芯片发出的光分为射出光及第一反射光，所述第二反射面用于将所述第一反射光分为参考光和第二反射光；
    第一背光探测器，用于接收并探测所述参考光的光功率；
    光学标准具，用于接收所述第二反射光，并输出监测光；
    第二背光探测器，用于接收并探测所述监测光的光功率。
  13. 根据权利要求1所述的光模块，其中，所述激光盒的顶表面与所述光模块的上壳体之间设有导热垫片；
    所述U形槽盖壳与所述光模块的上壳体之间设有导热垫片。
  14. 根据权利要求1所述的光模块，其中，每个所述载波相干组件还包括：
    底座，嵌设于所述电路板的缺口内，所述底座相对于所述电路板表面下沉设置，所述底座表面分别形成有硅光芯片设置区、光纤接头设置区以及激光盒容纳腔；所述硅光芯片设置区与所述光纤接头设置区处于同一表面，所述激光盒容纳腔表面相对于所述硅光芯片设置区表面下沉；
    硅光芯片，设于所述硅光芯片设置区表面，所述硅光芯片与所述电路板电连接，所述第一硅光芯片侧面具有第一输入光口、第二输入光口和输出光口；
    激光盒，表面高于所述硅光芯片表面，所述激光盒设于所述激光盒容纳腔表面，且所述激光盒出光轴与所述第一输入光口处于同一水平线上，所述激光盒被配置为射出不携带信号的光；
    光纤接头，表面高于所述激光盒表面，所述光纤接头设于所述光纤接头设置区表面，所述光纤接头内部设有输入光纤和输出光纤，所述输入光纤与所述第二输入光口耦合连接，所述输出光纤与所述输出光口耦合连接；
    第一电芯片，与所述硅光芯片电连接；以及
    第二电芯片，与所述硅光芯片电连接。
  15. 根据权利要求14所述的光模块，其中，所述载波相干组件为两个，两个所述载波相干组件包括第一载波相干组件和第二载波相干组件；
    所述第一载波相干组件的所述底座为第一底座，所述
    第一底座包括第一侧壁、第二侧壁、第三侧壁及第四侧壁；
    所述第二载波相干组件的所述底座为第二底座，所述第二底座包括第五侧壁、第六侧壁、第七侧壁及第八侧壁；
    所述第一侧壁与所述第五侧壁相连接；
    所述第二侧壁与所述第四侧壁之间形成有第一支撑凸起，所述第三侧壁与所述第四侧壁之间形成有第二支撑凸起；
    所述第六侧壁与所述第八侧壁之间形成有第三支撑凸起，所述第七侧壁与所述第八侧壁之间形成有第四支撑凸起；
    所述第一支撑凸起、所述第二支撑凸起表面所在高度相对于所述第一底座表面更低；
    所述第三支撑凸起、所述第四支撑凸起表面所在高度相对于所述第二底座表面更低。
  16. 根据权利要求15所述的光模块，其中，所述第一支撑凸起、所述第二支撑凸起、所述第三支撑凸起及所述第四支撑凸起用于支撑所述电路板；
    所述缺口嵌设至所述第一支撑凸起、所述第二支撑凸起、所述第三支撑凸起及所述第四支撑凸起表面。
  17. 根据权利要求15所述的光模块，所述第一底座与所述第二底座并列设置。
  18. 根据权利要求15所述的光模块，其中，所述第一底座表面包括第一硅光芯片设置区、第一光纤接头设置区及第一激光盒容纳腔；
    所述第一激光盒容纳腔相对于所述第一硅光芯片设置区或所述第一光纤接头设置区更下沉；
    所述第二底座表面具有第二硅光芯片设置区、第二光纤接头设置区及第二激光盒容纳腔；
    所述第二激光盒容纳腔相对于所述第二硅光芯片设置区或所述第二光纤接头设置区更下沉。
  19. 根据权利要求14所述的光模块，其中，所述激光盒包括：
    盖板；
    腔体，与所述盖板盖合连接，所述腔体底端设于所述电路板表面，所述腔体一端具有开口，所述腔体另一端设有凸台；
    所述开口，嵌设有光窗；
    所述凸台，表面设有转接电路板；
    所述转接电路板，设于所述腔体内部的一端与所述激光芯片电连接，所述转接电路板设于所述腔体外部的一端与所述电路板电连接，以实现所述电路板与所述激光芯片之间的电连接；
    容纳腔，设于所述腔体内部，所述容纳腔表面设有TEC和载板，所述TEC表面设有激光芯片和准直透镜，所述载板表面设有隔离器和汇聚透镜。
  20. 根据权利要求14所述的光模块，其中，所述第一电芯片和所述第二电芯片均设于所述硅光芯片表面。
  21. 根据权利要求14所述的光模块，其中，所述硅光芯片与所述电路板打线连接；
    所述硅光芯片与所述第一电芯片焊接连接；
    所述硅光芯片与所述第二电芯片焊接连接。
  22. 根据权利要求15所述的光模块，其中，所述第一载波相干组件包括第一硅光芯片，所述第一硅光芯片表面与所述电路板表面平齐；
    所述第二载波相干组件包括第二硅光芯片，所述第二硅光芯片表面与所述电路板表面平齐。
  23. 根据权利要求22所述的光模块，其中，所述第一硅光芯片表面具有第一高频信号焊盘及第一低频信号焊盘；
    所述第二硅光芯片表面具有第二高频信号焊盘及第二低频信号焊盘。
  24. 根据权利要求22所述的光模块，其中，所述第一载波相干组件包括第一激光盒；
    所述第二载波相干组件包括第二激光盒；
    所述第一硅光芯片与所述第一激光盒之间通过耦合胶连接；
    所述第二硅光芯片与所述第二激光盒之间通过耦合胶连接。
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