WO2024044879A1 - 显示基板和触控显示装置 - Google Patents

显示基板和触控显示装置 Download PDF

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Publication number
WO2024044879A1
WO2024044879A1 PCT/CN2022/115462 CN2022115462W WO2024044879A1 WO 2024044879 A1 WO2024044879 A1 WO 2024044879A1 CN 2022115462 W CN2022115462 W CN 2022115462W WO 2024044879 A1 WO2024044879 A1 WO 2024044879A1
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WIPO (PCT)
Prior art keywords
layer
shielding
display substrate
touch
functional film
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PCT/CN2022/115462
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English (en)
French (fr)
Inventor
王威
文平
张毅
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to CN202280002889.XA priority Critical patent/CN117957939A/zh
Priority to PCT/CN2022/115462 priority patent/WO2024044879A1/zh
Publication of WO2024044879A1 publication Critical patent/WO2024044879A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details

Definitions

  • the present disclosure relates to the field of display technology, and in particular, to a display substrate and a touch display device.
  • touch display products have been widely used in many fields.
  • Touch display products have both touch and display functions.
  • the functional control of the touch display product can be realized by touching the screen of the touch display product.
  • the purpose of this disclosure is to provide a display substrate and a touch display device.
  • a first aspect of the present disclosure provides a display substrate, including: a substrate substrate and a functional film layer disposed on the substrate substrate, the functional film layer being able to reflect external light radiating toward the functional film layer;
  • the display substrate further includes an encapsulation layer and a shielding layer.
  • the shielding layer is located on a side of the functional film layer facing away from the base substrate.
  • the encapsulation layer is located between the shielding layer and the functional film layer.
  • the display substrate includes a display area and a frame area surrounding the display area, the frame area includes a bending area, and at least part of the functional film layer is located between the bending area and the display area. between.
  • the functional film layer includes at least a portion extending along the first direction
  • the occlusion layer includes a plurality of first occlusion graphics, the first occlusion graphics include at least a portion extending along a first direction, the plurality of first occlusion graphics are arranged along a second direction, and the second direction is consistent with the The first direction intersects; at least part of the orthographic projection of the first shielding pattern on the base substrate and the orthographic projection of the functional film layer on the base substrate at least partially overlap.
  • the ratio of the width of the first occlusion pattern in a direction perpendicular to its own extension and the minimum spacing between adjacent first occlusion patterns is greater than or equal to 3:2.
  • the display substrate further includes a shielding line, at least part of the shielding line is located between two adjacent first shielding patterns.
  • the minimum distance between the first shielding pattern and the shielding line is greater than or equal to 4 microns.
  • the minimum distance between the first shielding pattern and the shielding line is equal to 0.4 times the width of the first shielding pattern in a direction perpendicular to its own extension.
  • the functional film layer includes at least a portion extending along the first direction
  • the shielding layer includes a whole second shielding pattern.
  • the second shielding pattern includes a coupled shielding main part and a shielding extension part.
  • the shielding main part extends along the first direction.
  • the shielding main part The orthographic projection on the base substrate at least partially overlaps the orthographic projection of the functional film layer on the base substrate.
  • the shielding extension part is reused as a shielding line in the display substrate.
  • the display substrate further includes an anode layer, the functional film layer and the anode layer are made of the same layer and material, and the functional film layer serves as a positive power signal bus or a negative power signal bus in the display substrate. .
  • the display substrate further includes an organic layer, with organic trenches formed on the organic layer;
  • the shielding line is located on a side of the organic layer facing away from the base substrate.
  • the shielding line includes a first shielding portion spanning the organic trench. The boundaries of the organic trenches extend vertically.
  • the organic layer includes a pixel defining layer and a flat layer, at least part of the flat layer is located between the pixel defining layer and the base substrate; a first organic trench is formed on the pixel defining layer. groove, a second organic groove is formed on the flat layer, and the orthographic projection of the first organic groove on the base substrate is the same as the orthographic projection of the second organic groove on the base substrate. at least partially overlap;
  • the extending direction of the first shielding portion is perpendicular to the extending direction of the boundary of the first organic trench that it spans, and perpendicular to the extending direction of the boundary of the second organic trench that it spans.
  • the display substrate further includes: a plurality of touch signal lines, the touch signal lines include a first touch portion spanning the organic trench, the extension direction of the first touch portion, and its The extending direction of the boundary across the organic trench is vertical.
  • the display substrate further includes a plurality of first virtual graphics arranged along the first direction, the first virtual graphics extending along the second direction, and the first virtual graphics spanning the organic trench,
  • the first virtual graphic and the shielding line are arranged in the same layer and in the same material.
  • the plurality of first virtual graphics are divided into a plurality of first virtual graphics groups, and the plurality of first virtual graphics groups are arranged along the first direction;
  • the plurality of touch signal lines are divided into a plurality of touch signal line groups, at least part of the touch signal line group and the first virtual graphics group are alternately arranged along the first direction; at least part of the shielding line Located between the adjacent touch signal line group and the first virtual graphics group.
  • At least part of the orthographic projection of the organic trench on the base substrate is located between the bending area and the display area.
  • the display substrate further includes: a plurality of touch signal lines, the touch signal lines include a first touch part, a second touch part and a third touch part connected end to end in sequence, the The first touch part and the second touch part are located in the frame area, and the third touch part is located in the display area;
  • the second touch portion included in at least part of the touch signal lines forms a winding structure, and the resistances of the plurality of touch signal lines are substantially the same.
  • the second touch part includes a first access end, a second access end and a winding structure, and the winding structure is connected to the first access end and the second access end respectively.
  • the access end is coupled, the first access end is coupled with the corresponding first touch part, and the second access end is coupled with the corresponding third touch part;
  • the first access end includes at least a portion extending along the second direction
  • the second access end includes at least a portion extending along the second direction
  • the plurality of second access end portions included in the plurality of touch signal lines are arranged along the first direction, and at least some of the adjacent second access end portions among the plurality of second access end portions are A virtual winding structure is provided between them.
  • the width of the second access end in a direction perpendicular to its own extension is three times the line width of the winding structure.
  • the touch signal line and the shielding layer are arranged in the same layer and made of the same material.
  • a second aspect of the present disclosure provides a touch display device, including the above display substrate.
  • Figure 1 is a schematic structural diagram of a lower frame of a display substrate provided by an embodiment of the present disclosure
  • Figure 2 is an enlarged schematic diagram of part of the structure of part X1 in Figure 1;
  • Figure 3 is an enlarged schematic diagram of another structure used at the location of the X1 part in Figure 1;
  • Figure 4 is an enlarged schematic diagram of part of the structure of part X2 in Figure 1;
  • Figure 5 is an enlarged schematic diagram of part of the structure of part X3 in Figure 1;
  • Figure 6 is an enlarged schematic diagram of part of the structure of part X4 in Figure 1;
  • Figure 7 is a first cross-sectional schematic view of the display structure part of the display substrate provided by an embodiment of the present disclosure
  • Figure 8 is a second cross-sectional schematic diagram of the display structure part of the display substrate provided by an embodiment of the present disclosure.
  • Figure 9 is a schematic top structural view of a display substrate provided by an embodiment of the present disclosure.
  • Figure 10 is a schematic structural diagram of a touch electrode layer included in the touch structure part of a display substrate according to an embodiment of the present disclosure
  • Figure 11 is a schematic circuit structure diagram of a sub-pixel driving circuit in LTPS mode in a display substrate according to an embodiment of the present disclosure
  • Figure 12 is a schematic layout diagram of a sub-pixel driving circuit in LTPS mode in a display substrate according to an embodiment of the present disclosure
  • Figure 13 is a schematic layout diagram of sub-pixels in LTPS mode in a display substrate according to an embodiment of the present disclosure
  • Figure 14 is a schematic circuit structure diagram of a sub-pixel driving circuit in LTPO mode in a display substrate according to an embodiment of the present disclosure
  • Figure 15 is a schematic layout diagram of a sub-pixel driving circuit in LTPO mode in a display substrate according to an embodiment of the present disclosure
  • FIG. 16 is a schematic layout diagram of sub-pixels in the LTPO mode in a display substrate according to an embodiment of the present disclosure.
  • the present disclosure provides a touch display product.
  • the touch display product includes a display area and a frame area located around the display area.
  • the frame area includes a functional film layer of the same layer and material as the anode layer in the display area. , this functional film layer can be used as a signal line to realize signal transmission function.
  • the functional film layer Due to the material limitations of the functional film layer, when the touch display product is used in an environment illuminated by strong light, the functional film layer will reflect the light shining on its surface, causing light leakage in the touch display product and affecting the user experience.
  • a display substrate including: a substrate and a functional film layer 10 disposed on the substrate.
  • the functional film layer 10 can reflect external radiation.
  • the light of the functional film layer 10; the display substrate also includes an encapsulation layer and a shielding layer 20.
  • the shielding layer 20 is located on the side of the functional film layer 10 facing away from the base substrate; the encapsulation layer is located on Between the shielding layer 20 and the functional film layer 10, the orthographic projection of the shielding layer 20 on the base substrate and the orthographic projection of the functional film layer 10 on the base substrate at least partially intersect.
  • Stack the orthographic projection of the shielding layer 20 on the base substrate and the orthographic projection of the functional film layer 10 on the base substrate at least partially intersect.
  • the functional film layer 10 serves as a positive power signal bus in the display substrate.
  • the positive power signal bus can be coupled to the driver chip in the display substrate and the power line located in the display area 30 in the display substrate.
  • the positive power signal provided by the driver chip is transmitted to the power line.
  • the functional film layer 10 serves as a negative power signal bus in the display substrate.
  • the negative power signal bus can be coupled to the driving chip in the display substrate and the cathode located in the display area 30 in the display substrate to drive the The negative power signal provided by the chip is transmitted to the cathode.
  • the display substrate further includes an encapsulation layer
  • the functional film layer 10 is disposed between the encapsulation layer and the base substrate, and the functional film layer 10 is covered by the encapsulation layer.
  • the shielding layer 20 is located on the side of the encapsulation layer facing away from the functional film layer 10 and facing away from the base substrate.
  • the orthographic projection of the shielding layer 20 on the base substrate is consistent with the functional film layer. 10 Orthographic projections on the base substrate at least partially overlap. Exemplarily, the orthographic projection of the shielding layer 20 on the base substrate completely covers the orthographic projection of the functional film layer 10 on the base substrate.
  • a shielding layer 20 is provided on the side of the encapsulation layer facing away from the base substrate, and the shielding layer 20 is disposed on the side of the encapsulation layer facing away from the base substrate.
  • the orthographic projection on the base substrate and the orthographic projection of the functional film layer 10 on the base substrate at least partially overlap, so that when the external light hits the functional film layer 10, it can be blocked by the blocking layer. 20 is blocked to prevent light from hitting the functional film layer 10 and being reflected by the functional film layer 10 , thereby avoiding light leakage of the display substrate in practical applications and affecting the user experience.
  • the display substrate includes a display area 30 and a frame area 31 surrounding the display area 30 .
  • the frame area 31 includes a bending area 310 , and the functional film At least part of the layer 10 is located between the bending area 310 and the display area 30 .
  • the bending area 310 is located at the lower frame of the display substrate, and the functional film layer 10 is located at the lower frame of the display substrate, but it is not limited thereto.
  • the functional film layer 10 can also be located on the upper border, left border or right border of the display substrate.
  • the functional film layer 10 can also be set.
  • the blocking layer 20 blocks the functional film layer 10 to prevent light leakage caused by reflection of the functional film layer 10 .
  • the functional film layer 10 includes at least a portion extending along the first direction
  • the shielding layer 20 includes a plurality of first shielding graphics 201, the first shielding graphics 201 include at least a portion extending along a first direction, the plurality of first shielding graphics 201 are arranged along a second direction, and the second The direction intersects the first direction; at least part of the orthographic projection of the first shielding pattern 201 on the base substrate at least partially overlaps with the orthographic projection of the functional film layer 10 on the base substrate. .
  • the first direction includes the transverse direction
  • the second direction includes the longitudinal direction, but is not limited thereto.
  • the functional film layer 10 includes a plurality of first shielding patterns 201, and the first shielding patterns 201 may be strip patterns extending along the first direction, but are not limited thereto.
  • the orthographic projection of the first shielding pattern 201 on the base substrate is covered by the orthographic projection of the functional film layer 10 on the base substrate.
  • the above arrangement of the shielding layer 20 including the plurality of first shielding patterns 201 can effectively reduce the layout difficulty of the shielding layer 20 while ensuring the shielding effect of the shielding layer 20 .
  • the ratio of the width of the first occlusion pattern 201 in the direction perpendicular to its own extension to the minimum spacing between adjacent first occlusion patterns 201 is greater than or equal to 3:2.
  • the width of the first blocking pattern 201 in a direction perpendicular to its own extension is between 8 microns and 10 microns, and may include endpoint values.
  • the width of the first shielding pattern 201 in the direction perpendicular to its own extension is 9 microns.
  • the minimum spacing between adjacent first shielding patterns 201 is between 5 microns and 9 microns, including endpoint values.
  • the minimum distance between adjacent first shielding patterns 201 can be selected as 6 microns, 7 microns, or 8 microns.
  • Arranging the plurality of first shielding patterns 201 in the above manner can effectively reduce the layout difficulty of the shielding layer 20 while ensuring the shielding effect of the shielding layer 20 .
  • the display substrate further includes a shielding line 40 , at least part of the shielding line 40 is located between two adjacent first shielding patterns 201 .
  • the shielded wire 40 includes a coupled first shielding portion 401 and a second shielding portion 402.
  • the first shielding portion 401 includes at least a portion extending along the second direction.
  • the second shielding portion 401 includes at least a portion extending along the second direction.
  • Portion 402 includes at least a portion extending along the first direction.
  • the first shielding part 401 and the second shielding part 402 are formed into an integrated structure, and the second shielding part 402 is located between two adjacent first shielding patterns 201 .
  • the first shielding part 401 is coupled to the driving chip in the display substrate and receives the ground signal provided by the driving chip.
  • the orthographic projection of the shielding line 40 on the base substrate at least partially overlaps with the orthographic projection of the functional film layer 10 on the base substrate, and the shielding line 40 and the The shielding layer 20 is arranged on the same layer and with the same material.
  • the display substrate includes two shielding wires 40, the two shielding wires 40 are arranged in mirror images, and there is a gap between the two second shielding portions 402 included in the two shielding wires 40. .
  • the above arrangement of at least part of the shielding line 40 between two adjacent first shielding patterns 201 can effectively reduce crosstalk between different structures of the display substrate in the frame area 31.
  • the minimum distance between the first shielding pattern and the shielding line is greater than or equal to 4 microns.
  • the minimum distance between the first shielding pattern and the shielding line is equal to 0.4 of the width of the first shielding pattern in a direction perpendicular to its own extension. times.
  • the minimum spacing between the first blocking pattern and the shielding line is greater than or equal to 4 microns.
  • the minimum distance between the first blocking pattern and the shielding line is equal to the first blocking pattern 0.4 times the width perpendicular to the direction of its own extension.
  • the minimum spacing between the first shielding pattern 201 and the shielding line 40 is between 4 microns and 6 microns, including endpoint values.
  • the minimum distance between the first shielding pattern 201 and the shielding line 40 is 5 microns.
  • Arranging the first shielding pattern 201 and the shielding line 40 in the above manner can effectively reduce the shielding effect of the shielding layer 20 while ensuring the shielding effect of the shielding layer. 20 and the difficulty of layout of the shielding layer.
  • the functional film layer 10 includes at least a portion extending along the first direction
  • the shielding layer 20 includes a whole second shielding pattern 202.
  • the second shielding pattern 202 includes a coupled shielding main part 2021 and a shielding extension part 2022.
  • the shielding main part 2021 extends along the first direction.
  • the orthographic projection of the shielding main part 2021 on the base substrate at least partially overlaps with the orthographic projection of the functional film layer 10 on the base substrate.
  • the shielding main part 2021 and the shielding extension part 2022 are formed into an integrated structure.
  • the shielding main part 2021 extends along the first direction, and the shielding extension part 2022 includes at least a portion extending along the second direction.
  • the second shielding pattern 202 includes two shielding extension parts 2022, and two ends of the shielding main part 2021 are respectively coupled to the two shielding extension parts 2022 in one-to-one correspondence.
  • the orthographic projection of the shielding body portion 2021 on the base substrate to at least partially overlap with the orthographic projection of the functional film layer 10 on the base substrate, It is possible to better achieve the light-shielding effect of the shielding layer 20 while reducing the resistance of the shielding layer 20 .
  • the shielding extension 2022 is multiplexed as a shielding line 40 in the display substrate.
  • the shielding extension 2022 is coupled to a driver chip included in the display substrate, and receives a ground signal provided by the driver chip.
  • the above-mentioned multiplexing of the shielding extension portion 2022 as the shielding line 40 in the display substrate not only ensures the light-shielding effect of the shielding layer 20, but also prevents the shielding layer 20 from being in a floating state and interfacing with other conductive structures. crosstalk occurs. Moreover, there is no need to provide additional shielding wires 40 specifically for shielding in the display substrate, which reduces the layout difficulty of the display substrate.
  • the display substrate further includes an anode layer, and the functional film layer 10 and the anode layer are arranged in the same layer and made of the same material.
  • the functional film layer 10 serves as a positive power signal bus in the display substrate or Negative power signal bus.
  • the anode layer is made of indium tin oxide material, and the functional film layer 10 and the anode layer are arranged in the same layer and with the same material.
  • the functional film layer 10 and the anode layer can be formed in the same patterning process. formed at the same time.
  • the functional film layer 10 can serve as a positive power signal bus or a negative power signal bus in the display substrate, but is not limited thereto.
  • the display substrate further includes an organic layer, and organic trenches 50 are formed on the organic layer;
  • the shielding line 40 is located on a side of the organic layer facing away from the base substrate.
  • the shielding line 40 includes a first shielding portion 401 spanning the organic trench 50 , and an extension of the first shielding portion 401 The direction is perpendicular to the extending direction of the boundary of the organic trench 50 that it spans.
  • the organic layer is located between the base substrate and the packaging layer.
  • the encapsulation layer includes a first inorganic encapsulation layer, an organic encapsulation layer and a second inorganic encapsulation layer that are stacked in sequence. Since the depth of the organic trench 50 formed on the organic layer is relatively deep, the organic encapsulation layer cannot fill the organic trench 50 flatly, so that in the area where the organic trench 50 is located, in the package There are steps on the surface of the layer facing away from the base substrate.
  • the shielding line 40 is located on a side of the encapsulation layer facing away from the base substrate, and the first shielding portion 401 of the shielding line 40 can span the organic trench 50 .
  • the extension direction of the first shielding portion 401 to be perpendicular to the extension direction of the boundary of the organic trench 50 it spans, it is possible to make the organic trench 50 spanned by the first shielding portion 401 At the boundary of the trench 50, the contact area between the first shielding portion 401 and the step surface formed by the organic trench 50 across it is minimized, so that during the formation of the first shielding portion 401 using a patterning process , effectively reducing the residue of the first shielding part 401 on the step surface, and reducing the risk of short circuit between the first shielding part 401 and other surrounding conductive structures.
  • the organic layer includes a pixel defining layer and a flat layer, at least part of the flat layer is located between the pixel defining layer and the base substrate; a first layer is formed on the pixel defining layer.
  • the extension direction of the first shielding portion 401 is perpendicular to the extension direction of the boundary of the first organic trench it spans, and perpendicular to the extension direction of the boundary of the second organic trench it spans.
  • the total depth of the first organic trench and the second organic trench is between 3 microns and 3.5 microns, endpoint values may be included.
  • At least part of the flat layer is located between the pixel defining layer and the base substrate, and at least part of the anode layer included in the display substrate is located between the pixel defining layer and the flat layer.
  • the orthographic projection of the first organic trench on the base substrate at least partially overlaps with the orthographic projection of the second organic trench on the base substrate, forming a step difference of about 3 microns. , the organic encapsulation layer cannot fill this gap.
  • the extension direction of the first shielding portion 401 by setting the extension direction of the first shielding portion 401 to be perpendicular to the extension direction of the boundary of the first organic trench it spans, and the extension direction of the boundary of the first organic trench it spans, and the extension direction of the first shielding portion 401 spans.
  • the extension direction of the boundary is vertical, so that at the boundary of the first organic trench spanned by the first shielding portion 401 and the boundary of the second organic trench, the first shielding portion 401 and the boundary spanned by the first
  • the contact area between the step surfaces formed by the organic trenches is minimized, and the contact area between the first shielding portion 401 and the step surfaces formed by the second organic trenches it spans is minimized, so that the patterning process is used to form the contact area.
  • the residue of the first shielding part 401 on the step surface is effectively reduced, and the risk of short circuit between the first shielding part 401 and other surrounding conductive structures is reduced. .
  • the display substrate further includes: a plurality of touch signal lines 60 , and the touch signal lines 60 include a third line across the organic trench 50 .
  • a touch portion 601 , the extending direction of the first touch portion 601 is perpendicular to the extending direction of the boundary of the organic trench 50 that it spans.
  • the touch signal line 60 is located on a side of the encapsulation layer facing away from the base substrate, and is used for transmitting touch signals.
  • the touch signal line 60 can extend from the display area 30 of the display substrate to the lower frame area of the display substrate.
  • the first touch portion 601 included in the touch signal line 60 is located in the lower frame area.
  • the first touch portion 601 spans the display substrate.
  • the contact area between the first touch portion 601 and the step surface formed by the organic trench 50 across it is minimized, so that the touch signal line 60 is formed using a patterning process.
  • the residue of the first touch portion 601 on the step surface is effectively reduced, and the risk of short circuit between the first touch portion 601 and other surrounding conductive structures is reduced.
  • the display substrate further includes a plurality of first virtual graphics 70 arranged along the first direction, and the first virtual graphics 70 are arranged along the second direction. Extending in the direction, the first dummy pattern 70 spans the organic trench 50 , and the first dummy pattern 70 and the shielding line 40 are arranged in the same layer and with the same material.
  • the first virtual pattern 70, the touch signal line 60, the shielding line 40, and the shielding layer 20 are all arranged in the same layer and with the same material, and can be formed simultaneously in the same patterning process, so that It can effectively simplify the manufacturing process of the display substrate and reduce the manufacturing cost of the display substrate.
  • the first virtual graphics 70, the touch signal line 60, and the shielding line can be added. 40, and the contact area between the film layer where the shielding layer 20 is located and its underlying film layer, thereby increasing the touch signal line 60, the shielding line 40, and the film layer where the shielding layer 20 is located and its underlying layer.
  • the bonding strength between film layers improves the yield of display substrates.
  • the plurality of first virtual graphics 70 are divided into a plurality of first virtual graphics groups 70-Z, and the plurality of first virtual graphics groups 70-Z are along a first direction. arrangement;
  • the plurality of touch signal lines 60 are divided into a plurality of touch signal line groups 60-Z. At least part of the touch signal line groups 60-Z is along the first direction with the first virtual graphic group 70-Z. Arranged alternately; at least part of the shielding lines 40 is located between the adjacent touch signal line group 60 -Z and the first virtual graphics group 70 -Z.
  • the plurality of first virtual graphics 70 are divided into a plurality of first virtual graphics groups 70-Z, and each first virtual graphics group 70-Z includes a plurality of first virtual graphics 70 arranged along the first direction.
  • the plurality of touch signal lines 60 are divided into a plurality of touch signal line groups 60 -Z, and each touch signal line group 60 -Z includes a plurality of touch signal lines 60 arranged along the first direction.
  • the touch signal line group 60 -Z is alternately arranged with the first virtual graphics group 70 -Z along the first direction, and at least part of the shielding line 40
  • the portion is located between the adjacent touch signal line group 60 -Z and the first virtual graphics group 70 -Z, and the shielding wire 40 can well shield the first virtual graphics 70 from the
  • the interference generated by the touch signal line 60 ensures the accuracy of the touch signal transmitted by the touch signal line 60 .
  • At least part of the orthographic projection of the organic trench 50 on the base substrate is located between the bending area 310 and the display area 30 .
  • the display substrate further includes a blocking wall structure 51.
  • the orthographic projection of the blocking wall structure 51 on the base substrate is located between the orthographic projection of the organic trench 50 on the base substrate and between the display areas 30 .
  • the display substrate further includes: a plurality of touch signal lines 60.
  • the touch signal lines 60 include first touch portions 601 connected end to end in sequence, The second touch part 602 and the third touch part 603.
  • the first touch part 601 and the second touch part 602 are located in the frame area 31.
  • the third touch part 603 is located in the display area. Area 30;
  • At least part of the second touch portion 602 included in the touch signal line 60 forms a winding structure 6023, and the resistances of the plurality of touch signal lines 60 are substantially the same.
  • the winding structure 6023 includes a plurality of straight edge portions 6023a and a plurality of corner portions 6023b.
  • the straight edge portions 6023a extend along the first direction.
  • the corner portion 6023b extends along the second direction, the plurality of straight edge portions 6023a are sequentially arranged along the second direction, the plurality of straight edge portions 6023a are connected end to end in sequence, and the two connected straight edges
  • the portions 6023a are connected through the corner portions 6023b, so that the winding structure 6023 is formed into a similar arcuate structure.
  • the winding structures 6023 formed by the second touch portions 602 in each of the touch signal lines 60 may be the same or different, that is, the second touch portions 602 in each of the touch signal lines 60
  • the lengths can be the same or different.
  • the resistance of the second touch part 602 can be adjusted, thereby adjusting the resistance of the touch signal line 60.
  • the winding structure 6023 is formed by arranging at least part of the second touch portion 602 included in the touch signal line 60, so that the second touch portion in each touch signal line 60 can be adjusted.
  • the winding length of the winding structure 6023 included in the control part 602 adjusts the overall resistance of each touch signal line 60, thereby achieving approximately the same resistance of the multiple touch signal lines 60 in the display substrate, effectively improving the transmission of the display substrate. Touch signal accuracy.
  • the display substrate provided by the above embodiments can be used in watch FSLOC (English: flexible single-layer on cell) products, and can overcome the problem of insufficient space in the lower frame of watch FSLOC products that makes it impossible to realize resistance compensation of touch signal lines.
  • This watch FSLOC product can be optionally a self-capacitive touch product.
  • the second touch portion 602 includes a first access end portion 6021, a second access end portion 6022 and a winding structure 6023.
  • the winding structure 6023 are respectively coupled to the first access end portion 6021 and the second access end portion 6022.
  • the first access end portion 6021 is coupled to the corresponding first touch portion 601.
  • the second access end portion 6023 is coupled to the corresponding first touch portion 601.
  • the access end portion 6022 is coupled to the corresponding third touch portion 603;
  • the first access end portion 6021 includes at least a portion extending along the second direction
  • the second access end portion 6022 includes at least a portion extending along the second direction.
  • the first access end 6021 , the second access end 6022 and the winding structure 6023 are formed into an integrated structure.
  • the second access end portion 6022 included in the second touch portion 602 may have the same or different lengths.
  • the first access end 6021 and the second access end 6022 belonging to the same touch signal line 60 are staggered along the first direction.
  • the second touch portion 602 by arranging the second touch portion 602 to include the first access end portion 6021, the second access end portion 6022 and the winding structure 6023, it is better
  • the layout space of the lower frame of the display substrate is utilized, which effectively reduces the difficulty of laying out the touch signal lines 60 in the lower frame area.
  • the plurality of second access end portions 6022 included in the plurality of touch signal lines 60 are arranged along the first direction.
  • a virtual winding structure 71 is provided between at least part of the adjacent second access end portions 6022 .
  • the virtual winding structure 71 includes a plurality of second virtual graphics 710, the second virtual graphics 710 extend along the first direction, and the plurality of second virtual graphics 710 extend along the second direction. arrangement.
  • the virtual winding structure 71 is insulated from the touch signal line 60 .
  • the virtual winding structure 71 and the touch signal line 60 are arranged in the same layer and made of the same material.
  • the virtual winding structure 71 it is helpful to prevent light leakage in the lower frame area of the display substrate, and at the same time, better ensure the uniformity of etching when forming the touch signal line 60.
  • the width of the second access end 6022 in a direction perpendicular to its own extension is three times the line width of the winding structure.
  • the width of the second access end 6022 along the direction perpendicular to its own extension is between 8 microns and 12 microns. It should be noted that T21, T22, T23, T24 and T25 illustrated in FIG. 6 are labels of the touch signal lines 60.
  • the width of the second access end 6022 along the direction perpendicular to its own extension includes 8 microns, 9 microns, 10 microns, 11 microns, and 12 microns, but is not limited thereto.
  • the touch signal line 60 and the shielding layer 20 are arranged in the same layer and made of the same material.
  • the display substrate includes a touch electrode layer
  • the touch electrode layer includes a first conductive layer and a second conductive layer
  • the first conductive layer is used to form a touch electrode
  • the second conductive layer Used to form electrode connection bridges.
  • the touch signal line 60 and the shielding layer 20 are arranged in the same layer and material as the first conductive layer.
  • the touch signal line 60 and the shielding layer 20 are arranged in the same layer and material as the second conductive layer.
  • the touch signal line 60 and the shielding layer 20 each include a double-layer structure, in which one layer is in the same layer and made of the same material as the first conductive layer, and the other layer is in the same layer as the second conductive layer. Layer with material settings.
  • both the first conductive layer and the second conductive layer adopt a three-layer stack structure of Ti/Al/Ti.
  • the touch signal line 60 and the shielding layer 20 can be processed in the same patterning process. are formed simultaneously, thereby effectively simplifying the manufacturing process of the display substrate and reducing the manufacturing cost of the display substrate.
  • the display substrate includes a display structural part and a touch structural part.
  • the display structure part includes a stacked light-shielding metal layer SEL, a first insulating layer (not shown in the figure), an active layer (not shown in the figure), a first gate insulating layer GI1, A gate metal layer Gate1, a second gate insulating layer GI2, a second gate metal layer Gate2, an interlayer insulating layer ILD, a first source and drain metal layer SD1, a first flat layer PLN1, an anode layer ANO, and a pixel definition layer PDL, The light-emitting functional layer EL, the cathode layer CAT, and the packaging layer TFE.
  • the touch structure part includes a stacked inorganic layer TBU, a second conductive layer (used to form an electrode connection bridge BR), a second insulating layer IN, and a first conductive layer (used to form touch electrodes: Rxo, Txc) , the third flat layer TOC.
  • the display structure part can also adopt a double-layer source-drain metal layer structure, that is, the display structure part includes a stacked light-shielding metal layer SEL, a first insulating layer (not shown in the figure), and Source layer (not shown in the figure), first gate insulating layer GI1, first gate metal layer Gate1, second gate insulating layer GI2, second gate metal layer Gate2, interlayer insulating layer ILD, first source and drain Metal layer SD1, first planar layer PLN1, second source-drain metal layer SD2, second planar layer PLN2, anode layer ANO, pixel definition layer PDL, light-emitting functional layer EL, cathode layer CAT, and packaging layer TFE.
  • a double-layer source-drain metal layer structure that is, the display structure part includes a stacked light-shielding metal layer SEL, a first insulating layer (not shown in the figure), and Source layer (not shown in the figure), first gate insulating layer GI1, first gate metal layer Gate1, second
  • the touch structure part includes a stacked inorganic layer TBU, a second conductive layer (used to form an electrode connection bridge BR), a second insulating layer IN, and a first conductive layer (used to form touch electrodes: Rxo, Txc) , the third flat layer TOC.
  • the display substrate includes a display area 30 and a frame area 31.
  • the orthographic projection of the touch electrode layer in the touch structure part on the base substrate of the display substrate is located in the display area.
  • the orthographic projection of the touch signal line 60 in the touch structure part on the base substrate and the orthographic projection of the shielding layer 20 on the base substrate are located in the frame area 31 .
  • FIG. 10 a schematic top view of a touch electrode layer is provided according to an embodiment of the present disclosure.
  • the orthographic projection of the touch electrode layer schematically shown in FIG. 10 on the base substrate is located in the display area 30 in FIG. 9 .
  • the touch electrode layer illustrated in Figure 10 uses self-capacitive touch technology.
  • the display structure part includes a plurality of sub-pixels.
  • the sub-pixels include a coupled sub-pixel driving circuit and a light-emitting element.
  • the sub-pixel driving circuit is used to provide driving for the light-emitting element.
  • the signal is used to drive the light-emitting element to emit light to realize the display function of the display substrate.
  • the sub-pixel driving circuit can adopt LTPS and LTPO modes, and these two modes will be described below.
  • the sub-pixel driving circuit adopts LTPS mode.
  • the sub-pixel driving circuit includes: a first transistor T1, a second transistor T2, a third transistor 3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7 and a storage capacitor Cst.
  • the display substrate includes a power line VDD, a data line DA, a gate line GA, a light emission control line EM, a first reset line RE1, a second reset line RE2, a first initialization signal line Vinit1 and a second initialization signal line Vinit2.
  • the gate of the first transistor T1 is coupled to the corresponding first reset line RE1, and the first electrode of the first transistor T1 is coupled to the corresponding first initialization signal line Vinit1.
  • the first transistor T1 The second electrode is coupled to the gate electrode of the third transistor T3 (ie, the first node N1).
  • the gate of the third transistor T3 is multiplexed as the first plate of the storage capacitor Cst, and the second plate of the storage capacitor Cst is coupled to the power line VDD.
  • the gate electrode of the second transistor T2 is coupled to the corresponding gate line GA, and the first electrode of the second transistor T2 is connected to the second electrode (ie, the second node N2) of the third transistor T3 (ie, the driving transistor). coupled, the second electrode of the second transistor T2 is coupled with the gate electrode of the third transistor T3.
  • the gate electrode of the fourth transistor T4 is coupled to the corresponding gate line GA, the first electrode of the fourth transistor T4 is coupled to the corresponding data line DA, and the second electrode of the fourth transistor T4 is coupled to the corresponding gate line DA.
  • the first pole of the third transistor T3 ie, the third node N3 is coupled.
  • the gate of the fifth transistor T5 is coupled to the corresponding light-emitting control line EM, the first electrode of the fifth transistor T5 is coupled to the power line VDD, and the second electrode of the fifth transistor T5 is coupled to the third The first pole of transistor T3 is coupled.
  • the gate electrode of the sixth transistor T6 is coupled to the corresponding light-emitting control line EM, the first electrode of the sixth transistor T6 is coupled to the second electrode of the third transistor T3, and the The second electrode is coupled to the anode of the light-emitting element LD (ie, the fourth node N4).
  • the gate of the seventh transistor T7 is coupled to the second reset line RE2, the first electrode of the seventh transistor T7 is coupled to the second initialization signal line Vinit2, and the second electrode of the seventh transistor T7 Coupled with the anode of the light-emitting element LD, the cathode of the light-emitting element LD receives the negative power signal VSS.
  • each working cycle includes a first reset period, a write compensation period, a second reset period and a light-emitting period.
  • the reset signal input by the first reset line RE1 is at a valid level
  • the first transistor T1 is turned on
  • the first initialization signal transmitted by the first initialization signal line Vinit1 is input to the
  • the gate of the third transistor T3 causes the gate-source voltage Vgs maintained on the third transistor T3 in the previous frame to be cleared, thereby realizing a gate reset of the third transistor T3.
  • the reset signal is at an inactive level
  • the first transistor T1 is turned off
  • the gate scan signal input by the gate line GA is at an active level
  • the second transistor T2 and the The fourth transistor T4 is turned on
  • the data line DA writes a data signal and transmits it to the first electrode of the third transistor T3 through the fourth transistor T4.
  • the second transistor T2 and the third transistor T3 The four transistors T4 are turned on, causing the third transistor T3 to form a diode structure. Therefore, the second transistor T2, the third transistor T3, and the fourth transistor T4 work together to realize the control of the third transistor. Threshold voltage compensation of T3.
  • the gate potential of the third transistor T3 can be controlled to eventually reach Vdata+Vth, where Vdata represents the data signal voltage value and Vth represents the voltage value of the third transistor T3. threshold voltage.
  • the gate scan signal is at an inactive level
  • the second transistor T2 and the fourth transistor T4 are both turned off
  • the second reset line RE2 (optional to the adjacent next row
  • the reset signal input by the first reset line) coupled to the sub-pixel driving circuit is at a valid level
  • the seventh transistor T7 is controlled to be turned on
  • the initialization signal input by the second initialization signal line Vinit2 is input to the light-emitting element LD.
  • the anode controls the light-emitting element LD not to emit light.
  • the light-emitting control signal written by the light-emitting control line EM is at an effective level, and the fifth transistor T5 and the sixth transistor T6 are controlled to be turned on, so that the power signal transmitted by the power line VDD is input to the first electrode of the third transistor T3.
  • the third transistor T3 since the gate of the third transistor T3 is maintained at Vdata+Vth, the third transistor T3 is turned on.
  • the corresponding gate-source voltage of the third transistor T3 is Vdata+Vth-Vdd, where Vdd is the voltage value corresponding to the power signal.
  • the leakage current generated based on the gate-source voltage flows to the anode of the corresponding light-emitting element LD, driving the corresponding light-emitting element LD to emit light.
  • the sub-pixel driving circuit adopts LTPO mode.
  • the sub-pixel driving circuit includes: a first transistor T1, a second transistor T2, a third transistor 3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7 and a storage capacitor Cst.
  • the display substrate includes a power line VDD, a data line DA, a first gate line GA1, a second gate line GA2, a light emission control line EM, a first reset line RE1, a first initialization signal line Vinit1, and a second initialization signal line Vinit2.
  • the gate of the first transistor T1 is coupled to the corresponding first reset line RE1, and the first electrode of the first transistor T1 is coupled to the corresponding first initialization signal line Vinit1.
  • the first The second electrode of the transistor T1 is coupled to the gate electrode of the third transistor T3.
  • the gate of the third transistor T3 is multiplexed as the first plate of the storage capacitor Cst, and the second plate of the storage capacitor Cst is coupled to the power line VDD.
  • the gate electrode of the second transistor T2 is coupled to the corresponding second gate line GA2, the first electrode of the second transistor T2 is coupled to the second electrode of the third transistor T3, and the second electrode of the second transistor T2 is coupled to the second gate line GA2.
  • the gate electrode of the third transistor T3 is coupled to the gate electrode of the third transistor T3.
  • the gate of the fourth transistor T4 is coupled to the corresponding first gate line GA1, the first electrode of the fourth transistor T4 is coupled to the corresponding data line DA, and the second electrode of the fourth transistor T4 is coupled to the corresponding data line DA.
  • the first pole of the third transistor T3 is coupled.
  • the gate of the fifth transistor T5 is coupled to the corresponding light-emitting control line EM, the first electrode of the fifth transistor T5 is coupled to the power line VDD, and the second electrode of the fifth transistor T5 is coupled to the third The first pole of transistor T3 is coupled.
  • the gate electrode of the sixth transistor T6 is coupled to the corresponding light-emitting control line EM, the first electrode of the sixth transistor T6 is coupled to the second electrode of the third transistor T3, and the The second electrode is coupled to the anode of the light emitting element LD.
  • the gate electrode of the seventh transistor T7 is coupled to the corresponding first gate line GA1, the first electrode of the seventh transistor T7 is coupled to the second initialization signal line Vinit2, and the third electrode of the seventh transistor T7 is coupled to the first gate line GA1.
  • the diode is coupled to the anode of the light-emitting element LD, and the cathode of the light-emitting element LD receives the negative power signal VSS.
  • An embodiment of the present disclosure also provides a touch display device, including the display substrate provided in the above embodiment.
  • the touch display device can be any product or component with a touch display function such as a television, a monitor, a digital photo frame, a mobile phone, a tablet computer, etc., wherein the touch display device also includes a flexible circuit board. , printed circuit boards and backplanes, etc.
  • a shielding layer 20 is provided on the side of the encapsulation layer facing away from the base substrate, and the orthographic projection of the shielding layer 20 on the base substrate is arranged to be in line with the The orthographic projections of the functional film layer 10 on the base substrate at least partially overlap, so that when external light shines on the functional film layer 10, it can be blocked by the blocking layer 20, preventing the light from shining on the functional film layer 10.
  • the functional film layer 10 is reflected by the functional film layer 10 , thereby avoiding light leakage of the display substrate in practical applications and affecting the user experience.
  • the shielding wire 40 and the extension direction of the first shielding portion 401 included in the shielding wire 40 is perpendicular to the extension direction of the boundary of the organic trench 50 that it spans, it is possible to make the At the boundary of the organic trench 50 that the first shielding portion 401 spans, the contact area between the first shielding portion 401 and the step surface formed by the organic trench 50 that it spans is minimized, so that when the first shielding portion 401 is formed using a patterning process, During the process of shielding the first shielding part 401, the residue of the first shielding part 401 on the step surface is effectively reduced, and the risk of short circuit between the first shielding part 401 and other surrounding conductive structures is reduced. .
  • the winding structure 6023 is formed by arranging at least part of the second touch portion 602 included in the touch signal line 60, so that the second touch portion in each touch signal line 60 can be adjusted.
  • the winding length of the winding structure 6023 included in the control part 602 adjusts the overall resistance of each touch signal line 60, thereby achieving approximately the same resistance of the multiple touch signal lines 60 in the display substrate, effectively improving the transmission of the display substrate. Touch signal accuracy.
  • the touch display device provided by the embodiment of the present disclosure includes the above-mentioned display substrate, it also has the above-mentioned beneficial effects, which will not be described again here.
  • the signal line extending in a certain direction means that the signal line includes a main part and a secondary part connected to the main part.
  • the main part is a line, line segment or bar-shaped body, and the main part extends in a certain direction.
  • the extension length of the main part along a certain direction is greater than the extension length of the secondary part along other directions.
  • the “same layer” in the embodiments of the present disclosure may refer to film layers on the same structural layer.
  • the film layers on the same layer may be a layer structure formed by using the same film formation process to form a film layer for forming a specific pattern, and then using the same mask to pattern the film layer through a patterning process.
  • a patterning process may include multiple exposure, development or etching processes, and the specific pattern in the formed layer structure may be continuous or discontinuous. These specific graphics may also be at different heights or have different thicknesses.
  • serial numbers of each step cannot be used to limit the order of each step.
  • sequence of each step can be changed. It is also within the protection scope of this disclosure.

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Abstract

本公开提供一种显示基板和触控显示装置。所述显示基板包括：衬底基板和设置于所述衬底基板上的功能膜层，所述功能膜层能够反射外界射向所述功能膜层的光线；所述显示基板还包括封装层和遮挡层，所述遮挡层位于所述功能膜层背向所述衬底基板的一侧，所述封装层位于所述遮挡层与所述功能膜层之间，所述遮挡层在所述衬底基板上的正投影与所述功能膜层在所述衬底基板上的正投影至少部分交叠。

Description

显示基板和触控显示装置 技术领域
本公开涉及显示技术领域，尤其涉及一种显示基板和触控显示装置。
背景技术
随着显示技术的不断发展，触控显示产品在多领域均得到了广泛的应用。触控显示产品兼具触控功能和显示功能，在触控显示产品显示画面时，可以通过在触控显示产品的屏幕上触控实现对触控显示产品的功能控制。
发明内容
本公开的目的在于提供一种显示基板和触控显示装置。
为了实现上述目的，本公开提供如下技术方案：
本公开的第一方面提供一种显示基板，包括：衬底基板和设置于所述衬底基板上的功能膜层，所述功能膜层能够反射外界射向所述功能膜层的光线；所述显示基板还包括封装层和遮挡层，所述遮挡层位于所述功能膜层背向所述衬底基板的一侧，所述封装层位于所述遮挡层与所述功能膜层之间，所述遮挡层在所述衬底基板上的正投影与所述功能膜层在所述衬底基板上的正投影至少部分交叠。
可选的，所述显示基板包括显示区域和包围所述显示区域的边框区域，所述边框区域包括弯折区，所述功能膜层的至少部分位于所述弯折区与所述显示区域之间。
可选的，所述功能膜层包括沿第一方向延伸的至少部分；
所述遮挡层包括多个第一遮挡图形，所述第一遮挡图形包括沿第一方向延伸的至少部分，所述多个第一遮挡图形沿第二方向排列，所述第二方向与所述第一方向相交；至少部分所述第一遮挡图形在所述衬底基板上的正投影，与所述功能膜层在所述衬底基板上的正投影至少部分交叠。
可选的，所述第一遮挡图形在垂直于其自身延伸方向上的宽度与相邻的所述第一遮挡图形之间的最小间距的比值大于或等于3:2。
可选的，所述显示基板还包括屏蔽线，所述屏蔽线的至少部分位于相邻的两个第一遮挡图形之间。
可选的，所述第一遮挡图形与所述屏蔽线之间的最小间距大于或等于4微米。
可选的，所述第一遮挡图形与所述屏蔽线之间的最小间距等于所述第一遮挡图形在垂直于其自身延伸方向上的宽度的0.4倍。
可选的，所述功能膜层包括沿第一方向延伸的至少部分；
所述遮挡层包括一整块第二遮挡图形，所述第二遮挡图形包括相耦接的遮挡主体部和遮挡延伸部，所述遮挡主体部沿所述第一方向延伸，所述遮挡主体部在所述衬底基板上的正投影，与所述功能膜层在所述衬底基板上的正投影至少部分交叠。
可选的，所述遮挡延伸部复用为所述显示基板中的屏蔽线。
可选的，所述显示基板还包括阳极层，所述功能膜层与所述阳极层同层同材料设置，所述功能膜层作为所述显示基板中的正电源信号总线或负电源信号总线。
可选的，所述显示基板还包括有机层，所述有机层上形成有有机沟槽；
所述屏蔽线位于所述有机层背向所述衬底基板的一侧，所述屏蔽线包括跨越所述有机沟槽的第一屏蔽部分，所述第一屏蔽部分的延伸方向，与其跨越的有机沟槽的边界的延伸方向垂直。
可选的，所述有机层包括像素界定层和平坦层，所述平坦层的至少部分位于所述像素界定层和所述衬底基板之间；所述像素界定层上形成有第一有机沟槽，所述平坦层上形成有第二有机沟槽，所述第一有机沟槽在所述衬底基板上的正投影与所述第二有机沟槽在所述衬底基板上的正投影至少部分交叠；
所述第一屏蔽部分的延伸方向，与其跨越的所述第一有机沟槽的边界的延伸方向垂直，且与其跨越的所述第二有机沟槽的边界的延伸方向垂直。
可选的，所述显示基板还包括：多条触控信号线，所述触控信号线包括跨越所述有机沟槽的第一触控部分，所述第一触控部分的延伸方向，与其跨越的有机沟槽的边界的延伸方向垂直。
可选的，所述显示基板还包括沿所述第一方向排列的多个第一虚拟图形，所述第一虚拟图形沿第二方向延伸，所述第一虚拟图形跨越所述有机沟槽，所述第一虚拟图形与所述屏蔽线同层同材料设置。
可选的，所述多个第一虚拟图形划分为多组第一虚拟图形组，所述多组第一虚拟图形组沿第一方向排列；
所述多条触控信号线划分为多组触控信号线组，所述触控信号线组的至少部分与所述第一虚拟图形组沿第一方向交替设置；所述屏蔽线的至少部分位于相邻的所述触控信号线组和所述第一虚拟图形组之间。
可选的，所述有机沟槽在所述衬底基板上的正投影的至少部分，位于所述弯折区和所述显示区域之间。
可选的，所述显示基板还包括：多条触控信号线，所述触控信号线包括依次首尾相接的第一触控部分，第二触控部分和第三触控部分，所述第一触控部分和所述第二触控部分位于所述边框区域，所述第三触控部分位于所述显示区域；
至少部分所述触控信号线包括的所述第二触控部分形成绕线结构，所述多条触控信号线的电阻大致相同。
可选的，所述第二触控部分包括第一接入端部，第二接入端部和绕线结构，所述绕线结构分别与所述第一接入端部和所述第二接入端部耦接，所述第一接入端部与对应的第一触控部分耦接，所述第二接入端部与对应的第三触控部分耦接；
所述第一接入端部包括沿第二方向延伸的至少部分，所述第二接入端部包括沿第二方向延伸的至少部分。
可选的，所述多条触控信号线包括的多个第二接入端部沿第一方向排列，所述多个第二接入端部中至少部分相邻的第二接入端部之间设置有虚拟绕线结构。
可选的，所述第二接入端部沿垂直于其自身延伸方向上的宽度是绕线结构线宽的3倍。
可选的，所述触控信号线与所述遮挡层同层同材料设置。
基于上述显示基板的技术方案，本公开的第二方面提供一种触控显示装 置，包括上述显示基板。
附图说明
此处所说明的附图用来提供对本公开的进一步理解，构成本公开的一部分，本公开的示意性实施例及其说明用于解释本公开，并不构成对本公开的不当限定。在附图中：
图1为本公开实施例提供的显示基板的下边框结构示意图；
图2为图1中X1部分中部分结构的放大示意图；
图3为图1中X1部分所在位置采用的另一种结构的放大示意图；
图4为图1中X2部分中部分结构的放大示意图；
图5为图1中X3部分中部分结构的放大示意图；
图6为图1中X4部分中部分结构的放大示意图；
图7为本公开实施例提供的显示基板中显示结构部分的第一截面示意图；
图8为本公开实施例提供的显示基板中显示结构部分的第二截面示意图；
图9为本公开实施例提供的显示基板的俯视结构示意图；
图10为本公开实施例提供的显示基板中触控结构部分包括的触控电极层的结构示意图；
图11为本公开实施例提供的显示基板中LTPS模式的子像素驱动电路的电路结构示意图；
图12为本公开实施例提供的显示基板中LTPS模式的子像素驱动电路的布局示意图；
图13为本公开实施例提供的显示基板中LTPS模式的子像素的布局示意图；
图14为本公开实施例提供的显示基板中LTPO模式的子像素驱动电路的电路结构示意图；
图15为本公开实施例提供的显示基板中LTPO模式的子像素驱动电路的布局示意图；
图16为本公开实施例提供的显示基板中LTPO模式的子像素的布局示意图。
具体实施方式
为了进一步说明本公开实施例提供的显示基板和触控显示装置，下面结合说明书附图进行详细描述。
本公开提供一种触控显示产品，该触控显示产品包括显示区域和位于所述显示区域周边的边框区域，所述边框区域包括与显示区域内的阳极层同层同材料设置的功能膜层，该功能膜层可以作为信号线实现信号传输功能。
受到该功能膜层的自身材料限制，当触控显示产品应用在强光照射的环境中时，功能膜层会反射照射在其表面的光线，导致触控显示产品出现漏光现象，影响用户体验。
请参阅图1至图3，本公开实施例提供了一种显示基板，包括：衬底基板和设置于所述衬底基板上的功能膜层10，所述功能膜层10能够反射外界射向所述功能膜层10的光线；所述显示基板还包括封装层和遮挡层20，所述遮挡层20位于所述功能膜层10背向所述衬底基板的一侧，所述封装层位于所述遮挡层20与所述功能膜层10之间，所述遮挡层20在所述衬底基板上的正投影与所述功能膜层10在所述衬底基板上的正投影至少部分交叠。
示例性的，所述功能膜层10作为显示基板中的正电源信号总线，该正电源信号总线能够分别与显示基板中的驱动芯片，以及显示基板中位于显示区域30的电源线耦接，将驱动芯片提供的正电源信号传输至所述电源线。
示例性的，所述功能膜层10作为显示基板中的负电源信号总线，该负电源信号总线能够分别与显示基板中的驱动芯片，以及显示基板中位于显示区域30的阴极耦接，将驱动芯片提供的负电源信号传输至所述阴极。
示例性的，所述显示基板还包括封装层，所述功能膜层10设置于所述封装层与所述衬底基板之间，所述功能膜层10被所述封装层覆盖。所述遮挡层20位于所述封装层背向所述功能膜层10背向所述衬底基板的一侧，所述遮挡层20在所述衬底基板上的正投影与所述功能膜层10在所述衬底基板上的 正投影至少部分交叠。示例性的，所述遮挡层20在所述衬底基板上的正投影完全覆盖所述功能膜层10在所述衬底基板上的正投影。
根据上述显示基板的具体结构可知，本公开实施例提供的显示基板中，在所述封装层背向所述衬底基板的一侧设置了遮挡层20，并设置所述遮挡层20在所述衬底基板上的正投影与所述功能膜层10在所述衬底基板上的正投影至少部分交叠，使得当外界的光线射向所述功能膜层10时，能够被所述遮挡层20挡住，避免了光线射向所述功能膜层10被所述功能膜层10反射，从而避免了显示基板在实际应用中出现漏光现象，影响用户体验。
如图1至图3所示，在一些实施例中，所述显示基板包括显示区域30和包围所述显示区域30的边框区域31，所述边框区域31包括弯折区310，所述功能膜层10的至少部分位于所述弯折区310与所述显示区域30之间。
示例性的，所述弯折区310位于所述显示基板的下边框，所述功能膜层10位于所述显示基板的下边框，但不仅限于此。
示例性的，所述功能膜层10也可以位于显示基板的上边框，左边框或右边框，当功能膜层10位于所述上边框，所述左边框或所述右边框时，同样可以设置所述遮挡层20遮挡所述功能膜层10，避免所述功能膜层10反光导致出现漏光问题。
如图1和图2所示，在一些实施例中，所述功能膜层10包括沿第一方向延伸的至少部分；
所述遮挡层20包括多个第一遮挡图形201，所述第一遮挡图形201包括沿第一方向延伸的至少部分，所述多个第一遮挡图形201沿第二方向排列，所述第二方向与所述第一方向相交；至少部分所述第一遮挡图形201在所述衬底基板上的正投影，与所述功能膜层10在所述衬底基板上的正投影至少部分交叠。
示例性的，所述第一方向包括横向，所述第二方向包括纵向，但不仅限于此。
示例性的，所述功能膜层10包括多个第一遮挡图形201，所述第一遮挡图形201可选用沿第一方向延伸的条状图形，但不仅限于此。
示例性的，所述第一遮挡图形201在所述衬底基板上的正投影，被所述 功能膜层10在所述衬底基板上的正投影覆盖。
上述设置所述遮挡层20包括所述多个第一遮挡图形201，能够在保证所述遮挡层20的遮挡效果的同时，有效降低所述遮挡层20的布局难度。
在一些实施例中，所述第一遮挡图形201在垂直于其自身延伸方向上的宽度与相邻的所述第一遮挡图形201之间的最小间距的比值大于或等于3:2。
在一些实施例中，所述第一遮挡图形201在垂直于其自身延伸方向上的宽度在8微米至10微米之间，可以包括端点值。示例性的，所述第一遮挡图形201在垂直于其自身延伸方向上的宽度为9微米。
如图1和图2所示，在一些实施例中，相邻的所述第一遮挡图形201之间的最小间距在5微米至9微米之间，可以包括端点值。示例性的，相邻的所述第一遮挡图形201之间的最小间距可选为6微米，7微米，8微米。
将所述多个第一遮挡图形201按照上述方式布局，能够在保证所述遮挡层20的遮挡效果的同时，有效降低所述遮挡层20的布局难度。
如图1和图2所示，在一些实施例中，所述显示基板还包括屏蔽线40，所述屏蔽线40的至少部分位于相邻的两个第一遮挡图形201之间。
示例性的，所述屏蔽线40包括相耦接的第一屏蔽部分401和第二屏蔽部分402，所述第一屏蔽部分401包括沿所述第二方向延伸的至少部分，所述第二屏蔽部分402包括沿所述第一方向延伸的至少部分。示例性的，所述第一屏蔽部分401和所述第二屏蔽部分402形成为一体结构，所述第二屏蔽部分402位于两个相邻的所述第一遮挡图形201之间。
示例性的，所述第一屏蔽部分401与所述显示基板中的驱动芯片耦接，接收所述驱动芯片提供的地信号。
示例性的，所述屏蔽线40在所述衬底基板上的正投影，与所述功能膜层10在所述衬底基板上的正投影至少部分交叠，所述屏蔽线40与所述遮挡层20同层同材料设置。
示例性的，所述显示基板中包括两条所述屏蔽线40，两条所述屏蔽线40镜像设置，两条所述屏蔽线40包括的两个所述第二屏蔽部分402之间具有间隙。
上述设置所述屏蔽线40的至少部分位于相邻的两个第一遮挡图形201之 间，能够有效降低所述显示基板在边框区域31中，不同结构之间发生的串扰作用。
如图1和图2所示，在一些实施例中，所述第一遮挡图形与所述屏蔽线之间的最小间距大于或等于4微米。
如图1和图2所示，在一些实施例中，所述第一遮挡图形与所述屏蔽线之间的最小间距等于所述第一遮挡图形在垂直于其自身延伸方向上的宽度的0.4倍。
示例性的，当所述第一遮挡图形在垂直于其自身延伸方向上的宽度的0.4倍小于4微米时，所述第一遮挡图形与所述屏蔽线之间的最小间距取值大于或等于4微米。当所述第一遮挡图形在垂直于其自身延伸方向上的宽度的0.4倍大于或等于4微米时，所述第一遮挡图形与所述屏蔽线之间的最小间距等于所述第一遮挡图形在垂直于其自身延伸方向上的宽度的0.4倍。
如图1和图2所示，在一些实施例中，所述第一遮挡图形201与所述屏蔽线40之间的最小间距在4微米至6微米之间，可以包括端点值。示例性的，所述第一遮挡图形201与所述屏蔽线40之间的最小间距为5微米。
将所述第一遮挡图形201与所述屏蔽线40之间按照上述方式布局，能够在保证所述遮挡层20的遮挡效果，以及所述屏蔽层的屏蔽效果的同时，有效降低所述遮挡层20和所述屏蔽层的布局难度。
如图1和图3所示，在一些实施例中，所述功能膜层10包括沿第一方向延伸的至少部分；
所述遮挡层20包括一整块第二遮挡图形202，所述第二遮挡图形202包括相耦接的遮挡主体部2021和遮挡延伸部2022，所述遮挡主体部2021沿所述第一方向延伸，所述遮挡主体部2021在所述衬底基板上的正投影，与所述功能膜层10在所述衬底基板上的正投影至少部分交叠。
示例性的，所述遮挡主体部2021和所述遮挡延伸部2022形成为一体结构。所述遮挡主体部2021沿所述第一方向延伸，所述遮挡延伸部2022包括沿所述第二方向延伸的至少部分。所述第二遮挡图形202包括两个遮挡延伸部2022，所述遮挡主体部2021的两端分别与所述两个遮挡延伸部2022一一对应耦接。
上述实施例提供的显示基板中，通过设置所述遮挡主体部2021在所述衬底基板上的正投影，与所述功能膜层10在所述衬底基板上的正投影至少部分交叠，能够在降低所述遮挡层20的电阻的同时，更好的实现遮挡层20的遮光效果。
如图1和图3所示，在一些实施例中，所述遮挡延伸部2022复用为所述显示基板中的屏蔽线40。
示例性的，所述遮挡延伸部2022与所述显示基板包括的驱动芯片耦接，接收所述驱动芯片提供的地信号。
上述将所述遮挡延伸部2022复用为所述显示基板中的屏蔽线40，不仅保证了遮挡层20的遮光效果，还避免了所述遮挡层20处于浮接的状态而与其他导电结构之间发生串扰。而且，显示基板中不需要额外设置专门起到屏蔽作用的屏蔽线40，降低了显示基板的布局难度。
在一些实施例中，所述显示基板还包括阳极层，所述功能膜层10与所述阳极层同层同材料设置，所述功能膜层10作为所述显示基板中的正电源信号总线或负电源信号总线。
示例性的，所述阳极层采用氧化铟锡材料制作，所述功能膜层10与所述阳极层同层同材料设置，所述功能膜层10与所述阳极层能够在同一次构图工艺中同时形成。所述功能膜层10可以作为所述显示基板中的正电源信号总线或负电源信号总线，但不仅限于此。
如图1，图4和图5所示，在一些实施例中，所述显示基板还包括有机层，所述有机层上形成有有机沟槽50；
所述屏蔽线40位于所述有机层背向所述衬底基板的一侧，所述屏蔽线40包括跨越所述有机沟槽50的第一屏蔽部分401，所述第一屏蔽部分401的延伸方向，与其跨越的有机沟槽50的边界的延伸方向垂直。
示例性的，所述有机层位于所述衬底基板与所述封装层之间。所述封装层包括依次层叠设置的第一无机封装层，有机封装层和第二无机封装层。由于所述有机层上形成的有机沟槽50的深度较深，因此所述有机封装层无法将所述有机沟槽50填平，使得在所述有机沟槽50所在的区域，在所述封装层背向所述衬底基板的表面存在段差。
示例性的，所述屏蔽线40位于所述封装层背向所述衬底基板的一侧，所述屏蔽线40中的第一屏蔽部分401能够跨越所述有机沟槽50。
上述实施例提供的显示基板中，通过设置所述第一屏蔽部分401的延伸方向，与其跨越的有机沟槽50的边界的延伸方向垂直，能够使得在所述第一屏蔽部分401跨越的有机沟槽50的边界处，所述第一屏蔽部分401与其跨越的由有机沟槽50形成的段差面之间的接触面积最小化，从而使得在采用构图工艺形成所述第一屏蔽部分401的过程中，有效降低了所述第一屏蔽部分401在所述段差面产生的残留，降低了所述第一屏蔽部分401与其周边其他导电结构之间发生短路的风险。
在一些实施例中，所述有机层包括像素界定层和平坦层，所述平坦层的至少部分位于所述像素界定层和所述衬底基板之间；所述像素界定层上形成有第一有机沟槽，所述平坦层上形成有第二有机沟槽，所述第一有机沟槽在所述衬底基板上的正投影与所述第二有机沟槽在所述衬底基板上的正投影至少部分交叠；
所述第一屏蔽部分401的延伸方向，与其跨越的所述第一有机沟槽的边界的延伸方向垂直，且与其跨越的所述第二有机沟槽的边界的延伸方向垂直。
示例性的，所述第一有机沟槽和所述第二有机沟槽的总深度在3微米至3.5微米之间，可以包括端点值。
示例性的，所述平坦层的至少部分位于所述像素界定层和所述衬底基板之间，所述显示基板包括的阳极层的至少部分位于所述像素界定层和所述平坦层之间。
示例性的，所述第一有机沟槽在所述衬底基板上的正投影与所述第二有机沟槽在所述衬底基板上的正投影至少部分交叠，形成3微米左右的段差，该段差有机封装层无法填平。
上述实施例提供的显示基板中，通过设置所述第一屏蔽部分401的延伸方向，与其跨越的所述第一有机沟槽的边界的延伸方向垂直，且与其跨越的所述第二有机沟槽的边界的延伸方向垂直，能够使得在所述第一屏蔽部分401跨越的第一有机沟槽的边界处和第二有机沟槽的边界处，所述第一屏蔽部分401与其跨越的由第一有机沟槽形成的段差面之间的接触面积最小化，所述 第一屏蔽部分401与其跨越的由第二有机沟槽形成的段差面之间的接触面积最小化，从而使得在采用构图工艺形成所述第一屏蔽部分401的过程中，有效降低了所述第一屏蔽部分401在所述段差面产生的残留，降低了所述第一屏蔽部分401与其周边其他导电结构之间发生短路的风险。
如图1，图4和图5所示，在一些实施例中，所述显示基板还包括：多条触控信号线60，所述触控信号线60包括跨越所述有机沟槽50的第一触控部分601，所述第一触控部分601的延伸方向，与其跨越的有机沟槽50的边界的延伸方向垂直。
示例性的，所述触控信号线60位于所述封装层背向所述衬底基板的一侧，用于传输触控信号。
示例性的，所述触控信号线60能够从显示基板的显示区域30延伸至所述显示基板的下边框区域。所述触控信号线60包括的第一触控部分601位于所述下边框区域。
上述实施例提供的显示基板中，通过设置所述第一触控部分601的延伸方向，与其跨越的有机沟槽50的边界的延伸方向垂直，能够使得在所述第一触控部分601跨越的有机沟槽50的边界处，所述第一触控部分601与其跨越的由有机沟槽50形成的段差面之间的接触面积最小化，从而使得在采用构图工艺形成所述触控信号线60的过程中，有效降低了所述第一触控部分601在所述段差面产生的残留，降低了所述第一触控部分601与其周边其他导电结构之间发生短路的风险。
如图1，图4和图5所示，在一些实施例中，所述显示基板还包括沿所述第一方向排列的多个第一虚拟图形70，所述第一虚拟图形70沿第二方向延伸，所述第一虚拟图形70跨越所述有机沟槽50，所述第一虚拟图形70与所述屏蔽线40同层同材料设置。
示例性的，所述第一虚拟图形70，所述触控信号线60，所述屏蔽线40，以及所述遮挡层20均同层同材料设置，能够在同一次构图工艺中同时形成，从而能够有效简化显示基板的制作工艺流程，降低显示基板的制作成本。
上述实施例提供的显示基板中，通过设置所述多个第一虚拟图形70跨越所述有机沟槽50，能够增加所述第一虚拟图形70，所述触控信号线60，所 述屏蔽线40，以及所述遮挡层20所在的膜层与其下层膜层之间的接触面积，从而增加所述触控信号线60，所述屏蔽线40，以及所述遮挡层20所在的膜层与其下层膜层之间的粘结强度，提升显示基板的良率。
如图1所示，在一些实施例中，所述多个第一虚拟图形70划分为多组第一虚拟图形组70-Z，所述多组第一虚拟图形组70-Z沿第一方向排列；
所述多条触控信号线60划分为多组触控信号线组60-Z，所述触控信号线组60-Z的至少部分与所述第一虚拟图形组70-Z沿第一方向交替设置；所述屏蔽线40的至少部分位于相邻的所述触控信号线组60-Z和所述第一虚拟图形组70-Z之间。
示例性的，所述多个第一虚拟图形70划分为多组第一虚拟图形组70-Z，每组第一虚拟图形组70-Z包括沿第一方向排列的多个第一虚拟图形70。所述多条触控信号线60划分为多组触控信号线组60-Z，每组触控信号线组60-Z包括沿第一方向排列的多条触控信号线60。
上述实施例提供的显示基板中，通过设置所述触控信号线组60-Z的至少部分与所述第一虚拟图形组70-Z沿第一方向交替设置，以及所述屏蔽线40的至少部分位于相邻的所述触控信号线组60-Z和所述第一虚拟图形组70-Z之间，能够通过所述屏蔽线40很好的屏蔽所述第一虚拟图形70对所述触控信号线60产生的干扰，保证了触控信号线60传输触控信号的准确性。
如图1所示，在一些实施例中，所述有机沟槽50在所述衬底基板上的正投影的至少部分，位于所述弯折区310和所述显示区域30之间。
示例性的，所述显示基板还包括挡墙结构51，所述挡墙结构51在所述衬底基板上的正投影，位于所述有机沟槽50在所述衬底基板上的正投影与所述显示区域30之间。
如图1和图6所示，在一些实施例中，所述显示基板还包括：多条触控信号线60，所述触控信号线60包括依次首尾相接的第一触控部分601，第二触控部分602和第三触控部分603，所述第一触控部分601和所述第二触控部分602位于所述边框区域31，所述第三触控部分603位于所述显示区域30；
至少部分所述触控信号线60包括的所述第二触控部分602形成绕线结构6023，所述多条触控信号线60的电阻大致相同。
所述绕线结构6023的具体结构多种多样，示例性的，所述绕线结构6023包括多个直边部6023a和多个拐角部6023b，所述直边部6023a沿所述第一方向延伸，所述拐角部6023b沿所述第二方向延伸，所述多个直边部6023a沿所述第二方向依次排列，所述多个直边部6023a依次首尾连接，相连接的两个直边部6023a通过所述拐角部6023b实现连接，使得所述绕线结构6023形成为类似弓字形结构。
示例性的，各所述触控信号线60中所述第二触控部分602形成的绕线结构6023可以相同或不同，即各所述触控信号线60中所述第二触控部分602的长度可以相同或不同。
示例性的，通过调节所述第二触控部分602包括的绕线结构6023的绕线长短，可以调节所述第二触控部分602的电阻，进而调节所述触控信号线60的电阻。
上述实施例提供的显示基板中，通过设置至少部分所述触控信号线60包括的所述第二触控部分602形成绕线结构6023，使得能够通过调整各触控信号线60中第二触控部分602包括的绕线结构6023的绕线长短，调节各触控信号线60的整体电阻，从而实现显示基板中所述多条触控信号线60的电阻大致相同，有效提升了显示基板传输触控信号的准确性。
上述实施例提供的显示基板可以应用于手表FSLOC(英文：flexible single-layer on cell)产品中，能够克服手表FSLOC产品下边框空间不足导致无法实现触控信号线的电阻补偿的问题。该手表FSLOC产品可选为自容触控产品。
如图1和图6所示，在一些实施例中，所述第二触控部分602包括第一接入端部6021，第二接入端部6022和绕线结构6023，所述绕线结构6023分别与所述第一接入端部6021和所述第二接入端部6022耦接，所述第一接入端部6021与对应的第一触控部分601耦接，所述第二接入端部6022与对应的第三触控部分603耦接；
所述第一接入端部6021包括沿第二方向延伸的至少部分，所述第二接入端部6022包括沿第二方向延伸的至少部分。
如图6所示，示例性的，所述第一接入端部6021，所述第二接入端部6022 和所述绕线结构6023形成为一体结构。
示例性的，各所述触控信号线60中，所述第二触控部分602包括的第二接入端部6022的长度可以相同或不同。
如图6所示，示例性的，属于同一条触控信号线60的第一接入端部6021和第二接入端部6022沿所述第一方向错开。
上述实施例提供的显示基板中，通过设置所述第二触控部分602包括所述第一接入端部6021，所述第二接入端部6022和所述绕线结构6023，更好的利用了显示基板的下边框的布局空间，有效降低了所述触控信号线60在所述下边框区域的布局难度。
如图6所示，在一些实施例中，所述多条触控信号线60包括的多个第二接入端部6022沿第一方向排列，所述多个第二接入端部6022中至少部分相邻的第二接入端部6022之间设置有虚拟绕线结构71。
示例性的，所述虚拟绕线结构71包括多个第二虚拟图形710，所述第二虚拟图形710沿所述第一方向延伸，所述多个第二虚拟图形710沿所述第二方向排列。
如图1和图6所示，示例性的，所述虚拟绕线结构71与所述触控信号线60绝缘。所述虚拟绕线结构71与所述触控信号线60同层同材料设置。
上述实施例提供的显示基板中，通过设置所述虚拟绕线结构71，有利于防止显示基板下边框区域出现漏光，同时更好的保证了形成所述触控信号线60时刻蚀的均一性。
如图6所示，在一些实施例中，所述第二接入端部6022沿垂直于其自身延伸方向上的宽度是绕线结构线宽的3倍。
如图6所示，在一些实施例中，所述第二接入端部6022沿垂直于其自身延伸方向上的宽度在8微米至12微米之间。需要说明，图6中示意的T21，T22，T23，T24和T25为触控信号线60的标号。
示例性的，所述第二接入端部6022沿垂直于其自身延伸方向上的宽度包括8微米，9微米，10微米，11微米和12微米等，但不限于此。
将所述第二接入端按照上述尺寸设置，有利于防止静电累积出现静电击穿问题。
如图1，图2和图6所示，在一些实施例中，所述触控信号线60与所述遮挡层20同层同材料设置。
示例性的，所述显示基板包括触控电极层，所述触控电极层包括第一导电层和第二导电层，所述第一导电层用于形成触控电极，所述第二导电层用于形成电极连接桥。
示例性的，所述触控信号线60，所述遮挡层20均与所述第一导电层同层同材料设置。
示例性的，所述触控信号线60，所述遮挡层20均与所述第二导电层同层同材料设置。
示例性的，所述触控信号线60，所述遮挡层20均包括双层结构，其中一层与所述第一导电层同层同材料设置，另一层与所述第二导电层同层同材料设置。
示例性的，所述第一导电层和所述第二导电层均采用Ti/Al/Ti的三层堆叠结构。
上述实施例提供的显示基板中，通过将所述触控信号线60与所述遮挡层20同层同材料设置，使得所述触控信号线60能够与所述遮挡层20在同一次构图工艺中同时形成，从而有效简化了显示基板的制作工艺流程，降低了显示基板的制作成本。
如图7所示，所述显示基板包括显示结构部分和触控结构部分。示例性的，所述显示结构部分包括层叠设置的遮光金属层SEL，第一绝缘层(图中未示出)，有源层(图中未示出)，第一栅极绝缘层GI1，第一栅金属层Gate1，第二栅极绝缘层GI2，第二栅金属层Gate2，层间绝缘层ILD，第一源漏金属层SD1，第一平坦层PLN1，阳极层ANO，像素界定层PDL，发光功能层EL，阴极层CAT，封装层TFE。所述触控结构部分包括层叠设置的无机层TBU，第二导电层(用于形成电极连接桥BR)，第二绝缘层IN，第一导电层(用于形成触控电极：Rxo，Txc)，第三平坦层TOC。
如图8所示，所述显示结构部分也可以采用双层源漏金属层结构，即所述显示结构部分包括层叠设置的遮光金属层SEL，第一绝缘层(图中未示出)，有源层(图中未示出)，第一栅极绝缘层GI1，第一栅金属层Gate1，第二栅 极绝缘层GI2，第二栅金属层Gate2，层间绝缘层ILD，第一源漏金属层SD1，第一平坦层PLN1，第二源漏金属层SD2，第二平坦层PLN2，阳极层ANO，像素界定层PDL，发光功能层EL，阴极层CAT，封装层TFE。所述触控结构部分包括层叠设置的无机层TBU，第二导电层(用于形成电极连接桥BR)，第二绝缘层IN，第一导电层(用于形成触控电极：Rxo，Txc)，第三平坦层TOC。
如图9所示，所述显示基板包括显示区域30和边框区域31，所述触控结构部分中的触控电极层在显示基板的衬底基板上的正投影位于所述显示区域，所述触控结构部分中的所述触控信号线60在衬底基板上的正投影，以及所述遮挡层20在衬底基板上的正投影位于所述边框区域31。
如图10所示，为本公开实施例提供的触控电极层的俯视示意图。图10中示意的触控电极层在衬底基板上的正投影，位于图9中的显示区域30。图10中示意的触控电极层采用自容式触控技术。
本公开实施例提供的显示基板中，显示结构部分包括多个子像素，所述子像素包括相耦接的子像素驱动电路和发光元件，所述子像素驱动电路用于为所述发光元件提供驱动信号，以驱动发光元件发光，实现显示基板的显示功能。
所述子像素驱动电路可以采用LTPS和LTPO模式，下面对这两种模式进行说明。
如图11至图13所示，子像素驱动电路采用了LTPS模式。
所述子像素驱动电路包括：第一晶体管T1，第二晶体管T2，第三晶体管3，第四晶体管T4，第五晶体管T5，第六晶体管T6，第七晶体管T7和存储电容Cst。
所述显示基板包括电源线VDD，数据线DA，栅线GA，发光控制线EM，第一复位线RE1，第二复位线RE2，第一初始化信号线Vinit1，第二初始化信号线Vinit2。
所述第一晶体管T1的栅极与对应的第一复位线RE1耦接，所述第一晶体管T1的第一极与对应的所述第一初始化信号线Vinit1耦接，所述第一晶体管T1的第二极与所述第三晶体管T3的栅极(即第一节点N1)耦接。所述第三晶体管T3的栅极复用为存储电容Cst的第一极板，所述存储电容Cst的第 二极板与电源线VDD耦接。
所述第二晶体管T2的栅极与对应的栅线GA耦接，所述第二晶体管T2第一极与所述第三晶体管T3(即驱动晶体管)的第二极(即第二节点N2)耦接，所述第二晶体管T2的第二极与所述第三晶体管T3的栅极耦接。
所述第四晶体管T4的栅极与对应的栅线GA耦接，所述第四晶体管T4的第一极与对应的数据线DA耦接，所述第四晶体管T4的第二极与所述第三晶体管T3的第一极(即第三节点N3)耦接。
所述第五晶体管T5的栅极与对应的发光控制线EM耦接，所述第五晶体管T5第一极与电源线VDD耦接，所述第五晶体管T5的第二极与所述第三晶体管T3的第一极耦接。
所述第六晶体管T6的栅极与对应的发光控制线EM耦接，所述第六晶体管T6的第一极与所述第三晶体管T3的第二极耦接，所述第六晶体管T6的第二极与发光元件LD的阳极(即第四节点N4)耦接。
所述第七晶体管T7的栅极与第二复位线RE2耦接，所述第七晶体管T7的第一极与所述第二初始化信号线Vinit2耦接，所述第七晶体管T7的第二极与所述发光元件LD的阳极耦接，所述发光元件LD的阴极接收负电源信号VSS。
上述结构的子像素驱动电路在工作时，每个工作周期均包括第一复位时段、写入补偿时段、第二复位时段和发光时段。
在所述第一复位时段，所述第一复位线RE1输入的复位信号处于有效电平，第一晶体管T1导通，由所述第一初始化信号线Vinit1传输的第一初始化信号输入至所述第三晶体管T3的栅极，使得前一帧保持在所述第三晶体管T3上的栅源电压Vgs被清零，实现对所述第三晶体管T3的栅极复位。
在写入补偿时段，所述复位信号处于非有效电平，所述第一晶体管T1截止，所述栅线GA输入的栅极扫描信号处于有效电平，控制所述第二晶体管T2和所述第四晶体管T4导通，所述数据线DA写入数据信号，并经所述第四晶体管T4传输至所述第三晶体管T3的第一极，同时，所述第二晶体管T2和所述第四晶体管T4导通，使得所述第三晶体管T3形成为二极管结构，因此通过所述第二晶体管T2、所述第三晶体管T3和所述第四晶体管T4配合工作， 实现对所述第三晶体管T3的阈值电压补偿，当补偿的时间足够长时，可控制所述第三晶体管T3的栅极电位最终达到Vdata+Vth，其中，Vdata代表数据信号电压值，Vth代表所述第三晶体管T3的阈值电压。
在第二复位时段，所述栅极扫描信号处于非有效电平，所述第二晶体管T2和所述第四晶体管T4均截止，所述第二复位线RE2(可选为相邻的下一行子像素驱动电路耦接的第一复位线)输入的复位信号处于有效电平，控制所述第七晶体管T7导通，将所述第二初始化信号线Vinit2输入的初始化信号输入至发光元件LD的阳极，控制发光元件LD不发光。
在发光时段，所述发光控制线EM写入的发光控制信号处于有效电平，控制所述第五晶体管T5和所述第六晶体管T6导通，使得由所述电源线VDD传输的电源信号输入至所述第三晶体管T3的第一极，同时由于所述第三晶体管T3的栅极保持在Vdata+Vth，使得所述第三晶体管T3导通，所述第三晶体管T3对应的栅源电压为Vdata+Vth-Vdd，其中Vdd为电源信号对应的电压值，基于该栅源电压产生的漏电流流向对应的发光元件LD的阳极，驱动对应的所述发光元件LD发光。
如图14至图16所示，子像素驱动电路采用了LTPO模式。
所述子像素驱动电路包括：第一晶体管T1，第二晶体管T2，第三晶体管3，第四晶体管T4，第五晶体管T5，第六晶体管T6，第七晶体管T7和存储电容Cst。
所述显示基板包括电源线VDD，数据线DA，第一栅线GA1，第二栅线GA2，发光控制线EM，第一复位线RE1，第一初始化信号线Vinit1，第二初始化信号线Vinit2。
所述第一晶体管T1的栅极与对应的所述第一复位线RE1耦接，所述第一晶体管T1的第一极与对应的所述第一初始化信号线Vinit1耦接，所述第一晶体管T1的第二极与所述第三晶体管T3的栅极耦接。所述第三晶体管T3的栅极复用为存储电容Cst的第一极板，所述存储电容Cst的第二极板与所述电源线VDD耦接。
所述第二晶体管T2的栅极与对应的第二栅线GA2耦接，所述第二晶体管T2第一极与第三晶体管T3的第二极耦接，所述第二晶体管T2的第二极与所 述第三晶体管T3的栅极耦接。
所述第四晶体管T4的栅极与对应的第一栅线GA1耦接，所述第四晶体管T4的第一极与对应的数据线DA耦接，所述第四晶体管T4的第二极与所述第三晶体管T3的第一极耦接。
所述第五晶体管T5的栅极与对应的发光控制线EM耦接，所述第五晶体管T5第一极与电源线VDD耦接，所述第五晶体管T5的第二极与所述第三晶体管T3的第一极耦接。
所述第六晶体管T6的栅极与对应的发光控制线EM耦接，所述第六晶体管T6的第一极与所述第三晶体管T3的第二极耦接，所述第六晶体管T6的第二极与发光元件LD的阳极耦接。
所述第七晶体管T7的栅极与对应的第一栅线GA1耦接，所述第七晶体管T7的第一极与所述第二初始化信号线Vinit2耦接，所述第七晶体管T7的第二极与所述发光元件LD的阳极耦接，发光元件LD的阴极接收负电源信号VSS。
本公开实施例还提供了一种触控显示装置，包括上述实施例提供的显示基板。
需要说明的是，所述触控显示装置可以为：电视、显示器、数码相框、手机、平板电脑等任何具有触控显示功能的产品或部件，其中，所述触控显示装置还包括柔性电路板、印刷电路板和背板等。
上述实施例提供的显示基板中，在所述封装层背向所述衬底基板的一侧设置了遮挡层20，并设置所述遮挡层20在所述衬底基板上的正投影与所述功能膜层10在所述衬底基板上的正投影至少部分交叠，使得当外界的光线射向所述功能膜层10时，能够被所述遮挡层20挡住，避免了光线射向所述功能膜层10被所述功能膜层10反射，从而避免了显示基板在实际应用中出现漏光现象，影响用户体验。
上述实施例提供的显示基板中，通过设置屏蔽线40，以及所述屏蔽线40包括的第一屏蔽部分401的延伸方向，与其跨越的有机沟槽50的边界的延伸方向垂直，能够使得在所述第一屏蔽部分401跨越的有机沟槽50的边界处，所述第一屏蔽部分401与其跨越的由有机沟槽50形成的段差面之间的接触面积最小化，从而使得在采用构图工艺形成所述第一屏蔽部分401的过程中， 有效降低了所述第一屏蔽部分401在所述段差面产生的残留，降低了所述第一屏蔽部分401与其周边其他导电结构之间发生短路的风险。
上述实施例提供的显示基板中，通过设置至少部分所述触控信号线60包括的所述第二触控部分602形成绕线结构6023，使得能够通过调整各触控信号线60中第二触控部分602包括的绕线结构6023的绕线长短，调节各触控信号线60的整体电阻，从而实现显示基板中所述多条触控信号线60的电阻大致相同，有效提升了显示基板传输触控信号的准确性。
因此，本公开实施例提供的触控显示装置在包括上述显示基板时，同样具有上述有益效果，此处不再赘述。
需要说明，信号线沿某方向延伸是指：信号线包括主要部分和与所述主要部分连接的次要部分，所述主要部分是线、线段或条形状体，所述主要部分沿某方向延展，且所述主要部分沿某方向延展的长度大于次要部分沿其它方向伸展的长度。
需要说明的是，本公开实施例的“同层”可以指的是处于相同结构层上的膜层。或者例如，处于同层的膜层可以是采用同一成膜工艺形成用于形成特定图形的膜层，然后利用同一掩模板通过一次构图工艺对该膜层图案化所形成的层结构。根据特定图形的不同，一次构图工艺可能包括多次曝光、显影或刻蚀工艺，而形成的层结构中的特定图形可以是连续的也可以是不连续的。这些特定图形还可能处于不同的高度或者具有不同的厚度。
在本公开各方法实施例中，所述各步骤的序号并不能用于限定各步骤的先后顺序，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，对各步骤的先后变化也在本公开的保护范围之内。
需要说明，本说明书中的各个实施例均采用递进的方式描述，各个实施例之间相同相似的部分互相参见即可，每个实施例重点说明的都是与其他实施例的不同之处。尤其，对于方法实施例而言，由于其基本相似于产品实施例，所以描述得比较简单，相关之处参见产品实施例的部分说明即可。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分 不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”、“耦接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
可以理解，当诸如层、膜、区域或基板之类的元件被称作位于另一元件“上”或“下”时，该元件可以“直接”位于另一元件“上”或“下”，或者可以存在中间元件。
在上述实施方式的描述中，具体特征、结构、材料或者特点可以在任何的一个或多个实施例或示例中以合适的方式结合。
以上所述，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以所述权利要求的保护范围为准。

Claims (22)

  1. 一种显示基板，包括：衬底基板和设置于所述衬底基板上的功能膜层，所述功能膜层能够反射外界射向所述功能膜层的光线；所述显示基板还包括封装层和遮挡层，所述遮挡层位于所述功能膜层背向所述衬底基板的一侧，所述封装层位于所述遮挡层与所述功能膜层之间，所述遮挡层在所述衬底基板上的正投影与所述功能膜层在所述衬底基板上的正投影至少部分交叠。
  2. 根据权利要求1所述的显示基板，其中，所述显示基板包括显示区域和包围所述显示区域的边框区域，所述边框区域包括弯折区，所述功能膜层的至少部分位于所述弯折区与所述显示区域之间。
  3. 根据权利要求2所述的显示基板，其中，所述功能膜层包括沿第一方向延伸的至少部分；
    所述遮挡层包括多个第一遮挡图形，所述第一遮挡图形包括沿第一方向延伸的至少部分，所述多个第一遮挡图形沿第二方向排列，所述第二方向与所述第一方向相交；至少部分所述第一遮挡图形在所述衬底基板上的正投影，与所述功能膜层在所述衬底基板上的正投影至少部分交叠。
  4. 根据权利要求3所述的显示基板，其中，所述第一遮挡图形在垂直于其自身延伸方向上的宽度与相邻的所述第一遮挡图形之间的最小间距的比值大于或等于3:2。
  5. 根据权利要求3所述的显示基板，其中，所述显示基板还包括屏蔽线，所述屏蔽线的至少部分位于相邻的两个第一遮挡图形之间。
  6. 根据权利要求5所述的显示基板，其中，所述第一遮挡图形与所述屏蔽线之间的最小间距大于或等于4微米。
  7. 根据权利要求5所述的显示基板，其中，所述第一遮挡图形与所述屏蔽线之间的最小间距等于所述第一遮挡图形在垂直于其自身延伸方向上的宽度的0.4倍。
  8. 根据权利要求2所述的显示基板，其中，所述功能膜层包括沿第一方向延伸的至少部分；
    所述遮挡层包括一整块第二遮挡图形，所述第二遮挡图形包括相耦接的 遮挡主体部和遮挡延伸部，所述遮挡主体部沿所述第一方向延伸，所述遮挡主体部在所述衬底基板上的正投影，与所述功能膜层在所述衬底基板上的正投影至少部分交叠。
  9. 根据权利要求8所述的显示基板，其中，所述遮挡延伸部复用为所述显示基板中的屏蔽线。
  10. 根据权利要求1～9中任一项所述的显示基板，其中，所述显示基板还包括阳极层，所述功能膜层与所述阳极层同层同材料设置，所述功能膜层作为所述显示基板中的正电源信号总线或负电源信号总线。
  11. 根据权利要求6或9所述的显示基板，其中，所述显示基板还包括有机层，所述有机层上形成有有机沟槽；
    所述屏蔽线位于所述有机层背向所述衬底基板的一侧，所述屏蔽线包括跨越所述有机沟槽的第一屏蔽部分，所述第一屏蔽部分的延伸方向，与其跨越的有机沟槽的边界的延伸方向垂直。
  12. 根据权利要求11所述的显示基板，其中，所述有机层包括像素界定层和平坦层，所述平坦层的至少部分位于所述像素界定层和所述衬底基板之间；所述像素界定层上形成有第一有机沟槽，所述平坦层上形成有第二有机沟槽，所述第一有机沟槽在所述衬底基板上的正投影与所述第二有机沟槽在所述衬底基板上的正投影至少部分交叠；
    所述第一屏蔽部分的延伸方向，与其跨越的所述第一有机沟槽的边界的延伸方向垂直，且与其跨越的所述第二有机沟槽的边界的延伸方向垂直。
  13. 根据权利要求11所述的显示基板，其中，所述显示基板还包括：多条触控信号线，所述触控信号线包括跨越所述有机沟槽的第一触控部分，所述第一触控部分的延伸方向，与其跨越的有机沟槽的边界的延伸方向垂直。
  14. 根据权利要求13所述的显示基板，其中，所述显示基板还包括沿所述第一方向排列的多个第一虚拟图形，所述第一虚拟图形沿第二方向延伸，所述第一虚拟图形跨越所述有机沟槽，所述第一虚拟图形与所述屏蔽线同层同材料设置。
  15. 根据权利要求14所述的显示基板，其中，所述多个第一虚拟图形划分为多组第一虚拟图形组，所述多组第一虚拟图形组沿第一方向排列；
    所述多条触控信号线划分为多组触控信号线组，所述触控信号线组的至少部分与所述第一虚拟图形组沿第一方向交替设置；所述屏蔽线的至少部分位于相邻的所述触控信号线组和所述第一虚拟图形组之间。
  16. 根据权利要求11所述的显示基板，其中，所述有机沟槽在所述衬底基板上的正投影的至少部分，位于所述弯折区和所述显示区域之间。
  17. 根据权利要求2所述的显示基板，其中，所述显示基板还包括：多条触控信号线，所述触控信号线包括依次首尾相接的第一触控部分，第二触控部分和第三触控部分，所述第一触控部分和所述第二触控部分位于所述边框区域，所述第三触控部分位于所述显示区域；
    至少部分所述触控信号线包括的所述第二触控部分形成绕线结构，所述多条触控信号线的电阻大致相同。
  18. 根据权利要求17所述的显示基板，其中，
    所述第二触控部分包括第一接入端部，第二接入端部和绕线结构，所述绕线结构分别与所述第一接入端部和所述第二接入端部耦接，所述第一接入端部与对应的第一触控部分耦接，所述第二接入端部与对应的第三触控部分耦接；
    所述第一接入端部包括沿第二方向延伸的至少部分，所述第二接入端部包括沿第二方向延伸的至少部分。
  19. 根据权利要求18所述的显示基板，其中，所述多条触控信号线包括的多个第二接入端部沿第一方向排列，所述多个第二接入端部中至少部分相邻的第二接入端部之间设置有虚拟绕线结构。
  20. 根据权利要求18所述的显示基板，其中，所述第二接入端部沿垂直于其自身延伸方向上的宽度是绕线结构线宽的3倍。
  21. 根据权利要求17所述的显示基板，其中，所述触控信号线与所述遮挡层同层同材料设置。
  22. 一种触控显示装置，包括如权利要求1～21中任一项所述的显示基板。
PCT/CN2022/115462 2022-08-29 2022-08-29 显示基板和触控显示装置 WO2024044879A1 (zh)

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CN108984022A (zh) * 2018-06-20 2018-12-11 京东方科技集团股份有限公司 触控面板及显示模组
WO2021237867A1 (zh) * 2020-05-27 2021-12-02 京东方科技集团股份有限公司 显示基板及其制造方法和显示装置
CN114171571A (zh) * 2021-12-08 2022-03-11 武汉华星光电半导体显示技术有限公司 显示面板以及移动终端
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CN108984022A (zh) * 2018-06-20 2018-12-11 京东方科技集团股份有限公司 触控面板及显示模组
WO2021237867A1 (zh) * 2020-05-27 2021-12-02 京东方科技集团股份有限公司 显示基板及其制造方法和显示装置
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