WO2024036588A1 - 一种信号处理装置，方法及相关设备 - Google Patents

一种信号处理装置，方法及相关设备 Download PDF

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Publication number
WO2024036588A1
WO2024036588A1 PCT/CN2022/113502 CN2022113502W WO2024036588A1 WO 2024036588 A1 WO2024036588 A1 WO 2024036588A1 CN 2022113502 W CN2022113502 W CN 2022113502W WO 2024036588 A1 WO2024036588 A1 WO 2024036588A1
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Prior art keywords
signal
signals
sub
pas
processor
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PCT/CN2022/113502
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English (en)
French (fr)
Inventor
刘乔
杨贵晨
刘发林
刘瑶
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Huawei Technologies Co Ltd
University of Science and Technology of China USTC
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Huawei Technologies Co Ltd
University of Science and Technology of China USTC
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Application filed by Huawei Technologies Co Ltd, University of Science and Technology of China USTC filed Critical Huawei Technologies Co Ltd
Priority to CN202280097307.0A priority Critical patent/CN119384795A/zh
Priority to PCT/CN2022/113502 priority patent/WO2024036588A1/zh
Publication of WO2024036588A1 publication Critical patent/WO2024036588A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters

Definitions

  • the present application relates to the field of communications, and in particular, to a signal processing device, method and related equipment.
  • PAPR peak-to-average power ratio
  • the power amplifier is an important component of communication devices. Signals with high PAPR can easily affect the signal processing performance of the PA. For example, it may cause the error vector magnitude of the signal processed by the PA. , EVM) deteriorates, increases the bit error rate of the receiver, causes adjacent channel interference, etc. The occurrence of these situations will cause the signal transmission efficiency of the communication device including the PA to decrease and affect the communication quality.
  • This application provides a signal processing device, method and related equipment for reducing the impact of the nonlinear characteristics of the PA on the signal processing performance of the PA, in order to improve communication quality.
  • the implementation of combining the M channels of first signals through a combiner can reduce cost and power consumption, and reduce the complexity of nonlinear predistortion.
  • a first aspect of the present application provides a signal processing device.
  • the signal processing device is included in a communication device.
  • the communication device includes at least M PAs.
  • the communication device may be a terminal device or a network device.
  • the signal processing device includes a combiner for inputting M channels of first signals and outputting a combined second signal of the M channels of first signals, wherein the M channels of first signals respectively include output signals of M PAs, M is an integer greater than 2; the signal processing device also includes a signal processor for outputting a third signal based on the second signal, wherein the third signal is used to compensate for the nonlinear information of the M first signals. .
  • the combiner in the signal processing device is used to input M channels of first signals and output a combined second signal of the M channels of first signals; in addition, the signal processor in the signal processing device is used to input M channels of first signals based on the The second signal outputs a third signal used to compensate for the nonlinear information of the M first signals.
  • the third signal obtained by the signal processing device can be used to perform pre-distortion compensation on the nonlinear information of the M first signals, reducing the impact of the nonlinear characteristics of the PA on the signal processing performance of the PA, in order to improve communication quality.
  • the implementation of combining the M channels of first signals through a combiner can reduce cost and power consumption, and reduce the complexity of nonlinear predistortion.
  • the signal processing device includes the M PAs.
  • the signal processing device does not include the M PAs, that is, the signal processing device and the M PAs are independently provided parts of the communication device.
  • the third signal includes a first sub-signal, and the first sub-signal is used to compensate the first nonlinear information of the M first signals.
  • the third signal obtained by the signal processor in the signal processing device includes the first sub-signal used to compensate the first nonlinear information of the M first signals.
  • the first nonlinear information may include the same nonlinear information corresponding to the M first signals, in order to perform predistortion compensation on the first nonlinear information of the M first signals through the first sub-signal, thereby reducing M The influence of the same nonlinear characteristics of two PAs on the signal processing performance of the PA.
  • the first nonlinear information of the M first signals can be called the common nonlinear information of the M first signals, the same nonlinear information of the M first signals, and the nonlinear information of the M first signals. Identical parts, common parts in the nonlinear information of the M first signals, or other descriptions are not limited here.
  • the signal processor is specifically configured to output the first sub-signal to a first predistorter, and the first predistorter is connected to the M PAs.
  • the third signal obtained by the signal processor in the signal processing device includes the first sub-signal used to compensate the first nonlinear information of the M first signals, and the signal processor can also The first sub-signal is output to a first predistorter connected to the M PAs, in order to perform predistortion compensation on the M PAs based on the first sub-signals through the first predistorter.
  • the signal processing device includes the first predistorter.
  • the signal processing device does not include the first predistorter, that is, the signal processing device and the first predistorter are both independently arranged parts of the communication device.
  • N is an integer greater than or equal to 1.
  • the value of N may be the same as the value of M, that is, predistortion compensation is performed on M PAs based on N first sub-signals through N predistorters.
  • the value of N is 1, that is, one predistorter is used to perform predistortion compensation on M PAs based on the first sub-signal.
  • the value of N is greater than 1 and less than M, that is, N predistorters are used to perform predistortion compensation on N PAs among the M PAs based on the N first sub-signals, and the remaining M-N PAs do not need to be predistorted. Distortion compensation to reduce processing overhead.
  • the nonlinear information of the M-N PAs indicates that the nonlinear characteristics of the M-N PAs have little impact on signal processing performance, or the first nonlinear information of the M-N PAs performs predistortion compensation in other ways.
  • the value of N is greater than 1 and less than M, that is, predistortion compensation is performed on M PAs based on N first sub-signals through N predistorters, where at least one of the N predistorters predistorts.
  • the distorter performs pre-distortion compensation on two or more PAs based on the first sub-signal.
  • the first predistorter is used to input the first sub-signal and output M first processing results to the M PAs respectively, wherein the M first processing results The result is obtained by performing predistortion processing based on the first sub-signal.
  • the first pre-distorter is used to perform pre-distortion processing based on the first sub-signal to obtain M first processes.
  • M first processing results are output to M PAs respectively, so that the M PAs respectively perform predistortion compensation on the first nonlinear information based on the M first processing results.
  • the third signal includes M second sub-signals, and the M second sub-signals are used to compensate for the second nonlinear information of the M first signals.
  • the third signal obtained by the signal processor in the signal processing device includes a second sub-signal used to compensate for the second nonlinear information of the M first signals.
  • the second nonlinear information may include different nonlinear information corresponding to M channels of first signals, in order to perform predistortion compensation on the second nonlinear information of the M channels of first signals through the M second sub-signals.
  • the second nonlinear information of the M first signals can be called non-shared nonlinear information of the M first signals, different nonlinear information of the M first signals, and nonlinear information of the M first signals. Different parts of the information, non-shared parts of the nonlinear information of the M first signals, or other descriptions are not limited here.
  • the number of second sub-signals included in the third signal is recorded as K, where K is an integer greater than or equal to 1, where K may be less than M. That is, predistortion compensation is performed on K PAs among the M PAs through the K first sub-signals, while the remaining M-K PAs do not require predistortion compensation to reduce processing overhead.
  • the nonlinear information of the M-K PAs indicates that the nonlinear characteristics of the M-N PAs have little impact on signal processing performance, or the second nonlinear information of the M-K PAs performs predistortion compensation through other methods.
  • the signal processor is specifically configured to output the M second sub-signals to M second predistorters, and the M second predistorters are connected to the M PA connection.
  • the third signal obtained by the signal processor in the signal processing device includes M second sub-signals used to compensate for the second nonlinear information of the M first signals, and the signal processor
  • the M second sub-signals may also be output to the M second pre-distorters connected to the M PAs respectively, so that the M second pre-distorters can perform on the M PAs based on the M second sub-signals. Predistortion compensation.
  • the signal processing device includes the second predistorter.
  • the signal processing device does not include the second predistorter, that is, the signal processing device and the second predistorter are both independently arranged parts of the communication device.
  • the second predistorter and the first predistorter are implemented by the same predistorter, or the second predistorter is different from the first predistorter.
  • the M second predistorters are used to respectively input the M second sub-signals and output M second processing results to the M PAs respectively, wherein, The M second processing results are respectively obtained by performing predistortion processing based on the second sub-signal.
  • the M second pre-distorters are used to perform pre-distortion processing based on the second sub-signals.
  • M second processing results are obtained and M second processing results are output to M PAs respectively, so that the M PAs respectively perform predistortion compensation on the second nonlinear information based on the M second processing results.
  • the number of the second pre-distortion processors may be K to reduce processing overhead.
  • the device further includes a sampler; the combiner is connected to the signal processor through the sampler.
  • the combiner in the signal processing device is connected to the signal processor through the sampler, so that the signal of the combiner is input to the signal processor for further processing after being sampled and processed by the sampler.
  • the signal processing device includes the sampler.
  • the signal processing device does not include the sampler, that is, the signal processing device and the sampler are both independently provided parts of the communication device.
  • the sampler is configured to input the fourth signal and output an undersampled result of the fourth signal to the signal processor, where the fourth signal is obtained based on the second signal.
  • the sampler in the signal processing device when the combiner in the signal processing device is connected to the signal processor through a sampler, the sampler is used to input the fourth signal obtained based on the second signal and output the fourth signal to the signal processor.
  • the undersampling result of the fourth signal enables the signal processor to determine a third signal for compensating the nonlinear information of the M first signals based on the undersampling result, so as to reduce the number of samples processed by the signal processor and reduce Computational complexity.
  • the signal processor is specifically configured to output the third signal based on the undersampling result of the fourth signal.
  • the signal processor can specifically output the third signal based on the undersampling result of the fourth signal to reduce the calculation time. the complexity.
  • the M first signals each further include input signals of M PAs
  • the signal processor is further configured to provide the signal to the third predistorter based on the input signals of the M PAs. (or modulator) outputs a fifth signal, which is used to compensate for the in-phase quadrature (IQ) error of the modulator.
  • the signal processor is also configured to output to the third predistorter (or modulator) based on the input signals of the M PAs for compensating the modulator.
  • the fifth signal of the IQ error is used to facilitate the third predistorter (or modulator) to subsequently perform signal compensation processing based on the fifth signal, thereby further improving the processing performance of predistortion compensation based on the third signal.
  • the fifth signal includes IQ imbalance parameters and/or compensation model parameters.
  • the signal processing device includes the third predistorter (or modulator).
  • the signal processing device does not include the third predistorter (or modulator), that is, the signal processing device and the third predistorter (or modulator) are both independently provided parts of the communication device.
  • the third predistorter is the first predistorter, or the third predistorter is the second predistorter, or the third predistorter is different from the first predistorter and the third predistorter Different from the second predistorter.
  • the combiner is connected to the M PAs through M adjustable attenuators, and the M adjustable attenuators are respectively used to conduct output signals of the M PAs. deal with.
  • the M first signals output by the M PA output combiners can be processed by M adjustable attenuators respectively and then input to the combiner for combining processing, so that the combiner obtains the attenuated signals, reducing processing complexity and improving the accuracy of subsequent calculations.
  • the signal processing device includes the adjustable attenuator.
  • the signal processing device does not include the adjustable attenuator, that is, the signal processing device and the adjustable attenuator are independently provided parts of the communication device.
  • the M adjustable attenuators are respectively used to process input signals of the M PAs.
  • the M adjustable attenuators can also be used to process the input signals of the M PAs respectively, so as to reduce the The processing complexity of the third predistorter (or modulator).
  • the M adjustable attenuators are connected to an adjustable power coefficient configuration module, and the adjustable power coefficient configuration module is used to configure the power coefficients of the M adjustable attenuators. Make adjustments.
  • the M adjustable attenuators can also be connected to an adjustable power coefficient configuration module, and the adjustable power coefficient The configuration module is used to adjust the power configuration coefficients of the M adjustable attenuators to adjust the power configuration coefficients of the M first signals input to the combiner.
  • the signal processing device includes the adjustable power coefficient configuration module.
  • the signal processing device does not include the adjustable power coefficient configuration module, that is, the signal processing device and the adjustable power coefficient configuration module are both independently provided parts of the communication device.
  • the second aspect of the present application provides a signal processing method, which is executed by a communication device, or the method is performed by some components in the communication device (such as the signal processing device mentioned in the first aspect and any of its embodiments, or (processor, chip or chip system, etc.) in the communication device, or the method can also be implemented by a functional logic module or software that can implement the signal processing method.
  • the communication device may be a terminal device or a network device.
  • the communication method is described by taking the example that the communication method is executed by a signal processing device.
  • the signal processing device acquires M first signals, the first signal includes the output signal of the PA, and M is an integer greater than 2; the signal processing device determines the second signal after combining the M first signals; The signal processing device outputs a third signal based on the second signal, and the third signal is used to compensate for the nonlinear information of the M first signals.
  • the signal processing device determines a second signal after combining the M channels of first signals, and the signal processing device is based on the first signal.
  • the second signal outputs a third signal used to compensate for the nonlinear information of the M first signals.
  • the third signal obtained by the signal processing device can be used to perform pre-distortion compensation on the nonlinear information of the M first signals, reducing the impact of the nonlinear characteristics of the PA on the signal processing performance of the PA, in order to improve communication quality.
  • the third signal includes a first sub-signal, the first sub-signal is used to compensate the first nonlinear information of the M first signals;
  • Outputting a third signal from two signals includes: outputting the first sub-signal to a first predistorter based on the second signal, and the first predistorter is connected to the M PAs; wherein the first predistorter is used to input the first sub-signal, and output M first processing results to the M PAs respectively, where the M first processing results are obtained by pre-distortion processing based on the first sub-signal.
  • the third signal obtained by the signal processing device includes the first sub-signal used to compensate the first nonlinear information of the M first signals.
  • the first nonlinear information may include the same nonlinear information corresponding to the M first signals, in order to perform predistortion compensation on the first nonlinear information of the M first signals through the first sub-signal, thereby reducing M The influence of the same nonlinear characteristics of two PAs on the signal processing performance of the PA.
  • the first nonlinear information of the M first signals can be called the common nonlinear information of the M first signals, the same nonlinear information of the M first signals, and the nonlinear information of the M first signals. Identical parts, common parts in the nonlinear information of the M first signals, or other descriptions are not limited here.
  • the signal processing device includes the first predistorter.
  • the signal processing device does not include the first predistorter, that is, the signal processing device and the first predistorter are both independently arranged parts of the communication device.
  • N is an integer greater than or equal to 1.
  • the value of N may be the same as the value of M, that is, predistortion compensation is performed on M PAs based on N first sub-signals through N predistorters.
  • the value of N is 1, that is, one predistorter is used to perform predistortion compensation on M PAs based on the first sub-signal.
  • the value of N is greater than 1 and less than M, that is, N predistorters are used to perform predistortion compensation on N PAs among the M PAs based on the N first sub-signals, and the remaining M-N PAs do not need to be predistorted. Distortion compensation to reduce processing overhead.
  • the nonlinear information of the M-N PAs indicates that the nonlinear characteristics of the M-N PAs have little impact on signal processing performance, or the first nonlinear information of the M-N PAs performs predistortion compensation in other ways.
  • the value of N is greater than 1 and less than M, that is, predistortion compensation is performed on M PAs based on N first sub-signals through N predistorters, where at least one of the N predistorters predistorts.
  • the distorter performs pre-distortion compensation on two or more PAs based on the first sub-signal.
  • the third signal includes M second sub-signals, and the M second sub-signals are used to compensate for the second nonlinear information of the M first signals;
  • the outputting the third signal based on the second signal includes: outputting the M second sub-signals to M second predistorters based on the second signal, and the M second predistorters are respectively connected to the M PAs; Wherein, the M second predistorters are used to respectively input the M second sub-signals and output M second processing results to the M PAs respectively, wherein the M second processing results are respectively based on the The two sub-signals are obtained by pre-distortion processing.
  • the third signal obtained by the signal processing device includes a second sub-signal used to compensate for the second nonlinear information of the M first signals.
  • the second nonlinear information may include different nonlinear information corresponding to M channels of first signals, in order to perform predistortion compensation on the second nonlinear information of the M channels of first signals through the M second sub-signals.
  • the second nonlinear information of the M first signals can be called non-shared nonlinear information of the M first signals, different nonlinear information of the M first signals, and nonlinear information of the M first signals. Different parts of the information, non-shared parts of the nonlinear information of the M first signals, or other descriptions are not limited here.
  • the number of second sub-signals included in the third signal is recorded as K, where K is an integer greater than or equal to 1, where K may be less than M. That is, predistortion compensation is performed on K PAs among the M PAs through the K first sub-signals, while the remaining M-K PAs do not require predistortion compensation to reduce processing overhead.
  • the nonlinear information of the M-K PAs indicates that the nonlinear characteristics of the M-N PAs have little impact on signal processing performance, or the second nonlinear information of the M-K PAs performs predistortion compensation through other methods.
  • outputting the third signal based on the second signal includes: outputting the third signal based on an undersampling result of the second signal.
  • the signal processing device in the process of outputting the third signal based on the second signal, can output the third signal based on the undersampling result of the second signal, that is, the signal processing device can output the third signal based on the undersampling result.
  • the third signal used to compensate the nonlinear information of the M first signals is determined, so as to reduce the number of samples processed and reduce the computational complexity.
  • determining the combined second signal of the M first signals includes: after processing the output signals of the M PAs respectively based on M adjustable attenuators, determining the second signal.
  • the M first signals output by the M PA output combiners can be processed by M adjustable attenuators respectively and then input to the combiner for combining processing, so that the combiner obtains the attenuated signals, reducing processing complexity and improving the accuracy of subsequent calculations.
  • the M adjustable attenuators are connected to an adjustable power coefficient configuration module, and the adjustable power coefficient configuration module is used to configure the power coefficients of the M adjustable attenuators. Make adjustments.
  • the M adjustable attenuators can also be connected to an adjustable power coefficient configuration module, and the adjustable power coefficient The configuration module is used to adjust the power configuration coefficients of the M adjustable attenuators to adjust the power configuration coefficients of the M first signals input to the combiner.
  • a third aspect of the present application provides a communication device that can implement the method in the above second aspect or any possible implementation manner of the second aspect.
  • the device includes corresponding units or modules for performing the above method.
  • the units or modules included in the device can be implemented by software and/or hardware.
  • the device may be a communication device, or the device may be a component in the communication device (such as the signal processing device mentioned in the first aspect and any embodiment thereof, or a processor, chip or chip system in the communication device etc.), or the method can also be implemented by functional logic modules or software that can implement the signal processing method.
  • the communication device may be a terminal device or a network device.
  • the device includes a processing unit and a transceiver unit; the transceiver unit is used to obtain M first signals, the first signal includes the output signal of the PA, M is an integer greater than 2; the processing unit is used to determine the Mth A second signal after signal combination; the processing unit is further configured to output a third signal based on the second signal, and the third signal is used to compensate for the nonlinear information of the M first signals.
  • the third signal includes a first sub-signal, the first sub-signal is used to compensate the first nonlinear information of the M first signals; the processing unit is based on The second signal outputting the third signal includes: the processing unit outputs the first sub-signal to a first predistorter based on the second signal, and the first predistorter is connected to the M PAs; wherein, the first predistorter The distortion device is used to input the first sub-signal and output M first processing results to the M PAs respectively, where the M first processing results are obtained by pre-distortion processing based on the first sub-signal.
  • the third signal includes M second sub-signals, and the M second sub-signals are used to compensate for the second nonlinear information of the M first signals;
  • the processing unit outputting a third signal based on the second signal includes: the processing unit outputting the M second sub-signals to M second predistorters based on the second signal, and the M second predistorters are respectively connected with the M PAs are connected; wherein, the M second predistorters are used to input the M second sub-signals respectively, and output M second processing results to the M PAs respectively, where the M second processing results They are respectively obtained by performing predistortion processing based on the second sub-signal.
  • the processing unit outputting the third signal based on the second signal includes: the processing unit outputting the third signal based on an undersampling result of the second signal.
  • the processing unit determining the combined second signal of the M first signals includes: the processing unit output signals of the M PAs respectively based on the M adjustable attenuators. After processing, the second signal is determined.
  • the M adjustable attenuators are connected to an adjustable power coefficient configuration module, and the adjustable power coefficient configuration module is used to configure the power coefficients of the M adjustable attenuators. Make adjustments.
  • the component modules of the communication device can also be used to perform the steps performed in each possible implementation manner of the second aspect, and achieve corresponding technical effects.
  • the second aspect which will not be discussed here. Repeat.
  • a fourth aspect of the embodiments of the present application provides a communication device, including the signal processing device in the foregoing first aspect or any possible implementation of the first aspect.
  • the communication device is a transmitter, a sending device, a signal sending device, etc.
  • the fifth aspect of the embodiment of the present application provides a communication device, including at least one processor, the at least one processor is coupled to a memory; the memory is used to store programs or instructions; the at least one processor is used to execute the program or instructions , so that the device implements the method described in the aforementioned second aspect or any possible implementation manner of the second aspect, or.
  • the sixth aspect of the embodiment of the present application provides a communication device, including at least one logic circuit and an input-output interface; the logic circuit and the input-output interface are used to perform the aforementioned second aspect or any of the possible implementations of the second aspect. the method described.
  • the seventh aspect of the embodiment of the present application provides a computer-readable storage medium that stores one or more computer-executable instructions.
  • the processor executes the above second aspect or any one of the second aspects. possible implementation methods.
  • the eighth aspect of the embodiment of the present application provides a computer program product (or computer program) that stores one or more computers.
  • the processor executes the above second aspect or the second aspect. any possible way to do it.
  • a ninth aspect of the embodiment of the present application provides a chip system.
  • the chip system includes at least one processor and is used to support a communication device to implement the functions involved in the above-mentioned second aspect or any possible implementation manner of the second aspect.
  • the chip system may also include a memory for storing necessary program instructions and data of the communication device.
  • the chip system may be composed of chips, or may include chips and other discrete devices.
  • the chip system further includes an interface circuit that provides program instructions and/or data to the at least one processor.
  • a tenth aspect of the embodiments of the present application provides a communication system, which includes the communication device of the third aspect, or the communication system includes the communication device of the fourth aspect, or the communication system includes the fifth aspect.
  • Figure 1a is a schematic diagram of the communication system provided by this application.
  • Figure 1b is a schematic diagram of the communication signal involved in this application.
  • FIG. 2 is a schematic diagram of the communication method provided by this application.
  • Figure 3a is a schematic diagram of the signal processing device
  • Figure 3b is another schematic diagram of the signal processing device
  • FIG. 4 is a schematic diagram of the signal processing device provided by this application.
  • FIG. 5a is another schematic diagram of the signal processing device provided by this application.
  • FIG. 5b is another schematic diagram of the signal processing device provided by this application.
  • FIG. 5c is another schematic diagram of the signal processing device provided by this application.
  • FIG. 5d is another schematic diagram of the signal processing device provided by this application.
  • FIG. 5e is another schematic diagram of the signal processing device provided by this application.
  • FIG. 5f is another schematic diagram of the signal processing device provided by this application.
  • Figure 5g is another schematic diagram of the signal processing device provided by this application.
  • Figure 5h is another schematic diagram of the signal processing device provided by this application.
  • FIG. 6 is a schematic diagram of the signal processing method provided by this application.
  • FIG. 7 is a schematic diagram of the communication device provided by this application.
  • FIG. 8 is another schematic diagram of the communication device provided by this application.
  • FIG. 9 is another schematic diagram of the communication device provided by this application.
  • Figure 10 is another schematic diagram of the communication device provided by this application.
  • Terminal device It can be a wireless terminal device that can receive network device scheduling and instruction information.
  • the wireless terminal device can be a device that provides voice and/or data connectivity to the user, or a handheld device with a wireless connection function, or Other processing equipment connected to the wireless modem.
  • the terminal device can communicate with one or more core networks or the Internet via a radio access network (RAN).
  • RAN radio access network
  • the terminal device can be a mobile terminal device, such as a mobile phone (also known as a "cellular" phone, mobile phone). phone), computer and data card, which may be, for example, a portable, pocket-sized, handheld, computer-built-in or vehicle-mounted mobile device that exchanges voice and/or data with the wireless access network.
  • PCS personal communication service
  • SIP Session Initiation Protocol
  • WLL wireless local loop
  • PDA personal digital assistants
  • Tablets tablets Computers
  • computers with wireless transceiver functions and other equipment.
  • Wireless terminal equipment can also be called a system, subscriber unit, subscriber station, mobile station, mobile station (MS), remote station, access point ( access point, AP), remote terminal equipment (remote terminal), access terminal equipment (access terminal), user terminal equipment (user terminal), user agent (user agent), subscriber station (subscriber station, SS), client equipment (customer premises equipment, CPE), terminal (terminal), user equipment (user equipment, UE), mobile terminal (mobile terminal, MT), etc.
  • the terminal device can also be a wearable device and a next-generation communication system, such as a terminal device in a 5G communication system or a terminal device in a future evolved public land mobile network (PLMN).
  • PLMN public land mobile network
  • Network equipment It can be equipment in a wireless network.
  • network equipment can be a radio access network (RAN) node (or equipment) that connects terminal equipment to the wireless network, and can also be called a base station.
  • RAN equipment are: new generation base station (generation Node B, gNodeB), transmission reception point (TRP), evolved Node B (evolved Node B, eNB), wireless network in 5G communication system Controller (radio network controller, RNC), node B (Node B, NB), base station controller (base station controller, BSC), base transceiver station (base transceiver station, BTS), home base station (e.g., home evolved Node B , or home Node B, HNB), base band unit (base band unit, BBU), or wireless fidelity (wireless fidelity, Wi-Fi) access point (access point, AP), etc.
  • the network device may include a centralized unit (CU) node, a distributed unit (CU) node, a distributed unit (CU) node,
  • the network device may be other devices that provide wireless communication functions for terminal devices.
  • the embodiments of this application do not limit the specific technology and specific equipment form used by the network equipment.
  • the embodiments of this application are not limited.
  • the network equipment may also include core network equipment.
  • the core network equipment may include, for example, access and mobility management function (access and mobility management function, AMF), user plane function (user plane function, UPF) or session management function (session management function). function, SMF), etc.
  • the device used to implement the function of the network device may be a network device, or may be a device that can support the network device to implement the function, such as a chip system, and the device may be installed in the network device.
  • the technical solution provided by the embodiment of the present application the technical solution provided by the embodiment of the present application is described by taking the device for realizing the functions of the network device being a network device as an example.
  • system and “network” in the embodiments of this application can be used interchangeably.
  • “At least one” means one or more, and “plurality” means two or more.
  • “And/or” describes the relationship between associated objects, indicating that there can be three relationships, for example, A and/or B, which can mean: A alone exists, A and B exist simultaneously, and B alone exists, where A, B can be singular or plural.
  • the character “/” generally indicates that the related objects are in an “or” relationship.
  • “At least one of the following” or similar expressions thereof refers to any combination of these items, including any combination of a single item (items) or a plurality of items (items).
  • At least one of A, B, and C includes A, B, C, AB, AC, BC, or ABC.
  • the ordinal numbers such as “first” and “second” mentioned in the embodiments of this application are used to distinguish multiple objects and are not used to limit the order, timing, priority or importance of multiple objects. degree.
  • FIG. 1a is a schematic diagram of the communication system in this application.
  • a network device 101 and six terminal devices are shown as an example.
  • the six terminal devices are terminal device 1, terminal device 2, terminal device 3, terminal device 4, terminal device 5, terminal device 6, etc. .
  • terminal device 1 is a smart teacup
  • terminal device 2 is a smart air conditioner
  • terminal device 3 is a smart gas pump
  • terminal device 4 is a vehicle
  • terminal device 5 is a mobile phone
  • terminal device 6 is The printer is used as an example.
  • the signal sending device (or called the transmitting end, the transmitting end device) can be a network device, and the signal receiving device (or called the receiving end, the receiving end device) can be the terminal device; or , the signal sending device may be a terminal device, and the signal receiving device may be a network device; or both the signal sending device and the signal receiving device may be network devices; or both the signal sending device and the signal receiving device may be terminal devices.
  • the communication system includes at least one network device and/or at least one terminal device.
  • PAPR peak-to-average power ratio
  • PAPR can be determined through the mathematical relationship between peak power (Peak Power) and average power (Average Power). For example, in a time domain signal, PAPR can be determined as follows:
  • the power amplifier is an important component of communication devices. Signals with high PAPR can easily affect the signal processing performance of the PA. For example, it may cause the error vector magnitude of the signal processed by the PA. , EVM) deteriorates, increases the bit error rate of the receiver, causes adjacent channel interference, etc. The occurrence of these situations will cause the signal transmission efficiency of the communication device including the PA to decrease and affect the communication quality.
  • the power backoff phenomenon caused by higher PAPR can be realized in the manner shown in Figure 1b.
  • the straight line represents the ideal transfer function (ideal transfer function), and the curve represents the practical transfer function (practical transfer function).
  • the output power (out power) corresponding to the ideal transfer function and the actual transfer function are basically consistent, and the values are all within Near P in 1 , there is no power regression (or the power regression is not obvious).
  • the output power corresponding to the ideal transfer function is P out 2
  • the output power corresponding to the actual transfer function is P′ out 2 . It can be seen that the difference between the two It will increase with the increase of input power, resulting in power backoff, which will affect the reduction of transmit power, thus causing the signal transmission distance to become smaller.
  • Figure 2 is a schematic diagram of the application scenario of the present application, in which the transmitter can be a network device or a terminal device, and the receiver can be a network device or a terminal device.
  • the transmitter can include the following modules:
  • the encoding module (not shown in the figure) is mainly used to complete the encoding, interleaving and other functions of the information bits to be transmitted (recorded as Tx bit);
  • the transmitter baseband processing module is mainly used to complete information modulation, framing, filtering and shaping, pre-distortion correction and other processing;
  • Pre-distortion (PD) module is mainly used for linear pre-correction of power amplifiers
  • Digital to analog converter (DAC) module mainly used for conversion of digital signals and analog signals
  • the radio frequency module in the transmission mainly completes functions such as modulating the baseband signal to the radio frequency signal and signal filtering;
  • Power amplifier is mainly used to amplify the power of signals
  • Wireless channel mainly refers to the wireless transmission of electromagnetic waves in media such as atmosphere, vacuum, water, etc.
  • Wired channels mainly refer to transmission in optical fiber, copper wire and other media
  • the receiver can include the following modules:
  • the receiving RF module is mainly used to down-convert the received RF signal to a low-frequency signal or baseband signal;
  • ADC Analog to digital converter
  • the receiving baseband unit module is mainly used to complete the recovery of the received baseband signal, including synchronization, equalization, decoding and other processing.
  • the solution provided by this application mainly focuses on reducing the nonlinear characteristics of the PA on the signal processing performance of the PA. impact in order to improve communication quality.
  • the solution provided by this application can be applied to the improvement of the PD module processing process in Figure 2.
  • the PD module can be called digital pre-distortion (DPD).
  • the communication device where the PD module is located can be a transmitter or a receiver, and the communication device includes M PAs and the signals input to the M PAs respectively are denoted as x1, x2... xM, the signals processed by M PAs are output through M antennas (i.e., antenna_1, antenna_2...antenna_M in the figure) as an example, M is an integer greater than or equal to 2.
  • FIG. 3a A possible implementation of a PD module is shown in Figure 3a.
  • M PAs i.e., PA_1, PA_2... in the figure
  • the signal processing of PA_M is improved.
  • the signal processing device in Figure 3a includes a coefficient solving algorithm module, which is used to obtain the output signals of M PAs, and perform coefficient solving based on the output signals of the M PAs to obtain M pieces of feedback information.
  • M pieces of feedback information are sent to M PDs (i.e., PD_1, PD_2...PD_M in the figure), so that the M PDs perform pre-distortion processing on the PAs on each link based on each feedback information to improve the performance of the M PAs. Signal processing performance.
  • FIG. 3b A possible implementation method of a PD module is shown in Figure 3b.
  • M PAs i.e., PA_1, PA_2... in the figure
  • the signal processing of PA_M is improved.
  • the signal processing device in Figure 3b includes a coefficient solution algorithm module.
  • the coefficient solution algorithm module obtains the output signal of one of the M PAs at a certain moment, and based on that one After coefficient calculation is performed on the output signal of the PA to obtain feedback information, the feedback information is sent to a corresponding PD among the M PDs (i.e., PD_1, PD_2...PD_M in the figure), so that the PD is based on the feedback
  • the information performs pre-distortion processing on the PA on the link. Moreover, this processing process is repeated M times to improve the signal processing performance of the M PAs respectively.
  • the time division multiplexing single-channel feedback structure switched by the time division switch reduces the complexity of the feedback branch to a certain extent.
  • the setting of the time division switch will cause the problem of crosstalk isolation between multiple input signals, which will always cause the obtained feedback signal to be interfered by other branches, thereby deteriorating the performance of digital predistortion.
  • the high-speed switching of the time division switch requires a high-precision synchronization mechanism with multiple baseband modules, which is complex to implement.
  • FIG. 4 it is a schematic diagram of a signal processing device provided by this application.
  • the signal processing device is located in a communication device.
  • the communication device can be a terminal device or a network device.
  • the signal processing device at least includes a signal processor and a combiner.
  • the combiner is used to input M channels of first signals and output a combined second signal of the M channels of first signals, wherein the M channels of first signals respectively include M PA signals.
  • Output signal, M is an integer greater than 2.
  • the signal processor is configured to output a third signal based on the second signal, where the third signal is used to compensate for the nonlinear information of the M first signals.
  • the combiner in the signal processing device is used to input M channels of first signals and output a combined second signal of the M channels of first signals; in addition, the signal processor in the signal processing device is used to A third signal for compensating the nonlinear information of the M first signals is output based on the second signal.
  • the third signal obtained by the signal processing device can be used to perform pre-distortion compensation on the nonlinear information of the M first signals, reducing the impact of the nonlinear characteristics of the PA on the signal processing performance of the PA, in order to improve communication quality.
  • the signal processing device may not include the M PAs as an example, that is, the signal processing device and the M PAs are both independently provided parts of the communication device.
  • the signal processing device may include the M PAs, which is not limited here.
  • the PD module connected to the signal processing device shown in Figure 4 will be exemplarily described below in conjunction with more implementation examples.
  • the third signal output by the signal processing device includes a first sub-signal, which is used to compensate for the first nonlinear information of the M first signals.
  • the third signal obtained by the signal processor in the signal processing device includes the first sub-signal used to compensate the first nonlinear information of the M first signals.
  • the first nonlinear information may include the same nonlinear information corresponding to the M first signals, in order to perform predistortion compensation on the first nonlinear information of the M first signals through the first sub-signal, thereby reducing M The influence of the same nonlinear characteristics of two PAs on the signal processing performance of the PA.
  • the first nonlinear information of the M first signals can be called the common nonlinear information of the M first signals, the same nonlinear information of the M first signals, and the nonlinear information of the M first signals. Identical parts, common parts in the nonlinear information of the M first signals, or other descriptions are not limited here.
  • the signal processor is specifically configured to output the first sub-signal to a first predistorter, and the first predistorter is connected to the M PAs.
  • the third signal obtained by the signal processor in the signal processing device includes the first sub-signal for compensating the first nonlinear information of the M first signals, and the signal processor can also provide The first predistorter connected to the M PAs outputs the first sub-signal, in order to perform pre-distortion compensation on the M PAs based on the first sub-signal through the first predistorter.
  • the example shown in FIG. 4 does not include the first predistorter, that is, the signal processing device and the first predistorter are both independently arranged parts of the communication device.
  • the signal processing device in the example shown in FIG. 4 includes the first predistorter, which is not limited here.
  • N is an integer greater than or equal to 1.
  • N is an integer greater than or equal to 1.
  • the value of N can be the same as the value of M, that is, through N predistorters (denoted as the first predistorter_1 in Figure 5a, The first predistorter_2...the first predistorter_N) respectively perform predistortion compensation on the M PAs based on N first sub-signals.
  • the value of N is 1, that is, one predistorter (denoted as the first predistorter in Figure 5b) is used based on the first sub-signal pair.
  • M PAs perform predistortion compensation.
  • the value of N can also be greater than 1 and less than M.
  • N predistorters are used to perform predistortion compensation on N PAs among the M PAs based on the N first sub-signals, and The remaining M-N PAs do not require predistortion compensation to reduce processing overhead.
  • the nonlinear information of the M-N PAs indicates that the nonlinear characteristics of the M-N PAs have little impact on signal processing performance, or the first nonlinear information of the M-N PAs performs predistortion compensation in other ways.
  • predistortion compensation is performed on M PAs based on N first sub-signals through N predistorters, where N predistorters At least one predistorter in the processor performs predistortion compensation on two or more PAs based on the first sub-signal.
  • the first predistorter is used to input the first sub-signal and output M first processing results to the M PAs respectively, wherein the M first processing results are based on the The first sub-signal is obtained through pre-distortion processing.
  • the signal processor in the signal processing device outputs the first sub-signal to the first pre-distorter
  • the first pre-distorter is used to perform pre-distortion processing based on the first sub-signal to obtain M first processing results and M first processing results are output to the M PAs respectively, so that the M PAs respectively perform predistortion compensation on the first nonlinear information based on the M first processing results.
  • the third signal output by the signal processing device includes M second sub-signals, and the M second sub-signals are used for the second non-transformation of the M first signals.
  • Linear information is compensated.
  • the third signal obtained by the signal processor in the signal processing device includes a second sub-signal used to compensate for the second nonlinear information of the M first signals.
  • the second nonlinear information may include different nonlinear information corresponding to M channels of first signals, in order to perform predistortion compensation on the second nonlinear information of the M channels of first signals through the M second sub-signals.
  • the second nonlinear information of the M first signals can be called non-shared nonlinear information of the M first signals, different nonlinear information of the M first signals, and nonlinear information of the M first signals. Different parts of the information, non-shared parts of the nonlinear information of the M first signals, or other descriptions are not limited here.
  • the number of second sub-signals included in the third signal is recorded as K, where K is an integer greater than or equal to 1, where K may be less than M. That is, predistortion compensation is performed on K PAs among the M PAs through the K first sub-signals, while the remaining M-K PAs do not require predistortion compensation to reduce processing overhead.
  • the nonlinear information of the M-K PAs indicates that the nonlinear characteristics of the M-N PAs have little impact on signal processing performance, or the second nonlinear information of the M-K PAs performs predistortion compensation through other methods.
  • the number K of second sub-signals contained in the third signal is the same as M
  • the number K of second predistorters is also the same as M
  • the implementation process can be implemented as shown in Figure 5c, That is, the number K of second predistorters connected to the signal processor is equal to M.
  • the second predistorters can be recorded as second predistortor_1, second predistorter_2... in Figure 5c.
  • First predistorter_K when the number K of second sub-signals contained in the third signal is the same as M, the number K of second predistorters is also the same as M, and the implementation process can be implemented as shown in Figure 5c, That is, the number K of second predistorters connected to the signal processor is equal to M.
  • the second predistorters can be recorded as second predistortor_1, second predistorter_2... in Figure 5c.
  • First predistorter_K is the same as M
  • the number of second predistorters is 1, and the implementation process can be implemented in the manner shown in Figure 5d, that is, with the signal processor The number of connected second predistorters is 1, and the second predistorter can be recorded as the second predistorter in Figure 5d.
  • the signal processor is specifically configured to output the M second sub-signals to M second predistorters, and the M second predistorters are respectively connected to the M PAs.
  • the third signal obtained by the signal processor in the signal processing device includes M second sub-signals used to compensate for the second nonlinear information of the M first signals, and the signal processor can also The M second sub-signals are respectively output to the M second pre-distorters connected to the M PAs, in order to pre-distort the M PAs based on the M second sub-signals through the M second pre-distorters. compensate.
  • the signal processing device includes the second predistorter.
  • the signal processing device does not include the second predistorter, that is, the signal processing device and the second predistorter are both independently arranged parts of the communication device.
  • the M second predistorters are used to respectively input the M second sub-signals and output M second processing results to the M PAs respectively, where the M second The processing results are respectively obtained by performing pre-distortion processing based on the second sub-signal.
  • the M second pre-distorters are used to perform pre-distortion processing based on the second sub-signals to obtain M second processing results and output M second processing results to M PAs respectively, so that the M PAs respectively perform predistortion compensation on the second nonlinear information based on the M second processing results.
  • the number of the second pre-distortion processors may be K to reduce processing overhead.
  • the signal processing device may include a first predistorter and not include a second predistorter, or the signal processing device may include a second predistorter. and does not include a first predistorter, or the signal processing device may include a first predistorter and the signal processing device may include a second predistorter, which is not limited here.
  • the signal processing device may include a first predistorter and the signal processing device may include a second predistorter
  • the connection between the first predistorter, the second predistorter and the PA is not limited.
  • the first predistorter may be connected to the PA through the second predistorter
  • the second predistorter may be connected to the PA through the first predistorter, or other implementation methods, which will not be described again here.
  • the second predistorter and the first predistorter are implemented by the same predistorter, or the second predistorter is different from the first predistorter.
  • the second predistorter is different from the first predistorter, the number of first predistorters is 1 and the number of second predistorters K and M are equal, the implementation process can be as shown in Figure 5e Or implemented as shown in Figure 5f.
  • the first predistorter is connected to M PAs through K second predistorters.
  • K second predistorters are connected to M PAs through the first predistorters.
  • the signal processing device may further include a sampler; the combiner is connected to the signal processor through the sampler. Specifically, the combiner in the signal processing device is connected to the signal processor through the sampler, so that the signal of the combiner is input to the signal processor for further processing after being sampled by the sampler.
  • the signal processing device includes the sampler.
  • the signal processing device does not include the sampler, that is, the signal processing device and the sampler are both independently provided parts of the communication device.
  • the sampler is configured to input a fourth signal obtained based on the second signal, and output an undersampling result of the fourth signal to the signal processor.
  • the sampler is used to input the fourth signal obtained based on the second signal and output the fourth signal to the signal processor.
  • the undersampling result of the signal enables the signal processor to determine a third signal for compensating the nonlinear information of the M first signals based on the undersampling result, so as to reduce the number of samples processed by the signal processor and reduce the computational complexity.
  • the signal processor is specifically configured to output the third signal based on the undersampling result of the fourth signal. Therefore, when the combiner in the signal processing device is connected to the signal processor through the sampler, the signal processor can specifically output the third signal based on the undersampling result of the fourth signal to reduce computational complexity.
  • the signal processing device can also be implemented in the manner shown in Figure 5h.
  • the input signal "x1, x2...xM" as a baseband signal as an example, between the combiner and sampler of the signal processing device, ADC, filters, oscillators, etc. can also be included.
  • the ADC is mainly used for conversion of analog signals and digital signals, so that the sampler can sample based on digital signals and simplify operations.
  • this filter is mainly used to filter some frequency bands outside the input signal of interest.
  • the oscillator is mainly used as an energy conversion device for converting DC power into AC power with a certain frequency.
  • the M first signals input to the combiner each further include input signals of M PAs
  • the signal processor is further configured to A fifth signal is output to the third predistorter (or modulator) based on the input signals of the M PAs, and the fifth signal is used to compensate the IQ error of the modulator.
  • the signal processor is also configured to output to the third predistorter (or modulator) based on the input signals of the M PAs for compensating the IQ error of the modulator.
  • the fifth signal is used to facilitate the third predistorter (or modulator) to subsequently perform signal compensation processing based on the fifth signal, thereby further improving the processing performance of predistortion compensation based on the third signal.
  • the fifth signal includes IQ imbalance parameters and/or compensation model parameters.
  • the signal processing device includes the third predistorter (or modulator).
  • the signal processing device does not include the third predistorter (or modulator), that is, the signal processing device and the third predistorter (or modulator) are both independently provided parts of the communication device.
  • the third predistorter is the first predistorter, or the third predistorter is the second predistorter, or the third predistorter is different from the first predistorter and the third predistorter Different from the second predistorter.
  • the combiner is connected to the M PAs through M adjustable attenuators, and the M adjustable attenuators are respectively used to process the output signals of the M PAs.
  • the M first signals output by the combiners of M PA outputs can be processed by M adjustable attenuators respectively and then input to the combiner for combining processing, so that the combiner obtains an attenuated signal. , reduce processing complexity and improve the accuracy of subsequent calculations.
  • the signal processing device includes the adjustable attenuator.
  • the signal processing device does not include the adjustable attenuator, that is, the signal processing device and the adjustable attenuator are independently provided parts of the communication device.
  • the M adjustable attenuators are respectively used to process the input signals of the M PAs.
  • the M adjustable attenuators can also be used to process the input signals of the M PAs respectively, so as to reduce the third The processing complexity of the predistorter (or modulator).
  • the M adjustable attenuators are connected to an adjustable power coefficient configuration module, and the adjustable power coefficient configuration module is used to adjust the power configuration coefficients of the M adjustable attenuators.
  • the M adjustable attenuators can also be connected to an adjustable power coefficient configuration module, and the adjustable power coefficient configuration module It is used to adjust the power configuration coefficients of the M adjustable attenuators to adjust the power configuration coefficients of the M first signals input to the combiner.
  • the signal processing device includes the adjustable power coefficient configuration module.
  • the signal processing device does not include the adjustable power coefficient configuration module, that is, the signal processing device and the adjustable power coefficient configuration module are both independently provided parts of the communication device.
  • the communication device may also include one or more switches (switches).
  • the one or more switches are used to control input of the input signal of the PA or the output signal of the PA to an optional Adjust the attenuator so that the signal processor performs the aforementioned implementation process of determining the fifth signal when acquiring the input signal of the PA, and causes the signal processor to perform the aforementioned implementation process of determining the third signal when obtaining the output signal of the PA. Implementation process.
  • the communication device may also include at least one of the following components:
  • DAC is mainly used for conversion of digital signals to analog signals.
  • Modulator (modulation, Mod) is mainly used for spectrum shifting of signals.
  • Couplers are mainly used for signal power distribution.
  • Figure 6 is a schematic diagram of the signal processing method provided by this application.
  • the method includes the following steps. It should be noted that the method shown in Figure 6 is executed by the communication device, or the method is executed by some components in the communication device (such as the signal processing device mentioned in any of the previous embodiments, or the processor, chip or chip system, etc.), or the method can also be implemented by a functional logic module or software that can implement the signal processing method.
  • the communication method is described by taking the example that the communication method is executed by a signal processing device.
  • the signal processing device acquires M first signals in step S601.
  • the first signals include the output signals of the PA, and M is an integer greater than 2.
  • the signal processing device determines the combined second signal of the M channels of first signals in step S602.
  • the signal processing device outputs a third signal based on the second signal determined in step S602.
  • the third signal is used to compensate for the nonlinear information of the M first signals.
  • the signal processing device After the signal processing device obtains the M first signals including the output signal of the PA in step S601, the signal processing device determines the combined second signal of the M first signals in step S602, and , the signal processing device outputs a third signal for compensating the nonlinear information of the M first signals in step S603.
  • the third signal obtained by the signal processing device can be used to perform pre-distortion compensation on the nonlinear information of the M first signals, reducing the impact of the nonlinear characteristics of the PA on the signal processing performance of the PA, in order to improve communication quality.
  • the third signal output by the signal processing device in step S603 includes a first sub-signal, which is used to compensate for the first nonlinear information of the M first signals;
  • the process of the signal processing device outputting the third signal based on the second signal in step S603 includes: the signal processing device outputs the first sub-signal to the first predistorter based on the second signal, and the first predistortion The device is connected to the M PAs; wherein the first predistorter is used to input the first sub-signal and output M first processing results to the M PAs respectively, wherein the M first processing results are based on The first sub-signal is obtained through pre-distortion processing.
  • the third signal obtained by the signal processing device includes the first sub-signal used to compensate the first nonlinear information of the M first signals.
  • the first nonlinear information may include the same nonlinear information corresponding to the M first signals, in order to perform predistortion compensation on the first nonlinear information of the M first signals through the first sub-signal, thereby reducing M The influence of the same nonlinear characteristics of two PAs on the signal processing performance of the PA.
  • the first nonlinear information of the M first signals can be called the common nonlinear information of the M first signals, the same nonlinear information of the M first signals, and the nonlinear information of the M first signals. Identical parts, common parts in the nonlinear information of the M first signals, or other descriptions are not limited here.
  • the signal processing device includes the first predistorter.
  • the signal processing device does not include the first predistorter, that is, the signal processing device and the first predistorter are both independently arranged parts of the communication device.
  • N is an integer greater than or equal to 1.
  • the value of N may be the same as the value of M, that is, predistortion compensation is performed on M PAs based on N first sub-signals through N predistorters.
  • the value of N is 1, that is, one predistorter is used to perform predistortion compensation on M PAs based on the first sub-signal.
  • the value of N is greater than 1 and less than M, that is, N predistorters are used to perform predistortion compensation on N PAs among the M PAs based on the N first sub-signals, and the remaining M-N PAs do not need to be predistorted. Distortion compensation to reduce processing overhead.
  • the nonlinear information of the M-N PAs indicates that the nonlinear characteristics of the M-N PAs have little impact on signal processing performance, or the first nonlinear information of the M-N PAs performs predistortion compensation in other ways.
  • the value of N is greater than 1 and less than M, that is, predistortion compensation is performed on M PAs based on N first sub-signals through N predistorters, where at least one of the N predistorters predistorts.
  • the distorter performs pre-distortion compensation on two or more PAs based on the first sub-signal.
  • the third signal output by the signal processing device in step S603 includes M second sub-signals, and the M second sub-signals are used for the second nonlinearity of the M first signals.
  • Information is compensated; the process of the signal processing device outputting a third signal based on the second signal includes: the signal processing device outputs the M second sub-signals to M second predistorters based on the second signal, and the M second sub-signals are The second predistorters are respectively connected to the M PAs; wherein the M second predistorters are used to respectively input the M second sub-signals and output M second processing results to the M PAs respectively, where , the M second processing results are respectively obtained by performing predistortion processing based on the second sub-signal.
  • the third signal obtained by the signal processing device includes a second sub-signal used to compensate for the second nonlinear information of the M first signals.
  • the second nonlinear information may include different nonlinear information corresponding to M channels of first signals, in order to perform predistortion compensation on the second nonlinear information of the M channels of first signals through the M second sub-signals.
  • the second nonlinear information of the M first signals can be called non-shared nonlinear information of the M first signals, different nonlinear information of the M first signals, and nonlinear information of the M first signals. Different parts of the information, non-shared parts of the nonlinear information of the M first signals, or other descriptions are not limited here.
  • the number of second sub-signals included in the third signal is recorded as K, where K is an integer greater than or equal to 1, where K may be less than M. That is, predistortion compensation is performed on K PAs among the M PAs through the K first sub-signals, while the remaining M-K PAs do not require predistortion compensation to reduce processing overhead.
  • the nonlinear information of the M-K PAs indicates that the nonlinear characteristics of the M-N PAs have little impact on signal processing performance, or the second nonlinear information of the M-K PAs performs predistortion compensation through other methods.
  • the process of the signal processing device outputting a third signal based on the second signal includes: the signal processing device outputting the third signal based on an undersampling result of the second signal.
  • the signal processing device can output the third signal based on the undersampling result of the second signal, that is, the signal processing device can determine based on the undersampling result.
  • the third signal is used to compensate the nonlinear information of the M first signals to reduce the number of samples processed and reduce the computational complexity.
  • the signal processing device determines the combined second signal of the M first signals including: the signal processing device separately processes the output signals of the M PAs based on M adjustable attenuators. Afterwards, the second signal is determined.
  • the M first signals output by the combiners of M PA outputs can be processed by M adjustable attenuators respectively and then input to the combiner for combining processing, so that the combiner obtains an attenuated signal. , reduce processing complexity and improve the accuracy of subsequent calculations.
  • the M adjustable attenuators are connected to an adjustable power coefficient configuration module, and the adjustable power coefficient configuration module is used to adjust the power configuration coefficients of the M adjustable attenuators.
  • the M adjustable attenuators can also be connected to an adjustable power coefficient configuration module, and the adjustable power coefficient configuration module It is used to adjust the power configuration coefficients of the M adjustable attenuators to adjust the power configuration coefficients of the M first signals input to the combiner.
  • the signal processing device can also refer to the process performed by the signal processing device in any of the foregoing embodiments and achieve corresponding technical effects, which will not be described again here.
  • the present application is introduced from the perspective of the method above, and the communication device provided by the present application is described below.
  • an embodiment of the present application provides a communication device 700.
  • the communication device 700 can implement the functions of the communication device in the above method embodiment, and therefore can also achieve the beneficial effects of the above method embodiment.
  • the communication device 700 may be a terminal device or a network device, or may be an integrated circuit or component within the terminal device or the network device, such as a chip.
  • the device 700 includes a processing unit 701 and a transceiver unit 702; the transceiver unit 702 is used to obtain M first signals, where the first signal includes the output signal of the PA, and M is an integer greater than 2;
  • the processing unit 701 is used to determine the second signal after combining the M channels of first signals; the processing unit 701 is also used to output a third signal based on the second signal, and the third signal is used to combine the M channels of first signals. to compensate for the nonlinear information.
  • the third signal includes a first sub-signal, the first sub-signal is used to compensate the first nonlinear information of the M first signals; the processing unit 701 is based on the second
  • the signal outputting the third signal includes: the processing unit 701 outputs the first sub-signal to a first predistorter based on the second signal, and the first predistorter is connected to the M PAs; wherein the first predistorter uses The first sub-signal is input, and M first processing results are output to the M PAs respectively, wherein the M first processing results are obtained by pre-distortion processing based on the first sub-signal.
  • the third signal includes M second sub-signals, and the M second sub-signals are used to compensate for the second nonlinear information of the M first signals;
  • the processing unit 701 Outputting a third signal based on the second signal includes: the processing unit 701 outputs the M second sub-signals to M second predistorters based on the second signal, and the M second predistorters are respectively connected with the M PA connection; wherein, the M second predistorters are used to input the M second sub-signals respectively, and output M second processing results to the M PAs respectively, where the M second processing results are respectively It is obtained by performing predistortion processing based on the second sub-signal.
  • the processing unit 701 outputting the third signal based on the second signal includes: the processing unit 701 outputting the third signal based on the undersampling result of the second signal.
  • the processing unit 701 determines the combined second signal of the M first signals including: the processing unit 701 processes the output signals of the M PAs based on the M adjustable attenuators respectively. Afterwards, the second signal is determined.
  • the M adjustable attenuators are connected to an adjustable power coefficient configuration module, and the adjustable power coefficient configuration module is used to adjust the power configuration coefficients of the M adjustable attenuators.
  • FIG. 8 is another schematic structural diagram of a communication device 800 provided in this application.
  • the communication device 800 at least includes an input and output interface 802 .
  • the communication device 800 may be a chip or an integrated circuit.
  • the communication device also includes a logic circuit 801.
  • the transceiver unit 702 shown in FIG. 7 may be a communication interface, and the communication interface may be the input-output interface 802 in FIG. 8 .
  • the input-output interface 802 may include an input interface and an output interface.
  • the communication interface may also be a transceiver circuit, and the transceiver circuit may include an input interface circuit and an output interface circuit.
  • the input and output interface 802 is used to obtain M first signals, and the first signal includes the output of the PA.
  • M is an integer greater than 2;
  • the logic circuit 801 is used to determine the second signal after combining the M first signals;
  • the logic circuit 801 is also used to output a third signal based on the second signal, the third signal It is used to compensate the nonlinear information of the M first signals.
  • the logic circuit 801 and the input-output interface 802 can also perform other steps performed by the communication device in any embodiment and achieve corresponding beneficial effects, which will not be described again here.
  • the processing unit 701 shown in FIG. 7 may be the logic circuit 801 in FIG. 8 .
  • the logic circuit 801 may be a processing device, and the functions of the processing device may be partially or fully implemented through software. Among them, the functions of the processing device can be partially or fully implemented through software.
  • the processing device may include a memory and a processor, wherein the memory is used to store a computer program, and the processor reads and executes the computer program stored in the memory to perform corresponding processing and/or steps in any method embodiment. .
  • the processing means may comprise only a processor.
  • the memory for storing computer programs is located outside the processing device, and the processor is connected to the memory through circuits/wires to read and execute the computer programs stored in the memory.
  • the memory and processor can be integrated together, or they can also be physically independent of each other.
  • the processing device may be one or more chips, or one or more integrated circuits.
  • the processing device may be one or more field-programmable gate arrays (FPGA), application specific integrated circuit (ASIC), system on chip (SoC), central processing unit (central processor unit, CPU), network processor (network processor, NP), digital signal processing circuit (digital signal processor, DSP), microcontroller unit (micro controller unit, MCU), programmable logic device, PLD) or other integrated chips, or any combination of the above chips or processors, etc.
  • FPGA field-programmable gate arrays
  • ASIC application specific integrated circuit
  • SoC system on chip
  • central processing unit central processor unit, CPU
  • network processor network processor
  • NP network processor
  • DSP digital signal processing circuit
  • microcontroller unit microcontroller unit
  • microcontroller unit micro controller unit, MCU
  • PLD programmable logic device
  • FIG. 9 is a communication device 900 involved in the above embodiment provided for an embodiment of the present application.
  • the communication device 900 may specifically be a communication device serving as a terminal device in the above embodiment.
  • the example shown in FIG. 9 is a terminal.
  • the device is implemented through a terminal device (or a component in the terminal device).
  • the communication device 900 may include but is not limited to at least one processor 901 and a communication port 902.
  • the device may also include at least one of a memory 903 and a bus 904.
  • the at least one processor 901 is used to control the actions of the communication device 900.
  • the processor 901 may be a central processing unit, a general purpose processor, a digital signal processor, an application specific integrated circuit, a field programmable gate array or other programmable logic device, a transistor logic device, a hardware component, or any combination thereof. It may implement or execute the various illustrative logical blocks, modules, and circuits described in connection with this disclosure.
  • the processor may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a digital signal processor and a microprocessor, and so on.
  • the communication device 900 shown in Figure 9 can be specifically used to implement the steps implemented by the terminal device in the foregoing method embodiment, and to achieve the corresponding technical effects of the terminal device.
  • the specific implementation methods of the communication device shown in Figure 9 are all Reference may be made to the descriptions in the foregoing method embodiments, which will not be described again here.
  • FIG. 10 is a schematic structural diagram of the communication device 1000 involved in the above embodiment provided by the embodiment of the present application.
  • the communication device 1000 can specifically be the communication device as a network device in the above embodiment, as shown in FIG. 10
  • An example is that the network device is implemented by a network device (or a component in the network device), wherein the structure of the communication device may refer to the structure shown in FIG. 10 .
  • the communication device 1000 includes at least one processor 1011 and at least one network interface 1014. Further optionally, the communication device further includes at least one memory 1012, at least one transceiver 1013 and one or more antennas 1015.
  • the processor 1011, the memory 1012, the transceiver 1013 and the network interface 1014 are connected, for example, through a bus. In the embodiment of the present application, the connection may include various interfaces, transmission lines or buses, etc., which is not limited in this embodiment.
  • Antenna 1015 is connected to transceiver 1013.
  • the network interface 1014 is used to enable the communication device to communicate with other communication devices through communication links.
  • the network interface 1014 may include a network interface between a communication device and a core network device, such as an S1 interface, and the network interface may include a network interface between a communication device and other communication devices (such as other network devices or core network devices), such as an X2 Or Xn interface.
  • a network interface between a communication device and a core network device such as an S1 interface
  • the network interface may include a network interface between a communication device and other communication devices (such as other network devices or core network devices), such as an X2 Or Xn interface.
  • the processor 1011 is mainly used to process communication protocols and communication data, control the entire communication device, execute software programs, and process data of the software programs, for example, to support the communication device to perform actions described in the embodiments.
  • the communication device may include a baseband processor and a central processing unit.
  • the baseband processor is mainly used to process communication protocols and communication data.
  • the central processing unit is mainly used to control the entire terminal device, execute software programs, and process data of the software programs.
  • the processor 1011 in Figure 10 can integrate the functions of the baseband processor and the central processor. Those skilled in the art can understand that the baseband processor and the central processor can also be independent processors, interconnected through technologies such as buses.
  • the terminal device may include multiple baseband processors to adapt to different network standards, the terminal device may include multiple central processors to enhance its processing capabilities, and various components of the terminal device may be connected through various buses.
  • the baseband processor can also be expressed as a baseband processing circuit or a baseband processing chip.
  • the central processing unit can also be expressed as a central processing circuit or a central processing chip.
  • the function of processing communication protocols and communication data can be built into the processor, or can be stored in the memory in the form of a software program, and the processor executes the software program to implement the baseband processing function.
  • Memory is mainly used to store software programs and data.
  • the memory 1012 may exist independently and be connected to the processor 1011.
  • the memory 1012 can be integrated with the processor 1011, for example, integrated into a chip.
  • the memory 1012 can store the program code for executing the technical solution of the embodiment of the present application, and the execution is controlled by the processor 1011.
  • the various computer program codes executed can also be regarded as the driver of the processor 1011.
  • Figure 10 shows only one memory and one processor. In an actual terminal device, there may be multiple processors and multiple memories. Memory can also be called storage media or storage devices.
  • the memory may be a storage element on the same chip as the processor, that is, an on-chip storage element, or an independent storage element, which is not limited in the embodiments of the present application.
  • the transceiver 1013 may be used to support the reception or transmission of radio frequency signals between the communication device and the terminal, and the transceiver 1013 may be connected to the antenna 1015.
  • Transceiver 1013 includes a transmitter Tx and a receiver Rx.
  • one or more antennas 1015 can receive radio frequency signals
  • the receiver Rx of the transceiver 1013 is used to receive the radio frequency signals from the antennas, convert the radio frequency signals into digital baseband signals or digital intermediate frequency signals, and convert the digital baseband signals into digital baseband signals.
  • the signal or digital intermediate frequency signal is provided to the processor 1011, so that the processor 1011 performs further processing on the digital baseband signal or digital intermediate frequency signal, such as demodulation processing and decoding processing.
  • the transmitter Tx in the transceiver 1013 is also used to receive a modulated digital baseband signal or a digital intermediate frequency signal from the processor 1011, and convert the modulated digital baseband signal or digital intermediate frequency signal into a radio frequency signal, and pass it through a Or multiple antennas 1015 transmit the radio frequency signal.
  • the receiver Rx can selectively perform one or more stages of down-mixing processing and analog-to-digital conversion processing on the radio frequency signal to obtain a digital baseband signal or a digital intermediate frequency signal.
  • the sequence of the down-mixing processing and the analog-to-digital conversion processing is The order is adjustable.
  • the transmitter Tx can selectively perform one or more levels of up-mixing processing and digital-to-analog conversion processing on the modulated digital baseband signal or digital intermediate frequency signal to obtain a radio frequency signal.
  • the up-mixing processing and digital-to-analog conversion processing are The order is adjustable.
  • Digital baseband signals and digital intermediate frequency signals can be collectively referred to as digital signals.
  • the transceiver 1013 may also be called a transceiver unit 702, a transceiver, a transceiver device, etc.
  • the device used to implement the receiving function in the transceiver unit 702 can be regarded as a receiving unit
  • the device used to implement the transmitting function in the transceiver unit 702 can be regarded as a transmitting unit, that is, the transceiver unit 702 includes a receiving unit and a transmitting unit
  • the receiving unit can also be called a receiver, input port, receiving circuit, etc.
  • the sending unit can be called a transmitter, transmitter, or transmitting circuit, etc.
  • the communication device 1000 shown in Figure 10 can be used to implement the steps implemented by the network equipment in the foregoing method embodiments, and to achieve the corresponding technical effects of the network equipment.
  • the specific implementation of the communication device 1000 shown in Figure 10 is, Reference may be made to the descriptions in the foregoing method embodiments, and details will not be repeated here.
  • Embodiments of the present application also provide a computer-readable storage medium that stores one or more computer-executable instructions.
  • the processor executes the possible implementation of the communication device in the foregoing embodiments. Methods.
  • Embodiments of the present application also provide a computer program product that stores one or more computers.
  • the processor executes the method of the possible implementation of the communication device.
  • Embodiments of the present application also provide a chip system, which includes at least one processor and is used to support the communication device to implement the functions involved in the possible implementation of the communication device.
  • the chip system further includes an interface circuit that provides program instructions and/or data to the at least one processor.
  • the chip system may also include a memory, which is used to store necessary program instructions and data for the communication device.
  • the chip system may be composed of chips, or may include chips and other discrete devices.
  • the communication device may specifically be the communication device in the foregoing method embodiment.
  • An embodiment of the present application also provides a communication system, which includes the communication device in any of the above embodiments.
  • the disclosed systems, devices and methods can be implemented in other ways.
  • the device embodiments described above are only illustrative.
  • the division of the units is only a logical function division. In actual implementation, there may be other division methods.
  • multiple units or components may be combined or can be integrated into another system, or some features can be ignored, or not implemented.
  • the coupling or direct coupling or communication connection between each other shown or discussed may be through some interfaces, and the indirect coupling or communication connection of the devices or units may be in electrical, mechanical or other forms.
  • the units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place, or they may be distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.
  • each functional unit in each embodiment of the present application can be integrated into one processing unit, each unit can exist physically alone, or two or more units can be integrated into one unit.
  • the above integrated units can be implemented in the form of hardware or software functional units. If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it may be stored in a computer-readable storage medium.
  • the technical solution of the present application is essentially or contributes to the existing technology, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium , including several instructions to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of this application.
  • the aforementioned storage media include: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disk or optical disk and other media that can store program code. .

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Abstract

一种信号处理装置、方法及相关设备，用于降低PA的非线性特性对PA的信号处理性能的影响，以期提升通信质量。并且，在该信号处理装置中，通过合路器对M路第一信号进行合并处理的实现方式，可以降低成本和功耗，并降低非线性预失真的复杂度。该信号处理装置包括合路器，用于输入M路第一信号，并输出该M路第一信号合并后的第二信号，其中，该M路第一信号分别包括M个PA的输出信号，M为大于2的整数；该信号处理装置还包括信号处理器，用于基于该第二信号输出第三信号，其中，该第三信号用于对该M路第一信号的非线性信息进行补偿。

Description

一种信号处理装置，方法及相关设备 技术领域
本申请涉及通信领域，尤其涉及一种信号处理装置，方法及相关设备。
背景技术
随着用户需求的爆发式增长，大容量和高速率成为未来无线通信系统的基本特征。为了实现大容量和高速率，通信系统需要采用更宽的信号带宽和更复杂的调制方式，这将导致通信信号具有较高的峰均功率比(peak-to-average power ratio，PAPR)。
目前，功率放大器(power amplifier，PA)作为通信装置的重要组件，具有较高PAPR的信号容易影响PA对信号的处理性能，例如有可能会使得PA处理得到的信号的误差向量幅度(error vector magnitude，EVM)恶化，增加接收机的误码率，造成临近信道干扰等。这些情况的出现将会导致包含有PA的通信装置的信号发射效率降低，并影响通信质量。
为此，如何提升通信装置中PA的信号处理性能，是一个亟待解决的技术问题。
发明内容
本申请提供了一种信号处理装置、方法及相关设备，用于降低PA的非线性特性对PA的信号处理性能的影响，以期提升通信质量。此外，在该信号处理装置中，通过合路器对M路第一信号进行合并处理的实现方式，可以降低成本和功耗，并降低非线性预失真的复杂度。
本申请第一方面提供了一种信号处理装置，该信号处理装置包含于通信装置，其中，该通信装置至少包括M个PA，该通信装置可以为终端设备或网络设备。该信号处理装置包括合路器，用于输入M路第一信号，并输出该M路第一信号合并后的第二信号，其中，该M路第一信号分别包括M个PA的输出信号，M为大于2的整数；该信号处理装置还包括信号处理器，用于基于该第二信号输出第三信号，其中，该第三信号用于对该M路第一信号的非线性信息进行补偿。
基于上述技术方案，信号处理装置中的合路器用于输入M路第一信号，并输出该M路第一信号合并后的第二信号；此外，该信号处理装置中的信号处理器用于基于该第二信号输出用于对该M路第一信号的非线性信息进行补偿的第三信号。换言之，信号处理装置得到的第三信号可以用于对M路第一信号的非线性信息进行预失真补偿，降低PA的非线性特性对PA的信号处理性能的影响，以期提升通信质量。
此外，在该信号处理装置中，通过合路器对M路第一信号进行合并处理的实现方式，可以降低成本和功耗，并降低非线性预失真的复杂度。
可选地，该信号处理装置包括该M个PA。或者，该信号处理装置不包括该M个PA，即该信号处理装置和M个PA均为通信装置中的独立设置的部分。
在第一方面的一种可能的实现方式中，该第三信号包括第一子信号，该第一子信号用于对该M路第一信号的第一非线性信息进行补偿。
基于上述技术方案，信号处理装置中的信号处理器得到的第三信号包括用于对该M路第一信号的第一非线性信息进行补偿的第一子信号。其中，该第一非线性信息可以包括M路第一信号对应的相同的非线性信息，以期通过该第一子信号对该M路第一信号的第一非线性信息进行预失真补偿，降低M个PA的相同的非线性特性对PA的信号处理性能的影响。
应理解，M路第一信号的第一非线性信息可以称为M路第一信号的共有非线性信息，M路第一信号的相同非线性信息，M路第一信号的非线性信息中的相同部分，M路第一信号的非线性信息中的共有部分，或者其它的描述，此处不做限定。
在第一方面的一种可能的实现方式中，该信号处理器具体用于向第一预失真器输出该第一子信号，该第一预失真器与该M个PA连接。
基于上述技术方案，信号处理装置中的信号处理器得到的第三信号包括用于对该M路第一信号的第一非线性信息进行补偿的第一子信号，并且，该信号处理器还可以向与该M个PA连接的第一预失真器输出该第一子信号，以期通过该第一预失真器基于该第一子信号对M个PA进行预失真补偿。
可选地，该信号处理装置包括该第一预失真器。或者，该信号处理装置不包括该第一预失真器，即该信号处理装置和第一预失真器均为通信装置中的独立设置的部分。
需要说明的是，第一预失真器的数量为N个，N为大于或等于1的整数。
可选地，N的取值可以与M的取值相同，即通过N个预失真器分别基于N路第一子信号对M个PA进行预失真补偿。
可选地，N的取值为1，即通过1个预失真器基于第一子信号对M个PA进行预失真补偿。
可选地，N的取值大于1且小于M，即通过N个预失真器分别基于N路第一子信号对M个PA中的N个PA进行预失真补偿，而其余M-N个PA无需预失真补偿，以降低处理开销。例如，该M-N个PA的非线性信息指示该M-N个PA的非线性特性对信号处理性能影响较小，或者，该M-N个PA的第一非线性信息通过其它方式进行预失真补偿。
可选地，N的取值大于1且小于M，即通过N个预失真器分别基于N路第一子信号对M个PA进行预失真补偿，其中，N个预失真器中的至少一个预失真器基于第一子信号对两个或两个以上的PA进行预失真补偿。
在第一方面的一种可能的实现方式中，该第一预失真器用于输入该第一子信号，并分别向该M个PA输出M个第一处理结果，其中，该M个第一处理结果为基于该第一子信号进行预失真处理得到。
基于上述技术方案，信号处理装置中的信号处理器向第一预失真器输出该第一子信号之后，该第一预失真器用于基于该第一子信号进行预失真处理得到M个第一处理结果并分别向M个PA输出M个第一处理结果，以便于该M个PA分别基于该M个第一处理结果对第一非线性信息进行预失真补偿。
在第一方面的一种可能的实现方式中，该第三信号包括M个第二子信号，该M个第二子信号用于对该M路第一信号的第二非线性信息进行补偿。
基于上述技术方案，信号处理装置中的信号处理器得到的第三信号包括用于对该M路 第一信号的第二非线性信息进行补偿的第二子信号。其中，该第二非线性信息可以包括M路第一信号对应的不相同的非线性信息，以期通过该M个第二子信号对该M路第一信号的第二非线性信息进行预失真补偿，降低M个PA对应的不相同的非线性特性对PA的信号处理性能的影响。
应理解，M路第一信号的第二非线性信息可以称为M路第一信号的非共有非线性信息，M路第一信号的不相同的非线性信息，M路第一信号的非线性信息中的不相同的部分，M路第一信号的非线性信息中的非共有部分，或者其它的描述，此处不做限定。
可选地，该第三信号所包含的第二子信号的数量记为K，K为大于或等于1的整数，其中，K可以小于M。即，通过K路第一子信号对M个PA中的K个PA进行预失真补偿，而其余M-K个PA无需预失真补偿，以降低处理开销。例如，该M-K个PA的非线性信息指示该M-N个PA的非线性特性对信号处理性能影响较小，或者，该M-K个PA的第二非线性信息通过其它方式进行预失真补偿。
在第一方面的一种可能的实现方式中，该信号处理器具体用于向M个第二预失真器输出该M个第二子信号，该M个第二预失真器分别与该M个PA连接。
基于上述技术方案，信号处理装置中的信号处理器得到的第三信号包括用于对该M路第一信号的第二非线性信息进行补偿的M个第二子信号，并且，该信号处理器还可以向与该M个PA连接的M个第二预失真器分别输出该M个第二子信号，以期通过该M个第二预失真器基于该M个第二子信号对M个PA进行预失真补偿。
可选地，该信号处理装置包括该第二预失真器。或者，该信号处理装置不包括该第二预失真器，即该信号处理装置和第二预失真器均为通信装置中的独立设置的部分。
可选地，第二预失真器与第一预失真器通过同一预失真器实现，或者，第二预失真器不同于第一预失真器。
在第一方面的一种可能的实现方式中，该M个第二预失真器用于分别输入该M个第二子信号，并分别向该M个PA输出M个第二处理结果，其中，该M个第二处理结果分别为基于该第二子信号进行预失真处理得到。
基于上述技术方案，信号处理装置中的信号处理器向M个第二预失真器输出该M个第二子信号之后，该M个第二预失真器用于基于该第二子信号进行预失真处理得到M个第二处理结果并分别向M个PA输出M个第二处理结果，以便于该M个PA分别基于该M个第二处理结果对第二非线性信息进行预失真补偿。
可以理解的是，在该第三信号所包含的第二子信号的数量记为K且K小于M的情况，该第二预失真处理器的数量可以为K，以降低处理开销。
在第一方面的一种可能的实现方式中，该装置还包括采样器；该合路器通过该采样器与该信号处理器连接。
基于上述技术方案，信号处理装置中的合路器通过采样器与信号处理器连接，以便于合路器的信号经过采样器的采样处理之后再输入至信号处理器进一步处理。
可选地，该信号处理装置包括该采样器。或者，该信号处理装置不包括该采样器，即该信号处理装置和采样器均为通信装置中的独立设置的部分。
在第一方面的一种可能的实现方式中，该采样器用于输入该第四信号，并向该信号处理器输出该第四信号的欠采样结果，该第四信号基于该第二信号得到。
基于上述技术方案，在信号处理装置中的合路器通过采样器与信号处理器连接的情况下，该采样器用于输入基于该第二信号得到的第四信号，并向该信号处理器输出该第四信号的欠采样结果，使得该信号处理器基于该欠采样结果确定用于对该M路第一信号的非线性信息进行补偿的第三信号，以减少信号处理器处理的采样数量并降低计算复杂度。
在第一方面的一种可能的实现方式中，信号处理器具体用于基于该第四信号的欠采样结果输出该第三信号。
基于上述技术方案，在信号处理装置中的合路器通过采样器与信号处理器连接的情况下，该信号处理器具体可以基于该第四信号的欠采样结果输出该第三信号，以降低计算复杂度。
在第一方面的一种可能的实现方式中，该M路第一信号分别还包括M个PA的输入信号，该信号处理器还用于基于该M个PA的输入信号向第三预失真器(或调制器)输出第五信号，该第五信号用于补偿调制器的同相正交(in-phase quadrature，IQ)误差。
基于上述技术方案，为了降低通信装置中调制器对信号的干扰，该信号处理器还用于基于该M个PA的输入信号向第三预失真器(或调制器)输出用于补偿调制器的IQ误差的第五信号，以便于第三预失真器(或调制器)后续基于该第五信号进行信号补偿处理，进一步提升基于第三信号进行预失真补偿的处理性能。
可选地，该第五信号包括IQ不平衡参数和/或补偿模型参数。
可选地，该信号处理装置包括该第三预失真器(或调制器)。或者，该信号处理装置不包括该第三预失真器(或调制器)，即该信号处理装置和第三预失真器(或调制器)均为通信装置中的独立设置的部分。
可选地，第三预失真器为第一预失真器，或，第三预失真器为第二预失真器，或，第三预失真器不同于第一预失真器且第三预失真器不同于第二预失真器。
在第一方面的一种可能的实现方式中，该合路器通过M个可调衰减器与该M个PA连接，该M个可调衰减器分别用于对该M个PA的输出信号进行处理。
基于上述技术方案，M个PA输出的合路器所输出的M路第一信号可以分别经过M个可调衰减器的处理之后再输入至合路器进行合并处理，使得合路器得到衰减后的信号，降低处理复杂度并提升后续计算的准确率。
可选地，该信号处理装置包括该可调衰减器。或者，该信号处理装置不包括该可调衰减器，即该信号处理装置和可调衰减器均为通信装置中的独立设置的部分。
在第一方面的一种可能的实现方式中，该M个可调衰减器分别用于对该M个PA的输入信号进行处理。
基于上述技术方案，在M路第一信号还包括M个PA的输入信号的情况下，该M个可调衰减器还可以分别还用于对该M个PA的输入信号进行处理，以便于降低第三预失真器(或调制器)的处理复杂度。
在第一方面的一种可能的实现方式中，该M个可调衰减器与可调功率系数配置模块连 接，该可调功率系数配置模块用于对该M个可调衰减器的功率配置系数进行调整。
基于上述技术方案，在该合路器通过M个可调衰减器与该M个PA连接的情况下，该M个可调衰减器还可以与可调功率系数配置模块连接，该可调功率系数配置模块用于对该M个可调衰减器的功率配置系数进行调整，以实现对输入至合路器的M路第一信号的功率配置系数进行调整。
可选地，该信号处理装置包括该可调功率系数配置模块。或者，该信号处理装置不包括该可调功率系数配置模块，即该信号处理装置和可调功率系数配置模块均为通信装置中的独立设置的部分。
本申请第二方面提供了一种信号处理方法，该方法由通信装置执行，或者，该方法由通信装置中的部分组件(例如第一方面及其任一实施例提及的信号处理装置，或者通信装置中的处理器、芯片或芯片系统等)执行，或者该方法还可以由能实现该信号处理方法的功能逻辑模块或软件实现。应理解，该通信装置可以为终端设备或网络设备。在第二方面及其可能的实现方式中，以该通信方法由信号处理装置执行为例进行描述。在该方法中，信号处理装置获取M路第一信号，该第一信号包括PA的输出信号，M为大于2的整数；该信号处理装置确定该M路第一信号合并后的第二信号；该信号处理装置基于该第二信号输出第三信号，该第三信号用于对该M路第一信号的非线性信息进行补偿。
基于上述技术方案，信号处理装置在获取包括PA的输出信号的M路第一信号之后，该信号处理装置确定该M路第一信号合并后的第二信号，并且，该信号处理装置基于该第二信号输出用于对该M路第一信号的非线性信息进行补偿的第三信号。换言之，信号处理装置得到的第三信号可以用于对M路第一信号的非线性信息进行预失真补偿，降低PA的非线性特性对PA的信号处理性能的影响，以期提升通信质量。
此外，在该信号处理方法中，通过对M路第一信号进行合并处理的实现方式，可以降低成本和功耗，并降低非线性预失真的复杂度。
在第二方面的一种可能的实现方式中，该第三信号包括第一子信号，该第一子信号用于对该M路第一信号的第一非线性信息进行补偿；该基于该第二信号输出第三信号包括：基于该第二信号向第一预失真器输出该第一子信号，该第一预失真器与该M个PA连接；其中，该第一预失真器用于输入该第一子信号，并分别向该M个PA输出M个第一处理结果，其中，该M个第一处理结果为基于该第一子信号进行预失真处理得到。
基于上述技术方案，信号处理装置得到的第三信号包括用于对该M路第一信号的第一非线性信息进行补偿的第一子信号。其中，该第一非线性信息可以包括M路第一信号对应的相同的非线性信息，以期通过该第一子信号对该M路第一信号的第一非线性信息进行预失真补偿，降低M个PA的相同的非线性特性对PA的信号处理性能的影响。
应理解，M路第一信号的第一非线性信息可以称为M路第一信号的共有非线性信息，M路第一信号的相同非线性信息，M路第一信号的非线性信息中的相同部分，M路第一信号的非线性信息中的共有部分，或者其它的描述，此处不做限定。
可选地，该信号处理装置包括该第一预失真器。或者，该信号处理装置不包括该第一 预失真器，即该信号处理装置和第一预失真器均为通信装置中的独立设置的部分。
需要说明的是，第一预失真器的数量为N个，N为大于或等于1的整数。
可选地，N的取值可以与M的取值相同，即通过N个预失真器分别基于N路第一子信号对M个PA进行预失真补偿。
可选地，N的取值为1，即通过1个预失真器基于第一子信号对M个PA进行预失真补偿。
可选地，N的取值大于1且小于M，即通过N个预失真器分别基于N路第一子信号对M个PA中的N个PA进行预失真补偿，而其余M-N个PA无需预失真补偿，以降低处理开销。例如，该M-N个PA的非线性信息指示该M-N个PA的非线性特性对信号处理性能影响较小，或者，该M-N个PA的第一非线性信息通过其它方式进行预失真补偿。
可选地，N的取值大于1且小于M，即通过N个预失真器分别基于N路第一子信号对M个PA进行预失真补偿，其中，N个预失真器中的至少一个预失真器基于第一子信号对两个或两个以上的PA进行预失真补偿。
在第二方面的一种可能的实现方式中，该第三信号包括M个第二子信号，该M个第二子信号用于对该M路第一信号的第二非线性信息进行补偿；该基于该第二信号输出第三信号包括：基于该第二信号向M个第二预失真器输出该M个第二子信号，该M个第二预失真器分别与该M个PA连接；其中，该M个第二预失真器用于分别输入该M个第二子信号，并分别向该M个PA输出M个第二处理结果，其中，该M个第二处理结果分别为基于该第二子信号进行预失真处理得到。
基于上述技术方案，信号处理装置得到的第三信号包括用于对该M路第一信号的第二非线性信息进行补偿的第二子信号。其中，该第二非线性信息可以包括M路第一信号对应的不相同的非线性信息，以期通过该M个第二子信号对该M路第一信号的第二非线性信息进行预失真补偿，降低M个PA对应的不相同的非线性特性对PA的信号处理性能的影响。
应理解，M路第一信号的第二非线性信息可以称为M路第一信号的非共有非线性信息，M路第一信号的不相同的非线性信息，M路第一信号的非线性信息中的不相同的部分，M路第一信号的非线性信息中的非共有部分，或者其它的描述，此处不做限定。
可选地，该第三信号所包含的第二子信号的数量记为K，K为大于或等于1的整数，其中，K可以小于M。即，通过K路第一子信号对M个PA中的K个PA进行预失真补偿，而其余M-K个PA无需预失真补偿，以降低处理开销。例如，该M-K个PA的非线性信息指示该M-N个PA的非线性特性对信号处理性能影响较小，或者，该M-K个PA的第二非线性信息通过其它方式进行预失真补偿。
在第二方面的一种可能的实现方式中，该基于该第二信号输出第三信号包括：基于该第二信号的欠采样结果输出该第三信号。
基于上述技术方案，在该基于该第二信号输出第三信号的过程中，该信号处理装置可以基于该第二信号的欠采样结果输出该第三信号，即该信号处理装置可以基于该欠采样结果确定用于对该M路第一信号的非线性信息进行补偿的第三信号，以减少处理的采样数量并降低计算复杂度。
在第二方面的一种可能的实现方式中，该确定该M路第一信号合并后的第二信号包括：基于M个可调衰减器分别对该M个PA的输出信号进行处理之后，确定该第二信号。
基于上述技术方案，M个PA输出的合路器所输出的M路第一信号可以分别经过M个可调衰减器的处理之后再输入至合路器进行合并处理，使得合路器得到衰减后的信号，降低处理复杂度并提升后续计算的准确率。
在第二方面的一种可能的实现方式中，该M个可调衰减器与可调功率系数配置模块连接，该可调功率系数配置模块用于对该M个可调衰减器的功率配置系数进行调整。
基于上述技术方案，在该合路器通过M个可调衰减器与该M个PA连接的情况下，该M个可调衰减器还可以与可调功率系数配置模块连接，该可调功率系数配置模块用于对该M个可调衰减器的功率配置系数进行调整，以实现对输入至合路器的M路第一信号的功率配置系数进行调整。
本申请第三方面提供了一种通信装置，该装置可以实现上述第二方面或第二方面任一种可能的实现方式中的方法。该装置包括用于执行上述方法的相应的单元或模块。该装置包括的单元或模块可以通过软件和/或硬件方式实现。例如，该装置可以为通信装置，或者，该装置可以为通信装置中的组件(例如第一方面及其任一实施例提及的信号处理装置，或者通信装置中的处理器、芯片或芯片系统等)，或者该方法还可以由能实现该信号处理方法的功能逻辑模块或软件实现。应理解，该通信装置可以为终端设备或网络设备。
其中，该装置包括处理单元和收发单元；该收发单元用于获取M路第一信号，该第一信号包括PA的输出信号，M为大于2的整数；该处理单元用于确定该M路第一信号合并后的第二信号；该处理单元还用于基于该第二信号输出第三信号，该第三信号用于对该M路第一信号的非线性信息进行补偿。
在第三方面的一种可能的实现方式中，该第三信号包括第一子信号，该第一子信号用于对该M路第一信号的第一非线性信息进行补偿；该处理单元基于该第二信号输出第三信号包括：该处理单元基于该第二信号向第一预失真器输出该第一子信号，该第一预失真器与该M个PA连接；其中，该第一预失真器用于输入该第一子信号，并分别向该M个PA输出M个第一处理结果，其中，该M个第一处理结果为基于该第一子信号进行预失真处理得到。
在第三方面的一种可能的实现方式中，该第三信号包括M个第二子信号，该M个第二子信号用于对该M路第一信号的第二非线性信息进行补偿；该处理单元基于该第二信号输出第三信号包括：该处理单元基于该第二信号向M个第二预失真器输出该M个第二子信号，该M个第二预失真器分别与该M个PA连接；其中，该M个第二预失真器用于分别输入该M个第二子信号，并分别向该M个PA输出M个第二处理结果，其中，该M个第二处理结果分别为基于该第二子信号进行预失真处理得到。
在第三方面的一种可能的实现方式中，该处理单元基于该第二信号输出第三信号包括：该处理单元基于该第二信号的欠采样结果输出该第三信号。
在第三方面的一种可能的实现方式中，该处理单元确定该M路第一信号合并后的第二 信号包括：该处理单元基于M个可调衰减器分别对该M个PA的输出信号进行处理之后，确定该第二信号。
在第三方面的一种可能的实现方式中，该M个可调衰减器与可调功率系数配置模块连接，该可调功率系数配置模块用于对该M个可调衰减器的功率配置系数进行调整。
本申请第三方面中，通信装置的组成模块还可以用于执行第二方面的各个可能实现方式中所执行的步骤，并实现相应的技术效果，具体均可以参阅第二方面，此处不再赘述。
本申请实施例第四方面提供了一种通信装置，包括前述第一方面或第一方面任意一种可能的实现方式中的信号处理装置。
可选地，该通信装置为发射机、发送设备，信号发送设备等。
本申请实施例第五方面提供了一种通信装置，包括至少一个处理器，所述至少一个处理器与存储器耦合；该存储器用于存储程序或指令；该至少一个处理器用于执行该程序或指令，以使该装置实现前述第二方面或第二方面任意一种可能的实现方式所述的方法，或者。
本申请实施例第六方面提供了一种通信装置，包括至少一个逻辑电路和输入输出接口；该逻辑电路和输入输出接口用于执行如前述第二方面或第二方面任意一种可能的实现方式所述的方法。
本申请实施例第七方面提供一种存储一个或多个计算机执行指令的计算机可读存储介质，当计算机执行指令被处理器执行时，该处理器执行如上述第二方面或第二方面任意一种可能的实现方式所述的方法。
本申请实施例第八方面提供一种存储一个或多个计算机的计算机程序产品(或称计算机程序)，当计算机程序产品被该处理器执行时，该处理器执行上述第二方面或第二方面任意一种可能实现方式的方法。
本申请实施例第九方面提供了一种芯片系统，该芯片系统包括至少一个处理器，用于支持通信装置实现上述第二方面或第二方面任意一种可能的实现方式中所涉及的功能。
在一种可能的设计中，该芯片系统还可以包括存储器，存储器，用于保存该通信装置必要的程序指令和数据。该芯片系统，可以由芯片构成，也可以包含芯片和其他分立器件。可选的，所述芯片系统还包括接口电路，所述接口电路为所述至少一个处理器提供程序指令和/或数据。
本申请实施例第十方面提供了一种通信系统，该通信系统包括上述第三方面的通信装置，或，该通信系统包括上述第四方面的通信装置，或，该通信系统包括上述第五方面的通信装置，或，该通信系统包括上述第六方面的通信装置。
其中，第三方面至第十方面中任一种设计方式所带来的技术效果可参见上述第一方面(或第二方面)中不同设计方式所带来的技术效果，在此不再赘述。
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图1a为本申请提供的通信系统的一个示意图；
图1b为本申请涉及的通信信号的一个示意图；
图2为本申请提供的通信方式的一个示意图；
图3a为信号处理装置的一个示意图；
图3b为信号处理装置的另一个示意图；
图4为本申请提供的信号处理装置的一个示意图；
图5a为本申请提供的信号处理装置的另一个示意图；
图5b为本申请提供的信号处理装置的另一个示意图；
图5c为本申请提供的信号处理装置的另一个示意图；
图5d为本申请提供的信号处理装置的另一个示意图；
图5e为本申请提供的信号处理装置的另一个示意图；
图5f为本申请提供的信号处理装置的另一个示意图；
图5g为本申请提供的信号处理装置的另一个示意图；
图5h为本申请提供的信号处理装置的另一个示意图；
图6为本申请提供的信号处理方法的一个示意图；
图7为本申请提供的通信装置的一个示意图；
图8为本申请提供的通信装置的另一个示意图；
图9为本申请提供的通信装置的另一个示意图；
图10为本申请提供的通信装置的另一个示意图。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述。
首先，对本申请实施例中的部分用语进行解释说明，以便于本领域技术人员理解。
(1)终端设备：可以是能够接收网络设备调度和指示信息的无线终端设备，无线终端设备可以是指向用户提供语音和/或数据连通性的设备，或具有无线连接功能的手持式设备、或连接到无线调制解调器的其他处理设备。
终端设备可以经无线接入网(radio access network，RAN)与一个或多个核心网或者互联网进行通信，终端设备可以是移动终端设备，如移动电话(或称为“蜂窝”电话，手机(mobile phone))、计算机和数据卡，例如，可以是便携式、袖珍式、手持式、计算机内置的或者车载的移动装置，它们与无线接入网交换语言和/或数据。例如，个人通信业务(personal communication service，PCS)电话、无绳电话、会话发起协议(SIP)话机、无线本地环路(wireless local loop，WLL)站、个人数字助理(personal digital assistant，PDA)、平板电脑(Pad)、带无线收发功能的电脑等设备。无线终端设备也可以称为系统、订户单元(subscriber unit)、订户站(subscriber station)，移动站(mobile station)、移动台(mobile station，MS)、远程站(remote station)、接入点(access point，AP)、远程终端设备(remote terminal)、接入终端设备(access terminal)、用户终端设备(user terminal)、用户代理(user agent)、用户站(subscriber station，SS)、用户端设备(customer premises equipment，CPE)、终端(terminal)、用户设备(user equipment， UE)、移动终端(mobile terminal，MT)等。终端设备也可以是可穿戴设备以及下一代通信系统，例如，5G通信系统中的终端设备或者未来演进的公共陆地移动网络(public land mobile network，PLMN)中的终端设备等。
(2)网络设备：可以是无线网络中的设备，例如网络设备可以为将终端设备接入到无线网络的无线接入网(radio access network，RAN)节点(或设备)，又可以称为基站。目前，一些RAN设备的举例为：5G通信系统中的新一代基站(generation Node B，gNodeB)、传输接收点(transmission reception point，TRP)、演进型节点B(evolved Node B，eNB)、无线网络控制器(radio network controller，RNC)、节点B(Node B，NB)、基站控制器(base station controller，BSC)、基站收发台(base transceiver station，BTS)、家庭基站(例如，home evolved Node B，或home Node B，HNB)、基带单元(base band unit，BBU)，或无线保真(wireless fidelity，Wi-Fi)接入点(access point，AP)等。另外，在一种网络结构中，网络设备可以包括集中单元(centralized unit，CU)节点、或分布单元(distributed unit，DU)节点、或包括CU节点和DU节点的RAN设备。
应理解，在其它可能的情况下，网络设备可以是其它为终端设备提供无线通信功能的装置。本申请的实施例对网络设备所采用的具体技术和具体设备形态不做限定。为方便描述，本申请实施例并不限定。示例性的，网络设备还可以包括核心网设备，核心网设备例如包括访问和移动管理功能(access and mobility management function，AMF)、用户面功能(user plane function，UPF)或会话管理功能(session management function，SMF)等。
本申请实施例中，用于实现网络设备的功能的装置可以是网络设备，也可以是能够支持网络设备实现该功能的装置，例如芯片系统，该装置可以被安装在网络设备中。在本申请实施例提供的技术方案中，以用于实现网络设备的功能的装置是网络设备为例，描述本申请实施例提供的技术方案。
(3)本申请实施例中的术语“系统”和“网络”可被互换使用。“至少一个”是指一个或者多个，“多个”是指两个或两个以上。“和/或”，描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A、同时存在A和B、单独存在B的情况，其中A，B可以是单数或者复数。字符“/”一般表示前后关联对象是一种“或”的关系。“以下至少一项(个)”或其类似表达，是指的这些项中的任意组合，包括单项(个)或复数项(个)的任意组合。例如“A，B和C中的至少一个”包括A，B，C，AB，AC，BC或ABC。以及，除非有特别说明，本申请实施例提及“第一”、“第二”等序数词是用于对多个对象进行区分，不用于限定多个对象的顺序、时序、优先级或者重要程度。
本申请中，除特殊说明外，各个实施例之间相同或相似的部分可以互相参考。在本申请中各个实施例、以及各实施例中的各个方法/设计/实现方式中，如果没有特殊说明以及逻辑冲突，不同的实施例之间、以及各实施例中的各个方法/设计/实现方式之间的术语和/或描述具有一致性、且可以相互引用，不同的实施例、以及各实施例中的各个方法/设计/实现方式中的技术特征根据其内在的逻辑关系可以组合形成新的实施例、方法、或实现方式。以下所述的本申请实施方式并不构成对本申请保护范围的限定。
请参阅图1a，为本申请中通信系统的一种示意图。图1a中，示例性的示出了一个网络设备101和6个终端设备，6个终端设备分别为终端设备1、终端设备2、终端设备3、终端设备4、终端设备5以及终端设备6等。在图1a所示的示例中，是以终端设备1为智能茶杯，终端设备2为智能空调，终端设备3为智能加油机，终端设备4为交通工具，终端设备5为手机，终端设备6为打印机进行举例说明的。
如图1a所示，在通信过程中，信号发送设备(或称为发射端、发射端设备)可以是网络设备，信号接收设备(或称为接收端、接收端设备)可以是终端设备；或者，信号发送设备可以是终端设备，信号接收设备可以是网络设备；或者，信号发送设备和信号接收设备都可以是网络设备；或者，信号发送设备和信号接收设备都可以是终端设备。
本申请可以应用于长期演进(long term evolution，LTE)系统、新无线(new radio，NR)系统，或者是5G之后演进的通信系统(例如6G等)。其中，该通信系统中包括至少一个网络设备和/或至少一个终端设备。
随着用户需求的爆发式增长，大容量和高速率成为未来无线通信系统的基本特征。以图1a为例，网络设备和任一终端设备都可以作为通信信号的发送方，为了实现大容量和高速率，通信系统需要采用更宽的信号带宽和更复杂的调制方式，这将导致该发送方所发送的通信信号具有较高的峰均功率比(peak-to-average power ratio，PAPR)。
示例性的，PAPR可以通过峰值功率(Peak Power)和平均功率(Average Power)之间的数学关系确定。例如，在时域信号中，PAPR可以通过如下方式确定：
Figure PCTCN2022113502-appb-000001
目前，功率放大器(power amplifier，PA)作为通信装置的重要组件，具有较高PAPR的信号容易影响PA对信号的处理性能，例如有可能会使得PA处理得到的信号的误差向量幅度(error vector magnitude，EVM)恶化，增加接收机的误码率，造成临近信道干扰等。这些情况的出现将会导致包含有PA的通信装置的信号发射效率降低，并影响通信质量。
示例性的，较高PAPR导致的功率回退现象可以通过图1b所示方式实现。如图1b所示，直线表示理想传输函数(ideal transfer function)，曲线表示实际传输函数(practical transfer function)。如图1b所示，在输入功率(input power)较低的情况下(如图1b中P in 1)，理想传输函数与实际传输函数对应的输出功率(out power)基本一致，取值均在P in 1附近，并未出现功率回退(或功率回退不明显)。而在输入功率较高的情况下(如图1b中P in 2)，理想传输函数对应的输出功率为P out 2，实际传输函数对应的输出功率为P′ out 2，可见，两者差值将会随着输入功率的增大而增大，进而产生功率回退，这将会影响发射功率降低，进而导致信号的传输距离变小。
为此，如何提升通信装置中PA的信号处理性能，是一个亟待解决的技术问题。下面将结合更多的附图对本申请提供的方案进行介绍。
示例性的，请参阅图2，为本申请的应用场景的一个示意图，其中，发射机可以为网络设备额或终端设备，接收机可以为网络设备或终端设备。
如图2所示，发射机可以包括如下模块：
编码模块(图中未示出)，主要用于完成待传输的信息比特(记为Tx bit)的编码， 交织等功能；
发端基带处理模块，主要用于完成信息的调制，成帧，滤波整型，预失真校正等处理；
预失真(Pre-distortion，PD)模块,主要用于功率放大器的线性化预校正；
数模转换器(digital to analog converter，DAC)模块，主要用于数字信号与模拟信号的转换；
发射中射频模块，主要完成把基带信号调制到射频信号，以及信号滤波等功能；
功率放大器(PA)，主要用于对信号进行功率放大；
无线信道，主要指电磁波在大气、真空、水等介质中无线传输；
有线信道，主要指光纤，铜线等介质中传输；
如图2所示，接收机可以包括如下模块：
接收中射频模块，主要用于把接收到的射频信号下变频到低频信号或者基带信号；
模拟数字转换器(analog to digital converter，ADC)模块，主要用于模拟信号与数字信号的转换；
接收基带单元模块，主要用于完成接收基带信号的恢复，包括同步，均衡，译码等处理。
如前述PAPR的实现示例可知，当发射机中的输入信号峰值较大时，会引起PA器件的信号处理性能下降，本申请提供的方案主要关注于降低PA的非线性特性对PA的信号处理性能的影响，以期提升通信质量。换言之，本申请提供的方案可以应用于图2中PD模块处理过程的改进。其中，该PD模块可以称为数字预失真(digital Pre-distortion，DPD)。
下面将结合图3a和图3b对PD模块在通信装置中的一些实现方式进行介绍。应理解，在下述示例中，以PD模块所在的通信装置可以为发射机或接收机，并且，以该通信装置包含有M个PA且分别输入M个PA的信号记为x1，x2...xM，M个PA处理后的信号经过M个天线(即图中的天线_1，天线_2...天线_M)输出为例，M为大于或等于2的整数。
一种PD模块的可能的实现方式如图3a所示，在包含有M个PA的通信装置中，通过配置M个PD模块的方式实现对M个PA(即图中的PA_1，PA_2...PA_M)的信号处理进行改进。换言之，图3a中的信号处理装置包括系数求解算法模块，该系数求解算法模块用于获取M个PA的输出信号，并基于M个PA的输出信号进行系数求解得到M个反馈信息之后，将该M个反馈信息发送至M个PD(即图中的PD_1，PD_2...PD_M)，使得M个PD基于各个反馈信息对每条链路上的PA进行预失真处理，以提升M个PA的信号处理性能。
然而，在图3a所示实现方式中，虽然处理的精度很高，但是随着天线数量(一般认为天线数量与PA的数量相同)的增加，需要配置相同数量的PD的实现方式导致功耗和成本会成比例增加，复杂度也会随之上升。
一种PD模块的可能的实现方式如图3b所示，在包含有M个PA的通信装置中，通过配置M个PD模块的方式实现对M个PA(即图中的PA_1，PA_2...PA_M)的信号处理进行改进。换言之，图3b中的信号处理装置包括系数求解算法模块，通过增加时分开关模块的加入，使得该系数求解算法模块在某一时刻获取M个PA中的某一个PA的输出信号，并基于该一个PA的输出信号进行系数求解得到一个反馈信息之后，将该一个反馈信息发送至M个PD (即图中的PD_1，PD_2...PD_M)中对应的一个PD，使得该一个PD基于该一个反馈信息对链路上的PA进行预失真处理。并且，该处理过程重复执行M次，以分别提升M个PA的信号处理性能。
然而，在图3b所示实现方式中，通过时分开关切换的时分复用单路反馈结构，在一定的程度上降低了反馈支路的复杂度。但是，时分开关的设置将会存在多个输入信号之间的串扰隔离度问题，这使得获取到的反馈信号总会被其他支路干扰，从而恶化数字预失真的性能。此外，时分开关的高速切换，需要和基带多个模块之间存在一个高精度的同步机制，实现复杂。
由上述描述内容可知，图3a和图3b所示实现方式虽然在一定程度上能够校正PA的非线性以提升PA的信号处理性能，但是仍存在一些尚未解决的问题。下面将结合更多的附图对本申请提供的方案进行描述。
如图4所示，为本申请提供的信号处理装置的一个示意图，该信号处理装置位于通信装置中，该通信装置可以为终端设备或网络设备。该信号处理装置至少包括信号处理器和合路器。
在图4所示信号处理装置中，合路器用于输入M路第一信号，并输出该M路第一信号合并后的第二信号，其中，该M路第一信号分别包括M个PA的输出信号，M为大于2的整数。
在图4所示信号处理装置中，信号处理器用于基于该第二信号输出第三信号，其中，该第三信号用于对该M路第一信号的非线性信息进行补偿。
基于图4所示技术方案，信号处理装置中的合路器用于输入M路第一信号，并输出该M路第一信号合并后的第二信号；此外，该信号处理装置中的信号处理器用于基于该第二信号输出用于对该M路第一信号的非线性信息进行补偿的第三信号。换言之，信号处理装置得到的第三信号可以用于对M路第一信号的非线性信息进行预失真补偿，降低PA的非线性特性对PA的信号处理性能的影响，以期提升通信质量。
此外，相比于图3b所示实现方式中依赖于时分开关的设置，将会存在多个输入信号之间的串扰隔离度问题，这使得获取到的反馈信号总会被其他支路干扰，从而恶化数字预失真的性能；并且，图3b所示实现方式中时分开关的高速切换，需要和基带多个模块之间存在一个高精度的同步机制，实现复杂。而在图4所示信号处理装置中，通过合路器对M路第一信号进行合并处理的实现方式，可以降低成本和功耗，并降低非线性预失真的复杂度。
需要说明的是，如图4所示实现方式中，以信号处理装置可以不包括该M个PA为例，即该信号处理装置和M个PA均为通信装置中的独立设置的部分。而在实际应用中，该信号处理装置可以包括该M个PA，此处不做限定。
下面将结合更多的实现示例，对图4所示信号处理装置所连接的PD模块进行示例性描述。
在一种可能的实现方式中，信号处理装置(向PD模块)输出的第三信号包括第一子信号，该第一子信号用于对该M路第一信号的第一非线性信息进行补偿。具体地，信号处理装置中的信号处理器得到的第三信号包括用于对该M路第一信号的第一非线性信息进行补 偿的第一子信号。其中，该第一非线性信息可以包括M路第一信号对应的相同的非线性信息，以期通过该第一子信号对该M路第一信号的第一非线性信息进行预失真补偿，降低M个PA的相同的非线性特性对PA的信号处理性能的影响。
应理解，M路第一信号的第一非线性信息可以称为M路第一信号的共有非线性信息，M路第一信号的相同非线性信息，M路第一信号的非线性信息中的相同部分，M路第一信号的非线性信息中的共有部分，或者其它的描述，此处不做限定。
在一种可能的实现方式中，该信号处理器具体用于向第一预失真器输出该第一子信号，该第一预失真器与该M个PA连接。具体地，信号处理装置中的信号处理器得到的第三信号包括用于对该M路第一信号的第一非线性信息进行补偿的第一子信号，并且，该信号处理器还可以向与该M个PA连接的第一预失真器输出该第一子信号，以期通过该第一预失真器基于该第一子信号对M个PA进行预失真补偿。
可选地，图4所示的示例中的不包括该第一预失真器，即该信号处理装置和第一预失真器均为通信装置中的独立设置的部分。或者，图4所示的示例中的信号处理装置包括该第一预失真器，此处不做限定。
需要说明的是，第一预失真器的数量为N个，N为大于或等于1的整数，下面将结合更多的实现示例对N的取值的不同实现进行示例性描述。
一种可能的实现方式中，如图5a所示实现示例，N的取值可以与M的取值相同，即通过N个预失真器(记为图5a中的第一预失真器_1，第一预失真器_2...第一预失真器_N)分别基于N路第一子信号对M个PA进行预失真补偿。
另一种可能的实现方式中，如图5b所示实现示例，N的取值为1，即通过1个预失真器(记为图5b中的第一预失真器)基于第一子信号对M个PA进行预失真补偿。
另一种可能的实现方式中，除了上述实现之外，N的取值也可以为大于1且小于M。
可选地，在N的取值也可以为大于1且小于M的情况下，通过N个预失真器分别基于N路第一子信号对M个PA中的N个PA进行预失真补偿，而其余M-N个PA无需预失真补偿，以降低处理开销。例如，该M-N个PA的非线性信息指示该M-N个PA的非线性特性对信号处理性能影响较小，或者，该M-N个PA的第一非线性信息通过其它方式进行预失真补偿。
可选地，在N的取值也可以为大于1且小于M的情况下，通过N个预失真器分别基于N路第一子信号对M个PA进行预失真补偿，其中，N个预失真器中的至少一个预失真器基于第一子信号对两个或两个以上的PA进行预失真补偿。
在一种可能的实现方式中，该第一预失真器用于输入该第一子信号，并分别向该M个PA输出M个第一处理结果，其中，该M个第一处理结果为基于该第一子信号进行预失真处理得到。具体地，信号处理装置中的信号处理器向第一预失真器输出该第一子信号之后，该第一预失真器用于基于该第一子信号进行预失真处理得到M个第一处理结果并分别向M个PA输出M个第一处理结果，以便于该M个PA分别基于该M个第一处理结果对第一非线性信息进行预失真补偿。
在一种可能的实现方式中，信号处理装置(向PD模块)输出的第三信号包括M个第二子信号，该M个第二子信号用于对该M路第一信号的第二非线性信息进行补偿。具体地， 信号处理装置中的信号处理器得到的第三信号包括用于对该M路第一信号的第二非线性信息进行补偿的第二子信号。其中，该第二非线性信息可以包括M路第一信号对应的不相同的非线性信息，以期通过该M个第二子信号对该M路第一信号的第二非线性信息进行预失真补偿，降低M个PA对应的不相同的非线性特性对PA的信号处理性能的影响。
应理解，M路第一信号的第二非线性信息可以称为M路第一信号的非共有非线性信息，M路第一信号的不相同的非线性信息，M路第一信号的非线性信息中的不相同的部分，M路第一信号的非线性信息中的非共有部分，或者其它的描述，此处不做限定。
可选地，该第三信号所包含的第二子信号的数量记为K，K为大于或等于1的整数，其中，K可以小于M。即，通过K路第一子信号对M个PA中的K个PA进行预失真补偿，而其余M-K个PA无需预失真补偿，以降低处理开销。例如，该M-K个PA的非线性信息指示该M-N个PA的非线性特性对信号处理性能影响较小，或者，该M-K个PA的第二非线性信息通过其它方式进行预失真补偿。
示例性的，在第三信号所包含的第二子信号的数量K与M相同的情况下，第二预失真器的数量K也与M相同，其实现过程可以通过图5c所示方式实现，即与信号处理器相连的第二预失真器的数量K与M相等，该第二预失真器可以记为图5c中的第二预失真器_1，第二预失真器_2...第一预失真器_K。类似地，在第三信号所包含的第二子信号的数量K为1的情况下，第二预失真器的数量为1，其实现过程可以通过图5d所示方式实现，即与信号处理器相连的第二预失真器的数量为1，该第二预失真器可以记为图5d中的第二预失真器。
在一种可能的实现方式中，该信号处理器具体用于向M个第二预失真器输出该M个第二子信号，该M个第二预失真器分别与该M个PA连接。具体地，信号处理装置中的信号处理器得到的第三信号包括用于对该M路第一信号的第二非线性信息进行补偿的M个第二子信号，并且，该信号处理器还可以向与该M个PA连接的M个第二预失真器分别输出该M个第二子信号，以期通过该M个第二预失真器基于该M个第二子信号对M个PA进行预失真补偿。
可选地，该信号处理装置包括该第二预失真器。或者，该信号处理装置不包括该第二预失真器，即该信号处理装置和第二预失真器均为通信装置中的独立设置的部分。
在一种可能的实现方式中，该M个第二预失真器用于分别输入该M个第二子信号，并分别向该M个PA输出M个第二处理结果，其中，该M个第二处理结果分别为基于该第二子信号进行预失真处理得到。具体地，信号处理装置中的信号处理器向M个第二预失真器输出该M个第二子信号之后，该M个第二预失真器用于基于该第二子信号进行预失真处理得到M个第二处理结果并分别向M个PA输出M个第二处理结果，以便于该M个PA分别基于该M个第二处理结果对第二非线性信息进行预失真补偿。
可以理解的是，在该第三信号所包含的第二子信号的数量记为K且K小于M的情况，该第二预失真处理器的数量可以为K，以降低处理开销。
需要说明的是，在上述信号处理装置的实现过程中，该信号处理装置可以包含有第一预失真器且不包含第二预失真器，或者，该信号处理装置可以包含有第二预失真器且不包含第一预失真器，或者，该信号处理装置可以包含有第一预失真器且该信号处理装置可以 包含第二预失真器，此处不做限定。
可选地，在该信号处理装置可以包含有第一预失真器且该信号处理装置可以包含第二预失真器的情况下，第一预失真器、第二预失真器以及PA之间的连接关系不做限定。例如，第一预失真器可以通过第二预失真器与PA连接，第二预失真器可以通过第一预失真器与PA连接，或者是其他的实现方式，此处不做赘述。
可选地，第二预失真器与第一预失真器通过同一预失真器实现，或者，第二预失真器不同于第一预失真器。示例性的，若第二预失真器不同于第一预失真器，第一预失真器的数量为1且第二预失真器的数量K与M相等的情况下，其实现过程可以如图5e或图5f所示方式实现。
在图5e所示实现示例中，第一预失真器通过K个第二预失真器与M个PA连接。
在图5f所示实现示例中，K个第二预失真器通过第一预失真器与M个PA连接。
在一种可能的实现方式中，如图5g所示实现方式，该信号处理装置还可以包括采样器；该合路器通过该采样器与该信号处理器连接。具体地，信号处理装置中的合路器通过采样器与信号处理器连接，以便于合路器的信号经过采样器的采样处理之后再输入至信号处理器进一步处理。
可选地，该信号处理装置包括该采样器。或者，该信号处理装置不包括该采样器，即该信号处理装置和采样器均为通信装置中的独立设置的部分。
在一种可能的实现方式中，该采样器用于输入基于该第二信号得到的第四信号，并向该信号处理器输出该第四信号的欠采样结果。具体地，在信号处理装置中的合路器通过采样器与信号处理器连接的情况下，该采样器用于输入基于该第二信号得到的第四信号，并向该信号处理器输出该第四信号的欠采样结果，使得该信号处理器基于该欠采样结果确定用于对该M路第一信号的非线性信息进行补偿的第三信号，以减少信号处理器处理的采样数量并降低计算复杂度。相应的，信号处理器具体用于基于该第四信号的欠采样结果输出该第三信号。从而，在信号处理装置中的合路器通过采样器与信号处理器连接的情况下，该信号处理器具体可以基于该第四信号的欠采样结果输出该第三信号，以降低计算复杂度。
在一种可能的实现方式中，以前述图5e所示实现场景为例，该信号处理装置还可以通过图5h所示方式实现。如图5h所示，以输入信号“x1，x2...xM”为基带信号为例，在该信号处理装置的合路器和采样器之间，还可以包括ADC，滤波器、振荡器等至少一个器件。
可选地，该ADC主要用于模拟信号与数字信号的转换，以便于采样器基于数字信号进行采样，简化操作。
可选地，该滤波器主要用于对输入信号感兴趣之外的部分频带进行过滤。
可选地，该振荡器主要作为一种能量转换装置，用于将直流电能转换为具有一定频率的交流电能。
在一种可能的实现方式中，在上述任一实施例中的信号处理装置中，输入至合路器的M路第一信号分别还包括M个PA的输入信号，该信号处理器还用于基于该M个PA的输入信号向第三预失真器(或调制器)输出第五信号，该第五信号用于补偿调制器的IQ误差。具体地，为了降低通信装置中调制器对信号的干扰，该信号处理器还用于基于该M个PA的 输入信号向第三预失真器(或调制器)输出用于补偿调制器的IQ误差的第五信号，以便于第三预失真器(或调制器)后续基于该第五信号进行信号补偿处理，进一步提升基于第三信号进行预失真补偿的处理性能。
可选地，该第五信号包括IQ不平衡参数和/或补偿模型参数。
可选地，该信号处理装置包括该第三预失真器(或调制器)。或者，该信号处理装置不包括该第三预失真器(或调制器)，即该信号处理装置和第三预失真器(或调制器)均为通信装置中的独立设置的部分。
可选地，第三预失真器为第一预失真器，或，第三预失真器为第二预失真器，或，第三预失真器不同于第一预失真器且第三预失真器不同于第二预失真器。
在一种可能的实现方式中，该合路器通过M个可调衰减器与该M个PA连接，该M个可调衰减器分别用于对该M个PA的输出信号进行处理。具体地，M个PA输出的合路器所输出的M路第一信号可以分别经过M个可调衰减器的处理之后再输入至合路器进行合并处理，使得合路器得到衰减后的信号，降低处理复杂度并提升后续计算的准确率。
可选地，该信号处理装置包括该可调衰减器。或者，该信号处理装置不包括该可调衰减器，即该信号处理装置和可调衰减器均为通信装置中的独立设置的部分。
在一种可能的实现方式中，该M个可调衰减器分别用于对该M个PA的输入信号进行处理。具体地，在M路第一信号还包括M个PA的输入信号的情况下，该M个可调衰减器还可以分别还用于对该M个PA的输入信号进行处理，以便于降低第三预失真器(或调制器)的处理复杂度。
在一种可能的实现方式中，该M个可调衰减器与可调功率系数配置模块连接，该可调功率系数配置模块用于对该M个可调衰减器的功率配置系数进行调整。具体地，在该合路器通过M个可调衰减器与该M个PA连接的情况下，该M个可调衰减器还可以与可调功率系数配置模块连接，该可调功率系数配置模块用于对该M个可调衰减器的功率配置系数进行调整，以实现对输入至合路器的M路第一信号的功率配置系数进行调整。
可选地，该信号处理装置包括该可调功率系数配置模块。或者，该信号处理装置不包括该可调功率系数配置模块，即该信号处理装置和可调功率系数配置模块均为通信装置中的独立设置的部分。
示例性的，以图5h的示意图为例，通信装置中还可以包括一个或多个切换开关(switch)，该一个或多个switch用于控制将PA的输入信号或PA的输出信号输入至可调衰减器，以使得信号处理器在获取PA的输入信号的情况下执行前述确定第五信号的实现过程，并且，使得信号处理器在获取PA的输出信号的情况下执行前述确定第三信号的实现过程。
可选地，以图5h的示意图为例，通信装置还可以包括如下至少一个器件：
DAC，主要用于数字信号到模拟信号的转换。
调制器(modulation，Mod)，主要用于信号的频谱搬移。
耦合器，主要用于信号的功率分配。
上面对本申请提供的信号处理装置进行描述，下面将对本申请提供的信号处理方法进一步介绍。
请参阅图6，为本申请提供的信号处理方法的一个示意图，该方法包括如下步骤。需要说明的是，图6所示方法由通信装置执行，或者，该方法由通信装置中的部分组件(例如前述任一实施例提及的信号处理装置，或者通信装置中的处理器、芯片或芯片系统等)执行，或者该方法还可以由能实现该信号处理方法的功能逻辑模块或软件实现。在下述实施例中，以该通信方法由信号处理装置执行为例进行描述。
S601.获取M路第一信号。
本实施例中，信号处理装置在步骤S601中获取M路第一信号，该第一信号包括PA的输出信号，M为大于2的整数。
S602.确定M路第一信号合并后的第二信号。
本实施例中，信号处理装置在步骤S601中获取M路第一信号之后，该信号处理装置在步骤S602中确定该M路第一信号合并后的第二信号。
S603.基于第二信号输出第三信号。
本实施例中，信号处理装置基于步骤S602中确定的第二信号输出第三信号，该第三信号用于对该M路第一信号的非线性信息进行补偿。
基于图6技术方案，信号处理装置在步骤S601中获取包括PA的输出信号的M路第一信号之后，该信号处理装置在步骤S602中确定该M路第一信号合并后的第二信号，并且，该信号处理装置在步骤S603中输出用于对该M路第一信号的非线性信息进行补偿的第三信号。换言之，信号处理装置得到的第三信号可以用于对M路第一信号的非线性信息进行预失真补偿，降低PA的非线性特性对PA的信号处理性能的影响，以期提升通信质量。
此外，在该信号处理方法中，通过对M路第一信号进行合并处理的实现方式，可以降低成本和功耗，并降低非线性预失真的复杂度。
在一种可能的实现方式中，信号处理装置在步骤S603中输出的第三信号包括第一子信号，该第一子信号用于对该M路第一信号的第一非线性信息进行补偿；相应的，信号处理装置在步骤S603中基于该第二信号输出第三信号的过程包括：该信号处理装置基于该第二信号向第一预失真器输出该第一子信号，该第一预失真器与该M个PA连接；其中，该第一预失真器用于输入该第一子信号，并分别向该M个PA输出M个第一处理结果，其中，该M个第一处理结果为基于该第一子信号进行预失真处理得到。具体地，信号处理装置得到的第三信号包括用于对该M路第一信号的第一非线性信息进行补偿的第一子信号。其中，该第一非线性信息可以包括M路第一信号对应的相同的非线性信息，以期通过该第一子信号对该M路第一信号的第一非线性信息进行预失真补偿，降低M个PA的相同的非线性特性对PA的信号处理性能的影响。
应理解，M路第一信号的第一非线性信息可以称为M路第一信号的共有非线性信息，M路第一信号的相同非线性信息，M路第一信号的非线性信息中的相同部分，M路第一信号的非线性信息中的共有部分，或者其它的描述，此处不做限定。
可选地，该信号处理装置包括该第一预失真器。或者，该信号处理装置不包括该第一 预失真器，即该信号处理装置和第一预失真器均为通信装置中的独立设置的部分。
需要说明的是，第一预失真器的数量为N个，N为大于或等于1的整数。
可选地，N的取值可以与M的取值相同，即通过N个预失真器分别基于N路第一子信号对M个PA进行预失真补偿。
可选地，N的取值为1，即通过1个预失真器基于第一子信号对M个PA进行预失真补偿。
可选地，N的取值大于1且小于M，即通过N个预失真器分别基于N路第一子信号对M个PA中的N个PA进行预失真补偿，而其余M-N个PA无需预失真补偿，以降低处理开销。例如，该M-N个PA的非线性信息指示该M-N个PA的非线性特性对信号处理性能影响较小，或者，该M-N个PA的第一非线性信息通过其它方式进行预失真补偿。
可选地，N的取值大于1且小于M，即通过N个预失真器分别基于N路第一子信号对M个PA进行预失真补偿，其中，N个预失真器中的至少一个预失真器基于第一子信号对两个或两个以上的PA进行预失真补偿。
在一种可能的实现方式中，信号处理装置在步骤S603中输出的第三信号包括M个第二子信号，该M个第二子信号用于对该M路第一信号的第二非线性信息进行补偿；该信号处理装置基于该第二信号输出第三信号的过程包括：该信号处理装置基于该第二信号向M个第二预失真器输出该M个第二子信号，该M个第二预失真器分别与该M个PA连接；其中，该M个第二预失真器用于分别输入该M个第二子信号，并分别向该M个PA输出M个第二处理结果，其中，该M个第二处理结果分别为基于该第二子信号进行预失真处理得到。具体地，信号处理装置得到的第三信号包括用于对该M路第一信号的第二非线性信息进行补偿的第二子信号。其中，该第二非线性信息可以包括M路第一信号对应的不相同的非线性信息，以期通过该M个第二子信号对该M路第一信号的第二非线性信息进行预失真补偿，降低M个PA对应的不相同的非线性特性对PA的信号处理性能的影响。
应理解，M路第一信号的第二非线性信息可以称为M路第一信号的非共有非线性信息，M路第一信号的不相同的非线性信息，M路第一信号的非线性信息中的不相同的部分，M路第一信号的非线性信息中的非共有部分，或者其它的描述，此处不做限定。
可选地，该第三信号所包含的第二子信号的数量记为K，K为大于或等于1的整数，其中，K可以小于M。即，通过K路第一子信号对M个PA中的K个PA进行预失真补偿，而其余M-K个PA无需预失真补偿，以降低处理开销。例如，该M-K个PA的非线性信息指示该M-N个PA的非线性特性对信号处理性能影响较小，或者，该M-K个PA的第二非线性信息通过其它方式进行预失真补偿。
在一种可能的实现方式中，该信号处理装置基于该第二信号输出第三信号的过程包括：信号处理装置基于该第二信号的欠采样结果输出该第三信号。具体地，在该基于该第二信号输出第三信号的过程中，该信号处理装置可以基于该第二信号的欠采样结果输出该第三信号，即该信号处理装置可以基于该欠采样结果确定用于对该M路第一信号的非线性信息进行补偿的第三信号，以减少处理的采样数量并降低计算复杂度。
在一种可能的实现方式中，该信号处理装置确定该M路第一信号合并后的第二信号包 括：该信号处理装置基于M个可调衰减器分别对该M个PA的输出信号进行处理之后，确定该第二信号。具体地，M个PA输出的合路器所输出的M路第一信号可以分别经过M个可调衰减器的处理之后再输入至合路器进行合并处理，使得合路器得到衰减后的信号，降低处理复杂度并提升后续计算的准确率。
在一种可能的实现方式中，该M个可调衰减器与可调功率系数配置模块连接，该可调功率系数配置模块用于对该M个可调衰减器的功率配置系数进行调整。具体地，在该合路器通过M个可调衰减器与该M个PA连接的情况下，该M个可调衰减器还可以与可调功率系数配置模块连接，该可调功率系数配置模块用于对该M个可调衰减器的功率配置系数进行调整，以实现对输入至合路器的M路第一信号的功率配置系数进行调整。
需要说明的是，该信号处理装置在图6所示方法中，还可以参考前述任一实施例中该信号处理装置所执行的过程，并实现相应的技术效果，此处不做赘述。
上面从方法的角度对本申请进行介绍，下面将对本申请提供的通信装置进行描述。
请参阅图7，本申请实施例提供了一种通信装置700，该通信装置700可以实现上述方法实施例中通信装置的功能，因此也能实现上述方法实施例所具备的有益效果。在本申请实施例中，该通信装置700可以是终端设备或网络设备，也可以是终端设备或网络设备内部的集成电路或者元件等，例如芯片。
一种可能的实现方式中，该装置700包括处理单元701和收发单元702；该收发单元702用于获取M路第一信号，该第一信号包括PA的输出信号，M为大于2的整数；该处理单元701用于确定该M路第一信号合并后的第二信号；该处理单元701还用于基于该第二信号输出第三信号，该第三信号用于对该M路第一信号的非线性信息进行补偿。
在一种可能的实现方式中，该第三信号包括第一子信号，该第一子信号用于对该M路第一信号的第一非线性信息进行补偿；该处理单元701基于该第二信号输出第三信号包括：该处理单元701基于该第二信号向第一预失真器输出该第一子信号，该第一预失真器与该M个PA连接；其中，该第一预失真器用于输入该第一子信号，并分别向该M个PA输出M个第一处理结果，其中，该M个第一处理结果为基于该第一子信号进行预失真处理得到。
在一种可能的实现方式中，该第三信号包括M个第二子信号，该M个第二子信号用于对该M路第一信号的第二非线性信息进行补偿；该处理单元701基于该第二信号输出第三信号包括：该处理单元701基于该第二信号向M个第二预失真器输出该M个第二子信号，该M个第二预失真器分别与该M个PA连接；其中，该M个第二预失真器用于分别输入该M个第二子信号，并分别向该M个PA输出M个第二处理结果，其中，该M个第二处理结果分别为基于该第二子信号进行预失真处理得到。
在一种可能的实现方式中，该处理单元701基于该第二信号输出第三信号包括：该处理单元701基于该第二信号的欠采样结果输出该第三信号。
在一种可能的实现方式中，该处理单元701确定该M路第一信号合并后的第二信号包括：该处理单元701基于M个可调衰减器分别对该M个PA的输出信号进行处理之后，确定该第二信号。
在一种可能的实现方式中，该M个可调衰减器与可调功率系数配置模块连接，该可调功率系数配置模块用于对该M个可调衰减器的功率配置系数进行调整。
需要说明的是，上述通信装置700的单元的信息执行过程等内容，具体可参见本申请前述所示的方法实施例中的叙述，此处不再赘述。
请参阅图8，为本申请提供的通信装置800的另一种示意性结构图，通信装置800至少包括输入输出接口802。其中，通信装置800可以为芯片或集成电路。
可选的，该通信装置还包括逻辑电路801。
其中，图7所示收发单元702可以为通信接口，该通信接口可以是图8中的输入输出接口802，该输入输出接口802可以包括输入接口和输出接口。或者，该通信接口也可以是收发电路，该收发电路可以包括输入接口电路和输出接口电路。
可选的，该通信装置800为前述实施例中通信装置(或通信装置中的部件)的情况下，在该输入输出接口802用于获取M路第一信号，该第一信号包括PA的输出信号，M为大于2的整数；该逻辑电路801用于确定该M路第一信号合并后的第二信号；该逻辑电路801还用于基于该第二信号输出第三信号，该第三信号用于对该M路第一信号的非线性信息进行补偿。
其中，逻辑电路801和输入输出接口802还可以执行任一实施例中通信装置执行的其他步骤并实现对应的有益效果，此处不再赘述。
在一种可能的实现方式中，图7所示处理单元701可以为图8中的逻辑电路801。
可选的，逻辑电路801可以是一个处理装置，处理装置的功能可以部分或全部通过软件实现。其中，处理装置的功能可以部分或全部通过软件实现。
可选的，处理装置可以包括存储器和处理器，其中，存储器用于存储计算机程序，处理器读取并执行存储器中存储的计算机程序，以执行任意一个方法实施例中的相应处理和/或步骤。
可选地，处理装置可以仅包括处理器。用于存储计算机程序的存储器位于处理装置之外，处理器通过电路/电线与存储器连接，以读取并执行存储器中存储的计算机程序。其中，存储器和处理器可以集成在一起，或者也可以是物理上互相独立的。
可选地，该处理装置可以是一个或多个芯片，或一个或多个集成电路。例如，处理装置可以是一个或多个现场可编程门阵列(field-programmable gate array，FPGA)、专用集成芯片(application specific integrated circuit，ASIC)、系统芯片(system on chip，SoC)、中央处理器(central processor unit，CPU)、网络处理器(network processor，NP)、数字信号处理电路(digital signal processor，DSP)、微控制器(micro controller unit，MCU)，可编程控制器(programmable logic device，PLD)或其它集成芯片，或者上述芯片或者处理器的任意组合等。
请参阅图9，为本申请的实施例提供的上述实施例中所涉及的通信装置900，该通信装置900具体可以为上述实施例中的作为终端设备的通信装置，图9所示示例为终端设备通 过终端设备(或者终端设备中的部件)实现。
其中，该通信装置900的一种可能的逻辑结构示意图，该通信装置900可以包括但不限于至少一个处理器901以及通信端口902。
进一步可选的，该装置还可以包括存储器903、总线904中的至少一个，在本申请的实施例中，该至少一个处理器901用于对通信装置900的动作进行控制处理。
此外，处理器901可以是中央处理器单元，通用处理器，数字信号处理器，专用集成电路，现场可编程门阵列或者其他可编程逻辑器件、晶体管逻辑器件、硬件部件或者其任意组合。其可以实现或执行结合本申请公开内容所描述的各种示例性的逻辑方框，模块和电路。该处理器也可以是实现计算功能的组合，例如包含一个或多个微处理器组合，数字信号处理器和微处理器的组合等等。所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的系统，装置和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
需要说明的是，图9所示通信装置900具体可以用于实现前述方法实施例中终端设备所实现的步骤，并实现终端设备对应的技术效果，图9所示通信装置的具体实现方式，均可以参考前述方法实施例中的叙述，此处不再一一赘述。
请参阅图10，为本申请的实施例提供的上述实施例中所涉及的通信装置1000的结构示意图，该通信装置1000具体可以为上述实施例中的作为网络设备的通信装置，图10所示示例为网络设备通过网络设备(或者网络设备中的部件)实现，其中，该通信装置的结构可以参考图10所示的结构。
通信装置1000包括至少一个处理器1011以及至少一个网络接口1014。进一步可选的，该通信装置还包括至少一个存储器1012、至少一个收发器1013和一个或多个天线1015。处理器1011、存储器1012、收发器1013和网络接口1014相连，例如通过总线相连，在本申请实施例中，该连接可包括各类接口、传输线或总线等，本实施例对此不做限定。天线1015与收发器1013相连。网络接口1014用于使得通信装置通过通信链路，与其它通信设备通信。例如网络接口1014可以包括通信装置与核心网设备之间的网络接口，例如S1接口，网络接口可以包括通信装置和其他通信装置(例如其他网络设备或者核心网设备)之间的网络接口，例如X2或者Xn接口。
处理器1011主要用于对通信协议以及通信数据进行处理，以及对整个通信装置进行控制，执行软件程序，处理软件程序的数据，例如用于支持通信装置执行实施例中所描述的动作。通信装置可以包括基带处理器和中央处理器，基带处理器主要用于对通信协议以及通信数据进行处理，中央处理器主要用于对整个终端设备进行控制，执行软件程序，处理软件程序的数据。图10中的处理器1011可以集成基带处理器和中央处理器的功能，本领域技术人员可以理解，基带处理器和中央处理器也可以是各自独立的处理器，通过总线等技术互联。本领域技术人员可以理解，终端设备可以包括多个基带处理器以适应不同的网络制式，终端设备可以包括多个中央处理器以增强其处理能力，终端设备的各个部件可以通过各种总线连接。该基带处理器也可以表述为基带处理电路或者基带处理芯片。该中央 处理器也可以表述为中央处理电路或者中央处理芯片。对通信协议以及通信数据进行处理的功能可以内置在处理器中，也可以以软件程序的形式存储在存储器中，由处理器执行软件程序以实现基带处理功能。
存储器主要用于存储软件程序和数据。存储器1012可以是独立存在，与处理器1011相连。可选的，存储器1012可以和处理器1011集成在一起，例如集成在一个芯片之内。其中，存储器1012能够存储执行本申请实施例的技术方案的程序代码，并由处理器1011来控制执行，被执行的各类计算机程序代码也可被视为是处理器1011的驱动程序。
图10仅示出了一个存储器和一个处理器。在实际的终端设备中，可以存在多个处理器和多个存储器。存储器也可以称为存储介质或者存储设备等。存储器可以为与处理器处于同一芯片上的存储元件，即片内存储元件，或者为独立的存储元件，本申请实施例对此不做限定。
收发器1013可以用于支持通信装置与终端之间射频信号的接收或者发送，收发器1013可以与天线1015相连。收发器1013包括发射机Tx和接收机Rx。具体地，一个或多个天线1015可以接收射频信号，该收发器1013的接收机Rx用于从天线接收该射频信号，并将射频信号转换为数字基带信号或数字中频信号，并将该数字基带信号或数字中频信号提供给该处理器1011，以便处理器1011对该数字基带信号或数字中频信号做进一步的处理，例如解调处理和译码处理。此外，收发器1013中的发射机Tx还用于从处理器1011接收经过调制的数字基带信号或数字中频信号，并将该经过调制的数字基带信号或数字中频信号转换为射频信号，并通过一个或多个天线1015发送该射频信号。具体地，接收机Rx可以选择性地对射频信号进行一级或多级下混频处理和模数转换处理以得到数字基带信号或数字中频信号，该下混频处理和模数转换处理的先后顺序是可调整的。发射机Tx可以选择性地对经过调制的数字基带信号或数字中频信号时进行一级或多级上混频处理和数模转换处理以得到射频信号，该上混频处理和数模转换处理的先后顺序是可调整的。数字基带信号和数字中频信号可以统称为数字信号。
收发器1013也可以称为收发单元702、收发机、收发装置等。可选的，可以将收发单元702中用于实现接收功能的器件视为接收单元，将收发单元702中用于实现发送功能的器件视为发送单元，即收发单元702包括接收单元和发送单元，接收单元也可以称为接收机、输入口、接收电路等，发送单元可以称为发射机、发射器或者发射电路等。
需要说明的是，图10所示通信装置1000具体可以用于实现前述方法实施例中网络设备所实现的步骤，并实现网络设备对应的技术效果，图10所示通信装置1000的具体实现方式，均可以参考前述方法实施例中的叙述，此处不再一一赘述。
本申请实施例还提供一种存储一个或多个计算机执行指令的计算机可读存储介质，当计算机执行指令被处理器执行时，该处理器执行如前述实施例中通信装置可能的实现方式所述的方法。
本申请实施例还提供一种存储一个或多个计算机的计算机程序产品，当计算机程序产品被该处理器执行时，该处理器执行上述通信装置可能实现方式的方法。
本申请实施例还提供了一种芯片系统，该芯片系统包括至少一个处理器，用于支持通 信装置实现上述通信装置可能的实现方式中所涉及的功能。可选的，所述芯片系统还包括接口电路，所述接口电路为所述至少一个处理器提供程序指令和/或数据。在一种可能的设计中，芯片系统还可以包括存储器，存储器，用于保存该通信装置必要的程序指令和数据。该芯片系统，可以由芯片构成，也可以包含芯片和其他分立器件，其中，该通信装置具体可以为前述方法实施例中的通信装置。
本申请实施例还提供了一种通信系统，该通信系统包括上述任一实施例中的通信装置。
在本申请所提供的几个实施例中，应该理解到，所揭露的系统，装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现，也可以采用软件功能单元的形式实现。所述集成的单元如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的全部或部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本申请各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(ROM，Read-Only Memory)、随机存取存储器(RAM，Random Access Memory)、磁碟或者光盘等各种可以存储程序代码的介质。

Claims (22)

  1. 一种信号处理装置，其特征在于，包括：
    合路器，用于输入M路第一信号，并输出所述M路第一信号合并后的第二信号，其中，所述M路第一信号分别包括M个功率放大器PA的输出信号，M为大于2的整数；
    信号处理器，用于基于所述第二信号输出第三信号，其中，所述第三信号用于对所述M路第一信号的非线性信息进行补偿。
  2. 根据权利要求1所述的装置，其特征在于，所述第三信号包括第一子信号，所述第一子信号用于对所述M路第一信号的第一非线性信息进行补偿。
  3. 根据权利要求2所述的装置，其特征在于，
    所述信号处理器具体用于向第一预失真器输出所述第一子信号，所述第一预失真器与所述M个PA连接。
  4. 根据权利要求3所述的装置，其特征在于，
    所述第一预失真器用于输入所述第一子信号，并分别向所述M个PA输出M个第一处理结果，其中，所述M个第一处理结果为基于所述第一子信号进行预失真处理得到。
  5. 根据权利要求1至4任一项所述的装置，其特征在于，所述第三信号包括M个第二子信号，所述M个第二子信号用于对所述M路第一信号的第二非线性信息进行补偿。
  6. 根据权利要求5所述的装置，其特征在于，
    所述信号处理器具体用于向M个第二预失真器输出所述M个第二子信号，所述M个第二预失真器分别与所述M个PA连接。
  7. 根据权利要求6所述的装置，其特征在于，
    所述M个第二预失真器用于分别输入所述M个第二子信号，并分别向所述M个PA输出M个第二处理结果，其中，所述M个第二处理结果分别为基于所述第二子信号进行预失真处理得到。
  8. 根据权利要求1至7任一项所述的装置，其特征在于，所述装置还包括采样器；
    所述合路器通过所述采样器与所述信号处理器连接。
  9. 根据权利要求8所述的装置，其特征在于，
    所述采样器用于输入所述第四信号，并向所述信号处理器输出所述第四信号的欠采样结果，所述第四信号基于所述第二信号得到。
  10. 根据权利要求9所述的装置，其特征在于，
    所述信号处理器具体用于基于所述第四信号的欠采样结果输出所述第三信号。
  11. 根据权利要求1至10任一项所述的装置，其特征在于，
    所述合路器通过M个可调衰减器与所述M个PA连接，所述M个可调衰减器分别用于对所述M个PA的输出信号进行处理。
  12. 根据权利要求11所述的装置，其特征在于，
    所述M个可调衰减器与可调功率系数配置模块连接，所述可调功率系数配置模块用于对所述M个可调衰减器的功率配置系数进行调整。
  13. 一种信号处理方法，其特征在于，包括：
    获取M路第一信号，所述第一信号包括功率放大器PA的输出信号，M为大于2的整数；
    确定所述M路第一信号合并后的第二信号；
    基于所述第二信号输出第三信号，所述第三信号用于对所述M路第一信号的非线性信息进行补偿。
  14. 根据权利要求13所述的方法，其特征在于，所述第三信号包括第一子信号，所述第一子信号用于对所述M路第一信号的第一非线性信息进行补偿；所述基于所述第二信号输出第三信号包括：
    基于所述第二信号向第一预失真器输出所述第一子信号，所述第一预失真器与所述M个PA连接；其中，所述第一预失真器用于输入所述第一子信号，并分别向所述M个PA输出M个第一处理结果，其中，所述M个第一处理结果为基于所述第一子信号进行预失真处理得到。
  15. 根据权利要求13或14所述的方法，其特征在于，所述第三信号包括M个第二子信号，所述M个第二子信号用于对所述M路第一信号的第二非线性信息进行补偿；所述基于所述第二信号输出第三信号包括：
    基于所述第二信号向M个第二预失真器输出所述M个第二子信号，所述M个第二预失真器分别与所述M个PA连接；其中，所述M个第二预失真器用于分别输入所述M个第二子信号，并分别向所述M个PA输出M个第二处理结果，其中，所述M个第二处理结果分别为基于所述第二子信号进行预失真处理得到。
  16. 根据权利要求13至15任一项所述的方法，其特征在于，所述基于所述第二信号输出第三信号包括：
    基于所述第二信号的欠采样结果输出所述第三信号。
  17. 根据权利要求13至16任一项所述的方法，其特征在于，所述确定所述M路第一信号合并后的第二信号包括：
    基于M个可调衰减器分别对所述M个PA的输出信号进行处理之后，确定所述第二信号。
  18. 一种芯片，其特征在于，所述芯片包括处理器和通信接口；
    其中，所述通信接口和所述处理器耦合，所述处理器用于运行计算机程序或指令，以实现如权利要求13至17中任一项所述的方法。
  19. 一种计算机可读存储介质，其特征在于，所述介质存储有指令，当所述指令被处理器执行时，实现权利要求13至17中任一项所述的方法。
  20. 一种计算机程序产品，其特征在于，包括指令，当所述指令在处理器上运行时，实现如权利要求13至17中任一项所述的方法。
  21. 一种通信装置，其特征在于，包括至少一个处理器，所述至少一个处理器与存储器耦合；
    所述存储器用于存储程序或指令；
    所述至少一个处理器用于执行所述程序或指令，以使所述通信装置实现如权利要求13至17中任一项所述的方法。
  22. 一种通信装置，其特征在于，所述通信装置包括权利要求1至12任一项所述的信号处理装置。
PCT/CN2022/113502 2022-08-19 2022-08-19 一种信号处理装置，方法及相关设备 Ceased WO2024036588A1 (zh)

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Citations (4)

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CN101320980A (zh) * 2007-12-27 2008-12-10 华为技术有限公司 一种发射机及信号传输方法
CN101860330A (zh) * 2010-04-14 2010-10-13 华为技术有限公司 放大单元、功率放大器和发信机
WO2015176077A2 (en) * 2014-05-13 2015-11-19 Skyworks Solutions, Inc. Systems and methods related to linear and efficient broadband power amplifiers
US11171613B1 (en) * 2020-06-22 2021-11-09 Mixcomm, Inc. Methods and apparatus for using signal pre-distortion with individual power amplifier (PA) control

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101320980A (zh) * 2007-12-27 2008-12-10 华为技术有限公司 一种发射机及信号传输方法
CN101860330A (zh) * 2010-04-14 2010-10-13 华为技术有限公司 放大单元、功率放大器和发信机
WO2015176077A2 (en) * 2014-05-13 2015-11-19 Skyworks Solutions, Inc. Systems and methods related to linear and efficient broadband power amplifiers
US11171613B1 (en) * 2020-06-22 2021-11-09 Mixcomm, Inc. Methods and apparatus for using signal pre-distortion with individual power amplifier (PA) control

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