WO2023240477A1 - 一种互锁检测系统的测试装置以及电子设备 - Google Patents
一种互锁检测系统的测试装置以及电子设备 Download PDFInfo
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- WO2023240477A1 WO2023240477A1 PCT/CN2022/098840 CN2022098840W WO2023240477A1 WO 2023240477 A1 WO2023240477 A1 WO 2023240477A1 CN 2022098840 W CN2022098840 W CN 2022098840W WO 2023240477 A1 WO2023240477 A1 WO 2023240477A1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R35/00—Testing or calibrating of apparatus covered by the other groups of this subclass
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- the high-voltage system of new energy pure electric vehicles generally has high-voltage power above 400V, and the operating current can reach hundreds of amps during driving or DC charging. Therefore, it is necessary to configure corresponding safety technical means to monitor the vehicle's high-voltage system to ensure Reduce the probability of risk occurrence.
- a high-voltage interlock fault In order to ensure the normal operation of the high-voltage interlock detection system, during the reliability test of new energy vehicles, it is necessary to construct a high-voltage interlock fault to test the ability of the high-voltage interlock function to detect abnormal conditions.
- the injection of high-voltage interlock faults is achieved by connecting two contactors.
- the first contactor is used to open the interlock circuit, and the second contactor is used to realize the connection of the interlock circuit to ground and power supply.
- Short circuit however, this scheme cannot simulate the common fault of interlocked loop impedance becoming large.
- This application provides a testing device and electronic equipment for an interlocking detection system to improve detection efficiency and accuracy.
- the first aspect of this application provides a test device for an interlock detection system.
- the device includes: a first relay, a second relay, a third relay, a fourth relay and a resistor.
- the first controlled terminal of the first relay, The second controlled end of the fourth relay and one end of the resistor are connected to one end of the interlock loop, the third controlled end of the first relay is connected to the first controlled end of the third relay, and the first control end of the first relay receives
- the first signal the second control end of the first relay is grounded, and the interlock loop is the loop detected by the interlock detection system;
- the first controlled end of the second relay is connected to the other end of the interlock loop, and the second controlled end of the second relay is
- the control terminal is connected to the first controlled terminal of the fourth relay, the first control terminal of the second relay receives the second signal, and the second control terminal of the second relay is grounded;
- the second controlled terminal of the third relay is connected to the power supply, and the third controlled terminal of the third relay is connected to the
- the third controlled end of the relay is grounded, the first control end of the third relay receives the third signal, and the second control end of the third relay is grounded; the third controlled end of the fourth relay is connected to the other end of the resistor, and the fourth The first control terminal of the relay receives the fourth signal, and the second control terminal of the fourth relay is grounded; the first signal, the second signal, the third signal and the fourth signal are used to simulate the state of the interlock loop.
- the connection method of the controlled terminals inside each low-voltage relay is changed, thereby simulating the state of the interlocking loop, thereby realizing mutual control.
- the function and performance of the lock detection system are tested to improve detection efficiency and accuracy.
- the state of the interlock loop when the first signal, the second signal, the third signal and the fourth signal are low level, the state of the interlock loop is a normal state; when the first signal, the second signal and the third signal is low level and the fourth signal is high level, the state of the interlock loop is a state of increasing impedance; when the first signal and the third signal are high level and the second signal and the fourth signal are low level, the interlocking loop is in a state of increasing impedance.
- the state of the lock loop is a short circuit state to the ground; when the first signal is high level and the second signal, the third signal and the fourth signal are low level, the state of the interlock circuit is a short circuit state to the power supply; when the first signal , the third signal and the fourth signal are low level, and when the second signal is high level, the state of the interlock loop is an open circuit state.
- the first signal, the second signal, the third signal and the fourth signal can be used to simulate the test scenarios of open circuit, short circuit to ground, short circuit to power supply, and increased loop resistance, thereby improving simulation efficiency.
- the device further includes an operating unit configured to receive a user's adjustment command for the levels of the first signal, the second signal, the third signal, and the fourth signal.
- the user can adjust the first signal, the second signal, the third signal and the fourth signal on the operation unit to improve the user experience.
- the device further includes a feedback unit configured to display the levels of the first signal, the second signal, the third signal and the fourth signal adjusted by the operating unit, as well as the status of the interlock loop. .
- the device further includes a monitoring unit configured to monitor the detection results of the interlock detection system.
- the device further includes a storage unit, and the storage unit is used to store instructions of the device.
- the device further includes a control unit configured to adjust the levels of the first signal, the second signal, the third signal and the fourth signal according to the user's adjustment command.
- the first controlled terminal of the second relay is connected to the interlock loop
- the third controlled end of the second relay is connected to the other end of the adjustable resistor, the first control end of the second relay receives the second signal, the second control end of the second relay is grounded; the third control end of the third relay
- the second controlled terminal is connected to the power supply, the third controlled terminal of the third relay is grounded, the first control terminal of the third relay receives the third signal, and the second control terminal of the third relay is grounded; the first signal, the second signal, and the third controlled terminal are grounded.
- Three signals and the value of the adjustable resistor are used to adjust the state of the interlock loop.
- the connection method of the controlled terminals inside each low-voltage relay is changed, and the resistance value of the adjustable resistor is adjusted, thereby simulating interlocking.
- the status of the loop can be tested to test the function and performance of the interlock detection system and improve detection efficiency and accuracy.
- the device further includes an operating unit, which is configured to receive a user's adjustment command for the levels of the first signal, the second signal, and the third signal, and to adjust the resistance of the adjustable resistor. Order.
- the device further includes a monitoring unit configured to monitor the detection results of the interlock detection system.
- the device further includes a control unit configured to adjust the levels of the first signal, the second signal and the third signal, and the resistance of the adjustable resistor according to the user's adjustment command.
- the first relay, the second relay and the third relay are double-throw low-voltage relays.
- Figure 1 is a schematic structural diagram of a high-voltage interlock detection system provided by an embodiment of the present application
- Figure 2 is a schematic structural diagram of a test device of an interlock detection system provided by an embodiment of the present application
- Figure 5 is a schematic diagram of a short-circuit state connection to ground provided by an embodiment of the present application.
- Figure 7 is a schematic diagram of an open-circuit state connection provided by an embodiment of the present application.
- Figure 8 is a schematic structural diagram of another testing device provided by an embodiment of the present application.
- Figure 9 is a schematic structural diagram of another detection device provided by an embodiment of the present application.
- Figure 10 is another normal state connection schematic diagram provided by the embodiment of the present application.
- Figure 11 is a schematic diagram of another connection in a state where the impedance increases according to the embodiment of the present application.
- Figure 12 is a schematic connection diagram of another short-circuit state provided by the embodiment of the present application.
- Figure 13 is another schematic diagram of connection to a power supply in a short-circuit state provided by an embodiment of the present application.
- Figure 14 is another open circuit state connection schematic diagram provided by the embodiment of the present application.
- Figure 15 is a schematic structural diagram of an electronic device provided by an embodiment of the present application.
- Embodiments of the present application provide a testing device and electronic equipment for an interlock detection system to improve detection efficiency and accuracy.
- FIG. 1 is a schematic structural diagram of a high-voltage interlock detection system provided by an embodiment of the present application.
- the system 10 includes an on-board charger (OBC) 101, a DC power converter (direct current/direct current (DCDC) 102. Front Motor Control Unit (FMCU) 103. Battery management system (BMS) 104. Vehicle control unit (VCU) 105. Power distribution unit (power distribution unit, PDU) 106 and rear motor control unit (rear motor control unit, RMCU) 107.
- OBC on-board charger
- DCDC direct current/direct current
- FMCU Front Motor Control Unit
- BMS Battery management system
- VCU Vehicle control unit
- Power distribution unit power distribution unit
- PDU power distribution unit
- RMCU rear motor control unit
- the high-voltage system of electric vehicles is generally equipped with one or more high-voltage interlock detection systems.
- a typical detection circuit is shown in the figure above.
- the figure contains two high-voltage interlock detection circuits, and the two interlock circuit monitoring units are respectively for VCU and RMCU.
- OBC is used to charge the battery of electric vehicles.
- the high-voltage direct current provided by the battery is converted into low-voltage direct current by DCDC and provided to the FMCU to drive the electric vehicle.
- BMS is a functional unit that monitors and manages charge and discharge of the battery to ensure that the battery is in a safe state. , within the controllable state range.
- the high-voltage terminals of the above high-voltage devices and circuits are connected to the DC bus of the electric vehicle, forming a high-voltage circuit. When the electric vehicle is running, the high-voltage circuit is always accompanied by vibration and shock, so there are safety risks.
- the high-voltage interlock system can monitor signs and provide alarm information to the VCU before power outage, allowing time for the vehicle system to take countermeasures.
- the PDU can also input AC power to the battery of the electric vehicle, the BMS monitors and manages charge and discharge of the battery, and the RMCU can monitor the circuit.
- the above high-voltage devices and circuits are connected through high-voltage connectors and cables.
- the high-voltage connector integrates the HVIL interface, such as the HVIL_P and HVIL_P connected to the VCU or RMCU. HVIL_N.
- Figure 2 is a schematic structural diagram of a test device of an interlock detection system provided by an embodiment of the present application.
- the device includes: a first relay, a second relay, a third relay, a fourth relay and The resistor, the first controlled terminal of the first relay, the second controlled terminal of the fourth relay and one end of the resistor are connected to one end of the interlock circuit, and the third controlled terminal of the first relay is connected to the first controlled terminal of the third relay.
- the three controlled terminals are connected to the other end of the resistor, the first control terminal of the fourth relay receives the fourth signal, and the second control terminal of the fourth relay is grounded; the first signal, the second signal, the third signal and the fourth signal are to simulate the state of the interlock loop.
- HVIL_N is connected to HVIL_P connected to terminal 11 of the second relay through terminal 12 of the fourth relay.
- the state of the simulated interlock loop is a normal state. As shown in Table 1:
- FIG. 6 shows a schematic connection diagram of the short-circuit state of the power supply provided by the embodiment of the present application. Terminals 11 and 12 of the first relay are disconnected.
- the state of the low-voltage interlock loop is switched, which are normal, increased loop impedance, short circuit to ground, short circuit to power supply, and open circuit.
- the low-voltage relay A1 signals in each state are as follows: As shown in 6:
- Figure 8 shows a schematic structural diagram of another test device provided by the embodiment of the present application. At this time, the aforementioned low-voltage relay and resistor together constitute the execution unit 801.
- the embodiment of the present application can add other functional units, optionally:
- the embodiment of the present application can also set up a feedback unit 803 to display the signals input by each low-voltage relay and the status of the interlocking loop.
- the display results can be to display the above tables in different simulation states to facilitate users to adjust the signals.
- the feedback unit can be composed of a liquid crystal display, LED light or buzzer.
- the embodiment of the present application can also set up a monitoring unit 804 to monitor the detection results of the interlock detection system, such as obtaining the monitoring results of the VCU, so as to cooperate with the feedback unit to check whether its high-voltage interlock detection function is normal. Further, it can be The feedback unit displays the simulation status and monitoring status at the same time, and reports an error when the simulation status and monitoring status are different to improve user experience.
- the monitoring unit can also be used to calibrate or set the initial state of the interlock detection system.
- the embodiment of the present application can also be provided with a storage unit 805, which can store instructions for the device of the embodiment of the present application, such as storing automated execution instructions or test results of the interlock detection system.
- the embodiment of the present application realizes open circuit, short circuit to ground, short circuit to power supply and loop resistance change while adjusting the first signal, second signal, third signal and fourth signal through the connection method based on the aforementioned relay and resistor.
- the construction of a large test scenario enables the function and performance of the interlocking detection system to be tested and improves detection efficiency and accuracy.
- the three controlled terminals are connected to the other end of the adjustable resistor, the first control terminal of the second relay receives the second signal, and the second control terminal of the second relay is grounded; the second controlled terminal of the third relay is connected to the power supply, and the third controlled terminal is connected to the power supply.
- the third controlled terminal of the relay is grounded, the first control terminal of the third relay receives the third signal, and the second control terminal of the third relay is grounded; the resistance of the first signal, the second signal, the third signal and the adjustable resistor The value is used to adjust the state of the interlock loop.
- HVIL_N is connected to terminal 14 of the second relay through the adjustable resistor, and then connected to HVIL_P connected to terminal 11 of the second relay. Since the adjustable resistor is in an open circuit state, then HVIL_N and HVIL_P are disconnected. At this time, the status of the simulated interlock loop is open circuit. As shown in Table 11:
- FIG. 15 shows a possible structural diagram of the electronic device 150 provided by the embodiment of the present application.
- the electronic device 150 may be a signal processor, and the signal processor may include the detection device 1501 of the interlock detection system shown in any one of FIGS. 2 to 14 .
- the disclosed systems, devices and methods can be implemented in other ways.
- the device embodiments described above are only illustrative.
- the division of the units is only a logical function division. In actual implementation, there may be other division methods.
- multiple units or components may be combined or can be integrated into another system, or some features can be ignored, or not implemented.
- the coupling or direct coupling or communication connection between each other shown or discussed may be through some interfaces, and the indirect coupling or communication connection of the devices or units may be in electrical, mechanical or other forms.
- the units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place, or they may be distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.
- each functional unit in each embodiment of the present application can be integrated into one processing unit, each unit can exist physically alone, or two or more units can be integrated into one unit.
- the above integrated units can be implemented in the form of hardware or software functional units.
- the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it may be stored in a computer-readable storage medium.
- the technical solution of the present application is essentially or contributes to the existing technology, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium , including several instructions to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of this application.
- the aforementioned storage media include: U disk, mobile hard disk, read-only memory (ROM, read-only memory), random access memory (RAM, random access memory), magnetic disk or optical disk and other media that can store program code. .
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Abstract
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Claims (17)
- 一种互锁检测系统的测试装置,其特征在于,包括:第一继电器、第二继电器、第三继电器、第四继电器和电阻器,所述第一继电器的第一被控端、所述第四继电器的第二被控端和所述电阻器的一端连接互锁回路的一端,所述第一继电器的第三被控端连接所述第三继电器的第一被控端,所述第一继电器的第一控制端接收第一信号,所述第一继电器的第二控制端接地,所述互锁回路为所述互锁检测系统检测的回路;所述第二继电器的第一被控端连接所述互锁回路的另一端,所述第二继电器的第二被控端连接所述第四继电器的第一被控端,所述第二继电器的第一控制端接收第二信号,所述第二继电器的第二控制端接地;所述第三继电器的第二被控端连接电源,所述第三继电器的第三被控端接地,所述第三继电器的第一控制端接收第三信号,所述第三继电器的第二控制端接地;所述第四继电器的第三被控端连接所述电阻器的另一端,所述第四继电器的第一控制端接收第四信号,所述第四继电器的第二控制端接地;所述第一信号、所述第二信号、所述第三信号和所述第四信号用于模拟所述互锁回路的状态。
- 根据权利要求1所述的装置,其特征在于,当所述第一信号、所述第二信号、所述第三信号和所述第四信号为低电平时,所述互锁回路的状态为正常状态;当所述第一信号、所述第二信号和所述第三信号为低电平,所述第四信号为高电平时,所述互锁回路的状态为阻抗变大状态;当所述第一信号和所述第三信号为高电平,所述第二信号和所述第四信号为低电平时,所述互锁回路的状态为对地短路状态;当所述第一信号为高电平,所述第二信号、所述第三信号和所述第四信号为低电平时,所述互锁回路的状态为对电源短路状态;当所述第一信号、所述第三信号和所述第四信号为低电平,所述第二信号为高电平时,所述互锁回路的状态为开路状态。
- 根据权利要求1或2所述的装置,其特征在于,所述装置还包括操作单元,所述操作单元用于接收用户对所述第一信号、所述第二信号、所述第三信号和所述第四信号的电平的调整命令。
- 根据权利要求3任一项所述的装置,其特征在于,所述装置还包括反馈单元,所述反馈单元用于显示经过所述操作单元调整后的所述第一信号、所述第二信号、所述第三信号和所述第四信号的电平,以及所述互锁回路的状态。
- 根据权利要求1-4任一项所述的装置,其特征在于,所述装置还包括监测单元,所述监测单元用于监测所述互锁检测系统的检测结果。
- 根据权利要求1-5任一项所述的装置,其特征在于,所述装置还包括存储单元,所述存储单元用于存储所述装置的指令。
- 根据权利要求3所述的装置,其特征在于,所述装置还包括控制单元,所述控制单 元用于根据所述用户的调整命令调整所述第一信号、所述第二信号、所述第三信号和所述第四信号的电平。
- 根据权利要求1-7任一项所述的装置,其特征在于,所述第一继电器为双掷型低压继电器或常开型低压继电器,所述第二继电器为双掷型低压继电器或常闭型低压继电器,所述第三继电器和所述第四继电器为双掷型低压继电器。
- 一种互锁检测系统的测试装置,其特征在于,包括:第一继电器、第二继电器、第三继电器和可调电阻器,所述第一继电器的第一被控端和所述可调电阻器的调节端连接互锁回路的一端,所述第一继电器的第二被控端连接所述第二继电器的第二被控端,所述第一继电器的第三被控端连接所述第三继电器的第一被控端,所述第一继电器的第一控制端接收第一信号,所述第一继电器的第二控制端接地,所述互锁回路为所述互锁检测系统检测的回路;所述第二继电器的第一被控端连接所述互锁回路的另一端,所述第二继电器的第三被控端连接所述可调电阻器的另一端,所述第二继电器的第一控制端接收第二信号,所述第二继电器的第二控制端接地;所述第三继电器的第二被控端连接电源,所述第三继电器的第三被控端接地,所述第三继电器的第一控制端接收第三信号,所述第三继电器的第二控制端接地;所述第一信号、所述第二信号、所述第三信号和所述可调电阻器的阻值用于调整所述互锁回路的状态。
- 根据权利要求9所述的装置,其特征在于,当所述第一信号、所述第二信号和所述第三信号为低电平,且所述可调变阻器的阻值为任意数值时,所述互锁回路的状态为正常状态;当所述第一信号和所述第三信号为低电平,所述第二信号为高电平,且所述可调电阻器的阻值为大于0的任意数值时,所述互锁回路的状态为阻抗变大状态;当所述第一信号、所述第二信号和所述第三信号为高电平,且所述可调电阻器的阻值为短路状态时,所述互锁回路的状态为对地短路状态;当所述第一信号和所述第二信号为高电平,所述第三信号为低电平,且所述可调电阻器为短路状态时,所述互锁回路的状态为对电源短路状态;当所述第一信号和所述第三信号为低电平,所述第二信号为高电平,且所述可调电阻器为开路状态时,所述互锁回路的状态为开路状态。
- 根据权利要求9或10所述的装置,其特征在于,所述装置还包括操作单元,所述操作单元用于接收用户对所述第一信号、所述第二信号和所述第三信号的电平的调整命令,以及对所述可调电阻器的阻值的调整命令。
- 根据权利要求11任一项所述的装置,其特征在于,所述装置还包括反馈单元,所述反馈单元用于显示所述操作单元调整后的所述第一信号、所述第二信号和所述第三信号的电平,以及所述可调电阻器的阻值和所述互锁回路的状态。
- 根据权利要求9-12任一项所述的装置,其特征在于,所述装置还包括监测单元,所述监测单元用于监测所述互锁检测系统的检测结果。
- 根据权利要求9-13任一项所述的装置,其特征在于,所述装置还包括存储单元,所述存储单元用于存储所述装置的指令。
- 根据权利要求11所述的装置,其特征在于,所述装置还包括控制单元,所述控制单元用于根据所述用户的调整命令调整所述第一信号、所述第二信号和所述第三信号的电平,以及所述可调电阻器的阻值。
- 根据权利要求9-15任一项所述的装置,其特征在于,所述第一继电器、所述第二继电器和所述第三继电器为双掷型低压继电器。
- 一种电子设备,其特征在于,所述电子设备包括如权利要求1-16任一项所述的互锁检测系统的测试装置。
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202280097082.9A CN119487411A (zh) | 2022-06-15 | 2022-06-15 | 一种互锁检测系统的测试装置以及电子设备 |
| PCT/CN2022/098840 WO2023240477A1 (zh) | 2022-06-15 | 2022-06-15 | 一种互锁检测系统的测试装置以及电子设备 |
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| PCT/CN2022/098840 WO2023240477A1 (zh) | 2022-06-15 | 2022-06-15 | 一种互锁检测系统的测试装置以及电子设备 |
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| WO2023240477A1 true WO2023240477A1 (zh) | 2023-12-21 |
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| CN (1) | CN119487411A (zh) |
| WO (1) | WO2023240477A1 (zh) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107219437A (zh) * | 2017-05-27 | 2017-09-29 | 北京新能源汽车股份有限公司 | 高压互锁检测电路、方法、装置及汽车 |
| CN107291000A (zh) * | 2016-04-11 | 2017-10-24 | 李尔公司 | 具有回路诊断的hvil信号发生器和检测器 |
| CN211478502U (zh) * | 2019-12-31 | 2020-09-11 | 蜂巢能源科技有限公司 | 高压互锁检测电路及包含其的车辆 |
| CN213275930U (zh) * | 2020-09-30 | 2021-05-25 | 蜂巢能源科技有限公司 | 用于测试bms高压互锁功能的装置 |
-
2022
- 2022-06-15 CN CN202280097082.9A patent/CN119487411A/zh active Pending
- 2022-06-15 WO PCT/CN2022/098840 patent/WO2023240477A1/zh not_active Ceased
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107291000A (zh) * | 2016-04-11 | 2017-10-24 | 李尔公司 | 具有回路诊断的hvil信号发生器和检测器 |
| CN107219437A (zh) * | 2017-05-27 | 2017-09-29 | 北京新能源汽车股份有限公司 | 高压互锁检测电路、方法、装置及汽车 |
| CN211478502U (zh) * | 2019-12-31 | 2020-09-11 | 蜂巢能源科技有限公司 | 高压互锁检测电路及包含其的车辆 |
| CN213275930U (zh) * | 2020-09-30 | 2021-05-25 | 蜂巢能源科技有限公司 | 用于测试bms高压互锁功能的装置 |
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| CN119487411A (zh) | 2025-02-18 |
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