WO2023181146A1 - Array antenna system and calibration method for array antenna system - Google Patents

Array antenna system and calibration method for array antenna system Download PDF

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Publication number
WO2023181146A1
WO2023181146A1 PCT/JP2022/013365 JP2022013365W WO2023181146A1 WO 2023181146 A1 WO2023181146 A1 WO 2023181146A1 JP 2022013365 W JP2022013365 W JP 2022013365W WO 2023181146 A1 WO2023181146 A1 WO 2023181146A1
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WIPO (PCT)
Prior art keywords
phase
unit
signal
array antenna
calibration signal
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PCT/JP2022/013365
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French (fr)
Japanese (ja)
Inventor
誠 松木
泰 田中
一成 紀平
徹 高橋
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三菱電機株式会社
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Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to PCT/JP2022/013365 priority Critical patent/WO2023181146A1/en
Priority to JP2023578046A priority patent/JP7466810B2/en
Priority to PCT/JP2023/009188 priority patent/WO2023181972A1/en
Publication of WO2023181146A1 publication Critical patent/WO2023181146A1/en

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/02Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
    • G01S7/40Means for monitoring or calibrating
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B7/00Radio transmission systems, i.e. using radiation field
    • H04B7/02Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
    • H04B7/04Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
    • H04B7/06Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the transmitting station
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B7/00Radio transmission systems, i.e. using radiation field
    • H04B7/02Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
    • H04B7/04Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
    • H04B7/08Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station

Definitions

  • the disclosed technology relates to an array antenna system and a method for calibrating the array antenna system.
  • Patent Document 1 discloses an adaptive array antenna system for communication systems. Further, Patent Document 1 discloses a phase calibration method for an adaptive array antenna system. The phase calibration method shown in Patent Document 1 inserts a calibration signal (corresponding to the "calibration signal” in the disclosed technology) into a main signal (corresponds to the "transmission signal” in the disclosed technology) and inserts it into a predetermined circuit. The phase of the main signal is calibrated based on the phase change of the calibration signal included in the output signal of the circuit.
  • Patent Document 1 calculates the difference between a composite signal of the transmission signals before passing through the analog circuits of each transmission system and a composite signal of the transmission signals after passing through the analog circuits of each transmission system.
  • a phase calibrator corrects a phase change in an analog circuit, that is, corrects a phase characteristic opposite to the phase characteristic in the analog circuit, so that the phases of the array antenna are aligned as a result. It says to control.
  • Patent Document 1 does not disclose in detail how to efficiently obtain the amplitude phase characteristics of the analog circuits of each transmission system.
  • Patent Document 1 does not mention a method of simultaneously calibrating the transmission systems included in the array antenna system.
  • the disclosed technology improves the conventional array antenna system and the method of calibrating the array antenna system exemplified in Patent Document 1. More specifically, the present disclosure aims to provide an array antenna system and an array antenna system calibration method that can simultaneously calibrate all transmission systems included in the array antenna system.
  • the array antenna system is an array antenna system that includes a plurality of transmission systems, and includes a calibration signal generation section that generates a calibration signal, and an extraction signal that is composed of a transmission signal and a calibration signal extracted from the transmission system.
  • a phase control section that controls the phase, a power synthesis section that synthesizes a plurality of signals whose phases have been controlled by the phase control section, a calibration signal receiver that demodulates the signal synthesized by the power synthesis section, and a calibration signal receiver.
  • a power measurement unit that measures the power of the signal demodulated by the power measurement unit; and a phase control instruction unit that instructs the phase control unit to control the phase amount based on the power measurement value measured by the power measurement unit. Be prepared.
  • the array antenna system according to the disclosed technique has the above configuration, it has the effect that all transmission systems included in the array antenna system can be calibrated simultaneously.
  • FIG. 1 is a block diagram showing the functional configuration of an array antenna system according to the first embodiment.
  • FIG. 2 is a first diagram showing the hardware configuration of a part of the array antenna system according to the first embodiment.
  • FIG. 3 is a second diagram showing a partial hardware configuration of the array antenna system according to the first embodiment.
  • FIG. 4 is a flowchart showing processing steps of the array antenna system according to the first embodiment.
  • FIG. 5 is a block diagram showing the functional configuration of the array antenna system according to the third embodiment.
  • FIG. 6 is a flowchart showing the processing steps of the array antenna system according to the third embodiment.
  • FIG. 7 is a block diagram showing the functional configuration of the array antenna system according to the fourth embodiment.
  • FIG. 8 is a flowchart showing the processing steps of the array antenna system according to the fourth embodiment.
  • FIG. 9 is a block diagram showing the functional configuration of the array antenna system according to the fifth embodiment.
  • FIG. 10 is a flowchart showing the processing steps of the array antenna system according to the fifth embodiment.
  • FIG. 11 is a block diagram showing the functional configuration of an array antenna system according to Embodiment 6.
  • FIG. 12 is a flowchart showing the processing steps of the array antenna system according to the sixth embodiment.
  • FIG. 13 is a graph showing a time-series change in the amount of electric power to be measured, and explains the timing to start a new calibration.
  • the method for calibrating the array antenna system according to the disclosed technology is based on the Rotating Element Electric Field Vector Method (REV method).
  • REV method Rotating Element Electric Field Vector Method
  • the element electric field vector rotation method measures the change in the magnitude of the combined electric field when the amount of phase shift of a phase shifter of a phased array is changed. It is known that the magnitude of the combined electric field changes in a sinusoidal manner as the amount of phase shift changes.
  • FIG. 1 is a block diagram showing the functional configuration of an array antenna system according to the first embodiment.
  • the array antenna system according to the first embodiment includes an antenna element 1, an extraction section 2, a transmitter 3, an injection section 4, a DBF section 10, a signal processing section 20, and a calibration signal.
  • N is the total number of antenna elements 1.
  • FIG. 1 is a block diagram showing the functional configuration of an array antenna system according to the first embodiment.
  • the array antenna system according to the first embodiment includes an antenna element 1, an extraction section 2, a transmitter 3, an injection section 4, a DBF section 10, a signal processing section 20, and a calibration signal.
  • n is a natural number from 1 to N
  • the signal processing section 20, DBF section 10, injection section 4-n, transmitter 3-n, extraction section 2-n, and antenna element 1-n each constitute one transmission system. Configure. That is, the array antenna system according to the first embodiment has N transmission systems.
  • a calibration signal generation section 30, a phase control section 40, a power combining section 50, a calibration signal receiver 60, a power measurement section 70, a phase control instruction section 80, a calibration signal phase offset section 90 , and the calibration signal analysis section 100 constitute a calibration signal system.
  • the signal processing unit 20 is a component for generating a transmission signal of the array antenna system.
  • the transmission signal may be a digitally modulated signal obtained by modulating a baseband signal.
  • transmission signal is used to collectively refer to a baseband signal and a digital modulated signal obtained by modulating the baseband signal.
  • the DBF unit 10 is a component for performing digital beamforming on transmission signals.
  • the DBF section 10 distributes the baseband signal to N systems.
  • the DBF unit 10 adjusts the amplitude and phase of each of the N distributed baseband signals in order to implement digital beamforming.
  • the baseband signal whose amplitude and phase have been adjusted is sent to the transmitter 3-n via the injection section 4-n.
  • the injection unit 4-n is a component for injecting a later-described calibration signal into the transmission system. Details of the injection section 4 will become clear from the description below.
  • the transmitter 3-n is a component for modulating a digital baseband signal into an analog RF band (Radio Frequency band) signal.
  • the analog RF band transmission signal modulated by the transmitter 3-n is sent to the antenna element 1-n via the extractor 2-n.
  • the analog RF band transmission signal is sometimes referred to as a data signal or a communication signal.
  • the extraction unit 2-n is a component for extracting a part of the signal flowing through the transmission system.
  • the signal extracted by the extraction unit 2-n is referred to as an "extracted signal.”
  • the antenna elements 1-n are components for radiating an RF band transmission signal into space.
  • the antenna elements 1-n are arranged in an array.
  • antenna elements 1 in an array antenna system are often arranged at regular positions at equal intervals.
  • the calibration signal generation section 30 is a component for generating a calibration signal.
  • the calibration signal generation section 30 can generate a calibration signal having an arbitrary symbol pattern.
  • symbol pattern is synonymous with the symbol pattern used in, for example, Japanese Patent Application Publication No. 2001-332925.
  • the calibration signal generated by the calibration signal generation unit 30 may be a chirp pulse signal in which up chirps and down chirps appear randomly when viewed on the time axis.
  • a different calibration signal consisting of a combination of up chirp and down chirp is used for each transmission system, that is, a different combination of up chirp and down chirp is used.
  • the calibration signal generated by the calibration signal generation section 30 is injected into the transmission system via the injection section 4-n.
  • phase control section 40 in the calibration signal system>>
  • the phase control section 40 is a component for controlling the phase of each of the extraction signals extracted by the extraction section 2-n.
  • the phase control unit 40 determines and controls a phase such that the components of the transmission signal are canceled when the extracted signals extracted by the extraction unit 2 are combined by a power combining unit 50 (described later). do.
  • the details of the phase amount controlled by the phase control section 40 will become clear from the explanation below.
  • the N signals whose phases have been controlled by the phase control section 40 are sent to the power combining section 50.
  • the power combining unit 50 is a component for combining N signals sent from the phase control unit 40.
  • the signals combined by the power combining section 50 are sent to the calibration signal receiver 60.
  • the calibration signal receiver 60 is a component for detecting the signal sent from the power combining section 50.
  • the term “detect” means extracting a baseband signal from a modulated wave, that is, demodulating it.
  • the signal detected by the calibration signal receiver 60 is sent to the power measurement section 70 and the calibration signal analysis section 100.
  • the power measurement unit 70 is a component for measuring the amount of power of the signal sent from the calibration signal receiver 60.
  • the above-mentioned phase control section 40 cooperates with the power measurement section 70 to determine the amount of phase to be controlled.
  • Cooperation between the phase control section 40 and the power measurement section 70 is realized by instructions from the phase control instruction section 80.
  • the phase control unit 40 gradually changes the amount of phase to be controlled, refers to the amount of power measured by the power measurement unit 70, and searches for the amount of phase that minimizes this amount of power.
  • the mode of operation in which the phase control unit 40 searches for the phase amount that minimizes the amount of electric power will be referred to as a search mode.
  • phase control instruction section 80 in the calibration signal system>> The phase control instruction section 80 is a component for issuing instructions for realizing cooperation between the phase control section 40 and the power measurement section 70.
  • the phase control instruction section 80 is also a component for storing the phase amount that minimizes the amount of electric power and for instructing the calibration signal phase offset section 90 to use this phase amount.
  • the phase control instruction section 80 instructs the phase control section 40 to cancel the search mode and perform control using this phase amount from now on.
  • the mode of operation in which the phase control unit 40 performs control while fixing the amount of power to the phase amount that minimizes the amount of power will be referred to as a fixed mode.
  • the array antenna system uses a loop consisting of the phase control section 40, the power combining section 50, the calibration signal receiver 60, the power measurement section 70, and the phase control instruction section 80.
  • the treatment is carried out at least once.
  • the calibration signal phase offset section 90 is a component for offsetting the phase of the calibration signal generated by the calibration signal generation section 30 by the phase amount instructed by the phase control instruction section 80 (offsetting adjustment). .
  • the calibration signal whose phase has been offset (cancellation adjustment) by the calibration signal phase offset unit 90 is sent to the calibration signal analysis unit 100.
  • the calibration signal analysis unit 100 is a component for extracting the calibration signal that has passed through the transmission system and calculating a relative amplitude and phase error (hereinafter referred to as "relative amplitude and phase error").
  • the calibration signal analysis unit 100 preferably calculates the correlation between signals in order to calculate the relative amplitude phase error.
  • the relative amplitude phase error calculated by the calibration signal analysis section 100 is sent to the DBF section 10.
  • the DBF unit 10 corrects the beamforming design values so as to cancel the relative amplitude and phase errors.
  • FIG. 2 is a first diagram showing the hardware configuration of a part of the array antenna system according to the first embodiment.
  • FIG. 3 is a second diagram showing a partial hardware configuration of the array antenna system according to the first embodiment.
  • Transmitter 3 injection unit 4, DBF unit 10, signal processing unit 20, calibration signal generation unit 30, calibration signal receiver 60, power measurement unit 70, phase control instruction unit 80, calibration signal phase offset unit 90 in the array antenna system , and the calibration signal analysis section 100 are realized by a processing circuit.
  • the processing circuit is dedicated hardware, it is also called a CPU (Central Processing Unit, central processing unit, processing unit, arithmetic unit, microprocessor, microcomputer, processor, DSP) that executes a program stored in memory. ), it doesn't matter.
  • CPU Central Processing Unit, central processing unit, processing unit, arithmetic unit, microprocessor, microcomputer, processor, DSP
  • FIG. 2 is a diagram in the case of a processing circuit 500 in which the processing circuit is dedicated hardware.
  • Processing circuit 500 may be, for example, a single circuit, a composite circuit, a programmed processor, a parallel program processor, an ASIC, an FPGA, or a combination thereof.
  • Transmitter 3 injection section 4, DBF section 10, signal processing section 20, calibration signal generation section 30, calibration signal receiver 60, power measurement section 70, phase control instruction section 80, calibration signal phase offset section 90, and calibration signal
  • Each function of the analysis section 100 may be realized individually by the processing circuit 500, or may be realized collectively by one processing circuit 500.
  • FIG. 3 is a diagram when the processing circuit is the CPU 502.
  • the processing circuit is the CPU 502
  • each of the above functions is realized by software, firmware, or a combination of software and firmware.
  • Software and firmware are written as programs and stored in memory 504.
  • the CPU 502 realizes the functions of each section by reading and executing programs stored in the memory 504. That is, the array antenna system includes a memory 504 for storing a program that, when executed by the processing circuitry, results in the execution of each processing step of the array antenna system. It can also be said that these programs cause a computer to execute the procedures and methods of the array antenna system.
  • the memory 504 may be a non-volatile or volatile semiconductor memory such as RAM, ROM, flash memory, EPROM, EEPROM, etc., for example. Further, the memory 504 may have a structure including a disk such as a magnetic disk, a flexible disk, an optical disk, a compact disk, a mini disk, a DVD, or the like. Furthermore, the memory 504 may be in the form of an HDD or an SSD.
  • the processing circuit can realize each of the above functions using hardware, software, firmware, or a combination thereof.
  • FIG. 4 is a flowchart showing processing steps of the array antenna system according to the first embodiment.
  • the processing steps of the array antenna system according to the first embodiment are mainly composed of three phases.
  • the first phase includes calibration signal generation ST11, calibration signal injection ST12, and calibration signal extraction ST13.
  • the second phase is a portion surrounded by a broken line frame labeled "P101" in FIG. 4, and is referred to as a "phase setting value search phase.”
  • the phase setting value search phase corresponds to the search mode of the phase control section 40 described above.
  • the phase setting value search phase includes phase setting ST21, calibration signal synthesis ST22, calibration signal detection ST23, signal power measurement ST24, and confirmation of the number of changes of the phase setting value ST25.
  • the third phase is a portion surrounded by a broken line frame labeled "P102" in FIG. 4, and is referred to as a "calibration phase.”
  • the phase control section 40 is in fixed mode.
  • the calibration phase includes phase setting value calculation ST41, phase setting ST42, calibration signal synthesis ST43, calibration signal detection ST44, relative amplitude phase error calculation ST45, calibration value calculation ST47, and transmission signal correction. ST48.
  • Calibration signal generation ST11 is a processing step performed by the calibration signal generation section 30.
  • Generation of a calibration signal In ST11 the calibration signal generation section 30 generates a calibration signal according to a pre-designed specification.
  • the calibration signal may be, for example, a modulation signal that implements phase modulation. More preferably, the calibration signals are N modulation signals that are injected into the N transmission systems and have low correlation in the time axis direction, that is, high orthogonality.
  • the calibration signal injection ST12 is a processing step performed by the calibration signal generation section 30.
  • the calibration signal generation unit 30 injects N calibration signals into the injection units 4-1, 4-2, . . . , injection units 4-N of the corresponding transmission systems, respectively.
  • each function of the calibration signal generation section 30 and the injection section 4 may be realized by the CPU 502. That is, the injection of N calibration signals may be performed by digital processing within the CPU 502 without using physical means. In other words, the N calibration signals can be injected by performing addition processing of the transmission signal and the calibration signal in each transmission system.
  • Each function of the injection section 4-1, injection section 4-2, ..., injection section 4-N can be performed by physical means without using physical means such as a switch or a directional coupler (coupler). This eliminates the negative effects of distortion, noise, etc. inherent in
  • Extraction of the calibration signal ST13 is a processing step performed by the extraction section 2-1, the extraction section 2-2, . . . , the extraction section 2-N.
  • each of the extraction sections 2-1, 2-2, . . . , 2-N extracts a part of the signal flowing through the transmission system as an extraction signal.
  • the extracted signal includes a transmission signal and a calibration signal.
  • the signals extracted by the extraction section 2-1, the extraction section 2-2, . . . , the extraction section 2-N are analog signals in the RF band. Unlike baseband signals, RF band analog signals have too high a frequency band to be sampled and digitally processed, making it impractical. Therefore, each function of the extracting section 2-1, the extracting section 2-2, . . . , the extracting section 2-N may be realized by physical means such as a directional coupler and a switch.
  • phase setting ST21 in the phase setting value search phase (P101) is a processing step performed by the phase control unit 40 in the search mode.
  • the phase control section 40 gradually changes the phase amount for each of the RF band analog signals extracted by the extraction section 2-1, extraction section 2-2, ..., extraction section 2-N. and control the phase.
  • the phase control by the phase control section 40 may be realized by an analog or digital phase shifter. Only one phase shifter may be provided to switch the system, or N phase shifters may be provided for each system.
  • the calibration signal synthesis ST22 in the phase setting value search phase (P101) is a processing step performed by the power synthesis section 50.
  • the power combining section 50 combines the N signals sent from the phase control section 40.
  • the power combining unit 50 is realized by, for example, hardware such as a power combiner.
  • Detection ST23 of the calibration signal in the phase setting value search phase (P101) is a processing step performed by the calibration signal receiver 60.
  • the calibration signal receiver 60 demodulates the signal sent from the power combining section 50 and extracts a baseband signal. Note that the baseband signal extracted in the calibration signal detection ST23 is a digital signal.
  • Signal power measurement ST24 in the phase setting value search phase (P101) is a processing step performed by the power measurement unit 70.
  • Signal Power Measurement In ST24 the power measurement unit 70 measures the amount of power of the signal sent from the calibration signal receiver 60.
  • the confirmation ST25 of the number of changes in the phase setting value in the phase setting value search phase (P101) is a processing step performed by the phase control instruction section 80.
  • the phase control instruction unit 80 In confirmation ST25 of the number of changes in the phase setting value, the phase control instruction unit 80 at least temporarily updates the amount of phase changed by the phase control unit 40, the amount of power measured by the power measurement unit 70, and the correspondence between them.
  • the phase control instruction section 80 issues an instruction for realizing cooperation between the phase control section 40 and the power measurement section 70.
  • the phase control instruction section 80 checks the number of changes in the phase setting value, and confirms whether the search mode of the phase control section 40 has ended.
  • the phase amount to be changed in the phase control unit 40 may be realized by, for example, an N-fold For statement (For Loop) that incorporates nesting.
  • N-fold For statement the first For statement from the inside changes the phase amount in steps from 0 degrees to 360 degrees with respect to the first analog signal extracted from the extraction unit 2-1. .
  • the second For statement from the inside changes the phase amount of the second analog signal extracted from the extraction unit 2-2 in steps from 0 degrees to 360 degrees.
  • the phase amount is changed in steps using the Nth For statement from the inside.
  • the phase amount changed by the phase control section 40 may be realized in this manner, for example.
  • the phase control instruction unit 80 checks whether the number of changes is less than or greater than K ⁇ N.
  • the phase control instruction unit 80 determines whether the power measurement unit 70 has completed measuring the electric energy for one of the N combinations of phase amounts corresponding to the N analog signals. , instructs the phase control unit 40 to control to the next combination of phase amounts. In other words, the phase control instruction unit 80 plays the role of a “Next” command for the N-fold For statements executed by the phase control unit 40 described above.
  • Phase setting value calculation ST41 in the calibration phase (P102) is a processing step performed by the phase control instruction section 80.
  • the phase control instruction unit 80 calculates an estimated value of the phase amount that minimizes the amount of power from the temporarily stored correspondence relationship between the phase amount and the amount of power of the K ⁇ N combination. do.
  • the amount of power the magnitude of the combined electric field
  • the phase control instruction unit 80 calculates a plausible What is necessary is to calculate a theoretical sine wave and obtain an estimated value of the phase amount that minimizes the amount of power.
  • phase setting ST42 in the calibration phase (P102) is a processing step performed by the phase control instruction section 80.
  • the phase control instruction section 80 instructs the phase control section 40 to control the phase shifter using the estimated value of the phase amount that minimizes the amount of power.
  • phase setting value the phase amount instructed to the phase control unit 40 will be expressed by the term "phase setting value.”
  • the phase control unit 40 to which the phase setting value is instructed controls the phase shifter in a fixed mode.
  • the calibration signal synthesis ST43 in the calibration phase (P102) is a processing step performed by the power combining section 50.
  • the power combining section 50 combines the N signals sent from the phase control section 40.
  • Detection ST44 of the calibration signal in the calibration phase is a processing step performed by the calibration signal receiver 60.
  • the calibration signal receiver 60 demodulates the signal sent from the power combining section 50 and extracts a baseband signal that is a digital signal.
  • phase setting ST42, calibration signal synthesis ST43, and calibration signal detection ST44 in the calibration phase are the same as those in the phase setting value search phase (P101), except for the phase amount controlled by the phase control section 40.
  • the contents are the same as those of setting ST21, calibration signal synthesis ST22, and calibration signal detection ST23.
  • Calculating the relative amplitude phase error ST45 in the calibration phase is a processing step performed by the calibration signal analysis section 100.
  • the calibration signal analysis unit 100 refers to the calibration signal generated by the calibration signal generation unit 30 with respect to the baseband signal demodulated by the calibration signal receiver 60 in calibration signal detection ST44.
  • the signal is subjected to processing for determining correlation (hereinafter simply referred to as "correlation processing").
  • the correlation process may be performed in the frequency domain or in the time domain. If the calibration signal is a combination of up-chirp and down-chirp, the correlation process may be pulse compression.
  • the calibration signal used as a reference signal by the calibration signal analysis section 100 in relative amplitude phase error calculation ST45 passes through the calibration signal phase offset section 90.
  • Calculation of Relative Amplitude Phase Error The calibration signal used as a reference signal by the calibration signal analysis section 100 in ST45 has its phase offset (cancellation adjustment) by the phase setting value by the calibration signal phase offset section 90.
  • the calibration signal analysis section 100 extracts the calibration signal that has passed through each transmission system. Further, in relative amplitude phase error calculation ST45, the calibration signal analysis section 100 calculates a relative amplitude phase error (hereinafter simply referred to as "amplitude phase error") based on the extracted calibration signal.
  • the amplitude phase error is an index indicating the variation in characteristics among the N transmission systems.
  • Calibration value calculation ST47 in the calibration phase (P102) is a processing step performed by the calibration signal analysis section 100. Calculating Calibration Values In ST47, the calibration signal analysis unit 100 calculates calibration values for amplitude and phase (hereinafter referred to as "amplitude phase calibration values") that cancel the calculated amplitude and phase errors.
  • Correction ST48 of the transmission signal in the calibration phase (P102) is a processing step performed by the DBF section 10. Correcting the transmitted signal In ST48, the DBF section 10 corrects the transmitted signal using the amplitude phase calibration value. The processing in the calibration phase (P102) is completed with correction ST48 of the transmitted signal as the last processing step.
  • the array antenna system according to the present disclosure may perform the series of processes shown in FIG. 4 periodically or may perform the series of processes shown in FIG. 4 depending on the situation where calibration is required.
  • the method for calibrating an array antenna system according to the disclosed technology can be used for adjustment before shipping the array antenna system, daily maintenance during operation after the array antenna system is installed, and periodic maintenance. It can be used in various situations such as regular maintenance.
  • Embodiment 2 The method for calibrating an array antenna system according to the second embodiment is a modification of the method for calibrating an array antenna system according to the presently disclosed technology.
  • the symbols used in the second embodiment are the same as those used in the first embodiment, unless otherwise specified. In the second embodiment, explanations that overlap with those in the first embodiment will be omitted as appropriate.
  • the phase control unit 40 in the search mode changes the phase amount in steps from 0 degrees to 360 degrees.
  • a solution of the phase amount is searched within the range
  • the disclosed technology is not limited thereto. If there is a solution candidate that minimizes the amount of power, the search for the phase amount may be performed in the vicinity of the solution candidate. Further, in the search for the phase amount, if there is a solution candidate that minimizes the amount of power, the amount of power may be measured by changing the neighborhood of the solution candidate in small steps.
  • the phase setting value obtained in the most recent calibration may be used as a candidate for the solution that minimizes the amount of power.
  • the array antenna system according to the second embodiment may store the phase setting value obtained in the calibration before shipping in the memory 504 as a candidate for the solution that minimizes the amount of power.
  • the array antenna system calibration method uses the phase setting value obtained in the most recent calibration as a solution candidate.
  • the effect shown in 1 is achieved.
  • Embodiment 3 The array antenna system and the method for calibrating an array antenna system according to the third embodiment are modified examples of the array antenna system and the method for calibrating the array antenna system according to the presently disclosed technology.
  • the symbols used in the third embodiment are the same as those used in the previously described embodiments, unless otherwise specified. In Embodiment 3, explanations that overlap with those of the previously described embodiments will be omitted as appropriate.
  • FIG. 5 is a block diagram showing the functional configuration of the array antenna system according to the third embodiment.
  • the disclosed technology can also be applied to an array antenna system that does not include the power measurement unit 70.
  • information from the DBF section 10 is sent to the phase control instruction section 80.
  • the configuration of the array antenna system according to the third embodiment is the same as the configuration of the array antenna system shown in the previous embodiments.
  • the method of calibrating the array antenna system according to the third embodiment is not intended to perform large-scale calibration, but to cope with small changes in characteristics due to aging.
  • the method for calibrating the array antenna system according to the third embodiment is based on the premise that the transmission system has been calibrated in the pre-shipment adjustment.
  • the disclosed technology is based on the principle that the influence on input/output characteristics due to secular change (aging deterioration) of each element of a transmission system is not large enough to require extensive calibration.
  • the method for calibrating the array antenna system according to the third embodiment is to stop the phase amount based on the magnitude of the measured composite electric field and use a fixed phase setting value.
  • switching from a phase amount based on the magnitude of the measured composite electric field to a fixed phase setting value will be referred to by the term "fixed setting value switching.”
  • the amplitude and phase for correcting the n-th transmission system are represented by a complex number W n .
  • the corrected phase amount ( ⁇ n ) expressed by the following equation is corrected.
  • arg( ) of the first term on the right side of equation (1) represents a function that calculates the argument of a complex number that is an argument.
  • the first term on the right side is a term that cancels the phase amount based on the magnitude of the composite electric field measured during pre-shipment adjustment
  • the second term on the right side is a term related to the fixed phase setting value. This is an example.
  • beamforming is a technique for directing radio waves of an array antenna system in a certain direction. Beamforming can be applied whether the array antenna is used as a transmit antenna or the array antenna is used as a receive antenna. Beamforming is based on the fact that radio waves have wave properties. Specifically, radio waves, which are a type of wave, have the property that when waves of the same phase are multiplied together, they are strengthened, and when waves of opposite phases are multiplied together, they are canceled out. Beamforming actively utilizes the properties of these waves. In beamforming, how to design the phase of each transmission system in an array antenna system depends on what spacing (d) and manner the antenna elements 1 are arranged, and in which direction the radio waves of the array antenna system are directed. It depends on whether you want it to be oriented towards. The disclosed technology is not limited to the value shown in the second term on the right side of equation (1), and may use a phase setting value designed by beamforming.
  • FIG. 6 is a flowchart showing the processing steps of the array antenna system according to the third embodiment.
  • the processing steps of the array antenna system according to the third embodiment include generation of a calibration signal ST11, injection of the calibration signal ST12, extraction of the calibration signal ST13, phase setting ST42, and synthesis of the calibration signal.
  • Phase setting ST42 is a processing step executed by the phase control instruction section 80.
  • the phase control instruction section 80 instructs the phase control section 40 to modify the phase amount ( ⁇ n ) when switching the fixed set value.
  • the corrected phase amount ( ⁇ n ) is, for example, as shown in Equation (1), and may be determined depending on the purpose of digital beamforming performed by the DBF unit 10.
  • the phase control section 40 controls the phase shifter based on instructions from the phase control instruction section 80.
  • calibration signal synthesis ST43 calibration signal detection ST44, relative amplitude phase error calculation ST45, calibration value calculation ST47, and transmission signal correction ST48 according to the third embodiment are the same as those of the first embodiment.
  • the contents are the same as those shown in .
  • the method for calibrating the array antenna system according to the third embodiment includes the processing step of switching the fixed setting value, so that the calibration value is switched from the calibration value based on the magnitude of the composite electric field measured during pre-shipment adjustment to the fixed setting value. This has the effect of being able to cope with small changes in characteristics due to aging.
  • Embodiment 4 The array antenna system and the method for calibrating an array antenna system according to Embodiment 4 are modified examples of the array antenna system and the method for calibrating an array antenna system according to the presently disclosed technology.
  • the symbols used in the fourth embodiment are the same as those used in the previously described embodiments, unless otherwise specified. In Embodiment 4, explanations that overlap with those of the previously described embodiments will be omitted as appropriate.
  • FIG. 7 is a block diagram showing the functional configuration of the array antenna system according to the fourth embodiment.
  • the array antenna system according to the fourth embodiment includes a Butler matrix circuit 110, a route selection unit 120, and a route selection unit instead of the phase control unit 40, the power combining unit 50, and the phase control instruction unit 80.
  • An instruction section 130 is provided. Butler matrix circuit 110, route selection section 120, and route selection instruction section 130 are connected as shown in FIG.
  • Butler Matrix refers to a network for beamforming of an array antenna system.
  • a Butler matrix is composed of hybrid couplers arranged in an m ⁇ m matrix and a fixed phase shifter that shifts a fixed phase amount.
  • m is generally a number that is a power of 2.
  • Butler matrix circuit 110 is a circuit consisting of a hybrid circuit, a fixed phase shifter, and a coupler. Butler matrix circuit 110 has at least N input ports and at least N output ports. As shown in FIG. 7, the input ports of the Butler matrix circuit 110 receive the signals extracted by the extracting section 2-1, the extracting section 2-2, ..., the extracting section 2-N, that is, the transmission signal and the calibration signal. A signal on which is superimposed is input. Butler matrix circuit 110 combines signals input from input ports using a plurality of phase shift settings, and outputs each signal to a different output port.
  • the path selection unit 120 is a component that functions as a switch that switches the output ports of the Butler matrix circuit 110.
  • the route selection instruction unit 130 is a component for giving instructions to the route selection unit 120.
  • the route selection instruction section 130 is a component that plays the same role as the phase control instruction section 80 in the previously described embodiment.
  • the functions of the route selection instruction section 130 are realized by the processing circuit shown in FIG. 2 or 3.
  • FIG. 8 is a flowchart showing the processing steps of the array antenna system according to the fourth embodiment.
  • the processing steps of the array antenna system according to the fourth embodiment are also roughly composed of three phases.
  • the first phase includes calibration signal generation ST11, calibration signal injection ST12, and calibration signal extraction ST13.
  • the first phase according to the fourth embodiment has the same content as that shown in the first embodiment.
  • the second phase is a portion surrounded by a broken line frame labeled "P401" in FIG. 8, and is a phase setting value search phase.
  • the phase setting value search phase includes path setting ST31, calibration signal detection ST32, signal power measurement ST33, and confirmation of the number of path switching times ST34.
  • the third phase is a portion surrounded by a broken line frame labeled "P402" in FIG. 8, and is a calibration phase.
  • the calibration phase includes determining a route that minimizes power ST51, setting a route ST52, detecting a calibration signal ST53, calculating a relative amplitude phase error ST54, calculating a calibration value ST55, and correcting a transmission signal ST56. include.
  • Route setting ST31 in the phase setting value search phase is a processing step performed by the route selection unit 120 under the direction of the route selection instruction unit 130.
  • the route selection section 120 connects one of the output ports of the Butler matrix circuit 110 to the calibration signal receiver 60.
  • the operation here corresponds to the operation of the phase control section 40 in the search mode.
  • Detection ST32 of the calibration signal in the phase setting value search phase (P401) is a processing step performed by the calibration signal receiver 60.
  • the calibration signal detection ST32 in the phase setting value search phase (P401) has the same contents as the calibration signal detection ST23 in the phase setting value search phase (P101) shown in the first embodiment.
  • Signal power measurement ST33 in the phase setting value search phase (P401) is a processing step performed by the power measurement unit 70.
  • Signal power measurement ST33 in the phase setting value search phase (P401) has the same content as signal power measurement ST24 in the phase setting value search phase (P101) shown in the first embodiment.
  • Confirmation ST34 of the number of route switching in the phase setting value search phase (P401) is a processing step performed by the route selection instruction section 130.
  • the content of the process performed by the route selection instructing unit 130 in confirming the number of route switching times ST34 is the same as the content of the process performed by the phase control instructing unit 80 in confirming the number of changes of the phase setting value ST25 shown in Embodiment 1. .
  • the route determination ST51 in which the power in the calibration phase (P402) is minimized is a processing step performed by the route selection instruction unit 130.
  • the route selection instruction unit 130 determines the route that minimizes the power, based on the correspondence between the output port information obtained in the phase setting value search phase (P401) and the measured power.
  • the output port of Butler matrix circuit 110 that outputs the signal is specified.
  • Route setting ST52 in the calibration phase is a processing step performed by the route selection instruction section 130.
  • the route selection instruction section 130 instructs the route selection section 120 to select the output port specified in route determination ST51 that has the minimum power.
  • the subsequent operation mode of route selection instruction section 130 corresponds to the fixed mode shown in the first embodiment.
  • Detection ST53 of the calibration signal in the calibration phase is a processing step performed by the calibration signal receiver 60.
  • the calibration signal detection ST53 in the calibration phase (P402) has the same content as the calibration signal detection ST44 in the calibration phase (P102) shown in the first embodiment.
  • Relative amplitude phase error calculation ST54, calibration value calculation ST55, and transmission signal correction ST56 in the calibration phase are the relative amplitude phase error calculation ST45 in the calibration phase (P102) shown in Embodiment 1, The contents are the same as the calibration value calculation ST47 and the transmission signal correction ST48.
  • the disclosed technology can also be applied to a method of calibrating an array antenna system that uses the Butler matrix circuit 110 instead of a phase shifter.
  • Embodiment 5 The array antenna system and the method for calibrating an array antenna system according to the fifth embodiment are modified examples of the array antenna system and the method for calibrating the array antenna system according to the presently disclosed technology.
  • the symbols used in the fifth embodiment are the same as those used in the previously described embodiments, unless otherwise specified. In the fifth embodiment, explanations that overlap with those of the previously described embodiments will be omitted as appropriate.
  • FIG. 9 is a block diagram showing the functional configuration of the array antenna system according to the fifth embodiment. As shown in FIG. 9, the array antenna system according to the present disclosure may include a delay correction section 140.
  • the delay correction unit 140 is a component for correcting variations in characteristics between transmission systems not in units of signal phase but in units of direct time.
  • the function of the delay correction section 140 is realized by the processing circuit shown in FIG. 2 or 3.
  • FIG. 10 is a flowchart showing the processing steps of the array antenna system according to the fifth embodiment.
  • the processing steps of the array antenna system according to the fifth embodiment include calculation ST46 of a relative delay difference in addition to the processing steps of the array antenna system according to the first embodiment shown in FIG.
  • Relative delay difference calculation ST46 is a processing step in the calibration phase (P502), and is a processing step executed after relative amplitude phase error calculation ST45.
  • Calculating the relative delay difference ST46 in the calibration phase is a processing step performed by the delay correction unit 140.
  • Calculation of Relative Delay Difference In ST46 the delay correction section 140 compares the calibration signals of each transmission system in the time domain and calculates a relative time delay amount.
  • Calibration value calculation ST47 in the calibration phase is a processing step performed by the calibration signal analysis section 100.
  • the calibration signal analysis section 100 calculates, in addition to the amplitude phase calibration value, a calibration value for time for canceling the relative time delay amount (hereinafter referred to as "time calibration value"). ) is also calculated.
  • Correction ST48 of the transmission signal in the calibration phase is a processing step performed by the DBF unit 10.
  • the DBF section 10 corrects the transmission signal using the amplitude phase calibration value and the time calibration value.
  • the disclosed technology can correct variations in characteristics between transmission systems not in units of signal phase but in direct units of time.
  • Embodiment 6 The array antenna system and the method for calibrating the array antenna system according to the sixth embodiment are modifications of the array antenna system and the method for calibrating the array antenna system according to the presently disclosed technology.
  • the symbols used in the sixth embodiment are the same as those used in the previously described embodiments, unless otherwise specified. In the sixth embodiment, descriptions that overlap with those of the previously described embodiments will be omitted as appropriate.
  • FIG. 11 is a block diagram showing the functional configuration of an array antenna system according to Embodiment 6.
  • the array antenna system according to the present disclosure may include a calibration trigger instruction section 150.
  • the calibration trigger instruction section 150 is connected to acquire information from the power measurement section 70 and issue an instruction to the calibration signal generation section 30.
  • the calibration trigger instruction unit 150 is a component for outputting a trigger when it is determined to start a new calibration.
  • the functions of the calibration trigger instruction section 150 are realized by the processing circuit shown in FIG. 2 or 3.
  • FIG. 12 is a flowchart showing the processing steps of the array antenna system according to the sixth embodiment.
  • the processing steps of the array antenna system according to the sixth embodiment include, in addition to the processing steps of the array antenna system according to the first embodiment shown in FIG. Confirmation ST02 is included.
  • a portion surrounded by a broken line frame labeled "P601" is referred to as a "calibration implementation determination phase.”
  • the processing steps of signal power measurement ST01 and power value confirmation ST02 added in the sixth embodiment are included in the calibration implementation determination phase.
  • Signal power measurement ST01 in the calibration implementation determination phase is a processing step performed by the power measurement unit 70.
  • Signal Power Measurement In ST01 the power measurement unit 70 measures the amount of power of the signal sent from the calibration signal receiver 60.
  • the power value confirmation ST02 in the calibration execution determination phase (P601) is a processing step executed by the calibration trigger instruction section 150.
  • the calibration trigger instruction section 150 determines whether the amount of power measured by the power measurement section 70 is less than a preset threshold. If the amount of power measured by the power measuring unit 70 is less than the preset threshold (in the case of YES), the processing step proceeds to calibration signal generation ST11. If the power amount measured by the power measurement unit 70 is not below the preset threshold (NO), the processing step returns to signal power measurement ST01.
  • FIG. 13 is a graph showing a time-series change in the amount of electric power to be measured, and is used to explain the timing to start a new calibration.
  • the horizontal axis represents time
  • the vertical axis represents the amount of power measured by the power measurement unit 70, respectively.
  • the broken line labeled "Threshold Power” represents the threshold value of the amount of power used by the calibration trigger instruction section 150.
  • the arrow labeled "Calibration Trigger” represents the timing at which the calibration trigger instruction section 150 outputs a trigger.
  • the array antenna system according to the sixth embodiment includes the calibration trigger instruction section 150, the magnitude of the combined electric field can be compared with a threshold value, and it can be determined to start a new calibration.
  • the array antenna system and the method for calibrating the array antenna system according to the disclosed technology are not limited to the aspects exemplified in each embodiment, but may be performed by combining each embodiment or using any component of each of the embodiments. Any component may be modified or omitted in each of the embodiments.
  • the array antenna system and the method for calibrating the array antenna system according to the presently disclosed technology can be applied to an adaptive array antenna system using the CDMA method in, for example, a cellular system such as a mobile phone, and has industrial applicability.

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Abstract

An array antenna system according to the technology of the present disclosure is provided with a plurality of transmission systems, and is provided with: a calibration signal generation unit (30) that generates a calibration signal; a phase control unit (40) that controls the phases of extraction signals each comprising a transmission signal extracted from the transmission system and the calibration signal; a power synthesis unit (50) that synthesizes a plurality of signals the phases of which are controlled by the phase control unit (40); a calibration signal receiver (60) that modulates a signal synthesized by the power synthesis unit (50); a power measurement unit (70) that measures the power of the signal modulated by the calibration signal receiver (60); and a phase control indication unit (80) that, on the basis of the measured value of the power measured by the power measurement unit (70), indicates a phase amount to be controlled to the phase control unit (40).

Description

アレーアンテナシステム、及びアレーアンテナシステムの校正方法Array antenna system and calibration method for array antenna system
 本開示技術はアレーアンテナシステム、及びアレーアンテナシステムの校正方法に関する。 The disclosed technology relates to an array antenna system and a method for calibrating the array antenna system.
 通信システムの分野において、アレーアンテナシステムの技術が用いられている。例えば特許文献1には、通信システム用のアダプティブアレーアンテナシステムが開示されている。また特許文献1には、アダプティブアレーアンテナシステムの位相キャリブレーション方法が開示されている。
 特許文献1に示される位相キャリブレーション方法は、主信号(本開示技術の「送信信号」に相当)にキャリブレーション信号(本開示技術の「校正信号」に相当)を挿入して所定の回路に入力し、該回路の出力信号に含まれるキャリブレーション信号の位相変化に基づいて主信号の位相をキャリブレーションする、というものである。
In the field of communication systems, array antenna system technology is used. For example, Patent Document 1 discloses an adaptive array antenna system for communication systems. Further, Patent Document 1 discloses a phase calibration method for an adaptive array antenna system.
The phase calibration method shown in Patent Document 1 inserts a calibration signal (corresponding to the "calibration signal" in the disclosed technology) into a main signal (corresponds to the "transmission signal" in the disclosed technology) and inserts it into a predetermined circuit. The phase of the main signal is calibrated based on the phase change of the calibration signal included in the output signal of the circuit.
特開2005-286780号公報Japanese Patent Application Publication No. 2005-286780
 特許文献1に示された方法は、各送信系統のアナログ回路を通過させる前の送信信号の合成信号と、各送信系統のアナログ回路を通過後の送信信号の合成信号と、両者の差分を求める、というものである。特許文献1によれば、位相キャリブレータが、アナログ回路での位相変化の補正を行い、すなわちアナログ回路での位相特性と逆特性の位相補正を行って、アレーアンテナにおいて結果的に位相がそろうように制御する、とある。
 ただし特許文献1は、各送信系統のアナログ回路の振幅位相特性をどのようにして効率的に求めるかについて、詳細には開示していない。さらに言えば特許文献1は、アレーアンテナシステムが有する送信系統を同時に校正する方法については言及していない。
The method shown in Patent Document 1 calculates the difference between a composite signal of the transmission signals before passing through the analog circuits of each transmission system and a composite signal of the transmission signals after passing through the analog circuits of each transmission system. . According to Patent Document 1, a phase calibrator corrects a phase change in an analog circuit, that is, corrects a phase characteristic opposite to the phase characteristic in the analog circuit, so that the phases of the array antenna are aligned as a result. It says to control.
However, Patent Document 1 does not disclose in detail how to efficiently obtain the amplitude phase characteristics of the analog circuits of each transmission system. Furthermore, Patent Document 1 does not mention a method of simultaneously calibrating the transmission systems included in the array antenna system.
 本開示技術は、特許文献1に例示される従来のアレーアンテナシステム及びアレーアンテナシステムの校正方法を改良するものである。より詳細に言えば本開示技術は、アレーアンテナシステムが有する全ての送信系統を、同時に校正することができるアレーアンテナシステム及びアレーアンテナシステムの校正方法を提供することを目的とする。 The disclosed technology improves the conventional array antenna system and the method of calibrating the array antenna system exemplified in Patent Document 1. More specifically, the present disclosure aims to provide an array antenna system and an array antenna system calibration method that can simultaneously calibrate all transmission systems included in the array antenna system.
 本開示技術に係るアレーアンテナシステムは、複数の送信系統を備えるアレーアンテナシステムであって、校正信号を生成する校正信号生成部と、送信系統から抽出した送信信号と校正信号とからなる抽出信号の位相を制御する位相制御部と、位相制御部で位相が制御された複数の信号を合成する電力合成部と、電力合成部で合成された信号を復調する校正信号受信機と、校正信号受信機で復調された信号の電力を計測する電力計測部と、電力計測部で計測された電力の計測値に基づいて、位相制御部に対して制御する位相量を指示する位相制御指示部と、を備える。 The array antenna system according to the disclosed technology is an array antenna system that includes a plurality of transmission systems, and includes a calibration signal generation section that generates a calibration signal, and an extraction signal that is composed of a transmission signal and a calibration signal extracted from the transmission system. A phase control section that controls the phase, a power synthesis section that synthesizes a plurality of signals whose phases have been controlled by the phase control section, a calibration signal receiver that demodulates the signal synthesized by the power synthesis section, and a calibration signal receiver. a power measurement unit that measures the power of the signal demodulated by the power measurement unit; and a phase control instruction unit that instructs the phase control unit to control the phase amount based on the power measurement value measured by the power measurement unit. Be prepared.
 本開示技術に係るアレーアンテナシステムは上記構成を備えるため、アレーアンテナシステムが有する全ての送信系統を、同時に校正することができる、という効果を奏する。 Since the array antenna system according to the disclosed technique has the above configuration, it has the effect that all transmission systems included in the array antenna system can be calibrated simultaneously.
図1は、実施の形態1に係るアレーアンテナシステムの機能構成を示すブロック図である。FIG. 1 is a block diagram showing the functional configuration of an array antenna system according to the first embodiment. 図2は、実施の形態1に係るアレーアンテナシステムの一部のハードウエア構成を示す図その1である。FIG. 2 is a first diagram showing the hardware configuration of a part of the array antenna system according to the first embodiment. 図3は、実施の形態1に係るアレーアンテナシステムの一部のハードウエア構成を示す図その2である。FIG. 3 is a second diagram showing a partial hardware configuration of the array antenna system according to the first embodiment. 図4は、実施の形態1に係るアレーアンテナシステムの処理ステップを示すフローチャートである。FIG. 4 is a flowchart showing processing steps of the array antenna system according to the first embodiment. 図5は、実施の形態3に係るアレーアンテナシステムの機能構成を示すブロック図である。FIG. 5 is a block diagram showing the functional configuration of the array antenna system according to the third embodiment. 図6は、実施の形態3に係るアレーアンテナシステムの処理ステップを示すフローチャートである。FIG. 6 is a flowchart showing the processing steps of the array antenna system according to the third embodiment. 図7は、実施の形態4に係るアレーアンテナシステムの機能構成を示すブロック図である。FIG. 7 is a block diagram showing the functional configuration of the array antenna system according to the fourth embodiment. 図8は、実施の形態4に係るアレーアンテナシステムの処理ステップを示すフローチャートである。FIG. 8 is a flowchart showing the processing steps of the array antenna system according to the fourth embodiment. 図9は、実施の形態5に係るアレーアンテナシステムの機能構成を示すブロック図である。FIG. 9 is a block diagram showing the functional configuration of the array antenna system according to the fifth embodiment. 図10は、実施の形態5に係るアレーアンテナシステムの処理ステップを示すフローチャートである。FIG. 10 is a flowchart showing the processing steps of the array antenna system according to the fifth embodiment. 図11は、実施の形態6に係るアレーアンテナシステムの機能構成を示すブロック図である。FIG. 11 is a block diagram showing the functional configuration of an array antenna system according to Embodiment 6. 図12は、実施の形態6に係るアレーアンテナシステムの処理ステップを示すフローチャートである。FIG. 12 is a flowchart showing the processing steps of the array antenna system according to the sixth embodiment. 図13は、計測する電力量の時系列変化を表したグラフであり、新たな校正を開始するタイミングを説明するものである。FIG. 13 is a graph showing a time-series change in the amount of electric power to be measured, and explains the timing to start a new calibration.
 本開示技術に係るアレーアンテナシステムの校正方法は、素子電界ベクトル回転法(REV法、Rotating Element Electric Field Vector Method)に基づく。素子電界ベクトル回転法は、フェーズドアレーの移相器の移相量を変化させたときの、合成電界の大きさの変化を測定するものである。合成電界の大きさは、移相量の変化に対して、正弦波を描くように変化することが知られている。 The method for calibrating the array antenna system according to the disclosed technology is based on the Rotating Element Electric Field Vector Method (REV method). The element electric field vector rotation method measures the change in the magnitude of the combined electric field when the amount of phase shift of a phase shifter of a phased array is changed. It is known that the magnitude of the combined electric field changes in a sinusoidal manner as the amount of phase shift changes.
実施の形態1.
 図1は、実施の形態1に係るアレーアンテナシステムの機能構成を示すブロック図である。図1に示されるとおり実施の形態1に係るアレーアンテナシステムは、アンテナ素子1と、抽出部2と、送信機3と、注入部4と、DBF部10と、信号処理部20と、校正信号生成部30と、位相制御部40と、電力合成部50と、校正信号受信機60と、電力計測部70と、位相制御指示部80と、校正信号位相オフセット部90と、校正信号解析部100と、を含む。
 図1に示されるとおりアンテナ素子1は複数あり、それぞれ1つずつを区別する場合は、アンテナ素子1-1、アンテナ素子1-2、…、アンテナ素子1-N、と表示する。Nは、アンテナ素子1の総数である。図1に示されるとおり抽出部2、送信機3、及び注入部4は、それぞれN個ある。抽出部2、送信機3、及び注入部4の、それぞれ1つずつを区別する場合は、符号の後ろに「-1」、「-2」、…、「-N」を付して表すものとする。nを1からNまでの自然数だとすると、信号処理部20、DBF部10、注入部4-n、送信機3-n、抽出部2-n、及びアンテナ素子1-nは、それぞれ1つの送信系統を構成する。すなわち実施の形態1に係るアレーアンテナシステムは、N個の送信系統を有する。
 実施の形態1に係るアレーアンテナシステムにおいて、校正信号生成部30、位相制御部40、電力合成部50、校正信号受信機60、電力計測部70、位相制御指示部80、校正信号位相オフセット部90、及び校正信号解析部100は、校正信号系統を構成する。
Embodiment 1.
FIG. 1 is a block diagram showing the functional configuration of an array antenna system according to the first embodiment. As shown in FIG. 1, the array antenna system according to the first embodiment includes an antenna element 1, an extraction section 2, a transmitter 3, an injection section 4, a DBF section 10, a signal processing section 20, and a calibration signal. Generation unit 30, phase control unit 40, power combining unit 50, calibration signal receiver 60, power measurement unit 70, phase control instruction unit 80, calibration signal phase offset unit 90, calibration signal analysis unit 100 and, including.
As shown in FIG. 1, there are a plurality of antenna elements 1, and when distinguishing one from another, they are expressed as antenna element 1-1, antenna element 1-2, . . . , antenna element 1-N. N is the total number of antenna elements 1. As shown in FIG. 1, there are N extraction units 2, N transmitters 3, and N injection units 4. When distinguishing each of the extraction unit 2, transmitter 3, and injection unit 4, indicate by adding "-1", "-2", ..., "-N" after the code. shall be. If n is a natural number from 1 to N, the signal processing section 20, DBF section 10, injection section 4-n, transmitter 3-n, extraction section 2-n, and antenna element 1-n each constitute one transmission system. Configure. That is, the array antenna system according to the first embodiment has N transmission systems.
In the array antenna system according to the first embodiment, a calibration signal generation section 30, a phase control section 40, a power combining section 50, a calibration signal receiver 60, a power measurement section 70, a phase control instruction section 80, a calibration signal phase offset section 90 , and the calibration signal analysis section 100 constitute a calibration signal system.
《送信系統における信号処理部20》
 信号処理部20は、アレーアンテナシステムの送信信号を生成するための構成要素である。送信信号は、ベースバンド信号を変調したデジタル変調信号であってよい。なお、本明細書において用語「送信信号」は、ベースバンド信号とベースバンド信号を変調して得られるデジタル変調信号とを総称する用語として用いるものとする。
<<Signal processing unit 20 in transmission system>>
The signal processing unit 20 is a component for generating a transmission signal of the array antenna system. The transmission signal may be a digitally modulated signal obtained by modulating a baseband signal. Note that in this specification, the term "transmission signal" is used to collectively refer to a baseband signal and a digital modulated signal obtained by modulating the baseband signal.
《送信系統におけるDBF部10》
 DBF部10は、送信信号をデジタルビームフォーミングするための構成要素である。
 DBF部10は、第1に、ベースバンド信号をN個の系統に分配する。
 DBF部10は、第2に、N個に分配されたベースバンド信号のそれぞれに対し、デジタルビームフォーミングを実現するため、振幅及び位相を調整する。振幅及び位相が調整されたベースバンド信号は、注入部4-nを介して、送信機3-nへ送られる。
<<DBF unit 10 in transmission system>>
The DBF unit 10 is a component for performing digital beamforming on transmission signals.
First, the DBF section 10 distributes the baseband signal to N systems.
Second, the DBF unit 10 adjusts the amplitude and phase of each of the N distributed baseband signals in order to implement digital beamforming. The baseband signal whose amplitude and phase have been adjusted is sent to the transmitter 3-n via the injection section 4-n.
《送信系統における注入部4》
 注入部4-nは、後述の校正信号を送信系統へ注入するための構成要素である。注入部4の詳細は、後述の説明により明らかになる。
Injection part 4 in the transmission system》
The injection unit 4-n is a component for injecting a later-described calibration signal into the transmission system. Details of the injection section 4 will become clear from the description below.
《送信系統における送信機3》
 送信機3-nは、デジタルのベースバンド信号を、アナログのRF帯域(Radio Frequency 帯域)の信号に変調するための構成要素である。
 送信機3-nで変調されたアナログのRF帯の送信信号は、抽出部2-nを介して、アンテナ素子1-nへ送られる。なお、アナログのRF帯の送信信号は、データ信号、又は通信信号と称されることがある。
Transmitter 3 in the transmission system》
The transmitter 3-n is a component for modulating a digital baseband signal into an analog RF band (Radio Frequency band) signal.
The analog RF band transmission signal modulated by the transmitter 3-n is sent to the antenna element 1-n via the extractor 2-n. Note that the analog RF band transmission signal is sometimes referred to as a data signal or a communication signal.
《送信系統における抽出部2》
 抽出部2-nは、送信系統を流れる信号の一部を抽出するための構成要素である。抽出部2-nで抽出された信号は、「抽出信号」と称する。
Extraction unit 2 in transmission system》
The extraction unit 2-n is a component for extracting a part of the signal flowing through the transmission system. The signal extracted by the extraction unit 2-n is referred to as an "extracted signal."
《送信系統におけるアンテナ素子1》
 アンテナ素子1-nは、RF帯の送信信号を、空間へ放射するための構成要素である。アンテナ素子1-nは、アレー状に配置される。一般的にアレーアンテナシステムにおけるアンテナ素子1は、等間隔の規則的な位置に配置されることが多い。
《Antenna element 1 in transmission system》
The antenna elements 1-n are components for radiating an RF band transmission signal into space. The antenna elements 1-n are arranged in an array. Generally, antenna elements 1 in an array antenna system are often arranged at regular positions at equal intervals.
《校正信号系統における校正信号生成部30》
 校正信号生成部30は、校正信号を生成するための構成要素である。校正信号生成部30は、任意のシンボルパターンを持つ校正信号を生成することができる。ここで、用語「シンボルパターン」は、例えば、特開2001-332925号公報で用いられているシンボルパターンと同義である。
 校正信号生成部30で生成される校正信号は、時間軸で見たときに、アップチャープとダウンチャープとがランダムに登場するチャープパルス信号であってよい。アップチャープとダウンチャープとを組み合わせて成る校正信号は、各送信系統では異なるもの、すなわちアップチャープとダウンチャープとの組合せが異なるもの、が使用される。
 校正信号生成部30で生成された校正信号は、注入部4-nを介して、送信系統へ注入される。
<<Calibration signal generation unit 30 in the calibration signal system>>
The calibration signal generation section 30 is a component for generating a calibration signal. The calibration signal generation section 30 can generate a calibration signal having an arbitrary symbol pattern. Here, the term "symbol pattern" is synonymous with the symbol pattern used in, for example, Japanese Patent Application Publication No. 2001-332925.
The calibration signal generated by the calibration signal generation unit 30 may be a chirp pulse signal in which up chirps and down chirps appear randomly when viewed on the time axis. A different calibration signal consisting of a combination of up chirp and down chirp is used for each transmission system, that is, a different combination of up chirp and down chirp is used.
The calibration signal generated by the calibration signal generation section 30 is injected into the transmission system via the injection section 4-n.
《校正信号系統における位相制御部40》
 位相制御部40は、抽出部2-nで抽出された抽出信号のそれぞれについて、位相を制御するための構成要素である。最終的に位相制御部40は、抽出部2で抽出された抽出信号を、後述の電力合成部50で合成したときに、送信信号の成分がキャンセル(相殺)されるような位相を求めて制御する。
位相制御部40で制御される位相量の詳細は、後述の説明により明らかとなる。
 位相制御部40で位相が制御されたN個の信号は、電力合成部50へ送られる。
<<Phase control unit 40 in the calibration signal system>>
The phase control section 40 is a component for controlling the phase of each of the extraction signals extracted by the extraction section 2-n. Finally, the phase control unit 40 determines and controls a phase such that the components of the transmission signal are canceled when the extracted signals extracted by the extraction unit 2 are combined by a power combining unit 50 (described later). do.
The details of the phase amount controlled by the phase control section 40 will become clear from the explanation below.
The N signals whose phases have been controlled by the phase control section 40 are sent to the power combining section 50.
《校正信号系統における電力合成部50》
 電力合成部50は、位相制御部40から送られたN個の信号を、合成するための構成要素である。
 電力合成部50で合成された信号は、校正信号受信機60へ送られる。
<<Power combining unit 50 in the calibration signal system>>
The power combining unit 50 is a component for combining N signals sent from the phase control unit 40.
The signals combined by the power combining section 50 are sent to the calibration signal receiver 60.
《校正信号系統における校正信号受信機60》
 校正信号受信機60は、電力合成部50から送られた信号を検波するための構成要素である。ここで、用語の「検波する」は、変調波からベースバンド信号を取り出すこと、すなわち復調することを意味する。
 校正信号受信機60で検波された信号は、電力計測部70及び校正信号解析部100へ送られる。
<<Calibration signal receiver 60 in the calibration signal system>>
The calibration signal receiver 60 is a component for detecting the signal sent from the power combining section 50. Here, the term "detect" means extracting a baseband signal from a modulated wave, that is, demodulating it.
The signal detected by the calibration signal receiver 60 is sent to the power measurement section 70 and the calibration signal analysis section 100.
《校正信号系統における電力計測部70》
 電力計測部70は、校正信号受信機60から送られた信号の電力量を計測するための構成要素である。
 前述の位相制御部40は、電力計測部70と協調して、制御する位相量を決定する。位相制御部40と電力計測部70との協調は、位相制御指示部80からの指示により実現される。具体的に位相制御部40は、制御する位相量を徐々に変化させ、電力計測部70で計測した電力量を参照し、この電力量が最小となる位相量を探索する。位相制御部40において、電力量が最小となる位相量を探索する動作のモードを、探索モードと称することにする。
<<Power measurement unit 70 in calibration signal system>>
The power measurement unit 70 is a component for measuring the amount of power of the signal sent from the calibration signal receiver 60.
The above-mentioned phase control section 40 cooperates with the power measurement section 70 to determine the amount of phase to be controlled. Cooperation between the phase control section 40 and the power measurement section 70 is realized by instructions from the phase control instruction section 80. Specifically, the phase control unit 40 gradually changes the amount of phase to be controlled, refers to the amount of power measured by the power measurement unit 70, and searches for the amount of phase that minimizes this amount of power. The mode of operation in which the phase control unit 40 searches for the phase amount that minimizes the amount of electric power will be referred to as a search mode.
《校正信号系統における位相制御指示部80》
 位相制御指示部80は、位相制御部40と電力計測部70との協調を実現するための指示を行うための構成要素である。また位相制御指示部80は、電力量が最小となる位相量を格納し、この位相量を校正信号位相オフセット部90へ指示するための構成要素でもある。
 電力量が最小となる位相量が送られてくると、位相制御指示部80は、位相制御部40に対し、探索モードを中止し、以後はこの位相量で制御することを指示する。位相制御部40において、電力量が最小となる位相量に固定して制御する動作のモードを、固定モードと称することにする。すなわち実施の形態1に係るアレーアンテナシステムは、探索モードを実施するため、位相制御部40、電力合成部50、校正信号受信機60、電力計測部70、及び位相制御指示部80からなるループの処理を、少なくとも1回は実施する。
<<Phase control instruction section 80 in the calibration signal system>>
The phase control instruction section 80 is a component for issuing instructions for realizing cooperation between the phase control section 40 and the power measurement section 70. The phase control instruction section 80 is also a component for storing the phase amount that minimizes the amount of electric power and for instructing the calibration signal phase offset section 90 to use this phase amount.
When the phase amount that minimizes the amount of power is sent, the phase control instruction section 80 instructs the phase control section 40 to cancel the search mode and perform control using this phase amount from now on. The mode of operation in which the phase control unit 40 performs control while fixing the amount of power to the phase amount that minimizes the amount of power will be referred to as a fixed mode. That is, in order to implement the search mode, the array antenna system according to the first embodiment uses a loop consisting of the phase control section 40, the power combining section 50, the calibration signal receiver 60, the power measurement section 70, and the phase control instruction section 80. The treatment is carried out at least once.
《校正信号系統における校正信号位相オフセット部90》
 校正信号位相オフセット部90は、校正信号生成部30で生成された校正信号に対し、位相制御指示部80から指示された位相量だけ、位相をオフセットする(相殺調整する)ための構成要素である。
 校正信号位相オフセット部90で位相がオフセット(相殺調整)された校正信号は、校正信号解析部100へ送られる。
<<Calibration signal phase offset section 90 in the calibration signal system>>
The calibration signal phase offset section 90 is a component for offsetting the phase of the calibration signal generated by the calibration signal generation section 30 by the phase amount instructed by the phase control instruction section 80 (offsetting adjustment). .
The calibration signal whose phase has been offset (cancellation adjustment) by the calibration signal phase offset unit 90 is sent to the calibration signal analysis unit 100.
《校正信号系統における校正信号解析部100》
 校正信号解析部100は、送信系統を通過した校正信号を抽出し、相対的な振幅位相誤差(以降、「相対振幅位相誤差」と称する)を算出するための構成要素である。校正信号解析部100は、相対振幅位相誤差を算出するため、信号間の相関を計算するとよい。
 校正信号解析部100で算出された相対振幅位相誤差は、DBF部10へ送られる。DBF部10は、ビームフォーミングの設計値を、相対振幅位相誤差をキャンセルするように補正する。
<<Calibration signal analysis unit 100 in the calibration signal system>>
The calibration signal analysis unit 100 is a component for extracting the calibration signal that has passed through the transmission system and calculating a relative amplitude and phase error (hereinafter referred to as "relative amplitude and phase error"). The calibration signal analysis unit 100 preferably calculates the correlation between signals in order to calculate the relative amplitude phase error.
The relative amplitude phase error calculated by the calibration signal analysis section 100 is sent to the DBF section 10. The DBF unit 10 corrects the beamforming design values so as to cancel the relative amplitude and phase errors.
《ハードウエア構成について》
 図2は、実施の形態1に係るアレーアンテナシステムの一部のハードウエア構成を示す図その1である。図3は、実施の形態1に係るアレーアンテナシステムの一部のハードウエア構成を示す図その2である。
《About hardware configuration》
FIG. 2 is a first diagram showing the hardware configuration of a part of the array antenna system according to the first embodiment. FIG. 3 is a second diagram showing a partial hardware configuration of the array antenna system according to the first embodiment.
 アレーアンテナシステムにおける送信機3、注入部4、DBF部10、信号処理部20、校正信号生成部30、校正信号受信機60、電力計測部70、位相制御指示部80、校正信号位相オフセット部90、及び校正信号解析部100、の各機能は、処理回路により実現される。処理回路は、専用のハードウエアであっても、メモリに格納されるプログラムを実行するCPU(Central Processing Unit、中央処理装置、処理装置、演算装置、マイクロプロセッサ、マイクロコンピュータ、プロセッサ、DSPとも称される)であっても、どちらでもよい。 Transmitter 3, injection unit 4, DBF unit 10, signal processing unit 20, calibration signal generation unit 30, calibration signal receiver 60, power measurement unit 70, phase control instruction unit 80, calibration signal phase offset unit 90 in the array antenna system , and the calibration signal analysis section 100 are realized by a processing circuit. Even if the processing circuit is dedicated hardware, it is also called a CPU (Central Processing Unit, central processing unit, processing unit, arithmetic unit, microprocessor, microcomputer, processor, DSP) that executes a program stored in memory. ), it doesn't matter.
 図2は、具体的には、処理回路が専用のハードウエアである処理回路500の場合の図である。処理回路500は、例えば、単一回路、複合回路、プログラム化したプロセッサ、並列プログラムプロセッサ、ASIC、FPGA、又はこれらを組み合わせたものが該当する。送信機3、注入部4、DBF部10、信号処理部20、校正信号生成部30、校正信号受信機60、電力計測部70、位相制御指示部80、校正信号位相オフセット部90、及び校正信号解析部100、の各機能は、それぞれごとに処理回路500により実現されてもよいし、まとめて1つの処理回路500により実現されてもよい。 Specifically, FIG. 2 is a diagram in the case of a processing circuit 500 in which the processing circuit is dedicated hardware. Processing circuit 500 may be, for example, a single circuit, a composite circuit, a programmed processor, a parallel program processor, an ASIC, an FPGA, or a combination thereof. Transmitter 3, injection section 4, DBF section 10, signal processing section 20, calibration signal generation section 30, calibration signal receiver 60, power measurement section 70, phase control instruction section 80, calibration signal phase offset section 90, and calibration signal Each function of the analysis section 100 may be realized individually by the processing circuit 500, or may be realized collectively by one processing circuit 500.
 図3は、具体的には、処理回路がCPU502の場合の図である。処理回路がCPU502の場合、上記の各機能は、ソフトウエア、ファームウエア、又はソフトウエアとファームウエアとの組合せにより実現される。ソフトウエア及びファームウエアはプログラムとして記述され、メモリ504に格納される。CPU502は、メモリ504に記憶されたプログラムを読み出して実行することにより、各部の機能を実現する。すなわちアレーアンテナシステムは、処理回路により実行されるときに、アレーアンテナシステムの各処理ステップが結果的に実行されることになるプログラムを格納するためのメモリ504を備える。また、これらのプログラムは、アレーアンテナシステムの手順及び方法をコンピュータに実行させるものである、とも言える。ここでメモリ504は、例えば、RAM、ROM、フラッシュメモリ、EPROM、EEPROM等の、不揮発性又は揮発性の半導体メモリであってよい。またメモリ504は、磁気ディスク、フレキシブルディスク、光ディスク、コンパクトディスク、ミニディスク、DVD、等のディスクを有する構造のものであってもよい。さらにメモリ504は、HDD、又はSSDの態様であってもよい。 Specifically, FIG. 3 is a diagram when the processing circuit is the CPU 502. When the processing circuit is the CPU 502, each of the above functions is realized by software, firmware, or a combination of software and firmware. Software and firmware are written as programs and stored in memory 504. The CPU 502 realizes the functions of each section by reading and executing programs stored in the memory 504. That is, the array antenna system includes a memory 504 for storing a program that, when executed by the processing circuitry, results in the execution of each processing step of the array antenna system. It can also be said that these programs cause a computer to execute the procedures and methods of the array antenna system. Here, the memory 504 may be a non-volatile or volatile semiconductor memory such as RAM, ROM, flash memory, EPROM, EEPROM, etc., for example. Further, the memory 504 may have a structure including a disk such as a magnetic disk, a flexible disk, an optical disk, a compact disk, a mini disk, a DVD, or the like. Furthermore, the memory 504 may be in the form of an HDD or an SSD.
 なお、アレーアンテナシステムの上記の各機能は、一部を専用のハードウエアで実現し、その他の一部をソフトウエア又はファームウエアで実現するようにしてもよい。このように処理回路は、ハードウエア、ソフトウエア、ファームウエア、又はこれらの組合せによって、上記の各機能を実現することができる。 Note that some of the above functions of the array antenna system may be realized by dedicated hardware, and other parts may be realized by software or firmware. In this way, the processing circuit can realize each of the above functions using hardware, software, firmware, or a combination thereof.
《実施の形態1に係るアレーアンテナシステムの校正方法について》
 図4は、実施の形態1に係るアレーアンテナシステムの処理ステップを示すフローチャートである。
 図4に示されるとおり実施の形態1に係るアレーアンテナシステムの処理ステップは、大きく3つのフェーズから構成される。
 第1のフェーズは、校正信号の生成ST11と、校正信号の注入ST12と、校正信号の抽出ST13と、を含む。
 第2のフェーズは、図4において「P101」と表記された破線の枠により囲まれた部分であり、「位相設定値探索フェーズ」と称する。位相設定値探索フェーズは、前述した位相制御部40の探索モードに対応する。位相設定値探索フェーズは、位相設定ST21と、校正信号の合成ST22と、校正信号の検波ST23と、信号の電力計測ST24と、位相設定値の変更回数確認ST25と、を含む。
 第3のフェーズは、図4において「P102」と表記された破線の枠により囲まれた部分であり、「校正フェーズ」と称する。校正フェーズにおいて位相制御部40は、固定モードである。校正フェーズは、位相設定値算出ST41と、位相設定ST42と、校正信号の合成ST43と、校正信号の検波ST44と、相対振幅位相誤差の算出ST45と、校正値の算出ST47と、送信信号の補正ST48と、を含む。
<<About the calibration method of the array antenna system according to the first embodiment>>
FIG. 4 is a flowchart showing processing steps of the array antenna system according to the first embodiment.
As shown in FIG. 4, the processing steps of the array antenna system according to the first embodiment are mainly composed of three phases.
The first phase includes calibration signal generation ST11, calibration signal injection ST12, and calibration signal extraction ST13.
The second phase is a portion surrounded by a broken line frame labeled "P101" in FIG. 4, and is referred to as a "phase setting value search phase." The phase setting value search phase corresponds to the search mode of the phase control section 40 described above. The phase setting value search phase includes phase setting ST21, calibration signal synthesis ST22, calibration signal detection ST23, signal power measurement ST24, and confirmation of the number of changes of the phase setting value ST25.
The third phase is a portion surrounded by a broken line frame labeled "P102" in FIG. 4, and is referred to as a "calibration phase." In the calibration phase, the phase control section 40 is in fixed mode. The calibration phase includes phase setting value calculation ST41, phase setting ST42, calibration signal synthesis ST43, calibration signal detection ST44, relative amplitude phase error calculation ST45, calibration value calculation ST47, and transmission signal correction. ST48.
 校正信号の生成ST11は、校正信号生成部30が行う処理ステップである。校正信号の生成ST11において校正信号生成部30は、あらかじめ設計された仕様に従い、校正信号を生成する。
 校正信号は、例えば、位相変調を実現する変調信号であってもよい。より好ましくは、校正信号は、N個の送信系統に注入されるそれぞれが、時間軸方向で相関が低い、すなわち直交性の高い、そのようなN個の変調信号であるとよい。
Calibration signal generation ST11 is a processing step performed by the calibration signal generation section 30. Generation of a calibration signal In ST11, the calibration signal generation section 30 generates a calibration signal according to a pre-designed specification.
The calibration signal may be, for example, a modulation signal that implements phase modulation. More preferably, the calibration signals are N modulation signals that are injected into the N transmission systems and have low correlation in the time axis direction, that is, high orthogonality.
 校正信号の注入ST12は、校正信号生成部30が行う処理ステップである。正信号の注入ST12において校正信号生成部30は、N個の校正信号を、それぞれ対応する送信系統の注入部4-1、注入部4-2、…、注入部4-N、へ注入する。
 前述のとおり校正信号生成部30及び注入部4の各機能は、CPU502により実現されてよい。すなわち、N個の校正信号の注入は、物理的な手段を用いず、CPU502の中でデジタル処理を行えばよい。つまり、N個の校正信号の注入は、それぞれの送信系統において、送信信号と校正信号との加算処理を行えばよい。注入部4-1、注入部4-2、…、注入部4-N、の各機能は、スイッチ、及び方向性結合器(カプラ)といった物理的な手段を用いないことにより、物理的な手段に固有の歪み、及びノイズ、等の悪影響を受けずに済む。
The calibration signal injection ST12 is a processing step performed by the calibration signal generation section 30. In injection ST12 of positive signals, the calibration signal generation unit 30 injects N calibration signals into the injection units 4-1, 4-2, . . . , injection units 4-N of the corresponding transmission systems, respectively.
As described above, each function of the calibration signal generation section 30 and the injection section 4 may be realized by the CPU 502. That is, the injection of N calibration signals may be performed by digital processing within the CPU 502 without using physical means. In other words, the N calibration signals can be injected by performing addition processing of the transmission signal and the calibration signal in each transmission system. Each function of the injection section 4-1, injection section 4-2, ..., injection section 4-N can be performed by physical means without using physical means such as a switch or a directional coupler (coupler). This eliminates the negative effects of distortion, noise, etc. inherent in
 校正信号の抽出ST13は、抽出部2-1、抽出部2-2、…、抽出部2-N、が行う処理ステップである。校正信号の抽出ST13において抽出部2-1、抽出部2-2、…、抽出部2-N、のそれぞれは、送信系統を流れる信号の一部を抽出信号として抽出する。抽出信号には、送信信号と校正信号とが含まれる。
 抽出部2-1、抽出部2-2、…、抽出部2-N、が抽出する信号は、前述のとおり、RF帯のアナログ信号である。ベースバンド信号と異なりRF帯のアナログ信号は、サンプリングしてデジタル処理するには周波数帯域が高すぎて、現実的ではない。そこで抽出部2-1、抽出部2-2、…、抽出部2-N、の各機能は、方向性結合器(カプラ)、及びスイッチ、等の物理的な手段により実現するとよい。
Extraction of the calibration signal ST13 is a processing step performed by the extraction section 2-1, the extraction section 2-2, . . . , the extraction section 2-N. In calibration signal extraction ST13, each of the extraction sections 2-1, 2-2, . . . , 2-N extracts a part of the signal flowing through the transmission system as an extraction signal. The extracted signal includes a transmission signal and a calibration signal.
As described above, the signals extracted by the extraction section 2-1, the extraction section 2-2, . . . , the extraction section 2-N are analog signals in the RF band. Unlike baseband signals, RF band analog signals have too high a frequency band to be sampled and digitally processed, making it impractical. Therefore, each function of the extracting section 2-1, the extracting section 2-2, . . . , the extracting section 2-N may be realized by physical means such as a directional coupler and a switch.
 位相設定値探索フェーズ(P101)における位相設定ST21は、探索モードの位相制御部40が行う処理ステップである。位相設定ST21において位相制御部40は、抽出部2-1、抽出部2-2、…、抽出部2-N、により抽出されたRF帯のアナログ信号のそれぞれに対し、位相量を徐々に変化させ、位相を制御する。位相制御部40による位相の制御は、アナログ又はデジタルの移相器により実現されるとよい。移相器は、1つだけ用意して系統を切り替えるようにしてもよいし、N個用意し系統ごとに備えてもよい。 The phase setting ST21 in the phase setting value search phase (P101) is a processing step performed by the phase control unit 40 in the search mode. In phase setting ST21, the phase control section 40 gradually changes the phase amount for each of the RF band analog signals extracted by the extraction section 2-1, extraction section 2-2, ..., extraction section 2-N. and control the phase. The phase control by the phase control section 40 may be realized by an analog or digital phase shifter. Only one phase shifter may be provided to switch the system, or N phase shifters may be provided for each system.
 位相設定値探索フェーズ(P101)における校正信号の合成ST22は、電力合成部50が行う処理ステップである。校正信号の合成ST22において電力合成部50は、位相制御部40から送られたN個の信号を、合成する。電力合成部50は、例えば、電力合成器等のハードウエアにより実現される。 The calibration signal synthesis ST22 in the phase setting value search phase (P101) is a processing step performed by the power synthesis section 50. Combining calibration signals In ST22, the power combining section 50 combines the N signals sent from the phase control section 40. The power combining unit 50 is realized by, for example, hardware such as a power combiner.
 位相設定値探索フェーズ(P101)における校正信号の検波ST23は、校正信号受信機60が行う処理ステップである。校正信号の検波ST23において校正信号受信機60は、電力合成部50から送られた信号を復調し、ベースバンド信号を取り出す。なお、校正信号の検波ST23で取り出されたベースバンド信号は、デジタル信号である。 Detection ST23 of the calibration signal in the phase setting value search phase (P101) is a processing step performed by the calibration signal receiver 60. In calibration signal detection ST23, the calibration signal receiver 60 demodulates the signal sent from the power combining section 50 and extracts a baseband signal. Note that the baseband signal extracted in the calibration signal detection ST23 is a digital signal.
 位相設定値探索フェーズ(P101)における信号の電力計測ST24は、電力計測部70が行う処理ステップである。信号の電力計測ST24において電力計測部70は、校正信号受信機60から送られた信号の電力量を計測する。 Signal power measurement ST24 in the phase setting value search phase (P101) is a processing step performed by the power measurement unit 70. Signal Power Measurement In ST24, the power measurement unit 70 measures the amount of power of the signal sent from the calibration signal receiver 60.
 位相設定値探索フェーズ(P101)における位相設定値の変更回数確認ST25は、位相制御指示部80が行う処理ステップである。位相設定値の変更回数確認ST25において位相制御指示部80は、位相制御部40にて変化させた位相量と、電力計測部70で計測された電力量と、その対応関係を、少なくとも一時的に記憶し、保持する。また位相設定値の変更回数確認ST25において位相制御指示部80は、位相制御部40と電力計測部70との協調を実現するための指示を行う。さらに位相設定値の変更回数確認ST25において位相制御指示部80は、位相設定値の変更回数を確認し、位相制御部40の探索モードか終了したか否かを確認する。 The confirmation ST25 of the number of changes in the phase setting value in the phase setting value search phase (P101) is a processing step performed by the phase control instruction section 80. In confirmation ST25 of the number of changes in the phase setting value, the phase control instruction unit 80 at least temporarily updates the amount of phase changed by the phase control unit 40, the amount of power measured by the power measurement unit 70, and the correspondence between them. Remember and retain. Further, in confirmation ST25 of the number of changes in the phase setting value, the phase control instruction section 80 issues an instruction for realizing cooperation between the phase control section 40 and the power measurement section 70. Further, in confirmation ST25 of the number of changes in the phase setting value, the phase control instruction section 80 checks the number of changes in the phase setting value, and confirms whether the search mode of the phase control section 40 has ended.
 位相制御部40において変化させる位相量は、例えば、ネスト(入れ子)を取り入れたN重のFor文(For Loop)により実現してもよい。N重のFor文は、例えば、内側から1番目のFor文を、抽出部2-1から抽出した第1のアナログ信号に対して、位相量を0度から360度まで、ステップ状に変化させる。内側から2番目のFor文は、抽出部2-2から抽出した第2のアナログ信号に対して、位相量を0度から360度まで、ステップ状に変化させる。以下同様にして、位相量は、内側からN番目のFor文までを用いて、ステップ状に変化させる。位相制御部40において変化させる位相量は、例えば、このように実現してもよい。各for文におけるステップ状の変化がK個ある場合、位相設定値の変更回数確認ST25において位相制御指示部80は、変更回数がK×N以下か超えているか、を確認する。 The phase amount to be changed in the phase control unit 40 may be realized by, for example, an N-fold For statement (For Loop) that incorporates nesting. For example, in the N-fold For statement, the first For statement from the inside changes the phase amount in steps from 0 degrees to 360 degrees with respect to the first analog signal extracted from the extraction unit 2-1. . The second For statement from the inside changes the phase amount of the second analog signal extracted from the extraction unit 2-2 in steps from 0 degrees to 360 degrees. Similarly, the phase amount is changed in steps using the Nth For statement from the inside. The phase amount changed by the phase control section 40 may be realized in this manner, for example. When there are K step-like changes in each for statement, in confirmation ST25 of the number of changes in the phase setting value, the phase control instruction unit 80 checks whether the number of changes is less than or greater than K×N.
 位相設定値の変更回数確認ST25において位相制御指示部80は、N個のアナログ信号に対応する、N個の位相量の組合せの1つについて電力計測部70での電力量の計測が完了した後に、位相制御部40に対して、次の位相量の組合せに制御するよう、指示を行う。別の言い方をすれば位相制御指示部80は、前述の位相制御部40が実施するN重のFor文に対して、「Next」の命令の役割を果たす。 In confirmation ST25 of the number of changes to the phase setting value, the phase control instruction unit 80 determines whether the power measurement unit 70 has completed measuring the electric energy for one of the N combinations of phase amounts corresponding to the N analog signals. , instructs the phase control unit 40 to control to the next combination of phase amounts. In other words, the phase control instruction unit 80 plays the role of a “Next” command for the N-fold For statements executed by the phase control unit 40 described above.
 校正フェーズ(P102)における位相設定値算出ST41は、位相制御指示部80が行う処理ステップである。位相設定値算出ST41において位相制御指示部80は、一時的に記憶してあるK×Nの組合せの位相量と電力量との対応関係から、電力量が最小となる位相量の推定値を算出する。前述のとおり、移相器により変化させる位相量(移相量)に対して、電力量(合成電界の大きさ)は、正弦波を描くように変化することが知られている。この性質を用い、位相設定値算出ST41において位相制御指示部80は、一時的に記憶してあるK×Nの組合せの位相量と電力量との対応関係から、最小二乗法を用い、もっともらしい理論的な正弦波を算出し、電力量が最小となる位相量の推定値を求めればよい。 Phase setting value calculation ST41 in the calibration phase (P102) is a processing step performed by the phase control instruction section 80. In phase setting value calculation ST41, the phase control instruction unit 80 calculates an estimated value of the phase amount that minimizes the amount of power from the temporarily stored correspondence relationship between the phase amount and the amount of power of the K×N combination. do. As described above, it is known that the amount of power (the magnitude of the combined electric field) changes in a sinusoidal manner with respect to the amount of phase (the amount of phase shift) changed by the phase shifter. Using this property, in phase setting value calculation ST41, the phase control instruction unit 80 calculates a plausible What is necessary is to calculate a theoretical sine wave and obtain an estimated value of the phase amount that minimizes the amount of power.
 校正フェーズ(P102)における位相設定ST42は、位相制御指示部80が行う処理ステップである。位相設定ST42において位相制御指示部80は、位相制御部40に対して、電力量が最小となる位相量の推定値で移相器を制御するよう、指示する。以降、位相制御部40に対して指示した位相量は、用語「位相設定値」で表すこととする。位相設定値が指示された位相制御部40は、固定モードで移相器を制御する。 The phase setting ST42 in the calibration phase (P102) is a processing step performed by the phase control instruction section 80. In phase setting ST42, the phase control instruction section 80 instructs the phase control section 40 to control the phase shifter using the estimated value of the phase amount that minimizes the amount of power. Hereinafter, the phase amount instructed to the phase control unit 40 will be expressed by the term "phase setting value." The phase control unit 40 to which the phase setting value is instructed controls the phase shifter in a fixed mode.
 校正フェーズ(P102)における校正信号の合成ST43は、電力合成部50が行う処理ステップである。校正信号の合成ST43において電力合成部50は、位相制御部40から送られたN個の信号を、合成する。 The calibration signal synthesis ST43 in the calibration phase (P102) is a processing step performed by the power combining section 50. Combining calibration signals In ST43, the power combining section 50 combines the N signals sent from the phase control section 40.
 校正フェーズ(P102)における校正信号の検波ST44は、校正信号受信機60が行う処理ステップである。校正信号の検波ST44において校正信号受信機60は、電力合成部50から送られた信号を復調し、デジタル信号であるベースバンド信号を取り出す。 Detection ST44 of the calibration signal in the calibration phase (P102) is a processing step performed by the calibration signal receiver 60. In calibration signal detection ST44, the calibration signal receiver 60 demodulates the signal sent from the power combining section 50 and extracts a baseband signal that is a digital signal.
 校正フェーズ(P102)における位相設定ST42、校正信号の合成ST43、及び校正信号の検波ST44の処理は、位相制御部40が制御する位相量を除いては、位相設定値探索フェーズ(P101)における位相設定ST21、校正信号の合成ST22、及び校正信号の検波ST23の処理と、同じ内容である。 The processes of phase setting ST42, calibration signal synthesis ST43, and calibration signal detection ST44 in the calibration phase (P102) are the same as those in the phase setting value search phase (P101), except for the phase amount controlled by the phase control section 40. The contents are the same as those of setting ST21, calibration signal synthesis ST22, and calibration signal detection ST23.
 校正フェーズ(P102)における相対振幅位相誤差の算出ST45は、校正信号解析部100が実施する処理ステップである。相対振幅位相誤差の算出ST45において校正信号解析部100は、校正信号の検波ST44において校正信号受信機60により復調されたベースバンド信号に対して、校正信号生成部30で生成された校正信号を参照信号として、相関を求める処理(以降、単に「相関処理」と称す)を施す。相関処理は、周波数領域において実施しても、時間領域において実施しても、どちらでもよい。
 校正信号がアップチャープとダウンチャープとを組み合わせたものである場合、相関処理は、パルス圧縮(Pulse Compression)であってもよい。
Calculating the relative amplitude phase error ST45 in the calibration phase (P102) is a processing step performed by the calibration signal analysis section 100. In relative amplitude phase error calculation ST45, the calibration signal analysis unit 100 refers to the calibration signal generated by the calibration signal generation unit 30 with respect to the baseband signal demodulated by the calibration signal receiver 60 in calibration signal detection ST44. The signal is subjected to processing for determining correlation (hereinafter simply referred to as "correlation processing"). The correlation process may be performed in the frequency domain or in the time domain.
If the calibration signal is a combination of up-chirp and down-chirp, the correlation process may be pulse compression.
 図1に示されるとおり、相対振幅位相誤差の算出ST45において校正信号解析部100が参照信号として用いる校正信号は、校正信号位相オフセット部90を経由している。
 相対振幅位相誤差の算出ST45において校正信号解析部100が参照信号として用いる校正信号は、校正信号位相オフセット部90によって、位相設定値の分だけ、位相がオフセット(相殺調整)されている。
As shown in FIG. 1, the calibration signal used as a reference signal by the calibration signal analysis section 100 in relative amplitude phase error calculation ST45 passes through the calibration signal phase offset section 90.
Calculation of Relative Amplitude Phase Error The calibration signal used as a reference signal by the calibration signal analysis section 100 in ST45 has its phase offset (cancellation adjustment) by the phase setting value by the calibration signal phase offset section 90.
 相対振幅位相誤差の算出ST45において校正信号解析部100は、各送信系統を通過した校正信号を抽出する。
 また、相対振幅位相誤差の算出ST45において校正信号解析部100は、抽出した校正信号に基づいて、相対振幅位相誤差(以降、単に「振幅位相誤差」と称する)を算出する。振幅位相誤差は、N個の送信系統間の特性のばらつきを示す指標となる。
Calculation of Relative Amplitude and Phase Error In ST45, the calibration signal analysis section 100 extracts the calibration signal that has passed through each transmission system.
Further, in relative amplitude phase error calculation ST45, the calibration signal analysis section 100 calculates a relative amplitude phase error (hereinafter simply referred to as "amplitude phase error") based on the extracted calibration signal. The amplitude phase error is an index indicating the variation in characteristics among the N transmission systems.
 校正フェーズ(P102)における校正値の算出ST47は、校正信号解析部100が実施する処理ステップである。校正値の算出ST47において校正信号解析部100は、算出した振幅位相誤差をキャンセルする振幅及び位相についての校正値(以降、「振幅位相校正値」と称する)を算出する。 Calibration value calculation ST47 in the calibration phase (P102) is a processing step performed by the calibration signal analysis section 100. Calculating Calibration Values In ST47, the calibration signal analysis unit 100 calculates calibration values for amplitude and phase (hereinafter referred to as "amplitude phase calibration values") that cancel the calculated amplitude and phase errors.
 校正フェーズ(P102)における送信信号の補正ST48は、DBF部10が実施する処理ステップである。送信信号の補正ST48においてDBF部10は、振幅位相校正値を用いて、送信信号を補正する。
 校正フェーズ(P102)における処理は、送信信号の補正ST48を最後の処理ステップとして完了する。
Correction ST48 of the transmission signal in the calibration phase (P102) is a processing step performed by the DBF section 10. Correcting the transmitted signal In ST48, the DBF section 10 corrects the transmitted signal using the amplitude phase calibration value.
The processing in the calibration phase (P102) is completed with correction ST48 of the transmitted signal as the last processing step.
 本開示技術に係るアレーアンテナシステムは、図4に示された一連の処理を、定期的に実施してもよいし、校正が必要な状況に応じて実施してもよい。
 本開示技術に係るアレーアンテナシステムの校正方法は、アレーアンテナシステムの出荷前の調整の場面をはじめとして、アレーアンテナシステムを設置した後の運用中の日々のメンテナンスの場面、及び定期的に実施する定期メンテナンスの場面、等の様々な場面で使用することができる。
The array antenna system according to the present disclosure may perform the series of processes shown in FIG. 4 periodically or may perform the series of processes shown in FIG. 4 depending on the situation where calibration is required.
The method for calibrating an array antenna system according to the disclosed technology can be used for adjustment before shipping the array antenna system, daily maintenance during operation after the array antenna system is installed, and periodic maintenance. It can be used in various situations such as regular maintenance.
 以上のように実施の形態1に係るアレーアンテナシステムは上記構成を備えるため、N個全てのアンテナ素子1についての送信系統を、同時に校正を行うことができる。この作用により実施の形態1に係るアレーアンテナシステムは、自動的に一連の校正処理を実施するだけで、アンテナ素子1-n(n=1,2,…,N)間の、又は送信系統間の、特性のばらつきを抑えることができる。 As described above, since the array antenna system according to the first embodiment has the above configuration, the transmission systems for all N antenna elements 1 can be calibrated simultaneously. Due to this effect, the array antenna system according to Embodiment 1 can automatically perform a series of calibration processes to improve the accuracy between antenna elements 1-n (n=1, 2,...,N) or between transmission systems. It is possible to suppress variations in characteristics.
実施の形態2.
 実施の形態2に係るアレーアンテナシステムの校正方法は、本開示技術に係るアレーアンテナシステムの校正方法の変形例である。
 実施の形態2で用いる符号は、特に明記する場合を除き、実施の形態1で用いられた符号と同じである。実施の形態2において、実施の形態1と重複する説明は、適宜、省略される。
Embodiment 2.
The method for calibrating an array antenna system according to the second embodiment is a modification of the method for calibrating an array antenna system according to the presently disclosed technology.
The symbols used in the second embodiment are the same as those used in the first embodiment, unless otherwise specified. In the second embodiment, explanations that overlap with those in the first embodiment will be omitted as appropriate.
 実施の形態1においては、アレーアンテナシステムの校正方法として、位相設定値探索フェーズ(P101)において、探索モードの位相制御部40が、位相量を0度から360度までステップ状に変化させ、幅広い範囲において位相量の解を探索する態様が示されたが、本開示技術はこれに限定されない。
 位相量の探索は、電力量が最小となる解の候補がある場合、解の候補を中心としてその近傍について行うようにしてもよい。また位相量の探索は、電力量が最小となる解の候補がある場合、解の候補の近傍を、細かいステップで変化させて電力量の計測を実施してもよい。
In Embodiment 1, as a method for calibrating the array antenna system, in the phase setting value search phase (P101), the phase control unit 40 in the search mode changes the phase amount in steps from 0 degrees to 360 degrees. Although an aspect has been shown in which a solution of the phase amount is searched within the range, the disclosed technology is not limited thereto.
If there is a solution candidate that minimizes the amount of power, the search for the phase amount may be performed in the vicinity of the solution candidate. Further, in the search for the phase amount, if there is a solution candidate that minimizes the amount of power, the amount of power may be measured by changing the neighborhood of the solution candidate in small steps.
 実施の形態2に係るアレーアンテナシステムの校正方法は、2回目以降の校正を行うときに、直近の校正で得られた位相設定値を、電力量が最小となる解の候補としてよい。実施の形態2に係るアレーアンテナシステムは、出荷前の校正において得られた位相設定値を、電力量が最小となる解の候補として、メモリ504に格納するようにしてよい。 In the method for calibrating the array antenna system according to the second embodiment, when performing the second and subsequent calibrations, the phase setting value obtained in the most recent calibration may be used as a candidate for the solution that minimizes the amount of power. The array antenna system according to the second embodiment may store the phase setting value obtained in the calibration before shipping in the memory 504 as a candidate for the solution that minimizes the amount of power.
 以上のとおり実施の形態2に係るアレーアンテナシステムの校正方法は、直近の校正で得られた位相設定値を解の候補として用いるため、不必要に広い範囲の探索を行うことなく、実施の形態1に示した効果を奏する。 As described above, the array antenna system calibration method according to the second embodiment uses the phase setting value obtained in the most recent calibration as a solution candidate. The effect shown in 1 is achieved.
実施の形態3.
 実施の形態3に係るアレーアンテナシステム及びアレーアンテナシステムの校正方法は、本開示技術に係るアレーアンテナシステム及びアレーアンテナシステムの校正方法の変形例である。
 実施の形態3で用いる符号は、特に明記する場合を除き、既出の実施の形態で用いられた符号と同じである。実施の形態3において、既出の実施の形態と重複する説明は、適宜、省略される。
Embodiment 3.
The array antenna system and the method for calibrating an array antenna system according to the third embodiment are modified examples of the array antenna system and the method for calibrating the array antenna system according to the presently disclosed technology.
The symbols used in the third embodiment are the same as those used in the previously described embodiments, unless otherwise specified. In Embodiment 3, explanations that overlap with those of the previously described embodiments will be omitted as appropriate.
 図5は、実施の形態3に係るアレーアンテナシステムの機能構成を示すブロック図である。図5に示されるとおり、本開示技術は、電力計測部70を有さないアレーアンテナシステムにも適用できる。
 図5に示されるとおり、実施の形態3に係るアレーアンテナシステムは、DBF部10からの情報が、位相制御指示部80へ送られる。
 以上の違いを除いて、実施の形態3に係るアレーアンテナシステムの構成は、既出の実施の形態で示したアレーアンテナシステムの構成と同じである。
FIG. 5 is a block diagram showing the functional configuration of the array antenna system according to the third embodiment. As shown in FIG. 5, the disclosed technology can also be applied to an array antenna system that does not include the power measurement unit 70.
As shown in FIG. 5, in the array antenna system according to the third embodiment, information from the DBF section 10 is sent to the phase control instruction section 80.
Except for the above differences, the configuration of the array antenna system according to the third embodiment is the same as the configuration of the array antenna system shown in the previous embodiments.
 実施の形態3に係るアレーアンテナシステムの校正方法は、大がかりな校正ではなく、経年変化による小さい特性変化に対応することを目的としている。実施の形態3に係るアレーアンテナシステムの校正方法は、出荷前調整において、送信系統の校正がなされていることを前提としている。本開示技術は、送信系統の各要素の経年変化(経年劣化)による入出力特性への影響は大がかりな校正を必要とするほど大きくない、という原理に基づいている。 The method of calibrating the array antenna system according to the third embodiment is not intended to perform large-scale calibration, but to cope with small changes in characteristics due to aging. The method for calibrating the array antenna system according to the third embodiment is based on the premise that the transmission system has been calibrated in the pre-shipment adjustment. The disclosed technology is based on the principle that the influence on input/output characteristics due to secular change (aging deterioration) of each element of a transmission system is not large enough to require extensive calibration.
 実施の形態3に係るアレーアンテナシステムの校正方法は、具体的には、測定による合成電界の大きさに基づく位相量を止め、固定された位相設定値を用いるというものである。本明細書では、測定による合成電界の大きさに基づく位相量から固定された位相設定値への切換えは、「固定設定値切換え」の用語で表すものとする。
 出荷前調整において、n番目の送信系統を補正する振幅及び位相は、複素数のWで表されるとする。実施の形態3に係るアレーアンテナシステムの校正方法は、固定設定値切換え時において、例えば、以下の式に表される修正位相量(φ)の修正を行う。

Figure JPOXMLDOC01-appb-I000001

ここで式(1)右辺の第1項のarg()は、引数である複素数の偏角を求める関数を表す。式(1)において、右辺の第1項は出荷前調整時の測定による合成電界の大きさに基づく位相量をキャンセルする項であり、右辺の第2項は固定された位相設定値に関する項の一例である。
Specifically, the method for calibrating the array antenna system according to the third embodiment is to stop the phase amount based on the magnitude of the measured composite electric field and use a fixed phase setting value. In this specification, switching from a phase amount based on the magnitude of the measured composite electric field to a fixed phase setting value will be referred to by the term "fixed setting value switching."
In the pre-shipment adjustment, it is assumed that the amplitude and phase for correcting the n-th transmission system are represented by a complex number W n . In the method for calibrating the array antenna system according to the third embodiment, when changing the fixed setting value, for example, the corrected phase amount (φ n ) expressed by the following equation is corrected.

Figure JPOXMLDOC01-appb-I000001

Here, arg( ) of the first term on the right side of equation (1) represents a function that calculates the argument of a complex number that is an argument. In equation (1), the first term on the right side is a term that cancels the phase amount based on the magnitude of the composite electric field measured during pre-shipment adjustment, and the second term on the right side is a term related to the fixed phase setting value. This is an example.
 一般に、ビームフォーミングとは、アレーアンテナシステムの電波をある方向に向けるための技術である。ビームフォーミングは、アレーアンテナを送信アンテナとして使用する場合でも、アレーアンテナを受信アンテナとして使用する場合でも、適用することができる。ビームフォーミングは、電波が波の性質を持っていることに基づいている。具体的に波の一種である電波は、同じ位相の波同士をかけあわせると強められ、逆位相の波をかけあわせると打ち消される、という性質を有する。ビームフォーミングは、この波の性質を積極的に利用している。
 ビームフォーミングにおいて、アレーアンテナシステムにおける各送信系統の位相をどのように設計するかは、アンテナ素子1がどのような間隔(d)及び態様で配置されているか、及びアレーアンテナシステムの電波をどの方向に指向させたいか、によって異なる。本開示技術は、式(1)右辺の第2項に示された値に限定されることなく、ビームフォーミングで設計した位相設定値が用いられてよい。
Generally, beamforming is a technique for directing radio waves of an array antenna system in a certain direction. Beamforming can be applied whether the array antenna is used as a transmit antenna or the array antenna is used as a receive antenna. Beamforming is based on the fact that radio waves have wave properties. Specifically, radio waves, which are a type of wave, have the property that when waves of the same phase are multiplied together, they are strengthened, and when waves of opposite phases are multiplied together, they are canceled out. Beamforming actively utilizes the properties of these waves.
In beamforming, how to design the phase of each transmission system in an array antenna system depends on what spacing (d) and manner the antenna elements 1 are arranged, and in which direction the radio waves of the array antenna system are directed. It depends on whether you want it to be oriented towards. The disclosed technology is not limited to the value shown in the second term on the right side of equation (1), and may use a phase setting value designed by beamforming.
 図6は、実施の形態3に係るアレーアンテナシステムの処理ステップを示すフローチャートである。図6に示されるとおり実施の形態3に係るアレーアンテナシステムの処理ステップは、校正信号の生成ST11と、校正信号の注入ST12と、校正信号の抽出ST13と、位相設定ST42と、校正信号の合成ST43と、校正信号の検波ST44と、相対振幅位相誤差の算出ST45と、校正値の算出ST47と、送信信号の補正ST48と、を含む。 FIG. 6 is a flowchart showing the processing steps of the array antenna system according to the third embodiment. As shown in FIG. 6, the processing steps of the array antenna system according to the third embodiment include generation of a calibration signal ST11, injection of the calibration signal ST12, extraction of the calibration signal ST13, phase setting ST42, and synthesis of the calibration signal. ST43, detection ST44 of a calibration signal, calculation ST45 of a relative amplitude phase error, calculation ST47 of a calibration value, and correction ST48 of a transmission signal.
《実施の形態3に係るアレーアンテナシステムの校正方法について》
 実施の形態3に係るアレーアンテナシステムの校正方法において、第1のフェーズは、校正信号の生成ST11、校正信号の注入ST12、及び校正信号の抽出ST13の処理ステップが実施される。実施の形態3に係る校正信号の生成ST11、校正信号の注入ST12、及び校正信号の抽出ST13、これらそれぞれの処理内容は、実施の形態1に示されたそれぞれの内容と同じである。
<<About the calibration method of the array antenna system according to the third embodiment>>
In the method for calibrating an array antenna system according to the third embodiment, in the first phase, processing steps of generation of a calibration signal ST11, injection of a calibration signal ST12, and extraction of a calibration signal ST13 are performed. The processing contents of calibration signal generation ST11, calibration signal injection ST12, and calibration signal extraction ST13 according to the third embodiment are the same as those shown in the first embodiment.
 実施の形態3に係る位相設定ST42は、位相制御指示部80が実施する処理ステップである。位相設定ST42において位相制御指示部80は、固定設定値切換え時に、修正位相量(φ)を位相制御部40に指示する。修正位相量(φ)は、例えば、式(1)に例示されているものであり、DBF部10が行うデジタルビームフォーミングの目的に応じて決定されたものでよい。
 位相制御部40は、位相制御指示部80の指示に基づいて、移相器を制御する。
Phase setting ST42 according to the third embodiment is a processing step executed by the phase control instruction section 80. In phase setting ST42, the phase control instruction section 80 instructs the phase control section 40 to modify the phase amount (φ n ) when switching the fixed set value. The corrected phase amount (φ n ) is, for example, as shown in Equation (1), and may be determined depending on the purpose of digital beamforming performed by the DBF unit 10.
The phase control section 40 controls the phase shifter based on instructions from the phase control instruction section 80.
 実施の形態3に係る校正信号の合成ST43、校正信号の検波ST44、相対振幅位相誤差の算出ST45、校正値の算出ST47、及び送信信号の補正ST48、これらそれぞれの処理内容は、実施の形態1に示されたそれぞれの内容と同じである。 The processing contents of calibration signal synthesis ST43, calibration signal detection ST44, relative amplitude phase error calculation ST45, calibration value calculation ST47, and transmission signal correction ST48 according to the third embodiment are the same as those of the first embodiment. The contents are the same as those shown in .
 以上のとおり実施の形態3に係るアレーアンテナシステムの校正方法は、固定設定値切換えの処理ステップを含むため、出荷前調整時の測定による合成電界の大きさに基づく校正値から固定設定値に切り替えることができ、経年変化による小さい特性変化に対応できる、という効果を奏する。 As described above, the method for calibrating the array antenna system according to the third embodiment includes the processing step of switching the fixed setting value, so that the calibration value is switched from the calibration value based on the magnitude of the composite electric field measured during pre-shipment adjustment to the fixed setting value. This has the effect of being able to cope with small changes in characteristics due to aging.
実施の形態4.
 実施の形態4に係るアレーアンテナシステム及びアレーアンテナシステムの校正方法は、本開示技術に係るアレーアンテナシステム及びアレーアンテナシステムの校正方法の変形例である。
 実施の形態4で用いる符号は、特に明記する場合を除き、既出の実施の形態で用いられた符号と同じである。実施の形態4において、既出の実施の形態と重複する説明は、適宜、省略される。
Embodiment 4.
The array antenna system and the method for calibrating an array antenna system according to Embodiment 4 are modified examples of the array antenna system and the method for calibrating an array antenna system according to the presently disclosed technology.
The symbols used in the fourth embodiment are the same as those used in the previously described embodiments, unless otherwise specified. In Embodiment 4, explanations that overlap with those of the previously described embodiments will be omitted as appropriate.
 図7は、実施の形態4に係るアレーアンテナシステムの機能構成を示すブロック図である。図7に示されるとおり実施の形態4に係るアレーアンテナシステムは、位相制御部40、電力合成部50、及び位相制御指示部80に代えて、バトラーマトリクス回路110、経路選択部120、及び経路選択指示部130を備える。
 バトラーマトリクス回路110、経路選択部120、及び経路選択指示部130は、図7に示されるように接続されている。
FIG. 7 is a block diagram showing the functional configuration of the array antenna system according to the fourth embodiment. As shown in FIG. 7, the array antenna system according to the fourth embodiment includes a Butler matrix circuit 110, a route selection unit 120, and a route selection unit instead of the phase control unit 40, the power combining unit 50, and the phase control instruction unit 80. An instruction section 130 is provided.
Butler matrix circuit 110, route selection section 120, and route selection instruction section 130 are connected as shown in FIG.
 既出の実施の形態では、図示しない移相器を用いることで校正を行うことを示したが、本開示技術はこれに限定されない。本開示技術は、移相器ではなくバトラーマトリクス回路110を用いるアレーアンテナシステムの校正方法にも適用することができる。一般に、バトラーマトリクス(Butler Matrix)とは、アレーアンテナシステムのビームフォーミングのためのネットワークを意味する。一般に、バトラーマトリクスは、m×mのマトリクス状に配置されたハイブリッドカプラと、固定された位相量をシフトする固定フェーズシフタと、から構成される。ここでmは、一般には、2のべき乗の数である。 In the previously described embodiments, it has been shown that calibration is performed using a phase shifter (not shown), but the disclosed technology is not limited thereto. The disclosed technology can also be applied to a method of calibrating an array antenna system that uses Butler matrix circuit 110 instead of a phase shifter. Generally, Butler Matrix refers to a network for beamforming of an array antenna system. Generally, a Butler matrix is composed of hybrid couplers arranged in an m×m matrix and a fixed phase shifter that shifts a fixed phase amount. Here, m is generally a number that is a power of 2.
《バトラーマトリクス回路110》
 バトラーマトリクス回路110は、ハイブリッド回路、固定フェーズシフタ、及び結合器からなる回路である。バトラーマトリクス回路110は、少なくともN個の入力ポートと、少なくともN個の出力ポートと、を有する。
 図7に示されるとおり、バトラーマトリクス回路110の入力ポートには、抽出部2-1、抽出部2-2、…、抽出部2-N、で抽出された信号が、すなわち送信信号と校正信号とが重畳された信号が、入力される。
 バトラーマトリクス回路110は、入力ポートから入力された信号について、複数の移相設定値で合成し、それぞれを異なる出力ポートに出力する。
Butler matrix circuit 110》
Butler matrix circuit 110 is a circuit consisting of a hybrid circuit, a fixed phase shifter, and a coupler. Butler matrix circuit 110 has at least N input ports and at least N output ports.
As shown in FIG. 7, the input ports of the Butler matrix circuit 110 receive the signals extracted by the extracting section 2-1, the extracting section 2-2, ..., the extracting section 2-N, that is, the transmission signal and the calibration signal. A signal on which is superimposed is input.
Butler matrix circuit 110 combines signals input from input ports using a plurality of phase shift settings, and outputs each signal to a different output port.
《経路選択部120》
 経路選択部120は、バトラーマトリクス回路110の出力ポートを切り替えるスイッチとして機能する構成要素である。
Route selection section 120》
The path selection unit 120 is a component that functions as a switch that switches the output ports of the Butler matrix circuit 110.
《経路選択指示部130》
 経路選択指示部130は、経路選択部120に対して指示を与えるための構成要素である。経路選択指示部130は、既出の実施の形態における位相制御指示部80と同等の役割を果たす構成要素である。
 経路選択指示部130の機能は、図2又は図3に示された処理回路により実現される。
《Route selection instruction section 130》
The route selection instruction unit 130 is a component for giving instructions to the route selection unit 120. The route selection instruction section 130 is a component that plays the same role as the phase control instruction section 80 in the previously described embodiment.
The functions of the route selection instruction section 130 are realized by the processing circuit shown in FIG. 2 or 3.
《実施の形態4に係るアレーアンテナシステムの校正方法について》
 図8は、実施の形態4に係るアレーアンテナシステムの処理ステップを示すフローチャートである。
 図8に示されるとおり実施の形態4に係るアレーアンテナシステムの処理ステップも、大きく3つのフェーズから構成される。
 第1のフェーズは、校正信号の生成ST11と、校正信号の注入ST12と、校正信号の抽出ST13と、を含む。実施の形態4に係る第1のフェーズは、実施の形態1に示されたものと同じ内容である。
 第2のフェーズは、図8において「P401」と表記された破線の枠により囲まれた部分であり、位相設定値探索フェーズである。位相設定値探索フェーズは、経路設定ST31と、校正信号の検波ST32と、信号の電力計測ST33と、経路切替回数の確認ST34と、を含む。
 第3のフェーズは、図8において「P402」と表記された破線の枠により囲まれた部分であり、校正フェーズである。校正フェーズは、電力が最小となる経路決定ST51と、経路設定ST52と、校正信号の検波ST53と、相対振幅位相誤差の算出ST54と、校正値の算出ST55と、送信信号の補正ST56と、を含む。
<<About the calibration method of the array antenna system according to Embodiment 4>>
FIG. 8 is a flowchart showing the processing steps of the array antenna system according to the fourth embodiment.
As shown in FIG. 8, the processing steps of the array antenna system according to the fourth embodiment are also roughly composed of three phases.
The first phase includes calibration signal generation ST11, calibration signal injection ST12, and calibration signal extraction ST13. The first phase according to the fourth embodiment has the same content as that shown in the first embodiment.
The second phase is a portion surrounded by a broken line frame labeled "P401" in FIG. 8, and is a phase setting value search phase. The phase setting value search phase includes path setting ST31, calibration signal detection ST32, signal power measurement ST33, and confirmation of the number of path switching times ST34.
The third phase is a portion surrounded by a broken line frame labeled "P402" in FIG. 8, and is a calibration phase. The calibration phase includes determining a route that minimizes power ST51, setting a route ST52, detecting a calibration signal ST53, calculating a relative amplitude phase error ST54, calculating a calibration value ST55, and correcting a transmission signal ST56. include.
 位相設定値探索フェーズ(P401)における経路設定ST31は、経路選択指示部130の指示の下、経路選択部120が行う処理ステップである。経路設定ST31において経路選択部120は、バトラーマトリクス回路110の出力ポートのうち1つを、校正信号受信機60へ接続する。ここでの動作は、探索モードの位相制御部40の動作に対応している。 Route setting ST31 in the phase setting value search phase (P401) is a processing step performed by the route selection unit 120 under the direction of the route selection instruction unit 130. In route setting ST31, the route selection section 120 connects one of the output ports of the Butler matrix circuit 110 to the calibration signal receiver 60. The operation here corresponds to the operation of the phase control section 40 in the search mode.
 位相設定値探索フェーズ(P401)における校正信号の検波ST32は、校正信号受信機60が行う処理ステップである。位相設定値探索フェーズ(P401)における校正信号の検波ST32は、実施の形態1に示された位相設定値探索フェーズ(P101)における校正信号の検波ST23と同じ内容である。 Detection ST32 of the calibration signal in the phase setting value search phase (P401) is a processing step performed by the calibration signal receiver 60. The calibration signal detection ST32 in the phase setting value search phase (P401) has the same contents as the calibration signal detection ST23 in the phase setting value search phase (P101) shown in the first embodiment.
 位相設定値探索フェーズ(P401)における信号の電力計測ST33は、電力計測部70が行う処理ステップである。位相設定値探索フェーズ(P401)における信号の電力計測ST33は、実施の形態1に示された位相設定値探索フェーズ(P101)における信号の電力計測ST24と同じ内容である。 Signal power measurement ST33 in the phase setting value search phase (P401) is a processing step performed by the power measurement unit 70. Signal power measurement ST33 in the phase setting value search phase (P401) has the same content as signal power measurement ST24 in the phase setting value search phase (P101) shown in the first embodiment.
 位相設定値探索フェーズ(P401)における経路切替回数の確認ST34は、経路選択指示部130が行う処理ステップである。経路切替回数の確認ST34において経路選択指示部130が行う処理の内容は、実施の形態1に示された位相設定値の変更回数確認ST25において位相制御指示部80が行う処理の内容と同じである。 Confirmation ST34 of the number of route switching in the phase setting value search phase (P401) is a processing step performed by the route selection instruction section 130. The content of the process performed by the route selection instructing unit 130 in confirming the number of route switching times ST34 is the same as the content of the process performed by the phase control instructing unit 80 in confirming the number of changes of the phase setting value ST25 shown in Embodiment 1. .
 校正フェーズ(P402)における電力が最小となる経路決定ST51は、経路選択指示部130が行う処理ステップである。電力が最小となる経路決定ST51において経路選択指示部130は、位相設定値探索フェーズ(P401)で得られた出力ポート情報と電力の計測値との対応関係から、電力の計測値が最小であった信号を出力したバトラーマトリクス回路110の出力ポートを特定する。 The route determination ST51 in which the power in the calibration phase (P402) is minimized is a processing step performed by the route selection instruction unit 130. In ST51, the route selection instruction unit 130 determines the route that minimizes the power, based on the correspondence between the output port information obtained in the phase setting value search phase (P401) and the measured power. The output port of Butler matrix circuit 110 that outputs the signal is specified.
 校正フェーズ(P402)における経路設定ST52は、経路選択指示部130が行う処理ステップである。経路設定ST52において経路選択指示部130は、経路選択部120に対して、電力が最小となる経路決定ST51で特定した出力ポートを選択するよう、指示をする。以降の経路選択指示部130の動作モードは、実施の形態1で示された固定モードに対応する。 Route setting ST52 in the calibration phase (P402) is a processing step performed by the route selection instruction section 130. In route setting ST52, the route selection instruction section 130 instructs the route selection section 120 to select the output port specified in route determination ST51 that has the minimum power. The subsequent operation mode of route selection instruction section 130 corresponds to the fixed mode shown in the first embodiment.
 校正フェーズ(P402)における校正信号の検波ST53は、校正信号受信機60が行う処理ステップである。校正フェーズ(P402)における校正信号の検波ST53は、実施の形態1に示された校正フェーズ(P102)における校正信号の検波ST44と同じ内容である。 Detection ST53 of the calibration signal in the calibration phase (P402) is a processing step performed by the calibration signal receiver 60. The calibration signal detection ST53 in the calibration phase (P402) has the same content as the calibration signal detection ST44 in the calibration phase (P102) shown in the first embodiment.
 校正フェーズ(P402)における相対振幅位相誤差の算出ST54、校正値の算出ST55、及び送信信号の補正ST56は、実施の形態1に示された校正フェーズ(P102)における相対振幅位相誤差の算出ST45、校正値の算出ST47、及び送信信号の補正ST48と、それぞれ同じ内容である。 Relative amplitude phase error calculation ST54, calibration value calculation ST55, and transmission signal correction ST56 in the calibration phase (P402) are the relative amplitude phase error calculation ST45 in the calibration phase (P102) shown in Embodiment 1, The contents are the same as the calibration value calculation ST47 and the transmission signal correction ST48.
 以上のとおり本開示技術は、移相器ではなくバトラーマトリクス回路110を用いるアレーアンテナシステムの校正方法にも適用することができる。 As described above, the disclosed technology can also be applied to a method of calibrating an array antenna system that uses the Butler matrix circuit 110 instead of a phase shifter.
実施の形態5.
 実施の形態5に係るアレーアンテナシステム及びアレーアンテナシステムの校正方法は、本開示技術に係るアレーアンテナシステム及びアレーアンテナシステムの校正方法の変形例である。
 実施の形態5で用いる符号は、特に明記する場合を除き、既出の実施の形態で用いられた符号と同じである。実施の形態5において、既出の実施の形態と重複する説明は、適宜、省略される。
Embodiment 5.
The array antenna system and the method for calibrating an array antenna system according to the fifth embodiment are modified examples of the array antenna system and the method for calibrating the array antenna system according to the presently disclosed technology.
The symbols used in the fifth embodiment are the same as those used in the previously described embodiments, unless otherwise specified. In the fifth embodiment, explanations that overlap with those of the previously described embodiments will be omitted as appropriate.
 図9は、実施の形態5に係るアレーアンテナシステムの機能構成を示すブロック図である。図9に示されるとおり本開示技術に係るアレーアンテナシステムは、遅延補正部140を備えてもよい。 FIG. 9 is a block diagram showing the functional configuration of the array antenna system according to the fifth embodiment. As shown in FIG. 9, the array antenna system according to the present disclosure may include a delay correction section 140.
《遅延補正部140》
 遅延補正部140は、送信系統間の特性のばらつきを、信号の位相の単位ではなく、直接的な時間の単位で補正するための構成要素である。
 遅延補正部140の機能は、図2又は図3に示された処理回路により実現される。
<<Delay correction section 140>>
The delay correction unit 140 is a component for correcting variations in characteristics between transmission systems not in units of signal phase but in units of direct time.
The function of the delay correction section 140 is realized by the processing circuit shown in FIG. 2 or 3.
《実施の形態5に係るアレーアンテナシステムの校正方法について》
 図10は、実施の形態5に係るアレーアンテナシステムの処理ステップを示すフローチャートである。
 図10に示されるとおり実施の形態5に係るアレーアンテナシステムの処理ステップは、図4に示される実施の形態1に係るアレーアンテナシステムの処理ステップに加えて、相対遅延差の算出ST46を含む。相対遅延差の算出ST46は、校正フェーズ(P502)における処理ステップであり、相対振幅位相誤差の算出ST45の後に実施される処理ステップである。
<<About the calibration method of the array antenna system according to the fifth embodiment>>
FIG. 10 is a flowchart showing the processing steps of the array antenna system according to the fifth embodiment.
As shown in FIG. 10, the processing steps of the array antenna system according to the fifth embodiment include calculation ST46 of a relative delay difference in addition to the processing steps of the array antenna system according to the first embodiment shown in FIG. Relative delay difference calculation ST46 is a processing step in the calibration phase (P502), and is a processing step executed after relative amplitude phase error calculation ST45.
 校正フェーズ(P502)における相対遅延差の算出ST46は、遅延補正部140が行う処理ステップである。相対遅延差の算出ST46において遅延補正部140は、時間領域において各送信系統の校正信号を比較し、相対的な時間遅延量を求める。 Calculating the relative delay difference ST46 in the calibration phase (P502) is a processing step performed by the delay correction unit 140. Calculation of Relative Delay Difference In ST46, the delay correction section 140 compares the calibration signals of each transmission system in the time domain and calculates a relative time delay amount.
 校正フェーズ(P502)における校正値の算出ST47は、校正信号解析部100が実施する処理ステップである。実施の形態5の場合、校正値の算出ST47において校正信号解析部100は、振幅位相校正値に加えて、相対的な時間遅延量をキャンセルする時間についての校正値(以降、「時間校正値」と称する)も算出する。 Calibration value calculation ST47 in the calibration phase (P502) is a processing step performed by the calibration signal analysis section 100. In the case of the fifth embodiment, in calibration value calculation ST47, the calibration signal analysis section 100 calculates, in addition to the amplitude phase calibration value, a calibration value for time for canceling the relative time delay amount (hereinafter referred to as "time calibration value"). ) is also calculated.
 校正フェーズ(P502)における送信信号の補正ST48は、DBF部10が実施する処理ステップである。実施の形態5の場合、送信信号の補正ST48においてDBF部10は、振幅位相校正値及び時間校正値を用いて、送信信号を補正する。 Correction ST48 of the transmission signal in the calibration phase (P502) is a processing step performed by the DBF unit 10. In the case of the fifth embodiment, in correction ST48 of the transmission signal, the DBF section 10 corrects the transmission signal using the amplitude phase calibration value and the time calibration value.
 以上のとおり本開示技術は、送信系統間の特性のばらつきを、信号の位相の単位ではなく、直接的な時間の単位で補正することができる。 As described above, the disclosed technology can correct variations in characteristics between transmission systems not in units of signal phase but in direct units of time.
実施の形態6.
 実施の形態6に係るアレーアンテナシステム及びアレーアンテナシステムの校正方法は、本開示技術に係るアレーアンテナシステム及びアレーアンテナシステムの校正方法の変形例である。
 実施の形態6で用いる符号は、特に明記する場合を除き、既出の実施の形態で用いられた符号と同じである。実施の形態6において、既出の実施の形態と重複する説明は、適宜、省略される。
Embodiment 6.
The array antenna system and the method for calibrating the array antenna system according to the sixth embodiment are modifications of the array antenna system and the method for calibrating the array antenna system according to the presently disclosed technology.
The symbols used in the sixth embodiment are the same as those used in the previously described embodiments, unless otherwise specified. In the sixth embodiment, descriptions that overlap with those of the previously described embodiments will be omitted as appropriate.
 図11は、実施の形態6に係るアレーアンテナシステムの機能構成を示すブロック図である。図11に示されるとおり本開示技術に係るアレーアンテナシステムは、校正トリガ指示部150を備えてもよい。
 図11に示されるとおり校正トリガ指示部150は、電力計測部70からの情報を取得し、校正信号生成部30に指示を出すように接続されている。
FIG. 11 is a block diagram showing the functional configuration of an array antenna system according to Embodiment 6. As shown in FIG. 11, the array antenna system according to the present disclosure may include a calibration trigger instruction section 150.
As shown in FIG. 11, the calibration trigger instruction section 150 is connected to acquire information from the power measurement section 70 and issue an instruction to the calibration signal generation section 30.
《校正トリガ指示部150》
 校正トリガ指示部150は、新たな校正を開始する判断をした場合のトリガを出力するための構成要素である。
 校正トリガ指示部150の機能は、図2又は図3に示された処理回路により実現される。
<<Calibration trigger instruction section 150>>
The calibration trigger instruction unit 150 is a component for outputting a trigger when it is determined to start a new calibration.
The functions of the calibration trigger instruction section 150 are realized by the processing circuit shown in FIG. 2 or 3.
《実施の形態6に係るアレーアンテナシステムの校正方法について》
 図12は、実施の形態6に係るアレーアンテナシステムの処理ステップを示すフローチャートである。
 図12に示されるとおり実施の形態6に係るアレーアンテナシステムの処理ステップは、図4に示される実施の形態1に係るアレーアンテナシステムの処理ステップに加えて、信号の電力測定ST01と、電力値の確認ST02と、を含む。
 図12において「P601」と表記された破線の枠により囲まれた部分は、「校正実施判断フェーズ」と称する。実施の形態6で追加された信号の電力測定ST01及び電力値の確認ST02の処理ステップは、校正実施判断フェーズに含まれる。
<<About the calibration method of the array antenna system according to the sixth embodiment>>
FIG. 12 is a flowchart showing the processing steps of the array antenna system according to the sixth embodiment.
As shown in FIG. 12, the processing steps of the array antenna system according to the sixth embodiment include, in addition to the processing steps of the array antenna system according to the first embodiment shown in FIG. Confirmation ST02 is included.
In FIG. 12, a portion surrounded by a broken line frame labeled "P601" is referred to as a "calibration implementation determination phase." The processing steps of signal power measurement ST01 and power value confirmation ST02 added in the sixth embodiment are included in the calibration implementation determination phase.
 校正実施判断フェーズ(P601)における信号の電力測定ST01は、電力計測部70が行う処理ステップである。信号の電力測定ST01において電力計測部70は、校正信号受信機60から送られた信号の電力量を計測する。 Signal power measurement ST01 in the calibration implementation determination phase (P601) is a processing step performed by the power measurement unit 70. Signal Power Measurement In ST01, the power measurement unit 70 measures the amount of power of the signal sent from the calibration signal receiver 60.
 校正実施判断フェーズ(P601)における電力値の確認ST02は、校正トリガ指示部150が実施する処理ステップである。電力値の確認ST02において校正トリガ指示部150は、電力計測部70で計測した電力量が、予め設定されている閾値を下回ったかを判断する。
 電力計測部70で計測した電力量が予め設定されている閾値を下回った場合(YESの場合)、処理ステップは校正信号の生成ST11へ進む。電力計測部70で計測した電力量が予め設定されている閾値を下回っていない場合(NOの場合)、処理ステップは、信号の電力測定ST01へ戻る。
The power value confirmation ST02 in the calibration execution determination phase (P601) is a processing step executed by the calibration trigger instruction section 150. In power value confirmation ST02, the calibration trigger instruction section 150 determines whether the amount of power measured by the power measurement section 70 is less than a preset threshold.
If the amount of power measured by the power measuring unit 70 is less than the preset threshold (in the case of YES), the processing step proceeds to calibration signal generation ST11. If the power amount measured by the power measurement unit 70 is not below the preset threshold (NO), the processing step returns to signal power measurement ST01.
 図13は、計測する電力量の時系列変化を表したグラフであり、新たな校正を開始するタイミングを説明するものである。図13に示されるグラフにおいて、横軸は時間を、縦軸は電力計測部70で計測した電力量を、それぞれ表す。また図13に示されるグラフにおいて、「Threshold Power」と表示された破線は、校正トリガ指示部150が用いる電力量の閾値を表す。さらに図13に示されるグラフにおいて、「Calibration Trigger」と表示された矢印は、校正トリガ指示部150がトリガを出力するタイミングを表している。 FIG. 13 is a graph showing a time-series change in the amount of electric power to be measured, and is used to explain the timing to start a new calibration. In the graph shown in FIG. 13, the horizontal axis represents time, and the vertical axis represents the amount of power measured by the power measurement unit 70, respectively. Furthermore, in the graph shown in FIG. 13, the broken line labeled "Threshold Power" represents the threshold value of the amount of power used by the calibration trigger instruction section 150. Furthermore, in the graph shown in FIG. 13, the arrow labeled "Calibration Trigger" represents the timing at which the calibration trigger instruction section 150 outputs a trigger.
 図13に示された校正実施判断フェーズ(P601)より先の処理ステップは、実施の形態1に示された処理ステップと同じ内容である。 The processing steps after the calibration implementation determination phase (P601) shown in FIG. 13 are the same as the processing steps shown in the first embodiment.
 以上のとおり実施の形態6に係るアレーアンテナシステムは校正トリガ指示部150を含むため、合成電界の大きさを閾値と比較することができ、新たな校正を開始する判断をすることができる。 As described above, since the array antenna system according to the sixth embodiment includes the calibration trigger instruction section 150, the magnitude of the combined electric field can be compared with a threshold value, and it can be determined to start a new calibration.
 なお、本開示技術に係るアレーアンテナシステム及びアレーアンテナシステムの校正方法は、各実施の形態に例示した態様に限定されず、各実施の形態を組み合わせ、実施の形態のそれぞれの任意の構成要素を変形し、又は実施の形態のそれぞれにおいて任意の構成要素を省略することができる。 Note that the array antenna system and the method for calibrating the array antenna system according to the disclosed technology are not limited to the aspects exemplified in each embodiment, but may be performed by combining each embodiment or using any component of each of the embodiments. Any component may be modified or omitted in each of the embodiments.
 本開示技術に係るアレーアンテナシステム及びアレーアンテナシステムの校正方法は、例えば、携帯電話等のセルラーシステムにおいて、CDMA方式を用いたアダプティブなアレーアンテナシステムに応用でき、産業上の利用可能性を有する。 The array antenna system and the method for calibrating the array antenna system according to the presently disclosed technology can be applied to an adaptive array antenna system using the CDMA method in, for example, a cellular system such as a mobile phone, and has industrial applicability.
 1 アンテナ素子、2 抽出部、3 送信機、4 注入部、10 DBF部、20 信号処理部、30 校正信号生成部、40 位相制御部、50 電力合成部、60 校正信号受信機、70 電力計測部、80 位相制御指示部、90 校正信号位相オフセット部、100 校正信号解析部、110 バトラーマトリクス回路、120 経路選択部、130 経路選択指示部、140 遅延補正部、150 校正トリガ指示部、500 処理回路、502 CPU、504 メモリ。 1 antenna element, 2 extraction unit, 3 transmitter, 4 injection unit, 10 DBF unit, 20 signal processing unit, 30 calibration signal generation unit, 40 phase control unit, 50 power combination unit, 60 calibration signal receiver, 70 power measurement unit, 80 phase control instruction unit, 90 calibration signal phase offset unit, 100 calibration signal analysis unit, 110 Butler matrix circuit, 120 route selection unit, 130 route selection instruction unit, 140 delay correction unit, 150 calibration trigger instruction unit, 500 processing Circuit, 502 CPU, 504 Memory.

Claims (14)

  1.  複数の送信系統を備えるアレーアンテナシステムであって、
     校正信号を生成する校正信号生成部と、
     前記送信系統から抽出した送信信号と前記校正信号とからなる抽出信号の位相を制御する位相制御部と、
     前記位相制御部で位相が制御された複数の信号を合成する電力合成部と、
     前記電力合成部で合成された信号を復調する校正信号受信機と、
     前記校正信号受信機で復調された信号の電力を計測する電力計測部と、
     前記電力計測部で計測された電力の計測値に基づいて、前記位相制御部に対して制御する位相量を指示する位相制御指示部と、を備える、
    アレーアンテナシステム。
    An array antenna system comprising multiple transmission systems,
    a calibration signal generation unit that generates a calibration signal;
    a phase control unit that controls the phase of an extracted signal consisting of a transmission signal extracted from the transmission system and the calibration signal;
    a power combining unit that combines a plurality of signals whose phases have been controlled by the phase control unit;
    a calibration signal receiver that demodulates the signal combined by the power combining section;
    a power measurement unit that measures the power of the signal demodulated by the calibration signal receiver;
    a phase control instruction unit that instructs the phase control unit to control a phase amount based on the measured value of power measured by the power measurement unit;
    array antenna system.
  2.  前記位相制御指示部は、前記電力計測部で計測される電力が前記位相量に対して正弦波を描くように変化する性質に基づいて、電力の前記計測値が最小となる前記位相量を位相設定値として求め、前記位相制御部に対して移相器を前記位相設定値に制御するよう指示する、
    請求項1に記載のアレーアンテナシステム。
    The phase control instruction unit sets the phase amount at which the measured value of power is the minimum based on the property that the power measured by the power measurement unit changes so as to draw a sine wave with respect to the phase amount. determining it as a set value and instructing the phase control unit to control the phase shifter to the phase set value;
    The array antenna system according to claim 1.
  3.  前記校正信号に対して、前記位相設定値だけ位相を相殺調整する校正信号位相オフセット部と、
     前記校正信号受信機で復調された信号と、前記校正信号位相オフセット部で調整された信号と、に基づいて、相対振幅位相誤差を算出する校正信号解析部と、
     前記相対振幅位相誤差がなくなるように前記送信信号を補正した上で、デジタルビームフォーミングを行うDBF部と、をさらに備える、
    請求項2に記載のアレーアンテナシステム。
    a calibration signal phase offset unit that offsets and adjusts the phase of the calibration signal by the phase setting value;
    a calibration signal analysis unit that calculates a relative amplitude phase error based on the signal demodulated by the calibration signal receiver and the signal adjusted by the calibration signal phase offset unit;
    further comprising: a DBF unit that corrects the transmission signal so that the relative amplitude phase error is eliminated, and then performs digital beamforming;
    The array antenna system according to claim 2.
  4.  複数の送信系統を備えるアレーアンテナシステムの校正方法であって、
     アレーアンテナシステムの校正信号生成部が、校正信号を生成し、
     アレーアンテナシステムの位相制御部が、前記送信系統から抽出した送信信号と前記校正信号とからなる抽出信号の位相を制御し、
     アレーアンテナシステムの電力合成部が、前記位相制御部で位相が制御された複数の信号を合成し、
     アレーアンテナシステムの校正信号受信機が、前記電力合成部で合成された信号を復調し、
     アレーアンテナシステムの電力計測部が、前記校正信号受信機で復調された信号の電力を計測し、
     アレーアンテナシステムの位相制御指示部が、前記電力計測部で計測された電力の計測値に基づいて、前記位相制御部に対して制御する位相量を指示する、
    アレーアンテナシステムの校正方法。
    A method for calibrating an array antenna system having multiple transmission systems, the method comprising:
    A calibration signal generation section of the array antenna system generates a calibration signal,
    A phase control unit of the array antenna system controls the phase of an extracted signal consisting of a transmission signal extracted from the transmission system and the calibration signal,
    A power combining unit of the array antenna system combines the plurality of signals whose phases have been controlled by the phase control unit,
    A calibration signal receiver of the array antenna system demodulates the signal combined by the power combining section,
    A power measurement unit of the array antenna system measures the power of the signal demodulated by the calibration signal receiver,
    A phase control instructing unit of the array antenna system instructs the phase control unit to control a phase amount based on the power measurement value measured by the power measuring unit.
    How to calibrate an array antenna system.
  5.  前記位相制御指示部が、前記電力計測部で計測される電力が前記位相量に対して正弦波を描くように変化する性質に基づいて、電力の前記計測値が最小となる前記位相量を位相設定値として求め、前記位相制御部に対して移相器を前記位相設定値に制御するよう指示する、
    請求項4に記載のアレーアンテナシステムの校正方法。
    The phase control instruction section sets the phase amount at which the measured value of power is the minimum based on the property that the power measured by the power measurement section changes so as to draw a sine wave with respect to the phase amount. determining it as a set value and instructing the phase control unit to control the phase shifter to the phase set value;
    The method for calibrating an array antenna system according to claim 4.
  6.  校正信号位相オフセット部が、前記校正信号に対して、前記位相設定値だけ位相を相殺調整し、
     校正信号解析部が、前記校正信号受信機で復調された信号と、前記校正信号位相オフセット部で調整された信号と、に基づいて、相対振幅位相誤差を算出し、
     DBF部が、前記相対振幅位相誤差がなくなるように前記送信信号を補正し、デジタルビームフォーミングを行う、
    請求項5に記載のアレーアンテナシステムの校正方法。
    a calibration signal phase offset unit adjusts the phase of the calibration signal by offsetting the phase setting value;
    a calibration signal analysis unit calculates a relative amplitude phase error based on the signal demodulated by the calibration signal receiver and the signal adjusted by the calibration signal phase offset unit,
    a DBF unit corrects the transmission signal so that the relative amplitude phase error is eliminated, and performs digital beamforming;
    The method for calibrating an array antenna system according to claim 5.
  7.  前記位相制御部による位相の制御は、直近の校正で得られた位相設定値を解の候補として行う、
     請求項4に記載のアレーアンテナシステムの校正方法。
    The phase control by the phase control unit is performed using a phase setting value obtained in the most recent calibration as a solution candidate.
    The method for calibrating an array antenna system according to claim 4.
  8.  前記位相制御指示部が、固定設定値切換え時に、修正位相量を前記位相制御部に指示する、
     請求項4に記載のアレーアンテナシステムの校正方法。
    The phase control instruction section instructs the phase control section to correct the phase amount when switching the fixed set value;
    The method for calibrating an array antenna system according to claim 4.
  9.  複数の送信系統を備えるアレーアンテナシステムであって、
     校正信号を生成する校正信号生成部と、
     入力ポートに、前記送信系統から抽出した送信信号と前記校正信号とからなる抽出信号が入力され、複数の移相設定値で合成し、それぞれを異なる出力ポートに出力するバトラーマトリクス回路と、
     前記バトラーマトリクス回路の前記出力ポートを切り替えるスイッチとして機能する経路選択部と、
     前記経路選択部を経由した信号を復調する校正信号受信機と、
     前記校正信号受信機で復調された信号の電力を計測する電力計測部と、
     前記電力計測部で計測された電力の計測値に基づいて、前記経路選択部に対し、前記出力ポートの切換えを指示する経路選択指示部と、を備える、
    アレーアンテナシステム。
    An array antenna system comprising multiple transmission systems,
    a calibration signal generation unit that generates a calibration signal;
    a Butler matrix circuit that receives an extracted signal consisting of a transmission signal extracted from the transmission system and the calibration signal into an input port, synthesizes it with a plurality of phase shift setting values, and outputs each of the signals to different output ports;
    a path selection unit that functions as a switch for switching the output port of the Butler matrix circuit;
    a calibration signal receiver that demodulates the signal that has passed through the route selection section;
    a power measurement unit that measures the power of the signal demodulated by the calibration signal receiver;
    a route selection instructing unit that instructs the route selecting unit to switch the output port based on the power measurement value measured by the power measuring unit;
    array antenna system.
  10.  前記経路選択指示部は、電力の前記計測値が最小となる前記バトラーマトリクス回路の前記出力ポートを特定し、位相設定値を決定し、前記経路選択部に対して、特定した前記出力ポートに切り替えるよう、指示をする、
    請求項9に記載のアレーアンテナシステム。
    The route selection instruction unit specifies the output port of the Butler matrix circuit where the measured value of power is the minimum, determines a phase setting value, and causes the route selection unit to switch to the specified output port. give instructions,
    The array antenna system according to claim 9.
  11.  前記校正信号に対して、前記位相設定値だけ位相を相殺調整する校正信号位相オフセット部と、
     前記校正信号受信機で復調された信号と、前記校正信号位相オフセット部で調整された信号と、に基づいて、相対振幅位相誤差を算出する校正信号解析部と、
     前記相対振幅位相誤差がなくなるように前記送信信号を補正した上で、デジタルビームフォーミングを行うDBF部と、をさらに備える、
    請求項10に記載のアレーアンテナシステム。
    a calibration signal phase offset unit that offsets and adjusts the phase of the calibration signal by the phase setting value;
    a calibration signal analysis unit that calculates a relative amplitude phase error based on the signal demodulated by the calibration signal receiver and the signal adjusted by the calibration signal phase offset unit;
    further comprising: a DBF unit that corrects the transmission signal so that the relative amplitude phase error is eliminated, and then performs digital beamforming;
    The array antenna system according to claim 10.
  12.  複数の送信系統を備えるアレーアンテナシステムの校正方法であって、
     アレーアンテナシステムの校正信号生成部が、校正信号を生成し、
     入力ポートに、前記送信系統から抽出した送信信号と前記校正信号とからなる抽出信号が入力されるアレーアンテナシステムのバトラーマトリクス回路が、複数の移相設定値で合成し、それぞれを異なる出力ポートに出力し、
     アレーアンテナシステムの経路選択部が、前記バトラーマトリクス回路の前記出力ポートを切り替えるスイッチとして機能し、
     アレーアンテナシステムの校正信号受信機が、前記経路選択部を経由した信号を復調し、
     アレーアンテナシステムの電力計測部が、前記校正信号受信機で復調された信号の電力を計測し、
     アレーアンテナシステムの経路選択指示部が、前記電力計測部で計測された電力の計測値に基づいて、前記経路選択部に対し、前記出力ポートの切換えを指示する、
    アレーアンテナシステムの校正方法。
    A method for calibrating an array antenna system having multiple transmission systems, the method comprising:
    A calibration signal generation section of the array antenna system generates a calibration signal,
    A Butler matrix circuit of an array antenna system, in which an extracted signal consisting of a transmission signal extracted from the transmission system and the calibration signal is inputted to an input port, synthesizes the signal using a plurality of phase shift setting values, and outputs each signal to a different output port. output,
    A route selection unit of the array antenna system functions as a switch for switching the output port of the Butler matrix circuit,
    A calibration signal receiver of the array antenna system demodulates the signal that has passed through the route selection section,
    A power measurement unit of the array antenna system measures the power of the signal demodulated by the calibration signal receiver,
    A route selection instruction unit of the array antenna system instructs the route selection unit to switch the output port based on the power measurement value measured by the power measurement unit.
    How to calibrate an array antenna system.
  13.  前記経路選択指示部が、電力の前記計測値が最小となる前記バトラーマトリクス回路の前記出力ポートを特定し、位相設定値を決定し、前記経路選択部に対して、特定した前記出力ポートに切り替えるよう、指示をする、
    請求項12に記載のアレーアンテナシステムの校正方法。
    The route selection instruction unit identifies the output port of the Butler matrix circuit where the measured value of power is the minimum, determines a phase setting value, and causes the route selection unit to switch to the identified output port. give instructions,
    The method for calibrating an array antenna system according to claim 12.
  14.  校正信号位相オフセット部が、前記校正信号に対して、前記位相設定値だけ位相を相殺調整し、
     校正信号解析部が、前記校正信号受信機で復調された信号と、前記校正信号位相オフセット部で調整された信号と、に基づいて、相対振幅位相誤差を算出し、
     DBF部が、前記相対振幅位相誤差がなくなるように前記送信信号を補正した上で、デジタルビームフォーミングを行う、
    請求項13に記載のアレーアンテナシステムの校正方法。
    a calibration signal phase offset unit adjusts the phase of the calibration signal by offsetting the phase setting value;
    a calibration signal analysis unit calculates a relative amplitude phase error based on the signal demodulated by the calibration signal receiver and the signal adjusted by the calibration signal phase offset unit,
    a DBF unit corrects the transmission signal so that the relative amplitude phase error is eliminated, and then performs digital beamforming;
    The method for calibrating an array antenna system according to claim 13.
PCT/JP2022/013365 2022-03-23 2022-03-23 Array antenna system and calibration method for array antenna system WO2023181146A1 (en)

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WO2004109952A1 (en) * 2003-06-02 2004-12-16 Fujitsu Limited Array antenna communication device and array antenna communication device calibration method
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WO2004109952A1 (en) * 2003-06-02 2004-12-16 Fujitsu Limited Array antenna communication device and array antenna communication device calibration method
WO2018194004A1 (en) * 2017-04-19 2018-10-25 日本電気株式会社 Processing device, processing method, processing program and calibration device for array antenna
WO2020021628A1 (en) * 2018-07-24 2020-01-30 三菱電機株式会社 Calibration device and calibration method of array antenna, array antenna, and program
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