WO2023127643A1 - 積層セラミックコンデンサ - Google Patents

積層セラミックコンデンサ Download PDF

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Publication number
WO2023127643A1
WO2023127643A1 PCT/JP2022/047111 JP2022047111W WO2023127643A1 WO 2023127643 A1 WO2023127643 A1 WO 2023127643A1 JP 2022047111 W JP2022047111 W JP 2022047111W WO 2023127643 A1 WO2023127643 A1 WO 2023127643A1
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Prior art keywords
layer
internal electrode
dielectric
layers
ceramic capacitor
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PCT/JP2022/047111
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English (en)
French (fr)
Japanese (ja)
Inventor
徹 若松
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Murata Manufacturing Co Ltd
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Murata Manufacturing Co Ltd
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Priority to JP2023570903A priority Critical patent/JPWO2023127643A1/ja
Priority to KR1020247017473A priority patent/KR20240090991A/ko
Priority to CN202280086256.1A priority patent/CN118451521A/zh
Publication of WO2023127643A1 publication Critical patent/WO2023127643A1/ja
Priority to US18/661,768 priority patent/US20240296995A1/en
Anticipated expiration legal-status Critical
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/005—Electrodes
    • H01G4/008—Selection of materials
    • H01G4/0085—Fried electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/005—Electrodes
    • H01G4/008—Selection of materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/005—Electrodes
    • H01G4/012—Form of non-self-supporting electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/018—Dielectrics
    • H01G4/06—Solid dielectrics
    • H01G4/08—Inorganic dielectrics
    • H01G4/12—Ceramic dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/018—Dielectrics
    • H01G4/06—Solid dielectrics
    • H01G4/08—Inorganic dielectrics
    • H01G4/12—Ceramic dielectrics
    • H01G4/1209—Ceramic dielectrics characterised by the ceramic dielectric material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/018—Dielectrics
    • H01G4/06—Solid dielectrics
    • H01G4/08—Inorganic dielectrics
    • H01G4/12—Ceramic dielectrics
    • H01G4/1209—Ceramic dielectrics characterised by the ceramic dielectric material
    • H01G4/1218—Ceramic dielectrics characterised by the ceramic dielectric material based on titanium oxides or titanates
    • H01G4/1227—Ceramic dielectrics characterised by the ceramic dielectric material based on titanium oxides or titanates based on alkaline earth titanates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/228—Terminals
    • H01G4/232—Terminals electrically connecting two or more layers of a stacked or rolled capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/228—Terminals
    • H01G4/232—Terminals electrically connecting two or more layers of a stacked or rolled capacitor
    • H01G4/2325—Terminals electrically connecting two or more layers of a stacked or rolled capacitor characterised by the material of the terminals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/30—Stacked capacitors
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/13—Energy storage using capacitors

Definitions

  • the present invention relates to a multilayer ceramic capacitor.
  • a multilayer ceramic capacitor is known in which a plurality of dielectric layers made of a ceramic material and a plurality of internal electrode layers are laminated. Further miniaturization, higher capacity, and improved reliability are required for such multilayer ceramic capacitors. Therefore, attempts have been made to reduce the thickness of the dielectric layers, to reduce the thickness of the internal electrode layers, and to increase the number of these layers laminated.
  • Patent Document 1 discloses a problem that short-circuit failure occurs between internal electrode layers when dielectric layers are thinned.
  • Patent Literature 1 discloses an invention that solves this problem and suppresses deterioration in reliability by including a conductive layer between internal electrode layers.
  • a plurality of through holes are formed in the internal electrode layers.
  • Each of the plurality of through-holes is filled with a portion of the adjacent dielectric layer, and it appears that the adjacent dielectric layers are connected. It is called a dielectric connection. If a dielectric connection is formed in the internal electrode layer, the life, ie reliability, of the multilayer ceramic capacitor may be reduced.
  • An object of the present invention is to provide a multilayer ceramic capacitor that suppresses deterioration in reliability.
  • the inventors of the present application have found that electric field concentration occurs in the dielectric connecting portions formed in the internal electrode layers, and as a result, the service life, that is, the reliability, of the multilayer ceramic capacitor is reduced. obtained new knowledge.
  • the inventors of the present application have found that a solid solution in which a metal different from the main component metal of the internal electrode layers, such as Ni, is solid-solved at the interface between the dielectric connecting portion and the internal electrode layers, such as Sn.
  • a new finding was obtained that the formation of the layers suppresses the concentration of the electric field and, as a result, suppresses the deterioration of the life, ie reliability, of the multilayer ceramic capacitor.
  • a laminated ceramic capacitor according to the present invention is a laminated ceramic capacitor in which a plurality of dielectric layers made of a ceramic material and a plurality of internal electrode layers are laminated, wherein each of the plurality of internal electrode layers is a first and each of the plurality of internal electrode layers is filled with a portion of the adjacent dielectric layer penetrating in the stacking direction to connect the adjacent dielectric layers.
  • a plurality of dielectric connecting portions are formed, and a solid solution layer in which a second metal different from the first metal is solid-dissolved is formed at an interface between the dielectric connecting portion and the internal electrode layer.
  • the content of the second metal in the solid solution layer is 0.1 mol % or more and 10 mol % or less with respect to 100 mol of the first metal.
  • FIG. 1 is a perspective view showing a laminated ceramic capacitor according to this embodiment
  • FIG. FIG. 2 is a sectional view (LT section) taken along the line II-II of the multilayer ceramic capacitor shown in FIG. 1
  • FIG. 2 is a sectional view (WT section) taken along line III-III of the multilayer ceramic capacitor shown in FIG. 1
  • 3 is an enlarged cross-sectional view of the IV portion of the multilayer ceramic capacitor shown in FIG. 2
  • FIG. FIG. 3 is an enlarged cross-sectional view of a V portion of the multilayer ceramic capacitor shown in FIG. 2;
  • FIG. 1 is a perspective view showing a laminated ceramic capacitor according to the present embodiment
  • FIG. 2 is a sectional view taken along line II-II of the laminated ceramic capacitor shown in FIG. 1, and FIG. It is the III-III line sectional view of a capacitor.
  • a laminated ceramic capacitor 1 shown in FIGS. 1 to 3 includes a laminated body 10 and external electrodes 40 .
  • External electrode 40 includes a first external electrode 41 and a second external electrode 42 .
  • the X direction is the length direction L of the multilayer ceramic capacitor 1 and the multilayer body 10
  • the Y direction is the width direction W of the multilayer ceramic capacitor 1 and the multilayer body 10
  • the Z direction is the lamination of the multilayer ceramic capacitor 1 and the multilayer body 10.
  • direction T. 2 is also called the LT section
  • the section shown in FIG. 3 is also called the WT section.
  • length direction L, width direction W, and stacking direction T are not necessarily orthogonal to each other, and may intersect each other.
  • the laminate 10 has a substantially rectangular parallelepiped shape, and includes a first main surface TS1 and a second main surface TS2 facing in the lamination direction T, and a first side surface WS1 and a second side surface WS2 facing in the width direction W. , a first end surface LS1 and a second end surface LS2 facing each other in the length direction L. As shown in FIG.
  • a corner is a portion where three surfaces of the laminate 10 intersect, and a ridge is a portion where two surfaces of the laminate 10 intersect.
  • the laminate 10 has a plurality of dielectric layers 20 and a plurality of internal electrode layers 30 laminated in the lamination direction T. As shown in FIGS. In addition, the laminate 10 has, in the stacking direction T, an inner layer portion 100, and a first outer layer portion 101 and a second outer layer portion 102 which are arranged to sandwich the inner layer portion 100 therebetween.
  • the inner layer section 100 includes a portion of the multiple dielectric layers 20 and multiple internal electrode layers 30 .
  • a plurality of internal electrode layers 30 are arranged facing each other with the dielectric layers 20 interposed therebetween.
  • the inner layer portion 100 is a portion that generates capacitance and substantially functions as a capacitor.
  • the first outer layer portion 101 is arranged on the first main surface TS1 side of the laminate 10, and the second outer layer portion 102 is arranged on the second main surface TS2 side of the laminate 10. More specifically, the first outer layer portion 101 is arranged between the internal electrode layer 30 closest to the first main surface TS1 among the plurality of internal electrode layers 30 and the first main surface TS1. , the second outer layer portion 102 is arranged between the internal electrode layer 30 closest to the second main surface TS2 among the plurality of internal electrode layers 30 and the second main surface TS2.
  • the first outer layer portion 101 and the second outer layer portion 102 do not include the internal electrode layer 30, and include portions of the plurality of dielectric layers 20 other than the portion for the inner layer portion 100, respectively.
  • the first outer layer portion 101 and the second outer layer portion 102 are portions that function as protective layers for the inner layer portion 100 .
  • a dielectric ceramic containing BaTiO 3 , CaTiO 3 , SrTiO 3 , CaZrO 3 or the like as a main component can be used.
  • a Mn compound, an Fe compound, a Cr compound, a Co compound, a Ni compound, or the like may be added as an accessory component.
  • the thickness of the dielectric layer 20 is not particularly limited, it is preferably 0.40 ⁇ m or more and 0.50 ⁇ m or less, more preferably 0.40 ⁇ m or more and 0.45 ⁇ m or less.
  • the number of dielectric layers 20 is not particularly limited, but is preferably 100 or more and 2000 or less, for example.
  • the number of dielectric layers 20 is the total number of dielectric layers in the inner layer portion and the number of dielectric layers in the outer layer portion.
  • the multiple internal electrode layers 30 include multiple first internal electrode layers 31 and multiple second internal electrode layers 32 .
  • the plurality of first internal electrode layers 31 and the plurality of second internal electrode layers 32 are alternately arranged in the stacking direction T of the stack 10 .
  • the first internal electrode layer 31 includes a counter electrode portion 311 and a lead electrode portion 312
  • the second internal electrode layer 32 includes a counter electrode portion 321 and a lead electrode portion 322 .
  • the counter electrode portion 311 and the counter electrode portion 321 face each other in the stacking direction T of the laminate 10 with the dielectric layer 20 interposed therebetween.
  • the shape of the counter electrode portion 311 and the counter electrode portion 321 is not particularly limited, and may be, for example, a substantially rectangular shape.
  • the counter electrode portion 311 and the counter electrode portion 321 are portions that generate capacitance and substantially function as capacitors.
  • the extraction electrode portion 312 extends from the counter electrode portion 311 toward the first end face LS1 of the laminate 10 and is exposed at the first end face LS1.
  • the extraction electrode portion 322 extends from the counter electrode portion 321 toward the second end surface LS2 of the laminate 10 and is exposed at the second end surface LS2.
  • the shape of the extraction electrode portion 312 and the extraction electrode portion 322 is not particularly limited, and may be, for example, a substantially rectangular shape.
  • the first internal electrode layer 31 is connected to the first external electrode 41, and the first internal electrode layer 31 and the second end face LS2 of the laminate 10, that is, the second external electrode 42, are connected.
  • the second internal electrode layer 32 is connected to the second external electrode 42, and between the second internal electrode layer 32 and the first end surface LS1 of the laminate 10, that is, the first external electrode 41, there is a gap in
  • the first internal electrode layer 31 and the second internal electrode layer 32 contain metal Ni as a main component.
  • the first internal electrode layer 31 and the second internal electrode layer 32 are formed of metals such as Cu, Ag, Pd, or Au, or alloys containing at least one of these metals, such as Ag—Pd alloys. , may be included as a main component, or may be included as a component other than the main component.
  • the first internal electrode layer 31 and the second internal electrode layer 32 may contain dielectric particles having the same composition as the ceramic contained in the dielectric layer 20 as a component other than the main component.
  • the metal of the main component is defined as the metal component with the highest weight percentage.
  • the thickness of the first internal electrode layer 31 and the second internal electrode layer 32 is not particularly limited, but is preferably 0.30 ⁇ m or more and 0.40 ⁇ m or less, and preferably 0.30 ⁇ m or more and 0.35 ⁇ m or less. more preferred.
  • the number of the first internal electrode layers 31 and the second internal electrode layers 32 is not particularly limited, but is preferably 10 or more and 1000 or less.
  • the laminate 10 includes, in the width direction W, an electrode facing portion W30 facing the internal electrode layers 30, and a first side gap portion WG1 and a first side gap portion WG1 arranged to sandwich the electrode facing portion W30. 2 side gap portions WG2.
  • the first side gap portion WG1 is located between the electrode facing portion W30 and the first side surface WS1
  • the second side gap portion WG2 is located between the electrode facing portion W30 and the second side surface WS2. do.
  • first side gap portion WG1 is located between the end of the internal electrode layer 30 on the side of the first side surface WS1 and the first side surface WS1
  • second side gap portion WG2 is It is located between the end of the internal electrode layer 30 on the side of the second side surface WS2 and the second side surface WS2.
  • the first side gap portion WG1 and the second side gap portion WG2 do not include the internal electrode layers 30, and include only the dielectric layers 20.
  • the first side gap portion WG1 and the second side gap portion WG2 are portions that function as protective layers for the internal electrode layers 30 .
  • the first side gap portion WG1 and the second side gap portion WG2 are also referred to as W gaps.
  • the laminate 10 includes, in the length direction L, an electrode facing portion L30 where the first internal electrode layer 31 and the second internal electrode layer 32 of the internal electrode layer 30 face each other, and a first end gap portion LG1 and a second end gap portion LG2.
  • the first end gap portion LG1 is located between the electrode facing portion L30 and the first end surface LS1
  • the second end gap portion LG2 is located between the electrode facing portion L30 and the second end surface LS2. do. More specifically, the first end gap portion LG1 is located between the end of the second internal electrode layer 32 on the side of the first end surface LS1 and the first end surface LS1.
  • LG2 is located between the end of the first internal electrode layer 31 on the second end surface LS2 side and the second end surface LS2.
  • the first end gap portion LG1 does not include the second internal electrode layer 32 and includes the first internal electrode layer 31 and the dielectric layer 20, and the second end gap portion LG2 includes the first internal electrode layer 31 and the dielectric layer 20. 31 but includes the second internal electrode layer 32 and the dielectric layer 20 .
  • the first end gap portion LG1 is a portion that functions as a lead electrode portion to the first end surface LS1 of the first internal electrode layer 31, and the second end gap portion LG2 is a portion that functions as the second internal electrode layer 32. This is a portion that functions as a lead-out electrode portion to the second end surface LS2 of the .
  • the first end gap portion LG1 and the second end gap portion LG2 are also called L gaps.
  • the counter electrode portion 311 of the first internal electrode layer 31 and the counter electrode portion 321 of the second internal electrode layer 32 are positioned in the electrode facing portion L30. Further, the extraction electrode portion 312 of the first internal electrode layer 31 described above is located in the first end gap portion LG1, and the extraction electrode portion 312 of the second internal electrode layer 32 described above is located in the second end gap portion LG2. An extraction electrode portion 322 is located.
  • the thickness in the stacking direction T is preferably 0.10 mm or more and 0.50 mm or less.
  • each value may be an average value of measured values at a plurality of locations in the length direction, or may be an average value of measured values at a plurality of locations in the stacking direction.
  • each value may be an average value of measured values at a plurality of locations in the length direction or width direction.
  • a method of measuring the length of the laminate 10 for example, there is a method of observing the LT cross section near the center in the width direction of the laminate exposed by polishing with a scanning electron microscope.
  • each value may be an average value of measured values at a plurality of locations in the stacking direction.
  • each value may be an average value of measured values at a plurality of locations in the stacking direction.
  • the external electrode 40 includes a first external electrode 41 and a second external electrode 42 .
  • the first external electrode 41 is arranged on the first end surface LS1 of the laminate 10 and connected to the first internal electrode layer 31 .
  • the first external electrode 41 may extend from the first end surface LS1 to part of the first main surface TS1 and part of the second main surface TS2. Also, the first external electrode 41 may extend from the first end surface LS1 to a portion of the first side surface WS1 and a portion of the second side surface WS2.
  • the second external electrode 42 is arranged on the second end face LS2 of the laminate 10 and connected to the second internal electrode layer 32 .
  • the second external electrode 42 may extend from the second end surface LS2 to part of the first principal surface TS1 and part of the second principal surface TS2. Also, the second external electrode 42 may extend from the second end surface LS2 to a portion of the first side surface WS1 and a portion of the second side surface WS2.
  • the first external electrode 41 has a first underlying electrode layer 415 and a first plating layer 416
  • the second external electrode 42 has a second underlying electrode layer 425 and a second plating layer 426.
  • the first external electrode 41 may be composed of the first plated layer 416 only
  • the second external electrode 42 may be composed of the second plated layer 426 only.
  • the first base electrode layer 415 and the second base electrode layer 425 may be fired layers containing metal and glass.
  • glass include glass components containing at least one selected from B, Si, Ba, Mg, Al, Li, and the like.
  • borosilicate glass can be used.
  • the metal contains Cu as a main component.
  • the metal may contain at least one selected from metals such as Ni, Ag, Pd, or Au, or alloys such as Ag—Pd alloys as a main component, or may contain as a component other than the main component. It's okay.
  • the sintered layer is a layer obtained by applying a conductive paste containing metal and glass to the laminate by a dip method and then sintering it.
  • the firing may be performed after firing the internal electrode layers, or may be performed simultaneously with the firing of the internal electrode layers. Also, the fired layer may be a plurality of layers.
  • the first base electrode layer 415 and the second base electrode layer 425 may be resin layers containing conductive particles and thermosetting resin.
  • the resin layer may be formed on the fired layer described above, or may be formed directly on the laminate without forming the fired layer.
  • the resin layer is a layer obtained by applying a conductive paste containing conductive particles and a thermosetting resin to the laminate by a coating method and firing the layer.
  • the firing may be performed after firing the internal electrode layers, or may be performed simultaneously with the firing of the internal electrode layers.
  • the resin layer may be a plurality of layers.
  • each layer of the first base electrode layer 415 and the second base electrode layer 425 as the fired layer or resin layer is not particularly limited, and may be 1 ⁇ m or more and 10 ⁇ m or less.
  • the first base electrode layer 415 and the second base electrode layer 425 may be thin film layers of 1 ⁇ m or less formed by a thin film forming method such as a sputtering method or a vapor deposition method and having metal particles deposited thereon.
  • the first plating layer 416 covers at least part of the first base electrode layer 415
  • the second plating layer 426 covers at least part of the second base electrode layer 425 .
  • the first plating layer 416 and the second plating layer 426 contain at least one selected from metals such as Cu, Ni, Ag, Pd, and Au, and alloys such as Ag—Pd alloys, for example.
  • Each of the first plating layer 416 and the second plating layer 426 may be formed of multiple layers.
  • a two-layer structure of Ni plating and Sn plating is preferred.
  • the Ni plating layer can prevent the base electrode layer from being eroded by solder when mounting the ceramic electronic component, and the Sn plating layer improves the wettability of the solder when mounting the ceramic electronic component. , can be easily implemented.
  • each layer of the first plating layer 416 and the second plating layer 426 is not particularly limited, and may be 1 ⁇ m or more and 10 ⁇ m or less.
  • FIG. 4 is an enlarged cross-sectional view of the IV portion of the multilayer ceramic capacitor shown in FIG.
  • the through-holes 30A are filled with a portion of the adjacent dielectric layers 20 and 20 and appear to be connected to the adjacent dielectric layers 20 and 20.
  • the through-holes are referred to as dielectric connecting portions 30A.
  • each of the internal electrode layers 30 is formed with a plurality of dielectric coupling portions 30A.
  • the dielectric connecting portion 30A is formed in the internal electrode layer 30, electric field concentration occurs at the dielectric connecting portion 30A, and the life, ie reliability, of the multilayer ceramic capacitor 1 may be reduced.
  • a solid-solution layer in which the main component metal of the internal electrode layer 30, such as Ni, and the subcomponent metal, such as Sn, are segregated and solid-solved. 30B are formed.
  • a solid solution layer 30B is formed at the interface between the internal electrode layer 30 and the dielectric connecting portion 30A.
  • Sn segregates and forms a solid solution.
  • At least one of Sn, In, Ga, Zn, Bi, Pb, Fe, V, Y, and Cu may be used as the metal that dissolves in the solid solution layer 30B.
  • the insulating properties are improved in the vicinity of the edge of the dielectric connecting portion 30A where the solid-solution layer 30B is formed. Concentration of the electric field can be suppressed in the body connecting portion 30A. Therefore, it is possible to suppress the deterioration of the life of the multilayer ceramic capacitor 1, that is, the reliability.
  • the content (molar ratio) of the subcomponent metal such as Sn in the solid solution layer 30B is preferably 0.1 mol % or more and 10 mol % or less with respect to 100 mol of the main component metal of the internal electrode layer 30, such as Ni. It is more preferably 0.2 mol % or more and 2.5 mol % or less.
  • the content of the subcomponent metal such as Sn in the solid solution layer 30B is less than 0.1 mol%, the above effect of containing the subcomponent metal such as Sn is small.
  • the content of the subcomponent metal such as Sn in the solid solution layer 30B exceeds 10 mol %, the melting point of the internal electrode layer 30 is lowered, and the main component metal of the internal electrode layer 30, such as Ni, is beaded.
  • the main component metal for example Ni
  • the internal electrode layer 30 locally thickens
  • the dielectric layer 20 locally thins
  • the electric field strength The effect of containing the component metal is canceled.
  • the content mol % (molar ratio) of the subcomponent metal such as Sn in the solid solution layer 30B with respect to 100 mol of the main component metal in the internal electrode layer 30, for example, Ni, the central portion in the stacking direction T, the width direction W This is a value obtained by measuring 10 points of the interface at the central portion and the central portion in the length direction L by TEM analysis and averaging the values.
  • one or more dielectric connection portions 30A are formed per 100 ⁇ m per internal electrode layer 30 .
  • a method for measuring the number of dielectric connection portions 30A an image is taken with an optical microscope or an SEM at a viewing angle at which internal electrodes of 100 ⁇ m or more are included, and images are taken at equal intervals in three fields of view in the stacking direction.
  • the number of dielectric connecting portions 30A is measured for each field of view, and the number of the three fields of view is averaged to find the average number.
  • the average value of the number of dielectric connection portions 30A in the three fields of view of the desired internal electrode layer 30 is taken as the average number of dielectric connection portions 30A of the plurality of internal electrode layers 30 of the multilayer ceramic capacitor 1 .
  • the thickness of the solid solution layer 30B is preferably 1 nm or more and 20 nm or less.
  • the method for measuring the thickness of the solid solution layer 30B is not particularly limited. An example using electron microscopy (TEM) is given below.
  • the dielectric layers 20 are electrolytically stripped from desired internal electrode layers 30 in the vicinity of the center in the stacking direction T of the stack 10 .
  • the peeling part in the lamination direction T of the laminated body 10 is not limited to this. Using, for example, SEM-EDX, three fields of view each having a size of, for example, 50 ⁇ m ⁇ 50 ⁇ m are imaged near the center of the desired internal electrode layer 30 .
  • the image pick-up location in the plane of the internal electrode layer 30 and the size of the field of view are not limited to these.
  • measure the thickness of each of the solid solution layers 30B of subcomponent metal such as Sn in the vicinity of the dielectric coupling portion 30A average the thickness of all the solid solution layers 30B for each field of view, and The thickness of the field is averaged to obtain the average thickness.
  • the average thickness of the solid solution layers 30B in the three fields of view of the desired internal electrode layers 30 is taken as the average thickness of the solid solution layers 30B of the plurality of internal electrode layers 30 of the multilayer ceramic capacitor 1 .
  • the solid solution layer 30B preferably covers at least 75% or more of the periphery of the dielectric connecting portion 30A.
  • the method for measuring the coverage of the solid solution layer 30B is not particularly limited, but for example, wavelength dispersive X-ray analysis (WDX) or energy dispersive X-ray analysis (EDX), scanning electron microscope (SEM) or transmission type An example using electron microscopy (TEM) is given below.
  • the dielectric layers 20 are electrolytically stripped from desired internal electrode layers 30 in the vicinity of the center in the stacking direction T of the stack 10 .
  • the peeling part in the lamination direction T of the laminated body 10 is not limited to this.
  • the image pick-up location in the plane of the internal electrode layer 30 and the size of the field of view are not limited to these.
  • measure the coverage of each of the solid solution layers 30B of subcomponent metal such as Sn in the vicinity of the dielectric coupling portion 30A average the coverage of all the solid solution layers 30B for each field of view, and The coverage of the field of view is averaged to obtain the average coverage.
  • the average value of the coverage of the solid solution layers 30B in the three fields of view of the desired internal electrode layers 30 is taken as the average coverage of the solid solution layers 30B of the plurality of internal electrode layers 30 of the multilayer ceramic capacitor 1 .
  • the thinning of the dielectric layer 20 may increase the strength of the electric field applied per layer, reducing the life, ie reliability, of the multilayer ceramic capacitor 1 .
  • a solid-solution layer 30C may be formed at the boundary between the dielectric layer 20 and the internal electrode layer 30 as well, in which a subcomponent metal such as Sn is segregated and solid-solved.
  • a solid-solution layer 30C of a subcomponent metal such as Sn may be formed also at the interface between the internal electrode layer 30 and the dielectric layer 20 .
  • the content of the subcomponent metal such as Sn in the solid solution layer 30B is higher than the content of the subcomponent metal such as Sn in the solid solution layer 30C.
  • dielectric layer 20 When the solid-solution layer 30C of a subcomponent metal such as Sn is formed at the interface with the dielectric layer 20, the insulating properties at the interface with the dielectric layer 20 on which the solid-solution layer 30C is formed are improved. At 20, an increase in electric field strength can be suppressed. Therefore, it is possible to suppress the deterioration of the life of the multilayer ceramic capacitor 1, that is, the reliability. ⁇ dielectric layer>> Next, the dielectric layer 20 will be further described. 5 is an enlarged cross-sectional view of the V portion of the multilayer ceramic capacitor shown in FIG. 2. FIG. As shown in FIG. 5, dielectric layer 20 includes a plurality of dielectric grains 20A.
  • the dielectric grains 20A are, as described above, barium titanate-based ceramics such as perovskite compounds containing Ba and Ti.
  • the dielectric grains 20A may contain at least one of La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu and Y as an accessory component.
  • the above-described auxiliary component metal such as Sn may be solid-dissolved at the interfaces 20B of the dielectric grains 20A.
  • a method for manufacturing the laminated ceramic capacitor 1 described above will be described.
  • the dielectric sheet contains Sn.
  • an insulator sheet containing core-shell structure dielectric grain particles coated on the surface with Sn is used.
  • the dielectric sheet and the conductive paste contain a binder and a solvent. Known materials can be used as the binder and solvent.
  • an internal electrode pattern is formed on the dielectric sheet by printing a conductive paste on the dielectric sheet, for example, in a predetermined pattern.
  • a method for forming the internal electrode pattern screen printing, gravure printing, or the like can be used.
  • a predetermined number of dielectric sheets for the second outer layer portion 102 on which the internal electrode pattern is not printed are laminated.
  • Dielectric sheets for the inner layer section 100 on which the internal electrode pattern is printed are successively laminated thereon.
  • a predetermined number of dielectric sheets for the first outer layer section 101 on which the internal electrode pattern is not printed are laminated thereon. Thereby, a laminated sheet is produced.
  • the laminated sheet is pressed in the lamination direction by means of isostatic pressing or the like to produce a laminated block.
  • the laminated block is cut into a predetermined size to cut out laminated chips. At this time, the corners and ridges of the laminated chips are rounded by barrel polishing or the like.
  • the firing temperature is preferably 900° C. or more and 1400° C. or less, although it depends on the materials of the dielectric and internal electrodes.
  • a plurality of dielectric connecting portions 30A are formed in the internal electrode layers 30, and Sn derived from the dielectric layers 20 is segregated and solid-dissolved at the interfaces between the dielectric connecting portions 30A and the internal electrode layers 30.
  • a solution layer 30B is formed.
  • a solid solution layer 30C may be formed in which Sn derived from the dielectric layer 20 is segregated and dissolved. Further, Sn may remain at the interfaces 20B of the dielectric grains 20A of the dielectric layer 20, that is, Sn may segregate and form a solid solution.
  • the first base electrode layer 415 is formed on the first end face LS1.
  • a second base electrode layer 425 is formed on the second end face LS2.
  • the firing temperature is preferably 600° C. or higher and 900° C. or lower.
  • the first base electrode layer 415 and the second base electrode layer 415 which are resin layers, are formed by applying a conductive paste containing conductive particles and a thermosetting resin by a coating method and baking the paste.
  • the layer 425 may be formed, or the first base electrode layer 415 and the second base electrode layer 425 which are thin films may be formed by a thin film formation method such as a sputtering method or an evaporation method.
  • a first plated layer 416 is formed on the surface of the first base electrode layer 415 to form the first external electrode 41, and a second plated layer 426 is formed on the surface of the second base electrode layer 425. Then, the second external electrodes 42 are formed.
  • the laminated ceramic capacitor 1 described above is obtained.
  • a plurality of dielectric coupling portions 30A are formed in the internal electrode layers 30 by thinning the internal electrode layers 30, for example.
  • a solid-solution layer 30B is formed in which a main component metal of the internal electrode layer 30, such as Ni, and a subcomponent metal, such as Sn, are solid-dissolved.
  • the insulating properties are improved in the vicinity of the edge of the dielectric connecting portion 30A where the solid solution layer 30B is formed, and the concentration of the electric field in the dielectric connecting portion 30A can be suppressed. Therefore, it is possible to suppress the deterioration of the life of the multilayer ceramic capacitor 1, that is, the reliability.
  • the multilayer ceramic capacitor 1 of the present embodiment even if the interface between the internal electrode layer 30 and the dielectric layer 20 is formed with a solid-solution layer 30C in which a subcomponent metal, for example, Sn is dissolved, good.
  • the content of the subcomponent metal such as Sn in the solid solution layer 30B is higher than the content of the subcomponent metal such as Sn in the solid solution layer 30C. This improves the insulation at the interface with the dielectric layer 20 on which the solid solution layer 30C is formed, and can suppress an increase in the electric field intensity due to the thinning of the dielectric layer 20, for example. Therefore, it is possible to suppress the deterioration of the life of the multilayer ceramic capacitor 1, that is, the reliability.
  • a method of manufacturing a multilayer ceramic capacitor a method of applying a dielectric to the side gaps on the side surfaces WS1 and WS2 in the width direction W of the multilayer body 10 afterward may be applied.
  • both ends of the internal electrode layers in the width direction W are aligned (with an error of 5 ⁇ m, for example).

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  • Engineering & Computer Science (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Materials Engineering (AREA)
  • Ceramic Capacitors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
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