WO2023077920A1 - 宇航低压buck抗干扰和延时启动电路 - Google Patents

宇航低压buck抗干扰和延时启动电路 Download PDF

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Publication number
WO2023077920A1
WO2023077920A1 PCT/CN2022/114205 CN2022114205W WO2023077920A1 WO 2023077920 A1 WO2023077920 A1 WO 2023077920A1 CN 2022114205 W CN2022114205 W CN 2022114205W WO 2023077920 A1 WO2023077920 A1 WO 2023077920A1
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Prior art keywords
circuit
low
terminal
voltage buck
capacitor
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PCT/CN2022/114205
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English (en)
French (fr)
Inventor
皇志启
杨冬平
谢鹏飞
纪明明
马涛
穆城
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北京卫星制造厂有限公司
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Publication of WO2023077920A1 publication Critical patent/WO2023077920A1/zh

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/44—Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/36—Means for starting or stopping converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only

Definitions

  • the invention relates to an aerospace low-voltage BUCK anti-interference and delay start circuit.
  • a multi-output low-voltage spacecraft power supply based on a low-voltage BUCK chip is designed.
  • the low-voltage BUCK chip provides users with a variety of designable functions, such as soft start, frequency adjustment, voltage feedback, adjustable input under-voltage lockout, etc. It adopts external voltage feedback technology, which can make it have a good linear adjustment rate in the whole range of load changes, so that the system can quickly respond to load changes and has good load step characteristics.
  • the gain of the regulator is basically constant and will not change with the change of load, which greatly simplifies the design of loop compensation.
  • the existing low-voltage BUCK chip has poor loading characteristics, poor starting characteristics and power-off characteristics, and cannot meet all the load requirements of the spacecraft.
  • the invention provides an aerospace low-voltage BUCK anti-interference and delay start circuit.
  • the present invention provides an aerospace low-voltage BUCK anti-interference and delay start circuit, including: an input bus, a low-voltage BUCK circuit, an isolation filter circuit and an enabling end delay start circuit, the input bus is used for the low-voltage BUCK circuit , the isolation filter circuit and the enabling end delay start circuit supply power; the low-voltage BUCK circuit is used to supply power or power off the load; the isolation filter circuit is used to isolate the power in the low-voltage BUCK circuit The circuit and the control circuit are filtered together; the enabling terminal delays the start-up circuit, and is used to control the start-up or disconnection time of the low-voltage BUCK circuit.
  • the isolation filter circuit includes a first resistor and a first capacitor
  • the first end of the first resistor is connected to the positive end of the input bus, and the second end is connected to the VIN end of the low-voltage BUCK circuit;
  • the first end of the first capacitor is connected to the VIN end of the low-voltage BUCK circuit, and the second end is connected to the ground end of the input bus.
  • the delay start circuit at the enable end includes a second resistor, a second capacitor, a third resistor and a third capacitor,
  • the first end of the second resistor is connected to the positive end of the input bus, and the second end is connected to the EN end of the low-voltage BUCK circuit;
  • the first end of the second capacitor is connected to the positive end of the input bus, and the second end is connected to the ground end of the input bus;
  • Both the first ends of the third resistor and the third capacitor are connected to the EN end of the low-voltage BUCK circuit, and the second ends are connected to the ground end of the input bus.
  • the low-voltage BUCK circuit includes a PVIN terminal, a VIN terminal, an EN terminal, and a ground terminal,
  • the PVIN terminal is connected to the positive terminal of the input bus, the isolation filter circuit and the delay start circuit of the enabling terminal;
  • the VIN terminal is connected to the isolation filter circuit
  • the EN terminal is connected to the delay start circuit of the enabling terminal
  • the ground terminal is connected to the ground terminal of the input bus, the isolation filter circuit and the delay start circuit of the enabling terminal.
  • the low-voltage BUCK circuit further includes: a power circuit and a control circuit,
  • the power circuit is connected to the PVIN terminal
  • the control circuit is connected to the VIN terminal.
  • it further includes a fourth capacitor connected in parallel to the output terminal of the low-voltage BUCK circuit.
  • the output terminal includes a first output terminal and a second output terminal
  • the first terminal of the fourth capacitor is connected to the first output terminal, and the second terminal is connected to the second output terminal and grounded.
  • the isolation filter circuit on the periphery of the low-voltage BUCK circuit by connecting the isolation filter circuit on the periphery of the low-voltage BUCK circuit, the isolation and filtering of the power circuit and the control circuit inside the low-voltage BUCK circuit can be realized, and the internal field effect transistor (MOS tube), rectifier diode and freewheeling diode produce peak signal interference to the control circuit, thereby improving the load capacity of the low-voltage BUCK circuit.
  • MOS tube MOS tube
  • rectifier diode and freewheeling diode produce peak signal interference to the control circuit, thereby improving the load capacity of the low-voltage BUCK circuit.
  • the high and low temperature characteristics of the low-voltage BUCK circuit can be improved, so that the low-voltage BUCK circuit's load characteristics at low temperature can be enhanced.
  • the charging and discharging speed of the enabling terminal capacitor of the low-voltage BUCK circuit can be controlled, thereby controlling the starting characteristics and power-off characteristics of the low-voltage BUCK circuit, and realizing the low-voltage BUCK circuit The monotonicity of plus and minus power-off.
  • the output DC voltage can be made more stable, and it plays the role of voltage stabilization and energy storage, and can continuously provide a stable power supply for the load.
  • the invention adopts low-cost electronic components such as resistors and capacitors, and has a simple circuit structure, which enhances the loading characteristics, start-up characteristics and power-off characteristics of aerospace low-voltage BUCK circuits while achieving low cost, and can meet the requirements of various load characteristics of spacecraft .
  • Fig. 1 schematically shows the composition diagram of each part of the aerospace low voltage BUCK anti-jamming and delay start circuit of an embodiment of the present invention
  • FIG. 2 schematically shows a specific structural diagram of an aerospace low-voltage BUCK anti-interference and delay start circuit according to an embodiment of the present invention.
  • the aerospace low-voltage BUCK anti-interference and delayed start circuit includes: an input bus 1 , a low-voltage BUCK circuit 2 , an isolation filter circuit 3 and a delayed start circuit 4 at the enabling end.
  • the input bus 1 is used to provide electric energy for the low-voltage BUCK circuit 2 , the isolation filter circuit 3 and the delay start circuit 4 at the enabling end.
  • the isolation filter circuit 3 is used to isolate the power circuit and the control circuit inside the low-voltage BUCK circuit 2 .
  • the enable terminal delay start circuit 4 is used to control the start-up and disconnection time of the low-voltage BUCK circuit 2, so that the low-voltage BUCK circuit 2 performs corresponding actions, and supplies power to or cuts off the load driven by the output terminal of the low-voltage BUCK circuit 2 .
  • the low-voltage BUCK circuit 2 can use different types of low-voltage BUCK chips.
  • the isolation filter circuit 3 on the periphery of the low-voltage BUCK circuit 2
  • the isolation and filtering of the power circuit and the control circuit inside the low-voltage BUCK circuit 2 can be realized, reducing During the start-up process of the low-voltage BUCK circuit 2, the internal field effect transistor (MOS transistor) generates a spike signal that interferes with the control circuit.
  • MOS transistor the internal field effect transistor
  • the specific structure of the isolation filter circuit 3 includes a first resistor R1 and a first capacitor C1 .
  • the first terminal of the first resistor R1 is connected to the positive terminal of the input bus 1
  • the second terminal of the first resistor R1 is connected to the VIN terminal of the low-voltage BUCK circuit 2 .
  • a first terminal of the first capacitor C1 is connected to the VIN terminal of the low-voltage BUCK circuit 2
  • a second terminal of the first capacitor C1 is connected to the ground terminal GND of the input bus 1 .
  • the enable end delay start circuit 4 includes a second resistor R2, a second capacitor C2, a third resistor R3 and a third capacitor C3.
  • the first terminal of the second resistor R2 is connected to the positive terminal of the input bus 1
  • the second terminal of the second resistor R2 is connected to the EN terminal (enabling terminal) of the low-voltage BUCK circuit 2 .
  • a first end of the second capacitor C2 is connected to the positive end of the input bus 1
  • a second end of the second capacitor C2 is connected to the ground end of the input bus 1 .
  • Both the first terminals of the third resistor R3 and the third capacitor C3 are connected to the EN terminal of the low-voltage BUCK circuit 2 , and the second terminals of the third resistor R3 and the third capacitor C3 are also connected to the ground terminal GND of the input bus 1 .
  • the low-voltage BUCK circuit 2 includes a PVIN terminal, a VIN terminal, an EN terminal and a ground terminal GND, and its internal structure also includes a power circuit and a control circuit.
  • the PVIN terminal is connected to the positive terminal of the input bus 1 , the isolation filter circuit 3 and the enabling terminal delay circuit 4 , and the PVIN terminal is also connected to the power circuit inside the low-voltage BUCK circuit 2 .
  • the VIN terminal is connected to the isolation filter circuit 3 , and the VIN terminal is also connected to the control circuit inside the low-voltage BUCK circuit 2 .
  • the EN end is connected to the delay circuit 4 at the enabling end.
  • the ground terminal GND of the low-voltage BUCK circuit 2 is connected to the ground terminal GND of the input bus 1 , the isolation filter circuit 3 and the delay circuit 4 at the enabling terminal.
  • the first end of the first resistor R1 in the isolation filter circuit 3 is connected to the PVIN end of the low-voltage BUCK circuit 2
  • the second end of the first resistor R1 is connected to the VIN end of the low-voltage BUCK circuit 2
  • the first terminal of the first capacitor C1 in the isolation filter circuit 3 is connected to the VIN terminal of the low-voltage BUCK circuit 2
  • the second terminal of the first capacitor C1 is connected to the ground terminal GND of the low-voltage BUCK circuit 2 .
  • the PVIN terminal is the input terminal of the internal power circuit of the low-voltage BUCK circuit 2
  • the VIN terminal is the input terminal of the internal control circuit of the low-voltage BUCK circuit 2 . Therefore, the isolation filter circuit 3 composed of the first resistor R1 and the first capacitor C1 realizes the isolation and RC filtering of the PVIN terminal and the VIN terminal, that is, realizes the isolation of the internal power circuit and the control circuit of the low-voltage BUCK circuit 2, and reduces the low-voltage BUCK circuit 2.
  • the noise or peak signal generated by the internal MOS tube will affect the control circuit, thereby improving the load capacity of the low-voltage BUCK circuit 2.
  • the isolation filter circuit 3 can reduce the interference entering the VIN terminal, thereby improving the high and low temperature characteristics of the low-voltage BUCK circuit 2, and at the same time enhancing the load-carrying characteristics of the low-voltage BUCK circuit 2 at low temperature.
  • the resistance value of the first resistor R1 should be selected according to the control current of the low-voltage BUCK circuit 2 and ensure the working voltage and current of the low-voltage BUCK circuit 2 .
  • the first end of the second resistor R2 and the second capacitor C2 in the delay start circuit 4 at the enabling end are both connected to the PVIN end of the low-voltage BUCK circuit 2, and the second end of the second resistor R2 is connected to the low-voltage BUCK EN terminal of circuit 2.
  • the second terminal of the second capacitor C2 is connected to the ground terminal GND of the low-voltage BUCK circuit 2 .
  • Both the first terminals of the third resistor R3 and the third capacitor C3 are connected to the EN terminal of the low-voltage BUCK circuit 2
  • the second terminals of the third resistor R3 and the third capacitor C3 are connected to the ground terminal GND of the low-voltage BUCK circuit 2 .
  • the second capacitor C2 is connected between PVIN and GND of the low-voltage BUCK circuit 2, which can prevent the noise generated by the MOS transistor, rectifier diode and freewheeling diode inside the low-voltage BUCK circuit 2 from affecting the input bus 1, and absorb high-frequency Noise, enhance the anti-interference ability of the circuit.
  • the second resistor R2 is connected between PVIN and EN of the low-voltage BUCK circuit 2
  • the third resistor R3 is connected between EN and GND of the low-voltage BUCK circuit 2
  • the third capacitor C3 is connected in parallel to both ends of the third resistor R3, and also connected to Between EN and GND of low voltage BUCK circuit 2.
  • the third capacitor C3 When the low-voltage BUCK circuit 2 is started, the third capacitor C3 is charged, and the voltage of the enable terminal of the low-voltage BUCK circuit 2 rises slowly; when the low-voltage BUCK circuit 2 is powered off, the third capacitor C3 is discharged, and the enable terminal The terminal voltage discharges slowly.
  • the design of the delay start circuit 4 at the enabling end can make the output voltage of the low-voltage BUCK circuit 2 monotonously powered on and off.
  • the aerospace low-voltage BUCK anti-interference and delay start circuit of this embodiment further includes a fourth capacitor C4 connected in parallel to the output terminal of the low-voltage BUCK circuit 2 .
  • the output terminals of the low-voltage BUCK circuit 2 include a first output terminal and a second output terminal. Further, the first end of the fourth capacitor C4 is connected to the first output end, and the second end of the fourth capacitor C4 is connected to the second output end.

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  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
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Abstract

本发明涉及航天电源技术领域的一种宇航低压BUCK抗干扰和延时启动电路，包括：输入母线（1）、低压BUCK电路（2）、隔离滤波电路（3）和使能端延时启动电路（4），所述输入母线（1），用于为所述低压BUCK电路（2）、所述隔离滤波电路（3）和所述使能端延时启动电路（4）供电；所述低压BUCK电路（2），用于为负载供电；所述隔离滤波电路（3），用于隔离所述低压BUCK电路（2）内的功率电路和控制电路并滤波；所述使能端延时启动电路（4），用于控制所述低压BUCK电路（2）的启动或断开的时间。本发明可以增强低压BUCK电路的带载特性、启动特性和断电特性，并使加断电单调。

Description

宇航低压BUCK抗干扰和延时启动电路
本申请要求于2021年11月8日提交中国专利局、申请号为202111314636.X、申请名称为“宇航低压BUCK抗干扰和延时启动电路”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及一种宇航低压BUCK抗干扰和延时启动电路。
 背景技术
卫星等航天器小型化、轻量化、高效化的发展趋势，对星载二次电源功率密度提出了新要求。对电源而言，必须设计成效率高、体积小、适配性强的电源，才能适应航天器的发展趋势。
为满足星载二次电源高功率密度的要求，设计一款基于低压BUCK芯片的多路输出低压航天器电源。低压BUCK芯片为用户提供多种可设计的功能，例如软启动、频率调节、电压反馈、可调节输入欠压锁定等。它采用外部电压反馈技术，能够使其在整个负载变化的范围具有很好线性调整率，从而使系统能够快速响应负载变化，具有良好的负载阶跃特性。调整器增益基本为常数，不会随着负载变化而变化，大大简化了环路补偿设计。但是，现有的低压BUCK芯片带载特性差、启动特性和断电特性差，无法满足航天器所有的负载要求。
 技术问题
为了避免由于低压BUCK电路带载特性、启动特性和断电特性差而无法满足航天器负载特性需求的问题，本发明提供一种宇航低压BUCK抗干扰和延时启动电路。
 技术解决方案
为实现上述发明目的，本发明的技术方案是：
本发明提供一种宇航低压BUCK抗干扰和延时启动电路，包括：输入母线、低压BUCK电路、隔离滤波电路和使能端延时启动电路，所述输入母线，用于为所述低压BUCK电路、所述隔离滤波电路和所述使能端延时启动电路供电；所述低压BUCK电路，用于为负载供电或断电；所述隔离滤波电路，用于隔离所述低压BUCK电路内的功率电路和控制电路并滤波；所述使能端延时启动电路，用于控制所述低压BUCK电路的启动或断开的时间。
根据本发明的一个方面，所述隔离滤波电路包括第一电阻和第一电容，
所述第一电阻的第一端与所述输入母线的正极端连接，第二端与所述低压BUCK电路的VIN端连接；
所述第一电容的第一端与所述低压BUCK电路的VIN端连接，第二端与所述输入母线的接地端连接。
根据本发明的一个方面，所述使能端延时启动电路包括第二电阻、第二电容、第三电阻和第三电容，
所述第二电阻的第一端与所述输入母线的正极端连接，第二端与所述低压BUCK电路的EN端连接；
所述第二电容的第一端与所述输入母线的正极端连接，第二端与所述输入母线的接地端连接；
所述第三电阻和所述第三电容的第一端均与所述低压BUCK电路的EN端连接，第二端均与所述输入母线的接地端连接。
根据本发明的一个方面，所述低压BUCK电路包括PVIN端、VIN端、EN端、接地端，
所述PVIN端与所述输入母线的正极端、所述隔离滤波电路及所述使能端延时启动电路均连接；
所述VIN端与所述隔离滤波电路连接；
所述EN端与所述使能端延时启动电路连接；
所述接地端与所述输入母线的接地端、所述隔离滤波电路及所述使能端延时启动电路均连接。
根据本发明的一个方面，所述低压BUCK电路还包括：功率电路和控制电路，
所述功率电路与所述PVIN端连接；
所述控制电路与所述VIN端连接。
根据本发明的一个方面，还包括并联在所述低压BUCK电路的输出端的第四电容。
根据本发明的一个方面，所述输出端包括第一输出端和第二输出端，
所述第四电容的第一端与所述第一输出端连接，第二端与所述第二输出端连接并接地。
 有益效果
根据本发明的方案，通过在低压BUCK电路的外围连接隔离滤波电路，可以实现低压BUCK电路内部的功率电路和控制电路的隔离和滤波，减小低压BUCK电路在启动过程中内部的场效应管（MOS管）、整流二极管和续流二极管产生尖峰信号对控制电路的干扰，进而提高低压BUCK电路带负载的能力。尤其是，可以提高低压BUCK电路高低温特性，使低压BUCK电路在低温状态下带载特性加强。
通过在低压BUCK电路的外围连接使能端延时启动电路，可以控制低压BUCK电路的对使能端电容充放电速度，从而对低压BUCK电路的启动特性和断电特性进行控制，实现低压BUCK电路的加断电的单调性。
通过在低压BUCK电路的输出端并联电容，可以使输出的直流电压更加平稳，起到稳压和储能的作用，可以持续为负载提供稳定的电源。
本发明采用电阻和电容等低成本的电子元器件，电路结构简单，使宇航低压BUCK电路带载特性、启动特性和断电特性增强的同时实现低成本，可满足航天器多种负载特性的需求。
 附图说明
图1示意性表示本发明的一种实施方式的宇航低压BUCK抗干扰和延时启动电路的各部分组成示意图；
图2示意性表示本发明的一种实施方式的宇航低压BUCK抗干扰和延时启动电路的具体结构示意图。
 本发明的实施方式
为了更清楚地说明本发明实施方式或现有技术中的技术方案，下面将对实施方式中所需要使用的附图作简单地介绍。显而易见地，下面描述中的附图仅仅是本发明的一些实施方式，对于本领域普通技术人员而言，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
在针对本发明的实施方式进行描述时，术语“纵向”、“横向”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”“内”、“外”所表达的方位或位置关系是基于相关附图所示的方位或位置关系，其仅是为了便于描述本发明和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此上述术语不能理解为对本发明的限制。
下面结合附图和具体实施方式对本发明作详细地描述，实施方式不能在此一一赘述，但本发明的实施方式并不因此限定于以下实施方式。
图1和图2分别示意性表示本实施方式的宇航低压BUCK抗干扰和延时启动电路的各部分组成和具体结构示意图。如图1所示，该宇航低压BUCK抗干扰和延时启动电路包括：输入母线1、低压BUCK电路2、隔离滤波电路3和使能端延时启动电路4。其中，输入母线1用来为低压BUCK电路2、隔离滤波电路3和使能端延时启动电路4提供电能。隔离滤波电路3用来隔离低压BUCK电路2内部的功率电路和控制电路。使能端延时启动电路4用来控制低压BUCK电路2的启动和断开的时间，使得低压BUCK电路2执行相应的动作，为低压BUCK电路2输出端所带动的负载进行供电或断电。在本实施方式中，低压BUCK电路2可以选用不同型号的低压BUCK芯片。
根据上述宇航低压BUCK抗干扰和延时启动电路的发明构思，通过在低压BUCK电路2的外围连接隔离滤波电路3，可以实现低压BUCK电路2内部的功率电路和控制电路的隔离和滤波，减小低压BUCK电路2在启动过程中内部的场效应管（MOS管）产生尖峰信号对控制电路的干扰。通过在低压BUCK电路2的外围连接使能端电路4，可以通过控制低压BUCK电路2的充放电速度，对低压BUCK电路2的启动特性和断电特性进行控制，实现低压BUCK电路2的加断电的单调性。
优选地，如图2所示，隔离滤波电路3的具体结构包括第一电阻R1和第一电容C1。第一电阻R1的第一端与输入母线1的正极端连接，第一电阻R1的第二端与低压BUCK电路2的VIN端连接。第一电容C1的第一端与低压BUCK电路2的VIN端连接，第一电容C1的第二端与输入母线1的接地端GND连接。
使能端延时启动电路4包括第二电阻R2、第二电容C2、第三电阻R3和第三电容C3。其中，第二电阻R2的第一端与输入母线1的正极端连接，第二电阻R2的第二端与低压BUCK电路2的EN端（使能端）连接。第二电容C2的第一端与输入母线1的正极端连接，第二电容C2的第二端与输入母线1的接地端连接。第三电阻R3和第三电容C3的第一端均与低压BUCK电路2的EN端连接，第三电阻R3和第三电容C3的第二端也均与输入母线1的接地端GND连接。
低压BUCK电路2包括PVIN端、VIN端、EN端和接地端GND，其内部结构还包括功率电路和控制电路。其中，PVIN端与所述输入母线1的正极端、隔离滤波电路3及使能端延时电路电路4均连接，PVIN端还与低压BUCK电路2内部的功率电路连接。VIN端与隔离滤波电路3连接，VIN端还与低压BUCK电路2内部的控制电路连接。EN端与使能端延时电路4连接。低压BUCK电路2的接地端GND与输入母线1的接地端GND、隔离滤波电路3及使能端延时电路4均连接。
由上述的电路结构可以得出，隔离滤波电路3中第一电阻R1的第一端连接在低压BUCK电路2的PVIN端，第一电阻R1的第二端连接在低压BUCK电路2的VIN端。隔离滤波电路3中第一电容C1的第一端连接在低压BUCK电路2的VIN端，第一电容C1的第二端连接在低压BUCK电路2的接地端GND。而PVIN端为低压BUCK电路2内部功率电路的输入端，VIN端为低压BUCK电路2内部控制电路的输入端。所以，由第一电阻R1和第一电容C1组成的隔离滤波电路3实现PVIN端和VIN端的隔离和RC滤波，也就是实现低压BUCK电路2内部功率电路和控制电路的隔离，减小低压BUCK电路2工作过程中内部的MOS管产生的噪声或尖峰信号对控制电路的影响，从而提高低压BUCK电路2带负载的能力。尤其是，在低压BUCK电路2处于低温环境下，MOS管的开关尖峰信号增大，对控制电路造成干扰，使得低压BUCK电路2无法正常工作。上述隔离滤波电路3可以使进入VIN端的干扰变小，从而提高低压BUCK电路2的高低温特性，同时使得低压BUCK电路2在低温状态下带负载的特性增强。这里，需要注意的是，第一电阻R1的阻值要根据低压BUCK电路2的控制电流选取，并保证低压BUCK电路2的工作电压和工作电流。
还可以得出，使能端延时启动电路4中第二电阻R2和第二电容C2的第一端都连接在低压BUCK电路2的PVIN端，第二电阻R2的第二端连接在低压BUCK电路2的EN端。第二电容C2的第二端连接在低压BUCK电路2的接地端GND。第三电阻R3和第三电容C3的第一端都连接在低压BUCK电路2的EN端，第三电阻R3和第三电容C3的第二端都连接在低压BUCK电路2的接地端GND。
即，第二电容C2连接在低压BUCK电路2的PVIN和GND之间，可以避免低压BUCK电路2内部的MOS管、整流二极管和续流二极管产生的噪声对输入母线1产生影响，并吸收高频噪声，增强电路的抗干扰能力。
第二电阻R2连接在低压BUCK电路2的PVIN和EN之间，第三电阻R3连接在低压BUCK电路2的EN和GND之间，第三电容C3并联在第三电阻R3两端，同时也连接在低压BUCK电路2的EN和GND之间。通过上述电路结构，以及低压BUCK电路内部恒流源对第三电容C3的充电和放电，可以对使能端EN端的电压进行控制，从而实现对低压BUCK电路2的启动和断电的时间控制，增强启动特性和断电特性。当低压BUCK电路2启动时，第三电容C3进行充电，低压BUCK电路2的使能端电压缓慢上升；当低压BUCK电路2断电时，第三电容C3进行放电，低压BUCK电路2的使能端电压缓慢放电。使能端延时启动电路4的设计，可以使低压BUCK电路2的输出电压上电和断电单调。
此外，本实施方式的宇航低压BUCK抗干扰和延时启动电路还包括一个并联在低压BUCK电路2的输出端的第四电容C4。低压BUCK电路2的输出端包括第一输出端和第二输出端。进一步地，第四电容C4的第一端与上述第一输出端连接，第四电容C4的第二端与上述第二输出端连接。通过在输出端并联一个电容，可以滤除低压BUCK电路2输出电压的交流成分，使输出的直流更加平稳。同时，该电容还具有储能的作用。
以上所述仅为本发明的一个实施方式而已，并不用于限制本发明，对于本领域的技术人员来说，本发明可以有各种更改和变化。凡在本发明的精神和原则之内，所作的任何修改、等同替换、改进等，均应包括在本发明的保护范围之内。

Claims (7)

  1. 一种宇航低压BUCK抗干扰和延时启动电路，其特征在于，包括：输入母线（1）、低压BUCK电路（2）、隔离滤波电路（3）和使能端延时启动电路（4），
    所述输入母线（1），用于为所述低压BUCK电路（2）、所述隔离滤波电路（3）和所述使能端延时启动电路（4）供电；
    所述低压BUCK电路（2），用于为负载供电或断电；
    所述隔离滤波电路（3），用于隔离所述低压BUCK电路（2）内的功率电路和控制电路并滤波；
    所述使能端延时启动电路（4），用于控制所述低压BUCK电路（2）的启动或断开的时间。
  2. 根据权利要求1所述的电路，其特征在于，所述隔离滤波电路（3）包括第一电阻（R1）和第一电容（C1），
    所述第一电阻（R1）的第一端与所述输入母线（1）的正极端连接，第二端与所述低压BUCK电路（2）的VIN端连接；
    所述第一电容（C1）的第一端与所述低压BUCK电路（2）的VIN端连接，第二端与所述输入母线（1）的接地端（GND）连接。
  3. 根据权利要求1所述的电路，其特征在于，所述使能端延时启动电路（4）包括第二电阻（R2）、第二电容（C2）、第三电阻（R3）和第三电容（C3），
    所述第二电阻（R2）的第一端与所述输入母线（1）的正极端连接，第二端与所述低压BUCK电路（2）的EN端连接；
    所述第二电容（C2）的第一端与所述输入母线（1）的正极端连接，第二端与所述输入母线（1）的接地端（GND）连接；
    所述第三电阻（R3）和所述第三电容（C3）的第一端均与所述低压BUCK电路（2）的EN端连接，第二端均与所述输入母线（1）的接地端（GND）连接。
  4. 根据权利要求1所述的电路，其特征在于，所述低压BUCK电路（2）包括PVIN端、VIN端、EN端、接地端（GND），
    所述PVIN端与所述输入母线（1）的正极端、所述隔离滤波电路（3）及所述使能端延时启动电路（4）均连接；
    所述VIN端与所述隔离滤波电路（3）连接；
    所述EN端与所述使能端延时启动电路（4）连接；
    所述接地端（GND）与所述输入母线（1）的接地端（GND）、所述隔离滤波电路（3）及所述使能端延时启动电路（4）均连接。
  5. 根据权利要求4所述的电路，其特征在于，所述低压BUCK电路（2）还包括：功率电路和控制电路，
    所述功率电路与所述PVIN端连接；
    所述控制电路与所述VIN端连接。
  6. 根据权利要求1所述的电路，其特征在于，还包括并联在所述低压BUCK电路（2）的输出端的第四电容（C4）。
  7. 根据权利要求6所述的电路，其特征在于，所述输出端包括第一输出端和第二输出端，
    所述第四电容（C4）的第一端与所述第一输出端连接，第二端与所述第二输出端连接并接地。
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011004564A (ja) * 2009-06-22 2011-01-06 Toshiba Corp 電源装置
CN102832680A (zh) * 2012-10-08 2012-12-19 南京觅丹电子信息有限公司 一种超级电容作为储能介质的物机
CN110456202A (zh) * 2019-08-23 2019-11-15 中控智慧(广东)科技有限公司 一种防拆机检测控制电路及电子设备
US11011612B2 (en) * 2018-07-20 2021-05-18 Rohm Co., Ltd. Semiconductor device
CN114172361A (zh) * 2021-11-08 2022-03-11 北京卫星制造厂有限公司 宇航低压buck抗干扰和延时启动电路

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN203734530U (zh) * 2013-12-13 2014-07-23 中煤科工集团重庆研究院有限公司 分级启动式矿用本安电源
CN208062839U (zh) * 2018-03-23 2018-11-06 北京知行新能科技有限公司 电池管理装置
CN110829839A (zh) * 2019-11-04 2020-02-21 湖南欧实电子科技有限公司 电源控制装置和控制设备
CN111432523B (zh) * 2020-03-19 2021-09-28 深圳市崧盛电子股份有限公司 输入电压随输出电压变化的buck恒流控制电路及电源
CN112737333B (zh) * 2020-12-28 2022-04-08 航天东方红卫星有限公司 一种卫星用高转换效率的二次电源

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011004564A (ja) * 2009-06-22 2011-01-06 Toshiba Corp 電源装置
CN102832680A (zh) * 2012-10-08 2012-12-19 南京觅丹电子信息有限公司 一种超级电容作为储能介质的物机
US11011612B2 (en) * 2018-07-20 2021-05-18 Rohm Co., Ltd. Semiconductor device
CN110456202A (zh) * 2019-08-23 2019-11-15 中控智慧(广东)科技有限公司 一种防拆机检测控制电路及电子设备
CN114172361A (zh) * 2021-11-08 2022-03-11 北京卫星制造厂有限公司 宇航低压buck抗干扰和延时启动电路

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