WO2022037518A1 - 内存智能卡、设备、网络、方法及计算机存储介质 - Google Patents

内存智能卡、设备、网络、方法及计算机存储介质 Download PDF

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Publication number
WO2022037518A1
WO2022037518A1 PCT/CN2021/112738 CN2021112738W WO2022037518A1 WO 2022037518 A1 WO2022037518 A1 WO 2022037518A1 CN 2021112738 W CN2021112738 W CN 2021112738W WO 2022037518 A1 WO2022037518 A1 WO 2022037518A1
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Prior art keywords
memory
data
interconnection
smart card
protocol
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PCT/CN2021/112738
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English (en)
French (fr)
Inventor
王富
徐迪
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Alibaba Group Holding Ltd
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Alibaba Group Holding Ltd
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0608—Saving storage space on storage systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0646—Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems

Definitions

  • the embodiments of the present invention relate to the technical field of electronic information, and in particular, to a memory smart card, a device, a network, a method, and a computer storage medium.
  • the processor when processing data, the processor first obtains the data to be processed from the memory, and returns the data to the memory after processing the data to be processed. Therefore, the memory directly affects the computing performance of the device.
  • the memory of multiple devices in order to increase the memory and improve the computing performance of the device, the memory of multiple devices is pooled. Specifically, the memory of multiple devices can be used as shared memory to form a memory pool for unified management. Memory can be dynamically allocated in the memory pool, which improves the utilization of memory, and expands the memory to a certain extent for a single device.
  • embodiments of the present invention provide a memory smart card, a device, a network, a method, and a computer storage medium to solve some or all of the above problems.
  • a memory smart card which includes: a processing module and a memory interconnection interface; at least one memory slot is provided on the memory smart card for inserting a memory stick; and a processing module is used to pass The memory slot reads the first data from the memory module or writes the second data to the memory module; the memory interconnection interface is used to encapsulate the first data according to the memory interconnection protocol and transmit it to other memory smart cards, or to receive second data transmitted by other memory smart cards, and decapsulate the second data.
  • an electronic device which includes: at least one processor, a first memory interconnect switch, and at least one memory smart card as described in the first aspect of the embodiments of the present invention; wherein, The processor is communicatively connected to the corresponding memory smart card; at least one memory smart card is respectively communicatively connected to the first memory interconnection switch through the memory interconnection interface, and communicates with each other through the first memory interconnection switch; the memory interconnection interface of the memory smart card is used for the memory interconnection according to the memory interconnection interface.
  • the protocol encapsulates the data to be transmitted, and transmits the encapsulated data to be transmitted to the first memory interconnect switch; and is also used for decapsulating the to-be-processed data received from the first memory interconnect switch according to the memory interconnect protocol.
  • a memory interconnection network which includes: at least one electronic device as described in the second aspect of the embodiments of the present invention.
  • a data transmission method applied to a memory smart card, comprising: acquiring first target data; encapsulating the first target data according to a memory interconnection protocol to obtain target transmission data, and interconnecting the memory
  • the protocol is used to indicate the protocol for data transmission between memory smart cards; data is transmitted to other memory smart cards through the memory interconnect interface that supports the memory interconnect protocol.
  • a data transmission method is provided, applied to a memory smart card, which includes: receiving target transmission data transmitted by other memory smart cards through a memory interconnection interface; decoding the target transmission data according to a memory interconnection protocol The first target data is obtained by encapsulation.
  • a memory smart card which includes: a transmission module and a processing module; wherein, the processing module is used for acquiring first target data; and encapsulating the first target data according to a memory interconnection protocol
  • the target transmission data is obtained, and the memory interconnection protocol is used to indicate the data transmission protocol between the memory smart cards; the transmission module is used to transmit the target transmission data to other memory smart cards through the memory interconnection interface supporting the memory interconnection protocol.
  • a memory smart card which includes: a transmission module and a processing module; wherein the transmission module is used to receive target transmission data transmitted by other memory smart cards through a memory interconnection interface; and the processing module, It is used for decapsulating the target transmission data according to the memory interconnection protocol to obtain the first target data.
  • a computer storage medium on which a computer program is stored, and when the program is executed by a processor, implements the data described in the fourth or fifth aspect of the embodiments of the present invention transfer method.
  • the memory interconnection interface can encapsulate or decapsulate data according to the memory interconnection protocol. Data transmission can be carried out directly through the memory interconnection interface, which realizes the communication between memory smart cards and does not require data transmission through the processor and the network card, which improves the data transmission rate and reduces the performance overhead of the processor.
  • the memory smart card also includes a consistent interconnection interface for data transmission with the processor, because the data description information in the protocol of the consistent interconnection interface occupies less bits, therefore, the memory smart card communicates with the processor through the consistent interconnection interface.
  • the processor is more efficient at data transfer.
  • the memory smart card can compress the data before writing data to the memory module, so as to reduce the storage space occupied by the data and improve the utilization rate of the storage space.
  • the memory smart card can also send broadcast information to other memory smart cards through the memory interconnection interface to synchronize the results of data update.
  • FIG. 1 is a schematic diagram of a memory pooling scenario according to Embodiment 1 of the present application.
  • FIG. 2 is a structural diagram of a memory smart card provided in Embodiment 1 of the present application.
  • FIG. 3 is a structural diagram of another memory smart card provided in Embodiment 1 of the present application.
  • FIG. 4 is a structural diagram of another memory smart card provided by Embodiment 1 of the present application.
  • FIG. 5 is a structural diagram of an electronic device according to Embodiment 2 of the present application.
  • FIG. 6 is a structural diagram of another electronic device provided in Embodiment 2 of the present application.
  • FIG. 7 is a schematic diagram of a cloud scene of an electronic device according to Embodiment 2 of the present application.
  • FIG. 8 is a structural diagram of a memory interconnection network according to Embodiment 3 of the present application.
  • FIG. 9 is a structural diagram of another memory interconnection network provided by Embodiment 3 of the present application.
  • FIG. 10 is a structural diagram of another memory interconnection network provided by Embodiment 3 of the present application.
  • FIG. 11 is a flowchart of a data transmission method according to Embodiment 4 of the present application.
  • FIG. 12 is a schematic diagram of a first image display effect according to Embodiment 4 of the present application.
  • FIG. 13 is a flowchart of a data transmission method according to Embodiment 5 of the present application.
  • FIG. 14 is a schematic diagram of a display effect of a second image according to Embodiment 5 of the present application.
  • FIG. 15 is a structural diagram of a memory smart card according to Embodiment 6 of the present application.
  • FIG. 16 is a structural diagram of a memory smart card according to Embodiment 7 of the present application.
  • FIG. 1 is a memory provided by the first embodiment of the present application. Schematic diagram of the pooling scene.
  • FIG. 1 takes memory pooling as an example for illustration.
  • the scenario shown in FIG. 1 includes a memory smart card 11 and a processor 12.
  • FIG. 1 shows a plurality of memory smart cards 11 and a plurality of processors 12. These memory smart cards 11 and the processor 12 may belong to the same device, or may belong to different devices, which are not limited in this application.
  • the memories of a plurality of memory smart cards 11 form a memory pool 13 , and memory is allocated to each processor 12 from the memory pool 13 .
  • FIG. 1 three processors 12 are shown, which are represented by A, B, and C respectively.
  • FIG. 1 is only an exemplary illustration, and does not mean that the present application is limited to this.
  • three processors 12 are The memory corresponding to the processor 12 is represented by a, b, and c respectively.
  • the memory a, b, and c allocated for processors A, B, and C in the memory pool can be dynamically adjusted, which makes the utilization of the memory higher and improves the operation efficiency. .
  • FIG. 2 is a structural diagram of a memory smart card provided in Embodiment 1 of the present application.
  • the structure of the provided memory smart card 11 will be described in detail.
  • the memory smart card 11 includes: a processing module 111 and a memory interconnection interface 112;
  • the memory smart card 11 is provided with at least one memory slot 113 for inserting a memory stick;
  • the processing module 111 is configured to read the first data from the memory module or write the second data to the memory module through the memory slot 113;
  • the memory interconnection interface 112 is used to encapsulate the first data according to the memory interconnection protocol and transmit it to other memory smart cards, or receive second data transmitted by other memory smart cards, and decapsulate the second data.
  • the first data and the second data may be the same or different, which is not limited in this application.
  • processing module 111 and the memory interconnection interface 112 in this application can be implemented by a field programmable gate array (English: Field Programmable Gate Array, FPGA) with a memory medium controller, or can be implemented by a central processing unit (English: Field Programmable Gate Array, FPGA). : Central Processing Unit, CPU) execution program implementation, which is not limited in this application.
  • the memory interconnect interface 112 may be an interface supporting a memory interconnect protocol.
  • the memory interconnect interface 112 may be a high-speed serializer/deserializer (English: Serializer/Deserializer, SERDES) interface.
  • SERDES Serializer/Deserializer
  • the memory interconnection protocol is a protocol for data transmission between the memory smart cards 112.
  • the memory interconnection protocol may be a lightweight remote direct data access (English: Remote Direct Memory Access, RDMA) protocol, or the memory interconnection protocol may be the Zth Generation (English: Generation, GenZ) protocol.
  • the lightweight RDMA protocol refers to the part of the RDMA protocol used for inter-memory communication.
  • the memory interconnection protocol is a protocol that supports mutual communication between memories. Compared with ordinary Ethernet interconnection The protocol is more concise and the data transmission efficiency is higher.
  • the memory sticks may include Storage Class Memory (English: Storage Class Memory), and may also include Double Rate (English: Double Rate Memory) Data Rate) memory, of course, this is only an exemplary description, and does not mean that the application is limited to this.
  • the memory smart card 11 can also communicate with the processor 12, and can also implement data processing inside the memory smart card 11.
  • the processor 12 can also implement data processing inside the memory smart card 11.
  • two application scenarios are listed for description.
  • FIG. 3 is a structure diagram of another memory smart card provided in Embodiment 1 of the present application.
  • the smart card 11 further includes a consistent interconnection interface 114, which is in communication connection with the processing module 111; the consistent interconnection interface 111 is used to encapsulate the third data according to the protocol of the consistent interconnection interface, and transmit it to the processor, Or, receive the fourth data transmitted by the processor, and decapsulate the fourth data.
  • the third data and the fourth data may be the same or different, and the first data, the second data, the third data and the fourth data may be the same or different, and this is only to illustrate different functions, not to limit the data.
  • the processing module 111 is further configured to read the first data from the memory stick, and decompress the first data; or compress the second data, and write the compressed second data into the memory stick.
  • the processing module 111 compresses the data before writing to the memory stick, which can reduce the storage space occupied by the data and further improve the utilization rate of the storage space of the memory smart card 11 .
  • the processing module 111 can also implement more data processing, for example, the processing module 111 is further configured to lock the accessed data when the data is accessed. If the data is being accessed by processor A, after the accessed data is locked, other processors except processor A cannot access the data, preventing two processors from accessing the data at the same time, resulting in data errors; for another example, the processing module 111 , and is also used to send broadcast information to other memory smart cards through the memory interconnection interface after the data is modified, and the broadcast information is used to indicate that the data is modified. If the processor A modifies the data, the memory smart card 11 sends broadcast information to other memory smart cards, so that the processor can obtain the latest data through the memory smart card.
  • FIG. 4 is a structural diagram of another memory smart card provided in Embodiment 1 of the present application.
  • the memory smart card 11 shown in FIG. 4 is based on the memory smart card 11 shown in FIG. 2 .
  • the structure diagram of the memory smart card 11 further illustrates the structure of the processing module 111.
  • the processing module 111 may include a near memory computing (English: Near Memory Computing) unit 1111 and a memory medium control (Memory Controller) unit 1112.
  • the near-memory computing unit 1111 is used to compress or decompress data, and can compress the data before transmitting the data through the memory interconnection interface 112 to reduce the amount of data in the transmission process. After the data is received, the data is decompressed.
  • the memory medium control unit 1112 is used to read data from the memory stick or write data to the memory stick through the memory slot 113; it is also used to lock the accessed data when the data is accessed; it is also used to, after the data is modified, Send broadcast information to other memory smart cards through the memory interconnect interface.
  • the structure of the processing module 111 is only exemplarily described here, which does not mean that the present application is limited thereto.
  • the memory interconnection interface can encapsulate or decapsulate data according to the memory interconnection protocol, and data transmission can be directly performed between the memory smart cards through the memory interconnection interface.
  • the communication between the memory smart cards is realized without data transmission through the processor and the network card, which improves the data transmission rate and reduces the performance overhead of the processor.
  • FIG. 5 is a structural diagram of an electronic device according to Embodiment 2 of the present application.
  • the electronic device 20 includes at least one processor 201 , a first memory interconnect switch 202 , and at least one processor according to the embodiment. a described memory smart card 11;
  • the processor 201 is communicatively connected with the corresponding memory smart card 11; at least one memory smart card 11 is respectively communicatively connected with the first memory interconnection switch 202 through the memory interconnection interface 112, and communicates with each other through the first memory interconnection switch 202;
  • the memory interconnection interface 112 of the memory smart card 11 is used for encapsulating the data to be transmitted according to the memory interconnection protocol, and transmitting the encapsulated to-be-transmitted data to the first memory interconnection switch 202;
  • the data to be processed by a memory interconnect switch 202 is decapsulated.
  • the first memory interconnection switch 202 is a switch that includes multiple memory interconnection interfaces supporting the memory interconnection protocol, and the memory smart card 11 directly performs data transmission with the first memory interconnection switch 202 through the memory interconnection interface 112, thereby realizing multiple memory interconnection interfaces.
  • the communication between the memory smart cards 11 does not need to go through the processor and the network card, and the data transmission rate is faster and the efficiency is higher.
  • the processor 201 is communicatively connected to the corresponding memory smart card 11 through the coherence interconnection interface 114, and the coherence interconnection interface 114 has been described in detail in the first embodiment, and will not be repeated here.
  • the electronic device 20 may display a target image on the display screen when the memory smart card 11 directly performs data transmission with other memory smart cards 11 through the memory interconnection interface 112, and the target image is used to represent at least two memory smart cards 11 pass through the memory.
  • the interconnect interface 112 transmits data.
  • the target image may include a first image and a second image, the first image is used to indicate that the memory smart card 11 transmits target transmission data to other memory smart cards 11 through the memory interconnection interface 112, and the second image is used to indicate that the memory smart card 11 has passed through.
  • the memory interconnection interface 112 receives target transmission data transmitted by other memory smart cards 11 .
  • the first image and the second image may be the same or different, and the first image and the second image may be static images or dynamic images, or a logo.
  • the electronic device 20 can also display a third image on the display screen when the memory smart card 11 communicates with the processor 201 through the consistent interconnection interface 114 , and the third image is used to indicate that the memory smart card 11 communicates with the processor through the consistent interconnection interface 114 .
  • 201 for data transmission It should be noted that the display screen may be a display screen of another device, and the electronic device 20 controls the display screen to display, and the display screen may also be a part of the electronic device 20 .
  • the electronic device 20 further includes: at least one network card 203 corresponding to at least one processor 201 , and an Ethernet
  • the processor 201 is communicatively connected to the corresponding network card 203 ; at least one network card 203 is connected to the Ethernet switch 204 through a network interface, and communicates with each other through the Ethernet switch 204 .
  • the network includes Local Area Network (English: Local Area Network, LAN), Wide Area Network (English: Wide Area Network, WAN), mobile communication network; such as World Wide Web (English: World Wide Web, WWW), long-term Evolution (English: Long Term Evolution, LTE) network, 2G network (English: 2th Generation Mobile Network), 3G network (English: 3th Generation Mobile Network), 5G network (English: 5th Generation Mobile Network), etc.
  • Local Area Network English: Local Area Network, LAN
  • Wide Area Network English: Wide Area Network, WAN
  • mobile communication network such as World Wide Web (English: World Wide Web, WWW), long-term Evolution (English: Long Term Evolution, LTE) network, 2G network (English: 2th Generation Mobile Network), 3G network (English: 3th Generation Mobile Network), 5G network (English: 5th Generation Mobile Network), etc.
  • LTE long-term Evolution
  • 2G network English: 2th Generation Mobile Network
  • 3G network English: 3th Generation Mobile Network
  • 5G network English: 5th Generation Mobile Network
  • FIG. 7 is an embodiment of the application 2.
  • FIG. 7 Provides a schematic diagram of a cloud scene of an electronic device.
  • FIG. 7 shows at least one processor 201, a first memory interconnect switch 202, and at least one memory smart card 11 as described in Embodiment 1, wherein at least one processor 201 is communicatively connected with at least one memory smart card 11, and at least one memory Only the card directly transmits data to the first memory interconnect switch 202 through the memory interconnection interface 112, so as to realize the communication between the multiple memory smart cards 11 without passing through the processor and the network card, and the data transmission rate is faster and the efficiency is higher.
  • the processor 201 and the memory smart card 11 are far apart in physical space, and data is transmitted between the processor 201 and the memory smart card 11 through the network. If the memory smart card 11 passes through the processor 201 Therefore, the direct communication between the memory smart cards 11 through the memory interconnection interface 112 can reduce the consumption of computing power and bandwidth, and further improve the data transmission efficiency.
  • a memory interconnection interface is set in the memory smart card of the electronic device, the memory interconnection interface can encapsulate or decapsulate data according to the memory interconnection protocol, and the memory interconnection interface can be used directly between the memory smart cards.
  • Data transmission realizes the communication between memory smart cards, and does not require data transmission through the processor and the network card, which improves the data transmission rate and reduces the performance overhead of the processor.
  • Embodiment 3 of the present application provides a memory interconnection network, as shown in FIG. 8 , which is a memory interconnection network provided by Embodiment 3 of the present application.
  • a structure diagram of a memory interconnection network, the memory interconnection network 30 includes: at least one electronic device 20 as described in the second embodiment.
  • the memory interconnection network 30 further includes a second memory interconnection switch 301, and the first memory interconnection switch 202 in the electronic device 20 is connected to the second memory interconnection switch 301 through a memory interconnection interface, so as to realize The memory interconnection between different electronic devices 20 , that is, the memory smart cards 11 in different electronic devices 20 can communicate through the first memory interconnection switch 202 and the second memory interconnection switch 301 .
  • the memory smart cards 11 in the plurality of electronic devices 20 form a memory pool 31 .
  • the memory pool 31 shown in FIG. 9 The storage space is larger, which further improves the utilization rate of the memory smart card 11 in each electronic device.
  • the memory interconnection network 30 shown in FIG. 10 not only includes the second memory interconnection switch 301, but also includes storage. device 302;
  • the storage device 302 includes at least one memory module 3021, at least one system-on-chip 3022, and a third memory interconnect switch 3023, and the at least one system-on-chip 3022 is communicatively connected to the third memory interconnect switch 3023, and communicates with each other through the third memory interconnect switch 3023 ;
  • the third memory interconnect switch 3023 and the first memory interconnect switch 202 are both communicatively connected to the second memory interconnect switch 301 , and the electronic device 20 and the storage device 302 communicate with each other through the second memory interconnect switch 301 .
  • the storage device 302 and the third memory interconnect switch 3023 can be connected through the memory interconnect interface 112, and the third memory interconnect switch, the first memory interconnect switch 202, and the second memory interconnect switch 301 can also be connected through the memory interconnect.
  • the interconnection interface 112 is connected, which enables the memory of the electronic device 20 and the storage device 302 to form a memory pool 32, with larger memory space and higher memory utilization, which can meet different memory requirements of more devices.
  • a memory interconnection interface is set in the memory smart card of the electronic device in the memory interconnection network.
  • the memory interconnection interface can directly transmit data, realize the communication between memory smart cards, and do not need to transmit data through the processor and the network card, which improves the data transmission rate and reduces the performance overhead of the processor.
  • the fourth embodiment of the present application provides a data transmission method, which can be applied to the memory smart card described in the first embodiment, and can also be applied to the electronic device described in the second embodiment and the third embodiment.
  • the described memory interconnection network is only an exemplary illustration, and does not mean that the application is limited to this.
  • FIG. 11 is a flowchart of a data transmission method provided in Embodiment 4 of the application. The method includes the following steps:
  • Step 401 Acquire first target data.
  • target data is used to indicate the data to be processed.
  • data the first target data and the second target data are used to represent two different data.
  • the first target data may be any data, which is not limited in this application.
  • the first target data can be acquired according to the instruction.
  • acquiring the first target data includes: receiving a transmission instruction through a memory interconnection interface, and decapsulating the transmission instruction according to the memory interconnection protocol, and the transmission instruction is used to instruct the transmission of the first target data.
  • a target data obtain the first target data according to the decapsulated transmission instruction.
  • the transmission instruction may be sent by the processor to the memory smart card, or may be sent by other memory smart cards, which is not limited in this application.
  • the first target data may be acquired by the memory smart card from the memory module through the memory slot; or transmitted by the processor received through the coherent interconnection interface. Data; it can also receive data transmitted by other memory smart cards through the memory interconnect interface.
  • three examples are listed for description:
  • the first target data may be obtained by a memory smart card from a memory stick through a memory slot.
  • obtaining the first target data includes: reading third target data from the memory stick. , and decompress the third target data to obtain the first target data.
  • the first target data may be transmitted by a processor received through a coherent interconnect interface, and obtaining the first target data includes:
  • the second target data transmitted by the processor is received through the consistent interconnection interface, and the consistent interconnection interface is used for data transmission between the processor and the memory smart card; the second target data is decapsulated according to the protocol of the consistent interconnection interface to obtain the first target data.
  • the protocol of the coherent interconnect interface includes a Compute Express Link (English: Compute Express Link, CLX) protocol or a cache coherent interconnect for accelerators (English: Cache Coherent Interconnect for Accelerators, CCIX) protocol.
  • CLX Compute Express Link
  • CCIX cache Coherent Interconnect for Accelerators
  • the first target data transmitted by other memory smart cards can be received through the memory interconnection interface, and the acquisition of the first target data includes: receiving the target transmission data transmitted by other memory smart cards through the memory interconnection interface;
  • the memory interconnect protocol decapsulates the target transmission data to obtain first target data.
  • Step 402 Encapsulate the first target data according to the memory interconnection protocol to obtain target transmission data.
  • the memory interconnect protocol is used to indicate the protocol for transferring data between memory smart cards.
  • the memory interconnect protocol may include a Gen Z protocol or a lightweight remote direct data access protocol.
  • Step 403 transmit data to other memory smart card transmission targets through the memory interconnection interface supporting the memory interconnection protocol.
  • the method when transmitting data to other memory smart cards through the memory interconnection interface supporting the memory interconnection protocol, the method further includes: displaying a first image on the display screen, where the first image is used to indicate that the memory smart card transmits data to the memory smart card through the memory interconnection interface.
  • Other memory smart card transfer targets transfer data.
  • the first image can be a static image or a dynamic image, or a logo. As shown in Figure 12, through the first image, the user can intuitively see the state of data transmission between memory smart cards in the device.
  • the memory interconnection interface can encapsulate or decapsulate data according to the memory interconnection protocol, and data transmission can be directly performed between the memory smart cards through the memory interconnection interface. , realizes the communication between the memory smart cards, does not need to transmit data through the processor and the network card, improves the data transmission rate, and reduces the performance overhead of the processor.
  • the fifth embodiment of the present application provides a data transmission method, which can be applied to the memory smart card described in the first embodiment, and can also be applied to the electronic device described in the second embodiment and the third embodiment.
  • the described memory interconnection network of course, this is only an exemplary illustration, and does not mean that the application is limited to this.
  • the data transmission method provided in the fifth embodiment of the application corresponds to the receiving end of the data transmission method described in the fourth embodiment of the application.
  • FIG. 13 which is a flowchart of a data transmission method provided in Embodiment 5 of the present application, and the method includes the following steps:
  • Step 501 Receive target transmission data transmitted by other memory smart cards through the memory interconnection interface.
  • Step 502 Decapsulate the target transmission data according to the memory interconnect protocol to obtain first target data.
  • the first target data can be further encapsulated through the memory interconnection interface and transmitted to other memory smart cards after being encapsulated according to the memory interconnection protocol, that is, the data transmission method described in Embodiment 4 of the present application, which will not be repeated here;
  • the first target data can also be transmitted to the processor or written into the memory stick, and two examples are given here for description.
  • the method further includes: encapsulating the first target data according to the protocol of the coherent interconnection interface to obtain the second target data; transmitting the second target data to the processor through the coherent interconnection interface,
  • the coherent interconnect interface is used to transfer data between the processor and the memory smart card.
  • the method further includes: writing the first target data into the memory stick through the memory slot.
  • the method further includes: compressing the first target data to obtain third target data; and writing the third target data into the memory stick.
  • the method when receiving the target transmission data transmitted by other memory smart cards through the memory interconnection interface, the method further includes: displaying a second image on the display screen, the second image being used to indicate that the memory smart card receives transmissions from other memory smart cards through the memory interconnection interface.
  • target transfer data can be a static image or a dynamic image, or a logo, and the second image can be the same as or different from the first image, as shown in FIG. 14 , through the second image, the user can intuitively see the memory in the device Status of data transferred between smart cards.
  • the memory interconnection interface can encapsulate or decapsulate data according to the memory interconnection protocol, and data transmission can be directly performed between the memory smart cards through the memory interconnection interface. , realizes the communication between the memory smart cards, does not need to transmit data through the processor and the network card, improves the data transmission rate, and reduces the performance overhead of the processor.
  • Embodiment 6 of the present application provides a memory smart card that can execute the data transmission method described in Embodiment 4 above.
  • FIG. 15 is a structural diagram of a memory smart card provided in Embodiment 6 of the present application, the memory smart card 60 includes: a processing module 601 and a transmission module 602;
  • the processing module 601 is used to obtain the first target data; the first target data is encapsulated according to the memory interconnection protocol to obtain the target transmission data, and the memory interconnection protocol is used to indicate the protocol of data transmission between the memory smart cards;
  • the transmission module 602 is configured to transmit target transmission data to other memory smart cards through the memory interconnection interface supporting the memory interconnection protocol.
  • the processing module 601 is configured to receive the transmission instruction through the memory interconnection interface, and decapsulate the transmission instruction according to the memory interconnection protocol, and the transmission instruction is used to instruct the transmission of the first target data; obtain the first target data according to the decapsulated transmission instruction. a target data.
  • the processing module 601 is configured to receive the second target data transmitted by the processor through a consistent interconnection interface, and the consistent interconnection interface is used to transmit data between the processor and the memory smart card;
  • the second target data is decapsulated to obtain the first target data, and the protocol of the coherent interconnection interface is consistent with the data protocol in the processor cache.
  • the protocol of the coherent interconnect interface includes a compute fast link protocol or a cache coherent interconnect protocol for accelerators.
  • the processing module 601 is configured to read the third target data from the memory stick, and decompress the third target data to obtain the first target data.
  • the memory interconnect protocol includes the GenZ protocol or the Lightweight Remote Direct Data Access Protocol.
  • the processing module 601 is further configured to display a first image on the display screen, where the first image is used to indicate that the memory smart card transmits the target transmission data to other memory smart cards through the memory interconnection interface.
  • the memory interconnection interface can encapsulate or decapsulate data according to the memory interconnection protocol, and data transmission can be directly performed between the memory smart cards through the memory interconnection interface. , realizes the communication between the memory smart cards, does not need to transmit data through the processor and the network card, improves the data transmission rate, and reduces the performance overhead of the processor.
  • Embodiment 7 of the present application provides a memory smart card that can execute the data transmission method described in Embodiment 5 above.
  • FIG. 16 is a structural diagram of a memory smart card provided in Embodiment 7 of the present application, the memory smart card 70 includes: a transmission module 701 and a processing module 702;
  • the transmission module 701 is used to receive the target transmission data transmitted by other memory smart cards through the memory interconnection interface;
  • the processing module 702 is configured to decapsulate the target transmission data according to the memory interconnection protocol to obtain the first target data.
  • the transmission module 701 is further configured to encapsulate the first target data according to the protocol of the coherent interconnection interface to obtain the second target data, and the protocol of the coherent interconnection interface is consistent with the data protocol in the processor cache;
  • the interconnection interface transmits the second target data to the processor, and the consistent interconnection interface is used for transmitting data between the processor and the memory smart card.
  • the processing module 702 is further configured to compress the first target data to obtain third target data, and write the third target data into a memory stick.
  • the processing module 702 is further configured to display a second image on the display screen, where the second image is used to indicate that the memory smart card receives the target transmission data transmitted by other memory smart cards through the memory interconnection interface.
  • the memory interconnection interface can encapsulate or decapsulate data according to the memory interconnection protocol, and data transmission can be directly performed between the memory smart cards through the memory interconnection interface. , realizes the communication between the memory smart cards, does not need to perform data transmission through the processor and the network card, improves the data transmission rate, and reduces the performance overhead of the processor.
  • Embodiment 8 of the present application provides a computer storage medium on which a computer program is stored. When the program is executed by a processor, the methods described in Embodiments 4 to 5 are implemented.
  • the memory interconnection interface can encapsulate or decapsulate data according to the memory interconnection protocol, and data transmission can be directly performed between the memory smart cards through the memory interconnection interface. , realizes the communication between the memory smart cards, does not need to perform data transmission through the processor and the network card, improves the data transmission rate, and reduces the performance overhead of the processor.
  • each component/step described in the embodiments of the present invention may be split into more components/steps, or two or more components/steps or some operations of components/steps may be combined into New components/steps to achieve the purpose of embodiments of the present invention.
  • the above-described methods according to embodiments of the present invention may be implemented in hardware, firmware, or as software or computer codes that may be stored in a recording medium (such as CD ROM, RAM, floppy disk, hard disk, or magneto-optical disk), or by Network downloaded computer code originally stored in a remote recording medium or non-transitory machine-readable medium and will be stored in a local recording medium so that the methods described herein can be stored on a computer using a general purpose computer, special purpose processor or programmable or such software processing on a recording medium of dedicated hardware such as ASIC or FPGA.
  • a recording medium such as CD ROM, RAM, floppy disk, hard disk, or magneto-optical disk
  • Network downloaded computer code originally stored in a remote recording medium or non-transitory machine-readable medium and will be stored in a local recording medium so that the methods described herein can be stored on a computer using a general purpose computer, special purpose processor or programmable or such software processing on a recording medium of dedicated hardware such as ASIC or FPGA
  • a computer, processor, microprocessor controller or programmable hardware includes storage components (eg, RAM, ROM, flash memory, etc.) that can store or receive software or computer code when the software or computer code is executed by a computer, When accessed and executed by a processor or hardware, the data transfer methods described herein are implemented. Furthermore, when a general-purpose computer accesses code for implementing the data transmission method shown herein, execution of the code converts the general-purpose computer into a special-purpose computer for executing the data transmission method shown herein.
  • storage components eg, RAM, ROM, flash memory, etc.

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Abstract

本发明实施例提供了一种内存智能卡、设备、网络、方法及计算机存储介质，其中，内存智能卡包括：处理模块和内存互联接口；内存智能卡上设置有至少一个内存插槽，用于插入内存条；内存互联接口，用于与其他内存智能卡通信，还用于根据内存互联协议对数据进行封装或者解封装；处理模块，用于通过内存插槽从内存条读取数据或者向内存条写入数据。内存智能卡之间通过内存互联接口进行数据传输，提高了数据传输速率，也减少了处理器的性能开销。

Description

内存智能卡、设备、网络、方法及计算机存储介质
本申请要求2020年08月20日递交的申请号为202010845861.5、发明名称为“内存智能卡、设备、网络、方法及计算机存储介质”中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明实施例涉及电子信息技术领域，尤其涉及内存智能卡、设备、网络、方法及计算机存储介质。
背景技术
通常情况下，处理器在进行数据处理时，先从内存中获取待处理数据，对待处理数据进行处理后，将数据返回给内存。因此，内存直接影响设备的运算性能。相关技术中，为了增加内存，提高设备的运算性能，对多个设备的内存进行池化，具体地，可以将多个设备的内存作为共享内存形成内存池，进行统一管理，对于每个设备都可以在内存池中动态分配内存，这样提高了内存的利用率，对于单个设备，在一定程度上也扩展了内存。但是，在实现上述内存池化的过程中，访问其他设备内存，需要通过处理器和网卡进行访问，数据传输速率比较低，而且也增加了处理器的性能开销。尤其是在云处理的场景下，处理器和内存在物理空间往往相距较远，通过处理器和网卡访问其他设备内存，会消耗更多的算力和带宽。
发明内容
有鉴于此，本发明实施例提供一种内存智能卡、设备、网络、方法及计算机存储介质，以解决上述部分或全部问题。
根据本发明实施例的第一方面，提供了一种内存智能卡，其包括：处理模块和内存互联接口；内存智能卡上设置有至少一个内存插槽，用于插入内存条；处理模块，用于通过内存插槽从内存条读取第一数据或者向内存条写入第二数据；内存互联接口，用于根据内存互联协议对第一数据进行封装，并传输至其他内存智能卡，或者，用于接收其他内存智能卡传输的第二数据，并对第二数据解封装。
根据本发明实施例的第二方面，提供了一种电子设备，其包括：至少一个处理器、第一内存互联交换机、至少一个如本发明实施例的第一方面所描述的内存智能卡；其中， 处理器与对应的内存智能卡通信连接；至少一个内存智能卡通过内存互联接口分别与第一内存互联交换机通信连接，并通过第一内存互联交换机相互通信；内存智能卡的内存互联接口，用于根据内存互联协议对待传输数据进行封装，并将封装后的待传输数据传输至第一内存互联交换机；还用于根据内存互联协议，对接收自第一内存互联交换机的待处理数据进行解封装。
根据本发明实施例的第三方面，提供了一种内存互联网络，其包括：至少一个如本发明实施例的第二方面所描述的电子设备。
根据本发明实施例的第四方面，提供了一种数据传输方法，应用于内存智能卡，其包括：获取第一目标数据；根据内存互联协议对第一目标数据进行封装得到目标传输数据，内存互联协议用于指示内存智能卡之间传输数据的协议；通过支持内存互联协议的内存互联接口向其他内存智能卡传输目标传输数据。
根据本发明实施例的第五方面，提供了一种数据传输方法，应用于内存智能卡，其包括：通过内存互联接口接收其他内存智能卡传输的目标传输数据；根据内存互联协议对目标传输数据进行解封装得到第一目标数据。
根据本发明实施例的第六方面，提供了一种内存智能卡，其包括：传输模块和处理模块；其中，处理模块，用于获取第一目标数据；根据内存互联协议对第一目标数据进行封装得到目标传输数据，内存互联协议用于指示内存智能卡之间传输数据的协议；传输模块，用于通过支持内存互联协议的内存互联接口向其他内存智能卡传输目标传输数据。
根据本发明实施例的第七方面，提供了一种内存智能卡，其包括：传输模块和处理模块；其中，传输模块，用于通过内存互联接口接收其他内存智能卡传输的目标传输数据；处理模块，用于根据内存互联协议对目标传输数据进行解封装得到第一目标数据。
根据本发明实施例的第八方面，提供了一种计算机存储介质，其上存储有计算机程序，该程序被处理器执行时实现如本发明实施例的第四方面或第五方面所描述的数据传输方法。
本发明实施例提供的内存智能卡、设备、网络、方法及计算机存储介质，因为内存智能卡中设置了内存互联接口，该内存互联接口可以根据内存互联协议对数据进行封装或者解封装，内存智能卡之间通过内存互联接口可以直接进行数据传输，实现了内存智能卡之间的通信，不需要通过处理器和网卡进行数据传输，提高了数据传输速率，也减少了处理器的性能开销。进一步地，内存智能卡中还包括与处理器进行数据传输的一致 性互联接口，因为一致性互联接口的协议中数据的描述信息所占用的位数较少，因此，内存智能卡通过一致性互联接口与处理器进行数据传输的效率更高。而且，内存智能卡在向内存条写入数据之前，可以对数据进行压缩，以减少数据占用的存储空间，提高存储空间的利用率。另外，内存智能卡还可以通过内存互联接口向其他内存智能卡发送广播信息，同步数据更新的结果。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明实施例中记载的一些实施例，对于本领域普通技术人员来讲，还可以根据这些附图获得其他的附图。
图1为本申请实施例一提供的一种内存池化场景示意图；
图2为本申请实施例一提供的一种内存智能卡的结构图；
图3为本申请实施例一提供的另一种内存智能卡的结构图；
图4为本申请实施例一提供的又一种内存智能卡的结构图；
图5为本申请实施例二提供的一种电子设备的结构图；
图6为本申请实施例二提供的另一种电子设备的结构图；
图7为本申请实施例二提供的一种电子设备的云场景示意图；
图8为本申请实施例三提供的一种内存互联网络的结构图；
图9为本申请实施例三提供的另一种内存互联网络的结构图；
图10为本申请实施例三提供的又一种内存互联网络的结构图；
图11为本申请实施例四提供的一种数据传输方法的流程图；
图12为本申请实施例四提供的一种第一图像显示效果示意图；
图13为本申请实施例五提供的一种数据传输方法的流程图；
图14为本申请实施例五提供的一种第二图像显示效果示意图；
图15为本申请实施例六提供的一种内存智能卡的结构图；
图16为本申请实施例七提供的一种内存智能卡的结构图。
具体实施方式
为了使本领域的人员更好地理解本发明实施例中的技术方案，下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅是本发明实施例一部分实施例，而不是全部的实施例。基于本发明实施例中的实施例，本领域普通技术人员所获得的所有其他实施例，都应当属于本发明实施例保护的范围。
下面结合本发明实施例附图进一步说明本发明实施例具体实现。
实施例一
本申请实施例一提供一种内存智能卡，为了便于理解，对本申请实施例一所提供的内存智能卡的应用场景进行说明，参照图1所示，图1为本申请实施例一提供的一种内存池化场景示意图。图1以内存池化为例进行说明，图1所示的场景中包括内存智能卡11和处理器12，需要说明的是，图1中示出了多个内存智能卡11和多个处理器12，这些内存智能卡11和处理器12可以是属于同一个设备的，也可以是属于不同设备的，本申请对此不做限制。图1中，多个内存智能卡11的内存形成一个内存池13，从内存池13中对每个处理器12分配内存。
图1中，示出了3个处理器12，分别用A，B，C表示，当然，图1只是示例性说明，并不代表本申请局限于此，对应的，在内存池中，3个处理器12对应的内存分别用a，b，c表示，内存池中为处理器A，B，C分配的内存a，b，c可以动态调整，使得内存的利用率更高，提高了运算效率。
结合上述图1所示的内存池化场景，为了实现内存智能卡11之间相互通信，结合图2所示，图2为本申请实施例一提供的一种内存智能卡的结构图，对本申请实施例一提供的内存智能卡11的结构进行详细说明。内存智能卡11包括：处理模块111、内存互联接口112；
内存智能卡11上设置有至少一个内存插槽113，用于插入内存条；
处理模块111，用于通过内存插槽113从内存条读取第一数据或者向内存条写入第二数据；
内存互联接口112，用于根据内存互联协议对第一数据进行封装，并传输至其他内存智能卡，或者，接收其他内存智能卡传输的第二数据，并对第二数据解封装。其中，第一数据和第二数据可以相同或者不同，本申请对此不做限制。
需要说明的是，本申请中处理模块111和内存互联接口112可以通过带内存介质控制器的现场可编程逻辑门阵列(英文：Field Programmable Gate Array，FPGA)实现， 也可以通过中央处理器(英文：Central Processing Unit，CPU)执行程序实现，本申请对此不做限制。
可选地，内存互联接口112可以是支持内存互联协议的接口。内存互联接口112可以是一个高速串行器/解串器(英文：Serializer/Deserializer，SERDES)接口。当然，此处只是示例性说明。内存互联协议为内存智能卡112之间进行数据传输的协议，例如，内存互联协议可以是轻量化远程直接数据存取(英文：Remote Direct Memory Access，RDMA)协议，或者，内存互联协议可以是第Z代(英文：Generation，GenZ)协议。其中，轻量化RDMA协议指的是RDMA协议中用于内存相互通信的部分，当然，此处只是示例性说明，内存互联协议是支持内存之间相互通信的协议，相比于普通的以太网互联协议更简洁，数据传输效率更高。
需要说明的是，本申请对于内存插槽中插入的内存条类型不做限制，示例性的，内存条可以包括存储等级内存(英文：Storage Class Memory)，还可以包括双倍速率(英文：Double Data Rate)内存，当然，此处只是示例性说明，并不代表本申请局限于此。
内存智能卡11还可以与处理器12进行通信，也可以在内存智能卡11内部实现数据处理，此处，列举两种应用场景分别进行说明。
可选地，在第一种应用场景中，基于图2所示的内存智能卡11的结构，如图3所示，图3为本申请实施例一提供的另一种内存智能卡的结构图，内存智能卡11还包括一致性互联接口114，一致性互联接口114与处理模块111通信连接；一致性互联接口111，用于根据一致性互联接口的协议对第三数据进行封装，并传输至处理器，或者，接收处理器传输的第四数据，并对第四数据解封。其中，第三数据和第四数据可以相同或者不同，第一数据、第二数据、第三数据和第四数据可以相同或者不同，此处只是为了说明不同的功能，并不是对数据进行限定。
因为一致性互联接口的协议中数据的描述信息所占用的位数较少，因此，处理器与内存智能卡11通过一致性互联接口114之间数据的传输效率更高。当然，此处只是示例性说明，并不代表本申请局限于此。
可选地，处理模块111，还用于从内存条读取第一数据，并对第一数据进行解压缩；或者对第二数据进行压缩，将压缩后的第二数据写入内存条中。处理模块111对数据在写入内存条之前进行压缩，可以减小数据占用的存储空间，进一步提高内存智能卡11存储空间的利用率。
可选地，在第二种应用场景中，处理模块111还可以实现更多数据处理，例如，处 理模块111，还用于在数据被访问时，锁定被访问数据。如果数据正在被处理器A访问，锁定被访问数据后，除处理器A之外的其他处理器就不能访问该数据，避免两个处理器同时访问数据，导致数据出错；又如，处理模块111，还用于在数据被修改后，通过内存互联接口向其他内存智能卡发送广播信息，广播信息用于指示数据被修改。如果处理器A对数据进行修改，内存智能卡11向其他内存智能卡发送广播信息，使得处理器可以通过内存智能卡获取最新的数据。
基于第二种应用场景，示例性的，如图4所示，图4为本申请实施例一提供的又一种内存智能卡的结构图，图4所示的内存智能卡11，基于图2所示的内存智能卡11的结构图，对处理模块111的结构进行了进一步示意，处理模块111可以包括近内存计算(英文：Near Memory Computing)单元1111和内存介质控制(Memory Controller)单元1112。近内存计算单元1111，用于对数据进行压缩或者解压缩，可以在将数据通过内存互联接口112传输之前，对数据进行压缩，减少传输过程中的数据量，同理，在通过内存互联接口112接收到数据之后，对数据进行解压缩。内存介质控制单元1112，用于通过内存插槽113从内存条读取数据或者向内存条写入数据；还用于在数据被访问时，锁定被访问数据；还用于在数据被修改后，通过内存互联接口向其他内存智能卡发送广播信息。当然，此处只是示例性说明处理模块111的结构，不代表本申请局限于此。
本发明实施例提供的内存智能卡，因为内存智能卡中设置了内存互联接口，该内存互联接口可以根据内存互联协议对数据进行封装或者解封装，内存智能卡之间通过内存互联接口可以直接进行数据传输，实现了内存智能卡之间的通信，不需要通过处理器和网卡进行数据传输，提高了数据传输速率，也减少了处理器的性能开销。
实施例二
基于上述实施例一所描述的内存智能卡，本申请实施例二提供一种电子设备，该电子设备可以是一个服务器，也可以是包含多个服务器的机柜，本申请对电子设备的具体形式不做限制，如图5所示，图5为本申请实施例二提供的一种电子设备的结构图，该电子设备20包括，至少一个处理器201、第一内存互联交换机202、至少一个如实施例一所描述的内存智能卡11；
其中，处理器201与对应的内存智能卡11通信连接；至少一个内存智能卡11通过内存互联接口112分别与第一内存互联交换机202通信连接，并通过第一内存互联交换机202相互通信；
内存智能卡11的内存互联接口112，用于根据内存互联协议对待传输数据进行封装， 并将封装后的待传输数据传输至第一内存互联交换机202；还用于根据内存互联协议，对接收自第一内存互联交换机202的待处理数据进行解封装。
需要说明的是，第一内存互联交换机202是包含有支持内存互联协议的多个内存互联接口的交换机，内存智能卡11通过内存互联接口112直接与第一内存互联交换机202进行数据传输，从而实现多个内存智能卡11之间的通信，不需要经过处理器和网卡，数据传输速率更快，效率更高。
可选地，处理器201通过一致性互联接口114与对应的内存智能卡11通信连接，一致性互联接口114在实施例一中已详细说明，此处不再赘述。
可选地，电子设备20可以在内存智能卡11通过内存互联接口112直接与其他内存智能卡11进行数据传输时，通过显示屏显示目标图像，目标图像用于表示至少两个内存智能卡11之间通过内存互联接口112传输数据。可选地，目标图像可以包括第一图像和第二图像，第一图像用于表示内存智能卡11通过内存互联接口112向其他内存智能卡11传输目标传输数据，第二图像用于表示内存智能卡11通过内存互联接口112接收其他内存智能卡11传输的目标传输数据，第一图像和第二图像可以相同或者不同，第一图像和第二图像可以是静态图像或者动态图像，也可以是一个标识。电子设备20还可以在内存智能卡11通过一致性互联接口114与处理器201进行数据传输时，通过显示屏显示第三图像，第三图像用于表示内存智能卡11通过一致性互联接口114与处理器201进行数据传输。需要说明的是，显示屏可以是其他设备的显示屏，电子设备20控制该显示屏显示，显示屏也可以是电子设备20的一部分。
可选地，如图6所示，图6为本申请实施例二提供的另一种电子设备的结构图，电子设备20还包括：与至少一个处理器201对应的至少一个网卡203，以及以太网交换机204；处理器201与对应的网卡203通信连接；至少一个网卡203通过网络接口与以太网交换机204连接，并通过以太网交换机204相互通信。
因为内存智能卡11之间通过内存互联接口112实现内存互联，但并不能实现网络通信，而网卡203通过以太网交换机204可以实现普通的网络互联，还可以通过以太网交换机204接入网络。需要说明的是，本申请中，网络包括局域网(英文：Local Area Network，LAN)、广域网(英文：Wide Area Network，WAN)、移动通信网络；如万维网(英文：World Wide Web，WWW)、长期演进(英文：Long Term Evolution，LTE)网络、2G网络(英文：2th Generation Mobile Network)、3G网络(英文：3th Generation Mobile Network)，5G网络(英文：5th Generation Mobile Network)等。当然，此 处只是示例性说明，并不代表本申请局限于此。
结合上述图5和图6所示的电子设备的结构，此处，以云处理为例，对电子设备的另一种形态进行示例性说明，如图7所示，图7为本申请实施例二提供的一种电子设备的云场景示意图。图7示出了至少一个处理器201、第一内存互联交换机202，以及至少一个如实施例一所描述的内存智能卡11，其中至少一个处理器201与至少一个内存智能卡11通信连接，至少一个内存只能卡通过内存互联接口112直接与第一内存互联交换机202进行数据传输，从而实现多个内存智能卡11之间的通信，不需要经过处理器和网卡，数据传输速率更快，效率更高。在图7所示的云场景中，处理器201与内存智能卡11在物理空间上相距较远，处理器201与内存智能卡11之间通过网络进行数据传输，如果内存智能卡11之间通过处理器201通信，则数据往返传输会消耗较多的算力与带宽，因此，内存智能卡11之间通过内存互联接口112直接通信能够减少算力与带宽的消耗，进一步提高数据传输效率。
本发明实施例提供的电子设备，因为电子设备的内存智能卡中设置了内存互联接口，该内存互联接口可以根据内存互联协议对数据进行封装或者解封装，内存智能卡之间通过内存互联接口可以直接进行数据传输，实现了内存智能卡之间的通信，不需要通过处理器和网卡进行数据传输，提高了数据传输速率，也减少了处理器的性能开销。
实施例三
基于上述实施例一所描述的内存智能卡以及上述实施例二所描述的电子设备，本申请实施例三提供一种内存互联网络，如图8所示，图8为本申请实施例三提供的一种内存互联网络的结构图，该内存互联网络30包括：至少一个如实施例二所描述的电子设备20。
可选地，如图9所示，内存互联网络30还包括第二内存互联交换机301，电子设备20中的第一内存互联交换机202通过内存互联接口与第二内存互联交换机301连接，以此实现不同电子设备20之间的内存互联，即不同电子设备20中的内存智能卡11可以通过第一内存互联交换机202及第二内存互联交换机301进行通信。结合图9所示，多个电子设备20中的内存智能卡11，形成了一个内存池31，相比于图1所示的内存池化场景中的内存池13，图9所示的内存池31存储空间更大，进一步提高了各个电子设备中内存智能卡11的利用率。
可选地，基于图9所示的内存互联网络30，如图10所示，对内存互联网络进一步进行说明，图10所示的内存互联网络30不仅包括第二内存互联交换机301，还包括存 储设备302；
存储设备302包括至少一个内存模块3021、至少一个系统级芯片3022和第三内存互联交换机3023，至少一个系统级芯片3022与第三内存互联交换机3023通信连接，并通过第三内存互联交换机3023相互通信；
第三内存互联交换机3023和第一内存互联交换机202均与第二内存互联交换机301通信连接，电子设备20和存储设备302通过第二内存互联交换机301相互通信。
需要说明的是，存储设备302与第三内存互联交换机3023之间可以通过内存互联接口112连接，第三内存互联交换机、第一内存互联交换机202以及第二内存互联交换机301之间也可以通过内存互联接口112连接，这使得电子设备20和存储设备302的内存形成一个内存池32，内存空间更大，内存利用率也更高，可以满足更多设备不同的内存需求。
本发明实施例提供的内存互联网络，因为内存互联网络中，电子设备的内存智能卡中设置了内存互联接口，该内存互联接口可以根据内存互联协议对数据进行封装或者解封装，内存智能卡之间通过内存互联接口可以直接进行数据传输，实现了内存智能卡之间的通信，不需要通过处理器和网卡进行数据传输，提高了数据传输速率，也减少了处理器的性能开销。
实施例四
结合实施例一所描述的内存智能卡，本申请实施例四提供一种数据传输方法，可以应用于实施例一所描述的内存智能卡，也可以应用于实施例二所描述的电子设备以及实施例三所描述的内存互联网络，当然，这只是示例性说明，并不代表本申请局限于此，如图11所示，图11为本申请实施例四提供的一种数据传输方法的流程图，该方法包括以下步骤：
步骤401、获取第一目标数据。
需要说明的是，本申请中“第一”、“第二”、“第三”、“目标”等均只用于表示区分，而不用作任何限定，例如，目标数据用于表示待处理的数据，第一目标数据和第二目标数据用于表示两个不同的数据。第一目标数据可以是任意一个数据，本申请对此不做限制。
可选地，可以根据指令获取第一目标数据，例如，获取第一目标数据，包括：通过内存互联接口接收传输指令，并根据内存互联协议对传输指令进行解封装，传输指令用于指示传输第一目标数据；根据解封装后的传输指令获取第一目标数据。该传输指令可 以是处理器发送给内存智能卡的，也可以是其他内存智能卡发送的，本申请对此不做限制。
需要说明的是，结合实施例一所描述的内存智能卡的结构，第一目标数据可以是内存智能卡通过内存插槽从内存条上获取的；也可以是通过一致性互联接口接收的处理器传输的数据；也可以是通过内存互联接口接收其他内存智能卡传输的数据，此处，分别列举三个示例进行说明：
可选地，在第一个示例中，第一目标数据可以是内存智能卡通过内存插槽从内存条上获取的，例如，获取第一目标数据，包括：从内存条中读取第三目标数据，对第三目标数据进行解压缩得到第一目标数据。
可选地，在第二个示例中，第一目标数据可以是通过一致性互联接口接收的处理器传输的，获取第一目标数据，包括：
通过一致性互联接口接收处理器传输的第二目标数据，一致性互联接口用于处理器和内存智能卡之间传输数据；根据一致性互联接口的协议对第二目标数据进行解封装得到第一目标数据。
可选地，一致性互联接口的协议包括计算快速链接(英文：Compute Express Link，CLX)协议或针对加速器的缓存一致性互联英文：Cache Coherent Interconnect for Accelerators，CCIX)协议。当然，此处只是示例性说明，并不代表本申请局限于此。一致性互联接口的协议中数据的描述信息较少，因此，传输的数据可以更多，提高了内存智能卡与处理器之间的数据传输效率。
可选地，在第三个示例中，可以通过内存互联接口接收其他内存智能卡传输的第一目标数据，获取第一目标数据，包括：通过内存互联接口接收其他内存智能卡传输的目标传输数据；根据内存互联协议对目标传输数据进行解封装得到第一目标数据。
步骤402、根据内存互联协议对第一目标数据进行封装得到目标传输数据。
内存互联协议用于指示内存智能卡之间传输数据的协议。示例性的，内存互联协议可以包括第Z代协议或轻量化远程直接数据存取协议。
步骤403、通过支持内存互联协议的内存互联接口向其他内存智能卡传输目标传输数据。
可选地，在通过支持内存互联协议的内存互联接口向其他内存智能卡传输目标传输数据时，该方法还包括：通过显示屏显示第一图像，第一图像用于表示内存智能卡通过内存互联接口向其他内存智能卡传输目标传输数据。该第一图像可以是静态图像或者动 态图像，也可以是一个标识，如图12所示，通过第一图像，用户可以直观地看到设备中内存智能卡之间传输数据的状态。
本发明实施例提供的数据传输方法，因为内存智能卡中设置了内存互联接口，该内存互联接口可以根据内存互联协议对数据进行封装或者解封装，内存智能卡之间通过内存互联接口可以直接进行数据传输，实现了内存智能卡之间的通信，不需要通过处理器和网卡进行数据传输，提高了数据传输速率，也减少了处理器的性能开销。
实施例五
结合实施例一所描述的内存智能卡，本申请实施例五提供一种数据传输方法，可以应用于实施例一所描述的内存智能卡，也可以应用于实施例二所描述的电子设备以及实施例三所描述的内存互联网络，当然，这只是示例性说明，并不代表本申请局限于此，本申请实施例五提供的数据传输方法，对应本申请实施例四所描述的数据传输方法的接收端的方法，如图13所示，图13为本申请实施例五提供的一种数据传输方法的流程图，该方法包括以下步骤：
步骤501、通过内存互联接口接收其他内存智能卡传输的目标传输数据。
步骤502、根据内存互联协议对目标传输数据进行解封装得到第一目标数据。
需要说明的是，该第一目标数据可以进一步通过内存互联接口，根据内存互联协议进行封装后传输至其他内存智能卡，即本申请实施例四所描述的数据传输方法，此处不再赘述；该第一目标数据还可以传输至处理器，或者写入内存条中，此处列举两个示例进行说明。
可选地，在第一个示例中，该方法还包括：根据一致性互联接口的协议对第一目标数据进行封装得到第二目标数据；通过一致性互联接口向处理器传输第二目标数据，一致性互联接口用于处理器和内存智能卡之间传输数据。
可选地，在第二个示例中，该方法还包括：通过内存插槽将第一目标数据写入内存条中。或者，该方法还包括：对第一目标数据进行压缩得到第三目标数据；并将第三目标数据写入内存条。
可选地，在通过内存互联接口接收其他内存智能卡传输的目标传输数据时，该方法还包括：通过显示屏显示第二图像，第二图像用于表示内存智能卡通过内存互联接口接收其他内存智能卡传输的目标传输数据。该第二图像可以是静态图像或者动态图像，也可以是一个标识，第二图像与第一图像可以相同或者不同，如图14所示，通过第二图像，用户可以直观地看到设备中内存智能卡之间传输数据的状态。
本发明实施例提供的数据传输方法，因为内存智能卡中设置了内存互联接口，该内存互联接口可以根据内存互联协议对数据进行封装或者解封装，内存智能卡之间通过内存互联接口可以直接进行数据传输，实现了内存智能卡之间的通信，不需要通过处理器和网卡进行数据传输，提高了数据传输速率，也减少了处理器的性能开销。
实施例六
基于上述实施例四所描述的数据传输方法，本申请实施例六提供一种内存智能卡，可以执行上述实施例四所描述的数据传输方法，当然，这只是示例性说明，并不代表本申请局限于此，如图15所示，图15为本申请实施例六提供的一种内存智能卡的结构图，该内存智能卡60包括：处理模块601和传输模块602；
其中，处理模块601，用于获取第一目标数据；根据内存互联协议对第一目标数据进行封装得到目标传输数据，内存互联协议用于指示内存智能卡之间传输数据的协议；
传输模块602，用于通过支持内存互联协议的内存互联接口向其他内存智能卡传输目标传输数据。
可选地，处理模块601，用于通过内存互联接口接收传输指令，并根据内存互联协议对传输指令进行解封装，传输指令用于指示传输第一目标数据；根据解封装后的传输指令获取第一目标数据。
可选地，处理模块601，用于通过一致性互联接口接收处理器传输的第二目标数据，一致性互联接口用于处理器和内存智能卡之间传输数据；根据一致性互联接口的协议对第二目标数据进行解封装得到第一目标数据，一致性互联接口的协议与处理器缓存中的数据协议一致。
可选地，一致性互联接口的协议包括计算快速链接协议或针对加速器的缓存一致性互联协议。
可选地，处理模块601，用于从内存条中读取第三目标数据，对第三目标数据进行解压缩得到第一目标数据。
可选地，内存互联协议包括GenZ协议或轻量化远程直接数据存取协议。
可选地，处理模块601，还用于通过显示屏显示第一图像，所述第一图像用于表示所述内存智能卡通过所述内存互联接口向其他内存智能卡传输所述目标传输数据。
本发明实施例提供的数据传输方法，因为内存智能卡中设置了内存互联接口，该内存互联接口可以根据内存互联协议对数据进行封装或者解封装，内存智能卡之间通过内存互联接口可以直接进行数据传输，实现了内存智能卡之间的通信，不需要通过处理器 和网卡进行数据传输，提高了数据传输速率，也减少了处理器的性能开销。
实施例七
基于上述实施例五所描述的数据传输方法，本申请实施例七提供一种内存智能卡，可以执行上述实施例五所描述的数据传输方法，当然，这只是示例性说明，并不代表本申请局限于此，如图16所示，图16为本申请实施例七提供的一种内存智能卡的结构图，该内存智能卡70包括：传输模块701和处理模块702；
其中，传输模块701，用于通过内存互联接口接收其他内存智能卡传输的目标传输数据；
处理模块702，用于根据内存互联协议对目标传输数据进行解封装得到第一目标数据。
可选地，传输模块701，还用于根据一致性互联接口的协议对第一目标数据进行封装得到第二目标数据，一致性互联接口的协议与处理器缓存中的数据协议一致；通过一致性互联接口向处理器传输第二目标数据，一致性互联接口用于处理器和内存智能卡之间传输数据。
可选地，处理模块702，还用于对所述第一目标数据进行压缩得到第三目标数据，并将所述第三目标数据写入内存条。
可选地，处理模块702，还用于通过显示屏显示第二图像，所述第二图像用于表示所述内存智能卡通过所述内存互联接口接收其他内存智能卡传输的所述目标传输数据。
本发明实施例提供的数据传输方法，因为内存智能卡中设置了内存互联接口，该内存互联接口可以根据内存互联协议对数据进行封装或者解封装，内存智能卡之间通过内存互联接口可以直接进行数据传输，实现了内存智能卡之间的通信，不需要通过处理器和网卡进行数据传输，提高了数据传输速率，也减少了处理器的性能开销。
实施例八
基于上述实施例四至实施例五所描述的方法，本申请实施例八提供一种计算机存储介质，其上存储有计算机程序，该程序被处理器执行时实现如实施例四至实施例五所描述的方法。
本发明实施例提供的计算机存储介质，因为内存智能卡中设置了内存互联接口，该内存互联接口可以根据内存互联协议对数据进行封装或者解封装，内存智能卡之间通过内存互联接口可以直接进行数据传输，实现了内存智能卡之间的通信，不需要通过处理器和网卡进行数据传输，提高了数据传输速率，也减少了处理器的性能开销。
需要指出，根据实施的需要，可将本发明实施例中描述的各个部件/步骤拆分为更多部件/步骤，也可将两个或多个部件/步骤或者部件/步骤的部分操作组合成新的部件/步骤，以实现本发明实施例的目的。
上述根据本发明实施例的方法可在硬件、固件中实现，或者被实现为可存储在记录介质(诸如CD ROM、RAM、软盘、硬盘或磁光盘)中的软件或计算机代码，或者被实现通过网络下载的原始存储在远程记录介质或非暂时机器可读介质中并将被存储在本地记录介质中的计算机代码，从而在此描述的方法可被存储在使用通用计算机、专用处理器或者可编程或专用硬件(诸如ASIC或FPGA)的记录介质上的这样的软件处理。可以理解，计算机、处理器、微处理器控制器或可编程硬件包括可存储或接收软件或计算机代码的存储组件(例如，RAM、ROM、闪存等)，当所述软件或计算机代码被计算机、处理器或硬件访问且执行时，实现在此描述的数据传输方法。此外，当通用计算机访问用于实现在此示出的数据传输方法的代码时，代码的执行将通用计算机转换为用于执行在此示出的数据传输方法的专用计算机。
本领域普通技术人员可以意识到，结合本文中所公开的实施例描述的各示例的单元及方法步骤，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本发明实施例的范围。
以上实施方式仅用于说明本发明实施例，而并非对本发明实施例的限制，有关技术领域的普通技术人员，在不脱离本发明实施例的精神和范围的情况下，还可以做出各种变化和变型，因此所有等同的技术方案也属于本发明实施例的范畴，本发明实施例的专利保护范围应由权利要求限定。

Claims (20)

  1. 一种内存智能卡，其包括：处理模块和内存互联接口；
    所述内存智能卡上设置有至少一个内存插槽，用于插入内存条；
    所述处理模块，用于通过所述内存插槽从所述内存条读取第一数据或者向所述内存条写入第二数据；
    所述内存互联接口，用于根据内存互联协议对所述第一数据进行封装，并传输至其他内存智能卡，或者，用于接收其他内存智能卡传输的所述第二数据，并对所述第二数据解封装。
  2. 根据权利要求1所述的内存智能卡，其中，所述内存智能卡还包括一致性互联接口；
    所述一致性互联接口，用于根据一致性互联接口的协议对第三数据进行封装，并传输至处理器，或者，接收处理器传输的第四数据，并对所述第四数据解封装。
  3. 根据权利要求1所述的内存智能卡，其中，
    所述处理模块，用于从所述内存条读取所述第一数据，并对所述第一数据进行解压缩；或者对所述第二数据进行压缩，将压缩后的所述第二数据写入所述内存条中。
  4. 根据权利要求1所述的内存智能卡，其中，
    所述处理模块，还用于在数据被访问时，锁定被访问数据。
  5. 根据权利要求1所述的内存智能卡，其中，
    所述处理模块，还用于在数据被修改后，通过所述内存互联接口向其他内存智能卡发送广播信息，所述广播信息用于指示所述数据被修改。
  6. 一种电子设备，其包括：至少一个处理器、第一内存互联交换机、至少一个如权利要求1-5任一项所述的内存智能卡；
    其中，所述处理器与对应的内存智能卡通信连接；所述至少一个内存智能卡通过内存互联接口分别与所述第一内存互联交换机通信连接，并通过所述第一内存互联交换机相互通信；
    所述内存智能卡的所述内存互联接口，用于根据内存互联协议对待传输数据进行封装，并将封装后的所述待传输数据传输至所述第一内存互联交换机；还用于根据所述内存互联协议，对接收自所述第一内存互联交换机的待处理数据进行解封装。
  7. 根据权利要求6所述的电子设备，其中，
    所述处理器通过一致性互联接口与对应的内存智能卡通信连接。
  8. 根据权利要求6所述的电子设备，其中，所述电子设备还包括：与所述至少一个处理器对应的至少一个网卡，以及以太网交换机；
    所述处理器与对应的所述网卡通信连接；
    所述至少一个网卡通过网络接口与所述以太网交换机连接，并通过所述以太网交换机相互通信。
  9. 一种内存互联网络，其包括：至少一个如权利要求6-8任一项所述的电子设备。
  10. 根据权利要求9所述的内存互联网络，其中，所述内存互联网络还包括存储设备和第二内存互联交换机；
    所述存储设备包括至少一个内存模块、至少一个系统级芯片和第三内存互联交换机，所述至少一个系统级芯片与所述第三内存互联交换机通信连接，并通过所述第三内存互联交换机相互通信；
    所述第三内存互联交换机和所述第一内存互联交换机均与所述第二内存互联交换机通信连接，所述电子设备和所述存储设备通过所述第二内存互联交换机相互通信。
  11. 一种数据传输方法，应用于内存智能卡，其包括：
    获取第一目标数据；
    根据内存互联协议对所述第一目标数据进行封装得到目标传输数据，所述内存互联协议用于指示内存智能卡之间传输数据的协议；
    通过支持所述内存互联协议的内存互联接口向其他内存智能卡传输所述目标传输数据。
  12. 根据权利要求11所述的方法，其中，获取第一目标数据，包括：
    通过所述内存互联接口接收传输指令，并根据所述内存互联协议对所述传输指令进行解封装，所述传输指令用于指示传输所述第一目标数据；
    根据解封装后的所述传输指令获取所述第一目标数据。
  13. 根据权利要求11所述的方法，其中，所述获取第一目标数据，包括：
    通过一致性互联接口接收处理器传输的第二目标数据，所述一致性互联接口用于处理器和所述内存智能卡之间传输数据；
    根据所述一致性互联接口的协议对所述第二目标数据进行解封装得到所述第一目标数据。
  14. 根据权利要求11所述的方法，其中，在通过支持所述内存互联协议的内存互联接口向其他内存智能卡传输所述目标传输数据时，所述方法还包括：
    通过显示屏显示第一图像，所述第一图像用于表示所述内存智能卡通过所述内存互联接口向其他内存智能卡传输所述目标传输数据。
  15. 一种数据传输方法，应用于内存智能卡，其包括：
    通过内存互联接口接收其他内存智能卡传输的目标传输数据；
    根据所述内存互联协议对所述目标传输数据进行解封装得到第一目标数据。
  16. 根据权利要求15所述的方法，其中，所述方法还包括：
    根据一致性互联接口的协议对所述第一目标数据进行封装得到第二目标数据；
    通过所述一致性互联接口向处理器传输所述第二目标数据，所述一致性互联接口用于处理器和所述内存智能卡之间传输数据。
  17. 根据权利要求15所述的方法，其中，在通过内存互联接口接收其他内存智能卡传输的目标传输数据时，所述方法还包括：
    通过显示屏显示第二图像，所述第二图像用于表示所述内存智能卡通过所述内存互联接口接收其他内存智能卡传输的所述目标传输数据。
  18. 一种内存智能卡，其包括：传输模块和处理模块；
    其中，所述处理模块，用于获取第一目标数据；根据内存互联协议对所述第一目标数据进行封装得到目标传输数据，所述内存互联协议用于指示内存智能卡之间传输数据的协议；
    所述传输模块，用于通过支持所述内存互联协议的内存互联接口向其他内存智能卡传输所述目标传输数据。
  19. 一种内存智能卡，其包括：传输模块和处理模块；
    其中，所述传输模块，用于通过内存互联接口接收其他内存智能卡传输的目标传输数据；
    所述处理模块，用于根据所述内存互联协议对所述目标传输数据进行解封装得到第一目标数据。
  20. 一种计算机存储介质，其上存储有计算机程序，该程序被处理器执行时实现如权利要求11-17中任一所述的数据传输方法。
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