WO2021158482A1 - Method for using ultra-thin etch stop layers in selective atomic layer etching - Google Patents

Method for using ultra-thin etch stop layers in selective atomic layer etching Download PDF

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Publication number
WO2021158482A1
WO2021158482A1 PCT/US2021/016076 US2021016076W WO2021158482A1 WO 2021158482 A1 WO2021158482 A1 WO 2021158482A1 US 2021016076 W US2021016076 W US 2021016076W WO 2021158482 A1 WO2021158482 A1 WO 2021158482A1
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Prior art keywords
film
reactant
ale
etching
zrch
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PCT/US2021/016076
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French (fr)
Inventor
Omid Zandi
Paul Abel
Jacques Faguet
David ZYWOTKO
Steven M. George
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Tokyo Electron Ltd
University of Colorado Boulder
Tokyo Electron US Holdings Inc
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Tokyo Electron Ltd
University of Colorado Boulder
Tokyo Electron US Holdings Inc
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Priority to KR1020227029387A priority Critical patent/KR20220134582A/en
Priority to JP2022547101A priority patent/JP2023513110A/en
Priority to CN202180012310.3A priority patent/CN115428130A/en
Publication of WO2021158482A1 publication Critical patent/WO2021158482A1/en
Anticipated expiration legal-status Critical
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H10P50/285Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means of materials not containing Si, e.g. PZT or Al2O3
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40Oxides
    • C23C16/403Oxides of aluminium, magnesium or beryllium
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40Oxides
    • C23C16/405Oxides of refractory metals or yttrium
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523Pulsed gas flow or change of composition over time
    • C23C16/45525Atomic layer deposition [ALD]
    • C23C16/45553Atomic layer deposition [ALD] characterized by the use of precursors specially adapted for ALD
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326Deposition processes
    • H10P14/6328Deposition from the gas or vapour phase
    • H10P14/6334Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6339Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/662Laminate layers, e.g. stacks of alternating high-k metal oxides
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69Inorganic materials
    • H10P14/692Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6938Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides
    • H10P14/6939Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal
    • H10P14/69391Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal the material containing aluminium, e.g. Al2O3
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69Inorganic materials
    • H10P14/692Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6938Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides
    • H10P14/6939Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal
    • H10P14/69392Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal the material containing hafnium, e.g. HfO2
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69Inorganic materials
    • H10P14/692Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6938Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides
    • H10P14/6939Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal
    • H10P14/69395Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal the material containing zirconium, e.g. ZrO2

Definitions

  • the present invention relates to the field of semiconductor manufacturing and semiconductor devices, and more particularly, to a method of using ultra-thin inorganic etch stop layers in semiconductor processing.
  • ALD Atomic layer deposition
  • ALE atomic layer etching
  • ESL ultrathin etch stop layer
  • a substrate processing method includes depositing a first film on a substrate, depositing a second film on the first film, and selectively etching the second film relative to the first film using an ALE process, where the etching self-terminates at an interface of the second film and the first film.
  • a substrate processing method includes providing a substrate containing a first film on a substrate and a second film on the first film, initiating etching of the second film using an ALE process that selectively etches the second film relative to the first film, and removing the second film using the ALE process, where the etching self-terminates at an interface of the second film and the first film.
  • the method further includes, following the removing, etching the first film using an additional ALE process, where the ALE process includes alternating gaseous exposures of a first reactant and a second reactant, and the additional ALE process includes alternating gaseous exposures of a third reactant and a fourth reactant, and where the ALE process and the additional ALE process are performed without plasma excitation of the first reactant, the second reactant, the third reactant, and the fourth reactant.
  • the first film has a uniform thickness of approximately one monolayer.
  • a substrate processing method includes depositing a ZrCh film on a substrate, depositing a AI2O3 film on the ZrCh film, initiating etching of the AI2O3 film using a thermal ALE process that selectively etches the AI2O3 film relative to the ZrCh film, and removing the AI2O3 film using the thermal ALE process, wherein the etching self-terminates at an interface of the AI2O3 film and the ZrCL film.
  • the ZrCh film has a uniform thickness of approximately one monolayer.
  • the thermal ALE process includes alternating gaseous exposures of HF and A1(CEE) 3.
  • the method further includes, following the removing, etching the ZrCL film using an additional thermal ALE process that includes alternating gaseous exposures of HF and A1(CH 3 )2C1.
  • FIGS. 1 A - IE schematically show a method of processing a layer structure according to an embodiment of the invention
  • FIG. 2 shows a substrate mass change traced with a quartz crystal microbalance (QCM) during deposition/etch processes according to an embodiment of the invention
  • FIG. 3 shows a substrate mass change traced with a QCM during deposition/etch processes according to embodiment of the invention
  • FIG. 4 shows etch rate measured by QCM according to an embodiment of the invention
  • FIG. 5 shows a substrate mass change traced with a QCM during an ALE process according to embodiment of the invention.
  • FIG. 6 shows in tabular form examples of combinations of etch reactants and materials that may be used for selective ALE according to embodiments of the invention.
  • an ESL is used in material stacks to stop an etch process at an interface of different materials or to protect an underlying material from etching.
  • Embodiments of the invention describe the use of an ESL that may be only one monolayer (atomic layer) thick and may be deposited and later removed in-situ in one or more process chambers.
  • the methods described herein can provide significant reduction in processing time and materials usage in semiconductor device manufacturing, and allow deposition/etch processes in nano-sized spaces and 3D features. Further, the methods can reduce problems associated with stress buildup during integration of multi-stacks of materials in semiconductor devices.
  • ALE is an etching technique for removing thin layers of material using sequential and self-limiting reactions.
  • Thermal ALE that is performed in the absence of plasma excitation, provides isotropic atomic-level etch control using sequential thermally driven reaction steps that are self-saturating and self-terminating.
  • Thermal ALE etch mechanisms can include fluorination and ligand-exchange, conversion- etch, and oxidation and fluorination reactions. The etching accuracy can reach atomic-scale dimensions, and a large area of uniform substrate etching can be achieved.
  • FIGS. 1 A - IE schematically show a method of processing a layer structure according to an embodiment of the invention.
  • the method includes providing a substrate 1 containing a base material 100 (e.g., a Si wafer), and a bottom film 102 on the base material 100.
  • the substrate 1 may contain one or more additional films and materials and one or more simple or advanced patterned features.
  • the method further includes depositing a first film 104 over the bottom film 102.
  • the first film 104 may serve as an ESL.
  • the first film 104 is a dielectric film.
  • the first film 102 can include a metal oxide film with a general formula M x O y , where x and y are integers. Examples include ZrCh and AI2O3.
  • the first film 104 can include ZrCh that may be uniformly deposited on the base material 100 using ALD processing.
  • the first film 102 is not limited to metal oxides and may include or consist of other materials, for example oxides, nitrides, oxynitrides, and other materials found in semiconductor devices.
  • the method further includes depositing a second film 106 on the first film 104, where the second film 106 contains a different material than the first film 104.
  • the first film 104 may be used to stop a subsequent etch process at an interface of the second film 106 and the first film 104 or to protect the first film 102 from etching.
  • the second film 106 is a dielectric film.
  • the second film 106 can include a metal oxide film with a general formula M x O y , where x and y are integers. Examples include ZrCh, HfCh, and AI2O3. In one example, the second film 106 can include AI2O3 that may be uniformly deposited on the first film 104 using ALD processing. However, the second film 106 is not limited to metal oxides and may include or consist of other materials, for example oxides, nitrides, oxynitrides, and other materials found in semiconductor devices.
  • the method further includes initiating etching of the second film 106 using an ALE process (e.g., a thermal ALE process) that selectively etches the second film 106 relative to the first film 104.
  • the ALE process removes the second film 106 until the etching self- terminates at the interface of the second film 106 and the first film 104 due to the selective etching characteristics of the ALE process.
  • FIG. ID schematically shows the substrate 1 when the second film 106 has been removed from the substrate 1. Thereafter, according to one embodiment, the first film 104 may be removed from the substrate 1, for example using an additional ALE process. This is schematically shown in FIG. ID.
  • FIG. 2 shows a substrate mass change traced with a quartz crystal microbalance (QCM) during deposition/etch processes according to an embodiment of the invention.
  • the mass trace 200 shows substrate mass gain/loss in ng/cm 2 on a QCM as a function of time, where mass gain and mass loss correspond to deposition and etch processes, respectively.
  • the film structure included a bottom AI2O3 film, a ZrCL film on the bottom AI2O3 film, and a top AI2O3 film on the ZrCL film.
  • the mass trace 200 is divided into three sections, where the first section 201 shows mass gain during ALD of the ZrCL film having a monolayer thickness on the bottom AI2O3 film, second section 202 shows mass gain during ALD of the top AI2O3 film on the ZrCL film, and third section 203 shows mass loss during etching and removal of the top AI2O3 film using an ALE process.
  • the ALD of the ZrCL film was performed using alternating gaseous exposures of zirconium tetrachloride (ZrCL) and water (H2O), and the ALD of the top AI2O3 film was performed using alternating gas exposures of trimethyl aluminum (A1(CH3)3) and H2O.
  • the ALE of the top AI2O3 film used alternating gas exposures of hydrogen fluoride (ELF) and A1(CEL)3, where each ALD cycle included AI2O3 surface fluorination using a HF exposure, followed by exposure to A1(CFE)3, which resulted in etching of the fluorinated surface layer (i.e., AIF3) through a ligand exchange reaction.
  • Unbalanced ALE reactions for etching of the top AI2O3 film include:
  • the etching of the top AI2O3 film proceeds until the top AI2O3 film is fully removed and then the ALE process self-terminates at the interface of the top AI2O3 film and the ZrCL film.
  • the ALE process self-terminates because the ZrCL film is highly resistant to etching by the alternating gases exposures of HF and A1(CH3)3.
  • the ZrCL film undergoes fluorination upon reaction with HF to form ZrF4
  • the ligand exchange reaction with A1(CH3)3 is thermodynamically unfavorable under the ALE conditions and this disrupts and stops the etching process.
  • Unbalanced ALE reactions for the ZrCL film include:
  • etch resistance of the ZrCL film is clearly shown in section 203 of FIG. 2, where, during removal of the top AI2O3 film, the measured mass trace 200 asymptotically approaches the mass of the ZrCL film after a large number of ALE cycles.
  • fluorination of ZrCL is observed as a mass gain in each ALE cycle, following the subsequent exposure of the fluorinated surface to Al(CH3)3(g>, no net change in mass is observed, indicating a passive surface toward an exchange reaction.
  • the etch process stops on the ZrCL film after fully etching and removing the top AI2O3 film, thereby demonstrating that the ZrCh film, although having only a monolayer thickness, acts as an ESL to effectively protect the underlying material (i.e., the bottom AI2O3 film) from etching.
  • the etch blocking ability of the ZrCk film as an ESL can in theory be infinite as the ligand exchange reaction is thermodynamically unfavorable under the ALE conditions. This allows an ultra-thin ESL with a monolayer thickness to effectively block the ALE process by using a proper material as an ESL.
  • FIG. 3 shows substrate mass change traced with a QCM during deposition/etch processes according to embodiment of the invention.
  • the trace 300 shows mass gain during ALD of a ZrCh film using alternating gas exposures of ZrCL and H2O, and mass change during subsequent ALE processing of the ZrCh film using alternating gas exposures of HF and A1(CH 3 )3.
  • the robustness of the ZrCh film as an ESL is clearly demonstrated and shows a 100% blocking efficiency of the ZrF4 surface of the ZrCE film, even after 100 cycles of the ESL process.
  • FIG. 4 shows etch rate measured by QCM according to embodiment of the invention.
  • the etch rate of an AI2O3 film in an ALE process as a function of different amounts of ZrCh pre-deposited on the AI2O3 film is shown in the figure.
  • the ZrCh was deposited by ALD using alternating gas exposures of A1(CH3)3 and H2O, and the ALE process was performed using alternating gas exposures of HF and A1(CH3)3.
  • the experimental data in solid circles 400 shows that increasing amount of ZrCL deposited on the AI2O3 film resulted in reduced amount of etching of the underlying AI2O3 film.
  • the effective etch blocking of ZrCh at a thickness of approximately one monolayer shows that the first monolayer of ZrCh uniformly covers the AI2O3 film and that the ZrCL precursor is more reactive towards exposed AI2O3 surface sites than the ZrCh covering the AI2O3 film.
  • FIG. 5 shows a substrate mass change traced with a QCM during an ALE process according to embodiment of the invention.
  • a ZrCh film is not etched by thermal ALE processing that etches a AI2O3 film using alternating gas exposures of HF and A1(CH3)3, the ZrCh film may be etched and removed by replacing one or more of the gaseous etch reactants in the ALE processing.
  • a ZrCh film was etched, as shown in trace 500, by thermal ALE processing using alternating gas exposures of HF and dimethyl aluminum chloride (DMAC, A1(03 ⁇ 4)2q). Replacing A1(03 ⁇ 4)3 with A1(03 ⁇ 4)2q renders the ligand exchange reaction thermodynamically favorable and thereby enables etching of the ZrCh film according the following unbalanced ALE reactions:
  • FIG. 6 shows in tabular form examples of combinations of etch reactants and materials that may be used for selective ALE according to embodiments of the invention. The listed combinations are based on experimental and thermodynamic information.
  • a ZrCh film may be used as an ESL for thermal ALE processing of AI2O3 and HfCh films using alternating gaseous exposures of HF and A1(CH 3 ) 3. Thereafter, if desired, the ZrCh film may be removed using alternating gaseous exposures of HF and A1(CH 3 )2C1, for example.
  • an AI2O3 film may be used as an ESL for thermal ALE processing of ZrCh and HfCh films using alternating gaseous exposures of HF and SiCl 4. Thereafter, if desired, the AI2O3 film may be removed using alternating gaseous exposures of HF and A1(CH 3 ) 3 , for example.
  • the ALD processing, the ALE processing, or both may be performed at a substrate temperature between about 100°C and about 400°C, between about 200°C and about 400°C, or between about 200°C and about 300°C. In one example, the ALD processing, the ALE processing, or both, may be performed at a substrate temperature between about 250°C and about 280°C.
  • the ALD processing and the ALE processing may be performed at the same substrate temperature or at approximately the same substrate temperature. Those skilled in the art will readily appreciate that this allows for high substrate throughput when performing both the ALD processing and the ALE processing in the same process chamber, and when using different process chambers for the ALD processing and the ALE processing.
  • two or more of the ALD processing, the ALE processing, and the additional ALE processing may be performed at that same substrate temperature or at approximately the same substrate temperature.
  • the ALE processing and the additional ALE processing may be performed at the same substrate temperature or at approximately the same substrate temperature.

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Abstract

Method for selective etching of materials using an ultrathin etch stop layer (ESL), where the ESL is effective at a thickness as small as approximately one monolayer using atomic layer etching (ALE). A substrate processing method includes depositing a first film on a substrate, depositing a second film on the first film, and selectively etching the second film relative to the first film using an ALE process, where the etching self-terminates at an interface of the second film and the first film.

Description

METHOD FOR USING ULTRA-THIN ETCH STOP LAYERS IN SELECTIVE ATOMIC
LAYER ETCHING
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application claims priority to U.S. Provisional Patent Application No. 62/969,567, entitled, “METHOD FOR USING ULTRA-THIN ETCH STOP LAYERS IN SELECTIVE ATOMIC LAYER ETCHING,” filed February 3, 2020; the disclosure of which is expressly incorporated herein, in its entirety, by reference.
FIELD OF INVENTION
[0002] The present invention relates to the field of semiconductor manufacturing and semiconductor devices, and more particularly, to a method of using ultra-thin inorganic etch stop layers in semiconductor processing.
BACKGROUND OF THE INVENTION
[0003] In the semiconductor and related industries, the fabrication of nanostructures and nanopatterns has resulted in demand for achieving near-atomic level accuracy and selectivity in depositing and etching different materials. Examples include metal filling of fine interconnect features, and formation of ultra-thin gate dielectrics and ultra-thin channels used in field-effect transistors and other nanodevices below the 10 nm scale. Atomic layer deposition (ALD) and atomic layer etching (ALE) processes can define the atomic layer growth and removal required for advanced semiconductor fabrication, producing ultrasmooth thin films based on deposit/etch-back methods and conformal etching in high- aspect-ratio structures.
SUMMARY OF THE INVENTION
[0004] Methods for selective etching of materials using an ultrathin etch stop layer (ESL) is described, where the ESL is effective at a thickness as small as approximately one monolayer when using an ALE process.
[0005] According to one embodiment, a substrate processing method includes depositing a first film on a substrate, depositing a second film on the first film, and selectively etching the second film relative to the first film using an ALE process, where the etching self-terminates at an interface of the second film and the first film.
[0006] According to another embodiment, a substrate processing method includes providing a substrate containing a first film on a substrate and a second film on the first film, initiating etching of the second film using an ALE process that selectively etches the second film relative to the first film, and removing the second film using the ALE process, where the etching self-terminates at an interface of the second film and the first film. The method further includes, following the removing, etching the first film using an additional ALE process, where the ALE process includes alternating gaseous exposures of a first reactant and a second reactant, and the additional ALE process includes alternating gaseous exposures of a third reactant and a fourth reactant, and where the ALE process and the additional ALE process are performed without plasma excitation of the first reactant, the second reactant, the third reactant, and the fourth reactant. According to one embodiment, the first film has a uniform thickness of approximately one monolayer.
[0007] According to another embodiment, a substrate processing method includes depositing a ZrCh film on a substrate, depositing a AI2O3 film on the ZrCh film, initiating etching of the AI2O3 film using a thermal ALE process that selectively etches the AI2O3 film relative to the ZrCh film, and removing the AI2O3 film using the thermal ALE process, wherein the etching self-terminates at an interface of the AI2O3 film and the ZrCL film. According to one embodiment, the ZrCh film has a uniform thickness of approximately one monolayer. According to one embodiment, the thermal ALE process includes alternating gaseous exposures of HF and A1(CEE)3. According to one embodiment, the method further includes, following the removing, etching the ZrCL film using an additional thermal ALE process that includes alternating gaseous exposures of HF and A1(CH3)2C1.
DETAILED DESCRIPTION OF THE DRAWINGS [0008] In the accompanying drawings:
[0009] FIGS. 1 A - IE schematically show a method of processing a layer structure according to an embodiment of the invention;
[0010] FIG. 2 shows a substrate mass change traced with a quartz crystal microbalance (QCM) during deposition/etch processes according to an embodiment of the invention;
[0011] FIG. 3 shows a substrate mass change traced with a QCM during deposition/etch processes according to embodiment of the invention; [0012] FIG. 4 shows etch rate measured by QCM according to an embodiment of the invention;
[0013] FIG. 5 shows a substrate mass change traced with a QCM during an ALE process according to embodiment of the invention; and
[0014] FIG. 6 shows in tabular form examples of combinations of etch reactants and materials that may be used for selective ALE according to embodiments of the invention.
DETAILED DESCRIPTION OF SEVERAL EMBODIMENTS [0015] In fabrication of semiconductor devices, an ESL is used in material stacks to stop an etch process at an interface of different materials or to protect an underlying material from etching. Embodiments of the invention describe the use of an ESL that may be only one monolayer (atomic layer) thick and may be deposited and later removed in-situ in one or more process chambers. The methods described herein can provide significant reduction in processing time and materials usage in semiconductor device manufacturing, and allow deposition/etch processes in nano-sized spaces and 3D features. Further, the methods can reduce problems associated with stress buildup during integration of multi-stacks of materials in semiconductor devices.
[0016] According to one embodiment, a method is described for selective etching of materials using an ultrathin ESL, where the ESL is effective in ALE processing at a thickness as small as approximately one monolayer. ALE is an etching technique for removing thin layers of material using sequential and self-limiting reactions. Thermal ALE, that is performed in the absence of plasma excitation, provides isotropic atomic-level etch control using sequential thermally driven reaction steps that are self-saturating and self-terminating. Thermal ALE etch mechanisms can include fluorination and ligand-exchange, conversion- etch, and oxidation and fluorination reactions. The etching accuracy can reach atomic-scale dimensions, and a large area of uniform substrate etching can be achieved. Examples of substrates that may be processed using the embodiments of the invention include thin wafers of a semiconductor material (e.g., Si) that are conventionally found in semiconductor manufacturing and can have diameter of 100mm, 200mm, 300mm, or larger. However, other types of substrates may be used, for examples substrates for making solar panels.
[0017] FIGS. 1 A - IE schematically show a method of processing a layer structure according to an embodiment of the invention. As schematically shown in FIG. 1 A, the method includes providing a substrate 1 containing a base material 100 (e.g., a Si wafer), and a bottom film 102 on the base material 100. Although not shown in FIG. 1 A, the substrate 1 may contain one or more additional films and materials and one or more simple or advanced patterned features.
[0018] In FIG. IB, the method further includes depositing a first film 104 over the bottom film 102. According to embodiments of the invention, the first film 104 may serve as an ESL. In one example, the first film 104 is a dielectric film. In some examples, the first film 102 can include a metal oxide film with a general formula MxOy, where x and y are integers. Examples include ZrCh and AI2O3. In one example, the first film 104 can include ZrCh that may be uniformly deposited on the base material 100 using ALD processing. However, the first film 102 is not limited to metal oxides and may include or consist of other materials, for example oxides, nitrides, oxynitrides, and other materials found in semiconductor devices. [0019] In FIG. 1C, the method further includes depositing a second film 106 on the first film 104, where the second film 106 contains a different material than the first film 104. According to embodiments of the invention, the first film 104 may be used to stop a subsequent etch process at an interface of the second film 106 and the first film 104 or to protect the first film 102 from etching. In one example, the second film 106 is a dielectric film. In some examples, the second film 106 can include a metal oxide film with a general formula MxOy, where x and y are integers. Examples include ZrCh, HfCh, and AI2O3. In one example, the second film 106 can include AI2O3 that may be uniformly deposited on the first film 104 using ALD processing. However, the second film 106 is not limited to metal oxides and may include or consist of other materials, for example oxides, nitrides, oxynitrides, and other materials found in semiconductor devices.
[0020] The method further includes initiating etching of the second film 106 using an ALE process (e.g., a thermal ALE process) that selectively etches the second film 106 relative to the first film 104. The ALE process removes the second film 106 until the etching self- terminates at the interface of the second film 106 and the first film 104 due to the selective etching characteristics of the ALE process. FIG. ID schematically shows the substrate 1 when the second film 106 has been removed from the substrate 1. Thereafter, according to one embodiment, the first film 104 may be removed from the substrate 1, for example using an additional ALE process. This is schematically shown in FIG. ID.
[0021] FIG. 2 shows a substrate mass change traced with a quartz crystal microbalance (QCM) during deposition/etch processes according to an embodiment of the invention. The mass trace 200 shows substrate mass gain/loss in ng/cm2 on a QCM as a function of time, where mass gain and mass loss correspond to deposition and etch processes, respectively.
The film structure included a bottom AI2O3 film, a ZrCL film on the bottom AI2O3 film, and a top AI2O3 film on the ZrCL film. The mass trace 200 is divided into three sections, where the first section 201 shows mass gain during ALD of the ZrCL film having a monolayer thickness on the bottom AI2O3 film, second section 202 shows mass gain during ALD of the top AI2O3 film on the ZrCL film, and third section 203 shows mass loss during etching and removal of the top AI2O3 film using an ALE process. The ALD of the ZrCL film was performed using alternating gaseous exposures of zirconium tetrachloride (ZrCL) and water (H2O), and the ALD of the top AI2O3 film was performed using alternating gas exposures of trimethyl aluminum (A1(CH3)3) and H2O. The ALE of the top AI2O3 film used alternating gas exposures of hydrogen fluoride (ELF) and A1(CEL)3, where each ALD cycle included AI2O3 surface fluorination using a HF exposure, followed by exposure to A1(CFE)3, which resulted in etching of the fluorinated surface layer (i.e., AIF3) through a ligand exchange reaction. [0022] Unbalanced ALE reactions for etching of the top AI2O3 film include:
[0023] AI2O3 + HF(g) ® AIF3 + H20(g) (1)
[0024] AIF3 + Al(CH3)3(g) ® AlFx(CH3)y(g) (2)
[0025] The etching of the top AI2O3 film proceeds until the top AI2O3 film is fully removed and then the ALE process self-terminates at the interface of the top AI2O3 film and the ZrCL film. The ALE process self-terminates because the ZrCL film is highly resistant to etching by the alternating gases exposures of HF and A1(CH3)3. Although the ZrCL film undergoes fluorination upon reaction with HF to form ZrF4, the ligand exchange reaction with A1(CH3)3 is thermodynamically unfavorable under the ALE conditions and this disrupts and stops the etching process.
[0026] Unbalanced ALE reactions for the ZrCL film include:
[0027] ZrCL + HF(g) ® ZrF4 + ¾( (3)
[0028] ZrF4 + Al(CH3)3(g) — » no reaction (4)
[0029] The etch resistance of the ZrCL film is clearly shown in section 203 of FIG. 2, where, during removal of the top AI2O3 film, the measured mass trace 200 asymptotically approaches the mass of the ZrCL film after a large number of ALE cycles. Although fluorination of ZrCL is observed as a mass gain in each ALE cycle, following the subsequent exposure of the fluorinated surface to Al(CH3)3(g>, no net change in mass is observed, indicating a passive surface toward an exchange reaction. Thus, the etch process stops on the ZrCL film after fully etching and removing the top AI2O3 film, thereby demonstrating that the ZrCh film, although having only a monolayer thickness, acts as an ESL to effectively protect the underlying material (i.e., the bottom AI2O3 film) from etching. From a thermodynamic point of view, the etch blocking ability of the ZrCk film as an ESL can in theory be infinite as the ligand exchange reaction is thermodynamically unfavorable under the ALE conditions. This allows an ultra-thin ESL with a monolayer thickness to effectively block the ALE process by using a proper material as an ESL.
[0030] FIG. 3 shows substrate mass change traced with a QCM during deposition/etch processes according to embodiment of the invention. The trace 300 shows mass gain during ALD of a ZrCh film using alternating gas exposures of ZrCL and H2O, and mass change during subsequent ALE processing of the ZrCh film using alternating gas exposures of HF and A1(CH3)3. The robustness of the ZrCh film as an ESL is clearly demonstrated and shows a 100% blocking efficiency of the ZrF4 surface of the ZrCE film, even after 100 cycles of the ESL process.
[0031] FIG. 4 shows etch rate measured by QCM according to embodiment of the invention. The etch rate of an AI2O3 film in an ALE process as a function of different amounts of ZrCh pre-deposited on the AI2O3 film is shown in the figure. The ZrCh was deposited by ALD using alternating gas exposures of A1(CH3)3 and H2O, and the ALE process was performed using alternating gas exposures of HF and A1(CH3)3. The experimental data in solid circles 400 shows that increasing amount of ZrCL deposited on the AI2O3 film resulted in reduced amount of etching of the underlying AI2O3 film. Particularly, about 200 ng of ZrCh, which corresponds to approximately one monolayer of ZrCh deposited on the AI2O3 film, reduced the AI2O3 etch rate to approximately zero value. Increasing the thickness of the ZrCh film to above a monolayer thickness did not affect the etch rate, since the ZrCh already fully covered the AI2O3 film. The effective etch stopping at a thickness of only approximately one monolayer of ZrCh is in agreement with the unfavorable thermodynamics of the etch reaction, where AI2O3 surface reaction sites are passivated with ZrCh. Further, the effective etch blocking of ZrCh at a thickness of approximately one monolayer shows that the first monolayer of ZrCh uniformly covers the AI2O3 film and that the ZrCL precursor is more reactive towards exposed AI2O3 surface sites than the ZrCh covering the AI2O3 film.
[0032] FIG. 5 shows a substrate mass change traced with a QCM during an ALE process according to embodiment of the invention. Although a ZrCh film is not etched by thermal ALE processing that etches a AI2O3 film using alternating gas exposures of HF and A1(CH3)3, the ZrCh film may be etched and removed by replacing one or more of the gaseous etch reactants in the ALE processing. In FIG. 5, a ZrCh film was etched, as shown in trace 500, by thermal ALE processing using alternating gas exposures of HF and dimethyl aluminum chloride (DMAC, A1(0¾)2q). Replacing A1(0¾)3 with A1(0¾)2q renders the ligand exchange reaction thermodynamically favorable and thereby enables etching of the ZrCh film according the following unbalanced ALE reactions:
[0033] Zr02 + HF(g) ® ZrF + ¾( (5)
[0034] ZrF4 + A1(aE)2<¾ ® ZrFxCly(g) (6)
[0035] The etching of the ZrCh film is illustrated by the stepwise mass loss in the QCM trace. [0036] FIG. 6 shows in tabular form examples of combinations of etch reactants and materials that may be used for selective ALE according to embodiments of the invention. The listed combinations are based on experimental and thermodynamic information. In one example illustrated in FIG. 6, a ZrCh film may be used as an ESL for thermal ALE processing of AI2O3 and HfCh films using alternating gaseous exposures of HF and A1(CH3)3. Thereafter, if desired, the ZrCh film may be removed using alternating gaseous exposures of HF and A1(CH3)2C1, for example. In another example, an AI2O3 film may be used as an ESL for thermal ALE processing of ZrCh and HfCh films using alternating gaseous exposures of HF and SiCl4. Thereafter, if desired, the AI2O3 film may be removed using alternating gaseous exposures of HF and A1(CH3)3, for example.
[0037] According to some embodiments, the ALD processing, the ALE processing, or both, may be performed at a substrate temperature between about 100°C and about 400°C, between about 200°C and about 400°C, or between about 200°C and about 300°C. In one example, the ALD processing, the ALE processing, or both, may be performed at a substrate temperature between about 250°C and about 280°C.
[0038] In some examples, the ALD processing and the ALE processing may be performed at the same substrate temperature or at approximately the same substrate temperature. Those skilled in the art will readily appreciate that this allows for high substrate throughput when performing both the ALD processing and the ALE processing in the same process chamber, and when using different process chambers for the ALD processing and the ALE processing. [0039] In some examples, two or more of the ALD processing, the ALE processing, and the additional ALE processing may be performed at that same substrate temperature or at approximately the same substrate temperature. For example, the ALE processing and the additional ALE processing may be performed at the same substrate temperature or at approximately the same substrate temperature. [0040] A plurality of embodiments for a method for selective etching of materials using an ultrathin etch stop layer (ESL) have been described. The foregoing description of the embodiments of the invention has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise forms disclosed. This description and the claims following include terms that are used for descriptive purposes only and are not to be construed as limiting. Persons skilled in the relevant art can appreciate that many modifications and variations are possible in light of the above teaching. It is therefore intended that the scope of the invention be limited not by this detailed description, but rather by the claims appended hereto.

Claims

What is claimed is:
1. A substrate processing method, comprising: depositing a first film on a substrate; depositing a second film on the first film; and selectively etching the second film relative to the first film using an atomic layer etching (ALE) process, wherein the etching self-terminates at an interface of the second film and the first film.
2. The method of claim 1, wherein the ALE process includes alternating gaseous exposures of a first reactant and a second reactant.
3. The method of claim 2, wherein the ALE process includes a thermal ALE process that is performed without plasma excitation of the first reactant and the second reactant.
4. The method of claim 1, wherein the first and second films are dielectric films.
5. The method of claim 1, wherein the first and second films include different metal oxide films that are selected from the group consisting of AI2O3, ZrCh, and HfCk
6. The method of claim 1, wherein the second film includes an AI2O3 film.
7. The method of claim 6, wherein the AI2O3 film is deposited using alternating gas exposures of A1(CH3)3 and H2O in an atomic layer deposition (ALD) process.
8. The method of claim 1, wherein the ALE process includes alternating gaseous exposures of 1) HF and 2) Sn(acac)2, A1(CH3)3, A1(CH3)2C1, SiCL, or TiCk
9. The method of claim 1, wherein the first film includes a ZrCh film.
10. The method of claim 9, wherein the ZrCh film has a uniform thickness of approximately one monolayer.
11. The method of claim 9, wherein the ZrCh film is deposited using alternating gas exposures of ZrCL and H2O in an atomic layer deposition (ALD) process.
12. The method of claim 1, further comprising: following the removing, etching the first film using an additional ALE process.
13. The method of claim 12, wherein the ALE process includes alternating gaseous exposures of a first reactant and a second reactant, and the additional ALE process includes alternating gaseous exposures of the first reactant and a third reactant that is different than the second reactant.
14. The method of claim 13, wherein the ALE process and the additional ALE process are performed without plasma excitation of the first reactant, the second reactant, and the third reactant.
15. The method of claim 13, wherein the first film includes a ZrCh film, the second film includes an AI2O3 film, the first reactant includes HF, the second reactant includes A1(CH3)3, and the third reactant includes A1(CH3)2C1.
16. A substrate processing method, comprising: providing a substrate containing a first film on a substrate and a second film on the first film; initiating etching of the second film using a thermal atomic layer etching (ALE) process that selectively etches the second film relative to the first film; removing the second film using the ALE process, wherein the etching self-terminates at an interface of the second film and the first film; and following the removing, etching the first film using an additional ALE process, wherein the ALE process includes alternating gaseous exposures of a first reactant and a second reactant, and the additional ALE process includes alternating gaseous exposures of the first reactant and a third reactant that is different than the second reactant, and wherein the ALE process and the additional ALE process are performed without plasma excitation of the first reactant, the second reactant, and the third reactant.
17. A substrate processing method, comprising: depositing a ZrCh film on a substrate; depositing a AI2O3 film on the ZrCh film; initiating etching of the AI2O3 film using a thermal atomic layer etching (ALE) process that selectively etches the AI2O3 film relative to the ZrCh film; and removing the AI2O3 film using the thermal ALE process, wherein the etching self- terminates at an interface of the AI2O3 film and the ZrCh film.
18. The method of claim 17, wherein the thermal ALE process includes alternating gaseous exposures of HF and A1(CEE)3.
19. The method of claim 17, wherein ZrCL film has a uniform thickness of approximately one monolayer.
20. The method of claim 17, further comprising: following the removing, etching the ZrCh film using an additional thermal ALE process that includes alternating gaseous exposures of HF and A1(CH3)2C1.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2024506456A (en) * 2021-02-03 2024-02-14 ラム リサーチ コーポレーション Control of etch selectivity in atomic layer etching
US12615980B2 (en) 2021-03-18 2026-04-28 Lam Research Corporation Etching of indium gallium zinc oxide

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11373878B2 (en) * 2020-07-16 2022-06-28 Taiwan Semiconductor Manufacturing Company Ltd. Technique for semiconductor manufacturing
US20240124776A1 (en) * 2022-10-14 2024-04-18 Laurence E. Spurgeon High performance semiconductor grade dimethylaluminum chloride
WO2025076005A1 (en) * 2023-10-04 2025-04-10 Lam Research Corporation Selectivity in thermal etch processes through surface passivation
US20250285886A1 (en) * 2024-03-11 2025-09-11 Egtm Co., Ltd. Method of treating thin films and method of manufacturing memory device

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9793135B1 (en) * 2016-07-14 2017-10-17 ASM IP Holding B.V Method of cyclic dry etching using etchant film
KR20180067667A (en) * 2015-11-10 2018-06-20 레르 리키드 쏘시에떼 아노님 뿌르 레?드 에렉스뿔라따시옹 데 프로세데 조르즈 클로드 Etch reactant and a plasma-free oxide etching process using the same
US20180240667A1 (en) * 2017-02-17 2018-08-23 Lam Research Corporation Tin oxide films in semiconductor device manufacturing
US10283353B2 (en) * 2017-03-29 2019-05-07 Asm Ip Holding B.V. Method of reforming insulating film deposited on substrate with recess pattern
WO2019190453A1 (en) * 2018-03-26 2019-10-03 Intel Corporation Selective etching and controlled atomic layer etching of transition metal oxide films for device fabrication

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6720259B2 (en) * 2001-10-02 2004-04-13 Genus, Inc. Passivation method for improved uniformity and repeatability for atomic layer deposition and chemical vapor deposition
US10121699B2 (en) * 2015-08-05 2018-11-06 Asm Ip Holding B.V. Selective deposition of aluminum and nitrogen containing material
US10229837B2 (en) * 2016-02-04 2019-03-12 Lam Research Corporation Control of directionality in atomic layer etching
US10208383B2 (en) * 2017-02-09 2019-02-19 The Regents Of The University Of Colorado, A Body Corporate Atomic layer etching processes using sequential, self-limiting thermal reactions comprising oxidation and fluorination

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180067667A (en) * 2015-11-10 2018-06-20 레르 리키드 쏘시에떼 아노님 뿌르 레?드 에렉스뿔라따시옹 데 프로세데 조르즈 클로드 Etch reactant and a plasma-free oxide etching process using the same
US9793135B1 (en) * 2016-07-14 2017-10-17 ASM IP Holding B.V Method of cyclic dry etching using etchant film
US20180240667A1 (en) * 2017-02-17 2018-08-23 Lam Research Corporation Tin oxide films in semiconductor device manufacturing
US10283353B2 (en) * 2017-03-29 2019-05-07 Asm Ip Holding B.V. Method of reforming insulating film deposited on substrate with recess pattern
WO2019190453A1 (en) * 2018-03-26 2019-10-03 Intel Corporation Selective etching and controlled atomic layer etching of transition metal oxide films for device fabrication

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2024506456A (en) * 2021-02-03 2024-02-14 ラム リサーチ コーポレーション Control of etch selectivity in atomic layer etching
JP7739434B2 (en) 2021-02-03 2025-09-16 ラム リサーチ コーポレーション Control of etching selectivity in atomic layer etching
US12615980B2 (en) 2021-03-18 2026-04-28 Lam Research Corporation Etching of indium gallium zinc oxide

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