WO2021000307A1 - Plug-in assembly, display control card and display system - Google Patents

Plug-in assembly, display control card and display system Download PDF

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Publication number
WO2021000307A1
WO2021000307A1 PCT/CN2019/094628 CN2019094628W WO2021000307A1 WO 2021000307 A1 WO2021000307 A1 WO 2021000307A1 CN 2019094628 W CN2019094628 W CN 2019094628W WO 2021000307 A1 WO2021000307 A1 WO 2021000307A1
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WO
WIPO (PCT)
Prior art keywords
pin
signal
pins
connector
interface
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PCT/CN2019/094628
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French (fr)
Chinese (zh)
Inventor
庞跃
韦桂锋
Original Assignee
西安诺瓦星云科技股份有限公司
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Application filed by 西安诺瓦星云科技股份有限公司 filed Critical 西安诺瓦星云科技股份有限公司
Priority to PCT/CN2019/094628 priority Critical patent/WO2021000307A1/en
Priority to CN201980024911.9A priority patent/CN112534495A/en
Publication of WO2021000307A1 publication Critical patent/WO2021000307A1/en

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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]

Definitions

  • This application relates to the field of display technology, and in particular to a plug-in component, a display control card and a display system.
  • the structure of the display box provided by display manufacturers gradually solidified.
  • the receiving card products need to be made into smaller core cards.
  • the core card usually needs to be used with an adapter board (or HUB board), and the two are connected together through a connector to drive the display box in the LED display.
  • Common connectors currently include golden fingers and board-to-board connectors.
  • the golden finger connection requires high requirements for the thickness and error of the core board.
  • it is easy to be stressed and deformed, causing problems such as chip cracking.
  • the error caused by the wear of the core board or the thickness of the core board can affect the signal Transmission has a big impact.
  • the mainstream board-to-board connector in the industry is a 120pin connector, but multiple pins used for function expansion on it are not used. There are problems that the pin layout is not compact enough, the interface pin resources are wasted, and the production cost is relatively high.
  • the embodiments of the present application provide a plug-in assembly, a display control card, and a display system, which implement compact arrangement of interface pins, save interface resources, and reduce production costs.
  • a connector assembly provided by an embodiment of the present application includes a first connector and a second connector arranged in pairs, and the first connector includes a power pin group, a function expansion pin group, and a plurality of The first data output pin group, the function expansion pin group is located between the plurality of first data output pin groups and the power supply pin group in the length direction of the first connector;
  • the second connector includes a display control signal output pin group, a multiple Ethernet interface pin group, and a plurality of second data output pin groups.
  • the display control signal output pin group is in the length direction of the second connector
  • the upper part is located between the plurality of second data output pin groups and the multiple Ethernet interface pin group; a ground pin pair is provided between two adjacent first data output pin groups, A pair of ground pins is arranged between two adjacent second data output pin groups; each of the first data output pin groups includes M groups of data output pins; each of the second data output pins
  • the group includes N groups of data output pins, where M and N are positive and even numbers and M is greater than N.
  • the connector assembly of this embodiment implements a centralized and compact arrangement of the pin groups in the connector assembly to achieve reasonable distribution of interface resources and reduce costs.
  • the multiple Ethernet interface pin groups are continuously arranged on both sides of the second connector, and the multiple Ethernet interface pin groups and the display control signal output Ground pin pairs are arranged between the pin groups.
  • a ground pin pair is provided between the function expansion pin group and the plurality of first data output pin groups, and the function expansion pin group is connected to the power supply pin. There are idle pins between the groups.
  • the first connector includes eighty-four pins, and in the longitudinal direction of the first connector, they are: two ground pins and eighteen data output pins. , Two ground pins, eighteen data output pins, two ground pins, eighteen data output pins, two ground pins, sixteen function extension pins, two empty connection pins, Four power supply pins;
  • the second connector includes eighty-four pins and in the length direction of the second connector: two ground pins, sixteen Ethernet interface pins, two One ground pin, one test button input signal pin, one status light signal pin, two ground pins, ten display control signal output pins, two ground pins, twelve data output pins, two One ground pin, twelve data output pins, two ground pins, twelve data output pins, two ground pins, and six data output pins.
  • the function expansion pin group includes five light board memory control interface pins, one light board memory serial clock signal pin, and one light board memory serial interface chip select signal pin , A shift register data signal pin, a shift register clock signal pin, a light board memory storage data input pin or a smart module data transmission signal pin, a light board memory storage data output pin or one Smart module data receiving signal pin, a dual-card connection signal pin, a dual-card identification signal pin, and two power detection signal pins.
  • a display control card provided by an embodiment of the present application includes: a circuit board, a programmable logic device, a microcontroller, an Ethernet physical layer transceiver, and a first plug-in component; the first plug-in component Is the aforementioned plug-in assembly; the programmable logic device, the microcontroller, the Ethernet physical layer transceiver, and the first plug-in assembly are arranged on the circuit board; the microcontroller Connect the programmable logic device and the power pin group of the first connector, and the Ethernet physical layer transceiver is connected to the programmable logic device and the first connector assembly Between the multiple Ethernet interface pin groups of the two connectors, the programmable logic device is connected to the power pin group and the function expansion of the first connector of the first connector assembly Pin group, the plurality of first data output pin groups, the plurality of second data output pin groups of the second connector of the first connector assembly, and the display control signal output lead Foot set.
  • the above technical solution has the following advantages and effects: by arranging the aforementioned plug-in components on the display control card, the input and output interfaces of the display control card tend to be standardized and the convenience of connection is improved.
  • the display control card further includes an adapter board, and a second connector assembly having the same pin definition as the connector assembly is provided on the adapter board.
  • the board is connected to the first plug-in component through the second plug-in component;
  • the adapter board is also provided with a network transformer and an Ethernet interface connected to the network transformer, and the Ethernet interface passes through the network transformer ,
  • the second plug-in component is connected to the multiple Ethernet interface pin group of the first plug-in component.
  • a display system provided by an embodiment of the present application includes: the aforementioned display control card and an LED light board; the adapter board of the display control card is provided with a data output interface, and the data output The interface is connected to the second connector assembly, and the data output interface is connected to the plurality of first data output pin groups of the first connector assembly and the second connector through the second connector assembly The plurality of second data output pin groups and the display control signal output pin group; the LED light board is provided with a light board input interface, and the LED light board is connected to the station through the light board input interface The data output interface.
  • the function expansion pin group includes lamp panel memory serial clock signal pins, lamp panel memory serial interface chip select signal pins, lamp panel memory storage data input pins, lamp panel
  • the memory stores data output pins and at least one lamp panel memory control interface pin, the lamp panel memory serial clock signal pin, the lamp panel memory serial interface chip select signal pin, and the lamp panel memory stores data
  • the input pin, the data output pin of the light board memory and the at least one light board memory control interface pin are respectively connected to the programmable logic device;
  • the adapter board is provided with a first signal driving circuit and a second A multiple selection circuit, the first signal driving circuit is connected between the second connector assembly and the data output interface, and is connected to the first connector assembly through the second connector assembly
  • the first multiple selection circuit is connected between the first signal driving circuit and the second plug-in assembly , And connected to the light panel memory serial interface chip select signal pin of the first connector assembly through the second connector assembly, the light panel memory storage data output
  • the function expansion pin group includes lamp panel memory serial clock signal pins, lamp panel memory serial interface chip select signal pins, lamp panel memory storage data input pins, lamp panel
  • the memory stores data output pins, shift register data signal pins, shift register clock signal pins, and at least one lamp panel memory control interface pin, the lamp panel memory serial clock signal pin, the lamp panel memory Serial interface chip selection signal pin, the light board memory storage data input pin, the light board memory storage data output pin, the shift register data signal pin, the shift register clock signal pin And the at least one light board memory control interface pin is respectively connected to the programmable logic device;
  • the adapter board is provided with a third signal drive circuit and a second multiplexer circuit, and the third signal drive circuit is connected
  • the fifth signal drive circuit is connected to the The second light board input interface, the third non-volatile memory, the second shift register, the second shift register is connected to the second light board input interface, the second light board input The interface is connected to the light board output interface of the LED light board.
  • the fourth signal driving circuit includes a first level power supply driver, a resistance voltage divider circuit, and a second level power supply driver, and the resistance voltage divider circuit is located at the first level power supply driver.
  • the shift register is connected to the first level power supply driver and the second level power supply driver, and the first level power supply drive circuit is connected to the light panel
  • the input interface, the shift register, the light board output interface, and the second level power supply driver are connected to the shift register and the second nonvolatile memory.
  • the function expansion pin group includes a smart module data sending signal pin, a smart module data receiving signal pin, and at least one light board memory control interface pin; the smart module The data sending signal pin, the smart module data receiving signal pin and the at least one lamp board memory control interface pin are respectively connected to the programmable logic device; a sixth signal driving circuit is provided on the adapter board And a third multiplexer circuit, the third multiplexer circuit is connected between the sixth signal drive circuit and the second connector assembly, and is connected to the first connector through the second connector assembly The at least one light board memory control interface pin and the smart module data sending signal pin and the smart module data receiving signal pin of the plug-in assembly; the LED light board includes a seventh signal driving circuit, A third non-volatile memory and a second microcontroller, the seventh signal driving circuit is connected between the second microcontroller and the light board input interface, and the third non-volatile memory is connected In the second microcontroller, the light board input interface is connected to the data output interface.
  • the function expansion pin group includes a plurality of power detection signal pins, and the plurality of power detection signal pins are respectively connected to the programmable logic device;
  • the display system further includes a plurality of A power supply, and the multiple power sources are connected to the multiple power detection signal pins of the first plug-in component one by one through the adapter board.
  • the display control card further includes a second circuit board, and the second circuit board is provided with a second programmable logic device, a third microcontroller, and a second Ethernet physical layer transceiver And a third plug-in component, the third plug-in component is the aforementioned plug-in component; the third microcontroller connects the second programmable logic device and the third plug-in component
  • the power pin group of the first connector, the second Ethernet physical layer transceiver is connected to the second programmable logic device and the second connector of the third connector assembly
  • the programmable logic device is connected to the power pin group of the first connector of the third connector assembly, the function expansion pin group, and the A plurality of first data output pin groups, the plurality of second data output pin groups of the second connector and the display control signal output pin group;
  • the adapter board is also provided with
  • the third connector assembly has a fourth connector assembly with the same pin definition; the adapter board is connected to the third connector assembly through the fourth connector assembly; the adapter board is also
  • the second connector of the first connector assembly and the second connector of the third connector assembly respectively include test key input signal pins; the adapter board further A test button is provided, and the test button is connected to the test button input signal pin of the first plug component through the second plug component; the test button is connected to the test button input signal pin of the first plug component through the fourth plug component.
  • the test button input signal pin of the third connector assembly is provided, and the test button is connected to the test button input signal pin of the first plug component through the second plug component; the test button is connected to the test button input signal pin of the first plug component through the fourth plug component.
  • the above-mentioned one or more technical solutions have one or more advantages or beneficial effects as follows: by centralizing and compactly arranging various pin groups in the plug-in assembly, the reasonable distribution of interface resources is realized and the cost is reduced.
  • the configuration of the aforementioned plug-in components on the display control card facilitates the standardization of the input and output interfaces of the display control card and improves the convenience of connection.
  • the backup of the correction coefficient and parameters of the LED light board is realized, the intelligent monitoring function expansion of the LED light board module, Dual power supply monitoring, dual receiving card data transmission to ensure the display effect of the LED light board, etc.
  • 1 and 2 are schematic diagrams of the pin distribution of two connectors arranged in pairs in the connector assembly in the first embodiment of the application.
  • Fig. 3a is a schematic structural diagram of a display control card in the second embodiment of the application.
  • Fig. 3b is a schematic structural diagram of another display control card in the second embodiment of the application.
  • FIG. 4 is a schematic diagram of the structure of the display system in the third embodiment of the application.
  • FIG. 5 is a schematic diagram of the structure of the display system in the fourth embodiment of the application.
  • FIG. 6 is a schematic structural diagram of an example of the display system in the fourth embodiment of this application.
  • FIG. 7 is a schematic diagram of the structure of the display system in the fifth embodiment of this application.
  • Fig. 8 is a further structural diagram of the LED light board in Fig. 7.
  • FIG. 9 is a schematic structural diagram of an example of the display system in the fifth embodiment of this application.
  • Fig. 10a is a schematic structural diagram of a display system in a sixth embodiment of this application.
  • FIG. 10b is a schematic diagram of another structure of the display system in the sixth embodiment of this application.
  • FIG. 11 is a schematic structural diagram of an example of the display system in the sixth embodiment of this application.
  • FIG. 12 is a schematic structural diagram of a display system in a seventh embodiment of this application.
  • FIG. 13 is a schematic diagram of the structure of the display system in the eighth embodiment of this application.
  • FIG. 14 is a schematic structural diagram of an example of the display system in the eighth embodiment of this application.
  • a connector assembly provided in the first embodiment of the present application includes a connector JH1 and a connector JH2 arranged in pairs.
  • the connector JH1 includes, for example, a power pin group, a plurality of first data output pin groups, and a function expansion pin group.
  • the connector JH2 includes, for example, a display control signal output pin group, a plurality of second data output pin groups, a multi-channel Ethernet interface pin group, and preferably also a test key input signal pin and a status light signal pin.
  • the plurality of first data output pin groups and the plurality of second data output pin groups are, for example, used to transmit multiple RGB data signals to drive a display unit, such as an LED light board, for image display.
  • the number of the plurality of first data output pin groups is, for example, 3, of course, it can also be other positive integers; the number of the plurality of second data output pin groups is, for example, 3, of course, it can also be other positive integers.
  • Each first data output pin group includes, for example, M groups of data output pins, and each second data output pin group includes N groups of data output pins, where M and N are positive and even numbers, and M is greater than N.
  • each first data output pin group includes, for example, six sets of data output pins
  • each second data output pin group includes four sets of data output pins
  • in the connector JH2 shown in FIG. There is a third data output pin group including two sets of data output pins.
  • Each group of data output pins includes, for example, a red data (R) output pin, a green data (G) output pin, and a blue data (B) output pin.
  • the connector JH1 and the connector JH2 can support a maximum of 32 RGB data group outputs in total.
  • the function expansion pin group is located between the multiple first data output pin groups and the power pin group in the length direction of the connector JH1 (the vertical direction in Figure 1), and the multiple first Separate the data output pin group and the power pin group to increase the distance between the two, which not only makes the pin layout more compact, but also reduces the interference of the power supply to the RGB data group and improves the stability of data transmission .
  • the display control signal output pin group is located between the multiple second data output pin groups and the multiple Ethernet interface pin groups in the length direction of the connector JH2 (the vertical direction in FIG. 2).
  • ground pin pairs such as two ground pins
  • the ground pin can improve the signal transmission reliability and stability of the RGB data group.
  • ground pin pairs such as two ground pins, are provided between the function expansion pin group and the multiple first data output pin groups of the connector JH1, which can further improve the signal output reliability and stability of the RGB data group Sex.
  • a grounding pin pair is also provided between the test button input signal pin and the status light signal pin and the display control signal output pin group.
  • the test button input signal pin and the status light signal pin are located between the multi-channel Ethernet interface pin group and the display control signal output pin group.
  • a grounding pin pair is also provided between the test button input signal pin and the status light signal pin and the multi-channel Ethernet interface pin group.
  • the number of pins of the connectors JH1 and JH2 is not more than 100 respectively.
  • the connectors JH1 and JH2 in the embodiment of the present application are, for example, 84-pin connector female sockets or male sockets, respectively. See Table 1 and Table 2 for the function definition.
  • the connectors JH1 and JH2 provided in this application omit a number of unused pins, and use a better pin arrangement to realize the data transmission of the display control card and various function expansion requirements.
  • the 84 pins of the connector JH1 in the length direction are: 2 ground pins (pins 1, 2), 18 data output pins (pin 3 -20), 2 ground pins (pins 21, 22), 18 data output pins (pins 23-40), 2 ground pins (pins 41, 42), 18 data output pins (Pins 43-60), 2 ground pins (pins 61, 62), 16 function expansion pins (pins 63-78), 2 idle pins (pins 79, 80), 4 Power supply pins (pins 81-84).
  • the voltage of each power supply pin is, for example, a 5V DC voltage
  • the maximum current is, for example, 0.5A.
  • the four power pins can provide a maximum current of 2A.
  • the number of pins of the power pin group can also be set according to actual needs, and it is not limited here.
  • the empty connection pins between the function expansion pin group and the power supply pin group can be replaced with power pins, function expansion pins, or ground pins, or even the empty connection pins can be eliminated. Pin.
  • the pins of the function expansion pin group are function expansion interfaces, which are mainly used for the expansion of lamp board memory (such as FLASH memory), lamp board intelligent module, dual receiving card backup, dual power detection and other functions.
  • the function extension pin group can include, for example, light board memory control interface pins, light board memory serial clock signal pins, light board memory serial interface chip select signal pins, light board memory storage data input pins, and smart Module data sending signal pin, light board memory storage data output pin, smart module group data receiving signal pin, shift register data signal pin, shift register clock signal pin, power detection signal pin, dual
  • the card is connected to part or all of the signal pins and the dual-card identification signal pins.
  • the function expansion pin group in the connector JH1 in the embodiment of the present application includes 16 pins. Refer to Table 3 for specific pin definitions.
  • the function extension pin group includes, for example, 5 light board memory control interface pins (HUB_CODE0, HUB_CODE1, HUB_CODE2, HUB_CODE3, and HUB_CODE4), 1 light board memory serial clock signal pin (SPI_CLK), and 1 light board Memory serial interface chip select signal pin (SPI_CS), 1 light board memory storage data input pin (SPI_MOSI), 1 light board memory storage data output pin (SPI_MISO), 1 shift register data signal pin (H164_CSD), 1 shift register clock signal pin (H164_CLK), 1 dual card connection signal pin (MS_DATA), 1 dual card identification signal pin (MS_ID), 2 power detection signal pins ( POWER_STA1, POWER_STA2) and a free pin.
  • 5 light board memory control interface pins (HUB_CODE0, HUB_CODE1, HUB_CODE2, H
  • the vacant pins here can also be defined as other function extensions, and the embodiments of the present application are not limited thereto.
  • the light board memory storage data input pin SPI_MOSI
  • the smart module data transmission signal pin UART_TX
  • the light board memory storage data output pin SPI_MISO
  • the connector JH1 may not be provided with a function extension pin group, or may be defined by the user as other function pins such as data output pins, or even idle pins. This embodiment is not limited to this.
  • the function extension pin group on the connector JH1 can also be defined by the user as pins with other functions, such as power pins, or ground pins, or data output pins. Pins, etc., even empty or unconnected pins. This embodiment is not limited to this.
  • the 84 pins of the connector JH2 in the length direction are: 2 ground pins (pins 1, 2), 16 Ethernet interface pins (pins 3-18), 2 ground pins (pin 19, 20), 1 test button input signal pin (pin 21), 1 status light signal pin (pin 22), 2 ground pins , 10 display control signal output pins (pins 23-34), 2 ground pins (pins 35, 36), 12 data output pins (pins 37-48), 2 ground pins ( Pin 49, 50), 12 data output pins (pins 51-62), 2 ground pins (pins 63, 64), 12 data output pins (pins 65-76), 2 Ground pins (pins 77, 78) and 6 data output pins (pins 76-84).
  • the 16 Ethernet interface pins (pins 3-18) are symmetrically distributed on both sides of the connector JH2 in the horizontal direction, and 8 Ethernet interface pins are distributed on each side.
  • the eight Ethernet interface pins on the side are continuously arranged on the connector JH2, that is, no grounding pin is set between two adjacent Ethernet interface pins. Therefore, compared with the existing 120-pin connector, the 84-pin connector provided in this embodiment has a more compact pin layout, lower cost, and more convenient connection.
  • the foregoing first embodiment of the present application centrally arranges various pin groups in the connector assembly, and allocates the same functional signal pins together, which can make the pins of the connector more compact and convenient for wiring.
  • Reasonable distribution of interface resources reduces costs.
  • a free connection pin is provided between the function expansion pin group and the power supply pin group. In this way, it is possible to prevent problems such as short circuit and misconnection caused by pin misalignment when the connector JH1 is inserted and unplugged. This foolproof design can reduce product failure rate and improve product quality.
  • the multiple Ethernet interface pin groups are continuously arranged on both sides of the connector JH2, making the pin layout of the connector JH2 more compact, lower cost, and more convenient for connection.
  • a display control card 20 provided in the second embodiment of the present application includes: a circuit board 21, a programmable logic device 22, a microcontroller 23, Ethernet physical layer transceivers 24a and 24b, and interfaces Plug component 25.
  • the display control card 20 also includes some auxiliary devices such as a volatile memory 26 and a non-volatile memory 27.
  • the programmable logic device 22, the microcontroller 23, the Ethernet physical layer transceivers 24a and 24b, the plug-in assembly 25, and auxiliary devices such as the volatile memory 26 and the non-volatile memory 27 are provided on the circuit board 21.
  • the programmable logic device 22 is typically a field programmable gate array (FPGA) device, and the microcontroller 23 connects the programmable logic device 22 and the power pin group of the connector JH1 of the connector assembly 25, and it is typically MCU (for example, MCU based on ARM core, etc.), Ethernet physical layer transceivers 24a, 24b are connected to the programmable logic device 22, which are, for example, two Gigabit Ethernet PHY chips. Of course, only one Ethernet interface may also be provided on the circuit board 21.
  • the connector assembly 25 is, for example, a connector JH1 as shown in FIG. 1 and a connector JH2 as shown in FIG. 2 which are arranged in pairs, which may be a male connector.
  • the Ethernet physical layer transceivers 24a, 24b are connected to the multiple Ethernet interface pin group of the connector JH2 and the power pin group of the connector JH1, and the programmable logic device 22 is connected to the power pin group of the connector JH1 and multiple A data output pin group, a function expansion pin group, a plurality of second data output pin groups of the connector JH2, and a display control signal output pin group.
  • the volatile memory 26 is connected to the programmable logic device 22 and the power supply pin group of the connector JH1, which is, for example, a DDR memory; the nonvolatile memory 27 is connected to the power supply of the programmable logic device 22, the microcontroller 23 and the connector JH1
  • the pin group is shared by both, and it is, for example, a FLASH memory (flash memory).
  • the display control card 20 may further include an adapter plate 31.
  • a plug-in assembly 32 is provided on the adapter plate 31.
  • the connector assembly 32 is, for example, a connector assembly with the same pin definition as the connector assembly 25, for example, two female connector sockets with 84 pins that match the male socket of the connector. Of course, it is also a connector with other pin numbers, which is not limited here.
  • the adapter board 31 is also provided with a network transformer 33 and Ethernet interfaces 34a and 34b connected to the network transformer.
  • the Ethernet interfaces 34a and 34b are, for example, RJ45 interfaces.
  • the Ethernet interfaces 34a and 34b are connected to the multiple Ethernet interface pin groups of the plug assembly 25 through the network transformer 33 and the plug assembly 32.
  • the circuit board 21 and the adapter board 31 are plugged in through the matching plug-in assembly 25 and the plug-in assembly 32, so that the user can connect the core components on the display control card 20, such as the programmable logic device 22 and the microcontroller 23.
  • Ethernet physical layer transceivers 24a and 24b are arranged on the circuit board 21 to form a core card, which is conducive to the personalized customization of the adapter board 31 and the modular design of the core card to better meet market demand.
  • the core card formed by the circuit board 21 and the electrical components on it at this time can also be called a receiving card.
  • the display control card 20 is configured with the plug-in assembly as in the foregoing first embodiment, which can facilitate the standardization of the input and output interfaces of the display control card 20.
  • a display system 50 provided by the third embodiment of the present application, for example, includes: a display control card 51 and one or more LED light boards 55 connected to the display control card 51 (only one is shown in FIG. As an example).
  • the display control card 51 is loaded and illuminates the LED lamp board 55 to perform screen display.
  • the display control card 51 includes a receiving card 511 and an adapter board 513.
  • the receiving card 511 includes, for example, the circuit board 21 in the second embodiment and electrical components thereon.
  • the adapter board 513 may include, for example, the adapter board 31 in the second embodiment and the electrical components thereon.
  • the receiving card 511 is provided with a connector assembly 5111, and the adapter board 513 is provided with a connector assembly 5131 having the same pin definition as the connector assembly 5111.
  • the adapter board 513 is also provided with one or more data output interfaces 5132 (only one is shown in FIG. 4 as an example).
  • the data output interface 5132 is, for example, a connector, such as a 16-pin or 26-pin header or socket, which can be connected to the LED light board 55 through a flexible flat cable.
  • the data output interface 5132 is connected to the multiple first data output pin groups, multiple second data output pin groups, and display control signal output pin groups of the connector component 5111 of the receiving card 51 through the connector component 5131 to obtain the desired output
  • the display data (RGB) and the corresponding display control signal (Ctrl) are displayed to light up the LED light board 55 and perform screen display. It is worth mentioning here that a signal driving circuit (not shown in FIG.
  • the data output interface 5132 is connected to the plug-in assembly 5131 through a signal driving circuit.
  • the signal driving circuit is used for signal enhancement of RGB data and display control signal (Ctrl).
  • the signal driving circuit includes, for example, a signal driver chip, and its model may be 74HC245, for example.
  • the signal driving circuit may include only one signal driver chip, or may include multiple signal driving chips, which can be determined according to the actual requirements of the circuit, and the embodiment of the present application is not limited thereto.
  • the LED light board 55 further includes a light board input interface 551, for example.
  • the light board input interface 551 is plugged together with the data output interface 5132, for example, to obtain display data (RGB) and corresponding display control signals (Ctrl).
  • the LED light board 55 typically also includes an LED driving chip and a row decoding chip.
  • the LED driver chip obtains RGB display data and some signals of the display control signal (Ctrl) from the light board input interface, such as OE, LAT, etc.
  • the row decoder chip obtains another part of the display control signal (Ctrl) from the light board input interface 551, for example A ⁇ E, the column driver chip and the row decoder chip cooperate with each other to realize the picture display.
  • the LED driving chip and the row decoding chip can be common commercially available chips, which will not be repeated here.
  • a display system 40 provided by the fourth embodiment of the present application is improved on the basis of the display system 50 in the third embodiment, and its basic structure is roughly the same. The difference is that, except for the display data (RGB) and the display control signal (Ctrl)
  • the SPI interface pins are defined for the function expansion pin group of the plug-in components on the receiving card, and non-volatile memory (such as FLASH memory) is added to the LED light board.
  • a signal drive circuit and a multi-channel selection circuit are added to the light board to realize the backup of the LED light board correction coefficient and related configuration parameters, and the readback of the LED light board correction coefficient and related configuration parameters during replacement.
  • the display system 40 includes, for example, a display control card 41 and an LED light board 45 connected to the display control card 41.
  • the display control card 41 includes a receiving card 411 and a transfer board 413.
  • the receiving card 41 is provided with a plug-in assembly 4111 and a programmable logic device 4112.
  • the plug-in assembly 4111 is, for example, the plug-in assembly of the aforementioned second embodiment.
  • the adapter board 413 is provided with a plug assembly 4131 and a plurality of data output interfaces 4132 connected to the plug assembly 4131.
  • the plug-in component 4131 is, for example, a plug-in component with the same pin definition as the plug-in component 4111.
  • the function extension pin group of the connector JH1 (please refer to Figure 1 and Table 1) of the connector component 4111 on the receiving card 41 includes the lamp board memory serial clock signal pin (SPI_CLK), the lamp board memory serial Interface chip select signal pin (SPI_CS), light board memory storage data input pin (SPI_MOSI), light board memory storage data output pin (SPI_MISO), and at least one light board memory control interface pin ((HUB_CODE, including HUB_CODE0, HUB_CODE1).
  • the data output pin (SPI_MISO) and at least one lamp board memory control interface pin ((HUB_CODE) are respectively connected to the programmable logic device 4112 on the receiving card 411.
  • the lamp board memory serial clock signal pin (SPI_CLK), The lamp board memory serial interface chip select signal pin (SPI_CS), the lamp board memory storage data input pin (SPI_MOSI) and the lamp board memory storage data output pin (SPI_MISO) can be collectively referred to as SPI interface pins.
  • the adapter board 413 is also provided with a signal drive circuit 4133 and a multiplexer circuit 4134.
  • the signal driving circuit 4133 is connected between the connector assembly 4131 and the multiple data output interfaces 4132, and is connected to the lamp panel memory serial clock signal pin (SPI_CLK) of the connector assembly 4111 through the connector assembly 4131, and the lamp panel memory stores data Input pin (SPI_MOSI).
  • the multiplexer circuit 4134 is connected between the signal drive circuit 4133 and the connector assembly 4131, and is connected to at least one lamp board memory control interface pin (HUB_CODE) of the connector assembly 4111 of the receiving card 411 through the connector assembly 4131, and the lamp board Memory serial interface chip selection signal pin (SPI_CS), light board memory storage data output pin (SPI_MISO).
  • the multiple selection circuit 4134 is connected to the signal driving circuit 4133 to transmit the light board memory serial interface chip selection signal pin (SPI_CS) and the light board memory storage data output pin (SPI_MISO).
  • the signal driving circuit 4133 includes, for example, a signal driving chip with a model number of 74HC245, which is used for SPI interface signal enhancement.
  • the multiplexer circuit 4134 includes, for example, a multiplexer with a model number of 74HC4052, the number of which can of course be set according to actual needs, and other multiplexers with the same function can also be used to build the multiplexer circuit 4134.
  • the LED light board 45 includes a non-volatile memory 452 and a signal driving circuit 453.
  • the signal driving circuit 453 is connected between the non-volatile memory 452 and the light panel input interface 451, and the light panel input interface 451 is connected to the corresponding data output interface 4132.
  • the non-volatile memory 452 is, for example, a FLASH memory whose model is W25Q80.
  • the signal driving circuit 453 includes, for example, a signal driving chip with a model number of 74HC245, which is used for SPI interface signal enhancement.
  • the non-volatile memory 452 is connected to the light board memory serial clock signal pin (SPI_CLK) and the light board of the plug-in assembly 4111 of the receiving card 411 through the signal driving circuit 453, the light board input interface 451, and the adapter board 413.
  • Memory serial interface chip selection signal pin SPI_CS
  • SPI_MOSI light board memory storage data input pin
  • SPI_MISO light board memory storage data output pin
  • the receiving card 411 selects and connects to the multiple selection circuit 4134 through the signal of at least one light board memory control interface pin (HUB_CODE) To the LED light board 45 of one data output interface 4132 of the multiple data output interfaces 4132, and then realize the data in the non-volatile memory 452 of the LED light board 45 through communication with the LED light board 45 through the SPI interface signal Read and write. Therefore, the correction coefficients of the LED light board 45 and other related parameters such as configuration parameters can be backed up to the non-volatile memory 452 to avoid data loss of the correction coefficients and related configuration parameters of the LED light board 45 when the receiving card is replaced. .
  • UOB_CODE light board memory control interface pin
  • the receiving card 41 can obtain the correction coefficient and related configuration parameters of the replaced LED light board from the non-volatile memory on the replaced LED light board, without the need to work through the screen configuration again. Configuring the replaced LED light board improves the efficiency of LED light board replacement and configuration, and improves product quality and user experience.
  • the receiving card 411 can also select and connect to multiple data in sequence according to at least one light board memory control interface pin (HUB_CODE) signal and the multiplex circuit 4134.
  • FIG. 6, is a specific example of the display system 40 provided in this embodiment.
  • the signal driver circuit of the LED light board 45 may also include, for example, a resistor divider circuit for converting, for example, a 5V SPI interface signal into a 3.3V SPI interface signal and providing a 3.3V SPI interface signal to the FLASH memory.
  • a display system 60 provided by the fifth embodiment of the present application.
  • the display system 60 includes a display control card 61, an LED light board 65 and an LED light board 67.
  • the display control card 61 can be, for example, the display control card in the third embodiment of the present application, and the display control card 61 includes a receiving card 611 and an adapter board 613.
  • the LED light board 65 adopts the LED light board in the third embodiment of the present application.
  • the LED light board 65 is connected to the display control card 61.
  • the LED light board 67 and the LED light board 65 are cascaded.
  • the LED light board 67 may be, for example, an LED light board having the same circuit configuration as the LED light board 65.
  • the receiving card 611 is provided with a plug-in component 6111 and a programmable logic device 6112 connected to the plug-in component 6111.
  • the function expansion pin group of the connector JH1 (see Figure 1 and Table 1 above) on the connector assembly 6111 includes: lamp board memory serial clock signal pin (SPI_CLK), lamp board memory serial interface chip selection signal pin (SPI_CS), light board memory storage data input pin (SPI_MOSI), light board memory storage data output pin (SPI_MISO), shift register data signal pin (H164_CSD), shift register clock signal pin (H164_CLK), and At least one lamp board memory control interface pin (HUB_CODE).
  • Lamp board memory serial clock signal pin (SPI_CLK), lamp board memory serial interface chip select signal pin (SPI_CS), lamp board memory storage data input pin (SPI_MOSI), and lamp board memory storage data output pin (SPI_MISO) ) are collectively referred to as SPI interface signals.
  • Lamp board memory serial clock signal pin (SPI_CLK), lamp board memory serial interface chip select signal pin (SPI_CS), lamp board memory storage data input pin (SPI_MOSI), lamp board memory storage data output pin (SPI_MISO) ), the shift register data signal pin (H164_CSD), the shift register clock signal pin (H164_CLK), and at least one lamp board memory control interface pin (HUB_CODE) are respectively connected to the programmable logic device 6112.
  • the adapter board 613 is provided with a plug-in assembly 6131, a plurality of data output interfaces 6132, a signal driving circuit 6133, and a multiple selection circuit 6134.
  • the connector assembly 6131 and the connector assembly 6111 have the same pin definitions.
  • the signal driving circuit 6133 is connected between the plug-in component 6131 and the multiple data output interfaces 6132, and is connected to the light board memory serial clock signal pin (SPI_CLK) and the light board memory string of the plug-in component 6111 through the plug-in component 6131.
  • the multiplexer circuit 6134 is connected between the plug-in component 6131 and the signal drive circuit 6133, and is connected to the light board memory storage data output pin (SPI_MISO) of the plug-in component 6111 through the plug-in component 6131, and the shift register data signal guide. Pin (H164_CSD) and at least one lamp board memory control interface pin (HUB_CODE).
  • the multiplexer circuit 6134 is connected to the signal driving circuit 6133 to transmit the light board memory storage data output signal (SPI_MISO) and the shift register data signal (H164_CSD).
  • the signal driving circuit 6133 includes, for example, a signal driving chip with a model number of 74HC245, which is used to enhance the SPI interface signal, H164_CSD and H164_CLK signals.
  • the multiplexer circuit 6134 includes, for example, a 16-to-1 analog switch with a model number of 74HC4067, which can enable one of the 16 channels to be selected according to the HUB_CODE signal.
  • the LED light board 65 includes a light board input interface 651, a non-volatile memory 652, a signal driving circuit 653, a shift register 654, and a light board output interface 655.
  • the signal driving circuit 653 is connected between the light panel input interface 651 and the non-volatile memory 652.
  • the shift register 654 is connected to the light board input interface 651 and the signal driving circuit 653.
  • the signal driving circuit 653 is also connected to the light board output interface 655.
  • the signal driving circuit 653 includes, for example, a first-level power supply driver, such as a 5V power supply driver 6531, a resistor divider circuit 6532, and a second-level power supply driver, such as a 3.3V power supply driver 6533.
  • the resistor divider circuit 6532 is connected between the 5V power supply driver 6531 and the 3.3V power supply driver 6533.
  • the 5V power supply driver 6531 is connected to the light panel input interface 655, the shift register 654, and the light panel output interface 655.
  • the 3.3V power supply driver 6533 is connected to the shift register 654 and the non-volatile memory 652.
  • the 5V power supply driver 6531 is, for example, the model 74HC245 Signal driver chip, used for SPI interface signal, H164_CSD and H164_CLK signal enhancement.
  • the resistance voltage divider circuit 6532 divides the 5V SPI interface signal output by the 5V power supply driver 6531 into resistance voltage and then outputs the 3.3V SPI interface signal to the 3.3V power supply driver 6533.
  • the 3.3V power supply driver 6533 is also a signal driver chip with the model number 74HC245, for example , Used to enhance the SPI interface signal.
  • the model of the shift register 654 is 74HC164, for example.
  • the non-volatile memory 652 is, for example, a FLASH memory, which can be used to back up data of the LED light board 65 such as correction coefficients, configuration parameters, and the like.
  • the LED light board 67 is connected to the light board output interface 655 of the LED light board 65 to form a cascade connection.
  • the LED light board 67 and the LED light board 65 transmit SPI interface signals, H164_CSD and H164_CLK signals to implement data reading and writing in the non-volatile memory of the LED light board 67.
  • the light board input interface 651 is connected to the data output interface 6132 of the adapter board 613 through a flat cable to transmit SPI interface signals.
  • the receiving card 611 selects the LED light board 65 for data reading and writing through at least one light board memory control interface pin (HUB_CODE) and the multiple selection circuit 6134, and then sends the signal to the signal drive circuit through H164_CSD, H164_CLK signals and shift register 654 653 sends an enable signal to make the signal driving circuit 653 transmit the SPI interface signal to realize the reading and writing of data in the non-volatile memory 652 of the LED light board 65.
  • UOB_CODE light board memory control interface pin
  • the light board input interface 651 is connected to the data output interface 6132 of the adapter board 613 for transmitting SPI interface signals, for example, through a flat cable.
  • the 5V power supply driver 6531 obtains the H164_CLK and SPI interface signals from the light board input interface 651, and after enhancement, outputs the 5V SPI interface signal to the resistor divider circuit and outputs the enhanced H164_CLK signal to the shift register 654.
  • the shift register 654 obtains H164_CSD from the light panel input interface 651 and combines the enhanced H164_CLK signal obtained from the 5V power supply driver 6531 to provide an enable signal to the 3.3V power supply driver 6533.
  • the resistor divider circuit 6532 may, for example, use a suitable resistor to convert the 5V SPI interface signal from the 5V power supply driver 6531 into a 3.3V SPI interface signal and provide the 3.3V power supply driver 6533 with the 3.3V SPI interface signal.
  • the 3.3V power supply driver 6533 receives the enable signal from the shift register 654 and the 3.3V SPI interface signal from the resistor divider circuit 6532 to read and write data to the nonvolatile memory 652.
  • the shift register 654 provides the shifted H164_CSD signal to the 5V power supply driver 6531.
  • the 5V power supply driver 6531 will also obtain the H164_CLK and SPI interface signals from the light panel input interface 651 and the shifted signals provided by the shift register 654
  • the latter H164_CSD signal is enhanced and sent to the light board output interface 655 for data reading and writing in the non-volatile memory of the cascaded LED light board 67.
  • the reading and writing process is the same as that of the LED light board 65. That is, the data read in the non-volatile memory of the cascaded LED light board is realized by the enable signal provided by the shift register 654 and H164_CSD and H164_CLK.
  • the receiving card 611 can receive at least one light board memory control interface pin (HUB_CODE) through the multiplexer circuit 6134. ) Signal sequentially selects multiple LED light boards 65 that need to read and write data, and then provide H164_CSD and H164_CLK signals to the shift register 654 of the selected LED light board 65 and realize the non-volatile memory 652 through the SPI interface signal Data read and write operations.
  • UOB_CODE light board memory control interface pin
  • the present embodiment may include a function expansion pin set, for example, five light board memory control interface pin (HUB_CODE0, HUB_CODE1, ..., HUB_CODE4 ), thus a total of 25 through the data output interface 32 is connected to the 6132 pairs 32
  • the LED light board 65 on the data output interface 6132 and the LED light board 67 cascaded to the LED light board 65 perform data reading and writing.
  • a display system 70 provided by the sixth embodiment of the present application.
  • the display system 70 in this embodiment is roughly the same as the display system 50 in the third embodiment.
  • the function expansion pin group of the plug-in component of the receiving card defines the data transmission signal pin (UART_TX) of the smart module.
  • the smart module data receiving signal pin (UART_RX) the LED light board is also provided with a microcontroller (MCU), and communicates with the MCU on the LED light board to realize the LED light board or module Monitoring of temperature, voltage, cable communication status, and lamp point detection.
  • MCU microcontroller
  • the display system 70 includes a display control card 71 and an LED light board 75.
  • the LED light board 75 is connected to the display control card 71.
  • the display control card 71 includes a receiving card 711 and a transfer board 713.
  • the receiving card 711 is provided with a plug-in component 7111 and a programmable logic device 7112 connected to the plug-in component 7111.
  • the function extension pin group of connector JH1 on the connector assembly 7111 includes: smart module data transmission signal pin (UART_TX), smart module data reception signal pin (UART_RX), and at least one lamp board memory control interface pin Feet (HUB_CODE).
  • Smart module data transmission signal (UART_TX) and smart module data reception signal (UART_RX) are collectively referred to as smart module data signal (UART).
  • the smart module data sending signal pin (UART_TX) and the smart module data receiving signal pin (UART_RX) are respectively connected to the programmable logic device 7112.
  • the adapter board 713 is provided with a plug-in assembly 7131, a plurality of data output interfaces 7132, a signal driving circuit 7133, and a multiple selection circuit 7134.
  • the connector assembly 7131 is connected to the connector assembly 7111 of the receiving card 711.
  • the multiplexer circuit 7133 is connected between the connector assembly 7121 and the signal driving circuit 7133.
  • the multiple data output interfaces 7132 are respectively connected to the signal driving circuit 7133.
  • the plug-in component 7131 and the plug-in component 7111 have the same pin definitions.
  • the signal driving circuit 7133 includes, for example, a signal driving chip with a model number of 74HC245, which is used to enhance the smart module data signal (UART).
  • the multiplexer circuit 7134 includes, for example, an analog multiplexer with a model number of 74HC4052 and an analog multiplexer with a model number of 74HC4051.
  • the data output interface 7132 is connected to the smart module data sending signal pin (UART_TX) and the smart module data receiving signal pin (UART_RX) of the plug assembly 7111 through the signal driving circuit 7133, the multiple rotation circuit 7134, and the plug assembly 7131.
  • the LED light board 75 includes a light board input interface 751, a signal driving circuit 752, a microcontroller 753, and a non-volatile memory 754.
  • the signal driving circuit 752 is connected between the light board input interface 751 and the microcontroller 753.
  • the non-volatile memory 754 is connected to the microcontroller 753.
  • the non-volatile memory 754 is, for example, a FLASH memory.
  • the monitoring data such as the temperature and voltage of the LED light board 75 itself can be stored in the non-volatile memory 754.
  • the correction coefficients and configuration parameters of the LED light board 75 can also be backed up on the non-volatile memory 754, which can avoid the loss of the correction coefficients and related parameters of the LED light board when the receiving card 711 is replaced.
  • the receiving card 711 can read the correction coefficient and related parameters of the replaced LED light board from the non-volatile memory on the replaced LED light board, without the need to work through the screen configuration again.
  • the screen configuration of the replaced LED light board improves the efficiency of LED light board replacement and configuration, and improves product quality and user experience.
  • the light board input interface 751 is connected to the data output interface 7132 of the adapter board 713 through a flat cable, for example, to transmit a smart module data signal (UART).
  • the signal driving circuit 752 includes, for example, a signal driving chip with a model number of 74HC245, which is used to enhance the smart module data signal (UART).
  • the microcontroller 753 is, for example, an MCU, and its model is, for example, STM32F030C8. The microcontroller 753 communicates with the receiving card 711 through the UART signal.
  • the receiving card 711 can receive at least one light board memory control interface pin (HUB_CODE) signal through the multiplexer circuit 7134 Select multiple LED light boards 75 that need to read and write data in turn, and then communicate with multiple LED light boards 75 through the smart module data sending signal pin (UART_TX) and smart module data receiving signal pin (UART_RX) example.
  • UART_TX smart module data sending signal pin
  • UART_RX smart module data receiving signal pin
  • the LED light board 75 is also provided with a voltage and temperature collection circuit 755.
  • the voltage and temperature acquisition circuit 155 is connected to the microcontroller 753 to input the collected signals such as voltage and temperature to the microcontroller 753.
  • the microcontroller 753 can monitor the temperature and voltage of the LED light board 75 without other peripherals.
  • the receiving card 711 communicates with the microcontroller 753 through the UART signal, so that the receiving card 711 can obtain the monitoring data of the voltage and temperature of the LED light board 75 from the microcontroller 753 to understand the working status of the LED light board 75.
  • the LED light board 75 further includes an LED driving circuit 756.
  • the LED driving circuit 756 is connected to the light board input interface 751, and is used to obtain RGB data and display control signal data from the receiving card 711 from the data output interface 7132 through the light board input interface 751 to light the LED light board.
  • the LED drive circuit and chip of the LED will not be repeated here.
  • the microcontroller 753 is connected to the LED driving circuit 756 and obtains RGB data from the LED driving circuit 756 to realize the detection of the LED dead pixels. In this way, the LED light board with the microcontroller 753 can reduce the size of the monitoring unit to have a monitoring function. Therefore, the user does not need to install a separate monitoring card, saving LED space.
  • the LED light board 75 may further include a light board output interface 757.
  • the light board output interface 757 is connected to the signal driving circuit 752 and the LED driving circuit 756.
  • the light board output interface 757 is used to cascade the next level of LED light boards to transmit display data (RGB), display control signals (Ctrl) and UART signals to the next level of LED light boards, so as to achieve the next level of LED light boards. Monitoring.
  • the present embodiment may include a function expansion pin set, for example, five light board memory control interface pins (HUB_CODE0, HUB_CODE1, ..., HUB_CODE4 ), thus the gate 25 can be successively a total of 32 one-connected LED lamp board 75 for data reading and writing.
  • a function expansion pin set for example, five light board memory control interface pins (HUB_CODE0, HUB_CODE1, ..., HUB_CODE4 ), thus the gate 25 can be successively a total of 32 one-connected LED lamp board 75 for data reading and writing.
  • FIG. 11 is a specific example of the display system 70 provided in this embodiment.
  • a display system 80 provided by the seventh embodiment of the present application is basically the same as the display system 50 in the foregoing third embodiment.
  • the difference is that the plug-in components of the receiving card define power detection signal pins (POWER_STA1, POWER_STA2), and the two power supplies are respectively Connect the power detection signal pin through the plug-in component on the transfer board.
  • the same adapter board (HUB board) is connected with two power supplies (called main power supply and backup power supply), and the two power supplies supply power to the display control card and the LED light board at the same time.
  • the receiving card can obtain the working status of the two power supplies through the power detection signal pins. When one of the power supplies fails, for example, a status light or other methods can be used to remind the user to take corresponding processing.
  • a status light or other methods can be used to remind the user to take corresponding processing.
  • the display system 80 includes a display control card 81 and an LED light board 85.
  • the display control card 81 includes a receiving card 811 and a transfer board 813.
  • the receiving card 811 may be the receiving card in the foregoing second embodiment.
  • the receiving card 811 has a plug-in component 8111 and a programmable logic device 8112.
  • the connector assembly 8111 adopts the connector assembly including connectors JH1 and JH2 in the first embodiment.
  • the function expansion pin group on the connector JH1 includes multiple power detection signal pins, such as two power detection signal pins POWER_STA1 and POWER_STA2, which are used to detect the status of the two power supplies.
  • the two power detection signal pins are connected to the programmable logic device 8112 respectively.
  • the adapter board 813 is provided with a connector assembly 8131 having the same pin definition as the connector assembly 8111.
  • the adapter board 813 is also provided with a data output interface 8132 connected to the LED light board 85.
  • a signal driving circuit 8133 is further provided between the plug-in component 8131 and the data output interface 8132 to enhance the display data (RGB) and the display control signal (Ctrl).
  • the signal driving circuit 8133 includes, for example, a signal driving chip with a model number of 74HC245.
  • the display system 80 may also include multiple power supplies.
  • two power supplies namely power supplies 87 and 89, are taken as an example for description.
  • the power supplies 87 and 89 are respectively connected to the adapter board 813 to supply power.
  • the power supplies 87 and 89 here can be AC power supplies or DC power supplies.
  • an AC-to-DC power supply circuit is provided on the adapter board to convert the AC power input by the AC power source into the required DC power; when the power source is a DC power source, the adapter board is equipped with a DC-to- DC power supply circuit to convert the DC power input by the DC power supply into the required DC power.
  • the power supplies 87 and 89 are respectively connected to the programmable logic device of the receiving card 811 through the plug-in component 8131 and the two power detection signal pins (POWER_STA1, POWER_STA2) on the plug-in component 8111.
  • the programmable logic device 8112 can be used to detect whether the working status of the power supplies 87 and 89 is normal, and even display the working status of the two power supplies 87 and 89, so that the user can intuitively learn the status of the two power supplies 87 and 89 Work status and deal with it according to the actual situation. For example, when the power supply 87 fails, the display system 80 is only powered by the power supply 89.
  • the programmable logic device 8112 of the receiving card 811 After the programmable logic device 8112 of the receiving card 811 obtains the fault status of the power supply 87 through the power detection signal pin, such as POWER_STA1, it can even use the status light
  • the form reminds the user that the power supply 87 is faulty, and the user can repair or replace the power supply 87 to ensure the normal operation of the display system 80. It is worth mentioning here that when the display system 50 includes multiple power supplies, only multiple power supply detection signal pins corresponding to the multiple power supplies need to be defined on the plug-in component 8111 to realize the operation of multiple power supplies. Status detection.
  • a display system 90 provided by the eighth embodiment of the present application is basically the same as that of the foregoing third embodiment.
  • the difference is that the same adapter board (HUB board) is connected to two receiving cards one by one through two plug-in components.
  • the receiving card simultaneously receives the image data and performs the same processing on the image data, but at the same time, only one receiving card outputs display data (RGB) and display control signals (Ctrl) to the LED light board.
  • the two receiving cards are connected through the pins of the two plug-in components for timing communication to mutually confirm whether their respective working states are normal.
  • the other receiving card When one of the receiving cards fails to work normally, the other receiving card immediately responds and outputs display data (RGB) and display control signal data (Ctrl) to the LED light board to ensure the normal display of the LED light board.
  • display data RGB
  • display control signal data Ctrl
  • the display system 90 includes a display control card 91 and an LED light board 95.
  • the display control card 91 includes a receiving card 911, a receiving card 915, and a transfer board 913.
  • the receiving card 911 and the receiving card 915 are connected to the adapter board 913 respectively.
  • the receiving card 911 adopts the receiving card in the second embodiment, which includes a plug-in component 9111 and a programmable logic device 9113 connected to the plug-in component 9111.
  • the receiving card 915 may be the same receiving card as the receiving card 911 and includes a plug-in component 9151 and a programmable logic device 9153 connecting the plug-in component 9151.
  • the receiving card 915 may also be a circuit board card that is different from the receiving card 911 but has a receiving card function or an image data processing function.
  • the adapter board 913 includes, for example, plug-in components 9131 and 9132, Ethernet interfaces 9134 and 9135, and network transformers 9136 and 9137.
  • the plug-in components 9131 and 9132 are, for example, plug-in components having the same pin definition as the plug-in component 9111 and the plug-in component 9151, respectively.
  • the plug assembly 9131 is connected to the plug assembly 9111, and the plug assembly 9132 is connected to the plug assembly 9151.
  • the network transformer 9136 is connected between the Ethernet interface 9134 and the connector 9131, and the network transformer 9137 is connected between the connector 9132 and the Ethernet interface 9135.
  • the Ethernet interfaces 9134 and 9135 are, for example, RJ45 network ports.
  • the receiving cards 911 and 915 are respectively connected to the same image data source through the Ethernet interface 9134 and the Ethernet interface 9135 to obtain the same image input data.
  • the receiving cards 911 and 915 are respectively connected to the LED light board 95 through the adapter board 913 for image display.
  • the function expansion pin groups of the plug-in component 9111 and the plug-in component 9151 respectively include a dual-card connection signal pin (MS_DATA) and a dual-card identification signal pin (MS_ID).
  • the dual-card connection signal pin (MS_DATA) and the dual-card identification signal pin (MS_ID) of the plug-in assembly 9111 are respectively connected to the programmable logic device 9113 of the receiving card 911.
  • the dual card connection signal pin (MS_DATA) and dual card identification signal pin (MS_ID) of the plug-in assembly 9151 are respectively connected to the programmable logic device 9153 of the receiving card 915.
  • the dual-card identification signal pin (MS_ID) of the plug-in component 9111 on the receiving card 911 (also called the main card) is connected to the external high-level VCC through the plug-in component 9131 on the adapter board 913, where VCC is, for example, 3.3 The level of V.
  • the dual-card identification signal pin (MS_ID) of the plug assembly 9151 on the receiving card 915 (also called the slave card) is grounded through the plug assembly 9132 on the adapter board 913.
  • the dual card connection signal pin (MS_DATA) of the plug assembly 9111 on the receiving card 911 is connected to the dual card connection signal pin of the plug assembly 9151 of the receiving card 915 through the plug assembly 9131 on the adapter board 913. Pin (MS_DATA) for communication between the master card and the slave card.
  • the receiving cards 911 and 915 simultaneously receive the image data source and perform the same data processing on the image input data.
  • the receiving cards 911 and 915 communicate through the dual-card connection signal pins (MS_DATA), for example, periodically sending status signals to confirm whether the mutual working status is normal.
  • the working status includes, for example, whether the image data input of the receiving card is normal and the image of the receiving card is normal. Is the data output normal?
  • only one of the receiving cards outputs display data (RGB) and display control signals (Ctrl) to the LED light board 95.
  • the receiving card 911 (main card) outputs display data (RGB) and display control signals (Ctrl) to the LED light board 95.
  • the receiving card 915 learns the failure status of the receiving card 911 (master card) through the dual-card connection signal pin (MS_DATA) or fails to receive the card within a predetermined time, for example, 10 milliseconds.
  • the receiving card 911 (master card) responds, the receiving card 915 (slave card) will immediately take over the work of the receiving card 911 (master card) and output display data (RGB) and display control signals (Ctrl) to the LED light board 95, To ensure that the LED light board 95 works normally.
  • this single adapter board connects two receiving cards at the same time and expands the function extension pins of the defined plug-in components, so that the two receiving cards can be identified It communicates with timing to obtain the working status of the two.
  • the other receiving card immediately takes over the failed receiving card to output data to ensure the normal operation of the LED light board, which improves product reliability.
  • a test button 9133 is also provided on the adapter board 913.
  • the test button 9133 connects the receiving card 911 and the receiving card 915.
  • the test button 9133 is connected to the receiving card 911 through the test key input signal pin (TEST_INPUT_KEY) of the plug-in component 9111, and the test button 9133 is connected to the receiving card 915 through the test key input signal pin of the plug-in component 9151 to realize the receiving card Simultaneous testing of 911 and receiving card 915.
  • the adapter board 913 is also provided with status light interfaces, such as two status light interfaces (not shown in FIG. 15).
  • the two status light interfaces are connected to the connector assembly 9111 and the connector via the connector assemblies 9131 and 9132, respectively.
  • the two status light interfaces are used to respectively connect two status lights to receive the working status of the card 911 and the card 915. In this way, the user can learn and monitor the working status of the receiving card 911 and the receiving card 915 more intuitively and directly.
  • the disclosed system, device, and method may be implemented in other ways.
  • the device embodiments described above are merely illustrative.
  • the division of the units is only a logical function division, and there may be other divisions in actual implementation, for example, multiple units or components can be combined or It can be integrated into another system, or some features can be ignored or not implemented.
  • the displayed or discussed mutual coupling or direct coupling or communication connection may be indirect coupling or communication connection through some interfaces, devices or units, and may be in electrical, mechanical or other forms.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the objectives of the solutions of the embodiments.
  • each unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units may be integrated into one unit.
  • the above-mentioned integrated unit may be implemented in the form of hardware, or may be implemented in the form of hardware plus software functional units.
  • the above-mentioned integrated unit implemented in the form of a software functional unit may be stored in a computer readable storage medium.
  • the above-mentioned software functional unit is stored in a storage medium and includes several instructions to make a computer device (which may be a personal computer, a server, or a network device, etc.) execute some steps of the method described in each embodiment of the present application.
  • the aforementioned storage media include: U disk, mobile hard disk, read-only memory (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), magnetic disks or optical disks, etc., which can store program codes Medium.

Abstract

A plug-in assembly (25, 4111, 5111, 6111, 7111, 8111), a display control card (20, 41, 51, 61, 71, 81, 91) and a display system (40, 50, 60, 70, 80, 90). The plug-in assembly (25, 4111, 5111, 6111, 7111, 8111) comprise: a first connector (JH1) and a second connector (JH2) that are disposed as a pair. The first connector (JH1) comprises a power supply pin group, a function expansion pin group and a plurality of first data output pin groups, and the function expansion pin group is located between the plurality of first data output pin groups and the power supply pin group in the length direction of the first connector (JH1). The second connector (JH2) comprises a display control signal output pin group, a multipath Ethernet interface pin group, and a plurality of second data output pin groups, and the display control signal output pin group is located between the plurality of second data output pin groups and the multipath Ethernet interface pin group in the length direction of the second connector (JH2); a ground pin pair is provided between two adjacent first data output pin groups, and a ground pin pair is provided between two adjacent second data output pin groups.

Description

接插组件、显示控制卡和显示系统Plug-in components, display control card and display system 技术领域Technical field
本申请涉及显示技术领域,尤其涉及一种接插组件、一种显示控制卡和一种显示系统。This application relates to the field of display technology, and in particular to a plug-in component, a display control card and a display system.
背景技术Background technique
随着LED显示行业的发展,显示屏厂家提供的显示箱体的结构逐渐固化。为了适配更多的显示屏厂家提供的显示箱体,接收卡产品需要做成尺寸更小的核心卡。核心卡通常需配合转接板(或称HUB板)一同使用,两者通过连接器连接在一起以驱动LED显示屏中的显示箱体。目前常见的连接器有金手指和板对板连接器。但是金手指连接对核心板的板厚和误差要求很高,在使用的过程中,一方面很容易受应力变形,导致芯片开裂等问题,另一方面核心板磨损或板厚造成的误差对信号传输有很大的影响。目前行业主流的板对板连接器是120pin接插件,但其上用作功能扩展的多个引脚未使用,存在引脚排布不够紧凑、接口引脚资源浪费且生产成本比较高的问题。With the development of the LED display industry, the structure of the display box provided by display manufacturers gradually solidified. In order to adapt to the display boxes provided by more display manufacturers, the receiving card products need to be made into smaller core cards. The core card usually needs to be used with an adapter board (or HUB board), and the two are connected together through a connector to drive the display box in the LED display. Common connectors currently include golden fingers and board-to-board connectors. However, the golden finger connection requires high requirements for the thickness and error of the core board. In the process of use, on the one hand, it is easy to be stressed and deformed, causing problems such as chip cracking. On the other hand, the error caused by the wear of the core board or the thickness of the core board can affect the signal Transmission has a big impact. At present, the mainstream board-to-board connector in the industry is a 120pin connector, but multiple pins used for function expansion on it are not used. There are problems that the pin layout is not compact enough, the interface pin resources are wasted, and the production cost is relatively high.
申请内容Application content
本申请的实施例提供了一种接插组件、一种显示控制卡以及一种显示系统,实现接口引脚紧凑排布,节约接口资源,降低生产成本。The embodiments of the present application provide a plug-in assembly, a display control card, and a display system, which implement compact arrangement of interface pins, save interface resources, and reduce production costs.
一方面,本申请实施例提供的一种接插组件,包括成对设置的第一接插件和第二接插件,所述第一接插件包括电源引脚组、功能扩展引脚组以及多个第一数据输出引脚群,所述功能扩展引脚组在所述第一接插件长度方向上位于所述多个第一数据输出引脚群和所述电源引脚组之间;所述第二接插件包括显示控制信号输出引脚组、多路以太网接口引脚组、以及多个第二数据输出引脚群,所述显示控制信号输出引脚组在所述第二接插件长度方向上位于所述多个第二数据输出引脚群和所述多路以太网接口引脚组之间;相邻两个所述第一数据输出引脚群之间设置有接地引脚对,相邻两个所述第二数据输出引脚群之间设置有接地引脚对;每一个所述第一数据输出引脚群包括M组数据输出引脚;每一个所述第二数据输出引脚群包括N组数据输出引脚,其中M和N分别为正偶数且M大于N。On the one hand, a connector assembly provided by an embodiment of the present application includes a first connector and a second connector arranged in pairs, and the first connector includes a power pin group, a function expansion pin group, and a plurality of The first data output pin group, the function expansion pin group is located between the plurality of first data output pin groups and the power supply pin group in the length direction of the first connector; The second connector includes a display control signal output pin group, a multiple Ethernet interface pin group, and a plurality of second data output pin groups. The display control signal output pin group is in the length direction of the second connector The upper part is located between the plurality of second data output pin groups and the multiple Ethernet interface pin group; a ground pin pair is provided between two adjacent first data output pin groups, A pair of ground pins is arranged between two adjacent second data output pin groups; each of the first data output pin groups includes M groups of data output pins; each of the second data output pins The group includes N groups of data output pins, where M and N are positive and even numbers and M is greater than N.
本实施例的接插组件通过对接插组件中各引脚组进行集中、紧凑排布,实现接口资源的合理分布,降低成本。The connector assembly of this embodiment implements a centralized and compact arrangement of the pin groups in the connector assembly to achieve reasonable distribution of interface resources and reduce costs.
在本申请的一个实施例中,所述多路以太网接口引脚组在所述第二接插件的两侧 连续排布,所述多路以太网接口引脚组与所述显示控制信号输出引脚组之间设置有接地引脚对。In an embodiment of the present application, the multiple Ethernet interface pin groups are continuously arranged on both sides of the second connector, and the multiple Ethernet interface pin groups and the display control signal output Ground pin pairs are arranged between the pin groups.
在本申请的一个实施例中,所述功能扩展引脚组与所述多个第一数据输出引脚群之间设置有接地引脚对,所述功能扩展引脚组与所述电源引脚组之间设置有空接引脚。In an embodiment of the present application, a ground pin pair is provided between the function expansion pin group and the plurality of first data output pin groups, and the function expansion pin group is connected to the power supply pin. There are idle pins between the groups.
在本申请的一个实施例中,所述第一接插件包括八十四个引脚且在所述第一接插件的长度方向上依次为:两个接地引脚、十八个数据输出引脚、两个接地引脚、十八个数据输出引脚、两个接地引脚、十八个数据输出引脚、两个接地引脚、十六个功能扩展引脚、两个空接引脚、四个电源引脚;所述第二接插件包括八十四个引脚且在所述第二接插件的长度方向上依次为:两个接地引脚、十六个以太网接口引脚、两个接地引脚、一个测试按键输入信号引脚、一个状态灯信号引脚、两个接地引脚、十个显示控制信号输出引脚、两个接地引脚、十二个数据输出引脚、两个接地引脚、十二个数据输出引脚、两个接地引脚、十二个数据输出引脚、两个接地引脚、以及六个数据输出引脚。In an embodiment of the present application, the first connector includes eighty-four pins, and in the longitudinal direction of the first connector, they are: two ground pins and eighteen data output pins. , Two ground pins, eighteen data output pins, two ground pins, eighteen data output pins, two ground pins, sixteen function extension pins, two empty connection pins, Four power supply pins; the second connector includes eighty-four pins and in the length direction of the second connector: two ground pins, sixteen Ethernet interface pins, two One ground pin, one test button input signal pin, one status light signal pin, two ground pins, ten display control signal output pins, two ground pins, twelve data output pins, two One ground pin, twelve data output pins, two ground pins, twelve data output pins, two ground pins, and six data output pins.
在本申请的一个实施例中,所述功能扩展引脚组包括五个灯板存储器控制接口引脚、一个灯板存储器串行时钟信号引脚、一个灯板存储器串行接口片选信号引脚、一个移位寄存器数据信号引脚、一个移位寄存器时钟信号引脚、一个灯板存储器存储数据输入引脚或一个智能模组数据发送信号引脚、一个灯板存储器存储数据输出引脚或一个智能模组数据接收信号引脚、一个双卡连接信号引脚、一个双卡身份标识信号引脚、以及两个电源检测信号引脚。In an embodiment of the present application, the function expansion pin group includes five light board memory control interface pins, one light board memory serial clock signal pin, and one light board memory serial interface chip select signal pin , A shift register data signal pin, a shift register clock signal pin, a light board memory storage data input pin or a smart module data transmission signal pin, a light board memory storage data output pin or one Smart module data receiving signal pin, a dual-card connection signal pin, a dual-card identification signal pin, and two power detection signal pins.
另一方面,本申请实施例提供的一种显示控制卡,包括:电路板、可编程逻辑器件、微控制器、以太网物理层收发器以及第一接插组件;所述第一接插组件为如前述的接插组件;所述可编程逻辑器件、所述微控制器、所述以太网物理层收发器以及所述第一接插组件设置在所述电路板上;所述微控制器连接所述可编程逻辑器件和所述第一接插件的所述电源引脚组,所述以太网物理层收发器连接在所述可编程逻辑器件和所述第一接插组件的所述第二接插件的所述多路以太网接口引脚组之间,所述可编程逻辑器件连接所述第一接插组件的所述第一接插件的所述电源引脚组、所述功能扩展引脚组、所述多个第一数据输出引脚群和所述第一接插组件的所述第二接插件的所述多个第二数据输出引脚群和所述显示控制信号输出引脚组。On the other hand, a display control card provided by an embodiment of the present application includes: a circuit board, a programmable logic device, a microcontroller, an Ethernet physical layer transceiver, and a first plug-in component; the first plug-in component Is the aforementioned plug-in assembly; the programmable logic device, the microcontroller, the Ethernet physical layer transceiver, and the first plug-in assembly are arranged on the circuit board; the microcontroller Connect the programmable logic device and the power pin group of the first connector, and the Ethernet physical layer transceiver is connected to the programmable logic device and the first connector assembly Between the multiple Ethernet interface pin groups of the two connectors, the programmable logic device is connected to the power pin group and the function expansion of the first connector of the first connector assembly Pin group, the plurality of first data output pin groups, the plurality of second data output pin groups of the second connector of the first connector assembly, and the display control signal output lead Foot set.
上述技术方案具有如下优点和效果:通过在显示控制卡上配置前述接插组件,有利于其显示控制卡的输入输出接口趋于标准化和提升连接的便捷性。The above technical solution has the following advantages and effects: by arranging the aforementioned plug-in components on the display control card, the input and output interfaces of the display control card tend to be standardized and the convenience of connection is improved.
在本申请的一个实施例中,所述显示控制卡还包括转接板,所述转接板上设置有与所述接插组件具有相同引脚定义的第二接插组件,所述转接板通过所述第二接插组 件连接所述第一接插组件;所述转接板上还设置有网络变压器和连接所述网络变压器的以太网接口,所述以太网接口通过所述网络变压器、所述第二接插组件连接所述第一接插组件的所述多路以太网接口引脚组。In an embodiment of the present application, the display control card further includes an adapter board, and a second connector assembly having the same pin definition as the connector assembly is provided on the adapter board. The board is connected to the first plug-in component through the second plug-in component; the adapter board is also provided with a network transformer and an Ethernet interface connected to the network transformer, and the Ethernet interface passes through the network transformer , The second plug-in component is connected to the multiple Ethernet interface pin group of the first plug-in component.
又一方面,本申请实施例提供的一种显示系统,包括:如前述的显示控制卡和LED灯板;所述显示控制卡的所述转接板上设置有数据输出接口,所述数据输出接口连接所述第二接插组件,所述数据输出接口通过所述第二接插组件连接所述第一接插组件的所述多个第一数据输出引脚群、所述第二接插件的所述多个第二数据输出引脚群以及所述显示控制信号输出引脚组;所述LED灯板上设置有灯板输入接口,所述LED灯板通过所述灯板输入接口连接所述数据输出接口。In another aspect, a display system provided by an embodiment of the present application includes: the aforementioned display control card and an LED light board; the adapter board of the display control card is provided with a data output interface, and the data output The interface is connected to the second connector assembly, and the data output interface is connected to the plurality of first data output pin groups of the first connector assembly and the second connector through the second connector assembly The plurality of second data output pin groups and the display control signal output pin group; the LED light board is provided with a light board input interface, and the LED light board is connected to the station through the light board input interface The data output interface.
在本申请的一个实施例中,所述功能扩展引脚组包括灯板存储器串行时钟信号引脚、灯板存储器串行接口片选信号引脚、灯板存储器存储数据输入引脚、灯板存储器存储数据输出引脚以及至少一个灯板存储器控制接口引脚,所述灯板存储器串行时钟信号引脚、所述灯板存储器串行接口片选信号引脚、所述灯板存储器存储数据输入引脚、所述灯板存储器存储数据输出引脚和所述至少一个灯板存储器控制接口引脚分别连接所述可编程逻辑器件;所述转接板上设置有第一信号驱动电路和第一多路选择电路,所述第一信号驱动电路连接在所述第二接插组件和所述数据输出接口之间、且通过所述第二接插组件连接至所述第一接插组件的所述灯板存储器串行时钟信号引脚、所述灯板存储器存储数据输入引脚;所述第一多路选择电路连接在所述第一信号驱动电路和所述第二接插组件之间、且通过所述第二接插组件连接至所述第一接插组件的所述灯板存储器串行接口片选信号引脚、所述灯板存储器存储数据输出引脚、以及所述至少一个灯板存储器控制接口引脚;所述LED灯板包括非易失性存储器和第二信号驱动电路,所述第二信号驱动电路连接在所述非易失性存储器和所述灯板输入接口之间,所述灯板输入接口连接所述数据输出接口。In an embodiment of the present application, the function expansion pin group includes lamp panel memory serial clock signal pins, lamp panel memory serial interface chip select signal pins, lamp panel memory storage data input pins, lamp panel The memory stores data output pins and at least one lamp panel memory control interface pin, the lamp panel memory serial clock signal pin, the lamp panel memory serial interface chip select signal pin, and the lamp panel memory stores data The input pin, the data output pin of the light board memory and the at least one light board memory control interface pin are respectively connected to the programmable logic device; the adapter board is provided with a first signal driving circuit and a second A multiple selection circuit, the first signal driving circuit is connected between the second connector assembly and the data output interface, and is connected to the first connector assembly through the second connector assembly The serial clock signal pin of the light board memory, and the data input pin of the light board memory; the first multiple selection circuit is connected between the first signal driving circuit and the second plug-in assembly , And connected to the light panel memory serial interface chip select signal pin of the first connector assembly through the second connector assembly, the light panel memory storage data output pin, and the at least one Light board memory control interface pin; the LED light board includes a non-volatile memory and a second signal drive circuit, the second signal drive circuit is connected between the non-volatile memory and the light board input interface In between, the light board input interface is connected to the data output interface.
在本申请的一个实施例中,所述功能扩展引脚组包括灯板存储器串行时钟信号引脚、灯板存储器串行接口片选信号引脚、灯板存储器存储数据输入引脚、灯板存储器存储数据输出引脚、移位寄存器数据信号引脚、移位寄存器时钟信号引脚以及至少一个灯板存储器控制接口引脚,所述灯板存储器串行时钟信号引脚、所述灯板存储器串行接口片选信号引脚、所述灯板存储器存储数据输入引脚、所述灯板存储器存储数据输出引脚、所述移位寄存器数据信号引脚、所述移位寄存器时钟信号引脚以及所述至少一个灯板存储器控制接口引脚分别连接所述可编程逻辑器件;所述转接板上设置有第三信号驱动电路和第二多路选择电路,所述第三信号驱动电路连接在所述第二接插组件和所述数据输出接口之间、且通过所述第二接插组件连接至所述第一接插组件的 所述灯板存储器串行时钟信号引脚、所述灯板存储器串行接口片选信号引脚、所述灯板存储器存储数据输入引脚、所述移位寄存器时钟信号引脚;所述第二多路选择电路连接在所述第三信号驱动电路和所述第二接插组件之间、且通过所述第二接插组件连接至所述第一接插组件的所述灯板存储器存储数据输出引脚、所述移位寄存器数据信号引脚以及所述至少一个灯板存储器控制接口引脚;所述LED灯板包括第四信号驱动电路、移位寄存器、第二非易失性存储器和灯板输出接口,所述第四信号驱动电路连接所述灯板输入接口、所述第二非易失性存储器、所述移位寄存器以及所述灯板输出接口,所述移位寄存器连接连接所述灯板输入接口;所述显示系统还包括第二LED灯板,所述第二LED灯板包括第二灯板输入接口、第五信号驱动电路、第二移位寄存器、第三非易失性存储器,所述第五信号驱动电路连接所述第二灯板输入接口、所述第三非易失性存储器、所述第二移位寄存器,所述第二移位寄存器连接所述第二灯板输入接口,所述第二灯板输入接口连接所述LED灯板的所述灯板输出接口。In an embodiment of the present application, the function expansion pin group includes lamp panel memory serial clock signal pins, lamp panel memory serial interface chip select signal pins, lamp panel memory storage data input pins, lamp panel The memory stores data output pins, shift register data signal pins, shift register clock signal pins, and at least one lamp panel memory control interface pin, the lamp panel memory serial clock signal pin, the lamp panel memory Serial interface chip selection signal pin, the light board memory storage data input pin, the light board memory storage data output pin, the shift register data signal pin, the shift register clock signal pin And the at least one light board memory control interface pin is respectively connected to the programmable logic device; the adapter board is provided with a third signal drive circuit and a second multiplexer circuit, and the third signal drive circuit is connected The serial clock signal pin of the lamp panel memory, the serial clock signal pin of the lamp board memory of the second plug-in component and the data output interface and connected to the first plug-in component through the second plug-in component The chip select signal pin of the serial interface of the light board memory, the data input pin of the light board memory, and the clock signal pin of the shift register; the second multiplexer circuit is connected to the third signal drive circuit The light board memory storage data output pin and the shift register data signal pin between and the second connector assembly and connected to the first connector assembly through the second connector assembly And the at least one light board memory control interface pin; the LED light board includes a fourth signal driving circuit, a shift register, a second non-volatile memory and a light board output interface, and the fourth signal driving circuit is connected The light board input interface, the second nonvolatile memory, the shift register, and the light board output interface, the shift register is connected to the light board input interface; the display system further includes The second LED light board, the second LED light board includes a second light board input interface, a fifth signal drive circuit, a second shift register, and a third non-volatile memory. The fifth signal drive circuit is connected to the The second light board input interface, the third non-volatile memory, the second shift register, the second shift register is connected to the second light board input interface, the second light board input The interface is connected to the light board output interface of the LED light board.
在本申请的一个实施例中,所述第四信号驱动电路包括第一电平供电驱动器、电阻分压电路和第二电平供电驱动器,所述电阻分压电路位于所述第一电平供电驱动器和所述第二电平驱动器之间,所述移位寄存器连接所述第一电平供电驱动器和所述第二电平供电驱动器,所述第一电平供电驱动电路连接所述灯板输入接口、所述移位寄存器、所述灯板输出接口,所述第二电平供电驱动器连接所述移位寄存器和所述第二非易失性存储器。In an embodiment of the present application, the fourth signal driving circuit includes a first level power supply driver, a resistance voltage divider circuit, and a second level power supply driver, and the resistance voltage divider circuit is located at the first level power supply driver. Between the driver and the second level driver, the shift register is connected to the first level power supply driver and the second level power supply driver, and the first level power supply drive circuit is connected to the light panel The input interface, the shift register, the light board output interface, and the second level power supply driver are connected to the shift register and the second nonvolatile memory.
在本申请的一个实施例中,所述功能扩展引脚组包括智能模组数据发送信号引脚、智能模组数据接收信号引脚和至少一个灯板存储器控制接口引脚;所述智能模组数据发送信号引脚、所述智能模组数据接收信号引脚和所述至少一个灯板存储器控制接口引脚分别连接所述可编程逻辑器件;所述转接板上设置有第六信号驱动电路和第三多路选择电路,所述第三多路选择电路连接在所述第六信号驱动电路和所述第二接插组件之间、且通过所述第二接插组件连接所述第一接插组件的所述至少一个灯板存储器控制接口引脚和所述智能模组数据发送信号引脚和所述智能模组数据接收信号引脚;所述LED灯板包括第七信号驱动电路、第三非易失性存储器和第二微控制器,所述第七信号驱动电路连接在所述第二微控制器和所述灯板输入接口之间,所述第三非易失性存储器连接所述第二微控制器,所述灯板输入接口连接所述数据输出接口。In an embodiment of the present application, the function expansion pin group includes a smart module data sending signal pin, a smart module data receiving signal pin, and at least one light board memory control interface pin; the smart module The data sending signal pin, the smart module data receiving signal pin and the at least one lamp board memory control interface pin are respectively connected to the programmable logic device; a sixth signal driving circuit is provided on the adapter board And a third multiplexer circuit, the third multiplexer circuit is connected between the sixth signal drive circuit and the second connector assembly, and is connected to the first connector through the second connector assembly The at least one light board memory control interface pin and the smart module data sending signal pin and the smart module data receiving signal pin of the plug-in assembly; the LED light board includes a seventh signal driving circuit, A third non-volatile memory and a second microcontroller, the seventh signal driving circuit is connected between the second microcontroller and the light board input interface, and the third non-volatile memory is connected In the second microcontroller, the light board input interface is connected to the data output interface.
在本申请的一个实施例中,所述功能扩展引脚组包括多个电源检测信号引脚,所述多个电源检测信号引脚分别连接所述可编程逻辑器件;所述显示系统还包括多个电源,所述多个电源通过所述转接板一一对应连接所述第一接插组件的所述多个电源检测信号引脚。In an embodiment of the present application, the function expansion pin group includes a plurality of power detection signal pins, and the plurality of power detection signal pins are respectively connected to the programmable logic device; the display system further includes a plurality of A power supply, and the multiple power sources are connected to the multiple power detection signal pins of the first plug-in component one by one through the adapter board.
在本申请的一个实施例中,所述显示控制卡还包括第二电路板,所述第二电路板上设置有第二可编程逻辑器件、第三微控制器、第二以太网物理层收发器以及第三接插组件,所述第三接插组件为如前述的接插组件;所述第三微控制器连接所述第二可编程逻辑器件和所述第三接插组件的所述第一接插件的所述电源引脚组,所述第二以太网物理层收发器连接在所述第二可编程逻辑器件和所述第三接插组件的所述第二接插件的所述多路以太网接口引脚组之间,所述可编程逻辑器件连接所述第三接插组件的所述第一接插件的所述电源引脚组、所述功能扩展引脚组、所述多个第一数据输出引脚群和所述第二接插件的所述多个第二数据输出引脚群和所述显示控制信号输出引脚组;所述转接板上还设置有与所述第三接插组件具有相同引脚定义的第四接插组件;所述转接板通过所述第四接插组件连接所述第三接插组件;所述转接板上还设置有第二以太网接口和第二网络变压器,所述第二以太网接口通过所述第二网络变压器、所述第四接插组件连接所述第三接插组件的所述多路以太网接口引脚组;所述数据输出接口通过所述第四接插组件连接所述第三接插组件的所述第一接插件的所述多个第一数据输出引脚群、所述第二接插件的所述多个第二数据输出引脚群以及所述显示控制信号输出引脚组;所述第一接插组件和所述第三接插组件的所述功能扩展引脚组分别包括双卡连接信号引脚和双卡身份标识信号引脚;所述第一接插组件的所述双卡连接信号引脚和所述双卡身份标识信号引脚分别连接所述电路板上的所述可编程逻辑器件;所述第三接插组件的所述双卡连接信号引脚和所述双卡身份标识信号引脚分别连接所述第二电路板上的的所述可编程逻辑器件;所述第一接插组件的所述双卡身份标识信号引脚连接外部高电平,所述第一接插组件的所述双卡连接信号引脚通过所述转接板连接所述第二电路板上的所述第三接插组件的所述双卡连接信号引脚;所述第二电路板上的所述第三接插组件的所述双卡身份标识信号引脚接地。In an embodiment of the present application, the display control card further includes a second circuit board, and the second circuit board is provided with a second programmable logic device, a third microcontroller, and a second Ethernet physical layer transceiver And a third plug-in component, the third plug-in component is the aforementioned plug-in component; the third microcontroller connects the second programmable logic device and the third plug-in component The power pin group of the first connector, the second Ethernet physical layer transceiver is connected to the second programmable logic device and the second connector of the third connector assembly Between multiple Ethernet interface pin groups, the programmable logic device is connected to the power pin group of the first connector of the third connector assembly, the function expansion pin group, and the A plurality of first data output pin groups, the plurality of second data output pin groups of the second connector and the display control signal output pin group; the adapter board is also provided with The third connector assembly has a fourth connector assembly with the same pin definition; the adapter board is connected to the third connector assembly through the fourth connector assembly; the adapter board is also provided with a Two Ethernet interfaces and a second network transformer, the second Ethernet interface is connected to the multi-channel Ethernet interface pins of the third plug-in component through the second network transformer and the fourth plug-in component Group; the data output interface is connected to the plurality of first data output pin groups of the first connector of the third connector assembly through the fourth connector assembly, the second connector The plurality of second data output pin groups and the display control signal output pin group; the function expansion pin groups of the first plug-in assembly and the third plug-in assembly respectively include dual card connections Signal pins and dual-card identification signal pins; the dual-card connection signal pins and the dual-card identification signal pins of the first plug-in assembly are respectively connected to the programmable circuit board Logic device; the dual card connection signal pin and the dual card identity identification signal pin of the third plug-in assembly are respectively connected to the programmable logic device on the second circuit board; the first The dual-card identification signal pin of a plug-in component is connected to an external high level, and the dual-card connection signal pin of the first plug-in component is connected to the second circuit board through the adapter board The dual card connection signal pin of the third connector assembly; the dual card identification signal pin of the third connector assembly on the second circuit board is grounded.
在本申请的一个实施例中,所述第一接插组件的第二接插件和所述第三接插组件的第二接插件上分别包括测试按键输入信号引脚;所述转接板还设置有测试按键,所述测试按键通过所述第二接插组件连接所述第一接插组件的所述测试按键输入信号引脚;所述测试按键通过所述第四接插组件连接所述第三接插组件的所述测试按键输入信号引脚。In an embodiment of the present application, the second connector of the first connector assembly and the second connector of the third connector assembly respectively include test key input signal pins; the adapter board further A test button is provided, and the test button is connected to the test button input signal pin of the first plug component through the second plug component; the test button is connected to the test button input signal pin of the first plug component through the fourth plug component. The test button input signal pin of the third connector assembly.
上述一个或多个技术方案具有如下一个或多个优点或有益效果:通过对接插组件中各种引脚组进行集中、紧凑排布,实现接口资源的合理分布,降低成本。此外,在显示控制卡上配置前述接插组件,有利于其显示控制卡的输入输出接口趋于标准化和提升连接的便捷性。再者,通过对功能扩展引脚组的引脚进行定义,并设计相应的显示控制卡和LED灯板,实现了LED灯板校正系数和参数的备份、LED灯板模组智能 监控功能扩展、双电源监控、双接收卡数据传输以保证LED灯板显示效果等。The above-mentioned one or more technical solutions have one or more advantages or beneficial effects as follows: by centralizing and compactly arranging various pin groups in the plug-in assembly, the reasonable distribution of interface resources is realized and the cost is reduced. In addition, the configuration of the aforementioned plug-in components on the display control card facilitates the standardization of the input and output interfaces of the display control card and improves the convenience of connection. Furthermore, by defining the pins of the function extension pin group, and designing the corresponding display control card and LED light board, the backup of the correction coefficient and parameters of the LED light board is realized, the intelligent monitoring function expansion of the LED light board module, Dual power supply monitoring, dual receiving card data transmission to ensure the display effect of the LED light board, etc.
附图说明Description of the drawings
为了更清楚地说明本申请实施例的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。In order to explain the technical solutions of the embodiments of the present application more clearly, the following will briefly introduce the drawings needed in the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative work, other drawings can be obtained based on these drawings.
图1和图2为本申请第一实施例中的接插组件中成对设置的两个接插件的引脚分布示意图。1 and 2 are schematic diagrams of the pin distribution of two connectors arranged in pairs in the connector assembly in the first embodiment of the application.
图3a为本申请第二实施例中的一种显示控制卡的结构示意图。Fig. 3a is a schematic structural diagram of a display control card in the second embodiment of the application.
图3b为本申请第二实施例中的另一种显示控制卡的结构示意图。Fig. 3b is a schematic structural diagram of another display control card in the second embodiment of the application.
图4为本申请第三实施例中的显示系统的结构示意图。FIG. 4 is a schematic diagram of the structure of the display system in the third embodiment of the application.
图5为本申请第四实施例中的显示系统的结构示意图。FIG. 5 is a schematic diagram of the structure of the display system in the fourth embodiment of the application.
图6为本申请第四实施例中的显示系统的一个举例的结构示意图。FIG. 6 is a schematic structural diagram of an example of the display system in the fourth embodiment of this application.
图7为本申请第五实施例中的显示系统的结构示意图。FIG. 7 is a schematic diagram of the structure of the display system in the fifth embodiment of this application.
[根据细则26改正01.04.2020] 
[Corrected according to Rule 26 01.04.2020]
图8为图7中的LED灯板的进一步的结构示意图。Fig. 8 is a further structural diagram of the LED light board in Fig. 7.
图9为本申请第五实施例中的显示系统的一个举例的结构示意图。FIG. 9 is a schematic structural diagram of an example of the display system in the fifth embodiment of this application.
图10a为本申请第六实施例中的显示系统的结构示意图。Fig. 10a is a schematic structural diagram of a display system in a sixth embodiment of this application.
图10b为本申请第六实施例中的显示系统的另一结构示意图。FIG. 10b is a schematic diagram of another structure of the display system in the sixth embodiment of this application.
图11为本申请第六实施例中的显示系统的一个举例的结构示意图。FIG. 11 is a schematic structural diagram of an example of the display system in the sixth embodiment of this application.
图12为本申请第七实施例中的显示系统的结构示意图。FIG. 12 is a schematic structural diagram of a display system in a seventh embodiment of this application.
图13为本申请第八实施例中的显示系统的结构示意图。FIG. 13 is a schematic diagram of the structure of the display system in the eighth embodiment of this application.
图14为本申请第八实施例中的显示系统的一个举例的结构示意图。FIG. 14 is a schematic structural diagram of an example of the display system in the eighth embodiment of this application.
具体实施方式Detailed ways
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本申请一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of this application.
第一实施例First embodiment
如图1和图2所示,本申请第一实施例中提供的一种接插组件,包括成对设置的接插件JH1和接插件JH2。其中,接插件JH1例如包括电源引脚组、多个第一数据输 出引脚群以及功能扩展引脚组。接插件JH2例如包括显示控制信号输出引脚组、多个第二数据输出引脚群、多路以太网接口引脚组以及优选地还包括测试按键输入信号引脚和状态灯信号引脚。其中,多个第一数据输出引脚群和多个第二数据输出引脚群例如用于传输多路RGB数据信号以驱动显示单元例如LED灯板进行画面显示。多个第一数据输出引脚群的数量例如为3个,当然也可以为其它正整数;多个第二数据输出引脚群的数量例如为3个,当然也可以为其它正整数。每个第一数据输出引脚群例如包括M组数据输出引脚,每一个第二数据输出引脚群包括N组数据输出引脚,其中M和N分别为正偶数且M大于N。具体地,每个第一数据输出引脚群例如包括六组数据输出引脚,每一个第二数据输出引脚群包括四组数据输出引脚,并且在图2所示的接插件JH2中还具有包括两组数据输出引脚的第三数据输出引脚群。每一组数据输出引脚例如包括一个红色数据(R)输出引脚、一个绿色数据(G)输出引脚和一个蓝色数据(B)输出引脚。本实施例中,接插件JH1和接插件JH2总计最大可以支持32路RGB数据组输出。As shown in Fig. 1 and Fig. 2, a connector assembly provided in the first embodiment of the present application includes a connector JH1 and a connector JH2 arranged in pairs. Among them, the connector JH1 includes, for example, a power pin group, a plurality of first data output pin groups, and a function expansion pin group. The connector JH2 includes, for example, a display control signal output pin group, a plurality of second data output pin groups, a multi-channel Ethernet interface pin group, and preferably also a test key input signal pin and a status light signal pin. Among them, the plurality of first data output pin groups and the plurality of second data output pin groups are, for example, used to transmit multiple RGB data signals to drive a display unit, such as an LED light board, for image display. The number of the plurality of first data output pin groups is, for example, 3, of course, it can also be other positive integers; the number of the plurality of second data output pin groups is, for example, 3, of course, it can also be other positive integers. Each first data output pin group includes, for example, M groups of data output pins, and each second data output pin group includes N groups of data output pins, where M and N are positive and even numbers, and M is greater than N. Specifically, each first data output pin group includes, for example, six sets of data output pins, and each second data output pin group includes four sets of data output pins, and in the connector JH2 shown in FIG. There is a third data output pin group including two sets of data output pins. Each group of data output pins includes, for example, a red data (R) output pin, a green data (G) output pin, and a blue data (B) output pin. In this embodiment, the connector JH1 and the connector JH2 can support a maximum of 32 RGB data group outputs in total.
在引脚布置方面,功能扩展引脚组在接插件JH1长度方向(图1中的竖直方向)上位于多个第一数据输出引脚群和电源引脚组之间,将多个第一数据输出引脚群和电源引脚组间隔开,增大两者之间的距离,这样不但可以使得引脚布置得更加紧凑,而且可以降低电源对RGB数据组的干扰,提升数据传输的稳定性。显示控制信号输出引脚组在接插件JH2长度方向(图2中的竖直方向)上位于多个第二数据输出引脚群和多路以太网接口引脚组之间。这种将相同功能的引脚集中布置在一起的方式,使得接插件JH1和JH2的引脚排布更加紧凑,而且按照固定规律设置该种接地引脚有利于降低布线难度。另外,相邻两个第一数据输出引脚群之间设置有接地引脚对例如两个接地引脚,相邻两个第二数据输出引脚群之间设置有接地引脚对例如两个接地引脚,可以提升RGB数据组的信号传输可靠性和稳定性。再者,功能扩展引脚组与接插件JH1的多个第一数据输出引脚群之间设置有接地引脚对例如两个接地引脚,可进一步提升RGB数据组的信号输出可靠性和稳定性。再者,功能扩展引脚组与电源引脚组之间设置有空接引脚;如此一来,可防止接插件JH1插拔时由于引脚错位导致的例如短路、错接等问题。这种防呆设计可降低产品故障率,提升产品质量。再者,测试按键输入信号引脚和状态灯信号引脚与显示控制信号输出引脚组之间还设置有接地引脚对。测试按键输入信号引脚和状态灯信号引脚位于多路以太网接口引脚组和显示控制信号输出引脚组之间。测试按键输入信号引脚和状态灯信号引脚与多路以太网接口引脚组之间还设置有接地引脚对。这样一来,可以降低测试按键输入信号引脚和状态灯信号与多路以太网接口引脚组、显示控制信号输出引脚组之间的信号干扰,提升信号传输的稳定 性。如此一来,实现了接插件JH1和JH2的接口资源的合理分布。In terms of pin layout, the function expansion pin group is located between the multiple first data output pin groups and the power pin group in the length direction of the connector JH1 (the vertical direction in Figure 1), and the multiple first Separate the data output pin group and the power pin group to increase the distance between the two, which not only makes the pin layout more compact, but also reduces the interference of the power supply to the RGB data group and improves the stability of data transmission . The display control signal output pin group is located between the multiple second data output pin groups and the multiple Ethernet interface pin groups in the length direction of the connector JH2 (the vertical direction in FIG. 2). This way of arranging the pins of the same function together makes the pin arrangement of the connectors JH1 and JH2 more compact, and setting this kind of grounding pins according to a fixed rule helps reduce the wiring difficulty. In addition, ground pin pairs, such as two ground pins, are provided between two adjacent first data output pin groups, and, for example, two ground pin pairs are provided between two adjacent second data output pin groups. The ground pin can improve the signal transmission reliability and stability of the RGB data group. Furthermore, ground pin pairs, such as two ground pins, are provided between the function expansion pin group and the multiple first data output pin groups of the connector JH1, which can further improve the signal output reliability and stability of the RGB data group Sex. Furthermore, there are free connection pins between the function expansion pin group and the power supply pin group; in this way, problems such as short circuit and misconnection caused by the misplacement of the pins when the connector JH1 is plugged and unplugged can be prevented. This foolproof design can reduce product failure rate and improve product quality. Furthermore, a grounding pin pair is also provided between the test button input signal pin and the status light signal pin and the display control signal output pin group. The test button input signal pin and the status light signal pin are located between the multi-channel Ethernet interface pin group and the display control signal output pin group. A grounding pin pair is also provided between the test button input signal pin and the status light signal pin and the multi-channel Ethernet interface pin group. In this way, the signal interference between the test button input signal pins and status light signals, the multi-channel Ethernet interface pin group and the display control signal output pin group can be reduced, and the stability of signal transmission can be improved. In this way, the reasonable distribution of the interface resources of the connectors JH1 and JH2 is realized.
通常,接插件JH1和JH2的引脚数量分别不大于100个。具体地,与现有技术中的120个引脚的接插件相比,本申请实施例中的接插件JH1和JH2例如分别为84个引脚的接插件母座或者公座,其各个引脚的功能定义参见表1和表2。本申请提供的接插件JH1和JH2省去了多个未使用引脚,并且以更优的引脚排布方式用于实现显示控制卡的数据传输以及各种功能扩展需求。Generally, the number of pins of the connectors JH1 and JH2 is not more than 100 respectively. Specifically, compared with the 120-pin connector in the prior art, the connectors JH1 and JH2 in the embodiment of the present application are, for example, 84-pin connector female sockets or male sockets, respectively. See Table 1 and Table 2 for the function definition. The connectors JH1 and JH2 provided in this application omit a number of unused pins, and use a better pin arrangement to realize the data transmission of the display control card and various function expansion requirements.
表1接插件JH1的各个引脚功能定义Table 1 Definition of each pin function of connector JH1
Figure PCTCN2019094628-appb-000001
Figure PCTCN2019094628-appb-000001
Figure PCTCN2019094628-appb-000002
Figure PCTCN2019094628-appb-000002
表2接插件JH2的各个引脚功能定义Table 2 Definition of each pin function of connector JH2
Figure PCTCN2019094628-appb-000003
Figure PCTCN2019094628-appb-000003
Figure PCTCN2019094628-appb-000004
Figure PCTCN2019094628-appb-000004
Figure PCTCN2019094628-appb-000005
Figure PCTCN2019094628-appb-000005
具体地,如图1和表1所示,接插件JH1的84个引脚在长度方向上依次为:2个接地引脚(引脚1、2)、18个数据输出引脚(引脚3-20)、2个接地引脚(引脚21、22)、18个数据输出引脚(引脚23-40)、2个接地引脚(引脚41、42)、18个数据输出引脚(引脚43-60)、2个接地引脚(引脚61、62)、16个功能扩展引脚(引脚63-78)、2个空接引脚(引脚79、80)、4个电源引脚(引脚81-84)。此外,每个电源引脚的电压例如为5V直流电压,最大电流例如为0.5A,因此4个电源引脚可提供最大为2A的电流。在本申请其它实施例中,电源引脚组的引脚数量也可以根据实际需要进行设置,此处不以此为限。在本申请其它实施例中,还可以将功能扩展引脚组和电源引脚组之间的空接引脚替换成电源引脚、功能扩展引脚或者接地引脚,甚至还可以取消该空接引脚。Specifically, as shown in Figure 1 and Table 1, the 84 pins of the connector JH1 in the length direction are: 2 ground pins (pins 1, 2), 18 data output pins (pin 3 -20), 2 ground pins (pins 21, 22), 18 data output pins (pins 23-40), 2 ground pins (pins 41, 42), 18 data output pins (Pins 43-60), 2 ground pins (pins 61, 62), 16 function expansion pins (pins 63-78), 2 idle pins (pins 79, 80), 4 Power supply pins (pins 81-84). In addition, the voltage of each power supply pin is, for example, a 5V DC voltage, and the maximum current is, for example, 0.5A. Therefore, the four power pins can provide a maximum current of 2A. In other embodiments of the present application, the number of pins of the power pin group can also be set according to actual needs, and it is not limited here. In other embodiments of the present application, the empty connection pins between the function expansion pin group and the power supply pin group can be replaced with power pins, function expansion pins, or ground pins, or even the empty connection pins can be eliminated. Pin.
承上述,功能扩展引脚组的引脚为功能扩展接口,主要用于灯板存储器(例如FLASH存储器)、灯板智能模组、双接收卡备份、双电源检测等功能的扩展。因此,功能扩展引脚组可例如包括灯板存储器控制接口引脚、灯板存储器串行时钟信号引脚、灯板存储器串行接口片选信号引脚、灯板存储器存储数据输入引脚、智能模组数据发送信号引脚、灯板存储器存储数据输出引脚、智能模组组数据接收信号引脚、移位寄存器数据信号引脚、移位寄存器时钟信号引脚、电源检测信号引脚、双卡连接信号引脚以及双卡身份标识信号引脚等的部分或全部。In view of the above, the pins of the function expansion pin group are function expansion interfaces, which are mainly used for the expansion of lamp board memory (such as FLASH memory), lamp board intelligent module, dual receiving card backup, dual power detection and other functions. Therefore, the function extension pin group can include, for example, light board memory control interface pins, light board memory serial clock signal pins, light board memory serial interface chip select signal pins, light board memory storage data input pins, and smart Module data sending signal pin, light board memory storage data output pin, smart module group data receiving signal pin, shift register data signal pin, shift register clock signal pin, power detection signal pin, dual The card is connected to part or all of the signal pins and the dual-card identification signal pins.
本申请实施例中的接插件JH1中的功能扩展引脚组包括16个引脚,具体引脚定义参见表3。具体地,功能扩展引脚组例如包括5个灯板存储器控制接口引脚(HUB_CODE0、HUB_CODE1、HUB_CODE2、HUB_CODE3和HUB_CODE4)、1个灯板存储器串行时钟信号引脚(SPI_CLK)、1个灯板存储器串行接口片选信号引脚(SPI_CS)、1个灯板存储器存储数据输入引脚(SPI_MOSI)、1个灯板存储器存储数据输出引脚(SPI_MISO)、1个移位寄存器数据信号引脚(H164_CSD)、1个移位寄存器时钟信号引脚(H164_CLK)、1个双卡连接信号引脚(MS_DATA)、1个双卡身份标识信号引脚(MS_ID)、2个电源检测信号引脚(POWER_STA1、POWER_STA2)以及一个空置引脚。此处的空置引脚也可以被定义为其它功能扩展,本申请实施例不以此为限。另外,为了进一步节省接口引脚资源,还可以将灯板存储器存储数据输入引脚(SPI_MOSI)复用为智能模组数据发送信号引脚(UART_TX)、将灯板存储器存储数据输出引脚 (SPI_MISO)复用为智能模组数据接收信号引脚(UART_RX),以用于智能模组功能的扩展。这样一来可以进一步使得接插件JH1的引脚数量更加少,引脚更加紧凑,节约引脚接口资源,降低生产成本。值得一提的是,在其它实施例中,接插件JH1还可以不设置功能扩展引脚组,或者也可以被用户定义成别的功能引脚例如数据输出引脚,甚至是空接引脚。本实施例不以此为限。The function expansion pin group in the connector JH1 in the embodiment of the present application includes 16 pins. Refer to Table 3 for specific pin definitions. Specifically, the function extension pin group includes, for example, 5 light board memory control interface pins (HUB_CODE0, HUB_CODE1, HUB_CODE2, HUB_CODE3, and HUB_CODE4), 1 light board memory serial clock signal pin (SPI_CLK), and 1 light board Memory serial interface chip select signal pin (SPI_CS), 1 light board memory storage data input pin (SPI_MOSI), 1 light board memory storage data output pin (SPI_MISO), 1 shift register data signal pin (H164_CSD), 1 shift register clock signal pin (H164_CLK), 1 dual card connection signal pin (MS_DATA), 1 dual card identification signal pin (MS_ID), 2 power detection signal pins ( POWER_STA1, POWER_STA2) and a free pin. The vacant pins here can also be defined as other function extensions, and the embodiments of the present application are not limited thereto. In addition, in order to further save interface pin resources, the light board memory storage data input pin (SPI_MOSI) can be multiplexed as the smart module data transmission signal pin (UART_TX), and the light board memory storage data output pin (SPI_MISO) ) Is multiplexed as the data receiving signal pin (UART_RX) of the smart module for the expansion of the function of the smart module. In this way, the number of pins of the connector JH1 can be further reduced, the pins are more compact, the pin interface resources are saved, and the production cost is reduced. It is worth mentioning that in other embodiments, the connector JH1 may not be provided with a function extension pin group, or may be defined by the user as other function pins such as data output pins, or even idle pins. This embodiment is not limited to this.
表3功能扩展引脚组接口定义Table 3 Function extension pin group interface definition
引脚名称Pin name 引脚信号Pin signal 简要描述A brief description
RFU3RFU3 HUB_CODE0HUB_CODE0 灯板存储器控制接口1Lamp board memory control interface 1
RFU4RFU4 SPI_CLKSPI_CLK 灯板存储器串行时钟信号Lamp board memory serial clock signal
RFU5RFU5 HUB_CODE1HUB_CODE1 灯板存储器控制接口2Lamp board memory control interface 2
RFU6RFU6 SPI_CSSPI_CS 灯板存储器串行接口片选信号Chip select signal for serial interface of lamp board memory
RFU7RFU7 HUB_CODE2HUB_CODE2 灯板存储器控制接口3Lamp board memory control interface 3
RFU8RFU8 SPI_MOSI/UART_TXSPI_MOSI/UART_TX 灯板存储器存储数据输入/智能模组数据发送信号Light board memory storage data input / smart module data sending signal
RFU9RFU9 HUB_CODE3HUB_CODE3 灯板存储器控制接口4Lamp board memory control interface 4
RFU10RFU10 SPI_MISO/UART_RXSPI_MISO/UART_RX 灯板存储器存储数据输出/智能模组数据接收信号Light board memory storage data output / smart module data receiving signal
RFU11RFU11 H164_CSDH164_CSD 移位寄存器数据信号Shift register data signal
RFU12RFU12 // 空置Vacant
RFU13RFU13 H164_CLKH164_CLK 移位寄存器时钟信号Shift register clock signal
RFU14RFU14 POWER_STA1POWER_STA1 电源检测信号1 Power detection signal 1
RFU15RFU15 MS_DATAMS_DATA 双卡连接信号Dual card connection signal
RFU16RFU16 POWER_STA2POWER_STA2 电源检测信号2 Power detection signal 2
RFU17RFU17 MS_IDMS_ID 双卡身份标识信号Dual card identification signal
RFU18RFU18 HUB_CODE4HUB_CODE4 灯板存储器控制接口5Lamp board memory control interface 5
值得一提的是,在本申请其它实施例中,接插件JH1上的功能扩展引脚组也可以被用户定义成其它功能的引脚,例如电源引脚、或接地引脚、或数据输出引脚等,甚至是空置或者空接引脚。本实施例不以此为限。It is worth mentioning that in other embodiments of the present application, the function extension pin group on the connector JH1 can also be defined by the user as pins with other functions, such as power pins, or ground pins, or data output pins. Pins, etc., even empty or unconnected pins. This embodiment is not limited to this.
承上述,如图2和表2所示,接插件JH2的84个引脚在长度方向上依次为:2个接地引脚(引脚1、2)、16个以太网接口引脚(引脚3-18)、2个接地引脚(引脚19、20)、1个测试按键输入信号引脚(引脚21)、1个状态灯信号引脚(引脚22)、2个接地引脚、10个显示控制信号输出引脚(引脚23-34)、2个接地引脚(引脚35、36)、12个数据输出引脚(引脚37-48)、2个接地引脚(引脚49、50)、12个数据输出引脚(引脚51-62)、2个接地引脚(引脚63、64)、12个数据输出引脚(引脚65-76)、2个接地引脚(引脚77、78) 以及6个数据输出引脚(引脚76-84)。In view of the above, as shown in Figure 2 and Table 2, the 84 pins of the connector JH2 in the length direction are: 2 ground pins (pins 1, 2), 16 Ethernet interface pins (pins 3-18), 2 ground pins (pin 19, 20), 1 test button input signal pin (pin 21), 1 status light signal pin (pin 22), 2 ground pins , 10 display control signal output pins (pins 23-34), 2 ground pins (pins 35, 36), 12 data output pins (pins 37-48), 2 ground pins ( Pin 49, 50), 12 data output pins (pins 51-62), 2 ground pins (pins 63, 64), 12 data output pins (pins 65-76), 2 Ground pins (pins 77, 78) and 6 data output pins (pins 76-84).
另外,从图2中可以看出,16个以太网接口引脚(引脚3-18)对称分布在接插件JH2水平方向的两侧,每侧各分布有8个以太网接口引脚,每侧的8个以太网接口引脚连续排布在接插件JH2上,也即相邻两个以太网接口引脚之间不设置接地引脚。因此,与现有的120个引脚的接插件相比,本实施例提供的84个引脚的接插件引脚布置更加紧凑且成本更低、连线更加方便。In addition, it can be seen from Figure 2 that the 16 Ethernet interface pins (pins 3-18) are symmetrically distributed on both sides of the connector JH2 in the horizontal direction, and 8 Ethernet interface pins are distributed on each side. The eight Ethernet interface pins on the side are continuously arranged on the connector JH2, that is, no grounding pin is set between two adjacent Ethernet interface pins. Therefore, compared with the existing 120-pin connector, the 84-pin connector provided in this embodiment has a more compact pin layout, lower cost, and more convenient connection.
综上所述,本申请前述第一实施例通过对接插组件中各种引脚组进行集中排布,同类功能信号引脚分配到一起,可以使得接插件的引脚更加紧凑、方便布线,实现接口资源的合理分布,降低成本。另外,功能扩展引脚组与电源引脚组之间设置有空接引脚。如此一来,可防止接插件JH1插拔时由于引脚错位导致的例如短路、错接等问题。这种防呆设计可降低产品故障率,提升产品质量。与现有的120个引脚的接插件相比,通过设计不大于100个引脚例如84个引脚的接插件,省去多个未使用的引脚,以更优的引脚排布方式用于实现显示控制卡的数据传输以及各种功能扩展需求。再者,多路以太网接口引脚组在接插件JH2的两侧连续排布,使得接插件JH2的引脚布置更加紧凑且成本更低、连线更加方便。To sum up, the foregoing first embodiment of the present application centrally arranges various pin groups in the connector assembly, and allocates the same functional signal pins together, which can make the pins of the connector more compact and convenient for wiring. Reasonable distribution of interface resources reduces costs. In addition, a free connection pin is provided between the function expansion pin group and the power supply pin group. In this way, it is possible to prevent problems such as short circuit and misconnection caused by pin misalignment when the connector JH1 is inserted and unplugged. This foolproof design can reduce product failure rate and improve product quality. Compared with the existing 120-pin connector, by designing a connector with no more than 100 pins, such as 84 pins, a number of unused pins are eliminated and a better pin arrangement Used to realize the data transmission of the display control card and various function expansion requirements. Furthermore, the multiple Ethernet interface pin groups are continuously arranged on both sides of the connector JH2, making the pin layout of the connector JH2 more compact, lower cost, and more convenient for connection.
第二实施例Second embodiment
如图3a所示,本申请第二实施例中提供的一种显示控制卡20,包括:电路板21、可编程逻辑器件22、微控制器23、以太网物理层收发器24a及24b和接插组件25。此外,显示控制卡20还包括一些辅助器件例如易失性存储器26和非易失性存储器27。可编程逻辑器件22、微控制器23、以太网物理层收发器24a及24b和接插组件25以及辅助器件例如易失性存储器26和非易失性存储器27设置在电路板21上。As shown in FIG. 3a, a display control card 20 provided in the second embodiment of the present application includes: a circuit board 21, a programmable logic device 22, a microcontroller 23, Ethernet physical layer transceivers 24a and 24b, and interfaces Plug component 25. In addition, the display control card 20 also includes some auxiliary devices such as a volatile memory 26 and a non-volatile memory 27. The programmable logic device 22, the microcontroller 23, the Ethernet physical layer transceivers 24a and 24b, the plug-in assembly 25, and auxiliary devices such as the volatile memory 26 and the non-volatile memory 27 are provided on the circuit board 21.
其中,可编程逻辑器件22典型地为现场可编程门阵列(FPGA)器件,微控制器23连接可编程逻辑器件22和接插组件25的接插件JH1的电源引脚组,且其典型地为MCU(例如基于ARM内核的MCU等),以太网物理层收发器24a、24b连接可编程逻辑器件22,其例如是两路千兆网PHY芯片。当然,电路板21上也可以仅设置有一个以太网接口。接插组件25例如是采用成对设置的如图1所示的接插件JH1和如图2所示的接插件JH2,其可以是接插件公座。以太网物理层收发器24a、24b连接接插件JH2的多路以太网接口引脚组和接插件JH1的电源引脚组,可编程逻辑器件22连接接插件JH1的电源引脚组、多个第一数据输出引脚群、功能扩展引脚组和接插件JH2的多个第二数据输出引脚群及显示控制信号输出引脚组。易失性存储器26连接可编程逻辑器件22和接插件JH1的电源引脚组,其例如是DDR存储器;非易失性存储器27连接可编程逻辑器件22、微控制器23和接插件JH1的电源引脚组,以由两者共用, 其例如是FLASH存储器(闪存)。Among them, the programmable logic device 22 is typically a field programmable gate array (FPGA) device, and the microcontroller 23 connects the programmable logic device 22 and the power pin group of the connector JH1 of the connector assembly 25, and it is typically MCU (for example, MCU based on ARM core, etc.), Ethernet physical layer transceivers 24a, 24b are connected to the programmable logic device 22, which are, for example, two Gigabit Ethernet PHY chips. Of course, only one Ethernet interface may also be provided on the circuit board 21. The connector assembly 25 is, for example, a connector JH1 as shown in FIG. 1 and a connector JH2 as shown in FIG. 2 which are arranged in pairs, which may be a male connector. The Ethernet physical layer transceivers 24a, 24b are connected to the multiple Ethernet interface pin group of the connector JH2 and the power pin group of the connector JH1, and the programmable logic device 22 is connected to the power pin group of the connector JH1 and multiple A data output pin group, a function expansion pin group, a plurality of second data output pin groups of the connector JH2, and a display control signal output pin group. The volatile memory 26 is connected to the programmable logic device 22 and the power supply pin group of the connector JH1, which is, for example, a DDR memory; the nonvolatile memory 27 is connected to the power supply of the programmable logic device 22, the microcontroller 23 and the connector JH1 The pin group is shared by both, and it is, for example, a FLASH memory (flash memory).
进一步地,如图3b所示,显示控制卡20还可以包括转接板31。转接板31上设置有接插组件32。接插组件32例如是采用与接插组件25具有相同引脚定义的接插组件,例如两个与接插件公座匹配的、具有84个引脚的接插件母座。当然,其也为其他引脚数量的接插件,此处不以此为限。进一步地,转接板31上还设置有网络变压器33和连接所述网络变压器的以太网接口34a和34b。以太网接口34a和34b例如是RJ45接口。以太网接口34a和34b通过网络变压器33、接插组件32连接接插组件25的多路以太网接口引脚组。此处的电路板21和转接板31通过匹配的接插组件25和接插组件32插接,使得用户可以将显示控制卡20上核心的元器件例如可编程逻辑器件22、微控制器23、以太网物理层收发器24a和24b等设置在电路板21上形成核心卡,有利于转接板31的个性化定制和核心卡的模块化设计,以更好地适应市场需求。此时的电路板21及其上的电气元件形成的核心卡也可称为接收卡。此外,将网络变压器33设置在转接板31上,而不设置在接收卡上,可以减小核心卡或接收卡的尺寸,降低核心卡或接收卡的成本和加工难度。本实施例在显示控制卡20上配置如前述第一实施例的接插组件,其可有利于显示控制卡20的输入输出接口趋于标准化。Further, as shown in FIG. 3b, the display control card 20 may further include an adapter plate 31. A plug-in assembly 32 is provided on the adapter plate 31. The connector assembly 32 is, for example, a connector assembly with the same pin definition as the connector assembly 25, for example, two female connector sockets with 84 pins that match the male socket of the connector. Of course, it is also a connector with other pin numbers, which is not limited here. Further, the adapter board 31 is also provided with a network transformer 33 and Ethernet interfaces 34a and 34b connected to the network transformer. The Ethernet interfaces 34a and 34b are, for example, RJ45 interfaces. The Ethernet interfaces 34a and 34b are connected to the multiple Ethernet interface pin groups of the plug assembly 25 through the network transformer 33 and the plug assembly 32. Here, the circuit board 21 and the adapter board 31 are plugged in through the matching plug-in assembly 25 and the plug-in assembly 32, so that the user can connect the core components on the display control card 20, such as the programmable logic device 22 and the microcontroller 23. , Ethernet physical layer transceivers 24a and 24b are arranged on the circuit board 21 to form a core card, which is conducive to the personalized customization of the adapter board 31 and the modular design of the core card to better meet market demand. The core card formed by the circuit board 21 and the electrical components on it at this time can also be called a receiving card. In addition, arranging the network transformer 33 on the adapter board 31 instead of the receiving card can reduce the size of the core card or the receiving card, and reduce the cost and processing difficulty of the core card or the receiving card. In this embodiment, the display control card 20 is configured with the plug-in assembly as in the foregoing first embodiment, which can facilitate the standardization of the input and output interfaces of the display control card 20.
第三实施例The third embodiment
如图4所示,本申请第三实施例提供的一种显示系统50,例如包括:显示控制卡51和连接显示控制卡51的一个或多个LED灯板55(图4中仅示出一个作为举例)。显示控制卡51带载并点亮LED灯板55以进行画面显示。显示控制卡51包括接收卡511和转接板513。接收卡511例如包括第二实施例中的电路板21以及其上的电气元件。转接板513可例如包括第二实施例中的转接板31及其上的电气元件。接收卡511上设置有接插组件5111,转接板513设置有与接插组件5111具有相同引脚定义的接插组件5131。As shown in FIG. 4, a display system 50 provided by the third embodiment of the present application, for example, includes: a display control card 51 and one or more LED light boards 55 connected to the display control card 51 (only one is shown in FIG. As an example). The display control card 51 is loaded and illuminates the LED lamp board 55 to perform screen display. The display control card 51 includes a receiving card 511 and an adapter board 513. The receiving card 511 includes, for example, the circuit board 21 in the second embodiment and electrical components thereon. The adapter board 513 may include, for example, the adapter board 31 in the second embodiment and the electrical components thereon. The receiving card 511 is provided with a connector assembly 5111, and the adapter board 513 is provided with a connector assembly 5131 having the same pin definition as the connector assembly 5111.
通常,转接板513还设置有一个或多个数据输出接口5132(图4中仅示出一个作为举例)。数据输出接口5132例如为接插件,比如16引脚或26引脚的排针座或者插座,其可通过软排线连接LED灯板55。数据输出接口5132通过接插组件5131连接接收卡51的接插组件5111的多个第一数据输出引脚群、多个第二数据输出引脚群以及显示控制信号输出引脚组,获得要输出的显示数据(RGB)和相应的显示控制信号(Ctrl),以点亮LED灯板55并进行画面显示。此处值得一提的是,转接板513上还可以设置有信号驱动电路(图4中未示出)。数据输出接口5132通过信号驱动电路连接接插组件5131。信号驱动电路用于对RGB数据和显示控制信号(Ctrl)进行信号增强。信号驱动电路例如包括信号驱动器芯片,其型号可例如为74HC245。信号驱动电路可以仅包括 一个信号驱动器芯片,也可以包括多个信号驱动芯片,其可根据电路实际需求确定,本申请实施例不以此为限。Generally, the adapter board 513 is also provided with one or more data output interfaces 5132 (only one is shown in FIG. 4 as an example). The data output interface 5132 is, for example, a connector, such as a 16-pin or 26-pin header or socket, which can be connected to the LED light board 55 through a flexible flat cable. The data output interface 5132 is connected to the multiple first data output pin groups, multiple second data output pin groups, and display control signal output pin groups of the connector component 5111 of the receiving card 51 through the connector component 5131 to obtain the desired output The display data (RGB) and the corresponding display control signal (Ctrl) are displayed to light up the LED light board 55 and perform screen display. It is worth mentioning here that a signal driving circuit (not shown in FIG. 4) may also be provided on the adapter board 513. The data output interface 5132 is connected to the plug-in assembly 5131 through a signal driving circuit. The signal driving circuit is used for signal enhancement of RGB data and display control signal (Ctrl). The signal driving circuit includes, for example, a signal driver chip, and its model may be 74HC245, for example. The signal driving circuit may include only one signal driver chip, or may include multiple signal driving chips, which can be determined according to the actual requirements of the circuit, and the embodiment of the present application is not limited thereto.
LED灯板55例如还包括灯板输入接口551。灯板输入接口551例如与数据输出接口5132插接在一起,以获取显示数据(RGB)和相应的显示控制信号(Ctrl)。此处,LED灯板55典型地还包括LED驱动芯片和行译码芯片。LED驱动芯片从灯板输入接口获取RGB显示数据和显示控制信号(Ctrl)中部分信号例如OE、LAT等,行译码芯片从灯板输入接口551获取显示控制信号(Ctrl)中另一部分信号例如A~E,列驱动芯片和行译码芯片相互配合实现画面显示。LED驱动芯片和行译码芯片可采用市售的常见芯片,此处不再赘述。The LED light board 55 further includes a light board input interface 551, for example. The light board input interface 551 is plugged together with the data output interface 5132, for example, to obtain display data (RGB) and corresponding display control signals (Ctrl). Here, the LED light board 55 typically also includes an LED driving chip and a row decoding chip. The LED driver chip obtains RGB display data and some signals of the display control signal (Ctrl) from the light board input interface, such as OE, LAT, etc., and the row decoder chip obtains another part of the display control signal (Ctrl) from the light board input interface 551, for example A~E, the column driver chip and the row decoder chip cooperate with each other to realize the picture display. The LED driving chip and the row decoding chip can be common commercially available chips, which will not be repeated here.
第四实施例Fourth embodiment
如图5所示,本申请第四实施例提供的一种显示系统40。本实施例的显示系统40是在第三实施例中的显示系统50的基础上进行改进得到,其基本架构大体相同,其不同之处在于,除了显示数据(RGB)和显示控制信号(Ctrl)的传输外,还对接收卡上的接插组件的功能扩展引脚组定义了SPI接口引脚,在LED灯板上增加非易失性存储器(例如FLASH存储器),并在转接板和LED灯板上增加了信号驱动电路和多路选择电路,以实现了LED灯板校正系数和相关配置参数的备份和在更换时LED灯板校正系数和相关配置参数的回读。与前述实施例相同之处,则不再赘述。As shown in FIG. 5, a display system 40 provided by the fourth embodiment of the present application. The display system 40 of this embodiment is improved on the basis of the display system 50 in the third embodiment, and its basic structure is roughly the same. The difference is that, except for the display data (RGB) and the display control signal (Ctrl) In addition to the transmission, the SPI interface pins are defined for the function expansion pin group of the plug-in components on the receiving card, and non-volatile memory (such as FLASH memory) is added to the LED light board. A signal drive circuit and a multi-channel selection circuit are added to the light board to realize the backup of the LED light board correction coefficient and related configuration parameters, and the readback of the LED light board correction coefficient and related configuration parameters during replacement. The similarities with the foregoing embodiment will not be repeated.
具体地,如图5所示,显示系统40例如包括:显示控制卡41和连接显示控制卡41的LED灯板45。显示控制卡41包括接收卡411和转接板413。接收卡41上设置有接插组件4111和可编程逻辑器件4112。接插组件4111其例如为采用前述第二实施例的接插组件。转接板413上设置有接插组件4131和与接插组件4131相连接的多个数据输出接口4132。接插组件4131例如为与接插组件4111具有相同引脚定义的接插组件。Specifically, as shown in FIG. 5, the display system 40 includes, for example, a display control card 41 and an LED light board 45 connected to the display control card 41. The display control card 41 includes a receiving card 411 and a transfer board 413. The receiving card 41 is provided with a plug-in assembly 4111 and a programmable logic device 4112. The plug-in assembly 4111 is, for example, the plug-in assembly of the aforementioned second embodiment. The adapter board 413 is provided with a plug assembly 4131 and a plurality of data output interfaces 4132 connected to the plug assembly 4131. The plug-in component 4131 is, for example, a plug-in component with the same pin definition as the plug-in component 4111.
进一步地,接收卡41上的接插组件4111的接插件JH1(请参考图1和表1)的功能扩展引脚组包括灯板存储器串行时钟信号引脚(SPI_CLK)、灯板存储器串行接口片选信号引脚(SPI_CS)、灯板存储器存储数据输入引脚(SPI_MOSI)和灯板存储器存储数据输出引脚(SPI_MISO)和至少一个灯板存储器控制接口引脚((HUB_CODE,包括HUB_CODE0、HUB_CODE1...)。灯板存储器串行时钟信号引脚(SPI_CLK)、灯板存储器串行接口片选信号引脚(SPI_CS)、灯板存储器存储数据输入引脚(SPI_MOSI)、灯板存储器存储数据输出引脚(SPI_MISO)和至少一个灯板存储器控制接口引脚((HUB_CODE)分别连接至接收卡411上的可编程逻辑器件4112。其中,灯板存储器串行时钟信号引脚(SPI_CLK)、灯板存储器串行接口片选信号引脚(SPI_CS)、灯板存储器 存储数据输入引脚(SPI_MOSI)和灯板存储器存储数据输出引脚(SPI_MISO)可统称为SPI接口引脚。Further, the function extension pin group of the connector JH1 (please refer to Figure 1 and Table 1) of the connector component 4111 on the receiving card 41 includes the lamp board memory serial clock signal pin (SPI_CLK), the lamp board memory serial Interface chip select signal pin (SPI_CS), light board memory storage data input pin (SPI_MOSI), light board memory storage data output pin (SPI_MISO), and at least one light board memory control interface pin ((HUB_CODE, including HUB_CODE0, HUB_CODE1...). Light board memory serial clock signal pin (SPI_CLK), light board memory serial interface chip select signal pin (SPI_CS), light board memory storage data input pin (SPI_MOSI), light board memory storage The data output pin (SPI_MISO) and at least one lamp board memory control interface pin ((HUB_CODE) are respectively connected to the programmable logic device 4112 on the receiving card 411. Among them, the lamp board memory serial clock signal pin (SPI_CLK), The lamp board memory serial interface chip select signal pin (SPI_CS), the lamp board memory storage data input pin (SPI_MOSI) and the lamp board memory storage data output pin (SPI_MISO) can be collectively referred to as SPI interface pins.
转接板413上还设置有信号驱动电路4133和多路选择电路4134。信号驱动电路4133连接在接插组件4131和多个数据输出接口4132之间、且通过接插组件4131连接接插组件4111的灯板存储器串行时钟信号引脚(SPI_CLK)、灯板存储器存储数据输入引脚(SPI_MOSI)。多路选择电路4134连接在信号驱动电路4133和接插组件4131之间、且通过接插组件4131连接接收卡411的接插组件4111的至少一个灯板存储器控制接口引脚(HUB_CODE)、灯板存储器串行接口片选信号引脚(SPI_CS)、灯板存储器存储数据输出引脚(SPI_MISO)。多路选择电路4134连接信号驱动电路4133以传输灯板存储器串行接口片选信号引脚(SPI_CS)、灯板存储器存储数据输出引脚(SPI_MISO)。信号驱动电路4133例如包括型号为74HC245的信号驱动芯片,用于SPI接口信号增强。多路选择电路4134例如包括型号为74HC4052的多路选择器,其数量当然可根据实际需要进行设置,也可以采用其它具有相同功能的多路选择器来搭建多路选择电路4134。The adapter board 413 is also provided with a signal drive circuit 4133 and a multiplexer circuit 4134. The signal driving circuit 4133 is connected between the connector assembly 4131 and the multiple data output interfaces 4132, and is connected to the lamp panel memory serial clock signal pin (SPI_CLK) of the connector assembly 4111 through the connector assembly 4131, and the lamp panel memory stores data Input pin (SPI_MOSI). The multiplexer circuit 4134 is connected between the signal drive circuit 4133 and the connector assembly 4131, and is connected to at least one lamp board memory control interface pin (HUB_CODE) of the connector assembly 4111 of the receiving card 411 through the connector assembly 4131, and the lamp board Memory serial interface chip selection signal pin (SPI_CS), light board memory storage data output pin (SPI_MISO). The multiple selection circuit 4134 is connected to the signal driving circuit 4133 to transmit the light board memory serial interface chip selection signal pin (SPI_CS) and the light board memory storage data output pin (SPI_MISO). The signal driving circuit 4133 includes, for example, a signal driving chip with a model number of 74HC245, which is used for SPI interface signal enhancement. The multiplexer circuit 4134 includes, for example, a multiplexer with a model number of 74HC4052, the number of which can of course be set according to actual needs, and other multiplexers with the same function can also be used to build the multiplexer circuit 4134.
LED灯板45包括非易失性存储器452和信号驱动电路453。信号驱动电路453连接在非易失性存储器452和灯板输入接口451之间,灯板输入接口451连接对应的数据输出接口4132。非易失性存储器452例如是型号为W25Q80的FLASH存储器。信号驱动电路453例如包括型号为74HC245的信号驱动芯片,用于SPI接口信号增强。因此,非易失性存储器452通过信号驱动电路453、灯板输入接口451、转接板413连接到接收卡411的接插组件4111的灯板存储器串行时钟信号引脚(SPI_CLK)、灯板存储器串行接口片选信号引脚(SPI_CS)、灯板存储器存储数据输入引脚(SPI_MOSI)、灯板存储器存储数据输出引脚(SPI_MISO)。The LED light board 45 includes a non-volatile memory 452 and a signal driving circuit 453. The signal driving circuit 453 is connected between the non-volatile memory 452 and the light panel input interface 451, and the light panel input interface 451 is connected to the corresponding data output interface 4132. The non-volatile memory 452 is, for example, a FLASH memory whose model is W25Q80. The signal driving circuit 453 includes, for example, a signal driving chip with a model number of 74HC245, which is used for SPI interface signal enhancement. Therefore, the non-volatile memory 452 is connected to the light board memory serial clock signal pin (SPI_CLK) and the light board of the plug-in assembly 4111 of the receiving card 411 through the signal driving circuit 453, the light board input interface 451, and the adapter board 413. Memory serial interface chip selection signal pin (SPI_CS), light board memory storage data input pin (SPI_MOSI), light board memory storage data output pin (SPI_MISO).
这样一来,当需要读写LED灯板45中非易失性存储器432的数据时,接收卡411通过至少一个灯板存储器控制接口引脚(HUB_CODE)的信号和多路选择电路4134选定连接至多个数据输出接口4132中的一个数据输出接口4132的LED灯板45,然后通过与LED灯板45之间通过SPI接口信号的通信实现LED灯板45的非易失性存储器452中的数据的读写。因此,LED灯板45的校正系数和其它相关参数例如配置参数等数据可以备份到非易失性存储器452中,以避免更换接收卡时的LED灯板45的校正系数和相关配置参数等数据丢失。另外,当LED灯板更换时,接收卡41可以从更换后的LED灯板上的非易失性存储器中获取更换后LED灯板的校正系数和相关配置参数,而不需要重新通过配屏工作对更换后的LED灯板进行配置,提高了LED灯板更换和配置效率,提升了产品品质和用户体验度。In this way, when the data of the non-volatile memory 432 in the LED light board 45 needs to be read and written, the receiving card 411 selects and connects to the multiple selection circuit 4134 through the signal of at least one light board memory control interface pin (HUB_CODE) To the LED light board 45 of one data output interface 4132 of the multiple data output interfaces 4132, and then realize the data in the non-volatile memory 452 of the LED light board 45 through communication with the LED light board 45 through the SPI interface signal Read and write. Therefore, the correction coefficients of the LED light board 45 and other related parameters such as configuration parameters can be backed up to the non-volatile memory 452 to avoid data loss of the correction coefficients and related configuration parameters of the LED light board 45 when the receiving card is replaced. . In addition, when the LED light board is replaced, the receiving card 41 can obtain the correction coefficient and related configuration parameters of the replaced LED light board from the non-volatile memory on the replaced LED light board, without the need to work through the screen configuration again. Configuring the replaced LED light board improves the efficiency of LED light board replacement and configuration, and improves product quality and user experience.
当多个数据输出接口4132连接了多个LED灯板45时,接收卡411也可以根据至少一个灯板存储器控制接口引脚(HUB_CODE)信号和多路选择电路4134依次选定连接在多个数据输出接口4132的对应数据输出接口4132的、且需要进行数据读写的多个LED灯板,然后通过分别与选定多个LED灯板45通过SPI接口信号的传输来实现选定的多个LED灯板45的非易失性存储器452中的数据的读写。参见图6,其为本实施例提供的显示系统40的一个具体举例。另外,LED灯板45的信号驱动器电路还可例如包括电阻分压电路,用于将例如5V的SPI接口信号转换成3.3V的SPI接口信号、并向FLASH存储器提供3.3V的SPI接口信号。When multiple data output interfaces 4132 are connected to multiple LED light boards 45, the receiving card 411 can also select and connect to multiple data in sequence according to at least one light board memory control interface pin (HUB_CODE) signal and the multiplex circuit 4134. The multiple LED light boards corresponding to the data output interface 4132 of the output interface 4132 and need to read and write data, and then the selected multiple LEDs are realized through the transmission of the SPI interface signal with the selected multiple LED light boards 45 respectively Read and write data in the non-volatile memory 452 of the light board 45. Refer to FIG. 6, which is a specific example of the display system 40 provided in this embodiment. In addition, the signal driver circuit of the LED light board 45 may also include, for example, a resistor divider circuit for converting, for example, a 5V SPI interface signal into a 3.3V SPI interface signal and providing a 3.3V SPI interface signal to the FLASH memory.
第五实施例Fifth embodiment
如图7所示,本申请第五实施例提供的一种显示系统60。具体地,显示系统60包括显示控制卡61、LED灯板65和LED灯板67。显示控制卡61例如可采用本申请第三实施例中的显示控制卡且显示控制卡61包括接收卡611和转接板613。LED灯板65采用本申请第三实施例中的LED灯板。LED灯板65连接显示控制卡61。LED灯板67与LED灯板65级联。LED灯板67可例如为与LED灯板65具有相同电路配置的LED灯板。As shown in FIG. 7, a display system 60 provided by the fifth embodiment of the present application. Specifically, the display system 60 includes a display control card 61, an LED light board 65 and an LED light board 67. The display control card 61 can be, for example, the display control card in the third embodiment of the present application, and the display control card 61 includes a receiving card 611 and an adapter board 613. The LED light board 65 adopts the LED light board in the third embodiment of the present application. The LED light board 65 is connected to the display control card 61. The LED light board 67 and the LED light board 65 are cascaded. The LED light board 67 may be, for example, an LED light board having the same circuit configuration as the LED light board 65.
接收卡611上设置有接插组件6111和连接至接插组件6111的可编程逻辑器件6112。接插组件6111上的接插件JH1(参见图1和上述表1)的功能扩展引脚组包括:灯板存储器串行时钟信号引脚(SPI_CLK)、灯板存储器串行接口片选信号引脚(SPI_CS)、灯板存储器存储数据输入引脚(SPI_MOSI)、灯板存储器存储数据输出引脚(SPI_MISO)、移位寄存器数据信号引脚(H164_CSD)、移位寄存器时钟信号引脚(H164_CLK)以及至少一个灯板存储器控制接口引脚(HUB_CODE)。灯板存储器串行时钟信号引脚(SPI_CLK)、灯板存储器串行接口片选信号引脚(SPI_CS)、灯板存储器存储数据输入引脚(SPI_MOSI)和灯板存储器存储数据输出引脚(SPI_MISO)统称为SPI接口信号。灯板存储器串行时钟信号引脚(SPI_CLK)、灯板存储器串行接口片选信号引脚(SPI_CS)、灯板存储器存储数据输入引脚(SPI_MOSI)、灯板存储器存储数据输出引脚(SPI_MISO)、移位寄存器数据信号引脚(H164_CSD)、移位寄存器时钟信号引脚(H164_CLK)以及至少一个灯板存储器控制接口引脚(HUB_CODE)分别连接可编程逻辑器件6112。The receiving card 611 is provided with a plug-in component 6111 and a programmable logic device 6112 connected to the plug-in component 6111. The function expansion pin group of the connector JH1 (see Figure 1 and Table 1 above) on the connector assembly 6111 includes: lamp board memory serial clock signal pin (SPI_CLK), lamp board memory serial interface chip selection signal pin (SPI_CS), light board memory storage data input pin (SPI_MOSI), light board memory storage data output pin (SPI_MISO), shift register data signal pin (H164_CSD), shift register clock signal pin (H164_CLK), and At least one lamp board memory control interface pin (HUB_CODE). Lamp board memory serial clock signal pin (SPI_CLK), lamp board memory serial interface chip select signal pin (SPI_CS), lamp board memory storage data input pin (SPI_MOSI), and lamp board memory storage data output pin (SPI_MISO) ) Are collectively referred to as SPI interface signals. Lamp board memory serial clock signal pin (SPI_CLK), lamp board memory serial interface chip select signal pin (SPI_CS), lamp board memory storage data input pin (SPI_MOSI), lamp board memory storage data output pin (SPI_MISO) ), the shift register data signal pin (H164_CSD), the shift register clock signal pin (H164_CLK), and at least one lamp board memory control interface pin (HUB_CODE) are respectively connected to the programmable logic device 6112.
转接板613上设置接插组件6131、多个数据输出接口6132、信号驱动电路6133和多路选择电路6134。接插组件6131与接插组件6111具有相同引脚定义。信号驱动电路6133连接在接插组件6131和多个数据输出接口6132之间、且通过接插组件6131连接至接插组件6111的灯板存储器串行时钟信号引脚(SPI_CLK)、灯板存储器串行接 口片选信号引脚(SPI_CS)、灯板存储器存储数据输入引脚(SPI_MOSI)和移位寄存器时钟信号引脚(H164_CLK)。多路选择电路6134连接在接插组件6131和信号驱动电路6133之间、且通过接插组件6131连接至接插组件6111的灯板存储器存储数据输出引脚(SPI_MISO)、移位寄存器数据信号引脚(H164_CSD)及至少一个灯板存储器控制接口引脚(HUB_CODE)。多路选择电路6134连接信号驱动电路6133以传输灯板存储器存储数据输出信号(SPI_MISO)、移位寄存器数据信号(H164_CSD)。信号驱动电路6133例如包括型号为74HC245的信号驱动芯片,用于SPI接口信号、H164_CSD和H164_CLK信号的增强。多路选择电路6134例如包括型号为74HC4067的16选1模拟开关,可根据HUB_CODE信号使得16个通道中有1个通道被选通。The adapter board 613 is provided with a plug-in assembly 6131, a plurality of data output interfaces 6132, a signal driving circuit 6133, and a multiple selection circuit 6134. The connector assembly 6131 and the connector assembly 6111 have the same pin definitions. The signal driving circuit 6133 is connected between the plug-in component 6131 and the multiple data output interfaces 6132, and is connected to the light board memory serial clock signal pin (SPI_CLK) and the light board memory string of the plug-in component 6111 through the plug-in component 6131. Row interface chip selection signal pin (SPI_CS), light board memory storage data input pin (SPI_MOSI), and shift register clock signal pin (H164_CLK). The multiplexer circuit 6134 is connected between the plug-in component 6131 and the signal drive circuit 6133, and is connected to the light board memory storage data output pin (SPI_MISO) of the plug-in component 6111 through the plug-in component 6131, and the shift register data signal guide. Pin (H164_CSD) and at least one lamp board memory control interface pin (HUB_CODE). The multiplexer circuit 6134 is connected to the signal driving circuit 6133 to transmit the light board memory storage data output signal (SPI_MISO) and the shift register data signal (H164_CSD). The signal driving circuit 6133 includes, for example, a signal driving chip with a model number of 74HC245, which is used to enhance the SPI interface signal, H164_CSD and H164_CLK signals. The multiplexer circuit 6134 includes, for example, a 16-to-1 analog switch with a model number of 74HC4067, which can enable one of the 16 channels to be selected according to the HUB_CODE signal.
LED灯板65包括灯板输入接口651、非易失性存储器652、信号驱动电路653、移位寄存器654以及灯板输出接口655。信号驱动电路653连接在灯板输入接口651和非易失性存储器652之间。移位寄存器654连接灯板输入接口651和信号驱动电路653。信号驱动电路653还连接灯板输出接口655。具体地,如图8所示,信号驱动电路653例如包括第一电平供电驱动器例如5V供电驱动器6531、电阻分压电路6532以及第二电平供电驱动器例如3.3V供电驱动器6533。电阻分压电路6532连接在5V供电驱动器6531和3.3V供电驱动器6533之间。5V供电驱动器6531连接灯板输入接口655、移位寄存器654、灯板输出接口655。3.3V供电驱动器6533连接移位寄存器654和非易失性存储器652。5V供电驱动器6531例如是型号为74HC245的信号驱动芯片,用于SPI接口信号、H164_CSD和H164_CLK信号的增强。电阻分压电路6532将5V供电驱动器6531输出的5V的SPI接口信号进行电阻分压后输出3.3V的SPI接口信号至3.3V供电驱动器6533。3.3V供电驱动器6533例如也是型号为74HC245的信号驱动芯片,用于增强SPI接口信号。移位寄存器654的型号例如为74HC164。非易失性存储器652例如为FLASH存储器,可用于备份LED灯板65的数据例如校正系数、配置参数等。The LED light board 65 includes a light board input interface 651, a non-volatile memory 652, a signal driving circuit 653, a shift register 654, and a light board output interface 655. The signal driving circuit 653 is connected between the light panel input interface 651 and the non-volatile memory 652. The shift register 654 is connected to the light board input interface 651 and the signal driving circuit 653. The signal driving circuit 653 is also connected to the light board output interface 655. Specifically, as shown in FIG. 8, the signal driving circuit 653 includes, for example, a first-level power supply driver, such as a 5V power supply driver 6531, a resistor divider circuit 6532, and a second-level power supply driver, such as a 3.3V power supply driver 6533. The resistor divider circuit 6532 is connected between the 5V power supply driver 6531 and the 3.3V power supply driver 6533. The 5V power supply driver 6531 is connected to the light panel input interface 655, the shift register 654, and the light panel output interface 655. The 3.3V power supply driver 6533 is connected to the shift register 654 and the non-volatile memory 652. The 5V power supply driver 6531 is, for example, the model 74HC245 Signal driver chip, used for SPI interface signal, H164_CSD and H164_CLK signal enhancement. The resistance voltage divider circuit 6532 divides the 5V SPI interface signal output by the 5V power supply driver 6531 into resistance voltage and then outputs the 3.3V SPI interface signal to the 3.3V power supply driver 6533. The 3.3V power supply driver 6533 is also a signal driver chip with the model number 74HC245, for example , Used to enhance the SPI interface signal. The model of the shift register 654 is 74HC164, for example. The non-volatile memory 652 is, for example, a FLASH memory, which can be used to back up data of the LED light board 65 such as correction coefficients, configuration parameters, and the like.
LED灯板67连接LED灯板65的灯板输出接口655以形成级联。LED灯板67与LED灯板65通过传输SPI接口信号、H164_CSD和H164_CLK信号来实现LED灯板67的非易失性存储器中的数据读写。The LED light board 67 is connected to the light board output interface 655 of the LED light board 65 to form a cascade connection. The LED light board 67 and the LED light board 65 transmit SPI interface signals, H164_CSD and H164_CLK signals to implement data reading and writing in the non-volatile memory of the LED light board 67.
参见图9,其为本实施例提供的显示系统60的一个具体举例。灯板输入接口651通过排线连接转接板613的数据输出接口6132以传输SPI接口信号。接收卡611通过至少一个灯板存储器控制接口引脚(HUB_CODE)和多路选择电路6134选定要进行数据读写的LED灯板65,然后通过H164_CSD、H164_CLK信号和移位寄存器654向信号驱动电路653发送使能信号使信号驱动电路653传输SPI接口信号实现LED灯板65 的非易失性存储器652中的数据读写。具体地,灯板输入接口651例如通过排线连接转接板613的数据输出接口6132以传输SPI接口信号。5V供电驱动器6531从灯板输入接口651获得H164_CLK和SPI接口信号、并在增强后向电阻分压电路输出5V的SPI接口信号和向移位寄存器654输出增强后的H164_CLK信号。移位寄存器654从灯板输入接口651获得H164_CSD并结合从5V供电驱动器6531获得增强后的H164_CLK信号向3.3V供电驱动器6533提供使能信号。电阻分压电路6532可例如采用合适的电阻来将来自5V供电驱动器6531的5V的SPI接口信号转换成3.3V的SPI接口信号、并向3.3V供电驱动器6533提供3.3V的SPI接口信号。3.3V供电驱动器6533接收来自移位寄存器654的使能信号和来自电阻分压电路6532的3.3V的SPI接口信号对非易失性存储器652进行数据读写。Refer to FIG. 9, which is a specific example of the display system 60 provided in this embodiment. The light board input interface 651 is connected to the data output interface 6132 of the adapter board 613 through a flat cable to transmit SPI interface signals. The receiving card 611 selects the LED light board 65 for data reading and writing through at least one light board memory control interface pin (HUB_CODE) and the multiple selection circuit 6134, and then sends the signal to the signal drive circuit through H164_CSD, H164_CLK signals and shift register 654 653 sends an enable signal to make the signal driving circuit 653 transmit the SPI interface signal to realize the reading and writing of data in the non-volatile memory 652 of the LED light board 65. Specifically, the light board input interface 651 is connected to the data output interface 6132 of the adapter board 613 for transmitting SPI interface signals, for example, through a flat cable. The 5V power supply driver 6531 obtains the H164_CLK and SPI interface signals from the light board input interface 651, and after enhancement, outputs the 5V SPI interface signal to the resistor divider circuit and outputs the enhanced H164_CLK signal to the shift register 654. The shift register 654 obtains H164_CSD from the light panel input interface 651 and combines the enhanced H164_CLK signal obtained from the 5V power supply driver 6531 to provide an enable signal to the 3.3V power supply driver 6533. The resistor divider circuit 6532 may, for example, use a suitable resistor to convert the 5V SPI interface signal from the 5V power supply driver 6531 into a 3.3V SPI interface signal and provide the 3.3V power supply driver 6533 with the 3.3V SPI interface signal. The 3.3V power supply driver 6533 receives the enable signal from the shift register 654 and the 3.3V SPI interface signal from the resistor divider circuit 6532 to read and write data to the nonvolatile memory 652.
同时,移位寄存器654将经过移位后的H164_CSD信号提供给5V供电驱动器6531。5V供电驱动器6531还将从灯板输入接口651获得H164_CLK和SPI接口信号以及由移位寄存器654提供的经过移位后的H164_CSD信号增强后发送至灯板输出接口655以供级联的LED灯板67的非易失性存储器中的数据读写用。其读写过程与LED灯板65相同。也即,通过移位寄存器654的提供使能信号和H164_CSD、H164_CLK实现级联的LED灯板的非易失性存储器中的数据读取。At the same time, the shift register 654 provides the shifted H164_CSD signal to the 5V power supply driver 6531. The 5V power supply driver 6531 will also obtain the H164_CLK and SPI interface signals from the light panel input interface 651 and the shifted signals provided by the shift register 654 The latter H164_CSD signal is enhanced and sent to the light board output interface 655 for data reading and writing in the non-volatile memory of the cascaded LED light board 67. The reading and writing process is the same as that of the LED light board 65. That is, the data read in the non-volatile memory of the cascaded LED light board is realized by the enable signal provided by the shift register 654 and H164_CSD and H164_CLK.
如此可有序地完成LED灯板65和LED灯板67的校正系数和配置参数等数据备份,以避免接收卡611更换时造成的校正系数和LED灯板相关参数等数据的丢失。另外,当LED灯板更换后,接收卡611可以从更换后的LED灯板上的非易失性存储器中读取更换后LED灯板的校正系数和相关参数,而不需要重新通过配置工作对更换后的LED灯板进行配置,提高了LED灯板更换和配置效率,提升了产品品质和用户体验度。In this way, data backup of the correction coefficients and configuration parameters of the LED light board 65 and the LED light board 67 can be completed in an orderly manner, so as to avoid the loss of the correction coefficients and LED light board related parameters caused by the replacement of the receiving card 611. In addition, when the LED light board is replaced, the receiving card 611 can read the correction coefficients and related parameters of the replaced LED light board from the non-volatile memory on the replaced LED light board, without the need to reconfigure the working pair. Configuration of the replaced LED light board improves the efficiency of LED light board replacement and configuration, and improves product quality and user experience.
当多个数据输出接口6132上一一对应连接有需要进行数据读写的多个LED灯板65时,接收卡611可通过多路选择电路6134接收的至少一个灯板存储器控制接口引脚(HUB_CODE)信号依次选择需要进行数据读写的多个LED灯板65,然后通过向选定的LED灯板65的移位寄存器654提供H164_CSD和H164_CLK信号并通过SPI接口信号实现非易失性存储器652的数据读写操作。本实施例中的功能扩展引脚组可例如包括5个灯板存储器控制接口引脚(HUB_CODE0、HUB_CODE1、…、HUB_CODE4),因此可通过2 5共32个数据输出接口6132对连接至该32个数据输出接口6132上的LED灯板65及级联至LED灯板65的LED灯板67进行数据读写。 When multiple data output interfaces 6132 are connected to multiple LED light boards 65 that need to read and write data in a one-to-one correspondence, the receiving card 611 can receive at least one light board memory control interface pin (HUB_CODE) through the multiplexer circuit 6134. ) Signal sequentially selects multiple LED light boards 65 that need to read and write data, and then provide H164_CSD and H164_CLK signals to the shift register 654 of the selected LED light board 65 and realize the non-volatile memory 652 through the SPI interface signal Data read and write operations. The present embodiment may include a function expansion pin set, for example, five light board memory control interface pin (HUB_CODE0, HUB_CODE1, ..., HUB_CODE4 ), thus a total of 25 through the data output interface 32 is connected to the 6132 pairs 32 The LED light board 65 on the data output interface 6132 and the LED light board 67 cascaded to the LED light board 65 perform data reading and writing.
第六实施例Sixth embodiment
如图10所示,本申请第六实施例提供的一种显示系统70。本实施例的显示系统 70与第三实施例中的显示系统50大致相同,其不同之处在于,接收卡的接插组件的功能扩展引脚组定义了智能模组数据发送信号引脚(UART_TX)和智能模组数据接收信号引脚(UART_RX),LED灯板上还设置有微控制器(MCU),并在以与LED灯板上的MCU进行通信,以实现对LED灯板或模组的温度、电压、排线通信状态、灯点检测的监控。与前述第三实施例相同之处,则不再赘述。As shown in FIG. 10, a display system 70 provided by the sixth embodiment of the present application. The display system 70 in this embodiment is roughly the same as the display system 50 in the third embodiment. The difference is that the function expansion pin group of the plug-in component of the receiving card defines the data transmission signal pin (UART_TX) of the smart module. ) And the smart module data receiving signal pin (UART_RX), the LED light board is also provided with a microcontroller (MCU), and communicates with the MCU on the LED light board to realize the LED light board or module Monitoring of temperature, voltage, cable communication status, and lamp point detection. The similarities with the foregoing third embodiment will not be repeated.
具体地,如图10所示,显示系统70包括显示控制卡71和LED灯板75。LED灯板75连接显示控制卡71。显示控制卡71包括接收卡711和转接板713。接收卡711上设置有接插组件7111和连接接插组件7111的可编程逻辑器件7112。接插组件7111上的接插件JH1的功能扩展引脚组包括:智能模组数据发送信号引脚(UART_TX)、智能模组数据接收信号引脚(UART_RX)、以及至少一个灯板存储器控制接口引脚(HUB_CODE)。智能模组数据发送信号(UART_TX)和智能模组数据接收信号(UART_RX)统称为智能模组数据信号(UART)。智能模组数据发送信号引脚(UART_TX)和智能模组数据接收信号引脚(UART_RX)分别连接可编程逻辑器件7112。Specifically, as shown in FIG. 10, the display system 70 includes a display control card 71 and an LED light board 75. The LED light board 75 is connected to the display control card 71. The display control card 71 includes a receiving card 711 and a transfer board 713. The receiving card 711 is provided with a plug-in component 7111 and a programmable logic device 7112 connected to the plug-in component 7111. The function extension pin group of connector JH1 on the connector assembly 7111 includes: smart module data transmission signal pin (UART_TX), smart module data reception signal pin (UART_RX), and at least one lamp board memory control interface pin Feet (HUB_CODE). Smart module data transmission signal (UART_TX) and smart module data reception signal (UART_RX) are collectively referred to as smart module data signal (UART). The smart module data sending signal pin (UART_TX) and the smart module data receiving signal pin (UART_RX) are respectively connected to the programmable logic device 7112.
转接板713上设置接插组件7131、多个数据输出接口7132、信号驱动电路7133和多路选择电路7134。接插组件7131连接至接收卡711的接插组件7111。多路选择电路7133连接在接插组件7121和信号驱动电路7133之间。多个数据输出接口7132分别连接信号驱动电路7133。接插组件7131与接插组件7111具有相同引脚定义。信号驱动电路7133例如包括型号为74HC245的信号驱动芯片,用于增强智能模组数据信号(UART)。多路选择电路7134例如包括型号为74HC4052的模拟多路选择器和型号为74HC4051的模拟多路选择器。数据输出接口7132通过信号驱动电路7133、多路旋转电路7134、接插组件7131连接接插组件7111的智能模组数据发送信号引脚(UART_TX)和智能模组数据接收信号引脚(UART_RX)。The adapter board 713 is provided with a plug-in assembly 7131, a plurality of data output interfaces 7132, a signal driving circuit 7133, and a multiple selection circuit 7134. The connector assembly 7131 is connected to the connector assembly 7111 of the receiving card 711. The multiplexer circuit 7133 is connected between the connector assembly 7121 and the signal driving circuit 7133. The multiple data output interfaces 7132 are respectively connected to the signal driving circuit 7133. The plug-in component 7131 and the plug-in component 7111 have the same pin definitions. The signal driving circuit 7133 includes, for example, a signal driving chip with a model number of 74HC245, which is used to enhance the smart module data signal (UART). The multiplexer circuit 7134 includes, for example, an analog multiplexer with a model number of 74HC4052 and an analog multiplexer with a model number of 74HC4051. The data output interface 7132 is connected to the smart module data sending signal pin (UART_TX) and the smart module data receiving signal pin (UART_RX) of the plug assembly 7111 through the signal driving circuit 7133, the multiple rotation circuit 7134, and the plug assembly 7131.
如图10所示,LED灯板75包括灯板输入接口751、信号驱动电路752、微控制器753和非易失性存储器754。信号驱动电路752连接在灯板输入接口751和微控制器753之间。非易失性存储器754连接微控制器753。非易失性存储器754例如为FLASH存储器。LED灯板75自身的温度和电压等监控数据可以存储在非易失性存储器754上。此外,LED灯板75的校正系数和配置参数等数据也可以备份在非易失性存储器754上,可避免接收卡711更换时造成的校正系数和LED灯板相关参数等数据的丢失。另外,当LED灯板更换后,接收卡711可以从更换后的LED灯板上的非易失性存储器中读取更换后LED灯板的校正系数和相关参数,而不需要重新通过配屏工作对更换后的LED灯板进行配屏,提高了LED灯板更换和配置效率,提升了产品品质和用户体验度。As shown in FIG. 10, the LED light board 75 includes a light board input interface 751, a signal driving circuit 752, a microcontroller 753, and a non-volatile memory 754. The signal driving circuit 752 is connected between the light board input interface 751 and the microcontroller 753. The non-volatile memory 754 is connected to the microcontroller 753. The non-volatile memory 754 is, for example, a FLASH memory. The monitoring data such as the temperature and voltage of the LED light board 75 itself can be stored in the non-volatile memory 754. In addition, the correction coefficients and configuration parameters of the LED light board 75 can also be backed up on the non-volatile memory 754, which can avoid the loss of the correction coefficients and related parameters of the LED light board when the receiving card 711 is replaced. In addition, when the LED light board is replaced, the receiving card 711 can read the correction coefficient and related parameters of the replaced LED light board from the non-volatile memory on the replaced LED light board, without the need to work through the screen configuration again. The screen configuration of the replaced LED light board improves the efficiency of LED light board replacement and configuration, and improves product quality and user experience.
灯板输入接口751例如通过排线连接转接板713的数据输出接口7132以传输智能模组数据信号(UART)。信号驱动电路752例如包括型号为74HC245的信号驱动芯片,用于增强智能模组数据信号(UART)。微控制器753例如为MCU,其型号例如为STM32F030C8。微控制器753通过UART信号与接收卡711通信。The light board input interface 751 is connected to the data output interface 7132 of the adapter board 713 through a flat cable, for example, to transmit a smart module data signal (UART). The signal driving circuit 752 includes, for example, a signal driving chip with a model number of 74HC245, which is used to enhance the smart module data signal (UART). The microcontroller 753 is, for example, an MCU, and its model is, for example, STM32F030C8. The microcontroller 753 communicates with the receiving card 711 through the UART signal.
当多个数据输出接口7132上一一对应连接有需要进行通信的多个LED灯板75时,接收卡711可通过多路选择电路7134接收的至少一个灯板存储器控制接口引脚(HUB_CODE)信号依次选择需要进行数据读写的多个LED灯板75,然后通过智能模组数据发送信号引脚(UART_TX)和智能模组数据接收信号引脚(UART_RX)实现与多个LED灯板75的通信例。When multiple data output interfaces 7132 are connected to multiple LED light boards 75 that need to communicate in a one-to-one correspondence, the receiving card 711 can receive at least one light board memory control interface pin (HUB_CODE) signal through the multiplexer circuit 7134 Select multiple LED light boards 75 that need to read and write data in turn, and then communicate with multiple LED light boards 75 through the smart module data sending signal pin (UART_TX) and smart module data receiving signal pin (UART_RX) example.
进一步地,如图10b所示,LED灯板75还设置有电压温度采集电路755。电压温度采集电路155连接微控制器753向微控制器753输入采集到的电压、温度等信号。这样一来微控制器753就可以在无需其他外设的情况下监测LED灯板75的温度和电压。另外,接收卡711通过UART信号与微控制器753通信,这样一来接收卡711可以从微控制器753获取LED灯板75的电压、温度等的监控数据,了解LED灯板75的工作状态。进一步地,LED灯板75还包括LED驱动电路756。LED驱动电路756连接灯板输入接口751,用于通过灯板输入接口751从数据输出接口7132从接收卡711获取RGB数据和显示控制信号数据以点亮LED灯板,其可采用现有市售的LED驱动电路和芯片,此处不再赘述。微控制器753连接LED驱动电路756并从LED驱动电路756获取RGB数据,以实现LED坏点的检测。如此一来,带微控制器753的LED灯板可以减小监控单元的尺寸从而具有监控功能,因此,用户无需另外安装单独的监控卡,节省了LED空间。再者,LED灯板75可以还包括灯板输出接口757。灯板输出接口757连接信号驱动电路752和LED驱动电路756。灯板输出接口757用于级联下一级LED灯板以将显示数据(RGB)、显示控制信号(Ctrl)和UART信号传输给下一级LED灯板,以实现对下一级LED灯板的监控。Further, as shown in FIG. 10b, the LED light board 75 is also provided with a voltage and temperature collection circuit 755. The voltage and temperature acquisition circuit 155 is connected to the microcontroller 753 to input the collected signals such as voltage and temperature to the microcontroller 753. In this way, the microcontroller 753 can monitor the temperature and voltage of the LED light board 75 without other peripherals. In addition, the receiving card 711 communicates with the microcontroller 753 through the UART signal, so that the receiving card 711 can obtain the monitoring data of the voltage and temperature of the LED light board 75 from the microcontroller 753 to understand the working status of the LED light board 75. Furthermore, the LED light board 75 further includes an LED driving circuit 756. The LED driving circuit 756 is connected to the light board input interface 751, and is used to obtain RGB data and display control signal data from the receiving card 711 from the data output interface 7132 through the light board input interface 751 to light the LED light board. The LED drive circuit and chip of the LED, will not be repeated here. The microcontroller 753 is connected to the LED driving circuit 756 and obtains RGB data from the LED driving circuit 756 to realize the detection of the LED dead pixels. In this way, the LED light board with the microcontroller 753 can reduce the size of the monitoring unit to have a monitoring function. Therefore, the user does not need to install a separate monitoring card, saving LED space. Furthermore, the LED light board 75 may further include a light board output interface 757. The light board output interface 757 is connected to the signal driving circuit 752 and the LED driving circuit 756. The light board output interface 757 is used to cascade the next level of LED light boards to transmit display data (RGB), display control signals (Ctrl) and UART signals to the next level of LED light boards, so as to achieve the next level of LED light boards. Monitoring.
本实施例中的功能扩展引脚组可例如包括5个灯板存储器控制接口引脚(HUB_CODE0、HUB_CODE1、…、HUB_CODE4),因此可依次选通一一对应连接的2 5共32个LED灯板75进行数据读写。参见图11,其为本实施例提供的显示系统70的一个具体举例。 The present embodiment may include a function expansion pin set, for example, five light board memory control interface pins (HUB_CODE0, HUB_CODE1, ..., HUB_CODE4 ), thus the gate 25 can be successively a total of 32 one-connected LED lamp board 75 for data reading and writing. Refer to FIG. 11, which is a specific example of the display system 70 provided in this embodiment.
第七实施例Seventh embodiment
如图12所示,本申请第七实施例提供的一种显示系统80。本实施例的显示系统80与前述第三实施例中的显示系统50基本相同,其不同之处在于,接收卡的接插组件定义了电源检测信号引脚(POWER_STA1、POWER_STA2),两个电源分别通过转接 板上的接插组件连接电源检测信号引脚。同一转接板(HUB板)连接有两个电源(称主电源和备份电源),两个电源同时向显示控制卡和LED灯板供电。另外,接收卡通过电源检测信号引脚可获取出两个电源的工作状态。当其中一个电源发生故障时,可例如通过状态灯或者其它方式提醒用户进行相应的处理。与前述第三实施例相同之处,则不再赘述。As shown in FIG. 12, a display system 80 provided by the seventh embodiment of the present application. The display system 80 in this embodiment is basically the same as the display system 50 in the foregoing third embodiment. The difference is that the plug-in components of the receiving card define power detection signal pins (POWER_STA1, POWER_STA2), and the two power supplies are respectively Connect the power detection signal pin through the plug-in component on the transfer board. The same adapter board (HUB board) is connected with two power supplies (called main power supply and backup power supply), and the two power supplies supply power to the display control card and the LED light board at the same time. In addition, the receiving card can obtain the working status of the two power supplies through the power detection signal pins. When one of the power supplies fails, for example, a status light or other methods can be used to remind the user to take corresponding processing. The similarities with the foregoing third embodiment will not be repeated.
如图12所示,显示系统80包括显示控制卡81和LED灯板85。显示控制卡81包括接收卡811和转接板813。接收卡811可采用前述第二实施例中的接收卡。接收卡811上有接插组件8111和可编程逻辑器件8112。接插组件8111采用第一实施例中包括接插件JH1和JH2的接插组件。接插件JH1上的功能扩展引脚组包括多个电源检测信号引脚,例如两个电源检测信号引脚POWER_STA1、POWER_STA2,用于检测两个供电电源的状态。两个电源检测信号引脚分别连接可编程逻辑器件8112。转接板813上设置有与接插组件8111具有相同引脚定义的接插组件8131。转接板813还设置有连接LED灯板85的数据输出接口8132。优选地,在接插组件8131和数据输出接口8132之间还设置有信号驱动电路8133,以增强显示数据(RGB)和显示控制信号(Ctrl)。信号驱动电路8133例如包括型号为74HC245的信号驱动芯片。As shown in FIG. 12, the display system 80 includes a display control card 81 and an LED light board 85. The display control card 81 includes a receiving card 811 and a transfer board 813. The receiving card 811 may be the receiving card in the foregoing second embodiment. The receiving card 811 has a plug-in component 8111 and a programmable logic device 8112. The connector assembly 8111 adopts the connector assembly including connectors JH1 and JH2 in the first embodiment. The function expansion pin group on the connector JH1 includes multiple power detection signal pins, such as two power detection signal pins POWER_STA1 and POWER_STA2, which are used to detect the status of the two power supplies. The two power detection signal pins are connected to the programmable logic device 8112 respectively. The adapter board 813 is provided with a connector assembly 8131 having the same pin definition as the connector assembly 8111. The adapter board 813 is also provided with a data output interface 8132 connected to the LED light board 85. Preferably, a signal driving circuit 8133 is further provided between the plug-in component 8131 and the data output interface 8132 to enhance the display data (RGB) and the display control signal (Ctrl). The signal driving circuit 8133 includes, for example, a signal driving chip with a model number of 74HC245.
此外,显示系统80还可以包括多个电源,此处以两个电源即电源87和89为例予以说明。电源87和89分别连接转接板813以供电。此处的电源87和89可以为交流电源,也可以为直流电源。当电源87和89为交流电源时,转接板上设置有交流转直流电源电路,以将交流电源输入的交流电转换成需要的直流电;当电源为直流电源时,转接板上设置有直流转直流电源电路,以将直流电源输入的直流电转换成需要的直流电。In addition, the display system 80 may also include multiple power supplies. Here, two power supplies, namely power supplies 87 and 89, are taken as an example for description. The power supplies 87 and 89 are respectively connected to the adapter board 813 to supply power. The power supplies 87 and 89 here can be AC power supplies or DC power supplies. When the power sources 87 and 89 are AC power sources, an AC-to-DC power supply circuit is provided on the adapter board to convert the AC power input by the AC power source into the required DC power; when the power source is a DC power source, the adapter board is equipped with a DC-to- DC power supply circuit to convert the DC power input by the DC power supply into the required DC power.
除了给显示系统80供电外,电源87和89还分别通过接插组件8131、以及和接插组件8111上的两个电源检测信号引脚(POWER_STA1、POWER_STA2)连接至接收卡811的可编程逻辑器件8112,这样一来可以通过可编程逻辑器件8112来检测电源87和89的工作状态是否正常,甚至显示两个电源87和89的工作状态,使得用户可以很直观地获悉两个电源87和89的工作状态并根据实际情况进行相应处理。例如当电源87发生故障时,显示系统80则只由电源89供电,接收卡811的可编程逻辑器件8112通过电源检测信号引脚例如POWER_STA1获取电源87的故障状态后,甚至可例如通过状态灯的形式提醒用户电源87发生了故障,用户即可对电源87进行维修或更换,以确保显示系统80正常运行。此处值得一提的是,显示系统50包括多个电源时,只需要在接插组件8111上定义与多个电源一一对应的多个电源检测信号引脚,即可实现多个电源的工作状态检测。In addition to supplying power to the display system 80, the power supplies 87 and 89 are respectively connected to the programmable logic device of the receiving card 811 through the plug-in component 8131 and the two power detection signal pins (POWER_STA1, POWER_STA2) on the plug-in component 8111. 8112, in this way, the programmable logic device 8112 can be used to detect whether the working status of the power supplies 87 and 89 is normal, and even display the working status of the two power supplies 87 and 89, so that the user can intuitively learn the status of the two power supplies 87 and 89 Work status and deal with it according to the actual situation. For example, when the power supply 87 fails, the display system 80 is only powered by the power supply 89. After the programmable logic device 8112 of the receiving card 811 obtains the fault status of the power supply 87 through the power detection signal pin, such as POWER_STA1, it can even use the status light The form reminds the user that the power supply 87 is faulty, and the user can repair or replace the power supply 87 to ensure the normal operation of the display system 80. It is worth mentioning here that when the display system 50 includes multiple power supplies, only multiple power supply detection signal pins corresponding to the multiple power supplies need to be defined on the plug-in component 8111 to realize the operation of multiple power supplies. Status detection.
第八实施例Eighth embodiment
如图13所示,本申请第八实施例提供的一种显示系统90。本实施例的显示系统90的架构与前述第三实施例的基本相同,其不同之处在于,同一转接板(HUB板)通过两个接插组件一一对应连接两个接收卡,两个接收卡同时接收图像数据并对图像数据进行相同的处理,但是在同一时刻仅有一个接收卡向LED灯板输出显示数据(RGB)和显示控制信号(Ctrl)。而两个接收卡通过两个接插组件的引脚相连以进行定时通信以相互确认各自的工作状态是否正常。当其中一个接收卡发送故障无法正常工作时,另一个接收卡立即响应并输出显示数据(RGB)和显示控制信号数据(Ctrl)至LED灯板,以确保LED灯板正常显示。另外与前述第三实施例相同之处,则不再赘述。As shown in FIG. 13, a display system 90 provided by the eighth embodiment of the present application. The architecture of the display system 90 of this embodiment is basically the same as that of the foregoing third embodiment. The difference is that the same adapter board (HUB board) is connected to two receiving cards one by one through two plug-in components. The receiving card simultaneously receives the image data and performs the same processing on the image data, but at the same time, only one receiving card outputs display data (RGB) and display control signals (Ctrl) to the LED light board. The two receiving cards are connected through the pins of the two plug-in components for timing communication to mutually confirm whether their respective working states are normal. When one of the receiving cards fails to work normally, the other receiving card immediately responds and outputs display data (RGB) and display control signal data (Ctrl) to the LED light board to ensure the normal display of the LED light board. In addition, the similarities with the foregoing third embodiment will not be repeated.
具体地,如图15所示,显示系统90包括显示控制卡91和LED灯板95。显示控制卡91包括接收卡911、接收卡915和转接板913。接收卡911、接收卡915分别连接在转接板913上。Specifically, as shown in FIG. 15, the display system 90 includes a display control card 91 and an LED light board 95. The display control card 91 includes a receiving card 911, a receiving card 915, and a transfer board 913. The receiving card 911 and the receiving card 915 are connected to the adapter board 913 respectively.
接收卡911例如均采用第二实施例中的接收卡,其包括接插组件9111和连接接插组件9111的可编程逻辑器件9113。接收卡915可以是与接收卡911相同的接收卡、且包括接插组件9151和连接接插组件9151的可编程逻辑器件9153。当然,接收卡915也可以是与接收卡911不同、但具有接收卡功能或者图像数据处理功能的电路板卡。For example, the receiving card 911 adopts the receiving card in the second embodiment, which includes a plug-in component 9111 and a programmable logic device 9113 connected to the plug-in component 9111. The receiving card 915 may be the same receiving card as the receiving card 911 and includes a plug-in component 9151 and a programmable logic device 9153 connecting the plug-in component 9151. Of course, the receiving card 915 may also be a circuit board card that is different from the receiving card 911 but has a receiving card function or an image data processing function.
转接板913例如包括接插组件9131和9132、以太网接口9134和9135、网络变压器9136和9137。接插组件9131和9132例如分别为与接插组件9111和接插组件9151具有相同引脚定义的接插组件。接插组件9131连接接插组件9111,接插组件9132连接接插组件9151。网络变压器9136连接在以太网接口9134和接插组件9131之间,网络变压器9137连接在接插组件9132和以太网接口9135之间。以太网接口9134和9135例如均为RJ45网口。这样一来,接收卡911和915分别通过以太网接口9134和以太网接口9135连接相同的图像数据源以获得相同的图像输入数据。接收卡911和915分别通过转接板913连接LED灯板95以进行画面显示。The adapter board 913 includes, for example, plug-in components 9131 and 9132, Ethernet interfaces 9134 and 9135, and network transformers 9136 and 9137. The plug-in components 9131 and 9132 are, for example, plug-in components having the same pin definition as the plug-in component 9111 and the plug-in component 9151, respectively. The plug assembly 9131 is connected to the plug assembly 9111, and the plug assembly 9132 is connected to the plug assembly 9151. The network transformer 9136 is connected between the Ethernet interface 9134 and the connector 9131, and the network transformer 9137 is connected between the connector 9132 and the Ethernet interface 9135. The Ethernet interfaces 9134 and 9135 are, for example, RJ45 network ports. In this way, the receiving cards 911 and 915 are respectively connected to the same image data source through the Ethernet interface 9134 and the Ethernet interface 9135 to obtain the same image input data. The receiving cards 911 and 915 are respectively connected to the LED light board 95 through the adapter board 913 for image display.
另外,接插组件9111和接插组件9151的功能扩展引脚组分别包括双卡连接信号引脚(MS_DATA)、双卡身份标识信号引脚(MS_ID)。接插组件9111的双卡连接信号引脚(MS_DATA)、双卡身份标识信号引脚(MS_ID)分别连接接收卡911的可编程逻辑器件9113。接插组件9151的双卡连接信号引脚(MS_DATA)、双卡身份标识信号引脚(MS_ID)分别连接接收卡915的可编程逻辑器件9153。In addition, the function expansion pin groups of the plug-in component 9111 and the plug-in component 9151 respectively include a dual-card connection signal pin (MS_DATA) and a dual-card identification signal pin (MS_ID). The dual-card connection signal pin (MS_DATA) and the dual-card identification signal pin (MS_ID) of the plug-in assembly 9111 are respectively connected to the programmable logic device 9113 of the receiving card 911. The dual card connection signal pin (MS_DATA) and dual card identification signal pin (MS_ID) of the plug-in assembly 9151 are respectively connected to the programmable logic device 9153 of the receiving card 915.
接收卡911(也称主卡)上的接插组件9111的双卡身份标识信号引脚(MS_ID)通过转接板913上的接插组件9131连接外部高电平VCC,其中,VCC例如为3.3V的电平。接收卡915(也称从卡)上的接插组件9151的双卡身份标识信号引脚(MS_ID)通过转接 板913上的接插组件9132接地。接收卡911上的接插组件9111的双卡连接信号引脚(MS_DATA)通过转接板913上的接插组件9131、接插组件9132连接接收卡915的接插组件9151的双卡连接信号引脚(MS_DATA),以供主卡和从卡之间的通信。The dual-card identification signal pin (MS_ID) of the plug-in component 9111 on the receiving card 911 (also called the main card) is connected to the external high-level VCC through the plug-in component 9131 on the adapter board 913, where VCC is, for example, 3.3 The level of V. The dual-card identification signal pin (MS_ID) of the plug assembly 9151 on the receiving card 915 (also called the slave card) is grounded through the plug assembly 9132 on the adapter board 913. The dual card connection signal pin (MS_DATA) of the plug assembly 9111 on the receiving card 911 is connected to the dual card connection signal pin of the plug assembly 9151 of the receiving card 915 through the plug assembly 9131 on the adapter board 913. Pin (MS_DATA) for communication between the master card and the slave card.
正常工作时,接收卡911和915同时接收图像数据源并对图像输入数据进行相同的数据处理。同时,接收卡911和915通过双卡连接信号引脚(MS_DATA)进行通信例如定期发送状态信号以确认相互的工作状态是否正常,工作状态例如包括接收卡的图像数据输入是否正常、接收卡的图像数据输出是否正常等。当工作正常时,只有其中一个接收卡向LED灯板95输出显示数据(RGB)和显示控制信号(Ctrl)。典型地为接收卡911(主卡)向LED灯板95输出显示数据(RGB)和显示控制信号(Ctrl)。若接收卡911(主卡)发生故障,接收卡915(从卡)通过双卡连接信号引脚(MS_DATA)获悉接收卡911(主卡)的故障状态或者在预定时间内例如10毫秒未能收到接收卡911(主卡)的回应,接收卡915(从卡)会即时接替接收卡911(主卡)的工作,向LED灯板95输出显示数据(RGB)和显示控制信号(Ctrl),以确保LED灯板95正常工作。如此一来,在高可靠性应用环境中,这种单个转接板(HUB板)同时连接两个接收卡且通过扩展定义接插组件的功能扩展引脚,使得两个接收卡可以进行身份确认和定时通信以获得两者的工作状态,当其中一个接收卡发生故障时,另一个接收卡立即接替故障接收卡进行数据输出以确保LED灯板正常工作,提升了产品可靠性。In normal operation, the receiving cards 911 and 915 simultaneously receive the image data source and perform the same data processing on the image input data. At the same time, the receiving cards 911 and 915 communicate through the dual-card connection signal pins (MS_DATA), for example, periodically sending status signals to confirm whether the mutual working status is normal. The working status includes, for example, whether the image data input of the receiving card is normal and the image of the receiving card is normal. Is the data output normal? When working normally, only one of the receiving cards outputs display data (RGB) and display control signals (Ctrl) to the LED light board 95. Typically, the receiving card 911 (main card) outputs display data (RGB) and display control signals (Ctrl) to the LED light board 95. If the receiving card 911 (master card) fails, the receiving card 915 (slave card) learns the failure status of the receiving card 911 (master card) through the dual-card connection signal pin (MS_DATA) or fails to receive the card within a predetermined time, for example, 10 milliseconds. When the receiving card 911 (master card) responds, the receiving card 915 (slave card) will immediately take over the work of the receiving card 911 (master card) and output display data (RGB) and display control signals (Ctrl) to the LED light board 95, To ensure that the LED light board 95 works normally. As a result, in a high-reliability application environment, this single adapter board (HUB board) connects two receiving cards at the same time and expands the function extension pins of the defined plug-in components, so that the two receiving cards can be identified It communicates with timing to obtain the working status of the two. When one of the receiving cards fails, the other receiving card immediately takes over the failed receiving card to output data to ensure the normal operation of the LED light board, which improves product reliability.
进一步地,如图15所示,转接板913上还设置有测试按键9133。测试按键9133连接接收卡911和接收卡915。具体地,测试按键9133通过接插组件9111的测试按键输入信号引脚(TEST_INPUT_KEY)连接接收卡911,测试按键9133通过接插组件9151的测试按键输入信号引脚连接接收卡915,以实现接收卡911和接收卡915的同时测试。Further, as shown in FIG. 15, a test button 9133 is also provided on the adapter board 913. The test button 9133 connects the receiving card 911 and the receiving card 915. Specifically, the test button 9133 is connected to the receiving card 911 through the test key input signal pin (TEST_INPUT_KEY) of the plug-in component 9111, and the test button 9133 is connected to the receiving card 915 through the test key input signal pin of the plug-in component 9151 to realize the receiving card Simultaneous testing of 911 and receiving card 915.
更进一步地,转接板913上还设置有状态灯接口例如两个状态灯接口(图15中未示出),两个状态灯接口分别通过接插组件9131和9132连接接插组件9111和接插组件9151的状态灯信号引脚(STA_LED-)。两个状态灯接口用于分别连接两个状态灯以接收卡911和接收卡915的工作状态。这样一来用户就可以更直观地、直接地获悉并监控接收卡911和接收卡915的工作状态。Furthermore, the adapter board 913 is also provided with status light interfaces, such as two status light interfaces (not shown in FIG. 15). The two status light interfaces are connected to the connector assembly 9111 and the connector via the connector assemblies 9131 and 9132, respectively. The status light signal pin (STA_LED-) of the plug-in component 9151. The two status light interfaces are used to respectively connect two status lights to receive the working status of the card 911 and the card 915. In this way, the user can learn and monitor the working status of the receiving card 911 and the receiving card 915 more intuitively and directly.
此外,可以理解的是,前述各个实施例仅为本申请的示例性说明,在技术特征不冲突、结构不矛盾、不违背本申请的发明目的前提下,各个实施例的技术方案可以任意组合、搭配使用。In addition, it can be understood that the foregoing embodiments are only exemplary descriptions of the present application, and the technical solutions of the various embodiments can be combined arbitrarily, provided that the technical features do not conflict, the structure does not contradict, and does not violate the purpose of the invention of the present application. For use with.
在本申请所提供的几个实施例中,应该理解到,所揭露的系统,装置和方法,可以通过其它的方式实现。例如,以上所描述的装置实施例仅仅是示意性的,例如, 所述单元的划分,仅仅为一种逻辑功能划分,实际实现时可以有另外的划分方式,例如多路单元或组件可以结合或者可以集成到另一个系统,或一些特征可以忽略,或不执行。另一点,所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口,装置或单元的间接耦合或通信连接,可以是电性,机械或其它的形式。In the several embodiments provided in this application, it should be understood that the disclosed system, device, and method may be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the units is only a logical function division, and there may be other divisions in actual implementation, for example, multiple units or components can be combined or It can be integrated into another system, or some features can be ignored or not implemented. In addition, the displayed or discussed mutual coupling or direct coupling or communication connection may be indirect coupling or communication connection through some interfaces, devices or units, and may be in electrical, mechanical or other forms.
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的,作为单元显示的部件可以是或者也可以不是物理单元,即可以位于一个地方,或者也可以分布到多路网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。The units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the objectives of the solutions of the embodiments.
另外,在本申请各个实施例中的各功能单元可以集成在一个处理单元中,也可以是各个单元单独物理存在,也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现,也可以采用硬件加软件功能单元的形式实现。In addition, the functional units in each embodiment of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware, or may be implemented in the form of hardware plus software functional units.
上述以软件功能单元的形式实现的集成的单元,可以存储在一个计算机可读取存储介质中。上述软件功能单元存储在一个存储介质中,包括若干指令用以使得一台计算机设备(可以是个人计算机,服务器,或者网络设备等)执行本申请各个实施例所述方法的部分步骤。而前述的存储介质包括:U盘、移动硬盘、只读存储器(Read-Only Memory,简称ROM)、随机存取存储器(Random Access Memory,简称RAM)、磁碟或者光盘等各种可以存储程序代码的介质。The above-mentioned integrated unit implemented in the form of a software functional unit may be stored in a computer readable storage medium. The above-mentioned software functional unit is stored in a storage medium and includes several instructions to make a computer device (which may be a personal computer, a server, or a network device, etc.) execute some steps of the method described in each embodiment of the present application. The aforementioned storage media include: U disk, mobile hard disk, read-only memory (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), magnetic disks or optical disks, etc., which can store program codes Medium.
最后应说明的是:以上实施例仅用以说明本申请的技术方案,而非对其限制;尽管参照前述实施例对本申请进行了详细的说明,本领域的普通技术人员应当理解:其依然可以对前述各实施例所记载的技术方案进行修改,或者对其中部分技术特征进行等同替换;而这些修改或者替换,并不使相应技术方案的本质脱离本申请各实施例技术方案的精神和范围。Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the application, not to limit them; although the application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: The technical solutions recorded in the foregoing embodiments are modified, or some of the technical features are equivalently replaced; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims (15)

  1. 一种接插组件,其特征在于,包括成对设置的第一接插件和第二接插件,所述第一接插件包括电源引脚组、功能扩展引脚组以及多个第一数据输出引脚群,所述功能扩展引脚组在所述第一接插件长度方向上位于所述多个第一数据输出引脚群和所述电源引脚组之间;所述第二接插件包括显示控制信号输出引脚组、多路以太网接口引脚组、以及多个第二数据输出引脚群,所述显示控制信号输出引脚组在所述第二接插件长度方向上位于所述多个第二数据输出引脚群和所述多路以太网接口引脚组之间;A connector assembly, characterized in that it comprises a first connector and a second connector arranged in pairs, the first connector comprising a power pin group, a function expansion pin group and a plurality of first data output leads Pin group, the function expansion pin group is located between the plurality of first data output pin groups and the power pin group in the length direction of the first connector; the second connector includes a display A control signal output pin group, a multi-channel Ethernet interface pin group, and a plurality of second data output pin groups, the display control signal output pin group is located in the multiple in the length direction of the second connector Between the second data output pin group and the multiple Ethernet interface pin group;
    相邻两个所述第一数据输出引脚群之间设置有接地引脚对,相邻两个所述第二数据输出引脚群之间设置有接地引脚对;每一个所述第一数据输出引脚群包括M组数据输出引脚;每一个所述第二数据输出引脚群包括N组数据输出引脚,其中M和N分别为正偶数且M大于N。A pair of ground pins is provided between two adjacent first data output pin groups, and a pair of ground pins is provided between two adjacent second data output pin groups; each of the first The data output pin group includes M groups of data output pins; each of the second data output pin groups includes N groups of data output pins, where M and N are respectively positive and even numbers and M is greater than N.
  2. 如权利要求1所述的接插组件,其特征在于,所述多路以太网接口引脚组在所述第二接插件的两侧连续排布,所述多路以太网接口引脚组与所述显示控制信号输出引脚组之间设置有接地引脚对。The connector assembly of claim 1, wherein the multiple Ethernet interface pin groups are continuously arranged on both sides of the second connector, and the multiple Ethernet interface pin groups are A pair of grounding pins is arranged between the display control signal output pin groups.
  3. 如权利要求2所述的接插组件,其特征在于,所述功能扩展引脚组与所述多个第一数据输出引脚群之间设置有接地引脚对,所述功能扩展引脚组与所述电源引脚组之间设置有空接引脚。The connector assembly of claim 2, wherein a pair of ground pins is provided between the function expansion pin group and the plurality of first data output pin groups, and the function expansion pin group A free connection pin is arranged between the power pin group and the power pin group.
  4. 如权利要求3所述的接插组件,其特征在于,The connector assembly of claim 3, wherein:
    所述第一接插件包括八十四个引脚且在所述第一接插件的长度方向上依次为:两个接地引脚、十八个数据输出引脚、两个接地引脚、十八个数据输出引脚、两个接地引脚、十八个数据输出引脚、两个接地引脚、十六个功能扩展引脚、两个空接引脚、四个电源引脚;The first connector includes eighty-four pins and in the length direction of the first connector, they are: two ground pins, eighteen data output pins, two ground pins, eighteen pins. Two data output pins, two ground pins, eighteen data output pins, two ground pins, sixteen function extension pins, two empty connection pins, and four power supply pins;
    所述第二接插件包括八十四个引脚且在所述第二接插件的长度方向上依次为:两个接地引脚、十六个以太网接口引脚、两个接地引脚、一个测试按键输入信号引脚、一个状态灯信号引脚、两个接地引脚、十个显示控制信号输出引脚、两个接地引脚、十二个数据输出引脚、两个接地引脚、十二个数据输出引脚、两个接地引脚、十二个数据输出引脚、两个接地引脚、以及六个数据输出引脚。The second connector includes eighty-four pins, and in the length direction of the second connector, they are: two ground pins, sixteen Ethernet interface pins, two ground pins, one Test button input signal pin, one status light signal pin, two ground pins, ten display control signal output pins, two ground pins, twelve data output pins, two ground pins, ten Two data output pins, two ground pins, twelve data output pins, two ground pins, and six data output pins.
  5. 如权利要求4所述的接插组件,其特征在于,所述功能扩展引脚组包括五个灯板存储器控制接口引脚、一个灯板存储器串行时钟信号引脚、一个灯板存储器串行接口片选信号引脚、一个移位寄存器数据信号引脚、一个移位寄存器时钟信号引脚、一个灯板存储器存储数据输入引脚或一个智能模组数据发送信号引脚、一个灯板存储器 存储数据输出引脚或一个智能模组数据接收信号引脚、一个双卡连接信号引脚、一个双卡身份标识信号引脚、以及两个电源检测信号引脚。The plug-in assembly according to claim 4, wherein the function expansion pin group includes five lamp board memory control interface pins, one lamp board memory serial clock signal pin, and one lamp board memory serial Interface chip select signal pin, a shift register data signal pin, a shift register clock signal pin, a light board memory storage data input pin or a smart module data sending signal pin, a light board memory storage Data output pin or a smart module data receiving signal pin, a dual-card connection signal pin, a dual-card identity identification signal pin, and two power detection signal pins.
  6. 一种显示控制卡,其特征在于,包括:电路板、可编程逻辑器件、微控制器、以太网物理层收发器以及第一接插组件;所述第一接插组件为如权利要求1-5任意一项所述的接插组件;所述可编程逻辑器件、所述微控制器、所述以太网物理层收发器以及所述第一接插组件设置在所述电路板上;所述微控制器连接所述可编程逻辑器件和所述第一接插件的所述电源引脚组,所述以太网物理层收发器连接在所述可编程逻辑器件和所述第一接插组件的所述第二接插件的所述多路以太网接口引脚组之间,所述可编程逻辑器件连接所述第一接插组件的所述第一接插件的所述电源引脚组、所述功能扩展引脚组以及所述多个第一数据输出引脚群和所述第一接插组件的所述第二接插件的所述多个第二数据输出引脚群和所述显示控制信号输出引脚组。A display control card, which is characterized by comprising: a circuit board, a programmable logic device, a microcontroller, an Ethernet physical layer transceiver, and a first plug-in component; the first plug-in component is as claimed in claim 1- 5 any one of the plug-in components; the programmable logic device, the microcontroller, the Ethernet physical layer transceiver, and the first plug-in components are arranged on the circuit board; the A microcontroller is connected to the programmable logic device and the power pin group of the first connector, and the Ethernet physical layer transceiver is connected to the programmable logic device and the first connector assembly Between the multiple Ethernet interface pin groups of the second connector, the programmable logic device is connected to the power pin group and the power pin group of the first connector of the first connector assembly. The function expansion pin group and the plurality of first data output pin groups and the plurality of second data output pin groups of the second connector of the first connector assembly and the display control Signal output pin group.
  7. 如权利要求6所述的显示控制卡,其特征在于,所述显示控制卡还包括转接板,所述转接板上设置有与所述接插组件具有相同引脚定义的第二接插组件,所述转接板通过所述第二接插组件连接所述第一接插组件;所述转接板上还设置有网络变压器和连接所述网络变压器的以太网接口,所述以太网接口通过所述网络变压器、所述第二接插组件连接所述第一接插组件的所述多路以太网接口引脚组。The display control card according to claim 6, wherein the display control card further comprises an adapter board, and the adapter board is provided with a second connector with the same pin definition as the connector assembly. The adapter board is connected to the first plug-in component through the second plug-in component; the adapter board is also provided with a network transformer and an Ethernet interface connected to the network transformer, the Ethernet The interface is connected to the multiple Ethernet interface pin group of the first plug-in assembly through the network transformer and the second plug-in assembly.
  8. 一种显示系统,其特征在于,包括:如权利要求7所述的显示控制卡和LED灯板;所述显示控制卡的所述转接板上设置有数据输出接口,所述数据输出接口连接所述第二接插组件,所述数据输出接口通过所述第二接插组件连接所述第一接插组件的所述多个第一数据输出引脚群、所述第二接插件的所述多个第二数据输出引脚群以及所述显示控制信号输出引脚组;所述LED灯板上设置有灯板输入接口,所述LED灯板通过所述灯板输入接口连接所述数据输出接口。A display system, comprising: a display control card and an LED light board as claimed in claim 7; the adapter board of the display control card is provided with a data output interface, and the data output interface is connected The second connector assembly, the data output interface is connected to the plurality of first data output pin groups of the first connector assembly, and all of the second connector via the second connector assembly The plurality of second data output pin groups and the display control signal output pin group; the LED light board is provided with a light board input interface, and the LED light board is connected to the data through the light board input interface Output Interface.
  9. 如权利要求8所述的显示系统,其特征在于,所述功能扩展引脚组包括灯板存储器串行时钟信号引脚、灯板存储器串行接口片选信号引脚、灯板存储器存储数据输入引脚、灯板存储器存储数据输出引脚以及至少一个灯板存储器控制接口引脚,所述灯板存储器串行时钟信号引脚、所述灯板存储器串行接口片选信号引脚、所述灯板存储器存储数据输入引脚、所述灯板存储器存储数据输出引脚和所述至少一个灯板存储器控制接口引脚分别连接所述可编程逻辑器件;The display system according to claim 8, wherein the function expansion pin group includes lamp panel memory serial clock signal pins, lamp panel memory serial interface chip select signal pins, and lamp panel memory storage data input Pin, light board memory storage data output pin, and at least one light board memory control interface pin, the light board memory serial clock signal pin, the light board memory serial interface chip select signal pin, the The light board memory storage data input pin, the light board memory storage data output pin, and the at least one light board memory control interface pin are respectively connected to the programmable logic device;
    所述转接板上设置有第一信号驱动电路和第一多路选择电路,所述第一信号驱动电路连接在所述第二接插组件和所述数据输出接口之间、且通过所述第二接插组件连接至所述第一接插组件的所述灯板存储器串行时钟信号引脚、所述灯板存储器存储数据输入引脚;所述第一多路选择电路连接在所述第一信号驱动电路和所述第二接插组 件之间、且通过所述第二接插组件连接至所述第一接插组件的所述灯板存储器串行接口片选信号引脚、所述灯板存储器存储数据输出引脚、以及所述至少一个灯板存储器控制接口引脚;A first signal driving circuit and a first multiple selection circuit are provided on the adapter board, and the first signal driving circuit is connected between the second plug-in assembly and the data output interface and passes through the The second plug-in component is connected to the serial clock signal pin of the light board memory and the data input pin of the light board memory of the first plug-in component; the first multiple selection circuit is connected to the Between the first signal driving circuit and the second connector assembly and connected to the first connector assembly through the second connector assembly, the chip select signal pin and the serial interface of the lamp board memory The light board memory storage data output pin, and the at least one light board memory control interface pin;
    所述LED灯板包括非易失性存储器和第二信号驱动电路,所述第二信号驱动电路连接在所述非易失性存储器和所述灯板输入接口之间,所述灯板输入接口连接所述数据输出接口。The LED light board includes a non-volatile memory and a second signal drive circuit, the second signal drive circuit is connected between the non-volatile memory and the light board input interface, the light board input interface Connect the data output interface.
  10. 如权利要求8所述的显示系统,其特征在于,所述功能扩展引脚组包括灯板存储器串行时钟信号引脚、灯板存储器串行接口片选信号引脚、灯板存储器存储数据输入引脚、灯板存储器存储数据输出引脚、移位寄存器数据信号引脚、移位寄存器时钟信号引脚以及至少一个灯板存储器控制接口引脚,所述灯板存储器串行时钟信号引脚、所述灯板存储器串行接口片选信号引脚、所述灯板存储器存储数据输入引脚、所述灯板存储器存储数据输出引脚、所述移位寄存器数据信号引脚、所述移位寄存器时钟信号引脚以及所述至少一个灯板存储器控制接口引脚分别连接所述可编程逻辑器件;The display system according to claim 8, wherein the function expansion pin group includes lamp panel memory serial clock signal pins, lamp panel memory serial interface chip select signal pins, and lamp panel memory storage data input Pin, light board memory storage data output pin, shift register data signal pin, shift register clock signal pin, and at least one light board memory control interface pin, the light board memory serial clock signal pin, The light board memory serial interface chip select signal pin, the light board memory storage data input pin, the light board memory storage data output pin, the shift register data signal pin, the shift The register clock signal pin and the at least one lamp board memory control interface pin are respectively connected to the programmable logic device;
    所述转接板上设置有第三信号驱动电路和第二多路选择电路,所述第三信号驱动电路连接在所述第二接插组件和所述数据输出接口之间、且通过所述第二接插组件连接至所述第一接插组件的所述灯板存储器串行时钟信号引脚、所述灯板存储器串行接口片选信号引脚、所述灯板存储器存储数据输入引脚、所述移位寄存器时钟信号引脚;所述第二多路选择电路连接在所述第三信号驱动电路和所述第二接插组件之间、且通过所述第二接插组件连接至所述第一接插组件的所述灯板存储器存储数据输出引脚、所述移位寄存器数据信号引脚以及所述至少一个灯板存储器控制接口引脚;A third signal drive circuit and a second multiple selection circuit are provided on the adapter board, and the third signal drive circuit is connected between the second plug-in assembly and the data output interface and passes through the The second connector assembly is connected to the lamp panel memory serial clock signal pin, the lamp panel memory serial interface chip select signal pin, and the lamp panel memory storage data input pin of the first connector assembly. Pin, the clock signal pin of the shift register; the second multiplexer circuit is connected between the third signal drive circuit and the second connector assembly, and is connected through the second connector assembly The light board memory storage data output pin, the shift register data signal pin and the at least one light board memory control interface pin to the first plug-in assembly;
    所述LED灯板包括第四信号驱动电路、移位寄存器、第二非易失性存储器和灯板输出接口,所述第四信号驱动电路连接所述灯板输入接口、所述第二非易失性存储器、所述移位寄存器以及所述灯板输出接口,所述移位寄存器连接连接所述灯板输入接口;The LED light board includes a fourth signal drive circuit, a shift register, a second non-volatile memory, and a light board output interface. The fourth signal drive circuit is connected to the light board input interface and the second non-volatile memory. A lossy memory, the shift register, and the light board output interface, where the shift register is connected to the light board input interface;
    所述显示系统还包括第二LED灯板,所述第二LED灯板包括第二灯板输入接口、第五信号驱动电路、第二移位寄存器、第三非易失性存储器,所述第五信号驱动电路连接所述第二灯板输入接口、所述第三非易失性存储器、所述第二移位寄存器,所述第二移位寄存器连接所述第二灯板输入接口,所述第二灯板输入接口连接所述LED灯板的所述灯板输出接口。The display system also includes a second LED light board, which includes a second light board input interface, a fifth signal drive circuit, a second shift register, and a third nonvolatile memory. The five-signal driving circuit is connected to the second light board input interface, the third nonvolatile memory, and the second shift register, and the second shift register is connected to the second light board input interface, so The second light board input interface is connected to the light board output interface of the LED light board.
  11. 如权利要求10所述的显示系统,其特征在于,所述第四信号驱动电路包括第一电平供电驱动器、电阻分压电路和第二电平供电驱动器,所述电阻分压电路位于所述第一电平供电驱动器和所述第二电平驱动器之间,所述移位寄存器连接所述第一电平供电驱动器和所述第二电平供电驱动器,所述第一电平供电驱动电路连接所述灯板 输入接口、所述移位寄存器、所述灯板输出接口,所述第二电平供电驱动器连接所述移位寄存器和所述第二非易失性存储器。The display system of claim 10, wherein the fourth signal driving circuit comprises a first level power supply driver, a resistance voltage divider circuit, and a second level power supply driver, and the resistance voltage divider circuit is located in the Between the first level power supply driver and the second level driver, the shift register is connected to the first level power supply driver and the second level power supply driver, and the first level power supply drive circuit The light board input interface, the shift register, and the light board output interface are connected, and the second-level power supply driver is connected to the shift register and the second non-volatile memory.
  12. 如权利要求8所述的显示系统,其特征在于,所述功能扩展引脚组包括智能模组数据发送信号引脚、智能模组数据接收信号引脚和至少一个灯板存储器控制接口引脚;所述智能模组数据发送信号引脚、所述智能模组数据接收信号引脚和所述至少一个灯板存储器控制接口引脚分别连接所述可编程逻辑器件;8. The display system according to claim 8, wherein the function expansion pin group includes a smart module data sending signal pin, a smart module data receiving signal pin, and at least one light board memory control interface pin; The smart module data sending signal pin, the smart module data receiving signal pin, and the at least one light board memory control interface pin are respectively connected to the programmable logic device;
    所述转接板上设置有第六信号驱动电路和第三多路选择电路,所述第三多路选择电路连接在所述第六信号驱动电路和所述第二接插组件之间、且通过所述第二接插组件连接所述第一接插组件的所述至少一个灯板存储器控制接口引脚和所述智能模组数据发送信号引脚和所述智能模组数据接收信号引脚;A sixth signal drive circuit and a third multiplexer circuit are provided on the adapter board, and the third multiplexer circuit is connected between the sixth signal drive circuit and the second connector assembly, and The at least one light board memory control interface pin of the first connector assembly is connected to the smart module data sending signal pin and the smart module data receiving signal pin through the second connector assembly ;
    所述LED灯板包括第七信号驱动电路、第三非易失性存储器和第二微控制器,所述第七信号驱动电路连接在所述第二微控制器和所述灯板输入接口之间,所述第三非易失性存储器连接所述第二微控制器,所述灯板输入接口连接所述数据输出接口。The LED light board includes a seventh signal drive circuit, a third non-volatile memory, and a second microcontroller, and the seventh signal drive circuit is connected between the second microcontroller and the light board input interface. Meanwhile, the third non-volatile memory is connected to the second microcontroller, and the light board input interface is connected to the data output interface.
  13. 如权利要求8所述的显示系统,其特征在于,所述功能扩展引脚组包括多个电源检测信号引脚,所述多个电源检测信号引脚分别连接所述可编程逻辑器件;所述显示系统还包括多个电源,所述多个电源通过所述转接板一一对应连接所述第一接插组件的所述多个电源检测信号引脚。8. The display system according to claim 8, wherein the function expansion pin group includes a plurality of power detection signal pins, and the plurality of power detection signal pins are respectively connected to the programmable logic device; The display system also includes a plurality of power supplies, and the plurality of power supplies are connected to the plurality of power detection signal pins of the first plug-in component one by one through the adapter board.
  14. 如权利要求8所述的显示系统,其特征在于,所述显示控制卡还包括第二电路板,所述第二电路板上设置有第二可编程逻辑器件、第三微控制器、第二以太网物理层收发器以及第三接插组件,所述第三接插组件为如权利要求1-5任意一项所述的接插组件;所述第三微控制器连接所述第二可编程逻辑器件和所述第三接插组件的所述第一接插件的所述电源引脚组,所述第二以太网物理层收发器连接在所述第二可编程逻辑器件和所述第三接插组件的所述第二接插件的所述多路以太网接口引脚组之间,所述可编程逻辑器件连接所述第三接插组件的所述第一接插件的所述电源引脚组、所述功能扩展引脚组、所述多个第一数据输出引脚群和所述第二接插件的所述多个第二数据输出引脚群和所述显示控制信号输出引脚组;The display system of claim 8, wherein the display control card further comprises a second circuit board, and a second programmable logic device, a third microcontroller, and a second Ethernet physical layer transceiver and a third plug-in component, the third plug-in component is the plug-in component according to any one of claims 1-5; the third microcontroller is connected to the second The power pin group of the first connector of the programming logic device and the third connector assembly, and the second Ethernet physical layer transceiver is connected to the second programmable logic device and the first Between the multiple Ethernet interface pin groups of the second connector of the three-plug assembly, the programmable logic device is connected to the power supply of the first connector of the third plug-in assembly The pin group, the function expansion pin group, the plurality of first data output pin groups, the plurality of second data output pin groups of the second connector, and the display control signal output lead Foot set
    所述转接板上还设置有与所述第三接插组件具有相同引脚定义的第四接插组件;所述转接板通过所述第四接插组件连接所述第三接插组件;所述转接板上还设置有第二以太网接口和第二网络变压器,所述第二以太网接口通过所述第二网络变压器、所述第四接插组件连接所述第三接插组件的所述多路以太网接口引脚组;所述数据输出接口通过所述第四接插组件连接所述第三接插组件的所述第一接插件的所述多个第一数据输出引脚群、所述第二接插件的所述多个第二数据输出引脚群以及所述显示控制 信号输出引脚组;The adapter board is also provided with a fourth connector assembly having the same pin definition as the third connector assembly; the adapter board is connected to the third connector assembly through the fourth connector assembly The adapter board is also provided with a second Ethernet interface and a second network transformer, and the second Ethernet interface is connected to the third connector through the second network transformer and the fourth connector assembly The multiple Ethernet interface pin group of the component; the data output interface is connected to the first data output of the first connector of the third connector through the fourth connector A pin group, the plurality of second data output pin groups of the second connector, and the display control signal output pin group;
    所述第一接插组件和所述第三接插组件的所述功能扩展引脚组分别包括双卡连接信号引脚和双卡身份标识信号引脚;所述第一接插组件的所述双卡连接信号引脚和所述双卡身份标识信号引脚分别连接所述电路板上的所述可编程逻辑器件;所述第三接插组件的所述双卡连接信号引脚和所述双卡身份标识信号引脚分别连接所述第二电路板上的的所述可编程逻辑器件;所述第一接插组件的所述双卡身份标识信号引脚连接外部高电平,所述第一接插组件的所述双卡连接信号引脚通过所述转接板连接所述第二电路板上的所述第三接插组件的所述双卡连接信号引脚;所述第二电路板上的所述第三接插组件的所述双卡身份标识信号引脚接地。The function expansion pin groups of the first plug-in assembly and the third plug-in assembly respectively include dual-card connection signal pins and dual-card identification signal pins; the first plug-in assembly The dual-card connection signal pin and the dual-card identity identification signal pin are respectively connected to the programmable logic device on the circuit board; the dual-card connection signal pin of the third plug-in assembly and the The dual-card identification signal pins are respectively connected to the programmable logic device on the second circuit board; the dual-card identification signal pins of the first plug-in assembly are connected to an external high level, the The dual card connection signal pin of the first connector assembly is connected to the dual card connection signal pin of the third connector assembly on the second circuit board through the adapter board; the second The dual-card identification signal pin of the third connector assembly on the circuit board is grounded.
  15. 如权利要求14所述的显示系统,其特征在于,所述第一接插组件的第二接插件和所述第三接插组件的第二接插件上分别包括测试按键输入信号引脚;所述转接板还设置有测试按键,所述测试按键通过所述第二接插组件连接所述第一接插组件的所述测试按键输入信号引脚;所述测试按键通过所述第四接插组件连接所述第三接插组件的所述测试按键输入信号引脚。The display system of claim 14, wherein the second connector of the first connector assembly and the second connector of the third connector assembly respectively include test key input signal pins; The adapter board is also provided with a test button, the test button is connected to the test button input signal pin of the first plug assembly through the second plug assembly; the test button passes through the fourth connector The plug-in component is connected to the test key input signal pin of the third plug-in component.
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