WO2020224587A1 - 驱动电路、驱动电路连接信息确定方法和显示装置 - Google Patents

驱动电路、驱动电路连接信息确定方法和显示装置 Download PDF

Info

Publication number
WO2020224587A1
WO2020224587A1 PCT/CN2020/088752 CN2020088752W WO2020224587A1 WO 2020224587 A1 WO2020224587 A1 WO 2020224587A1 CN 2020088752 W CN2020088752 W CN 2020088752W WO 2020224587 A1 WO2020224587 A1 WO 2020224587A1
Authority
WO
WIPO (PCT)
Prior art keywords
chip
output terminal
connection information
operational amplifier
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2020/088752
Other languages
English (en)
French (fr)
Inventor
唐莉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HKC Co Ltd
Chongqing HKC Optoelectronics Technology Co Ltd
Original Assignee
HKC Co Ltd
Chongqing HKC Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by HKC Co Ltd, Chongqing HKC Optoelectronics Technology Co Ltd filed Critical HKC Co Ltd
Priority to US17/298,217 priority Critical patent/US11488504B2/en
Publication of WO2020224587A1 publication Critical patent/WO2020224587A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2290/00—Indexing scheme relating to details of a display terminal
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/043—Compensation electrodes or other additional electrodes in matrix displays related to distortions or compensation signals, e.g. for modifying TFT threshold voltage in column driver
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0833—Several active elements per pixel in active matrix panels forming a linear amplifier or follower
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0272—Details of drivers for data electrodes, the drivers communicating data to the pixels by means of a current
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0291—Details of output amplifiers or buffers arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0271—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
    • G09G2320/0276—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3696—Generation of voltages supplied to electrode drivers

Definitions

  • This application relates to the field of display driving technology, and in particular to a driving circuit, a method for determining connection information of the driving circuit, and a display device.
  • the angle is artificially divided into 0-255 equal parts, and then corresponds to the L0-L255 gray scale displayed on the panel.
  • the LCD panel display can be controlled by controlling 8bit digital signal.
  • the human eye is most sensitive to the brightness of low gray scales, so gamma correction is often introduced in the design so that the human eye perceives the brightness corresponding to the data received by the liquid crystal panel.
  • the number of voltage channels output by the gamma chip needs to correspond to the number of binding points of the data drive chip, and the voltage output by the gamma chip needs to meet the requirements of driving the data drive chip. Among them, the larger the panel size, the greater the drive capacity required. .
  • the embodiments of the present application provide a driving circuit, a method for determining connection information of the driving circuit, and a display device.
  • an embodiment of the present application provides a driving circuit, including:
  • the gamma chip is set to provide multiple initial binding point voltages; the gamma chip includes a first type output terminal and a second type output terminal.
  • the current corresponding to the initial binding point voltage output by the first type output terminal is less than the preset drive current ;
  • the current corresponding to the initial binding point voltage output by the second type of output terminal is greater than the preset drive current;
  • the data drive chip includes a processor and multiple operational amplifiers, the output of each operational amplifier is connected to each end point on the processor, and the output of each operational amplifier is also connected to its own inverting input;
  • Gamma The first type output terminal of the chip is connected to the non-inverting input terminal of a part of the operational amplifier; the second type output terminal of the gamma chip is connected to the inverting input terminal of another part of the operational amplifier, and the non-inverting input terminal of the operational amplifier is grounded;
  • the preset driving current is a current that characterizes the driving capability required to drive the display panel, and the output terminal of the data driving chip is connected to the display panel.
  • the driving circuit drives the operational amplifier on the chip by using data, and then determines whether the current corresponding to each initial binding point voltage output by the gamma chip can meet the driving capability requirements of the display panel (that is, determine the current Is it greater than the preset drive current), for the initial binding point voltage that cannot meet the drive capability requirements, connect the corresponding first type output terminal to the non-inverting input terminal of the operational amplifier, so that the initial binding point voltage can pass through the operational amplifier Amplify the current, and the amplified output current of the binding point voltage increases, which can meet the driving capability requirement and is delivered to the corresponding terminal on the processor.
  • the second type output terminal can be connected to the inverting input terminal of the operational amplifier, and the non-inverting input terminal of the operational amplifier can be grounded, so that the non-inverting input is Zero makes the corresponding operational amplifier incapable of amplification, and directly transmits the initial binding point voltage generated by the gamma chip to the corresponding terminal on the processor.
  • the built-in operational amplifier adopts different connection methods for different initial binding point voltages, so that each binding point voltage input to the processor can meet the driving capability requirements of the display panel, with a simple structure and low cost.
  • the multiple operational amplifiers are voltage followers.
  • the operational amplifier in the data drive chip is a voltage follower, which mainly plays a role of voltage follower and current amplification, so that the potential of the new binding point voltage generated after amplification can meet the voltage level of the binding point , And the current meets the driving capability requirements of the display panel.
  • the driving circuit further includes a first resistor, one end of the first resistor is connected to the first type output terminal, and the other end of the first resistor is connected to the non-inverting input terminal of the corresponding operational amplifier.
  • the driving circuit further includes:
  • a second resistor one end of the second resistor is connected to the second type output terminal, and the other end of the second resistor is connected to the inverting input terminal of the corresponding operational amplifier;
  • the third resistor one end of the third resistor is connected to the non-inverting input end of the operational amplifier, and the other end of the third resistor is grounded.
  • the first resistance is a zero-ohm resistance.
  • the second resistance and the third resistance are both zero-ohm resistance.
  • each initial binding point voltage corresponds to each operational amplifier one-to-one.
  • an embodiment of the present application also provides a method for determining connection information of a driving circuit, wherein the driving circuit includes: a gamma chip configured to provide multiple initial binding point voltages; a data driving chip, the data driving chip including a processor With multiple operational amplifiers, the output terminal of each operational amplifier is connected to each end point on the processor correspondingly, and the output terminal of each operational amplifier is also connected to its own inverting input terminal; the method includes:
  • the output terminal of the gamma chip corresponding to the current is the first type output terminal, and first connection information is generated, and the first connection information connects the first type output terminal of the gamma chip correspondingly Part of the non-inverting input terminal of the operational amplifier;
  • the output terminal of the gamma chip corresponding to the current is the second type output terminal, and second connection information is generated, and the second connection information makes the second type output terminal of the gamma chip correspondingly connected
  • the inverting input terminal of the other part of the operational amplifier connects the non-inverting input terminal of the operational amplifier to ground;
  • the preset driving current is a current that characterizes the driving capability required to drive the display panel, and the output terminal of the data driving chip is connected to the display panel.
  • the method for determining the driving circuit connection information further includes:
  • the image data of the data drive chip, the first connection information and the second connection information, the first type output terminal and each second type output terminal of the gamma chip are displayed respectively with each operational amplifier Corresponding to the connected layout.
  • the method for determining the connection information of the driving circuit further includes: displaying the image of the gamma chip and the image of the data driving chip according to the pre-stored image data of the gamma chip and the image data of the data driving chip.
  • the multiple operational amplifiers are voltage followers.
  • the method for determining the driving circuit connection information further includes: generating a driving circuit architecture diagram according to the connection layout of the driving circuit.
  • the method for determining the driving circuit connection information further includes:
  • the method for determining the driving circuit connection information further includes:
  • the control terminal After receiving the first connection information and the second connection information, the control terminal stores the received first connection information and second connection information in correspondence with the parameters of the corresponding gamma chip and the parameters of the data drive chip.
  • the method for determining the driving circuit connection information further includes:
  • a production and manufacturing plan for the driving circuit is generated.
  • a display device includes a display panel and the above-mentioned driving circuit.
  • Figure 1 is a schematic diagram of a standard gamma2.2 curve in an exemplary technology
  • FIG. 2 is a schematic diagram of the structure of a driving circuit in an embodiment
  • FIG. 3 is a schematic flowchart of a method for determining connection information of a driving circuit in an embodiment
  • FIG. 4 is a schematic flowchart of a method for determining connection information of a driving circuit in another embodiment
  • FIG. 5 is a schematic structural diagram of a device for determining connection information of a driving circuit in an embodiment
  • FIG. 6 is a schematic structural diagram of a device for determining connection information of a driving circuit in another embodiment
  • FIG. 7 is a schematic diagram of the structure of a display device in an embodiment
  • Figure 8 is an internal structure diagram of a computer device in an embodiment.
  • the embodiment of the present application provides a driving circuit, as shown in FIG. 2, including: a gamma chip 10, which is configured to provide multiple initial binding point voltages; the gamma chip 10 includes a first type output terminal and a second type output terminal , The current corresponding to the initial binding point voltage output by the output terminal of the first type is less than the preset driving current; the current corresponding to the initial binding point voltage output by the output terminal of the second type is greater than the preset driving current; data driving chip 20, data driving The chip 20 includes a processor 21 and a plurality of operational amplifiers 22.
  • each operational amplifier 22 is connected to each terminal on the processor 21 correspondingly, and the output terminal of each operational amplifier 22 is also connected to its own inverting input terminal;
  • Gamma The first type output terminal of the circuit 10 is connected to the non-inverting input terminal of a part of the operational amplifier 22; the second type output terminal of the gamma circuit 10 is connected to the inverting input terminal of another part of the operational amplifier 22, and the non-inverting input terminal of the operational amplifier 22 The terminal is grounded;
  • the preset driving current is a current that characterizes the driving capability required to drive the display panel, and the output terminal of the data driving chip 20 is connected to the display panel.
  • the gamma chip 10 refers to a device capable of outputting multiple gamma voltages to correct the data driving signal.
  • the gamma chip 10 is not limited to only include a CPU, and may also include components such as voltage divider resistors.
  • the inverting input terminal of the operational amplifier 22 is connected to its output terminal to form negative feedback.
  • the current corresponding to the initial binding point voltage output by the G13 output terminal of the gamma chip 10 is less than the preset drive current, so the initial binding point voltage needs to be amplified.
  • the binding point voltage is input from the non-inverting input terminal of the operational amplifier 22, and the operational amplifier 22 is in an amplifying state.
  • the new binding point voltage generated after amplification has its driving ability amplified, and is transmitted from the output terminal to the G13' terminal on the processor 21 .
  • each initial binding point voltage corresponds to each operational amplifier 22 one-to-one.
  • the current corresponding to the initial binding point voltage output by the G14 output terminal of the gamma chip 10 is greater than the preset drive current, then the G14 output terminal is connected to the inverting input terminal of the operational amplifier 22, and the operation The non-inverting input terminal of the amplifier 22 is grounded, and the non-inverting input terminal is not affected by the input signal, that is, the initial binding point voltage is directly transmitted to the G14' terminal on the processor 21.
  • the driving circuit provided by the embodiment of the present application drives the operational amplifier 22 on the chip 20 by using the data, and then according to whether the current corresponding to the initial binding point voltage output by the gamma chip 10 can meet the driving capability requirements of the display panel (ie Determine whether the current is greater than the preset drive current), for the initial binding point voltage that cannot meet the driving capability requirements, establish the first type output terminal corresponding to the initial binding point voltage and the corresponding non-inverting input terminal of the operational amplifier 22 The communication relationship between them enables the initial binding point voltage of the path to amplify the current through the operational amplifier 22, and the amplified output current of the binding point voltage increases, which can meet the driving capability requirement and is transmitted to the corresponding terminal on the processor 21.
  • the second type output terminal corresponding to the initial binding point voltage can be connected to the inverting input terminal of the corresponding operational amplifier 22, and directly through the inverting input terminal It is sent to the processor 21, where the non-inverting input terminal of the operational amplifier 22 is grounded and the input is zero.
  • the corresponding operational amplifier 22 does not have an amplification effect, and the initial binding point voltage generated by the gamma chip 10 is directly transmitted to the corresponding terminal on the processor 21.
  • different connection modes are used for different initial binding point voltages, so that each binding point voltage input to the processor 21 can meet the driving capability requirements of the display panel, and the structure is simple and the cost is low.
  • the operational amplifier 22 is a voltage follower.
  • the voltage follower is a kind of electronic component that realizes that the output voltage follows the input voltage.
  • the salient feature of the voltage follower is that the input impedance is high while the output impedance is low. Generally speaking, the input impedance can reach several megaohms, while the output impedance is low, usually only a few ohms or even lower.
  • the voltage amplification factor of the voltage follower is always less than and close to 1, and the current of the output signal can be amplified.
  • the operational amplifier 22 on the data drive chip 20 adopts a voltage follower.
  • the output binding point is The potential of the voltage is basically unchanged, and the current is amplified, that is, the driving capability is amplified to meet the driving capability requirements of the display panel.
  • the operational amplifier 22 in the data driving chip 20 is a voltage follower, which mainly functions as a voltage follower and a current amplifying function, so that the potential of a new binding point voltage generated after the binding point voltage is amplified It can meet the voltage level of the binding point, and the current meets the driving capability requirements of the display panel.
  • the driving circuit further includes: a first resistor R1, one end of the first resistor R1 is connected to the first type output terminal of the gamma chip 10, and the other end of the first resistor R1 is connected to the corresponding The non-inverting input terminal of the operational amplifier 22.
  • the driving circuit further includes: a second resistor R2, one end of the second resistor R2 is connected to the second type output terminal of the gamma chip 10, and the other end of the second resistor R2 is connected to the corresponding The inverting input terminal of the operational amplifier 22; the third resistor R3, one end of the third resistor R3 is connected to the non-inverting input terminal of the operational amplifier 22, and the other end of the third resistor R3 is grounded.
  • the first resistor R1 is a zero-ohm resistor.
  • Zero-ohm resistance also known as jumper resistor, is a special purpose resistor.
  • Zero-ohm resistance does not have a real resistance value of zero, but ohmic resistance is actually a resistor with a small resistance value.
  • the zero-ohm resistor is adopted, so that after the initial binding point voltage output by the first-type output terminal passes through the zero-ohm resistance, its current drive capability is almost unchanged, which can ensure that the drive capacity loss of the binding point voltage delivered to the operational amplifier 22 is minimized .
  • the second resistor R2 and the third resistor R3 are both zero-ohm resistors. Same as above, the use of zero-ohm resistors can ensure that the drive capability loss to the binding point voltage is minimized.
  • the non-inverting input terminal of the operational amplifier 22 is grounded by a zero-ohm third resistor R3, so that each operational amplifier 22 can be grounded at a single point, and each of them becomes an independent system with strong anti-interference ability.
  • an embodiment of the present application also provides a method for determining connection information of a driving circuit, wherein the driving circuit includes: a gamma chip 10 configured to provide multiple initial binding point voltages; a data driving chip 20, a data driving chip 20 It includes a processor 21 and a plurality of operational amplifiers 22, the output terminal of each operational amplifier 22 is connected to each end point on the processor 21 correspondingly, and the output terminal of each operational amplifier 22 is also connected to its own inverting input terminal;
  • the method for determining the connection information of the driving circuit includes:
  • the preset driving current is a current that characterizes the driving capability required to drive the display panel, and the output terminal of the data driving chip is connected to the display panel.
  • the definitions of the gamma chip etc. are the same as those in the above-mentioned embodiment, and will not be repeated here.
  • the existing gamma chip and the data driving chip it is necessary to connect the two so that the relationship between the gamma voltage received by the data driving chip and the gray scale can be close or infinitely close to the gamma 2.2 curve. Specifically, first obtain the current corresponding to each initial binding point voltage output by the gamma chip, and determine the magnitude relationship between each current and the preset driving current. If the current is less than the preset driving current, the current corresponding to the current The initial binding point voltage cannot meet the driving capability requirements of the display panel.
  • this type of output terminal of the gamma chip is the first type output terminal, and the first connection information is generated.
  • the first connection information is the first type output of the gamma chip Terminal and the non-inverting input terminal of the operational amplifier. After the first-type output terminal of the gamma chip is connected to the non-inverting input terminal of the operational amplifier, the initial binding point voltage output by the first-type output terminal of the gamma chip can be amplified by the corresponding operational amplifier and sent to the corresponding processor Endpoint.
  • this type of output terminal of the gamma chip is the second type of output
  • the second connection information is to connect the second type output terminal of the gamma chip to the inverting input terminal of the corresponding operational amplifier, and to ground the non-inverting input terminal of the operational amplifier, that is, The non-inverting input terminal input is zero, and the initial binding point voltage output from the second type output terminal is directly transmitted to the corresponding terminal on the processor through the inverting input terminal.
  • the data-driven operational amplifier on the chip is used to realize the selection or non-selection of the amplifier function of the operational amplifier through simple circuit connection, so that the output to each terminal (G1' ⁇ G14') on the processor is tied to the voltage It can meet the driving capability requirements of the display panel, has a simple structure and low cost.
  • the method for determining the connection information of the driving circuit further includes the steps:
  • the above-mentioned image data can all represent characteristic parameters that can reflect the real object image.
  • manual or machine operations are often required.
  • the coordinates of each port of the processor in the driver chip and the first and second connection information are used to generate the wiring between the first and second type output terminals of each gamma chip and each operational amplifier, and then generate a drive circuit architecture diagram to guide Workers work according to the displayed layout.
  • the method for determining the connection information of the driving circuit further includes the steps:
  • S60 Send the first connection information and the second connection information to the control terminal.
  • the control terminal includes a PC (personal computer, personal computer), a controller, and so on.
  • a controller in an industrial robot receives first connection information and second connection information.
  • the control terminal may also be a PC, and send the first connection information and the second connection information to the PC.
  • the PC After the PC receives the connection information, it can store the received connection information corresponding to the parameters (number, coordinates of each pin on the console, etc.) of the corresponding gamma chip and data drive chip.
  • a manufacturing plan can be generated according to the received first connection information and second connection information and the stored parameters of the gamma chip and the parameters of the data-driven chip to instruct the actuator to perform the production operation.
  • steps in the flowcharts of FIGS. 3-4 are displayed in sequence as indicated by the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless specifically stated in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least part of the steps in Figure 3-4 may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. These sub-steps or stages The execution order of is not necessarily performed sequentially, but may be performed alternately or alternately with at least a part of other steps or sub-steps or stages of other steps.
  • An embodiment of the present application also provides a device for determining connection information of a driving circuit, as shown in FIG. 5, including:
  • the current obtaining unit 101 is configured to obtain the current corresponding to the initial binding point voltage of each path output by the gamma chip;
  • the driving capability determination unit 102 is configured to determine whether the current is greater than a preset driving current
  • the first connection information generating unit 103 is configured to determine that the output terminal of the gamma chip corresponding to the current is the first type output terminal when determining that the current is less than the preset driving current, and generate first connection information, the first The connection information makes the first type output terminal of the gamma chip correspond to the non-inverting input terminal of a part of the operational amplifier;
  • the second connection information generating unit 104 is configured to determine that the output terminal of the gamma chip corresponding to the current is the second type output terminal when determining that the current is greater than the preset drive current, and generate second connection information, the second The connection information connects the second type output terminal of the gamma chip to the inverting input terminal of another part of the operational amplifier, and grounds the non-inverting input terminal of the operational amplifier;
  • the preset driving current is a current that characterizes the driving capability required to drive the display panel, and the output terminal of the data driving chip is connected to the display panel.
  • the driving circuit connection information determining device further includes:
  • the layout display control unit 105 is configured to display each first type output terminal and each first connection information of the gamma chip according to the pre-stored image data of the gamma chip, the image data of the data drive chip, the first connection information and the second connection information.
  • the layout of the two types of output terminals respectively connected to each operational amplifier.
  • the driving circuit connection information determining device further includes:
  • the connection information sending unit 106 is configured to send the first connection information and the second connection information to the control terminal.
  • each module in the device for determining the connection information of the drive circuit can be implemented in whole or in part by software, hardware, and a combination thereof.
  • the foregoing modules may be embedded in the form of hardware or independent of the processor in the computer device, or may be stored in the memory of the computer device in the form of software, so that the processor can call and execute the operations corresponding to the foregoing modules.
  • a display device as shown in FIG. 7, includes a display panel 1 and the aforementioned driving circuit 2.
  • the driving circuit 2 provides a binding point voltage that meets the driving capability requirement for driving the display panel 1, and is sent to the display panel 1 through subsequent processing for display driving.
  • the display panel 1 may be a liquid crystal display panel or an OLED (Organic Light-Emitting Diode, organic light-emitting diode) display panel or the like.
  • the display panel 1 may include an array substrate 12 and a color filter 11.
  • the OP 22 (Operational Amplifier) built in the data driving chip 20 is used to amplify the initial binding point voltage with insufficient driving capability, and the amplified new binding point voltage is transmitted to The processor 21 on the data driving chip 20 performs gamma correction on the data signal to drive the display panel 1 for display, and the display quality is good.
  • the new binding point voltage output by the operational amplifier 22 on each data drive chip 20 is transmitted to the processor 21 on each data drive chip 20, so that each data drive chip The number of binding point voltages finally output by the processor of 20 meets the driving requirements.
  • a computer device is provided.
  • the computer device may be a terminal, and its internal structure diagram may be as shown in FIG. 8.
  • the computer equipment includes a processor, a memory, a network interface, a display screen and an input device connected through a system bus.
  • the processor of the computer device is used to provide calculation and control capabilities.
  • the memory of the computer device includes a non-volatile storage medium and an internal memory.
  • the non-volatile storage medium stores an operating system and a computer program.
  • the internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage medium.
  • the network interface of the computer device is used to communicate with an external terminal through a network connection.
  • the computer program is executed by the processor to realize a method for determining the connection information of the driving circuit.
  • the display screen of the computer equipment can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer equipment can be a touch layer covered on the display screen, or it can be a button, a trackball or a touchpad set on the housing of the computer equipment , It can also be an external keyboard, touchpad, or mouse.
  • FIG. 8 is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied.
  • the specific computer device may Including more or fewer parts than shown in the figure, or combining some parts, or having a different arrangement of parts.
  • a computer device includes a memory and a processor, the memory stores a computer program, and the processor implements the following steps when the processor executes the computer program:
  • the preset driving current is a current that characterizes the driving capability required to drive the display panel, and the output terminal of the data driving chip is connected to the display panel.
  • the computer device it is possible to determine whether the corresponding current meets the driving capability requirement according to the initial binding point voltage output by the gamma chip. If it is determined that the corresponding current meets the driving capability requirement, the first connection information is generated.
  • the first connection information connects the first-type output terminal that does not meet the driving capability requirement to the non-inverting input terminal of the operational amplifier, and uses the amplification function of the operational amplifier. If it is judged that the corresponding current can meet the driving capability requirement, second connection information is generated, which connects the second type output terminal of the gamma chip with the inverting input terminal of the operational amplifier, and makes the in-phase of the operational amplifier The input terminal is grounded, so the amplifier function of the operational amplifier is not used.
  • the initial binding point voltage output by the second type output terminal of the gamma chip is directly transmitted to the corresponding terminal on the processor on the data drive chip through the inverting input terminal of the operational amplifier.
  • processor of the computer device may also implement other steps in the above method for determining the connection information of the driving circuit.
  • the computer program is executed by a processor, the following steps are implemented:
  • the preset driving current is a current that characterizes the driving capability required to drive the display panel, and the output terminal of the data driving chip is connected to the display panel.
  • Non-volatile memory may include read only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory.
  • Volatile memory may include random access memory (RAM) or external cache memory.
  • RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous chain Channel (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Liquid Crystal (AREA)

Abstract

一种驱动电路、驱动电路连接信息确定方法和显示装置。驱动电路中的伽马芯片(10)设置为提供多路初始绑点电压；伽马芯片(10)的第一类输出端输出的初始绑点电压对应的电流小于预设的驱动电流；伽马芯片(10)的第二类输出端输出的初始绑点电压对应的电流大于预设的驱动电流；数据驱动芯片(20)上的运算放大器(22)的输出端与数据驱动芯片(20)上的处理器(21)的各端点对应连接，各运算放大器(22)的输出端还与自身的反相输入端连接；伽马芯片(10)的第一类输出端连接至一部分运算放大器(22)的同相输入端；伽马芯片(10)的第二类输出端连接至另一部分运算放大器(22)的反相输入端，且运算放大器(22)的同相输入端接地。

Description

驱动电路、驱动电路连接信息确定方法和显示装置
相关申请的交叉引用
本申请要求于2019年5月6日提交中国专利局、申请号为2019103706974、发明名称为“驱动电路、驱动电路连接信息确定方法和显示装置”的中国专利申请的优先权，其全部内容通过引用并入到本申请中。
技术领域
本申请涉及显示驱动技术领域，特别是涉及一种驱动电路、驱动电路连接信息确定方法和显示装置。
背景技术
这里的陈述仅提供与本申请有关的背景信息，而不必然地构成现有技术。
随着液晶面板行业竞争越来越激烈，各面板厂对成本的控制也越来越严格。从PCBA板(Printed Circuit Board Assembly，PCB空板经过SMT(Surface Mounted Technology)上件或经过DIP(Dual In-line Package)插件的整个制程后的板件)设计角度考虑降低成本，主要涉及考虑新芯片的评估选型、PCBA板的尺寸、布线设计等方面。数据驱动芯片的8bit(binary digit，比特)数字信号经过数模转换器转换变成相应电位的模拟信号，该模拟信号施加到液晶分子的两极用以控制液晶分子翻转对应的角度。该角度被人为地划分为0～255等分，进而对应面板显示的L0～L255灰阶。可通过控制8bit数字信号来控制液晶面板显示画面。通常人眼对低灰阶的亮度最敏感，所以在设计时常引入伽马(gamma)校正使得人眼感知亮度与液晶面板接收的数据相对应。
伽马芯片输出的电压通道数需要与数据驱动芯片绑点个数相对应，且伽马芯片输出的电压需要达到能够驱动数据驱动芯片的要求，其中，面板尺寸越大需要的驱动能力也越大。
当一些伽马绑点电压是根据伽马芯片输出的两个或多个伽马电压进行电阻分压产生时，以14组绑点电压为例，这14组绑点电压的电位能够满足绑点电压水平，但该绑点电压的电位输送至数据驱动芯片时，却不能满足驱动能力要求。目前，对于该问题，常通过外接控制器，控制器控制多个gamma芯片，根据驱动能力要求，调整各gamma芯片输出的绑点电压大小，此种解决手段，需要多个控制芯片和多个gamma芯片，成本高，出现故障时，由于结构复杂，检修周期长。
发明内容
基于此，本申请的实施例提供一种驱动电路、驱动电路连接信息确定方法和显示装置。
一方面，本申请实施例提供了一种驱动电路，包括：
伽马芯片，设置为提供多路初始绑点电压；伽马芯片包括第一类输出端和第二类输出端，第一类输出端输出的初始绑点电压对应的电流小于预设的驱动电流；第二类输出端输出的初始绑点电压对应的电流大于预设的驱动电流；和
数据驱动芯片，数据驱动芯片包括处理器和多个运算放大器，各运算放大器的输出端与处理器上的各端点对应连接，各运算放大器的输出端还与自身的反相输入端连接；伽马芯片的第一类输出端连接至一部分运算放大器的同相输入端；伽马芯片的第二类输出端连接至另一部分运算放大器的反相输入端，且运算放大器的同相输入端接地；
其中，预设的驱动电流是表征驱动显示面板所需驱动能力的电流，数据驱动芯片的输出端与显示面板连接。
本申请实施例提供的驱动电路，通过利用数据驱动芯片上自带的运算放大器，然后根据伽马芯片输出的各初始绑点电压对应的电流是否能够满足显示面板的驱动能力要求(即判断该电流是否大于预设的驱动电流)，对于不能够满足驱动能力要求的初始绑点电压，将对应的第一类输出端接运算放大器 的同相输入端，使得该路初始绑点电压能够经过该运算放大器放大电流，放大后的输出的绑点电压的电流增大，能够满足驱动能力要求，输送至处理器上对应的端点。而对于已经能够满足驱动能力要求的初始绑点电压，无需进行放大，则可以将第二类输出端连接运算放大器的反相输入端，并将该运算放大器的同相输入端接地，使同相输入为零，使得对应的运算放大器不起放大作用，将伽马芯片产生的初始绑点电压直接输送至处理器上对应的端点。利用自带的运算放大器，对不同的初始绑点电压采用不同的连接方式，使得输入至处理器的各绑点电压均能满足显示面板的驱动能力要求，结构简单，成本低。
在其中一个实施例中，多个运算放大器为电压跟随器。
本申请实施例提供的驱动电路中，数据驱动芯片中的运算放大器为电压跟随器，主要起电压跟随作用和电流放大作用，使得放大后生成的新的绑点电压的电位能够满足绑点电压水平，且电流满足显示面板的驱动能力要求。
在其中一个实施例中，驱动电路还包括：第一电阻，第一电阻的一端连接第一类输出端，第一电阻的另一端连接对应的运算放大器的同相输入端。
在其中一个实施例中，驱动电路还包括：
第二电阻，第二电阻的一端连接第二类输出端，第二电阻的另一端连接对应的运算放大器的反相输入端；
第三电阻，第三电阻的一端连接运算放大器的同相输入端，第三电阻的另一端接地。
在其中一个实施例中，第一电阻为零欧姆电阻。
在其中一个实施例中，第二电阻和第三电阻均为零欧姆电阻。
在其中一个实施例中，各初始绑点电压与各运算放大器一一对应。
另一方面，本申请实施例还提供了一种驱动电路连接信息确定方法，其中，驱动电路包括：伽马芯片，设置为提供多路初始绑点电压；数据驱动芯片，数据驱动芯片包括处理器和多个运算放大器，各运算放大器的输出端与处理器上的各端点对应连接，各运算放大器的输出端还与自身的反相输入端 连接；该方法包括：
获取伽马芯片输出的各路初始绑点电压对应的电流；
判断电流是否大于预设的驱动电流；
若电流小于预设的驱动电流，则判定电流对应的伽马芯片的输出端为第一类输出端，并生成第一连接信息，第一连接信息使伽马芯片的第一类输出端对应连接一部分运算放大器的同相输入端；
若电流大于预设的驱动电流，则判定电流对应的伽马芯片的输出端为第二类输出端，并生成第二连接信息，第二连接信息使伽马芯片的第二类输出端对应连接另一部分运算放大器的反相输入端，将运算放大器的同相输入端接地；
其中，预设的驱动电流是表征驱动显示面板所需驱动能力的电流，数据驱动芯片的输出端与显示面板连接。
在其中一个实施例中，驱动电路连接信息确定方法还包括：
根据预存的伽马芯片的图像数据、数据驱动芯片的图像数据、第一连接信息和第二连接信息，显示伽马芯片的各第一类输出端和各第二类输出端分别与各运算放大器对应连接的布图。
在其中一个实施例中，驱动电路连接信息确定方法还包括：根据预存的伽马芯片的图像数据、数据驱动芯片的图像数据，显示伽马芯片图像和数据驱动芯片的图像。
在其中一个实施例中，多个运算放大器为电压跟随器。
在其中一个实施例中，驱动电路连接信息确定方法还包括：根据所述驱动电路的连接布图，生成驱动电路架构图。
在其中一个实施例中，驱动电路连接信息确定方法还包括：
发送第一连接信息和第二连接信息至控制终端。
在其中一个实施例中，驱动电路连接信息确定方法还包括：
控制终端接收到第一连接信息和所述第二连接信息后，将接收到的第一连接信息和第二连接信息与对应的伽马芯片的参数、数据驱动芯片的参数对 应存储。
在其中一个实施例中，驱动电路连接信息确定方法还包括：
根据接收到的第一连接信息和第二连接信息以及存储的伽马芯片的参数和数据驱动芯片的参数，生成驱动电路的生产制造方案。
一种显示装置，包括显示面板和上述驱动电路。
本申请的一个或多个实施例的细节在下面的附图和描述中提出。本申请的其它特征、目的和优点将从说明书、附图以及权利要求书变得明显。
附图说明
图1为一个示例性技术中标准gamma2.2曲线的示意图；
图2为一个实施例中驱动电路的结构示意图；
图3为一个实施例中驱动电路连接信息确定方法的流程示意图；
图4为另一个实施例中驱动电路连接信息确定方法的流程示意图；
图5为一个实施例中驱动电路连接信息确定装置的结构示意图；
图6为另一个实施例中驱动电路连接信息确定装置的结构示意图；
图7为一个实施例中显示装置的结构示意图；
图8为一个实施例中计算机设备的内部结构图。
具体实施方式
为了便于理解本申请，下面将参照相关附图对本申请进行更全面的描述。附图中给出了本申请的首选实施例。但是，本申请可以以许多不同的形式来实现，并不限于本文所描述的实施例。相反地，提供这些实施例的目的是使对本申请的公开内容更加透彻全面。
需要说明的是，当一个元件被认为是“连接”另一个元件，它可以是直接连接到另一个元件并与之结合为一体，或者可能同时存在居中元件。本文所使用的术语“安装”、“一端”、“另一端”以及类似的表述只是为了说明的目的。
除非另有定义，本文所使用的所有的技术和科学术语与属于本申请的技 术领域的技术人员通常理解的含义相同。本文中在本申请的说明书中所使用的术语只是为了描述具体的实施例的目的，不是旨在于限制本申请。本文所使用的术语“及/或”包括一个或多个相关的所列项目的任意的和所有的组合。
目前大多厂商使用的伽马芯片(gamma IC，gamma Integrated Circuit)绑点多为14个或16个，按正、负极性分为两组。绑点个数越多，gamma曲线越靠近图1中所示的γ＝2.2曲线(标准gamma2.2曲线)，但相应地调节gamma曲线也变得越困难，目前一般采用14个或16个绑点就可使gamma曲线靠近标准gamma2.2曲线。目前有一些数据驱动芯片自带运算放大器功能。
本申请实施例提供了一种驱动电路，如图2所示，包括：伽马芯片10，设置为提供多路初始绑点电压；伽马芯片10包括第一类输出端和第二类输出端，第一类输出端输出的初始绑点电压对应的电流小于预设的驱动电流；第二类输出端输出的初始绑点电压对应的电流大于预设的驱动电流；数据驱动芯片20，数据驱动芯片20包括处理器21和多个运算放大器22，各运算放大器22的输出端与处理器21上的各端点对应连接，各运算放大器22的输出端还与自身的反相输入端连接；伽马电路10的第一类输出端连接至一部分运算放大器22的同相输入端；伽马电路10的第二类输出端连接至另一部分运算放大器22的反相输入端，且该运算放大器22的同相输入端接地；其中，预设的驱动电流是表征驱动显示面板所需驱动能力的电流，数据驱动芯片20的输出端与显示面板连接。
其中，伽马芯片10是指能够输出多个伽马电压，来对数据驱动信号进行校正的器件。伽马芯片10中不局限于只包括CPU，还可以包括分压电阻等元件。采用上述连接，对于初始绑点电压对应的电流小于预设的驱动电流的情况，连接该伽马芯片10的第一类输出端和运算放大器22的同相输入端，初始绑点电压经运算放大器22的同相输入端输送至运算放大器22，经放大后，由运算放大器22的输出端输出至处理器21上对应的端点，运算放大器22的反相输入端与其输出端连接，形成负反馈。例如，如图2所示，对于伽马芯 片10的G13输出端输出的初始绑点电压对应的电流小于预设的驱动电流，所以需要对该初始绑点电压进行放大，G13输出端输出的初始绑点电压从运算放大器22的同相输入端输入，运算放大器22处于放大状态，放大后生成的新的绑点电压，其驱动能力得到放大，并由输出端输送至处理器21上的G13’端点。需要说明的是，为避免各初始绑点电压在经运算放大器22放大时相互影响，各初始绑点电压与各运算放大器22一一对应。
同理，当初始绑点电压对应的电流大于预设的驱动电流时，连接运算放大器22的反相输入端和伽马芯片10的第二类输出端，并将该运算放大器22的同相输入端接地，由于该运算放大器22的同相输入端接地，该同相输入信号为零，又由于该运算放大器22的输出端与其反相输入端连接，所以初始绑点电压经运算放大器22的反相输入端直接输送至处理器21上对应的端点。例如，如图2所示，伽马芯片10的G14输出端输出的初始绑点电压对应的电流大于预设的驱动电流，则该G14输出端与运算放大器22的反相输入端连接，该运算放大器22的同相输入端接地，同相输入端无输入信号影响，即直接将该初始绑点电压传送至处理器21上的G14’端点。
本申请实施例提供的驱动电路，通过利用数据驱动芯片20上自带的运算放大器22，然后根据伽马芯片10输出的各初始绑点电压对应的电流是否能够满足显示面板的驱动能力要求(即判断该电流是否大于预设的驱动电流)，对于不能够满足驱动能力要求的初始绑点电压，建立该路初始绑点电压对应的第一类输出端和对应的运算放大器22的同相输入端之间的通信关系，使得该路初始绑点电压能够经过该运算放大器22放大电流，放大后的输出的绑点电压的电流增大，能够满足驱动能力要求，输送至处理器21上对应的端点。而对于已经能够满足驱动能力要求的初始绑点电压，无需进行放大，则可以将该初始绑点电压对应的第二类输出端连接对应运算放大器22的反相输入端，经反相输入端直接输送至处理器21，其中，运算放大器22的同相输入端接地且输入为零。通过这种连接，使得对应的运算放大器22不起放大作用，将伽马芯片10产生的初始绑点电压直接输送至处理器21上对应的端点。利 用自带的运算放大器22，对不同的初始绑点电压采用不同的连接方式，使得输入至处理器21的各绑点电压均能满足显示面板的驱动能力要求，结构简单，成本低。
在其中一个实施例中，如图2所示，运算放大器22为电压跟随器。电压跟随器是实现输出电压跟随输入电压的一类电子元件，电压跟随器的显著特点就是，输入阻抗高，而输出阻抗低。一般来说，输入阻抗可以达到几兆欧姆，而输出阻抗低，通常只有几欧姆，甚至更低，电压跟随器的电压放大倍数恒小于且接近1，而输出信号的电流可以实现放大。本申请实施例中数据驱动芯片20上的运算放大器22采用电压跟随器，对于伽马芯片10的第一类输出端输出的初始绑点电压，经过对应的电压跟随器后，其输出的绑点电压的电位基本不变，而电流得到放大，即驱动能力得到放大，满足显示面板的驱动能力要求。
本申请实施例提供的驱动电路中，数据驱动芯片20中的运算放大器22为电压跟随器，主要起电压跟随作用和电流放大作用，使得绑点电压经过放大后生成的新的绑点电压的电位能够满足绑点电压水平，且电流满足显示面板的驱动能力要求。
在其中一个实施例中，如图2所示，驱动电路还包括：第一电阻R1，第一电阻R1的一端连接伽马芯片10的第一类输出端，第一电阻R1的另一端连接对应的运算放大器22的同相输入端。
在其中一个实施例中，如图2所示，驱动电路还包括：第二电阻R2，第二电阻R2的一端连接伽马芯片10的第二类输出端，第二电阻R2的另一端连接对应的运算放大器22的反相输入端；第三电阻R3，第三电阻R3的一端连接运算放大器22的同相输入端，第三电阻R3的另一端接地。
在其中一个实施例中，如图2所示，第一电阻R1为零欧姆电阻。零欧姆电阻又称为跨接电阻器，是一种特殊用途的电阻，零欧姆电阻并非真正的阻值为零，欧姆电阻实际是电阻值很小的电阻。采用零欧姆电阻，可使得第一类输出端输出的初始绑点电压经该零欧姆电阻后，其电流驱动能力大小几乎 不变，可以保证输送至运算放大器22的绑点电压的驱动能力损耗最小。
在其中一个实施例中，如图2所示，第二电阻R2和第三电阻R3均为零欧姆电阻。同上，采用零欧姆电阻，可以保证对绑点电压的驱动能力损耗降到最小。并且将运算放大器22的同相输入端采用零欧姆的第三电阻R3接地，可以使得各个运算放大器22单点接地，各自成为独立系统，抗干扰能力强。
另一方面，本申请实施例还提供了一种驱动电路连接信息确定方法，其中，驱动电路包括：伽马芯片10，设置为提供多路初始绑点电压；数据驱动芯片20，数据驱动芯片20包括处理器21和多个运算放大器22，各运算放大器22的输出端与处理器21上的各端点对应连接，各运算放大器22的输出端还与自身的反相输入端连接；
如图3所示，驱动电路连接信息确定方法包括：
S10：获取伽马芯片输出的各路初始绑点电压对应的电流；
S20：判断电流是否大于预设的驱动电流；
S30：若电流小于预设的驱动电流，则判定电流对应的伽马芯片的输出端为第一类输出端，并生成第一连接信息，第一连接信息使伽马芯片的第一类输出端对应连接一部分运算放大器的同相输入端；
S40：若电流大于预设的驱动电流，则判定电流对应的伽马芯片的输出端为第二类输出端，并生成第二连接信息，第二连接信息使伽马芯片的第二类输出端对应连接另一部分运算放大器的反相输入端，将该运算放大器的同相输入端接地；
其中，预设的驱动电流是表征驱动显示面板所需驱动能力的电流，数据驱动芯片的输出端与显示面板连接。
其中，伽马芯片等释义与上述实施例中相同，在此不做赘述。对于已有的伽马芯片和数据驱动芯片，需要对二者进行连接，使得数据驱动芯片接收到的伽马电压与灰阶之间的关系能够接近或无限接近gamma 2.2曲线。具体地，先获取伽马芯片输出的各初始绑点电压对应的电流，判断每一路电流与预设的驱动电流的大小关系，若该电流小于预设的驱动电流，说明该电流对 应的那路初始绑点电压不能满足显示面板的驱动能力要求，判定伽马芯片的该类输出端为第一类输出端，并生成第一连接信息，第一连接信息是使伽马芯片的第一类输出端和运算放大器的同相输入端连接的信息。伽马芯片的第一类输出端和运算放大器的同相输入端连接后，伽马芯片的第一类输出端输出的初始绑点电压可以经过对应的运算放大器放大电流后输送至处理器上对应的端点。而对于初始绑点电压对应的电流大于预设的驱动电流的情况，说明该路初始绑点电压已经能够满足显示面板的驱动能力要求，则判定伽马芯片的该类输出端为第二类输出端，并生成第二连接信息，第二连接信息是使伽马芯片的第二类输出端与其对应的运算放大器的反相输入端连接，且将该运算放大器的同相输入端接地的信息，即同相输入端输入为零，第二类输出端输出的初始绑点电压经反相输入端直接输送至处理器上对应的端点。利用该方法，利用数据驱动芯片上自带的运算放大器，经过简单的电路连接，实现运算放大器放大功能的选用或不选用，使得输出至处理器上各端点(G1’～G14’)绑点电压能够满足显示面板的驱动能力要求，结构简单，成本低。
在其中一个实施例中，如图4所示，驱动电路连接信息确定方法还包括步骤：
S50：根据预存的伽马芯片的图像数据、数据驱动芯片的图像数据、第一连接信息和第二连接信息，显示伽马芯片的各第一类输出端和各第二类输出端分别与各运算放大器对应连接的布图。
上述图像数据均可以表示能够反映真实物体图像的特征参数等。对于后续试样或生产中，常会需要进行人工作业或机器作业。为方便后续作业，可以根据预存的伽马芯片的图像数据、数据驱动芯片的图像数据，显示伽马芯片图像和数据驱动芯片的图像，然后根据伽马芯片的图像数据中各输出端的坐标、数据驱动芯片中处理器的各端口坐标以及第一、第二连接信息，生成各伽马芯片的第一、第二类输出端与各运算放大器之间的布线，继而生成驱动电路架构图，以引导工人按照显示的布图进行作业。
在其中一个实施例中，如图4所示，驱动电路连接信息确定方法还包括步骤：
S60：发送第一连接信息和第二连接信息至控制终端。
其中，控制终端包括PC(personal computer，个人计算机)、控制器等。例如，在生产车间中，工业机器人中的控制器接收第一连接信息和第二连接信息。控制终端还可以是PC，发送该第一连接信息和第二连接信息至该PC。该PC在接收到连接信息后，可以将接收到的连接信息与对应的伽马芯片、数据驱动芯片的参数(编号、各引脚在操作台上的坐标等)对应存储。一方面有利于后期维修时提供修改依据。另一方面，可以根据接收的第一连接信息和第二连接信息以及存储的伽马芯片的参数和数据驱动芯片的参数，生成生产制造方案，以指示执行机构进行生产作业。
应该理解的是，虽然图3-4的流程图中的各个步骤按照箭头的指示依次显示，但是这些步骤并不是必然按照箭头指示的顺序依次执行。除非本文中有明确的说明，这些步骤的执行并没有严格的顺序限制，这些步骤可以以其它的顺序执行。而且，图3-4中的至少一部分步骤可以包括多个子步骤或者多个阶段，这些子步骤或者阶段并不必然是在同一时刻执行完成，而是可以在不同的时刻执行，这些子步骤或者阶段的执行顺序也不必然是依次进行，而是可以与其它步骤或者其它步骤的子步骤或者阶段的至少一部分轮流或者交替地执行。
本申请实施例还提供了一种驱动电路连接信息确定装置，如图5所示，包括：
电流获取单元101，设置为获取伽马芯片输出的各路初始绑点电压对应的电流；
驱动能力判断单元102，设置为判断电流是否大于预设的驱动电流；
第一连接信息生成单元103，设置为在判断电流小于预设的驱动电流时，则判定该电流对应的伽马芯片的输出端为第一类输出端，并生成第一连接信息，该第一连接信息使伽马芯片的第一类输出端对应连接一部分运算放大器 的同相输入端；
第二连接信息生成单元104，设置为在判断电流大于预设的驱动电流时，则判定该电流对应的伽马芯片的输出端为第二类输出端，并生成第二连接信息，该第二连接信息使伽马芯片的第二类输出端对应连接另一部分运算放大器的反相输入端，并使运算放大器的同相输入端接地；
其中，预设的驱动电流是表征驱动显示面板所需驱动能力的电流，数据驱动芯片的输出端与显示面板连接。
在其中一个实施例中，如图6所示，驱动电路连接信息确定装置，还包括：
布图显示控制单元105，设置为根据预存的伽马芯片的图像数据、数据驱动芯片的图像数据、第一连接信息和第二连接信息，显示伽马芯片的各第一类输出端和各第二类输出端分别与各运算放大器对应连接的布图。
在其中一个实施例中，如图6所示，驱动电路连接信息确定装置，还包括：
连接信息发送单元106，设置为发送第一连接信息和第二连接信息至控制终端。
其中，关于驱动电路连接信息确定装置的具体限定可以参见上文中对于驱动电路连接信息确定方法的限定，在此不再赘述。上述驱动电路连接信息确定装置中的各个模块可全部或部分通过软件、硬件及其组合来实现。上述各模块可以硬件形式内嵌于或独立于计算机设备中的处理器中，也可以以软件形式存储于计算机设备中的存储器中，以便于处理器调用执行以上各个模块对应的操作。
一种显示装置，如图7所示，包括显示面板1和上述驱动电路2。驱动电路2提供满足驱动显示面板1的驱动能力要求的绑点电压，经后续处理输送至显示面板1，进行显示驱动。其中，显示面板1可以是液晶显示面板或OLED(Organic Light-Emitting Diode，有机发光二极管)显示面板等。显示面板1可以包括阵列基板12和彩色滤光片11。根据本申请实施例提供的显示装置， 利用数据驱动芯片20自带的OP 22(Operational Amplifier，运算放大器)，对驱动能力不足的初始绑点电压进行放大，放大后的新的绑点电压输送至数据驱动芯片20上的处理器21，对数据信号进行伽马校正，以驱动显示面板1进行显示，显示品质好。需要说明的是，数据驱动芯片可以是多个，每个数据驱动芯片20上的运算放大器22所输出的新的绑点电压输送到各个数据驱动芯片20上的处理器21，使得各个数据驱动芯片20的处理器最终输出的绑点电压个数满足驱动要求。
在一个实施例中，提供了一种计算机设备，该计算机设备可以是终端，其内部结构图可以如图8所示。该计算机设备包括通过系统总线连接的处理器、存储器、网络接口、显示屏和输入装置。其中，该计算机设备的处理器用于提供计算和控制能力。该计算机设备的存储器包括非易失性存储介质、内存储器。该非易失性存储介质存储有操作系统和计算机程序。该内存储器为非易失性存储介质中的操作系统和计算机程序的运行提供环境。该计算机设备的网络接口用于与外部的终端通过网络连接通信。该计算机程序被处理器执行时以实现一种驱动电路连接信息确定方法。该计算机设备的显示屏可以是液晶显示屏或者电子墨水显示屏，该计算机设备的输入装置可以是显示屏上覆盖的触摸层，也可以是计算机设备外壳上设置的按键、轨迹球或触控板，还可以是外接的键盘、触控板或鼠标等。
本领域技术人员可以理解，图8中示出的结构，仅仅是与本申请方案相关的部分结构的框图，并不构成对本申请方案所应用于其上的计算机设备的限定，具体的计算机设备可以包括比图中所示更多或更少的部件，或者组合某些部件，或者具有不同的部件布置。
一种计算机设备，包括存储器和处理器，存储器存储有计算机程序，处理器执行计算机程序时实现以下步骤：
S10：获取伽马芯片输出的各路初始绑点电压对应的电流；
S20：判断电流是否大于预设的驱动电流；
S30：若电流小于预设的驱动电流，则判定电流对应的伽马芯片的输出端 为第一类输出端，并生成第一连接信息，第一连接信息使伽马芯片的第一类输出端对应连接一部分运算放大器的同相输入端；
S40：若电流大于预存的驱动电流，则判定电流对应的伽马芯片的输出端为第二类输出端，并生成第二连接信息，第二连接信息使伽马芯片的第二类输出端对应连接另一部分运算放大器的反相输入端，将该运算放大器的同相输入端接地；
其中，预设的驱动电流是表征驱动显示面板所需驱动能力的电流，数据驱动芯片的输出端与显示面板连接。
采用本申请实施例提供的计算机设备，可根据伽马芯片输出的初始绑点电压，判断对应的电流是否满足驱动能力要求，若判断对应的电流满足驱动能力要求时，生成第一连接信息，该第一连接信息使不满足驱动能力要求的第一类输出端连接运算放大器的同相输入端，使用运算放大器的放大功能。若判断对应的电流能够满足驱动能力要求时，生成第二连接信息，该第二连接信息使伽马芯片的第二类输出端与运算放大器的反相输入端连接，且使该运算放大器的同相输入端接地，所以，未使用运算放大器的放大功能。伽马芯片的第二类输出端输出的初始绑点电压经运算放大器的反相输入端直接输送至数据驱动芯片上的处理器上对应的端点。
需要说明的是，本申请实施例提供的计算机设备的处理器还可以实现上述驱动电路连接信息确定方法中的其他步骤。
一种计算机可读存储介质，其上存储有计算机程序，计算机程序被处理器执行时实现以下步骤：
S10：获取伽马芯片输出的各路初始绑点电压对应的电流；
S20：判断电流是否大于预设的驱动电流；
S30：若电流小于预设的驱动电流，则判定电流对应的伽马芯片的输出端为第一类输出端，并生成第一连接信息，第一连接信息使伽马芯片的第一类输出端对应连接一部分运算放大器的同相输入端；
S40：若电流大于预存的驱动电流，则判定电流对应的伽马芯片的输出端 为第二类输出端，并生成第二连接信息，第二连接信息使伽马芯片的第二类输出端对应连接另一部分运算放大器的反相输入端，并使该运算放大器的同相输入端接地；
其中，预设的驱动电流是表征驱动显示面板所需驱动能力的电流，数据驱动芯片的输出端与显示面板连接。
本领域普通技术人员可以理解实现上述实施例方法中的全部或部分流程，是可以通过计算机程序来指令相关的硬件来完成，所述的计算机程序可存储于一非易失性计算机可读取存储介质中，该计算机程序在执行时，可包括如上述各方法的实施例的流程。其中，本申请所提供的各实施例中所使用的对存储器、存储、数据库或其它介质的任何引用，均可包括非易失性和/或易失性存储器。非易失性存储器可包括只读存储器(ROM)、可编程ROM(PROM)、电可编程ROM(EPROM)、电可擦除可编程ROM(EEPROM)或闪存。易失性存储器可包括随机存取存储器(RAM)或者外部高速缓冲存储器。作为说明而非局限，RAM以多种形式可得，诸如静态RAM(SRAM)、动态RAM(DRAM)、同步DRAM(SDRAM)、双数据率SDRAM(DDRSDRAM)、增强型SDRAM(ESDRAM)、同步链路(Synchlink)DRAM(SLDRAM)、存储器总线(Rambus)直接RAM(RDRAM)、直接存储器总线动态RAM(DRDRAM)、以及存储器总线动态RAM(RDRAM)等。
以上所述实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上所述实施例仅表达了本申请的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对本申请专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干变形和改进，这些都属于本申请的保护范围。因此，本申请专利的保护范围应以所附权利要求为准。

Claims (17)

  1. 一种驱动电路，包括：
    伽马芯片，设置为提供多路初始绑点电压；所述伽马芯片包括第一类输出端和第二类输出端，所述第一类输出端输出的初始绑点电压对应的电流小于预设的驱动电流；所述第二类输出端输出的初始绑点电压对应的电流大于所述预设的驱动电流；和
    数据驱动芯片，所述数据驱动芯片包括处理器和多个运算放大器，各所述运算放大器的输出端与所述处理器上的各端点对应连接，各所述运算放大器的输出端还与自身的反相输入端连接；所述伽马电路的第一类输出端连接至一部分所述运算放大器的同相输入端；所述伽马电路的第二类输出端连接至另一部分所述运算放大器的反相输入端，且所述运算放大器的同相输入端接地；
    其中，所述预设的驱动电流是表征驱动显示面板所需驱动能力的电流，所述数据驱动芯片的输出端与所述显示面板连接。
  2. 根据权利要求1所述的驱动电路，其中，所述多个运算放大器为电压跟随器。
  3. 根据权利要求2所述的驱动电路，还包括：
    第一电阻，所述第一电阻的一端连接所述伽马芯片的第一类输出端，所述第一电阻的另一端连接对应的运算放大器的同相输入端。
  4. 根据权利要求2或3所述的驱动电路，还包括：
    第二电阻，所述第二电阻的一端连接所述伽马芯片的第二类输出端，所述第二电阻的另一端连接对应的运算放大器的反相输入端；
    第三电阻，所述第三电阻的一端连接所述运算放大器的同相输入端，所 述第三电阻的另一端接地。
  5. 根据权利要求3所述的驱动电路，其中，所述第一电阻为零欧姆电阻。
  6. 根据权利要求4所述的驱动电路，其中，所述第二电阻和所述第三电阻均为零欧姆电阻。
  7. 根据权利要求1所述的驱动电路，其中，各所述初始绑点电压与各运算放大器一一对应。
  8. 一种驱动电路连接信息确定方法，其中，驱动电路包括：伽马芯片，设置为提供多路初始绑点电压；数据驱动芯片，所述数据驱动芯片包括处理器和多个运算放大器，各所述运算放大器的输出端与所述处理器上的各端点对应连接，各所述运算放大器的输出端还与自身的反相输入端连接；其中，所述方法包括：
    获取所述伽马芯片输出的各路初始绑点电压对应的电流；
    判断所述电流是否大于预设的驱动电流；
    若所述电流小于所述预设的驱动电流，则判定所述电流对应的伽马芯片的输出端为第一类输出端，并生成第一连接信息，所述第一连接信息使所述伽马芯片的第一类输出端对应连接一部分所述运算放大器的同相输入端；
    若所述电流大于所述预设的驱动电流，则判定所述电流对应的伽马芯片的输出端为第二类输出端，并生成第二连接信息，所述第二连接信息使所述伽马芯片的第二类输出端对应连接另一部分所述运算放大器的反相输入端，并使所述运算放大器的同相输入端接地；
    其中，所述预设的驱动电流是表征驱动显示面板所需驱动能力的电流，所述数据驱动芯片的输出端与所述显示面板连接。
  9. 根据权利要求8所述的驱动电路连接信息确定方法，还包括：
    根据预存的伽马芯片的图像数据、数据驱动芯片的图像数据、所述第一连接信息和所述第二连接信息，显示驱动电路的连接布图。
  10. 根据权利要求8所述的驱动电路连接信息确定方法，还包括：
    根据预存的伽马芯片的图像数据、数据驱动芯片的图像数据，显示伽马芯片图像和数据驱动芯片的图像。
  11. 根据权利要求8所述的驱动电路连接信息确定方法，其中，所述多个运算放大器为电压跟随器。
  12. 根据权利要求9所述的驱动电路连接信息确定方法，还包括：
    根据所述驱动电路的连接布图，生成驱动电路架构图。
  13. 根据权利要求8所述的驱动电路连接信息确定方法，还包括：
    发送所述第一连接信息和所述第二连接信息至控制终端。
  14. 根据权利要求13所述的驱动电路连接信息确定方法，还包括：
    所述控制终端接收到所述第一连接信息和所述第二连接信息后，将接收到的所述第一连接信息和所述第二连接信息与对应的伽马芯片的参数、数据驱动芯片的参数对应存储。
  15. 根据权利要求14所述的驱动电路连接信息确定方法，还包括：
    根据接收到的所述第一连接信息和所述第二连接信息以及存储的所述伽马芯片的参数和所述数据驱动芯片的参数，生成所述驱动电路的生产制造方案。
  16. 一种显示装置，包括：
    显示面板；和
    驱动电路，所述驱动电路包括：
    伽马芯片，设置为提供多路初始绑点电压；所述伽马芯片包括第一类输出端和第二类输出端，所述第一类输出端输出的初始绑点电压对应的电流小于预设的驱动电流；所述第二类输出端输出的初始绑点电压对应的电流大于所述预设的驱动电流；和
    数据驱动芯片，所述数据驱动芯片包括处理器和多个运算放大器，各所述运算放大器的输出端与所述处理器上的各端点对应连接，各所述运算放大器的输出端还与自身的反相输入端连接；所述伽马电路的第一类输出端连接至一部分所述运算放大器的同相输入端；所述伽马电路的第二类输出端连接至另一部分所述运算放大器的反相输入端，且所述运算放大器的同相输入端接地；
    其中，所述预设的驱动电流是表征驱动显示面板所需驱动能力的电流，所述数据驱动芯片的输出端与所述显示面板连接。
  17. 根据权利要求16所述的显示装置，其中，所述多个运算放大器为电压跟随器。
PCT/CN2020/088752 2019-05-06 2020-05-06 驱动电路、驱动电路连接信息确定方法和显示装置 Ceased WO2020224587A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US17/298,217 US11488504B2 (en) 2019-05-06 2020-05-06 Driving circuit, method for determining connection information of driving circuit and display device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201910370697.4 2019-05-06
CN201910370697.4A CN110176206B (zh) 2019-05-06 2019-05-06 驱动电路、驱动电路连接信息确定方法和显示装置

Publications (1)

Publication Number Publication Date
WO2020224587A1 true WO2020224587A1 (zh) 2020-11-12

Family

ID=67691048

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2020/088752 Ceased WO2020224587A1 (zh) 2019-05-06 2020-05-06 驱动电路、驱动电路连接信息确定方法和显示装置

Country Status (3)

Country Link
US (1) US11488504B2 (zh)
CN (1) CN110176206B (zh)
WO (1) WO2020224587A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110176206B (zh) 2019-05-06 2021-06-18 重庆惠科金渝光电科技有限公司 驱动电路、驱动电路连接信息确定方法和显示装置

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080259013A1 (en) * 2007-04-19 2008-10-23 Seiko Epson Corporation Gamma correction circuit
US7928954B1 (en) * 2007-07-11 2011-04-19 Novatek Microelectronics Corp. Source driver with charge sharing
CN109256104A (zh) * 2018-11-22 2019-01-22 惠科股份有限公司 显示装置、显示面板电源系统及其电路
CN109584781A (zh) * 2019-02-14 2019-04-05 合肥奕斯伟集成电路有限公司 一种伽玛运算放大器及驱动电路
CN109671406A (zh) * 2019-01-09 2019-04-23 惠科股份有限公司 伽马芯片、显示面板驱动电路和显示装置
CN110176206A (zh) * 2019-05-06 2019-08-27 重庆惠科金渝光电科技有限公司 驱动电路、驱动电路连接信息确定方法和显示装置
CN110223654A (zh) * 2019-06-10 2019-09-10 惠科股份有限公司 驱动模组和显示装置

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100604915B1 (ko) * 2004-10-28 2006-07-28 삼성전자주식회사 보간 증폭기 방식을 이용하는 평판 표시 장치의 구동 방법및 소스 드라이버
US7880692B2 (en) * 2007-01-09 2011-02-01 Himax Technologies Limited Driver circuit of AMOLED with gamma correction
KR100918698B1 (ko) * 2007-11-20 2009-09-22 주식회사 실리콘웍스 오프셋 보상 감마 버퍼 및 이를 이용하는 계조 전압 발생회로
KR20090054754A (ko) * 2007-11-27 2009-06-01 시트로닉스 테크놀로지 코퍼레이션 저전력 소스 구동 장치
CN101847378B (zh) * 2009-03-27 2012-07-04 北京京东方光电科技有限公司 源极驱动芯片
CN103310752B (zh) * 2013-06-05 2015-07-22 合肥京东方光电科技有限公司 伽马电压调整方法及伽马电压调整系统
US8884677B1 (en) * 2013-11-18 2014-11-11 Himax Technologies Limited Gamma operational amplifier circuit, source driver and method for eliminating voltage offset
KR102130142B1 (ko) * 2013-12-31 2020-07-06 엘지디스플레이 주식회사 감마기준전압 발생회로 및 이를 포함하는 표시장치
US20150187300A1 (en) * 2013-12-31 2015-07-02 Shenzhen China Star Optoelectronics Technology Co., Ltd. Driving circuit of lcd panel, the lcd panel, and lcd device
US9275600B2 (en) * 2014-03-25 2016-03-01 Shenzhen China Star Optoelectronics Technology Co., Ltd Source electrode driving module with Gamma correction and LCD panel
CN104036742B (zh) * 2014-05-26 2016-07-20 京东方科技集团股份有限公司 伽玛参考电压产生电路、v-t曲线测试方法和显示装置
CN104240665A (zh) * 2014-09-16 2014-12-24 深圳市华星光电技术有限公司 一种源极驱动电路及显示装置
CN105096784B (zh) * 2015-08-07 2017-07-25 京东方科技集团股份有限公司 检测电路及检测方法、显示面板及控制方法、显示装置
CN106057141A (zh) * 2016-05-04 2016-10-26 深圳市华星光电技术有限公司 伽马参考电压产生电路以及显示器
KR102576541B1 (ko) * 2016-10-13 2023-09-11 엘지디스플레이 주식회사 터치 디스플레이 장치 및 그 구동 방법과, 구동 회로, 데이터 구동 회로 및 게이트 구동 회로
KR102642577B1 (ko) * 2016-12-12 2024-02-29 엘지디스플레이 주식회사 외부 보상용 드라이버 집적회로와 그를 포함한 표시장치, 및 표시장치의 데이터 보정방법
CN106548760B (zh) * 2017-01-16 2019-06-07 京东方科技集团股份有限公司 一种伽马电压产生电路及控制方法、源极驱动器
CN107492358B (zh) * 2017-09-14 2020-02-21 京东方科技集团股份有限公司 一种Gamma参考电压的产生电路及其产生方法
CN208607896U (zh) * 2018-07-03 2019-03-15 上海视涯信息科技有限公司 伽马电压产生电路、驱动电路及其显示装置
CN108847184B (zh) * 2018-07-09 2020-03-31 京东方科技集团股份有限公司 伽马电压补偿电路及补偿方法、源极驱动器和显示面板
CN108986731B (zh) * 2018-08-07 2021-10-08 京东方科技集团股份有限公司 一种显示面板及其补偿方法、显示装置
CN109509449B (zh) * 2018-12-19 2021-07-06 惠科股份有限公司 电流调节电路、驱动电路及显示装置
CN109559696B (zh) * 2018-12-24 2021-08-24 惠科股份有限公司 显示模组及其伽马电压调节方法，以及显示装置
CN109616067B (zh) * 2019-01-02 2020-09-01 合肥京东方显示技术有限公司 一种电压补偿电路及其方法、显示驱动电路、显示装置
CN109658896B (zh) * 2019-02-25 2021-03-02 京东方科技集团股份有限公司 一种伽马电压生成电路、驱动电路以及显示装置
CN109979365B (zh) * 2019-03-22 2021-08-06 惠科股份有限公司 一种调试方法、显示装置的驱动方法和显示装置
KR102713870B1 (ko) * 2019-07-09 2024-10-04 삼성전자주식회사 소스 드라이버 및 이를 포함하는 디스플레이 장치
US10878738B1 (en) * 2019-07-30 2020-12-29 Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Display product and drive chip for driving display panel

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080259013A1 (en) * 2007-04-19 2008-10-23 Seiko Epson Corporation Gamma correction circuit
US7928954B1 (en) * 2007-07-11 2011-04-19 Novatek Microelectronics Corp. Source driver with charge sharing
CN109256104A (zh) * 2018-11-22 2019-01-22 惠科股份有限公司 显示装置、显示面板电源系统及其电路
CN109671406A (zh) * 2019-01-09 2019-04-23 惠科股份有限公司 伽马芯片、显示面板驱动电路和显示装置
CN109584781A (zh) * 2019-02-14 2019-04-05 合肥奕斯伟集成电路有限公司 一种伽玛运算放大器及驱动电路
CN110176206A (zh) * 2019-05-06 2019-08-27 重庆惠科金渝光电科技有限公司 驱动电路、驱动电路连接信息确定方法和显示装置
CN110223654A (zh) * 2019-06-10 2019-09-10 惠科股份有限公司 驱动模组和显示装置

Also Published As

Publication number Publication date
CN110176206A (zh) 2019-08-27
US11488504B2 (en) 2022-11-01
CN110176206B (zh) 2021-06-18
US20220093021A1 (en) 2022-03-24

Similar Documents

Publication Publication Date Title
CN103915059B (zh) 多次可编程操作执行方法及用该方法的有机发光显示装置
CN104680962B (zh) 一种测试显示模组的光学特性的方法、装置及系统
AU2012316090B2 (en) Systems and methods for display temperature detection
US11322081B2 (en) Display apparatus and control method thereof
CN105161057A (zh) 一种自动校准移动终端显示屏色坐标的方法及系统
CN111192556A (zh) 控制电源芯片提供电压的方法和装置
US9514699B2 (en) Device and method for adjusting gamma voltage
CN110827755B (zh) 显示面板及装置、电源电压检测及补偿电路和方法
US10529285B2 (en) System and method for external pixel compensation
CN101442312A (zh) 模拟数字转换器
CN105825819B (zh) 显示模组和显示模组的亮度调节方法
CN113160758A (zh) 直下式mini-LED背光模组及显示装置的亮度补偿方法和校正系统
US11600806B2 (en) Auxiliary method and device for OTP adjustment of display panel
CN108022546B (zh) 信号补偿方法、装置及系统、源极驱动芯片、存储介质
KR102527852B1 (ko) 게이트 쉬프트량을 자동으로 설정하는 표시 장치 및 표시 장치의 구동 방법
WO2020224587A1 (zh) 驱动电路、驱动电路连接信息确定方法和显示装置
US10777106B2 (en) Display quality monitoring and calibration
WO2020249010A1 (zh) 时序控制器控制方法和时序控制器
WO2019037538A1 (zh) 一种触控基板及其制造方法、触控装置
US20150302788A1 (en) Gamma correction circuit and display device
CN101430849A (zh) 显示器驱动电路的测试装置
US9852018B2 (en) Method of detecting an error of a multi-time programmable operation, and organic light emitting display device employing the same
CN118486273A (zh) 显示装置
CN113963664B (zh) 基于级联驱动芯片的显示方法、显示器及可读存储介质
CN110988536B (zh) 直流电压上升跌落测试装置、测试控制方法及装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 20802911

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 20802911

Country of ref document: EP

Kind code of ref document: A1