WO2020200475A1 - Flat antenna device and method of its fabrication - Google Patents

Flat antenna device and method of its fabrication Download PDF

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Publication number
WO2020200475A1
WO2020200475A1 PCT/EP2019/058663 EP2019058663W WO2020200475A1 WO 2020200475 A1 WO2020200475 A1 WO 2020200475A1 EP 2019058663 W EP2019058663 W EP 2019058663W WO 2020200475 A1 WO2020200475 A1 WO 2020200475A1
Authority
WO
WIPO (PCT)
Prior art keywords
aob
module
pcb
cavity
mold material
Prior art date
Application number
PCT/EP2019/058663
Other languages
French (fr)
Inventor
Ezio Perrone
Stefan Martens
Chih I LIN
Achim Strass
Martin Nirschl
Xianchao ZHENG
Dominic Maurath
Stefan RAATZ
Original Assignee
Huawei Technologies Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huawei Technologies Co., Ltd. filed Critical Huawei Technologies Co., Ltd.
Priority to EP19716402.3A priority Critical patent/EP3949009A1/en
Priority to PCT/EP2019/058663 priority patent/WO2020200475A1/en
Publication of WO2020200475A1 publication Critical patent/WO2020200475A1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00—Details of, or arrangements associated with, antennas
    • H01Q1/12—Supports; Mounting means
    • H01Q1/22—Supports; Mounting means by structural association with other equipment or articles
    • H01Q1/2283—Supports; Mounting means by structural association with other equipment or articles mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package
    • H—ELECTRICITY
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    • H01L23/00—Details of semiconductor or other solid state devices
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    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H—ELECTRICITY
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    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/183—Components mounted in and supported by recessed areas of the printed circuit board
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Definitions

  • the present invention relates to the field of antennas, in particular to an Antenna-on-Board (AoB) technology.
  • the invention proposes a flat antenna module and antenna device including a radio chip, a circuit board, and antennas arranged inside and/or above the circuit board.
  • Radio dies are radio frequency integrated circuit (RFIC) dies, including transceiver and receiver chips
  • AoB technology has been proposed for different radio communication bands, e.g. the Ka-Band (28 GHz to 40 GHz) or the V-Band (60 GHz), as well as gesture radars. It can also provide effective antenna solutions to 5G and beyond, operating in the millimeter-wave bands and above.
  • AoB technology adoption in 5G requires scalability to a high number of radio dies and antennas, a high level of integration between radio die and antennas in the AoB, as well as between the AoB and a system Printed Circuit Board (PCB), high reliability, and low cost.
  • PCB Printed Circuit Board
  • TIM thermal interface material
  • the TIM layer has typically only low thermal conductivity in the range of 3-5 W/mK. This leads to an inefficient thermal management.
  • dimensional tolerances of the radio die and the system PCB lead to variation in the TIM thickness, preventing a uniform thermal distribution over several radio dies.
  • eWLB embedded wafer level ball grid array
  • FoWLP fan-out wafer-level packaging
  • embodiments of the present invention aim to provide an improved antenna device.
  • an objective is to overcome the challenges of PCB based AoB technologies, especially with respect to the thermal management of the RFICs.
  • a flat AoB antenna module and device are desired.
  • a first aspect of the invention provides an AoB module, comprising: a PCB comprising a cavity and at least one radiating element arranged in and/or on the PCB, and a RFIC die mounted inside the cavity and embedded into a mold material, wherein a bottom surface of the PCB and a surface of the mold material are on the same level.
  • a flat AoB module by use of a cavity PCB is realized by the AoB module of the first aspect.
  • the RFIC die is overmolded or embedded in, for instance, an epoxy compound.
  • the mold surface has advantageously the same level as the bottom of the PCB, and as a consequence, the whole AoB module is easier to implement with improved thermal management into an AoB device, e.g. as of the second aspect.
  • the bottom side of the AoB module is flat.
  • the fully flat AoB module allows using a standard surface-mount technology (SMT) process when assembling the AoB module to a mother/system board.
  • SMT surface-mount technology
  • the RFIC die is overmolded with the mold material in the cavity.
  • the RFIC die can be exposed as well as over-molded with a mold layer.
  • the mold material protects the RFIC die and enables a flat surface of the AoB module.
  • the mold material can also be used to implement further functionalities.
  • the mold material is a resin material, in particular epoxy.
  • the RFIC die is a bare-die with wirebonds, solder bumps or flip-chip interconnections connected to the PCB.
  • these interconnections allow the RFIC die to be physically attached to, and electrically connected to the PCB.
  • the RFIC die comprises one of a WLP, a chip scale package (CSP), or a lead frame or a laminate-PCB-based land grid array (LGA) package.
  • the RFIC itself may be a molded plastic package.
  • the mold material comprises a laser activatable material.
  • Using the laser activatable material as the mold material allows forming, for instance, a laser direct structuring (LDS) heat spreader or adding other functionalities.
  • LDS laser direct structuring
  • the bottom surface of the mold material is metallized to form a LDS heat spreader.
  • the cavity comprises two side walls, wherein the RFIC die is mounted in the cavity between the two side walls.
  • a second aspect of the invention provides an AoB device, comprising a plurality of AoB modules arranged side-by-side, wherein each AoB module is an AoB module according to the first aspect or an implementation of the first aspect, and a respective bottom side of each AoB module is on the same level.
  • the AoB device of the second aspect overcomes the challenges of PCB based AoB technologies, especially with respect to the thermal management of the RFICs.
  • the thermal management is significantly improved by using the AoB modules of the first aspect.
  • the AoB modules are assembled to a system board by a standard SMT process.
  • the whole AoB device is a flat LGA component, it can be soldered to the system PCB in a SMT process.
  • the LDS heat spreader according to an implementation of the first aspect is soldered to the system board by the SMT process.
  • the RFIC thermal interface can be soldered to the system board, particularly in the same SMT process used to connect the AoB module to the system PCB. This leads to a uniform thermal distribution of the RFIC over the large AoB device.
  • a third aspect of the invention provides a method for manufacturing an AoB device, the method comprising: manufacturing a plurality of AoB modules, comprising: forming a plurality of PCBs side-by-side, wherein for each PCB a cavity is formed and at least one radiating element is arranged in and/or on the PCB, and mounting one or more RFIC die inside of each cavity and embedding the RFIC die into a mold material, wherein a bottom surface of the PCB and a surface of the mold material are on the same level.
  • the method further comprises: assembling the plurality of AoB modules to a system board by a standard SMT process.
  • the method further comprises: connecting the RFIC die to the PCB with wirebonds, solder bumps or flip-chip interconnections.
  • the method further comprises: metallizing the bottom surface of the mold material to form a LDS heat spreader. In an implementation form of the second aspect, the method further comprises: soldering the EDS heat spreader to the system board in the SMT process.
  • the method may be provided with further implementation forms according to the above implementation forms of the first aspect.
  • the method of the second aspect thus achieves the same advantages and effects as the antenna device of the first aspect.
  • FIG. 1 shows an AoB module according to an embodiment of the invention.
  • FIG. 2 shows an AoB module according to an embodiment of the invention.
  • FIG. 3 shows an AoB module according to an embodiment of the invention.
  • FIG. 4 shows an AoB device according to an embodiment of the invention.
  • FIG. 5 shows an AoB device according to an embodiment of the invention.
  • FIG. 6 shows an AoB device according to an embodiment of the invention.
  • FIG. 7 shows an AoB device according to an embodiment of the invention.
  • FIG. 8 shows an AoB device according to an embodiment of the invention.
  • FIG. 9 shows a method according to an embodiment of the invention.
  • FIG. 1 shows an AoB module 100 according to an embodiment of the invention.
  • the AoB module 100 comprises a PCB 101, which comprises a cavity 102 and at least one radiating element 103 arranged in and/or on the PCB 102.
  • the AoB module 100 further comprises a RFIC die 104 mounted inside the cavity 102 and embedded into a mold material. A bottom surface of the PCB 101 and a surface of the mold material are on the same level.
  • a flat AoB module with cavity is proposed by embodiments of this invention.
  • the RFIC die 104 is to this end mounted inside the cavity 102 of the AoB module 100, in particular, is molded into the cavity 102.
  • the surface of the mold material having the same level as the bottom surface of the PCB 101, enables the whole AoB module 100 to become flat.
  • the bottom side of the AoB module 100 may be flat.
  • the RFIC die 104 may be overmolded with the mold material in the cavity.
  • the mold material may be a resin material, in particular an epoxy compound.
  • FIG. 2 and FIG. 3 both show AoB modules 100 according to embodiments of the invention.
  • the AoB module 100 as shown in FIG. 2 is based on the AoB module 100 as shown in FIG. 1, with further interconnections 105 between the PCB 101 and the RFIC die 104.
  • the RFIC die 104 can be a so-called bare-die with bonding wires, solder bumps or flip-chip interconnections 105 (e.g. Cu Pillar flip-chip interconnections), as shown in FIG. 2, connected to the PCB 101.
  • the RFIC die 104 can be mounted to the PCB 101 in many different ways.
  • the interconnections 105 allow the RFIC die 104 to be physically attached to, and electrically connected to the PCB 101.
  • the RFIC die 104 may comprise one of a WLP, a CSP, or a lead frame or a laminate - PCB-based LGA package. That means, the RFIC die 101 itself may be a molded plastic package.
  • the mold material may comprise a laser activatable material. That means, the cavity 102 may be formed from a commercially available laser activatable material.
  • the AoB module 100 as shown in FIG. 3 is based on the AoB module 100 as shown in FIG. 1 or FIG. 2, further comprising a LDS heat spreader 106.
  • the bottom surface of the mold material is metallized to form the LDS heat spreader 106.
  • the LDS heat spreader 106 may be arranged beneath the RFIC die 104.
  • the cavity 102 may comprise two side walls, wherein the RFIC die 104 is mounted in the cavity 102 between the two side walls. This allows an easy implementation of a two- wall cavity design for a flat AoB antenna, as shown in FIG. 8.
  • the PCB 101 of the AoB module 100 in all embodiments can comprise a plurality of PCB layers.
  • an amount of total PCB layers can vary from 6 to 20, depending on a type of PCB technology used.
  • a dimension of the cavity 102 can also vary, depending on a dimension of the RFIC die 104 and the technology used to create the cavity 102 into the PCB 101.
  • the cavity 102 can extend over 2 to 10 layers in total PCB layers of the PCB 101.
  • FIG. 4 - FIG. 8 show AoB devices 200 according to embodiments of the invention.
  • Each of these AoB devices 200 includes AoB modules 100 according to an embodiment of the invention, as shown in FIG. 1 - FIG. 3. Same elements in the figures are labelled with the same reference signs and function likewise.
  • FIG. 4 shows an AoB device 200 comprising a plurality of AoB modules 100 arranged side- by-side, wherein each AoB module 100 is an AoB module 100 according to an embodiment of the invention, as shown in either one of FIG. 1- FIG. 3. Further, a respective bottom side of each AoB module 100 of the AoB device 200 is on the same level.
  • the AoB device 200 may comprise 4 AoB modules 100. This is merely an example implementation of the AoB device 200 according to an embodiment of the invention.
  • the AoB device 200 may comprise a plurality of AoB modules 100 arranged side-by-side. Particularly, the plurality of AoB modules 100 may also be an array of AoB modules 100.
  • FIG. 5 shows an AoB device 200 based on the AoB device 200 as shown in FIG. 4.
  • the AoB modules 100 may be assembled to a system board 201, as shown in FIG.
  • each AoB module 100 has the same level as the bottom of the PCB 101 of each AoB module 100. Due to flat AoB modules 100 according to embodiments of this invention, there is no more need of BGA balls, when mounting AoB modules 100 onto the system board 201. Furthermore, there is also no more need for holes in the system board 201 to connect a heat sink to the RFIC dies 104 by a TIM.
  • BGA ball grid array
  • the AoB module 100 is the AoB module 100 as shown in FIG. 3, the AoB module 100 further comprises the LDS heat spreader 106.
  • a SMT process may be used to connect the AoB modules 100, particularly the PCBs 101, to the system PCB 201.
  • the LDS heat spreader 106 can be soldered to the system PCB 201 in the same SMT process which is used to connect the PCB 101 to the system PCB 201. This efficiently simplifies a manufacturing process of the AoB device 200.
  • the AoB module 100 with a combination of LDS metallization on the mold, i.e. the LDS heat spreader 106, leads to a direct and well controlled thermal interface of the RFIC die 104 with the system PCB 201. This results in an effective and uniform thermal management of whole AoB systems, allowing higher power and bigger size systems.
  • FIG. 6 shows an AoB device 200 based on the AoB device 200 as shown in FIG. 5.
  • the AoB device 200 is further arranged above a heat sink, as shown in FIG. 6.
  • the heat sink is arranged beneath the system PCB 201.
  • FIG. 7 particularly shows an AoB device 200 comprising, an AoB module 100 without a LDS heat spreader 106 (left side of FIG. 7), and an AoB module 100 with a LDS heat spreader 106 (right side of FIG. 7). It should also be noted that, with or without the LDS heat spreader 106, all the AoB modules 100 have a flat bottom side, and can be assembled to the system board 201 in the same SMT process.
  • FIG. 8 shows an AoB device 200 with an easy implementation of a two-wall cavity design.
  • each cavity 102 comprises two side walls, wherein the RFIC die 104 is mounted between the two side walls.
  • FIG. 9 shows a flow-diagram of a method 900 according to an embodiment of the invention.
  • the method 900 is for manufacturing an AoB device 100 according to an embodiment of the invention.
  • the method 900 comprises: a step 901 of manufacturing a plurality of AoB modules 100, which comprising a step 9011 of forming a plurality of PCB 101 side-by-side, wherein for each PCB 101 a cavity 102 is formed and at least one radiating element 103 is arranged in and/or on the PCB 101, and a step 9012 of mounting one or more RFIC die 104 inside of each cavity 102 and embedding the RFIC die 104 into a mold material.
  • a bottom surface of the PCB 102 and a surface of the mold material are on the same level.
  • the RFIC die 104 can be exposed as well as over-molded with a mold layer.
  • the method 900 of FIG. 9 may further comprise a step of assembling the plurality of AoB modules 100 to a system board 201 by a standard SMT process.
  • the method 600 may further comprise a step of connecting the RFIC die 104 to the PCB 101 with wirebonds, solder bumps or flip-chip interconnections 105.
  • the method 600 further comprises a step of metallizing the bottom surface of the mold material to form a LDS heat spreader 106.
  • the mold layer itself can be made with a laser activatable material, meaning it can form a LDS heat spreader after a metallization process.
  • the method 600 may further comprise a step of soldering the LDS heat spreader 106 to the system board 201 in the SMT process.
  • the SMT process is the same SMT process used to assemble the plurality of AoB modules 100 to the system board 201. This leads to an effective and uniform thermal management of AoB systems, allowing higher power and bigger size systems.
  • the embodiments of the present invention overcome the challenges with PCB based AoB technologies, especially for simplifying an AoB assembly process.
  • a flat AoB module and device are achieved by a combination of an AoB PCB with cavities combined with a molding technology. This decouples assembly tolerances, and allows, in combination with a LDS heat spreader, a uniform thermal management of AoB systems.
  • the embodiments of this invention offer at least the following benefits:
  • the encapsulation of the RFIC die leads to an improved reliability.
  • the RFIC thermal interface is soldered to the system board and leads to a uniform thermal distribution of the RFIC over the large AoB.
  • the whole AoB module is a flat LGA component and can be soldered to the system PCB in the same SMT process which is used to connect other components to the system PCB.
  • the system PCB will become easier and cheaper since there is no more need for holes in the system PCB to connect the heat sink to the RFIC dies by a TIM.

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Abstract

The present invention relates to an AoB module and device. The AoB module comprises a PCB comprising a cavity and at least one radiating element arranged in and/or on the PCB. The AoB module further comprises a RFIC die mounted inside the cavity and embedded into a mold material. In particular, a bottom surface of the PCB and a surface of the mold material are on the same level. Accordingly, the AoB device comprises a plurality of AoB modules arranged side-by-side. In particular, a respective bottom side of each AoB module is on the same level. A method for manufacturing such AoB device is also provided.

Description

FLAT ANTENNA DEVICE AND METHOD OF ITS FABRICATION
TECHNICAL FIELD
The present invention relates to the field of antennas, in particular to an Antenna-on-Board (AoB) technology. The invention proposes a flat antenna module and antenna device including a radio chip, a circuit board, and antennas arranged inside and/or above the circuit board.
BACKGROUND
The AoB technology, also called Antenna-in-Package (AiP) technology, combines antennas with radio dies into a surface mounted device (SMD). It represents an innovative and important development in the miniaturization of wireless communications systems in the recent years. Radio dies are radio frequency integrated circuit (RFIC) dies, including transceiver and receiver chips
AoB technology has been proposed for different radio communication bands, e.g. the Ka-Band (28 GHz to 40 GHz) or the V-Band (60 GHz), as well as gesture radars. It can also provide effective antenna solutions to 5G and beyond, operating in the millimeter-wave bands and above.
In particular, AoB technology adoption in 5G requires scalability to a high number of radio dies and antennas, a high level of integration between radio die and antennas in the AoB, as well as between the AoB and a system Printed Circuit Board (PCB), high reliability, and low cost.
Current solutions for AoB technology have limitations, in particular when it comes to providing simple integration of the radio dies, and high performance thermal and electrical connections between the radio dies, the system board, and the antenna board. However, these are mandatory for low cost / high volume and high performances driven AoB products.
For instance, in a PCB based AoB technology, flip chip radio dies with exposed backsides are connected to a heatsink, with a so-called thermal interface material (TIM) through holes in a system PCB. The TIM layer has typically only low thermal conductivity in the range of 3-5 W/mK. This leads to an inefficient thermal management. In addition, dimensional tolerances of the radio die and the system PCB lead to variation in the TIM thickness, preventing a uniform thermal distribution over several radio dies. Another example is an embedded wafer level ball grid array (eWLB) or a fan-out wafer-level packaging (FoWLP), wherein radio dies are embedded in a mold structure with same conductor layers for antenna and connections to a system PCB. The biggest challenges are thermal management of the RFIC die, as well as limitations in the antennas deployment.
Thus, a solution allowing higher power and bigger size antennas with an effective and uniform thermal management of AoB systems is desired. Overall, a lower cost solution, allowing simple system integration with high performance electrical and thermal connections between the radio dies, the system board and the antenna board is thus desired.
SUMMARY
In view of the above-mentioned disadvantages, embodiments of the present invention aim to provide an improved antenna device. In particular, an objective is to overcome the challenges of PCB based AoB technologies, especially with respect to the thermal management of the RFICs. To this end, a flat AoB antenna module and device are desired.
The objective is achieved by embodiments of the invention as described in the enclosed independent claims. Advantageous implementations of embodiments of the invention are further defined in the dependent claims.
A first aspect of the invention provides an AoB module, comprising: a PCB comprising a cavity and at least one radiating element arranged in and/or on the PCB, and a RFIC die mounted inside the cavity and embedded into a mold material, wherein a bottom surface of the PCB and a surface of the mold material are on the same level.
To overcome the challenges with PCB based AoB technologies, especially regarding the thermal management of the RFIC dies, a flat AoB module by use of a cavity PCB is realized by the AoB module of the first aspect. The RFIC die is overmolded or embedded in, for instance, an epoxy compound. The mold surface has advantageously the same level as the bottom of the PCB, and as a consequence, the whole AoB module is easier to implement with improved thermal management into an AoB device, e.g. as of the second aspect. In an implementation form of the first aspect, the bottom side of the AoB module is flat.
The fully flat AoB module allows using a standard surface-mount technology (SMT) process when assembling the AoB module to a mother/system board.
In an implementation form of the first aspect, the RFIC die is overmolded with the mold material in the cavity.
During molding into the cavity, the RFIC die can be exposed as well as over-molded with a mold layer. The mold material protects the RFIC die and enables a flat surface of the AoB module. The mold material can also be used to implement further functionalities.
In an implementation form of the first aspect, the mold material is a resin material, in particular epoxy.
In an implementation form of the first aspect, the RFIC die is a bare-die with wirebonds, solder bumps or flip-chip interconnections connected to the PCB.
Particularly, these interconnections allow the RFIC die to be physically attached to, and electrically connected to the PCB.
In an implementation form of the first aspect, the RFIC die comprises one of a WLP, a chip scale package (CSP), or a lead frame or a laminate-PCB-based land grid array (LGA) package.
This means that the RFIC itself may be a molded plastic package.
In an implementation form of the first aspect, the mold material comprises a laser activatable material.
Using the laser activatable material as the mold material allows forming, for instance, a laser direct structuring (LDS) heat spreader or adding other functionalities.
In an implementation form of the first aspect, the bottom surface of the mold material is metallized to form a LDS heat spreader.
In an implementation form of the first aspect, the cavity comprises two side walls, wherein the RFIC die is mounted in the cavity between the two side walls. A second aspect of the invention provides an AoB device, comprising a plurality of AoB modules arranged side-by-side, wherein each AoB module is an AoB module according to the first aspect or an implementation of the first aspect, and a respective bottom side of each AoB module is on the same level.
The AoB device of the second aspect overcomes the challenges of PCB based AoB technologies, especially with respect to the thermal management of the RFICs. The thermal management is significantly improved by using the AoB modules of the first aspect.
In an implementation form of the second aspect, the AoB modules are assembled to a system board by a standard SMT process.
Since the whole AoB device is a flat LGA component, it can be soldered to the system PCB in a SMT process.
In an implementation form of the second aspect, the LDS heat spreader according to an implementation of the first aspect is soldered to the system board by the SMT process.
In combination with LDS heat spreaders, the RFIC thermal interface can be soldered to the system board, particularly in the same SMT process used to connect the AoB module to the system PCB. This leads to a uniform thermal distribution of the RFIC over the large AoB device.
A third aspect of the invention provides a method for manufacturing an AoB device, the method comprising: manufacturing a plurality of AoB modules, comprising: forming a plurality of PCBs side-by-side, wherein for each PCB a cavity is formed and at least one radiating element is arranged in and/or on the PCB, and mounting one or more RFIC die inside of each cavity and embedding the RFIC die into a mold material, wherein a bottom surface of the PCB and a surface of the mold material are on the same level.
In an implementation form of the third aspect, the method further comprises: assembling the plurality of AoB modules to a system board by a standard SMT process.
In an implementation form of the second aspect, the method further comprises: connecting the RFIC die to the PCB with wirebonds, solder bumps or flip-chip interconnections.
In an implementation form of the second aspect, the method further comprises: metallizing the bottom surface of the mold material to form a LDS heat spreader. In an implementation form of the second aspect, the method further comprises: soldering the EDS heat spreader to the system board in the SMT process.
The method may be provided with further implementation forms according to the above implementation forms of the first aspect. The method of the second aspect thus achieves the same advantages and effects as the antenna device of the first aspect.
It has to be noted that all devices, elements, units and means described in the present application could be implemented in the software or hardware elements or any kind of combination thereof. All steps which are performed by the various entities described in the present application as well as the functionalities described to be performed by the various entities are intended to mean that the respective entity is adapted to or configured to perform the respective steps and functionalities. Even if, in the following description of specific embodiments, a specific functionality or step to be performed by external entities is not reflected in the description of a specific detailed element of that entity which performs that specific step or functionality, it should be clear for a skilled person that these methods and functionalities can be implemented in respective software or hardware elements, or any kind of combination thereof.
BRIEF DESCRIPTION OF DRAWINGS
The above described aspects and implementation forms of the present invention will be explained in the following description of specific embodiments in relation to the enclosed drawings, in which
FIG. 1 shows an AoB module according to an embodiment of the invention.
FIG. 2 shows an AoB module according to an embodiment of the invention.
FIG. 3 shows an AoB module according to an embodiment of the invention.
FIG. 4 shows an AoB device according to an embodiment of the invention.
FIG. 5 shows an AoB device according to an embodiment of the invention.
FIG. 6 shows an AoB device according to an embodiment of the invention.
FIG. 7 shows an AoB device according to an embodiment of the invention. FIG. 8 shows an AoB device according to an embodiment of the invention.
FIG. 9 shows a method according to an embodiment of the invention.
DETAILED DESCRIPTION OF EMBODIMENTS
FIG. 1 shows an AoB module 100 according to an embodiment of the invention. The AoB module 100 comprises a PCB 101, which comprises a cavity 102 and at least one radiating element 103 arranged in and/or on the PCB 102. The AoB module 100 further comprises a RFIC die 104 mounted inside the cavity 102 and embedded into a mold material. A bottom surface of the PCB 101 and a surface of the mold material are on the same level.
To overcome the challenges of PCB based AoB technologies, especially to improve a thermal management of RFICs, a flat AoB module with cavity is proposed by embodiments of this invention. The RFIC die 104 is to this end mounted inside the cavity 102 of the AoB module 100, in particular, is molded into the cavity 102. The surface of the mold material having the same level as the bottom surface of the PCB 101, enables the whole AoB module 100 to become flat. Particularly, the bottom side of the AoB module 100 may be flat.
Optionally, the RFIC die 104 may be overmolded with the mold material in the cavity. The mold material may be a resin material, in particular an epoxy compound.
FIG. 2 and FIG. 3 both show AoB modules 100 according to embodiments of the invention. Particularly, the AoB module 100 as shown in FIG. 2 is based on the AoB module 100 as shown in FIG. 1, with further interconnections 105 between the PCB 101 and the RFIC die 104. Optionally, the RFIC die 104 can be a so-called bare-die with bonding wires, solder bumps or flip-chip interconnections 105 (e.g. Cu Pillar flip-chip interconnections), as shown in FIG. 2, connected to the PCB 101. The RFIC die 104 can be mounted to the PCB 101 in many different ways. The interconnections 105 allow the RFIC die 104 to be physically attached to, and electrically connected to the PCB 101.
Optionally, the RFIC die 104 may comprise one of a WLP, a CSP, or a lead frame or a laminate - PCB-based LGA package. That means, the RFIC die 101 itself may be a molded plastic package.
Optionally, the mold material may comprise a laser activatable material. That means, the cavity 102 may be formed from a commercially available laser activatable material. The AoB module 100 as shown in FIG. 3 is based on the AoB module 100 as shown in FIG. 1 or FIG. 2, further comprising a LDS heat spreader 106. Optionally, the bottom surface of the mold material is metallized to form the LDS heat spreader 106. The LDS heat spreader 106 may be arranged beneath the RFIC die 104.
Optionally, the cavity 102 may comprise two side walls, wherein the RFIC die 104 is mounted in the cavity 102 between the two side walls. This allows an easy implementation of a two- wall cavity design for a flat AoB antenna, as shown in FIG. 8.
The PCB 101 of the AoB module 100 in all embodiments can comprise a plurality of PCB layers. In particular, an amount of total PCB layers can vary from 6 to 20, depending on a type of PCB technology used.
Further, a dimension of the cavity 102 can also vary, depending on a dimension of the RFIC die 104 and the technology used to create the cavity 102 into the PCB 101. Optionally, the cavity 102 can extend over 2 to 10 layers in total PCB layers of the PCB 101.
FIG. 4 - FIG. 8 show AoB devices 200 according to embodiments of the invention. Each of these AoB devices 200 includes AoB modules 100 according to an embodiment of the invention, as shown in FIG. 1 - FIG. 3. Same elements in the figures are labelled with the same reference signs and function likewise.
FIG. 4 shows an AoB device 200 comprising a plurality of AoB modules 100 arranged side- by-side, wherein each AoB module 100 is an AoB module 100 according to an embodiment of the invention, as shown in either one of FIG. 1- FIG. 3. Further, a respective bottom side of each AoB module 100 of the AoB device 200 is on the same level.
As shown in FIG. 4, the AoB device 200 may comprise 4 AoB modules 100. This is merely an example implementation of the AoB device 200 according to an embodiment of the invention. The AoB device 200 may comprise a plurality of AoB modules 100 arranged side-by-side. Particularly, the plurality of AoB modules 100 may also be an array of AoB modules 100.
A size of a single AoB module 100 may depend on an applied frequency and a chosen antenna configuration. Consequently, a dimension of the AoB device 200 according to embodiments of this invention, can vary significantly, depending on amounts of AoB modules 100. Therefore, a size of an overall AoB device 200 is scalable very well. FIG. 5 shows an AoB device 200 based on the AoB device 200 as shown in FIG. 4. In particular, the AoB modules 100 may be assembled to a system board 201, as shown in FIG.
5, e.g. by a standard SMT process.
The electrical connection from an antenna PCB to a motherboard/system PCB is typically realized by ball grid array (BGA) balls. The mold surface of each AoB module 100 has the same level as the bottom of the PCB 101 of each AoB module 100. Due to flat AoB modules 100 according to embodiments of this invention, there is no more need of BGA balls, when mounting AoB modules 100 onto the system board 201. Furthermore, there is also no more need for holes in the system board 201 to connect a heat sink to the RFIC dies 104 by a TIM.
Further, in case that the AoB module 100 is the AoB module 100 as shown in FIG. 3, the AoB module 100 further comprises the LDS heat spreader 106.
It should be noted that a SMT process may be used to connect the AoB modules 100, particularly the PCBs 101, to the system PCB 201. The LDS heat spreader 106 can be soldered to the system PCB 201 in the same SMT process which is used to connect the PCB 101 to the system PCB 201. This efficiently simplifies a manufacturing process of the AoB device 200.
In addition, the AoB module 100, with a combination of LDS metallization on the mold, i.e. the LDS heat spreader 106, leads to a direct and well controlled thermal interface of the RFIC die 104 with the system PCB 201. This results in an effective and uniform thermal management of whole AoB systems, allowing higher power and bigger size systems.
FIG. 6 shows an AoB device 200 based on the AoB device 200 as shown in FIG. 5. The AoB device 200 is further arranged above a heat sink, as shown in FIG. 6. In particular, the heat sink is arranged beneath the system PCB 201.
FIG. 7 particularly shows an AoB device 200 comprising, an AoB module 100 without a LDS heat spreader 106 (left side of FIG. 7), and an AoB module 100 with a LDS heat spreader 106 (right side of FIG. 7). It should also be noted that, with or without the LDS heat spreader 106, all the AoB modules 100 have a flat bottom side, and can be assembled to the system board 201 in the same SMT process.
FIG. 8 shows an AoB device 200 with an easy implementation of a two-wall cavity design.
Particularly, each cavity 102 comprises two side walls, wherein the RFIC die 104 is mounted between the two side walls.
FIG. 9 shows a flow-diagram of a method 900 according to an embodiment of the invention. The method 900 is for manufacturing an AoB device 100 according to an embodiment of the invention. The method 900 comprises: a step 901 of manufacturing a plurality of AoB modules 100, which comprising a step 9011 of forming a plurality of PCB 101 side-by-side, wherein for each PCB 101 a cavity 102 is formed and at least one radiating element 103 is arranged in and/or on the PCB 101, and a step 9012 of mounting one or more RFIC die 104 inside of each cavity 102 and embedding the RFIC die 104 into a mold material. In addition, a bottom surface of the PCB 102 and a surface of the mold material are on the same level.
Optionally, during molding into the cavities 102, the RFIC die 104 can be exposed as well as over-molded with a mold layer.
The method 900 of FIG. 9 may further comprise a step of assembling the plurality of AoB modules 100 to a system board 201 by a standard SMT process.
The method 600 may further comprise a step of connecting the RFIC die 104 to the PCB 101 with wirebonds, solder bumps or flip-chip interconnections 105.
Optionally, the method 600 further comprises a step of metallizing the bottom surface of the mold material to form a LDS heat spreader 106. The mold layer itself can be made with a laser activatable material, meaning it can form a LDS heat spreader after a metallization process.
The method 600 may further comprise a step of soldering the LDS heat spreader 106 to the system board 201 in the SMT process. Particularly, the SMT process is the same SMT process used to assemble the plurality of AoB modules 100 to the system board 201. This leads to an effective and uniform thermal management of AoB systems, allowing higher power and bigger size systems.
In summary, the embodiments of the present invention overcome the challenges with PCB based AoB technologies, especially for simplifying an AoB assembly process. A flat AoB module and device are achieved by a combination of an AoB PCB with cavities combined with a molding technology. This decouples assembly tolerances, and allows, in combination with a LDS heat spreader, a uniform thermal management of AoB systems. The embodiments of this invention offer at least the following benefits:
The combination of two low cost technologies (cavity PCB and molding) enables scalable flat AoB modules with comparable low costs.
The encapsulation of the RFIC die leads to an improved reliability.
- In combination with LDS heat spreaders, the RFIC thermal interface is soldered to the system board and leads to a uniform thermal distribution of the RFIC over the large AoB.
The whole AoB module is a flat LGA component and can be soldered to the system PCB in the same SMT process which is used to connect other components to the system PCB.
There is no more need for BGA balls between AoB module and system PCB.
The system PCB will become easier and cheaper since there is no more need for holes in the system PCB to connect the heat sink to the RFIC dies by a TIM.
The present invention has been described in conjunction with various embodiments as examples as well as implementations. However, other variations can be understood and effected by those persons skilled in the art and practicing the claimed invention, from the studies of the drawings, this disclosure and the independent claims. In the claims as well as in the description the word “comprising” does not exclude other elements or steps and the indefinite article“a” or“an” does not exclude a plurality. A single element or other unit may fulfill the functions of several entities or items recited in the claims. The mere fact that certain measures are recited in the mutual different dependent claims does not indicate that a combination of these measures cannot be used in an advantageous implementation.

Claims

Claims
1. Antenna-on-Board, AoB, module (100), comprising:
a printed circuit board, PCB (101), comprising a cavity (102) and at least one radiating element (103) arranged in and/or on the PCB (101), and
a radio frequency integrated circuit, RFIC, die (104) mounted inside the cavity (102) and embedded into a mold material,
wherein a bottom surface of the PCB (101) and a surface of the mold material are on the same level.
2. AoB module (100) according to claim 1, wherein
the bottom side of the AoB module (100) is flat.
3. AoB module (100) according to claim 1 or 2, wherein
the RFIC die (104) is overmolded with the mold material in the cavity (102).
4. AoB module (100) according to one of the claims 1 to 3, wherein
the mold material is a resin material, in particular epoxy.
5. AoB module (100) according to one of the claims 1 to 4, wherein
the RFIC die (104) is a bare-die with wirebonds, solder bumps or flip-chip
interconnections (105) connected to the PCB (101).
6. AoB module (100) according to one of the claims 1 to 5, wherein
the RFIC die (104) comprises one of
a wafer level package, WLP,
a chip scale package, CSP, or
a lead frame or a laminate-PCB-based land grid array, LGA, package.
7. AoB module (100) according to one of the claims 1 to 6, wherein
the mold material comprises a laser activatable material.
8. AoB module (100) according to claim 7, wherein the bottom surface of the mold material is metallized to form a laser direct structuring, LDS, heat spreader (106).
9. AoB module (100) according to one of the claims 1 to 8, wherein
the cavity (102) comprises two side walls, wherein the RFIC die (104) is mounted in the cavity (102) between the two side walls.
10. Antenna-on-Board, AoB, device (100), comprising
a plurality of AoB modules (100) arranged side-by-side, wherein each AoB module (100) is an AoB module (100) according to one of the claims 1 to 9, and a respective bottom side of each AoB module (100) is on the same level.
11. AoB device (200) according to claim 10, wherein
the AoB modules (100) are assembled to a system board (201) by a standard surface- mount technology, SMT, process.
12. AoB device (200) according to claim 11, wherein the AoB module (100) is an AoB module (100) according to claim 8, wherein
the LDS heat spreader (106) is soldered to the system board (201) by the SMT process of claim 11.
13. Method (900) for manufacturing an Antenna-on-Board, AoB, device (200), comprising:
manufacturing (901) a plurality of AoB modules (100), comprising:
forming (9011) a plurality of printed circuit boards, PCBs (101), side-by-side, wherein for each PCB (101) a cavity (102) is formed and at least one radiating element (103) is arranged in and/or on the PCB (101), and
mounting (9012) one or more radio frequency integrated circuit, RFIC, die (104) inside of each cavity (102) and embedding the RFIC die (104) into a mold material,
wherein a bottom surface of the PCB (102) and a surface of the mold material are on the same level.
14. Method (900) according to claim 13, comprising:
assembling the plurality of AoB modules (100) to a system board (201) by a standard surface-mount technology, SMT, process.
15. Method (900) according to claim 13 or 14, comprising:
connecting the RFIC die (104) to the PCB (101) with wirebonds, solder bumps or flip- chip interconnections (105).
16. Method (900) according to one of the claims 13 to 15, comprising:
metallizing the bottom surface of the mold material to form a laser direct structuring,
LDS, heat spreader (106).
17. Method (900) according to claim 16, comprising:
soldering the LDS heat spreader (106) to the system board (201) in the SMT process of claim 14.
PCT/EP2019/058663 2019-04-05 2019-04-05 Flat antenna device and method of its fabrication WO2020200475A1 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11201119B2 (en) 2018-06-06 2021-12-14 At&S Austria Technologie & Systemtechnik Aktiengesellschaft RF functionality and electromagnetic radiation shielding in a component carrier

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150084180A1 (en) * 2012-07-30 2015-03-26 Panasonic Corporation Semiconductor device including heat dissipating structure
US9368425B2 (en) * 2013-12-20 2016-06-14 Globalfoundries Inc. Embedded heat spreader with electrical properties
US20180068938A1 (en) * 2008-09-06 2018-03-08 Broadpak Corporation Scalable semiconductor interposer integration

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20180068938A1 (en) * 2008-09-06 2018-03-08 Broadpak Corporation Scalable semiconductor interposer integration
US20150084180A1 (en) * 2012-07-30 2015-03-26 Panasonic Corporation Semiconductor device including heat dissipating structure
US9368425B2 (en) * 2013-12-20 2016-06-14 Globalfoundries Inc. Embedded heat spreader with electrical properties

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
LASER MICRONICS: "Three-dimensional circuits with LDS Laser Direct Structuring and Metallization for 3D Mechatronic Integrated Devices", 22 March 2016 (2016-03-22), XP055645746, Retrieved from the Internet <URL:https://www.lasermicronics.com/_mediafiles/80-lds-technology-for-moulded-interconnect-devices.pdf> [retrieved on 20191122] *
LPKF: "Three-Dimensional Circuits LPKF LDS: Laser Direct Structuring for 3D Molded Interconnect Devices 2 Innovative Product Design with MID Technology Contents 2 More Functionality - New Possibilities 4 Flexible Solution for Three-Dimensional Circuits 6 Tomorrow's Technology in Today's Production 8 Inspir", 4 August 2014 (2014-08-04), XP055645749, Retrieved from the Internet <URL:https://www.lpkf.com/fileadmin/mediafiles/user_upload/products/pdf/EQ/3D-MID-LDS/brochure_lpkf_laser_direct_structuring_en.pdf> [retrieved on 20191122] *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11201119B2 (en) 2018-06-06 2021-12-14 At&S Austria Technologie & Systemtechnik Aktiengesellschaft RF functionality and electromagnetic radiation shielding in a component carrier

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