WO2020163132A1

WO2020163132A1 - Plasma resistant component for a plasma processing chamber

Info

Publication number: WO2020163132A1
Application number: PCT/US2020/015593
Authority: WO
Inventors: Satish Srinivasan; Lin Xu; Thomas R. Stevenson
Original assignee: Lam Research Corp
Current assignee: Lam Research Corp
Priority date: 2019-02-04
Filing date: 2020-01-29
Publication date: 2020-08-13
Anticipated expiration: 2021-08-04

Abstract

A component for use within a processing chamber is provided where the component is exposed to a plasma in the processing chamber. The component comprises a silicon carbide layer and a coating layer on the silicon carbide layer, wherein the coating layer comprises at least one of tungsten, tantalum, or boron.

Description

PLASMA RESISTANT COMPONENT FOR A PLASMA PROCESSING

CHAMBER

CROSS-REFERENCE TO RELATED APPLICATION

[0001] This application claims the benefit of priority of U.S. Application No.

62/800,861, filed February 4, 2019, which is incorporated herein by reference for all purposes.

BACKGROUND

[0002] The disclosure relates to plasma processing chambers for plasma processing a wafer. More specifically, the disclosure relates to plasma processing chambers with a component that is resistant to plasma damage.

[0003] Plasma processing is used in forming semiconductor devices. During the plasma processing, components of the plasma processing chamber may be eroded by the plasma.

SUMMARY

[0004] To achieve the foregoing and in accordance with the purpose of the present disclosure, a component for use within a processing chamber is provided where the component is exposed to a plasma in the processing chamber. The component comprises a silicon carbide layer and a coating layer on the silicon carbide layer, wherein the coating layer comprises at least one of tungsten, tantalum, or boron.

[0005] In another manifestation, an apparatus for plasma processing a wafer is provided. A processing chamber is provided. A gas source provides gas to the processing chamber. A component is within the processing chamber, wherein at least one surface of the component is exposed to a plasma in the processing chamber. The component comprises a silicon carbide layer and a coating layer on the silicon carbide layer, wherein the coating layer comprises at least one of tungsten, tantalum, or boron.

[0006] These and other features of the present disclosure will be described in more detail below in the detailed description of the disclosure and in conjunction with the following figures.

BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The present disclosure is illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which like reference numerals refer to similar elements and in which: [0008] FIG. 1 is a schematic view of a plasma processing chamber according to an embodiment.

[0009] FIGS. 2A-B are enlarged schematic cross-sectional views of the part of an edge ring adjacent to a wafer and ESC in an embodiment.

[0010] FIG. 3 is an enlarged schematic cross-sectional view of the part of an edge ring adjacent to a wafer and ESC in another embodiment.

[0011] FIG. 4 is an enlarged schematic cross-sectional view of the part of an edge ring adjacent to a wafer and ESC in another embodiment.

DETAILED DESCRIPTION OF THE EXEMPLARY EMBODIMENTS

[0012] The present disclosure will now be described in detail with reference to a few preferred embodiments thereof as illustrated in the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. It will be apparent, however, to one skilled in the art, that the present disclosure may be practiced without some or all of these specific details. In other instances, well-known process steps and/or structures have not been described in detail in order to not unnecessarily obscure the present disclosure.

[0013] FIG. 1 is a schematic view of a plasma processing reactor. The plasma processing reactor may be used in an embodiment for processing a wafer. In one or more embodiments, a plasma processing chamber 100 comprises a gas distribution plate 106 providing a gas inlet and an electrostatic chuck (ESC) 108, within an etch chamber 149 and enclosed by a chamber wall 152. Within the etch chamber 149, a wafer 103 is positioned over the ESC 108. The ESC 108 is a wafer support. An edge ring 109 surrounds the ESC 108. An ESC source 148 may provide a bias to the ESC 108. A gas source 110 is connected to the etch chamber 149 through the gas distribution plate 106. In this embodiment, the gas source comprises an oxygen containing component source 114, a fluorine containing component source 116, and one or more other gas sources 118. An ESC temperature controller 150 is connected to the ESC 108.

[0014] A radio frequency (RF) source 130 provides RF power to a lower electrode and/or an upper electrode. In this embodiment, the ESC 108 is a lower electrode and the gas distribution plate 106 is an upper electrode. In an exemplary embodiment, 400 kilohertz (kHz), 60 megahertz (MHz), 2 MHz, 13.56 MHz, and/or 27 MHz power sources make up the RF source 130 and the ESC source 148. In this embodiment, the upper electrode is grounded. In this embodiment, one generator is provided for each frequency. In other embodiments, the generators may be separate RF sources, or separate RF generators may be connected to different electrodes. For example, the upper electrode may have inner and outer electrodes connected to different RF sources. Other arrangements of RF sources and electrodes may be used in other embodiments. In other embodiments, an electrode may be an inductive coil.

[0015] A controller 135 is controllably connected to the RF source 130, the ESC source 148, an exhaust pump 120, and the gas source 110. A high flow liner 104 is a liner within the etch chamber 149. The high flow liner 104 confines gas from the gas source and has slots 102. The slots 102 allow for a controlled flow of gas to pass from the gas source 110 to the exhaust pump 120. A sensor 180 is positioned to sense components of the plasma and provide data to the controller 135.

[0016] FIG. 2A is an enlarged schematic cross-sectional view of the part of the edge ring 109 adjacent to the wafer 103 and the ESC 108. The edge ring 109 comprises a silicon carbide (SiC) layer 204 in a ring shape, a coating layer 208 in a ring shape on the silicon carbide layer 204, and a silicon carbide coating 212 on the coating layer 208. In this example, the silicon carbide layer 204 may be sintered silicon carbide or chemical vapor deposition (CVD) silicon carbide. To create a sintered silicon carbide layer, the layer is formed out of silicon carbide powder. The silicon carbide powder is then sintered into the silicon carbide layer 204. The CVD silicon carbide uses a CVD process to grow the silicon carbide layer 204.

[0017] In this embodiment, the coating layer 208 comprises tungsten carbide (WC). In this embodiment, the coating layer 208 is deposited by a CVD process. The coating layer 208 has a thickness of between 100 nm to 100 mhi. In this embodiment, the silicon carbide coating 212 is deposited using a CVD process. The edge ring 109 may be machined after the CVD process to achieve the desired final shape of the edge ring 109.

[0018] The silicon carbide coating 212 has an upper surface that is substantially coplanar with an upper surface of the wafer 103. The upper surface of the silicon carbide coating 212 being substantially coplanar with the upper surface of the wafer 103 reduces edge nonuniformities of the edge regions on the wafer 103. The reduction of edge nonuniformities on the wafer 103 is provided since the edge ring 109 helps provide a more continuous process surface. The gap between the edge ring 109 and the wafer 103 is minimized to reduce nonuniformities. However, a sufficient gap is maintained so that a change in temperature allows wafer expansion without the wafer 103 contacting the edge ring 109.

[0019] FIG. 2B is an enlarged schematic cross-sectional view of the part of the edge ring 109 adjacent to the wafer 103 and the ESC 108 after a plurality of wafers 103 has been processed. The silicon carbide coating 212 has been partially eroded away during the processing of a plurality of wafers 103 until the coating layer 208 has been exposed. Since the coating layer 208 comprises tungsten carbide, the sensor 180 is set to detect the presence of tungsten in the plasma. The presence of tungsten is used to indicate that continuing use of the edge ring 109 may not be desirable providing a warning condition to indicate that the edge ring 109 should be replaced. The edge ring 109 may be replaced with a new copy. The detection of tungsten provides for the replacement of the edge ring 109 before any wafers 103 are processed that are out of specification. Therefore, the edge ring 109 helps reduce the loss of wafers 103, due to the wafers 103 being out of specification. In addition, the coating layer 208 formed from tungsten carbide is more erosion resistant than the silicon carbide coating 212. As a result, the coating layer 208 helps to make the edge ring 109 more erosion-resistant and have a longer life. In various embodiments, the coating layer 208 is configured to emit at least one of tungsten, tantalum, or boron when the plasma erodes through the silicon carbide coating to reach the coating layer 208. The sensor 180 detects the emitted at least one of tungsten, tantalum, or boron.

[0020] Without using the coating layer 208 to release tungsten as an erosion indicator, a metrology process is used to examine the processed wafers 103 and determine if such wafers 103 are out of specification. The metrology process for determining if the processed wafers 103 are out of specification may take days, resulting in a large number of wafers that are out of specification before it is determined that the process chamber is out of specification, increasing cost and decreasing throughput. [0021] In other embodiments, the coating layer 208 may comprise a metal carbide or boron carbide (B₄C). For example, the coating layer 208 may be tantalum carbide (TaC). An advantage of forming the silicon carbide layer 204 from sintered silicon carbide is that the silicon carbide layer 204 may be formed more quickly and at a lower cost. An advantage of forming the silicon carbide layer 204 by a CVD or other types of processes is that the silicon carbide layer 204 may be a higher quality layer that is more erosion resistant. The coating layer 208 and the silicon carbide coating 212 in this embodiment are formed by a CVD process to provide coatings that are more erosion and damage resistant.

[0022] FIG. 3 is an enlarged schematic cross-sectional view of the part of the edge ring 109 adjacent to the wafer 103 and the ESC 108 in another embodiment. The edge ring 109 comprises a silicon carbide layer 304 and a coating layer 308. In this example, the coating layer 308 is tungsten carbide. The coating layer 308 has a thickness of between 100 mhi to 1 mm. In other embodiments, the coating layer 308 may be tantalum carbide or boron carbide. In this embodiment, both the silicon carbide layer 304 and the coating layer 308 are formed by a CVD process. The coating layer 308 of tungsten carbide is more erosion resistant than the silicon carbide layer 304. As a result, the edge ring 109 may be used for a longer time. Therefore, the edge ring 109 reduces downtime.

[0023] Silicon carbide is more easily eroded when subjected to a fluorine containing plasma and an oxygen containing plasma either simultaneously or sequentially. In a plasma processing chamber 100 where fluorine containing plasma and oxygen containing plasma are used, a coating layer 308 of tungsten carbide reduces downtime.

[0024] FIG. 4 is an enlarged schematic cross-sectional view of the part of the edge ring 109 adjacent to the wafer 103 and the ESC 108 in another embodiment. The edge ring 109 comprises a silicon carbide layer 404 and a coating layer 408. In this example, the coating layer 408 is boron carbide or tantalum carbide or tungsten carbide. In this embodiment, a silicon carbide coating 412 is formed on the coating layer 408. A plurality of additional layers is formed over the silicon carbide coating 412. In this embodiment, a TaC, WC, or B₄C first coating 416 is formed over the silicon carbide coating 412. The first coating 416 has a thickness of between 1 mhi to 1 mm. A second coating 420 is formed over the first coating 416. The second coating 420 is formed from silicon carbide. The second coating 420 has a thickness of between 1 mhi to 1 mm. A third coating 424 of TaC, WC, or B4C is over the second coating 420. The third coating 424 has a thickness of between 1 mhi to 1 mm. An outer coating 428 coats the entire edge ring 109. The outer coating 428 is made up of TaC, WC, or B₄C. In this embodiment, all of the coatings 408, 412, 416, 420, 424, and 428 are deposited by a CVD process. The outer coating 428 is more erosion resistant than silicon carbide. Additional layers formed over SiC coating 412 are one of WC, TaC or B₄C alternating with SiC. As a result, the edge ring 109 may be used for a longer time. Therefore, the edge ring 109 reduces downtime. The number of different coatings is dependent on the desired thickness of the edge ring 109. An advantage of these alternating layers is that they are more plasma erosion-resistant compared to SiC, providing a longer-lasting edge ring 109 while being less expensive than if a whole part made of the same erosion resistant material.

[0025] In other embodiments, other components of a plasma processing chamber 100 may be formed that include a silicon carbide layer and a coating layer. Such components may have a silicon carbide coating on the coating layer. The coating layer could be at least one of WC, TaC or B₄C with a thickness anywhere from 1 mhi to 1 mm. For example, the high flow liner 104 or an electrode, such as the ESC 108 or the gas distribution plate 106 may comprise a silicon carbide layer with a coating layer. Such layers may be used to determine whether the component should be replaced and/or to make the component more erosion resistant.

[0026] While this disclosure has been described in terms of several preferred embodiments, there are alterations, modifications, permutations, and various substitute equivalents, which fall within the scope of this disclosure. It should also be noted that there are many alternative ways of implementing the methods and apparatuses of the present disclosure. It is therefore intended that the following appended claims be interpreted as including all such alterations, modifications, permutations, and various substitute equivalents as fall within the true spirit and scope of the present disclosure.

Claims

CLAIMS What is claimed is:

1. A component for use within a processing chamber, wherein the component is exposed to a plasma in the processing chamber, the component comprising:

a silicon carbide layer; and

a coating layer on the silicon carbide layer, wherein the coating layer comprises at least one of tungsten, tantalum, or boron.

2. The component, as recited in claim 1, further comprising a silicon carbide coating on the coating layer.

3. The component, as recited in claim 2, wherein the coating layer is configured to emit at least one of tungsten, tantalum, or boron when plasma has eroded the silicon carbide layer and reaches the coating layer.

4. The component, as recited in claim 2, wherein the silicon carbide coating is a chemical vapor deposition coating.

5. The component, as recited in claim 4, wherein the silicon carbide layer comprises sintered silicon carbide.

6. The component, as recited in claim 2, further comprising a plurality of alternating layers on the silicon carbide coating and each of the plurality of alternating layers comprising at least one of tantalum carbide, tungsten carbide, or boron carbide.

7. The component, as recited in claim 1, wherein the component is further formed by machining the component.

8. The component, as recited in claim 1, wherein the coating layer comprises at least one of tungsten carbide, tantalum carbide, or boron carbide.

9. The component, as recited in claim 1, wherein the coating layer surrounds the silicon carbide layer.

10. The component, as recited in claim 1, wherein the coating layer has a thickness of between 100 nm to 100 mhi.

11. The component, as recited in claim 1, wherein the coating layer is a chemical vapor deposition coating.

12. The component, as recited in claim 1, wherein the component is at least one of an edge ring, an electrode, and a liner.

13. An apparatus for plasma processing a wafer, comprising:

a processing chamber;

a gas source for providing gas to the processing chamber; and

a component within the processing chamber, wherein at least one surface of the component is exposed to a plasma in the processing chamber, wherein the component comprises:

a silicon carbide layer; and

14. The apparatus, as recited in claim 13, further comprising a silicon carbide coating on the coating layer.

15. The component, as recited in claim 14, wherein the coating layer is configured to emit at least one of tungsten, tantalum, or boron when plasma has eroded the silicon carbide layer and reaches the coating layer.

16. The apparatus, as recited in claim 13, wherein the component is at least one of an electrode, an edge ring, and a liner.

17. The apparatus, as recited in claim 13, wherein the gas source comprises: an oxygen containing component source; and

a fluorine containing component source.

18. The apparatus, as recited in claim 13, wherein the silicon carbide layer comprises sintered silicon carbide.

19. The apparatus, as recited in claim 18, further comprising a silicon carbide coating on the coating layer, wherein the silicon carbide coating is a chemical vapor deposition coating.

20. The apparatus, as recited in claim 13, wherein the coating layer comprises at least one of tungsten carbide, tantalum carbide, or boron carbide.

21. The apparatus, as recited in claim 20, further comprising:

a silicon carbide coating on the coating layer; and

a plurality of alternating layers of at least one of tantalum carbide, tungsten carbide, or boron carbide on the silicon carbide coating.

22. The apparatus, as recited in claim 13, further comprising a sensor configured to sense a presence of the at least one of tungsten, tantalum, or boron attributed to the coating layer in the processing chamber.

23. The apparatus, as recited in claim 22, wherein the presence of the at least one of tungsten, tantalum, or boron represents a warning condition.

24. The apparatus, as recited in claim 23, wherein the warning condition indicates that the component is to be replaced.

25. The apparatus, as recited in claim 13, wherein the coating layer surrounds the silicon carbide layer.

26. The apparatus, as recited in claim 13, wherein the coating layer has a thickness of between 100 nm to 100 mhi.

27. The apparatus, as recited in claim 13, wherein the at least one surface of the component is substantially coplanar with a surface of a wafer positioned within the processing chamber.