WO2020144814A1 - Semiconductor device - Google Patents

Semiconductor device Download PDF

Info

Publication number
WO2020144814A1
WO2020144814A1 PCT/JP2019/000528 JP2019000528W WO2020144814A1 WO 2020144814 A1 WO2020144814 A1 WO 2020144814A1 JP 2019000528 W JP2019000528 W JP 2019000528W WO 2020144814 A1 WO2020144814 A1 WO 2020144814A1
Authority
WO
WIPO (PCT)
Prior art keywords
conductor layer
insulating
heat dissipation
semiconductor device
viscous body
Prior art date
Application number
PCT/JP2019/000528
Other languages
French (fr)
Japanese (ja)
Inventor
健 開田
穂隆 六分一
清文 北井
Original Assignee
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to CN201980087897.7A priority Critical patent/CN113302733A/en
Priority to JP2019525924A priority patent/JP6590123B1/en
Priority to PCT/JP2019/000528 priority patent/WO2020144814A1/en
Publication of WO2020144814A1 publication Critical patent/WO2020144814A1/en

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Definitions

  • the present invention relates to a semiconductor device provided with a heat dissipation member.
  • a semiconductor device is generally provided with a conductor layer such as a metal foil on the bottom surface, and a heat dissipation member such as a heat sink is attached via the conductor layer. Further, between the conductor layer and the heat radiating member, a viscous material having high heat conductivity such as grease is applied in order to suppress thermal resistance of the contact surface.
  • Such a viscous material is preferably insulative so as to prevent it from adhering to surrounding electronic components and causing a short circuit or the like.
  • an insulating viscous body hereinafter referred to as an insulating viscous body
  • a potential difference occurs between the conductor layer and the heat dissipation member.
  • minute bubbles are scattered inside the insulating viscous body, if a high voltage is applied when conducting a dielectric strength test, etc., partial discharge will occur in the scattered bubbles and the entire insulating viscous body will deteriorate. I am afraid to do so.
  • the present invention has been made to solve the above problems, and suppresses the deterioration of the entire insulating viscous body provided between the conductor layer and the heat dissipation member while suppressing the damage of the insulating layer. It is an object of the present invention to provide a semiconductor device having
  • a semiconductor device is provided with a semiconductor element, a wiring member on which the semiconductor element is mounted, an insulating layer on which the wiring member is arranged, and a surface of the insulating layer opposite to the surface on which the semiconductor element is mounted.
  • the insulating viscous body provided on the exposed surface, the heat dissipating member provided separately from the conductor layer via the insulating viscous body, and the conductor layer and the heat dissipating member in a part of the region where the insulating viscous body is provided.
  • a conductive projection portion that is provided to be spaced apart from the other.
  • the semiconductor device is provided with a semiconductor element, a wiring member on which the semiconductor element is mounted, an insulating layer on which the wiring member is arranged, and a surface of the insulating layer opposite to the surface on which the semiconductor element is mounted. And a sealing material for sealing the semiconductor element, the wiring member, the insulating layer and the conductor layer so that a part of the wiring member and one surface of the conductor layer are exposed, and a sealing material for the conductor layer
  • the insulating viscous body is provided so as to have a void in a part of the surface exposed from, and the heat dissipation member is provided so as to be separated from the conductor layer via the insulating viscous body.
  • the semiconductor device of the present invention by providing the conductive protrusion or the void in a part of the region where the insulating viscous body is provided, the electric field is concentrated on the conductive protrusion or the void, and the partial discharge occurs locally. Is easily generated, it is possible to suppress deterioration of the entire insulating viscous body.
  • FIG. 1 is a perspective view showing a schematic configuration of a semiconductor device according to a first embodiment of the present invention.
  • 1 is a sectional view showing a schematic configuration of a semiconductor device according to a first embodiment of the present invention.
  • 1 is a sectional view showing a schematic configuration of a semiconductor device according to a first embodiment of the present invention.
  • FIG. 3 is an explanatory diagram for explaining the semiconductor device according to the first embodiment of the present invention.
  • FIG. 2 is a schematic configuration diagram in which a part of the semiconductor device according to the first embodiment of the present invention is enlarged.
  • FIG. 2 is a schematic configuration diagram in which a part of the semiconductor device according to the first embodiment of the present invention is enlarged.
  • FIG. 1 is a perspective view showing a schematic configuration of a semiconductor device according to a first embodiment of the present invention.
  • 1 is a sectional view showing a schematic configuration of a semiconductor device according to a first embodiment of the present invention.
  • FIG. 3 is an explanatory diagram for
  • FIG. 2 is a schematic configuration diagram in which a part of the semiconductor device according to the first embodiment of the present invention is enlarged.
  • FIG. 2 is a schematic configuration diagram in which a part of the semiconductor device according to the first embodiment of the present invention is enlarged.
  • FIG. 6 is a cross-sectional view showing a schematic configuration of a semiconductor device according to a second embodiment of the present invention.
  • FIG. 6 is a schematic configuration diagram in which a part of the semiconductor device according to the second embodiment of the present invention is enlarged.
  • FIG. 6 is a schematic configuration diagram in which a part of the semiconductor device according to the second embodiment of the present invention is enlarged.
  • FIG. 6 is an explanatory diagram for explaining a semiconductor device according to a third embodiment of the present invention.
  • FIG. 9 is a schematic configuration diagram in which a part of a semiconductor device according to a fourth embodiment of the present invention is enlarged.
  • FIG. 9 is a schematic configuration diagram in which a part of a semiconductor device according to a fourth embodiment of the present invention is enlarged.
  • FIG. 1 is a perspective view showing a schematic configuration of the semiconductor device according to the first embodiment of the present invention.
  • 2 and 3 are sectional views showing a schematic configuration of the semiconductor device according to the first embodiment of the present invention.
  • 2 is a sectional view taken along the line AA′ of FIG. 1
  • FIG. 3 is a sectional view taken along the line BB′ of FIG.
  • the first direction which is the thickness direction of the semiconductor device
  • the second direction which is the width direction of this semiconductor device
  • arrow Y the third direction orthogonal to both the first direction and the second direction
  • the direction is indicated by arrow X.
  • the semiconductor device 100 includes a semiconductor element 1, a wiring member 2, an insulating layer 3, a conductor layer 4, a heat dissipation member 5 and a sealing material 6.
  • the semiconductor element 1, the wiring member 2, the insulating layer 3, and the conductor layer 4 are sealed with a sealing material 6 so that a part of the wiring member 2 and one surface of the conductor layer 4 are exposed.
  • the heat dissipation member 5 is attached to the surface of the conductor layer 4 exposed from the sealing material 6 via an insulating viscous body 7.
  • the back electrode of the semiconductor element 1 is mounted on the wiring member 2 via solder (not shown) or the like.
  • the semiconductor element 1 is, for example, an IGBT (Insulated Gate Bipolar Transistor) or a diode.
  • the wiring member 2 is, for example, a lead frame.
  • the wiring member 2 is, for example, a copper plate or a steel plate punched into a predetermined shape to form a circuit pattern.
  • the wiring member 2 has an inner lead 2a included in the sealing material 6 and an outer lead 2b exposed from the sealing material 6 and connectable to an external wiring.
  • the wiring member 2 and the surface electrode of the semiconductor element 1 and the wiring members 2 are electrically connected by a wire 8.
  • the wire 8 is, for example, an aluminum wire.
  • the wiring member 2 is arranged on the insulating layer 3.
  • a conductor layer 4 is provided on the surface of the insulating layer 3 opposite to the surface on which the semiconductor element 1 is provided.
  • the insulating layer 3 for example, a thermosetting resin such as an epoxy resin filled with an inorganic powder filler having high thermal conductivity is used.
  • the conductor layer 4 is, for example, a metal foil such as copper or aluminum or a metal plate.
  • a heat dissipation member 5 is provided on the surface of the conductor layer 4 exposed from the encapsulant 6 and separated from the conductor layer 4 via an insulating viscous body 7.
  • the heat dissipation member 5 is, for example, a heat sink in which a plurality of fins are arranged, and is made of a conductive material having a high thermal conductivity such as copper or aluminum.
  • the insulating viscous material 7 is applied so as to fill the gap between the conductor layer 4 and the heat dissipation member 5 to reduce the thermal resistance.
  • the insulating viscous body 7 is provided so that the conductor layer 4 and the heat dissipation member 5 do not come into direct contact with each other, and expansion or contraction occurs due to a difference in thermal expansion between the conductor layer 4 and the heat dissipation member 5, so that the insulation layer 3 is cracked or the like. It prevents the occurrence of defects.
  • the insulating viscous body 7 has an electrical insulating property in order to prevent the insulating viscous body from being discharged to the outside of the semiconductor device 100 due to thermal contraction and adhering to surrounding electronic components to cause a short circuit.
  • the insulating viscous body 7 is, for example, high heat conductive grease, adhesive, or paste.
  • the encapsulating material 6 ensures the insulation between the sealed members and also functions as a case of the semiconductor device 100.
  • the sealing material 6 is formed by transfer molding using a mold, for example.
  • a molding method of the sealing material 6 for example, injection molding, compression molding, or the like can be used.
  • the sealing material 6 is, for example, an epoxy resin containing a filler, a phenol resin, or the like.
  • a screw 9 is inserted in the central portion to fix the heat dissipation member 5.
  • a through hole through which a screw 9 penetrates is formed in each of the sealing material 6, the insulating layer 3, and the conductor layer 4, and the heat dissipation member 5 is provided with a screw hole into which the screw 9 is screwed.
  • the side surface of the screw 9 is covered with the sealing material 6, and is provided so that the conductor layer 4 and the heat dissipation member 5 are not electrically connected.
  • FIG. 3 shows an example in which the screw 9 is provided at one place, the screw 9 may be provided at two or more places. Further, it may be screwed from the heat radiating member 5 side toward the sealing material 6 side.
  • FIG. 4 is an explanatory diagram for explaining the semiconductor device according to the first embodiment of the present invention.
  • the insulating property of the wiring member 2 on which the semiconductor element 1 is mounted is secured by the insulating layer 3, and the wiring member 2 has a high potential Va.
  • the conductor layer 4 is electrically insulated by the insulating layer 3 and the insulating viscous body 7, behaves as a floating electrode, and has an intermediate potential Vb.
  • the heat dissipation member 5 is grounded.
  • the insulating layer 3 and the insulating viscous body 7 function as a capacitor.
  • the potential difference ⁇ Va and the potential difference ⁇ Vb change depending on the thickness Hj of the insulating layer 3, the thickness Hk of the insulating viscous body 7, material characteristics, and the like.
  • the potential difference ⁇ Vb increases as the thickness Hk of the insulating viscous body 7 increases with respect to the thickness Hj of the insulating layer 3.
  • the thickness Hj of the insulating layer 3 is, for example, 50 ⁇ m or more and 300 ⁇ m or less
  • the thickness Hk of the insulating viscous body 7 is, for example, 50 ⁇ m or more and 200 ⁇ m or less.
  • a withstand voltage test is performed to inspect the withstand voltage of the insulating layer 3.
  • the voltage of a value obtained by adding 1 kV to twice the rated voltage of the semiconductor element 1 is applied for 1 minute at 60 Hz of alternating current to apply the voltage to the insulating layer 3. Inspect for dielectric breakdown.
  • the voltage applied in the withstand voltage test is, for example, about 3 kV, and is applied between the outer lead 2 b of the wiring member 2 and the heat dissipation member 5, for example.
  • the voltage applied in the withstand voltage test is referred to as withstand voltage test voltage.
  • the sealing material 6 does not generate partial discharge because the breakdown electric field is as high as about 100 kV/mm, but the insulating viscous body 7 is applied with a potential difference ⁇ Vb, and furthermore, minute bubbles are scattered inside. As a result, the electric field is concentrated in the bubbles and partial discharge occurs. Further, in the case of the semiconductor device 100 in which warpage occurs due to screwing, the insulating viscous body 7 has the same thickness as the insulating layer 3, and therefore partial discharge is more likely to occur.
  • FIG. 5 is an enlarged schematic configuration diagram of a part of the semiconductor device according to the first embodiment of the present invention.
  • FIG. 5A and FIG. 5B are schematic configuration diagrams in which the broken line P portion of FIG. 2 is enlarged.
  • a conductive protrusion 10 that protrudes from one of the conductor layer 4 and the heat dissipation member 5 toward the other and is separated from the other is provided.
  • the conductive protrusion 10 is formed of a conductive material such as metal.
  • the conductive protrusion 10 is provided so as to project from the conductor layer 4 toward the heat dissipation member 5, as shown in FIG. 5A, for example. At this time, the conductive protrusion 10 is in contact with the conductor layer 4 and separated from the heat dissipation member 5 via the insulating viscous body 7. Further, the conductive protrusion 10 may be provided so as to project from the heat dissipation member 5 toward the conductor layer 4, as shown in FIG. 5B, for example. At this time, the conductive protrusion 10 is in contact with the heat dissipation member 5 and is separated from the conductor layer 4 via the insulating viscous body 7.
  • the insulating viscous body 7 is formed so that partial discharge does not occur in all regions when a voltage lower than the rated voltage of the semiconductor element 1 is applied.
  • the insulating viscous body 7 at the position where the conductive protrusion 10 is not provided is formed so that partial discharge does not occur even when the withstand voltage test voltage is applied.
  • the electric field is concentrated on the conductive protrusion 10 and is larger than the rated voltage. Partial discharge occurs at the breakdown voltage or higher.
  • the insulating viscous body 7 between the conductive protrusion 10 and either one of the conductor layer 4 and the heat dissipation member 5 separated from the conductive protrusion 10 is at least partly discharged at a withstand voltage test voltage or more.
  • partial discharge may occur in a voltage range higher than the rated voltage and lower than the withstand voltage test voltage.
  • the withstand voltage test voltage may be, for example, the value of the withstand voltage of the semiconductor device 100 presented by the manufacturer.
  • the conductive protrusion 10 is provided so as to project from one of the conductor layer 4 and the heat dissipation member 5 toward the other and be spaced apart from the other.
  • a high voltage is applied in a withstand voltage test or the like, an electric field is concentrated on the conductive protrusion 10 and the insulating viscous body 7 between the conductive protrusion 10 and one of the conductor layer 4 and the heat dissipation member 5
  • the partial discharge is generated, and the insulating viscous material 7 in the other parts is suppressed from being generated. Thereby, the deterioration of the insulating viscous body 7 can be suppressed to the minimum.
  • FIG. 6 is an enlarged schematic configuration diagram of a part of the semiconductor device according to the first embodiment of the present invention.
  • the conductive protrusion 10 has, for example, a spherical tip and forms a uniform electric field.
  • the thickness Hc of the conductive protrusion 10 is such that the electric field of the insulating viscous body 7 between the conductive protrusion 10 and one of the conductor layer 4 and the heat dissipation member 5 is 3 kVrms/mm.
  • the following thicknesses are preferred. Since 3 kVrms/mm is the dielectric breakdown electric field of air of 1 atm, by designing the thickness Hc of the conductive protrusion 10 in this way, partial discharge occurs at normal times when the drive voltage is lower than the rated voltage. Can be suppressed.
  • the conductive protrusion 10 preferably has a tapered shape that tapers from one of the conductor layer 4 and the heat dissipation member 5 toward the other. With such a shape, the electric field is concentrated at the tip of the conductive protrusion 10, and partial discharge is likely to occur when a high voltage is applied.
  • the conductive protrusion 10 may have a flat tip, as shown in FIG. Even if the tip is flat, the electric field is concentrated at the corner 10a and a partial discharge is locally generated, so that it is possible to suppress the deterioration of the entire insulating viscous body 7.
  • the conductive protrusion 10 may be a part of the conductor layer 4 or the heat dissipation member 5.
  • the conductor layer 4 has a conductive protrusion 10 on a part of the surface on the heat dissipation member 5 side, and the conductive protrusion 10 protrudes toward the heat dissipation member 5 to form a heat dissipation member. 5 and the insulating viscous body 7 are spaced apart.
  • the heat dissipation member 5 has a conductive protrusion 10 on a part of the surface on the conductor layer 4 side, and the conductive protrusion 10 projects toward the conductor layer 4 and is insulated. It is separated from the conductor layer 4 via the viscous body 7.
  • the semiconductor device 100 is a part of the region where the insulating viscous body 7 is provided, and projects from one of the conductor layer 4 and the heat dissipation member 5 toward the other and separates from the other.
  • the conductive protrusion 10 is provided. As a result, the electric field is concentrated on the conductive protrusions 10 and a partial discharge is generated in the insulating viscous body 7 at the position where the conductive protrusions 10 are provided. Can be minimized.
  • the conductive protrusion 10 by disposing the conductive protrusion 10 at a predetermined position in the surface direction of the insulating viscous body 7, it is possible to set the discharge generation location to an appropriate location. Further, when the insulating viscous body 7 is carbonized by the partial discharge, a conduction path from the conductor layer 4 to the heat dissipation member 5 through the insulating viscous body 7 is formed, and the conductor layer 4 of the semiconductor device 100 and the heat dissipation member 5 are electrically connected. As a result, the partial discharge disappears, so that insulation reliability can be ensured.
  • the semiconductor element 1 since the conductive protrusion 10 is separated from one of the conductor layer 4 and the heat dissipation member 5, the semiconductor element 1 generates heat and repeatedly undergoes a temperature change, which causes expansion or expansion due to a difference in thermal expansion between members of the semiconductor device 100. Even if contraction occurs, the insulation reliability can be ensured without damaging the insulating layer 3.
  • FIG. 9 is a sectional view showing a schematic configuration of the semiconductor device according to the second embodiment of the present invention.
  • the conductive protrusion 10 is provided on the insulating viscous body 7
  • the semiconductor device 100 according to the present embodiment has the void portion 11 on the insulating viscous body 7.
  • description of the same points as those of the first embodiment will be omitted, and different points will be mainly described.
  • the semiconductor device 100 includes a semiconductor element 1, a wiring member 2, an insulating layer 3, a conductor layer 4, a heat dissipation member 5 and a sealing material 6.
  • the conductor layer 4 and the insulating layer 3 are laminated in order from the surface on the heat dissipation member 5 side.
  • An insulating viscous body 7 is provided between the conductor layer 4 and the heat dissipation member 5.
  • FIG. 10 is a sectional view showing a schematic configuration in which a part of the semiconductor device according to the second embodiment of the present invention is enlarged.
  • 10A, 10B, and 10C are schematic configuration diagrams in which the broken line Q portion of FIG. 9 is enlarged.
  • a void 11 is provided in a part of the region where the insulating viscous body 7 is provided.
  • the void portion 11 is formed larger than the air bubbles scattered inside the insulating viscous body 7. For example, when the bubbles dispersed inside the insulating viscous body 7 have a maximum diameter of about 5 mm, the insulating viscous body 7 is formed to be sufficiently larger than that.
  • the void 11 is provided on the conductor layer 4 side, for example, as shown in FIG. At this time, the gap 11 is separated from the heat dissipation member 5 via the insulating viscous body 7. Further, the void portion 11 may be provided on the heat dissipation member 5 side, for example, as shown in FIG. At this time, the void portion 11 is separated from the conductor layer 4 via the insulating viscous body 7. Further, as shown in FIG. 10C, the void portion 11 may be separated from both the conductor layer 4 and the heat dissipation member 5 and may be included in the insulating viscous body 7. As described above, in the void portion 11 provided in the insulating viscous body 7, partial discharge occurs due to application of a high voltage in a withstand voltage test or the like.
  • FIG. 11 is a schematic configuration diagram showing an example of a semiconductor device according to the second embodiment of the present invention.
  • the void 11 may be provided so as to penetrate between the conductor layer 4 and the heat dissipation member 5.
  • the void 11 may be provided so as to penetrate between the conductor layer 4 and the heat dissipation member 5.
  • a partial discharge occurs in the void 11.
  • the void portion 11 can be provided by reducing the application amount at the position where the void portion 11 is desired to be provided when the insulating viscous body 7 is applied.
  • the void portion 11 can be provided by reducing the number of application points at the position where the void portion 11 is provided.
  • the insulating viscous body 7 is provided with the void portion 11, so that a partial discharge is generated in the void portion 11 when a high voltage is applied. Therefore, it is possible to minimize the deterioration of the insulating viscous body 7 without causing partial discharge in the entire insulating viscous body 7. Furthermore, in the present embodiment, the void portion 11 can be formed at a predetermined position of the insulating viscous body 7 by a simple process of reducing the amount of application of the insulating viscous body 7 and the number of application points, and the discharge occurrence point is set to an appropriate location. be able to.
  • the conductor layer 4 of the semiconductor device 100 and the heat dissipation member 5 are electrically connected, and the partial discharge is extinguished, so that the insulation reliability can be secured.
  • FIG. 12 is an explanatory diagram for explaining the semiconductor device according to the third embodiment of the present invention. In the following, description of the same points as in the first and second embodiments will be omitted, and different points will be mainly described.
  • the semiconductor device 100 includes a semiconductor element 1, a wiring member 2, an insulating layer 3, a conductor layer 4, a heat dissipation member 5, and a sealing material 6.
  • the conductor layer 4 and the insulating layer 3 are laminated in order from the surface on the heat dissipation member 5 side.
  • An insulating viscous body 7 is provided between the conductor layer 4 and the heat dissipation member 5.
  • the conductive protrusion 10 is provided so as to protrude from one surface of the conductor layer 4 and the heat dissipation member 5 toward the other surface and is separated from the other surface. Has been.
  • the shortest distance from the semiconductor element 1 to the conductive protrusion 10 in the thickness direction (Z direction) is t.
  • the shortest distance t is a distance from the surface of the semiconductor element 1 on the wiring member 2 side to one of the surfaces of the conductor layer 4 and the heat dissipation member 5 on which the conductive protrusions 10 are provided.
  • the shortest distance between the semiconductor element 1 and the conductive protrusion 10 in the width direction (Y direction) of the semiconductor device 100 orthogonal to the thickness direction is d.
  • the shortest distance d is the distance from the surface perpendicular to the width direction of the semiconductor element 1 to the center position of the conductive protrusion 10.
  • the shortest distance d between the semiconductor element 1 and the conductive protrusion 10 in the width direction of the semiconductor device 100 is larger than the shortest distance t between the semiconductor element 1 and the conductive protrusion 10 in the thickness direction of the semiconductor device 100.
  • FIG. 12 shows an example in which the conductive protrusion 10 is provided on the semiconductor device 100
  • the void 11 may be used instead of the conductive protrusion 10.
  • the shortest distance from the semiconductor element 1 to the void portion 11 is shorter than the shortest distance in the thickness direction from the semiconductor element 1 toward the heat dissipation member 5 in the width direction orthogonal to the thickness direction. Is bigger.
  • the conductive protrusion 10 or the void 11 is provided in a part of the region where the insulating viscous body 7 is provided, so that partial discharge can be locally generated. It is possible to suppress deterioration of the entire insulating viscous body 7.
  • the shortest distance d from the semiconductor element 1 to the conductive protrusion 10 or the void 11 is larger than the shortest distance t in the thickness direction of the semiconductor device 100 in the width direction. That is, the conductive protrusion 10 or the void 11 is separated from the range in which heat reaches from the semiconductor element 1 which is a heat source by heat diffusion and greatly contributes to heat dissipation. As a result, even if a partial discharge occurs at the position where the conductive protrusion 10 or the void 11 is provided and the insulating viscous body 7 deteriorates, it is possible to suppress the influence on the heat dissipation.
  • FIG. 13 is a sectional view showing a schematic configuration of the semiconductor device according to the fourth embodiment of the present invention.
  • FIG. 14 is an enlarged schematic configuration diagram of a part of the semiconductor device according to the fourth embodiment of the present invention.
  • FIG. 14 is a schematic configuration diagram in which the broken line R portion of FIG. 13 is enlarged.
  • the semiconductor device 100 includes a semiconductor element 1, a wiring member 2, an insulating layer 3, a conductor layer 4, a heat dissipation member 5, and a sealing material 6.
  • the conductor layer 4 and the insulating layer 3 are laminated in order from the surface on the heat dissipation member 5 side.
  • An insulating viscous body 7 is provided between the conductor layer 4 and the heat dissipation member 5.
  • the conductive protrusion 10 is provided so as to project from one of the conductor layer 4 and the heat dissipation member 5 toward the other and is separated from the other. Further, a void 11 may be provided instead of the conductive protrusion 10.
  • the sealing material 6 penetrates the insulating layer 3 and the conductor layer 4 and includes a spacer portion 6 a that is in contact with the heat dissipation member 5 without the insulating viscous body 7.
  • the spacer portion 6a regulates the distance between the conductor layer 4 and the heat dissipation member 5, and secures the distance between the conductive protrusion portion 10 and one of the conductor layer 4 and the heat dissipation member 5 that are provided separately.
  • the spacer portion 6 a is preferably provided in the central portion of the semiconductor device 100 near the position of the screw 9.
  • the spacer portion 6 a of the sealing material 6 contacts the heat dissipation member 5 around the through hole through which the screw 9 penetrates. Accordingly, when the semiconductor device 100 is warped from the central portion toward the outside due to the screwing, the risk of being pressed by the spacer portion 6a and damaging the insulating layer 3 can be reduced.
  • the conductive protrusion 10 or the void 11 is provided in a part of the region where the insulating viscous body 7 is provided, so that partial discharge can be locally generated. It is possible to suppress deterioration of the entire insulating viscous body 7.
  • the spacer portion 6a by providing the spacer portion 6a, it is possible to prevent the distance between the conductor layer 4 and the heat dissipation member 5 from being closer than the distance regulated by the spacer portion 6a due to the deformation of the insulating viscous body 7. You can Thereby, when the semiconductor device 100 is warped, it is possible to reduce the risk that the conductive protrusion 10 directly contacts both the conductor layer 4 and the heat dissipation member 5, and the insulating layer 3 is damaged. In addition, it is possible to reduce a risk that the void portion 11 is crushed, the conductor layer 4 and the heat dissipation member 5 are directly contacted with each other, and the insulating layer 3 is damaged due to a difference in thermal expansion between them.
  • the spacer portion 12 may be provided separately from the sealing material 6.
  • the spacer portion 12 is made of an insulating material. By disposing the spacer portion 12 as a separate body from the sealing material 6, the arrangement of the spacer portion 12 can be appropriately set according to the position where the conductive protrusion portion 10 or the void portion 11 is provided.
  • FIG. 16 is a sectional view showing a schematic configuration of the semiconductor device according to the fifth embodiment of the present invention.
  • the semiconductor device 100 in which the lead frame is provided as the wiring member 2 and the sealing material 6 functions as a case has been described, but in the present embodiment, a conductive pattern is formed as the wiring member 2.
  • the case 6 is filled with the sealing material 6.
  • the semiconductor device 100 includes a semiconductor element 1, a wiring member 2, an insulating layer 3, a conductor layer 4, a heat dissipation member 5, a sealing material 6, and a case 20.
  • the insulating layer 3 is an insulating substrate formed of a ceramic such as aluminum nitride. Conductive patterns that form a main circuit as the wiring member 2 are formed on both surfaces of the insulating layer 3. The conductive pattern is formed of, for example, copper.
  • the case 20 surrounds the outer circumference with the insulating layer 3 as the bottom surface. From the upper surface of the case 20, the connection terminal 2c for connecting to the outside of the semiconductor device 100 is projected.
  • the case 20 is filled with a sealing material 6 such as silicone gel or epoxy resin, and the sealing material 6 covers the semiconductor element 1, the wiring member 2, and the like.
  • the conductor layer 4 is provided on the surface of the insulating layer 3 opposite to the surface on which the wiring member 2 is provided.
  • a heat radiating member 5 is provided on the surface of the conductor layer 4 opposite to the surface on the insulating layer 3 side through an insulating viscous body 7.
  • a conductive protrusion 10 is provided on a part of the insulating viscous body 7 so as to project from one surface of the conductor layer 4 and the heat dissipation member 5 toward the other surface and is separated from the other surface.
  • Insulating viscous body 7 may be provided with voids 11 instead of conductive protrusions 10.
  • a partial discharge is locally generated by providing the conductive protrusion 10 or the void 11 in a part of the region where the insulating viscous body 7 is provided. It is possible to prevent deterioration of the entire insulating viscous body 7.
  • Embodiments 1 to 5 an example in which one conductive protrusion 10 and one void 11 are provided is shown, but the number may be more than one.
  • the present invention can appropriately combine a plurality of constituent elements disclosed in the first to fifth embodiments without departing from the scope of the invention.

Abstract

Provided is a semiconductor device which suppresses damage of an insulating layer and suppresses degradation of the entire insulating viscous body that is formed between a conductor layer and a heat dissipating member.　A semiconductor device 100 includes a semiconductor element 1, a wiring member 2, an insulating layer 3, a conductor layer 4, a heat dissipating member 5, and a sealing member 6. The conductor layer 4 and the insulating layer 3 are stacked in order from the surface on the heat dissipating member 5 side. An insulating viscous body 7 is formed between the conductor layer 4 and the heat dissipating member 5. A conductive projection 10, which is formed in a portion of a region of the insulating viscous body 7, protrudes from one of the conductor layer 4 and the heat dissipating member 5 toward the other but is separated from the other.

Description

半導体装置Semiconductor device
　本発明は、放熱部材を備えた半導体装置に関する。 The present invention relates to a semiconductor device provided with a heat dissipation member.
　近年、半導体装置は、多機能化、高出力化及び小型化の傾向にある。これに伴い、半導体装置に実装される半導体素子の単位体積当たりの発熱量が大きく上昇しており、放熱性を確保することが重要となっている。放熱性を確保するための手段として、半導体装置には一般的に、底面に金属箔等の導体層が設けられ、導体層を介してヒートシンクなどの放熱部材が取り付けられている。また導体層と放熱部材との間には、接触面の熱抵抗を抑制するために、例えばグリスなどの高熱伝導の粘性体が塗布される。このような粘性体は、周囲の電子部品に付着して短絡などが生じるのを防止するため、絶縁性であることが好ましい。しかし、絶縁性の粘性体（以下、絶縁粘性体という）を用いた場合、導体層と放熱部材との間に電位差が生じることになる。また絶縁粘性体は内部に微小な気泡が散在されているため、絶縁耐圧試験などを行う際に高電圧が印加されると、散在された気泡で部分放電が発生し、絶縁粘性体全体が劣化することが懸念される。 In recent years, semiconductor devices have tended to be multifunctional, high-powered, and downsized. Along with this, the amount of heat generated per unit volume of the semiconductor element mounted on the semiconductor device has greatly increased, and it is important to ensure heat dissipation. As a means for ensuring heat dissipation, a semiconductor device is generally provided with a conductor layer such as a metal foil on the bottom surface, and a heat dissipation member such as a heat sink is attached via the conductor layer. Further, between the conductor layer and the heat radiating member, a viscous material having high heat conductivity such as grease is applied in order to suppress thermal resistance of the contact surface. Such a viscous material is preferably insulative so as to prevent it from adhering to surrounding electronic components and causing a short circuit or the like. However, when an insulating viscous body (hereinafter referred to as an insulating viscous body) is used, a potential difference occurs between the conductor layer and the heat dissipation member. Also, since minute bubbles are scattered inside the insulating viscous body, if a high voltage is applied when conducting a dielectric strength test, etc., partial discharge will occur in the scattered bubbles and the entire insulating viscous body will deteriorate. I am afraid to do so.
　そこで、導体層と放熱部材とを電気的に接続して同電位とし、絶縁粘性体に電界がかからないようにする手法が考案されている。例えば特許文献１では、半導体実装体の放熱面が、粘性体としての電気絶縁性のグリスを介して冷却手段に接触し、放熱面が、封止材における冷却手段との対向面よりも冷却手段側に突出した面として構成され、突出した放熱面を、グリスを介して冷却手段に押し当てることで、導体層と冷却手段との電気的接続がなされている。また、特許文献２では、金属製ブッシュを介してケースおよび放熱ベース板を貫通する雄ねじにより放熱ベース板の下面に放熱フィンをねじ止めすることによってブッシュの導電を確保している。 Therefore, a method has been devised to electrically connect the conductor layer and the heat dissipation member so that they have the same potential so that an electric field is not applied to the insulating viscous body. For example, in Patent Document 1, the heat radiating surface of the semiconductor package comes into contact with the cooling means through the electrically insulating grease as a viscous body, and the heat radiating surface is cooling means rather than the surface of the sealing material facing the cooling means. The conductor layer and the cooling means are electrically connected to each other by pressing the protruding heat dissipation surface against the cooling means via grease. Further, in Patent Document 2, the conduction of the bush is secured by screwing a radiation fin to the lower surface of the radiation base plate with a male screw penetrating the case and the radiation base plate via a metal bush.
特開２０１２－３３８７２号公報JP 2012-33872 A 特開２００２－４３４８６号公報JP, 2002-43486, A
　しかしながら、導体層及び放熱部材を電気的に接続するのに、互いに接触させたり、導電性の部材を間に設けてそれぞれ接触させたりすると、半導体素子が発生する熱により導体層及び放熱部材に繰り返し温度変化がかかり、互いの熱膨張差によって接触させた箇所に応力が集中し、絶縁層が損壊する恐れがある。 However, in order to electrically connect the conductor layer and the heat dissipation member, if they are brought into contact with each other or a conductive member is provided between them to make contact with each other, the heat generated by the semiconductor element repeatedly causes the conductor layer and the heat dissipation member to repeatedly contact each other. There is a risk that the temperature changes, the stress concentrates on the portions brought into contact with each other due to the difference in thermal expansion, and the insulating layer is damaged.
　本発明は、上述のような課題を解決するためになされたものであり、絶縁層の損壊を抑制しつつ、導体層と放熱部材の間に設けられた絶縁粘性体全体が劣化するのを抑制する半導体装置を提供することを目的とする。 The present invention has been made to solve the above problems, and suppresses the deterioration of the entire insulating viscous body provided between the conductor layer and the heat dissipation member while suppressing the damage of the insulating layer. It is an object of the present invention to provide a semiconductor device having
　本発明に係る半導体装置は、半導体素子と、半導体素子が実装される配線部材と、配線部材が配置される絶縁層と、絶縁層の半導体素子が実装された側の面と反対面に設けられた導体層と、配線部材の一部及び導体層の一方の面が露出するように、半導体素子、配線部材、絶縁層及び導体層を封止する封止材と、導体層の封止材から露出された面に設けられた絶縁粘性体と、絶縁粘性体を介して導体層と離間して設けられた放熱部材と、絶縁粘性体が設けられた領域の一部で、導体層及び放熱部材のいずれか一方から他方に向かって突出し、他方に離間して設けられた導電突起部とを備える。 A semiconductor device according to the present invention is provided with a semiconductor element, a wiring member on which the semiconductor element is mounted, an insulating layer on which the wiring member is arranged, and a surface of the insulating layer opposite to the surface on which the semiconductor element is mounted. A conductor layer, a sealing material for sealing the semiconductor element, the wiring member, the insulating layer and the conductor layer so that a part of the wiring member and one surface of the conductor layer are exposed; The insulating viscous body provided on the exposed surface, the heat dissipating member provided separately from the conductor layer via the insulating viscous body, and the conductor layer and the heat dissipating member in a part of the region where the insulating viscous body is provided. And a conductive projection portion that is provided to be spaced apart from the other.
　また本発明に係る半導体装置は、半導体素子と、半導体素子が実装される配線部材と、配線部材が配置される絶縁層と、絶縁層の半導体素子が実装された側の面と反対面に設けられた導体層と、配線部材の一部及び導体層の一方の面が露出するように、半導体素子、配線部材、絶縁層及び導体層を封止する封止材と、導体層の封止材から露出された面の一部に空隙部を有するように設けられた絶縁粘性体と、絶縁粘性体を介して導体層と離間して設けられた放熱部材とを備える。 Further, the semiconductor device according to the present invention is provided with a semiconductor element, a wiring member on which the semiconductor element is mounted, an insulating layer on which the wiring member is arranged, and a surface of the insulating layer opposite to the surface on which the semiconductor element is mounted. And a sealing material for sealing the semiconductor element, the wiring member, the insulating layer and the conductor layer so that a part of the wiring member and one surface of the conductor layer are exposed, and a sealing material for the conductor layer The insulating viscous body is provided so as to have a void in a part of the surface exposed from, and the heat dissipation member is provided so as to be separated from the conductor layer via the insulating viscous body.
　本発明に係る半導体装置によれば、絶縁粘性体が設けられた領域の一部に導電突起部又は空隙部を設けることで、導電突起部又は空隙部に電界が集中し、局所的に部分放電が生じやすくなるため、絶縁粘性体全体が劣化するのを抑制することができる。 According to the semiconductor device of the present invention, by providing the conductive protrusion or the void in a part of the region where the insulating viscous body is provided, the electric field is concentrated on the conductive protrusion or the void, and the partial discharge occurs locally. Is easily generated, it is possible to suppress deterioration of the entire insulating viscous body.
本発明の実施の形態１に係る半導体装置の概略構成を示す斜視図である。1 is a perspective view showing a schematic configuration of a semiconductor device according to a first embodiment of the present invention. 本発明の実施の形態１に係る半導体装置の概略構成を示す断面図である。1 is a sectional view showing a schematic configuration of a semiconductor device according to a first embodiment of the present invention. 本発明の実施の形態１に係る半導体装置の概略構成を示す断面図である。1 is a sectional view showing a schematic configuration of a semiconductor device according to a first embodiment of the present invention. 本発明の実施の形態１に係る半導体装置を説明するための説明図である。FIG. 3 is an explanatory diagram for explaining the semiconductor device according to the first embodiment of the present invention. 本発明の実施の形態１に係る半導体装置の一部を拡大した概略構成図である。FIG. 2 is a schematic configuration diagram in which a part of the semiconductor device according to the first embodiment of the present invention is enlarged. 本発明の実施の形態１に係る半導体装置の一部を拡大した概略構成図である。FIG. 2 is a schematic configuration diagram in which a part of the semiconductor device according to the first embodiment of the present invention is enlarged. 本発明の実施の形態１に係る半導体装置の一部を拡大した概略構成図である。FIG. 2 is a schematic configuration diagram in which a part of the semiconductor device according to the first embodiment of the present invention is enlarged. 本発明の実施の形態１に係る半導体装置の一部を拡大した概略構成図である。FIG. 2 is a schematic configuration diagram in which a part of the semiconductor device according to the first embodiment of the present invention is enlarged. 本発明の実施の形態２に係る半導体装置の概略構成を示す断面図である。FIG. 6 is a cross-sectional view showing a schematic configuration of a semiconductor device according to a second embodiment of the present invention. 本発明の実施の形態２に係る半導体装置の一部を拡大した概略構成図である。FIG. 6 is a schematic configuration diagram in which a part of the semiconductor device according to the second embodiment of the present invention is enlarged. 本発明の実施の形態２に係る半導体装置の一部を拡大した概略構成図である。FIG. 6 is a schematic configuration diagram in which a part of the semiconductor device according to the second embodiment of the present invention is enlarged. 本発明の実施の形態３に係る半導体装置を説明するための説明図である。FIG. 6 is an explanatory diagram for explaining a semiconductor device according to a third embodiment of the present invention. 本発明の実施の形態４に係る半導体装置の概略構成を示す断面図である。It is sectional drawing which shows schematic structure of the semiconductor device which concerns on Embodiment 4 of this invention. 本発明の実施の形態４に係る半導体装置の一部を拡大した概略構成図である。FIG. 9 is a schematic configuration diagram in which a part of a semiconductor device according to a fourth embodiment of the present invention is enlarged. 本発明の実施の形態４に係る半導体装置の一部を拡大した概略構成図である。FIG. 9 is a schematic configuration diagram in which a part of a semiconductor device according to a fourth embodiment of the present invention is enlarged. 本発明の実施の形態５に係る半導体装置の概略構成を示す断面図である。It is sectional drawing which shows schematic structure of the semiconductor device which concerns on Embodiment 5 of this invention.
　本発明の実施の形態に係る半導体装置を図面に基づいて説明する。 A semiconductor device according to an embodiment of the present invention will be described with reference to the drawings.
実施の形態１．
　図１は、本発明の実施の形態１に係る半導体装置の概略構成を示す斜視図である。また、図２、図３は、本発明の実施の形態１に係る半導体装置の概略構成を示す断面図である。図２は、図１のＡＡ’線に沿った断面図、図３は、図１のＢＢ’線に沿った断面図を示す。以下では、半導体装置の厚み方向である第１方向を矢印Ｚで示し、この半導体装置の幅方向である第２方向を矢印Ｙで示し、第１方向及び第２方向の双方と直交する第３方向を矢印Ｘで示すものとする。 Embodiment 1.
FIG. 1 is a perspective view showing a schematic configuration of the semiconductor device according to the first embodiment of the present invention. 2 and 3 are sectional views showing a schematic configuration of the semiconductor device according to the first embodiment of the present invention. 2 is a sectional view taken along the line AA′ of FIG. 1, and FIG. 3 is a sectional view taken along the line BB′ of FIG. In the following, the first direction, which is the thickness direction of the semiconductor device, is indicated by arrow Z, the second direction, which is the width direction of this semiconductor device, is indicated by arrow Y, and the third direction orthogonal to both the first direction and the second direction is indicated. The direction is indicated by arrow X.
　図１、図２に示すように、半導体装置１００は、半導体素子１、配線部材２、絶縁層３、導体層４、放熱部材５及び封止材６を備える。半導体素子１、配線部材２、絶縁層３及び導体層４は、配線部材２の一部と、導体層４の一方の面とが露出するように、封止材６で封止されている。放熱部材５は、導体層４の封止材６から露出された面に、絶縁粘性体７を介して取り付けられている。 As shown in FIGS. 1 and 2, the semiconductor device 100 includes a semiconductor element 1, a wiring member 2, an insulating layer 3, a conductor layer 4, a heat dissipation member 5 and a sealing material 6. The semiconductor element 1, the wiring member 2, the insulating layer 3, and the conductor layer 4 are sealed with a sealing material 6 so that a part of the wiring member 2 and one surface of the conductor layer 4 are exposed. The heat dissipation member 5 is attached to the surface of the conductor layer 4 exposed from the sealing material 6 via an insulating viscous body 7.
　半導体素子１は、裏面電極が半田（図示せず）などを介して配線部材２に実装されている。半導体素子１は、例えばＩＧＢＴ（Ｉｎｓｕｌａｔｅｄ　Ｇａｔｅ　Ｂｉｐｏｌａｒ　Ｔｒａｎｓｉｓｔｏｒ）やダイオードなどである。配線部材２は、例えばリードフレームである。配線部材２は、例えば銅板や鋼板が所定の形状に打ち抜かれ、回路パターンを形成している。配線部材２は、封止材６に内包されたインナーリード２ａと、封止材６から露出されて外部の配線と接続可能なアウターリード２ｂとを有する。配線部材２と半導体素子１の表面電極との間や配線部材２同士は、ワイヤ８により電気的に接続される。ワイヤ８は、例えばアルミニウム線などである。 The back electrode of the semiconductor element 1 is mounted on the wiring member 2 via solder (not shown) or the like. The semiconductor element 1 is, for example, an IGBT (Insulated Gate Bipolar Transistor) or a diode. The wiring member 2 is, for example, a lead frame. The wiring member 2 is, for example, a copper plate or a steel plate punched into a predetermined shape to form a circuit pattern. The wiring member 2 has an inner lead 2a included in the sealing material 6 and an outer lead 2b exposed from the sealing material 6 and connectable to an external wiring. The wiring member 2 and the surface electrode of the semiconductor element 1 and the wiring members 2 are electrically connected by a wire 8. The wire 8 is, for example, an aluminum wire.
　配線部材２は、絶縁層３上に配置されている。絶縁層３の半導体素子１が設けられた側の面の反対面には、導体層４が設けられている。ここで絶縁層３は、例えばエポキシ樹脂などの熱硬化性樹脂に熱伝導性の高い無機粉末フィラーが充填されたものが用いられている。また導体層４は、例えば銅やアルミニウムなどの金属箔や金属板である。 The wiring member 2 is arranged on the insulating layer 3. A conductor layer 4 is provided on the surface of the insulating layer 3 opposite to the surface on which the semiconductor element 1 is provided. Here, as the insulating layer 3, for example, a thermosetting resin such as an epoxy resin filled with an inorganic powder filler having high thermal conductivity is used. The conductor layer 4 is, for example, a metal foil such as copper or aluminum or a metal plate.
　導体層４の封止材６から露出した面には、絶縁粘性体７を介して導体層４から離間して放熱部材５が設けられている。放熱部材５は、例えば複数のフィンが配列されたヒートシンクであり、銅やアルミニウムなど熱伝導率の高い導電性材料で形成されている。絶縁粘性体７は、導体層４と放熱部材５の隙間を埋めるように塗布され、熱抵抗を小さくしている。また絶縁粘性体７は、導体層４と放熱部材５とが互いに直接接触しないように設けられ、導体層４と放熱部材５との熱膨張差で膨張や収縮が生じて絶縁層３にクラックなどの欠陥が生じるのを防いでいる。また絶縁粘性体７は、熱収縮により半導体装置１００の外部に排出され、周囲の電子部品に付着して短絡するのを防止するために、電気的な絶縁性を有している。絶縁粘性体７は、例えば高熱伝導のグリス、接着剤、ペーストである。 A heat dissipation member 5 is provided on the surface of the conductor layer 4 exposed from the encapsulant 6 and separated from the conductor layer 4 via an insulating viscous body 7. The heat dissipation member 5 is, for example, a heat sink in which a plurality of fins are arranged, and is made of a conductive material having a high thermal conductivity such as copper or aluminum. The insulating viscous material 7 is applied so as to fill the gap between the conductor layer 4 and the heat dissipation member 5 to reduce the thermal resistance. Further, the insulating viscous body 7 is provided so that the conductor layer 4 and the heat dissipation member 5 do not come into direct contact with each other, and expansion or contraction occurs due to a difference in thermal expansion between the conductor layer 4 and the heat dissipation member 5, so that the insulation layer 3 is cracked or the like. It prevents the occurrence of defects. The insulating viscous body 7 has an electrical insulating property in order to prevent the insulating viscous body from being discharged to the outside of the semiconductor device 100 due to thermal contraction and adhering to surrounding electronic components to cause a short circuit. The insulating viscous body 7 is, for example, high heat conductive grease, adhesive, or paste.
　封止材６は、封止した部材間の絶縁性を確保するとともに、半導体装置１００のケースとして機能する。封止材６は、例えば金型を用いてトランスファモールド成型によって形成される。その他、封止材６の成形方法として、例えば射出成形、コンプレッション成形等を用いることができる。また、封止材６は、例えば、充填材を含有したエポキシ樹脂、フェノール樹脂等である。 The encapsulating material 6 ensures the insulation between the sealed members and also functions as a case of the semiconductor device 100. The sealing material 6 is formed by transfer molding using a mold, for example. In addition, as a molding method of the sealing material 6, for example, injection molding, compression molding, or the like can be used. The sealing material 6 is, for example, an epoxy resin containing a filler, a phenol resin, or the like.
　図３に示すように、半導体装置１００は、例えば中央部にネジ９が挿入され、放熱部材５を固定している。封止材６、絶縁層３、導体層４には、それぞれネジ９が貫通する貫通孔が形成され、放熱部材５には、ネジ９と螺合するネジ孔が設けられている。ネジ９は、封止材６で側面が覆われ、導体層４と放熱部材５とが電気的に接続しないように設けられる。このように、半導体装置１００の中央部に挿入されたネジ９により放熱部材５が固定される場合、半導体装置１００の中央部から外側に向かって反りが生じ、導体層４と放熱部材５との間隔が広くなる。絶縁粘性体７は、この導体層４と放熱部材５との間隔を埋める必要があるため、絶縁粘性体７の厚みが大きくなる。図３では、ネジ９が一箇所に設けられた例を示したが、ネジ９は、二箇所以上に設けられてもよい。また、放熱部材５側から封止材６側に向かってネジ止めされてもよい。 As shown in FIG. 3, in the semiconductor device 100, for example, a screw 9 is inserted in the central portion to fix the heat dissipation member 5. A through hole through which a screw 9 penetrates is formed in each of the sealing material 6, the insulating layer 3, and the conductor layer 4, and the heat dissipation member 5 is provided with a screw hole into which the screw 9 is screwed. The side surface of the screw 9 is covered with the sealing material 6, and is provided so that the conductor layer 4 and the heat dissipation member 5 are not electrically connected. In this way, when the heat dissipation member 5 is fixed by the screw 9 inserted in the central portion of the semiconductor device 100, a warp occurs outward from the central portion of the semiconductor device 100, and the conductor layer 4 and the heat dissipation member 5 are bent. The spacing becomes wider. Since the insulating viscous body 7 needs to fill the space between the conductor layer 4 and the heat dissipation member 5, the insulating viscous body 7 has a large thickness. Although FIG. 3 shows an example in which the screw 9 is provided at one place, the screw 9 may be provided at two or more places. Further, it may be screwed from the heat radiating member 5 side toward the sealing material 6 side.
　図４は、本発明の実施の形態１に係る半導体装置を説明するための説明図である。図４に示すように、半導体装置１００に電圧が印加されると、半導体素子１が実装される配線部材２は、絶縁層３によって絶縁性が確保され、高電位Ｖａを持つ。また導体層４は、絶縁層３及び絶縁粘性体７によって電気的に絶縁され、浮き電極として振る舞い、中間の電位Ｖｂを持つ。ここで、放熱部材５は接地されているとする。 FIG. 4 is an explanatory diagram for explaining the semiconductor device according to the first embodiment of the present invention. As shown in FIG. 4, when a voltage is applied to the semiconductor device 100, the insulating property of the wiring member 2 on which the semiconductor element 1 is mounted is secured by the insulating layer 3, and the wiring member 2 has a high potential Va. Further, the conductor layer 4 is electrically insulated by the insulating layer 3 and the insulating viscous body 7, behaves as a floating electrode, and has an intermediate potential Vb. Here, it is assumed that the heat dissipation member 5 is grounded.
　絶縁層３及び絶縁粘性体７は、コンデンサとして機能する。電位差ΔＶａ及び電位差ΔＶｂは、絶縁層３の厚みＨｊ及び絶縁粘性体７の厚みＨｋ、材料特性などによって変化する。例えば、絶縁層３の厚みＨｊに対して絶縁粘性体７の厚みＨｋが大きくなるほど電位差ΔＶｂは増加する。絶縁層３の厚みＨｊは、例えば５０μｍ以上３００μｍ以下であり、絶縁粘性体７の厚みＨｋは、例えば５０μｍ以上２００μｍ以下である。 The insulating layer 3 and the insulating viscous body 7 function as a capacitor. The potential difference ΔVa and the potential difference ΔVb change depending on the thickness Hj of the insulating layer 3, the thickness Hk of the insulating viscous body 7, material characteristics, and the like. For example, the potential difference ΔVb increases as the thickness Hk of the insulating viscous body 7 increases with respect to the thickness Hj of the insulating layer 3. The thickness Hj of the insulating layer 3 is, for example, 50 μm or more and 300 μm or less, and the thickness Hk of the insulating viscous body 7 is, for example, 50 μm or more and 200 μm or less.
　半導体装置１００では、通常、絶縁層３の耐電圧を検査するために絶縁耐圧試験が実施される。絶縁耐圧試験では、安全規格（ＩＥＣ６０９５０など）の規格値に準拠すると、半導体素子１の定格電圧の２倍に１ｋＶを加算した値の電圧を、交流の６０Ｈｚで１分間印加して絶縁層３の絶縁破壊の有無を検査する。絶縁耐圧試験で印加される電圧は、例えば３ｋＶ程度であり、例えば、配線部材２のアウターリード２ｂと放熱部材５との間に印加される。以下では、絶縁耐圧試験で印加される電圧を絶縁耐圧試験電圧と記す。このような絶縁耐圧試験において、封止材６は、破壊電界が１００ｋＶ／ｍｍ程度と高いため部分放電を発生しないが、絶縁粘性体７は、電位差ΔＶｂがかかり、さらに内部に微小な気泡が散在するため、気泡中に電界が集中して部分放電が発生する。またネジ止めにより、反りが発生するような半導体装置１００の場合、絶縁粘性体７は、絶縁層３と同程度の厚みとなるため、さらに部分放電が生じやすくなる。 In the semiconductor device 100, normally, a withstand voltage test is performed to inspect the withstand voltage of the insulating layer 3. In the withstand voltage test, according to the standard value of the safety standard (IEC60950, etc.), the voltage of a value obtained by adding 1 kV to twice the rated voltage of the semiconductor element 1 is applied for 1 minute at 60 Hz of alternating current to apply the voltage to the insulating layer 3. Inspect for dielectric breakdown. The voltage applied in the withstand voltage test is, for example, about 3 kV, and is applied between the outer lead 2 b of the wiring member 2 and the heat dissipation member 5, for example. Hereinafter, the voltage applied in the withstand voltage test is referred to as withstand voltage test voltage. In such a withstand voltage test, the sealing material 6 does not generate partial discharge because the breakdown electric field is as high as about 100 kV/mm, but the insulating viscous body 7 is applied with a potential difference ΔVb, and furthermore, minute bubbles are scattered inside. As a result, the electric field is concentrated in the bubbles and partial discharge occurs. Further, in the case of the semiconductor device 100 in which warpage occurs due to screwing, the insulating viscous body 7 has the same thickness as the insulating layer 3, and therefore partial discharge is more likely to occur.
　図５は、本発明の実施の形態１に係る半導体装置の一部を拡大した概略構成図である。図５（ａ）、図５（ｂ）は、図２の破線Ｐ部を拡大した概略構成図である。図５に示すように、絶縁粘性体７が設けられた領域の一部には、導体層４及び放熱部材５のいずれか一方から他方に向かって突出し、他方と離間した導電突起部１０が設けられる。導電突起部１０は、例えば金属などの導電性材料で形成されている。 FIG. 5 is an enlarged schematic configuration diagram of a part of the semiconductor device according to the first embodiment of the present invention. FIG. 5A and FIG. 5B are schematic configuration diagrams in which the broken line P portion of FIG. 2 is enlarged. As shown in FIG. 5, in a part of the region where the insulating viscous body 7 is provided, a conductive protrusion 10 that protrudes from one of the conductor layer 4 and the heat dissipation member 5 toward the other and is separated from the other is provided. To be The conductive protrusion 10 is formed of a conductive material such as metal.
　導電突起部１０は、例えば図５（ａ）に示すように、導体層４から放熱部材５に向かって突出するように設けられる。このとき、導電突起部１０は、導体層４とは接し、放熱部材５とは絶縁粘性体７を介して離間している。また導電突起部１０は、例えば図５（ｂ）に示すように、放熱部材５から導体層４に向かって突出するように設けられてもよい。このとき、導電突起部１０は、放熱部材５とは接し、導体層４とは絶縁粘性体７を介して離間している。 The conductive protrusion 10 is provided so as to project from the conductor layer 4 toward the heat dissipation member 5, as shown in FIG. 5A, for example. At this time, the conductive protrusion 10 is in contact with the conductor layer 4 and separated from the heat dissipation member 5 via the insulating viscous body 7. Further, the conductive protrusion 10 may be provided so as to project from the heat dissipation member 5 toward the conductor layer 4, as shown in FIG. 5B, for example. At this time, the conductive protrusion 10 is in contact with the heat dissipation member 5 and is separated from the conductor layer 4 via the insulating viscous body 7.
　絶縁粘性体７は、絶縁信頼性を確保するために、半導体素子１の定格電圧以下の電圧が印加されたときすべての領域で部分放電が生じないように形成されている。また、導電突起部１０が設けられていない位置での絶縁粘性体７では、絶縁耐圧試験電圧が印加されても部分放電が生じないように形成されている。一方、導電突起部１０と、導電突起部１０から離間した導体層４及び放熱部材５のいずれか一方との間における絶縁粘性体７は、導電突起部１０に電界が集中し、定格電圧より大きい絶縁耐圧試験電圧以上で部分放電が生じる。ここで、導電突起部１０と、導電突起部１０から離間した導体層４及び放熱部材５のいずれか一方との間における絶縁粘性体７は、少なくとも絶縁耐圧試験電圧以上で部分放電が生じればよく、定格電圧より大きく、絶縁耐圧試験電圧より小さい電圧範囲で部分放電が生じてもよい。また、絶縁耐圧試験電圧は、例えばメーカーが提示する半導体装置１００の絶縁耐圧の値であってもよい。 In order to ensure insulation reliability, the insulating viscous body 7 is formed so that partial discharge does not occur in all regions when a voltage lower than the rated voltage of the semiconductor element 1 is applied. In addition, the insulating viscous body 7 at the position where the conductive protrusion 10 is not provided is formed so that partial discharge does not occur even when the withstand voltage test voltage is applied. On the other hand, in the insulating viscous body 7 between the conductive protrusion 10 and one of the conductor layer 4 and the heat dissipation member 5 separated from the conductive protrusion 10, the electric field is concentrated on the conductive protrusion 10 and is larger than the rated voltage. Partial discharge occurs at the breakdown voltage or higher. Here, the insulating viscous body 7 between the conductive protrusion 10 and either one of the conductor layer 4 and the heat dissipation member 5 separated from the conductive protrusion 10 is at least partly discharged at a withstand voltage test voltage or more. Of course, partial discharge may occur in a voltage range higher than the rated voltage and lower than the withstand voltage test voltage. The withstand voltage test voltage may be, for example, the value of the withstand voltage of the semiconductor device 100 presented by the manufacturer.
　このように、絶縁粘性体７が設けられた領域の一部で、導体層４及び放熱部材５のいずれか一方から他方に向かって突出し、他方と離間して導電突起部１０が設けられることで、絶縁耐圧試験などで高電圧が印加された場合、導電突起部１０に電界が集中し、導電突起部１０と、導体層４及び放熱部材５のいずれか一方との間の絶縁粘性体７で部分放電が生じ、その他の部分の絶縁粘性体７では部分放電が生じるのを抑制する。これにより、絶縁粘性体７の劣化を最小限に抑えることができる。 In this way, in a part of the region where the insulating viscous body 7 is provided, the conductive protrusion 10 is provided so as to project from one of the conductor layer 4 and the heat dissipation member 5 toward the other and be spaced apart from the other. When a high voltage is applied in a withstand voltage test or the like, an electric field is concentrated on the conductive protrusion 10 and the insulating viscous body 7 between the conductive protrusion 10 and one of the conductor layer 4 and the heat dissipation member 5 The partial discharge is generated, and the insulating viscous material 7 in the other parts is suppressed from being generated. Thereby, the deterioration of the insulating viscous body 7 can be suppressed to the minimum.
　導電突起部１０の厚みＨｃ及び形状は、定格電圧、絶縁層３の厚みＨｊ及び絶縁粘性体７の厚みＨｋ、材料特性などに応じて設計される。図６は、本発明の実施の形態１に係る半導体装置の一部を拡大した概略構成図である。図６に示すように、導電突起部１０は、例えば先端が球状であり、一様な電界を形成するとする。このとき、導電突起部１０の厚みＨｃは、定格電圧が印加された場合、導電突起部１０と、導体層４及び放熱部材５いずれか一方との間における絶縁粘性体７の電界が３ｋＶｒｍｓ／ｍｍ以下となる厚みであると好ましい。３ｋＶｒｍｓ／ｍｍは、１気圧の空気の絶縁破壊電界であるため、導電突起部１０の厚みＨｃをこのように設計することで、定格電圧以下の駆動電圧で運転される通常時に部分放電が生じるのを抑制することができる。 The thickness Hc and shape of the conductive protrusion 10 are designed according to the rated voltage, the thickness Hj of the insulating layer 3 and the thickness Hk of the insulating viscous body 7, material characteristics, and the like. FIG. 6 is an enlarged schematic configuration diagram of a part of the semiconductor device according to the first embodiment of the present invention. As shown in FIG. 6, the conductive protrusion 10 has, for example, a spherical tip and forms a uniform electric field. At this time, when the rated voltage is applied, the thickness Hc of the conductive protrusion 10 is such that the electric field of the insulating viscous body 7 between the conductive protrusion 10 and one of the conductor layer 4 and the heat dissipation member 5 is 3 kVrms/mm. The following thicknesses are preferred. Since 3 kVrms/mm is the dielectric breakdown electric field of air of 1 atm, by designing the thickness Hc of the conductive protrusion 10 in this way, partial discharge occurs at normal times when the drive voltage is lower than the rated voltage. Can be suppressed.
　導電突起部１０は、図５に示すように、導体層４及び放熱部材５のいずれ一方から、他方に向かって先細ったテーパ形状であることが好ましい。このような形状とすることで、導電突起部１０の先端部に電界が集中し、高電圧が印加された場合に部分放電を生じやすくする。 As shown in FIG. 5, the conductive protrusion 10 preferably has a tapered shape that tapers from one of the conductor layer 4 and the heat dissipation member 5 toward the other. With such a shape, the electric field is concentrated at the tip of the conductive protrusion 10, and partial discharge is likely to occur when a high voltage is applied.
　また導電突起部１０は、図７に示すように、先端が平坦な形状であってもよい。先端が平坦な形状であっても角部１０ａで電界が集中し、局所的に部分放電が生じるため、絶縁粘性体７全体が劣化するのを抑制することができる。 Further, the conductive protrusion 10 may have a flat tip, as shown in FIG. Even if the tip is flat, the electric field is concentrated at the corner 10a and a partial discharge is locally generated, so that it is possible to suppress the deterioration of the entire insulating viscous body 7.
　また導電突起部１０は、導体層４又は放熱部材５の一部であってもよい。図８（ａ）に示すように、例えば導体層４は、放熱部材５側の面の一部に導電突起部１０を有し、導電突起部１０は、放熱部材５に向かって突出し、放熱部材５と絶縁粘性体７を介して離間している。また図８（ｂ）に示すように、例えば放熱部材５は、導体層４側の面の一部に導電突起部１０を有し、導電突起部１０は、導体層４に向かって突出し、絶縁粘性体７を介して導体層４と離間している。 The conductive protrusion 10 may be a part of the conductor layer 4 or the heat dissipation member 5. As shown in FIG. 8A, for example, the conductor layer 4 has a conductive protrusion 10 on a part of the surface on the heat dissipation member 5 side, and the conductive protrusion 10 protrudes toward the heat dissipation member 5 to form a heat dissipation member. 5 and the insulating viscous body 7 are spaced apart. Further, as shown in FIG. 8B, for example, the heat dissipation member 5 has a conductive protrusion 10 on a part of the surface on the conductor layer 4 side, and the conductive protrusion 10 projects toward the conductor layer 4 and is insulated. It is separated from the conductor layer 4 via the viscous body 7.
　上述のとおり、本実施の形態に係る半導体装置１００は、絶縁粘性体７が設けられた領域の一部で、導体層４及び放熱部材５のいずれか一方から他方に向かって突出し、他方と離間した導電突起部１０を備える。これにより導電突起部１０に電界集中し、導電突起部１０が設けられた位置における絶縁粘性体７で部分放電が生じることにより、絶縁粘性体７全体に部分放電が生じることなく、絶縁粘性体７の劣化を最小限に抑えることができる。 As described above, the semiconductor device 100 according to the present embodiment is a part of the region where the insulating viscous body 7 is provided, and projects from one of the conductor layer 4 and the heat dissipation member 5 toward the other and separates from the other. The conductive protrusion 10 is provided. As a result, the electric field is concentrated on the conductive protrusions 10 and a partial discharge is generated in the insulating viscous body 7 at the position where the conductive protrusions 10 are provided. Can be minimized.
　また導電突起部１０を絶縁粘性体７の面方向の所定位置に配置することで、放電発生個所を適切な箇所に設定することができる。また部分放電によって絶縁粘性体７が炭化すると、導体層４から絶縁粘性体７を介して放熱部材５に向かう導通経路ができ、半導体装置１００の導体層４と放熱部材５とが電気的に接続されて部分放電が消滅するため、絶縁信頼性を確保することができる。また、導電突起部１０は、導体層４及び放熱部材５の一方と離間しているため、半導体素子１が発熱して繰り返し温度変化がかかり、半導体装置１００の部材間の熱膨張差により膨張や収縮が生じても、絶縁層３が損壊されることなく、絶縁信頼性を確保することができる。 Further, by disposing the conductive protrusion 10 at a predetermined position in the surface direction of the insulating viscous body 7, it is possible to set the discharge generation location to an appropriate location. Further, when the insulating viscous body 7 is carbonized by the partial discharge, a conduction path from the conductor layer 4 to the heat dissipation member 5 through the insulating viscous body 7 is formed, and the conductor layer 4 of the semiconductor device 100 and the heat dissipation member 5 are electrically connected. As a result, the partial discharge disappears, so that insulation reliability can be ensured. Further, since the conductive protrusion 10 is separated from one of the conductor layer 4 and the heat dissipation member 5, the semiconductor element 1 generates heat and repeatedly undergoes a temperature change, which causes expansion or expansion due to a difference in thermal expansion between members of the semiconductor device 100. Even if contraction occurs, the insulation reliability can be ensured without damaging the insulating layer 3.
実施の形態２．
　図９は、本発明の実施の形態２に係る半導体装置の概略構成を示す断面図である。実施の形態１では、絶縁粘性体７に導電突起部１０を設けていたのに対し、本実施の形態に係る半導体装置１００は、絶縁粘性体７に空隙部１１を設けている。以下では、実施の形態１と同様である点の説明を省略し、異なる点を中心に説明する。 Embodiment 2.
FIG. 9 is a sectional view showing a schematic configuration of the semiconductor device according to the second embodiment of the present invention. In the first embodiment, the conductive protrusion 10 is provided on the insulating viscous body 7, whereas the semiconductor device 100 according to the present embodiment has the void portion 11 on the insulating viscous body 7. Hereinafter, description of the same points as those of the first embodiment will be omitted, and different points will be mainly described.
　図９に示すように、本実施の形態に係る半導体装置１００は、半導体素子１、配線部材２、絶縁層３、導体層４、放熱部材５及び封止材６を備える。放熱部材５側の面から順に導体層４と絶縁層３とが積層されている。導体層４と放熱部材５との間には、絶縁粘性体７が設けられている。 As shown in FIG. 9, the semiconductor device 100 according to the present embodiment includes a semiconductor element 1, a wiring member 2, an insulating layer 3, a conductor layer 4, a heat dissipation member 5 and a sealing material 6. The conductor layer 4 and the insulating layer 3 are laminated in order from the surface on the heat dissipation member 5 side. An insulating viscous body 7 is provided between the conductor layer 4 and the heat dissipation member 5.
　図１０は、本発明の実施の形態２に係る半導体装置の一部を拡大した概略構成を示す断面図である。図１０（ａ）、図１０（ｂ）、図１０（ｃ）は、図９の破線Ｑ部を拡大した概略構成図である。図１０に示すように、絶縁粘性体７が設けられた領域の一部に空隙部１１が設けられる。空隙部１１は、絶縁粘性体７内部に散在する気泡よりも大きく形成される。例えば絶縁粘性体７内部に散在する気泡が最大直径５ｍｍ程度である場合、絶縁粘性体７はそれよりも十分に大きくなるように形成される。 FIG. 10 is a sectional view showing a schematic configuration in which a part of the semiconductor device according to the second embodiment of the present invention is enlarged. 10A, 10B, and 10C are schematic configuration diagrams in which the broken line Q portion of FIG. 9 is enlarged. As shown in FIG. 10, a void 11 is provided in a part of the region where the insulating viscous body 7 is provided. The void portion 11 is formed larger than the air bubbles scattered inside the insulating viscous body 7. For example, when the bubbles dispersed inside the insulating viscous body 7 have a maximum diameter of about 5 mm, the insulating viscous body 7 is formed to be sufficiently larger than that.
　空隙部１１は、例えば図１０（ａ）に示すように、導体層４側に設けられる。このとき、空隙部１１は、絶縁粘性体７を介して放熱部材５と離間している。また空隙部１１は、例えば図１０（ｂ）に示すように、放熱部材５側に設けられてもよい。このとき、空隙部１１は、絶縁粘性体７を介して導体層４と離間している。また図１０（ｃ）に示すように、空隙部１１は、導体層４及び放熱部材５の双方から離間し、絶縁粘性体７に内包されていてもよい。このように、絶縁粘性体７に設けられた空隙部１１では、絶縁耐圧試験などで高電圧が印加されることにより部分放電が生じる。 The void 11 is provided on the conductor layer 4 side, for example, as shown in FIG. At this time, the gap 11 is separated from the heat dissipation member 5 via the insulating viscous body 7. Further, the void portion 11 may be provided on the heat dissipation member 5 side, for example, as shown in FIG. At this time, the void portion 11 is separated from the conductor layer 4 via the insulating viscous body 7. Further, as shown in FIG. 10C, the void portion 11 may be separated from both the conductor layer 4 and the heat dissipation member 5 and may be included in the insulating viscous body 7. As described above, in the void portion 11 provided in the insulating viscous body 7, partial discharge occurs due to application of a high voltage in a withstand voltage test or the like.
　図１１は、本発明の実施の形態２に係る半導体装置の一例を示す概略構成図である。図１１に示すように、空隙部１１は、導体層４と放熱部材５との間に貫通して設けられてもよい。このように、空隙部１１が導体層４と放熱部材５との間に貫通して設けられていても、空隙部１１で部分放電が生じる。 FIG. 11 is a schematic configuration diagram showing an example of a semiconductor device according to the second embodiment of the present invention. As shown in FIG. 11, the void 11 may be provided so as to penetrate between the conductor layer 4 and the heat dissipation member 5. Thus, even if the void 11 is provided so as to penetrate between the conductor layer 4 and the heat dissipation member 5, a partial discharge occurs in the void 11.
　空隙部１１は、絶縁粘性体７の塗布時に空隙部１１を設けたい位置の塗布量を減らすことで設けることができる。例えば、多点塗布で絶縁粘性体７が塗布される場合、空隙部１１を設ける位置の塗布点数を減らすことで空隙部１１を設けることができる。 The void portion 11 can be provided by reducing the application amount at the position where the void portion 11 is desired to be provided when the insulating viscous body 7 is applied. For example, when the insulating viscous material 7 is applied by multi-point application, the void portion 11 can be provided by reducing the number of application points at the position where the void portion 11 is provided.
　上述のとおり、本実施の形態では、絶縁粘性体７に空隙部１１を設けることで、高電圧が印加された場合、空隙部１１で部分放電が生じることになる。そのため、絶縁粘性体７全体で部分放電が生じることなく、絶縁粘性体７の劣化を最小限に抑えることが可能である。さらに本実施の形態では、絶縁粘性体７の塗布量、塗布点数を減らすという簡単な工程により、絶縁粘性体７の所定位置に空隙部１１を形成でき、放電発生個所を適切な箇所に設定することができる。また部分放電によって絶縁粘性体７の導通経路ができると半導体装置１００の導体層４と放熱部材５とが電気的に接続され、部分放電が消滅するため、絶縁信頼性を確保することができる。 As described above, in the present embodiment, the insulating viscous body 7 is provided with the void portion 11, so that a partial discharge is generated in the void portion 11 when a high voltage is applied. Therefore, it is possible to minimize the deterioration of the insulating viscous body 7 without causing partial discharge in the entire insulating viscous body 7. Furthermore, in the present embodiment, the void portion 11 can be formed at a predetermined position of the insulating viscous body 7 by a simple process of reducing the amount of application of the insulating viscous body 7 and the number of application points, and the discharge occurrence point is set to an appropriate location. be able to. Further, if the conductive path of the insulating viscous body 7 is formed by the partial discharge, the conductor layer 4 of the semiconductor device 100 and the heat dissipation member 5 are electrically connected, and the partial discharge is extinguished, so that the insulation reliability can be secured.
実施の形態３．
　図１２は、本発明の実施の形態３に係る半導体装置を説明するための説明図である。以下では、実施の形態１、２と同様である点の説明を省略し、異なる点を中心に説明する。 Embodiment 3.
FIG. 12 is an explanatory diagram for explaining the semiconductor device according to the third embodiment of the present invention. In the following, description of the same points as in the first and second embodiments will be omitted, and different points will be mainly described.
　本実施の形態に係る半導体装置１００は、半導体素子１、配線部材２、絶縁層３、導体層４、放熱部材５及び封止材６を備える。放熱部材５側の面から順に導体層４と絶縁層３とが積層されている。導体層４と放熱部材５との間には、絶縁粘性体７が設けられている。絶縁粘性体７が設けられた領域の一部には、導電突起部１０が導体層４及び放熱部材５のいずれか一方の面から他方の面に向かって突出し、他方の面と離間して設けられている。 The semiconductor device 100 according to this embodiment includes a semiconductor element 1, a wiring member 2, an insulating layer 3, a conductor layer 4, a heat dissipation member 5, and a sealing material 6. The conductor layer 4 and the insulating layer 3 are laminated in order from the surface on the heat dissipation member 5 side. An insulating viscous body 7 is provided between the conductor layer 4 and the heat dissipation member 5. In a part of the region where the insulating viscous body 7 is provided, the conductive protrusion 10 is provided so as to protrude from one surface of the conductor layer 4 and the heat dissipation member 5 toward the other surface and is separated from the other surface. Has been.
　図１２に示すように、半導体素子１から導電突起部１０までの厚み方向（Ｚ方向）の最短距離をｔとする。ここで最短距離ｔとは、半導体素子１の配線部材２側の面から、導電突起部１０が設けられた導体層４及び放熱部材５のいずれか一方の面までの距離である。また、厚み方向と直交する半導体装置１００の幅方向（Ｙ方向）における半導体素子１と導電突起部１０との最短距離をｄとする。ここで最短距離ｄは、半導体素子１の幅方向に垂直な面から、導電突起部１０の中心位置までの距離である。このとき、半導体装置１００の幅方向における半導体素子１と導電突起部１０との最短距離ｄは、半導体装置１００の厚み方向における半導体素子１と導電突起部１０との最短距離ｔより大きい。 As shown in FIG. 12, the shortest distance from the semiconductor element 1 to the conductive protrusion 10 in the thickness direction (Z direction) is t. Here, the shortest distance t is a distance from the surface of the semiconductor element 1 on the wiring member 2 side to one of the surfaces of the conductor layer 4 and the heat dissipation member 5 on which the conductive protrusions 10 are provided. Further, the shortest distance between the semiconductor element 1 and the conductive protrusion 10 in the width direction (Y direction) of the semiconductor device 100 orthogonal to the thickness direction is d. Here, the shortest distance d is the distance from the surface perpendicular to the width direction of the semiconductor element 1 to the center position of the conductive protrusion 10. At this time, the shortest distance d between the semiconductor element 1 and the conductive protrusion 10 in the width direction of the semiconductor device 100 is larger than the shortest distance t between the semiconductor element 1 and the conductive protrusion 10 in the thickness direction of the semiconductor device 100.
　図１２では、半導体装置１００に導電突起部１０が設けられた例を示したが、導電突起部１０の代わりに空隙部１１であってもよい。空隙部１１の場合でも同様に、半導体素子１から空隙部１１までの最短距離は、半導体素子１から放熱部材５に向かう厚み方向の最短距離よりも、厚み方向と直交する幅方向の最短距離の方が大きい。 Although FIG. 12 shows an example in which the conductive protrusion 10 is provided on the semiconductor device 100, the void 11 may be used instead of the conductive protrusion 10. Similarly, in the case of the void portion 11, the shortest distance from the semiconductor element 1 to the void portion 11 is shorter than the shortest distance in the thickness direction from the semiconductor element 1 toward the heat dissipation member 5 in the width direction orthogonal to the thickness direction. Is bigger.
　上述のとおり、本実施の形態では、絶縁粘性体７が設けられた領域の一部に、導電突起部１０又は空隙部１１が設けられることで、局所的に部分放電を発生させることができ、絶縁粘性体７全体が劣化することを抑制することができる。 As described above, in the present embodiment, the conductive protrusion 10 or the void 11 is provided in a part of the region where the insulating viscous body 7 is provided, so that partial discharge can be locally generated. It is possible to suppress deterioration of the entire insulating viscous body 7.
　さらに本実施の形態では、半導体素子１から導電突起部１０又は空隙部１１までの最短距離が、半導体装置１００の厚み方向における最短距離ｔよりも幅方向における最短距離ｄの方が大きい。すなわち、導電突起部１０又は空隙部１１を、発熱源である半導体素子１から熱拡散によって熱が到達し、放熱性に大きく寄与する範囲から離間させている。これにより、導電突起部１０又は空隙部１１が設けられた位置で部分放電が発生し、絶縁粘性体７が劣化した場合でも、放熱性への影響を抑制することができる。 Further, in the present embodiment, the shortest distance d from the semiconductor element 1 to the conductive protrusion 10 or the void 11 is larger than the shortest distance t in the thickness direction of the semiconductor device 100 in the width direction. That is, the conductive protrusion 10 or the void 11 is separated from the range in which heat reaches from the semiconductor element 1 which is a heat source by heat diffusion and greatly contributes to heat dissipation. As a result, even if a partial discharge occurs at the position where the conductive protrusion 10 or the void 11 is provided and the insulating viscous body 7 deteriorates, it is possible to suppress the influence on the heat dissipation.
実施の形態４．
　図１３は、本発明の実施の形態４に係る半導体装置の概略構成を示す断面図である。図１４は、本発明の実施の形態４に係る半導体装置の一部を拡大した概略構成図である。図１４は、図１３の破線Ｒ部を拡大した概略構成図である。以下では、実施の形態１から３と同様である点の説明を省略し、異なる点を中心に説明する。 Fourth Embodiment
FIG. 13 is a sectional view showing a schematic configuration of the semiconductor device according to the fourth embodiment of the present invention. FIG. 14 is an enlarged schematic configuration diagram of a part of the semiconductor device according to the fourth embodiment of the present invention. FIG. 14 is a schematic configuration diagram in which the broken line R portion of FIG. 13 is enlarged. In the following, description of the same points as in the first to third embodiments will be omitted, and different points will be mainly described.
　本実施の形態に係る半導体装置１００は、半導体素子１、配線部材２、絶縁層３、導体層４、放熱部材５及び封止材６を備える。放熱部材５側の面から順に導体層４と絶縁層３とが積層されている。導体層４と放熱部材５との間には、絶縁粘性体７が設けられている。絶縁粘性体７が設けられた領域の一部には、導電突起部１０が導体層４及び放熱部材５のいずれか一方から他方に向かって突出し、他方と離間して設けられている。また、導電突起部１０のかわりに空隙部１１が設けられていてもよい。 The semiconductor device 100 according to this embodiment includes a semiconductor element 1, a wiring member 2, an insulating layer 3, a conductor layer 4, a heat dissipation member 5, and a sealing material 6. The conductor layer 4 and the insulating layer 3 are laminated in order from the surface on the heat dissipation member 5 side. An insulating viscous body 7 is provided between the conductor layer 4 and the heat dissipation member 5. In a part of the region where the insulating viscous body 7 is provided, the conductive protrusion 10 is provided so as to project from one of the conductor layer 4 and the heat dissipation member 5 toward the other and is separated from the other. Further, a void 11 may be provided instead of the conductive protrusion 10.
　図１３、図１４に示すように、本実施の形態では、封止材６は、絶縁層３及び導体層４を貫通し、絶縁粘性体７を介さずに放熱部材５に接するスペーサー部６ａを有している。スペーサー部６ａは、導体層４と放熱部材５との距離を規制し、導電突起部１０と、離間して設けられた導体層４及び放熱部材５のいずれか一方との距離を確保する。 As shown in FIG. 13 and FIG. 14, in the present embodiment, the sealing material 6 penetrates the insulating layer 3 and the conductor layer 4 and includes a spacer portion 6 a that is in contact with the heat dissipation member 5 without the insulating viscous body 7. Have The spacer portion 6a regulates the distance between the conductor layer 4 and the heat dissipation member 5, and secures the distance between the conductive protrusion portion 10 and one of the conductor layer 4 and the heat dissipation member 5 that are provided separately.
　半導体装置１００の中央部にネジ９が挿入されている場合、スペーサー部６ａは、ネジ９の位置近傍の半導体装置１００の中央部に設けられることが好ましい。例えば、図１３、１４に示すように、封止材６のスペーサー部６ａは、ネジ９が貫通される貫通孔の周囲で放熱部材５に接する。これにより、ネジ止めにより半導体装置１００が中央部から外側に向かって反りが生じた場合、スペーサー部６ａで押し付けられて絶縁層３が損壊する恐れを低減することができる。 When the screw 9 is inserted in the central portion of the semiconductor device 100, the spacer portion 6 a is preferably provided in the central portion of the semiconductor device 100 near the position of the screw 9. For example, as shown in FIGS. 13 and 14, the spacer portion 6 a of the sealing material 6 contacts the heat dissipation member 5 around the through hole through which the screw 9 penetrates. Accordingly, when the semiconductor device 100 is warped from the central portion toward the outside due to the screwing, the risk of being pressed by the spacer portion 6a and damaging the insulating layer 3 can be reduced.
　上述のとおり、本実施の形態では、絶縁粘性体７が設けられた領域の一部に、導電突起部１０又は空隙部１１が設けられることで、局所的に部分放電を発生させることができ、絶縁粘性体７全体が劣化することを抑制することができる。 As described above, in the present embodiment, the conductive protrusion 10 or the void 11 is provided in a part of the region where the insulating viscous body 7 is provided, so that partial discharge can be locally generated. It is possible to suppress deterioration of the entire insulating viscous body 7.
　さらに本実施の形態では、スペーサー部６ａを設けることで、導体層４と放熱部材５との距離が絶縁粘性体７による変形により、スペーサー部６ａにより規制される距離よりも接近することを防ぐことができる。これにより、半導体装置１００に反りが生じた場合により導電突起部１０が導体層４と放熱部材５の双方と直接接触し、絶縁層３が損壊する恐れを低減することができる。また、空隙部１１が押しつぶされ、導体層４と放熱部材５とが直接接触し、互いの熱膨張差により絶縁層３が損壊する恐れを低減することができる。 Further, in the present embodiment, by providing the spacer portion 6a, it is possible to prevent the distance between the conductor layer 4 and the heat dissipation member 5 from being closer than the distance regulated by the spacer portion 6a due to the deformation of the insulating viscous body 7. You can Thereby, when the semiconductor device 100 is warped, it is possible to reduce the risk that the conductive protrusion 10 directly contacts both the conductor layer 4 and the heat dissipation member 5, and the insulating layer 3 is damaged. In addition, it is possible to reduce a risk that the void portion 11 is crushed, the conductor layer 4 and the heat dissipation member 5 are directly contacted with each other, and the insulating layer 3 is damaged due to a difference in thermal expansion between them.
　なお、図１５に示すように、導体層４と放熱部材５との距離を規制するものであればよく、封止材６と別体にスペーサー部１２を設けてもよい。スペーサー部１２は、絶縁性の材料で構成される。スペーサー部１２を封止材６と別体とすることで、導電突起部１０又は空隙部１１が設けられる位置に応じて、スペーサー部１２の配置を適宜設定できる。 Note that, as shown in FIG. 15, it is only necessary to regulate the distance between the conductor layer 4 and the heat dissipation member 5, and the spacer portion 12 may be provided separately from the sealing material 6. The spacer portion 12 is made of an insulating material. By disposing the spacer portion 12 as a separate body from the sealing material 6, the arrangement of the spacer portion 12 can be appropriately set according to the position where the conductive protrusion portion 10 or the void portion 11 is provided.
実施の形態５．
　図１６は、本発明の実施の形態５に係る半導体装置の概略構成を示す断面図である。以下では、実施の形態１から４と同様である点の説明を省略し、異なる点を中心に説明する。実施の形態１から４では、配線部材２としてリードフレームを備え、封止材６がケースとして機能する半導体装置１００を示したが、本実施の形態では、配線部材２として導電パターンが形成され、ケース２０内に封止材６が充填される。 Embodiment 5.
FIG. 16 is a sectional view showing a schematic configuration of the semiconductor device according to the fifth embodiment of the present invention. Hereinafter, description of the same points as those of the first to fourth embodiments will be omitted, and different points will be mainly described. In the first to fourth embodiments, the semiconductor device 100 in which the lead frame is provided as the wiring member 2 and the sealing material 6 functions as a case has been described, but in the present embodiment, a conductive pattern is formed as the wiring member 2. The case 6 is filled with the sealing material 6.
　図１６に示すように、半導体装置１００は、半導体素子１、配線部材２、絶縁層３、導体層４、放熱部材５、封止材６及びケース２０を備える。絶縁層３は、例えば窒化アルミなどのセラミックで形成された絶縁基板である。絶縁層３の両面には、配線部材２として主回路を形成する導電パターンが形成されている。導電パターンは、例えば銅などで形成されている。ケース２０は、絶縁層３を底面として、外周を取り囲んでいる。ケース２０の上面からは、半導体装置１００の外部と接続する接続端子２ｃが突出している。ケース２０内には、例えばシリコーンゲルやエポキシ樹脂などの封止材６が充填されており、封止材６が半導体素子１や配線部材２などを覆っている。 As shown in FIG. 16, the semiconductor device 100 includes a semiconductor element 1, a wiring member 2, an insulating layer 3, a conductor layer 4, a heat dissipation member 5, a sealing material 6, and a case 20. The insulating layer 3 is an insulating substrate formed of a ceramic such as aluminum nitride. Conductive patterns that form a main circuit as the wiring member 2 are formed on both surfaces of the insulating layer 3. The conductive pattern is formed of, for example, copper. The case 20 surrounds the outer circumference with the insulating layer 3 as the bottom surface. From the upper surface of the case 20, the connection terminal 2c for connecting to the outside of the semiconductor device 100 is projected. The case 20 is filled with a sealing material 6 such as silicone gel or epoxy resin, and the sealing material 6 covers the semiconductor element 1, the wiring member 2, and the like.
　絶縁層３の配線部材２が設けられた側の面の反対面には、導体層４が設けられている。導体層４の絶縁層３側の面の反対面は、絶縁粘性体７を介して放熱部材５が設けられている。絶縁粘性体７の一部には、導電突起部１０が導体層４及び放熱部材５のいずれか一方の面から他方の面に向かって突出し、他方の面と離間して設けられている。また絶縁粘性体７には、導電突起部１０のかわりに空隙部１１が設けられていてもよい。 The conductor layer 4 is provided on the surface of the insulating layer 3 opposite to the surface on which the wiring member 2 is provided. A heat radiating member 5 is provided on the surface of the conductor layer 4 opposite to the surface on the insulating layer 3 side through an insulating viscous body 7. A conductive protrusion 10 is provided on a part of the insulating viscous body 7 so as to project from one surface of the conductor layer 4 and the heat dissipation member 5 toward the other surface and is separated from the other surface. Insulating viscous body 7 may be provided with voids 11 instead of conductive protrusions 10.
　このように、ケース２０を用いた半導体装置１００であっても、絶縁粘性体７が設けられた領域の一部に導電突起部１０又は空隙部１１を設けることで、部分放電を局所的に発生させることができ、絶縁粘性体７全体が劣化するのを抑制することができる。 As described above, even in the semiconductor device 100 using the case 20, a partial discharge is locally generated by providing the conductive protrusion 10 or the void 11 in a part of the region where the insulating viscous body 7 is provided. It is possible to prevent deterioration of the entire insulating viscous body 7.
　なお、実施の形態１から５において、導電突起部１０及び空隙部１１がそれぞれ一つ設けられている例を示したが、一つより多くてもよい。 In addition, in Embodiments 1 to 5, an example in which one conductive protrusion 10 and one void 11 are provided is shown, but the number may be more than one.
　なお、本発明はその要旨を逸脱しない範囲で、実施の形態１から５に開示されている複数の構成要素を適宜組み合わせることができる。 The present invention can appropriately combine a plurality of constituent elements disclosed in the first to fifth embodiments without departing from the scope of the invention.
１００　半導体装置、１　半導体素子、２　配線部材、３　絶縁層、４　導体層、５　放熱部材、６　封止材、７　絶縁粘性体、８　ワイヤ、９　ネジ、１０　導電突起部、１１　空隙部、１２　スペーサー部、２０　ケース。 100 semiconductor device, 1 semiconductor element, 2 wiring member, 3 insulating layer, 4 conductor layer, 5 heat dissipation member, 6 sealing material, 7 insulating viscous body, 8 wire, 9 screw, 10 conductive protrusion part, 11 void part, 12 Spacer part, 20 cases.

Claims (9)

  1. 半導体素子と、
    前記半導体素子が実装される配線部材と、
    前記配線部材が配置される絶縁層と、
    前記絶縁層の前記半導体素子が実装された側の面と反対面に設けられた導体層と、
    前記配線部材の一部及び前記導体層の一方の面が露出するように、前記半導体素子、前記配線部材、前記絶縁層及び前記導体層を封止する封止材と、
    前記導体層の前記封止材から露出された面に設けられた絶縁粘性体と、
    前記絶縁粘性体を介して前記導体層と離間して設けられた放熱部材と、
    前記絶縁粘性体が設けられた領域の一部で、前記導体層及び前記放熱部材のいずれか一方から他方に向かって突出し、他方に離間して設けられた導電突起部と
    を備えることを特徴とする半導体装置。     Semiconductor element,
    A wiring member on which the semiconductor element is mounted,
    An insulating layer on which the wiring member is arranged,
    A conductor layer provided on a surface opposite to the surface on which the semiconductor element of the insulating layer is mounted,
    A sealing material that seals the semiconductor element, the wiring member, the insulating layer, and the conductor layer so that a part of the wiring member and one surface of the conductor layer are exposed.
    An insulating viscous body provided on the surface of the conductor layer exposed from the sealing material,
    A heat dissipation member provided separately from the conductor layer via the insulating viscous body;
    In a part of the region where the insulating viscous body is provided, a conductive protrusion portion that protrudes from one of the conductor layer and the heat dissipation member toward the other and is spaced apart from the other is provided. Semiconductor device.
  2. 前記導電突起部と、前記導電突起部と離間する前記導体層及び前記放熱部材のいずれか一方との間の前記絶縁粘性体は、定格電圧以下では部分放電を発生せず、前記定格電圧より大きい絶縁耐圧試験電圧以上の電圧が印加された場合に部分放電を発生し、前記導電突起部が設けられていない前記導体層と前記放熱部材との間の前記絶縁粘性体は、前記絶縁耐圧試験電圧以下の電圧が印加された場合に部分放電を発生しないことを特徴とする請求項１に記載の半導体装置。 The insulating viscous body between the conductive protrusion and any one of the conductor layer and the heat dissipation member separated from the conductive protrusion does not generate partial discharge below the rated voltage, and is larger than the rated voltage. When a voltage equal to or higher than the withstand voltage test voltage is applied, partial discharge is generated, and the insulating viscous body between the conductor layer not provided with the conductive protrusion and the heat dissipation member is the withstand voltage test voltage. The semiconductor device according to claim 1, wherein partial discharge is not generated when the following voltage is applied.
  3. 前記導電突起部は、前記導体層及び前記放熱部材のいずれ一方から他方に向かって先細った形状であることを特徴とする請求項１又は２に記載の半導体装置。 The semiconductor device according to claim 1, wherein the conductive protrusion has a shape that tapers from one of the conductor layer and the heat dissipation member toward the other.
  4. 前記導電突起部は、前記放熱部材又は前記導体層の一部であることを特徴とする請求項１から３のいずれか一項に記載の半導体装置。 The semiconductor device according to claim 1, wherein the conductive protrusion is a part of the heat dissipation member or the conductor layer.
  5. 前記半導体素子から前記導電突起部までの最短距離は、前記半導体素子から前記放熱部材に向かう厚み方向の最短距離よりも、前記厚み方向と直交する幅方向の最短距離の方が大きいことを特徴とする請求項１から４のいずれか一項に記載の半導体装置。 The shortest distance from the semiconductor element to the conductive protrusion is characterized in that the shortest distance in the width direction orthogonal to the thickness direction is larger than the shortest distance in the thickness direction from the semiconductor element toward the heat dissipation member. The semiconductor device according to any one of claims 1 to 4.
  6. 半導体素子と、
    前記半導体素子が実装される配線部材と、
    前記配線部材が配置される絶縁層と、
    前記絶縁層の前記半導体素子が実装された側の面と反対面に設けられた導体層と、
    前記配線部材の一部及び前記導体層の一方の面が露出するように、前記半導体素子、前記配線部材、前記絶縁層及び前記導体層を封止する封止材と、
    前記導体層の前記封止材から露出された面の一部に空隙部を有するように設けられた絶縁粘性体と、
    前記絶縁粘性体を介して前記導体層と離間して設けられた放熱部材と
    を備えることを特徴とする半導体装置。     Semiconductor element,
    A wiring member on which the semiconductor element is mounted,
    An insulating layer on which the wiring member is arranged,
    A conductor layer provided on a surface opposite to the surface on which the semiconductor element of the insulating layer is mounted,
    A sealing material that seals the semiconductor element, the wiring member, the insulating layer, and the conductor layer so that a part of the wiring member and one surface of the conductor layer are exposed.
    An insulating viscous body provided with a void in a part of the surface of the conductor layer exposed from the sealing material,
    A semiconductor device comprising: a heat dissipation member provided separately from the conductor layer via the insulating viscous body.
  7. 前記半導体素子から前記空隙部までの最短距離は、前記半導体素子から前記放熱部材に向かう厚み方向の最短距離よりも、前記厚み方向と直交する幅方向の最短距離の方が大きいことを特徴とする請求項６に記載の半導体装置。 The shortest distance from the semiconductor element to the void is characterized in that the shortest distance in the width direction orthogonal to the thickness direction is larger than the shortest distance in the thickness direction from the semiconductor element toward the heat dissipation member. The semiconductor device according to claim 6.
  8. 前記導体層と前記放熱部材との間の距離を規制する絶縁性のスペーサー部を備えることを特徴とする請求項１から７のいずれか一項に記載の半導体装置。 The semiconductor device according to claim 1, further comprising: an insulating spacer portion that regulates a distance between the conductor layer and the heat dissipation member.
  9. 前記放熱部材と、前記絶縁層、前記導体層及び前記封止材とを固定し、前記封止材で絶縁されたネジを備えることを特徴とする請求項１から８のいずれか一項に記載の半導体装置。 9. The screw that fixes the heat dissipation member, the insulating layer, the conductor layer, and the sealing material, and that is insulated by the sealing material is provided. Semiconductor device.
PCT/JP2019/000528 2019-01-10 2019-01-10 Semiconductor device WO2020144814A1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN201980087897.7A CN113302733A (en) 2019-01-10 2019-01-10 Semiconductor device with a plurality of semiconductor chips
JP2019525924A JP6590123B1 (en) 2019-01-10 2019-01-10 Semiconductor device
PCT/JP2019/000528 WO2020144814A1 (en) 2019-01-10 2019-01-10 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2019/000528 WO2020144814A1 (en) 2019-01-10 2019-01-10 Semiconductor device

Publications (1)

Publication Number Publication Date
WO2020144814A1 true WO2020144814A1 (en) 2020-07-16

Family

ID=68234939

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2019/000528 WO2020144814A1 (en) 2019-01-10 2019-01-10 Semiconductor device

Country Status (3)

Country Link
JP (1) JP6590123B1 (en)
CN (1) CN113302733A (en)
WO (1) WO2020144814A1 (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008118067A (en) * 2006-11-08 2008-05-22 Hitachi Ltd Power module and motor-integrated controlling device
JP2015088556A (en) * 2013-10-29 2015-05-07 富士電機株式会社 Electronic module
JP2015153823A (en) * 2014-02-12 2015-08-24 新光電気工業株式会社 wiring board and semiconductor package
CN104882421A (en) * 2014-02-28 2015-09-02 西安永电电气有限责任公司 IGBT device heat dissipation structure
WO2017175612A1 (en) * 2016-04-04 2017-10-12 三菱電機株式会社 Power module, power semiconductor device, and power module manufacturing method

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008118067A (en) * 2006-11-08 2008-05-22 Hitachi Ltd Power module and motor-integrated controlling device
JP2015088556A (en) * 2013-10-29 2015-05-07 富士電機株式会社 Electronic module
JP2015153823A (en) * 2014-02-12 2015-08-24 新光電気工業株式会社 wiring board and semiconductor package
CN104882421A (en) * 2014-02-28 2015-09-02 西安永电电气有限责任公司 IGBT device heat dissipation structure
WO2017175612A1 (en) * 2016-04-04 2017-10-12 三菱電機株式会社 Power module, power semiconductor device, and power module manufacturing method

Also Published As

Publication number Publication date
JPWO2020144814A1 (en) 2021-02-18
JP6590123B1 (en) 2019-10-16
CN113302733A (en) 2021-08-24

Similar Documents

Publication Publication Date Title
JP6233507B2 (en) Power semiconductor modules and composite modules
US9171773B2 (en) Semiconductor device
WO2014083717A1 (en) Power module
US9466542B2 (en) Semiconductor device
JP2007012831A (en) Power semiconductor device
JP5446302B2 (en) Heat sink and module
KR101946467B1 (en) Heat radiation structure of semiconductor device
JP2016181536A (en) Power semiconductor device
JP6095303B2 (en) Semiconductor device and manufacturing method of semiconductor device
JP2012064855A (en) Semiconductor device
JP7170614B2 (en) semiconductor equipment
JP2009088215A (en) Semiconductor device
US6440574B2 (en) Substrate for high-voltage modules
US10438865B2 (en) Semiconductor device
WO2020144814A1 (en) Semiconductor device
US20190051577A1 (en) Electronic device
JP2015220398A (en) Power semiconductor module
JP5826443B1 (en) Semiconductor device and manufacturing method thereof
CN111033723B (en) power semiconductor module
WO2017110540A1 (en) Circuit structure
TWI647867B (en) Led metal substrate and led module
JP6771581B2 (en) Semiconductor modules and semiconductor devices
CN117501434A (en) Power semiconductor device
JP2017034211A (en) Heat radiator, electronic device, and manufacturing method for electronic device
JP2016171202A (en) Electronic device

Legal Events

Date Code Title Description
ENP Entry into the national phase

Ref document number: 2019525924

Country of ref document: JP

Kind code of ref document: A

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19909406

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 19909406

Country of ref document: EP

Kind code of ref document: A1