WO2020052393A1 - 充电装置与充电系统 - Google Patents

充电装置与充电系统 Download PDF

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Publication number
WO2020052393A1
WO2020052393A1 PCT/CN2019/100126 CN2019100126W WO2020052393A1 WO 2020052393 A1 WO2020052393 A1 WO 2020052393A1 CN 2019100126 W CN2019100126 W CN 2019100126W WO 2020052393 A1 WO2020052393 A1 WO 2020052393A1
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Prior art keywords
electrically connected
resistor
load
charging
charged
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Ceased
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PCT/CN2019/100126
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English (en)
French (fr)
Inventor
陈宁宁
冯重阳
蒋世用
刘克勤
王京
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Gree Electric Appliances Inc of Zhuhai
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Gree Electric Appliances Inc of Zhuhai
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Application filed by Gree Electric Appliances Inc of Zhuhai filed Critical Gree Electric Appliances Inc of Zhuhai
Publication of WO2020052393A1 publication Critical patent/WO2020052393A1/zh
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—ELECTRIC POWER NETWORKS; CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J1/00—Circuit arrangements for DC mains or DC distribution networks
    • H02J1/001—Hot plugging or unplugging of load or power modules to or from power distribution networks
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—ELECTRIC POWER NETWORKS; CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or discharging batteries or for supplying loads from batteries

Definitions

  • the present application relates to the field of load charging, and in particular, to a charging device and a charging system.
  • the DC microgrid system is a microgrid system composed of direct current. It is an important part of the future intelligent power distribution system. It is of great significance for promoting energy conservation and emission reduction and achieving sustainable energy development. Compared with AC microgrid systems, DC microgrid systems can be more efficient and more reliably accept distributed renewable energy power generation systems such as wind and light, energy storage units, electric vehicles, and other DC power loads. The development and application prospect of DC microgrid system is very broad.
  • the DC bus voltage has multiple voltage levels such as 750V, 400V, and 200V. These voltage levels not only have high voltage values, but also vary according to the specific DC microgrid system.
  • DC buses of each voltage class can only carry loads that correspond to the corresponding voltage class.
  • the load has its own charging circuit. When it is uncertain whether the load is compatible with the voltage level of the DC bus, if the capacitive DC load is hot-connected to the DC microgrid system, the voltage difference between the two is too large, which will cause the capacitive load to have an instantaneous surge current and cause the capacitive load. Damage problem.
  • a charging device which can be adapted to the loads and charging circuits of DC buses of all voltage levels and protects capacitive DC loads.
  • a charging device includes a DC bus access terminal for electrically connecting with the DC bus so that the charging device is electrically connected with the DC bus;
  • a load access terminal for electrically connecting the load to be charged, so that the charging device is electrically connected to the load to be charged;
  • An input terminal of the charging circuit is electrically connected to the DC bus access terminal, and an output terminal thereof is electrically connected to the load access terminal, so that the electric energy of the DC bus is charged into the load to be charged;
  • the control circuit is electrically connected to the charging circuit and is used to control the charging circuit to complete a charging process.
  • control circuit is used to control the charging circuit to charge the power of the DC bus into the load to be charged, and the charging circuit is independently set as a charging device, which can be compatible with a variety of DC bus voltage levels to achieve capacitive DC loads. Hot-plug DC microgrid.
  • the DC bus access end includes:
  • the DC bus is directly connected to the positive end and is electrically connected to the positive pole of the DC bus;
  • the negative access terminal of the DC bus is electrically connected to the negative electrode of the DC bus;
  • the load access terminal includes:
  • the positive load access terminal is electrically connected to the positive pole of the load to be charged
  • the negative load access terminal is electrically connected to the negative electrode of the load to be charged.
  • the charging circuit includes:
  • the first switch circuit includes a first switch, one end of the first switch is electrically connected to the DC bus positive access terminal, and the other end of the first switch is electrically connected to the load positive access terminal;
  • the second switch circuit includes a second switch and a current limiting unit connected in series with the second switch. One end of the second switch is electrically connected to the DC bus positive access end, and the other end of the second switch is connected to the second switch. One end of the current limiting unit is electrically connected, and the other end of the current limiting unit is electrically connected to the load to be charged;
  • the first switching circuit is connected in parallel with the second switching circuit.
  • the charging circuit includes a relay, the first switch is a first contact of the relay, the second switch is a second contact of the relay, and the current limiting unit and the The second contact is connected in series.
  • control circuit includes:
  • the chip processor is electrically connected to the charging circuit and is used to control the first switch and the second switch to be opened or closed to control the charging circuit to complete a charging process.
  • the current limiting unit includes:
  • At least one current limiting resistor said current limiting resistors being connected in series with each other.
  • the current limiting unit further includes:
  • At least one current limiting inductor is connected in series with at least one of the current limiting resistors.
  • control circuit further includes:
  • a first sampling unit one end of which is electrically connected to the DC bus positive access end, and the other end of which is electrically connected to the chip processor, for collecting a first voltage when the charging circuit charges the load to be charged,
  • the first voltage is a voltage across the DC bus;
  • the second sampling unit has one end electrically connected to the positive load access end of the load and the other end electrically connected to the chip processor, and is configured to collect a second voltage when the charging circuit charges the load to be charged. Said second voltage is a voltage across said load
  • the chip processor determines whether the charging of the load to be charged is completed according to the difference between the first voltage and the second voltage: if the difference between the first voltage and the second voltage is less than a preset threshold , Determining that the charging of the load to be charged is completed.
  • the first sampling unit includes a first operational amplifier, a resistor R1, a resistor R2, a resistor R3, a resistor R4, and a resistor R5;
  • One end of the resistor R1 is electrically connected to the DC bus positive access terminal, and the other end of the resistor R1 is electrically connected to a non-inverting input terminal of the first operational amplifier;
  • resistor R2 One end of the resistor R2 is electrically connected to the DC bus negative access terminal, the other end of the resistor R2 is electrically connected to the inverting input terminal of the first operational amplifier, and the other end of the resistor R2 is also electrically connected to the One end of resistor R4;
  • One end of the resistor R4 is also electrically connected to an inverting input terminal of the first operational amplifier, and the other end of the resistor R4 is electrically connected to an output terminal of the first operational amplifier;
  • One end of the resistor R3 is grounded, and the other end of the resistor R3 is electrically connected to a non-inverting input terminal of the first operational amplifier;
  • An output terminal of the first operational amplifier is electrically connected to the chip processor.
  • the second sampling unit includes a second operational amplifier, a resistor R5, a resistor R6, a resistor R7, and a resistor R8;
  • One end of the resistor R5 is electrically connected to the positive load access terminal, and the other end of the resistor R5 is electrically connected to a non-inverting input terminal of the second operational amplifier;
  • resistor R6 One end of the resistor R6 is electrically connected to the negative load access terminal, the other end of the resistor R6 is electrically connected to the inverting input terminal of the second operational amplifier, and the other end of the resistor R6 is also electrically connected to the resistor.
  • One end of the resistor R8 is also electrically connected to an inverting input terminal of the second operational amplifier, and the other end of the resistor R8 is electrically connected to an output terminal of the second operational amplifier;
  • One end of the resistor R7 is grounded, and the other end of the resistor R7 is electrically connected to a non-inverting input terminal of the second operational amplifier;
  • An output terminal of the second operational amplifier is electrically connected to the chip processor.
  • control circuit further includes:
  • One end of the current sensor is connected to the DC bus access end of the DC bus access end, and the other end is electrically connected to the chip processor for collecting a current signal input from the DC bus to the charging device;
  • An electric quantity meter one end of which is electrically connected to the current sensor, and the other end of which is electrically connected to the chip processor, and is configured to calculate the charge to be charged according to the DC bus input current signal and voltage signal of the charging device The power of the load and sending the power charged to the load to be charged to the chip processor.
  • the charging device further includes:
  • a power display screen is electrically connected to the chip processor, and is configured to display the power charged in the load to be charged.
  • a charging system is applied to a DC microgrid system.
  • the charging system includes the charging device mentioned in the foregoing.
  • the charging circuit is independently set as a charging device, and the control circuit is set to control the charging circuit to charge the DC bus power into the load to be charged.
  • the DC load can be hot-connected to the DC microgrid; in addition, the charging device can also realize the function of power measurement, which is convenient and practical.
  • FIG. 1 is a schematic structural diagram of a charging device according to an embodiment of the present application.
  • FIG. 2 is a schematic structural diagram of a charging device according to an embodiment of the present application.
  • FIG. 3 is a schematic structural diagram of a charging device according to an embodiment of the present application.
  • FIG. 4 is a schematic structural diagram of a charging device according to an embodiment of the present application.
  • FIG. 5 is a schematic structural diagram of a charging device according to an embodiment of the present application.
  • FIG. 6 is a schematic structural diagram of a charging device according to an embodiment of the present application.
  • FIG. 7 is a schematic structural diagram of a charging device according to an embodiment of the present application.
  • FIG. 8 is a schematic structural diagram of a charging device according to an embodiment of the present application.
  • FIG. 9 is a schematic structural diagram of a charging device according to an embodiment of the present application.
  • FIG. 10 is a schematic structural diagram of a charging device according to an embodiment of the present application.
  • the present application provides a charging device. It should be noted that the charging device provided in this application is not limited to a single charging scenario. Any charging scenario can use the charging device provided in this application. Optionally, the charging device provided in the present application is prepared for use in a DC microgrid system to precharge a capacitive load.
  • the charging device includes a DC bus access terminal 10, a load access terminal 20, a charging circuit 30, and a control circuit 40.
  • the load is a capacitive load.
  • the load may be a capacitor.
  • This application separates the charging circuit 30 from the load, and the control circuit 40, the DC bus access terminal 10, and the load access terminal 20 constitute the charging device, so that the capacitive load itself There is no need to add a charging circuit 30, and when the capacitive load needs to be charged, it can be used with the charging device.
  • the charging device not only greatly reduces the production cost of the capacitive load, but also makes the charging process of the capacitive load simpler.
  • the DC bus access terminal 10 is configured to be electrically connected to the DC bus, so that the charging device is electrically connected to the DC bus.
  • the DC bus access terminal 10 may include at least one DC bus access contact. The DC bus access contact is used for electrical connection with the DC bus.
  • the load access terminal 20 is configured to be electrically connected to a load to be charged, so that the charging device is electrically connected to the load to be charged.
  • the load access terminal 20 may include at least one load access contact. The load access contact is used for electrical connection with the load.
  • an input terminal of the charging circuit 30 is electrically connected to the DC bus access terminal 10.
  • An output terminal of the charging circuit 30 is electrically connected to the load access terminal 20.
  • the charging circuit 30 enables the electric energy of the DC bus to be charged into the load to be charged. That is, the charging circuit 30 may serve as a "bridge" between the DC bus and the load.
  • control circuit 40 is electrically connected to the charging circuit 30.
  • the control circuit 40 is configured to control the charging circuit 30 to complete charging. Specifically, the control circuit 40 may issue an instruction to the charging circuit 30 to start / interrupt the charging of the charging circuit 30.
  • the DC bus access terminal 10 includes a DC bus positive access terminal 110 and a DC bus negative access terminal 120.
  • the DC bus positive access terminal 110 is electrically connected to the positive pole of the DC bus.
  • the DC bus negative access terminal 120 is electrically connected to the negative pole of the DC bus.
  • the DC bus may include a positive electrode and a negative electrode.
  • the DC bus positive access terminal 110 and the DC bus negative access terminal 120 may be two contacts protruding from the charging device.
  • the load access terminal 20 includes a load positive access terminal 210 and a load negative access terminal 220.
  • the load positive access terminal 210 is electrically connected to the positive electrode of the load to be charged.
  • the load negative access terminal 220 is electrically connected to the negative electrode of the load to be charged.
  • the load to be charged may include a positive electrode and a negative electrode.
  • the positive load access terminal 210 and the negative load access terminal 220 may be two contacts extended by the charging device.
  • the load to be charged may be a capacitive load.
  • the load to be charged may be a capacitor.
  • the charging circuit 30 includes a first switching circuit 310 and a second switching circuit 320.
  • the first switching circuit 310 is connected in parallel with the second switching circuit 320.
  • the first switch circuit 310 includes a first switch 311. One end of the first switch 311 is electrically connected to the DC bus positive access terminal 110. The other end of the first switch 311 is electrically connected to the load positive access terminal 210.
  • the second switch circuit 320 includes a second switch 321 and a current limiting unit 322 connected in series with the second switch 321.
  • One end of the second switch 321 is electrically connected to the DC bus positive access terminal 110, and the other end of the second switch 321 is electrically connected to one end of the current limiting unit 322.
  • the other end of the current limiting unit 322 is electrically connected to the load to be charged.
  • the function of the current limiting unit 322 is to generate a current limiting effect when the charging device charges the load to be charged.
  • the load to be charged is hot-connected to a DC microgrid system and charging the load to be charged, if the voltage difference between the DC bus voltage and the rated voltage charged by the load to be charged is too large, the charging current will be too large. The load to be charged may be broken by the charging current and cause damage.
  • the current limiting unit 322 includes at least one current limiting resistor 323.
  • the current limiting resistors 323 are connected in series with each other.
  • the current limiting unit 322 further includes at least one current limiting inductor 324 connected in series with at least one of the current limiting resistors 323.
  • the current limiting unit 322 in the present application is not limited to which electronic components and connection methods are used to connect the electronic components, and the current limiting unit 322 only needs to implement a current limiting effect.
  • the voltage of the DC bus has multiple voltage levels such as 750V, 400V, and 200V.
  • the voltage level of the DC bus will vary according to different DC microgrid systems.
  • the load to be charged has a charging circuit 30, so that the load to be charged can only be adapted to a unique DC bus voltage. Once a high voltage level DC bus is connected, the load to be charged will be charged due to the charging current Too large and cause damage.
  • the total resistance value of the current limiting unit 322 is set to be adjustable.
  • the current limiting unit 322 may automatically adjust the total resistance value of the current limiting unit 322 according to the voltage of the DC bus, so that the charging current is adapted to the load to be charged.
  • the total resistance value of the current limiting unit 322 is a preset value.
  • the preset value is set to match the highest voltage level of the DC bus. It can be understood that after the total resistance value of the current limiting unit 322 is set to match the highest voltage level of the DC bus, the charging current is small enough to be adapted to all DC buses of different voltage levels.
  • the above embodiment of the present application separates the charging circuit 30 into a charging device, and a current limiting unit 322 is provided in the charging circuit 30.
  • the charging device can automatically adapt DC buses of different voltages through the current limiting unit 322, so that the charging device can meet the requirements of different DC bus voltage levels and different loads to be charged, and has high versatility. , Easy to charge.
  • the control circuit 40 includes a chip processor 410.
  • the chip processor 410 is electrically connected to the charging circuit 30 and is used to control the first switch 311 and the second switch 321 to be opened or closed to control the charging circuit 30 to complete a charging process.
  • the chip processor 410 sends a first instruction to the charging circuit 30 so that the first switch 311 is turned off.
  • the second switch 321 is closed, and the charging circuit 30 starts to charge.
  • the current limiting unit 322 connected in series with the second switch 321 is connected to the charging circuit 30 to generate a current limiting effect, limit the magnitude of the charging current, and ensure the safety of the charging process.
  • the chip processor 410 sends a second instruction to the charging circuit 30 so that the first switch 311 is closed, the second switch 321 is opened, and the charging The circuit 30 ends charging. At this time, the current limiting unit 322 connected in series with the second switch 321 becomes ineffective, and charging is completed.
  • the charging circuit 30 includes a relay 330.
  • the first switch 311 is a first contact 331 of the relay 330.
  • the second switch 321 is a second contact 332 of the relay 330.
  • the current limiting unit 322 is connected in series with the second contact 332.
  • the charging circuit 30 is implemented by the relay 330 and the current limiting unit 322.
  • the first switch 311 is a first contact 331 of the relay 330.
  • the second switch 321 is a second contact 332 of the relay 330.
  • the chip processor 410 sends a third instruction to the relay 330, so that the first contact 331 is opened.
  • the second contact 332 is closed, and the charging circuit 30 starts to charge.
  • the current limiting unit 322 connected in series with the second contact 332 is connected to the charging circuit 30 to generate a current limiting effect, limit the size of the charging current, and ensure the safety of the charging process.
  • the chip processor 410 After the chip processor 410 determines that the charging of the load to be charged is completed, the chip processor 410 sends a fourth instruction to the relay 330, so that the first contact 331 is engaged, and the second contact 332 is disconnected, and the charging circuit 30 ends charging. At this time, the current limiting unit 322 connected in series with the second contact 332 becomes ineffective, and charging is completed.
  • the following describes how the chip processor 410 determines whether the charging of the load to be charged is completed.
  • control circuit 40 further includes a first sampling unit 420 and a second sampling unit 430.
  • the first sampling unit 420 is configured to collect a first voltage when the charging circuit 30 charges the load to be charged.
  • the first voltage is a voltage across the DC bus.
  • the second sampling unit 430 is configured to collect a second voltage when the charging circuit 30 charges the load to be charged.
  • the second voltage is a voltage across the load.
  • the chip processor 410 determines whether the load to be charged is completely charged according to a difference between the first voltage and the second voltage. If the difference between the first voltage and the second voltage is less than a preset threshold, the chip processor 410 determines that charging of the load to be charged is completed.
  • the first sampling unit 420 and the second sampling unit 430 are configured to collect a voltage across the DC bus and a voltage across the load to be charged, that is, the first voltage and the The second voltage to determine whether the charging process is complete.
  • the preset threshold is 1% of the first voltage.
  • the chip processor 410 presets a charging time. If the difference between the first voltage and the second voltage is less than a preset threshold within the charging time, the chip The processor 410 alarms. There may be multiple implementation manners of the alarm, an implementation manner using an alarm light, or an implementation manner of an alarm sound.
  • the chip processor 410 is electrically connected to a host. In an embodiment of the present application, after a predetermined time delay, the chip processor 410 sends an alarm signal to the upper computer to notify the upper computer that the charging circuit 30 has failed.
  • the first sampling unit 420 includes a first operational amplifier 421, a resistor R1, a resistor R2, a resistor R3, a resistor R4, and a resistor R5.
  • One end of the resistor R1 is electrically connected to the DC bus positive access terminal 110.
  • the other end of the resistor R1 is electrically connected to a non-inverting input end of the first operational amplifier 421.
  • One end of the resistor R2 is electrically connected to the DC bus negative access terminal 120.
  • the other end of the resistor R2 is electrically connected to an inverting input terminal of the first operational amplifier 421.
  • the other end of the resistor R2 is also electrically connected to one end of the resistor R4.
  • One end of the resistor R4 is also electrically connected to the inverting input terminal of the first operational amplifier 421.
  • the other end of the resistor R4 is electrically connected to an output end of the first operational amplifier 421.
  • One end of the resistor R3 is grounded, and the other end of the resistor R3 is electrically connected to a non-inverting input terminal of the first operational amplifier 421.
  • An output terminal of the first operational amplifier 421 is electrically connected to the chip processor 410.
  • the second sampling unit 430 includes a second operational amplifier 431, a resistor R5, a resistor R6, a resistor R7, and a resistor R8.
  • One end of the resistor R5 is electrically connected to the load positive access terminal 210.
  • the other end of the resistor R5 is electrically connected to a non-inverting input terminal of the second operational amplifier 431.
  • One end of the resistor R6 is electrically connected to the load negative access terminal 220.
  • the other end of the resistor R6 is electrically connected to an inverting input terminal of the second operational amplifier 431.
  • the other end of the resistor R6 is also electrically connected to one end of the resistor R8.
  • One end of the resistor R8 is also electrically connected to the inverting input terminal of the second operational amplifier 431.
  • the other terminal of the resistor R8 is electrically connected to an output terminal of the second operational amplifier 431.
  • One end of the resistor R7 is grounded.
  • the other end of the resistor R7 is electrically connected to a non-inverting input terminal of the second operational amplifier 431.
  • An output terminal of the second operational amplifier 431 is electrically connected to the chip processor 410.
  • control circuit 40 further includes a current sensor 440 and a power meter 450.
  • the current sensor 440 is configured to collect a current signal input from the DC bus to the charging device.
  • the power meter 450 is electrically connected to the current sensor 440.
  • the other end of the power meter 450 is electrically connected to the chip processor 410.
  • the electric quantity meter 450 is configured to calculate an electric quantity charged into the load to be charged according to a current signal and a voltage signal input from the charging device to the DC bus.
  • the power meter 450 is further configured to send the power charged into the load to be charged to the chip processor 410.
  • the charging device further includes a power display screen 460.
  • the power display screen 460 is electrically connected to the chip processor 41 and is configured to display the power charged in the load to be charged.
  • the charging circuit 30 is independently set as a charging device.
  • the control circuit 40 is set to control the charging circuit 30 to charge the DC bus power into the load to be charged, which can be compatible with various DC bus voltage levels to achieve Capacitive DC load is safe and reliable for hot access to the DC microgrid system.
  • the charging device can be used as a universal charging device, compatible with a variety of voltage levels of the DC bus and The load to be charged; finally, the charging device can also realize the function of measuring the amount of electricity through the current sensor 440 and the electric quantity meter 450, which is convenient and practical.
  • the present application also provides a charging system applied to a DC microgrid system, and the charging system includes the charging device mentioned in the foregoing.

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  • Power Engineering (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)

Abstract

本申请涉及一种充电装置与充电系统，所述充电装置包括直流母线接入端，用于与直流母线电连接，以使所述充电装置与所述直流母线电连接；负载接入端，用于与待充电负载电连接，以使所述充电装置与所述待充电负载电连接；充电电路，其输入端与所述直流母线接入端电连接，其输出端与所述负载接入端电连接，以使所述直流母线的电能充入所述待充电负载；控制电路，与所述充电电路电连接，用于控制所述充电电路完成充电过程。本申请提供的充电装置，通过设置控制电路控制充电电路将所述直流母线的电能充入所述待充电负载，将充电电路独立设置成充电装置，可以兼容多种直流母线电压等级，实现容性直流负载热接入直流微网。

Description

充电装置与充电系统
相关申请
本申请要求2018年09月14日申请的，申请号为201821504785.6，名称为“充电装置与充电系统”的中国专利申请的优先权，在此将其全文引入作为参考。
技术领域
本申请涉及负载充电领域，特别是涉及一种充电装置与充电系统。
背景技术
直流微网系统是由直流电构成的微电网系统，是未来智能配用电系统的重要组成部分，对推进节能减排和实现能源可持续发展具有重要意义。相比交流微网系统，直流微网系统可更高效，更可靠地接纳风、光等分布式可再生能源发电系统、储能单元、电动汽车及其他直流用电负荷。直流微网系统的发展和应用前景非常广阔。
在直流微网系统中，直流母线电压有750V、400V、200V等多个电压等级。这些电压等级不但电压数值高，而且会根据具体不同的直流微网系统有所变动。然而，每种电压等级的直流母线只能携带符合相应电压等级的负载。在相关方案中，负载自身带有充电电路。当不确定负载是否兼容直流母线的电压等级时，如果将容性直流负载热接入直流微网系统时，两者压差过大，会造成容性负载瞬间冲击电流过大而导致容性负载损坏的问题。
发明内容
基于此，提供一种充电装置，可以适配于所有电压等级直流母线的负载和充电电路，并保护容性直流负载。
一种充电装置，包括：直流母线接入端，用于与直流母线电连接，以使所述充电装置与所述直流母线电连接；
负载接入端，用于与待充电负载电连接，以使所述充电装置与所述待充电负载电连接；
充电电路，其输入端与所述直流母线接入端和电连接，其输出端与所述负载接入端电连接，以使所述直流母线的电能充入所述待充电负载；以及
控制电路，与所述充电电路电连接，用于控制所述充电电路完成充电过程。
上述充电装置，通过设置控制电路控制充电电路将所述直流母线的电能充入所述待充 电负载，将充电电路独立设置成充电装置，可以兼容多种直流母线电压等级，实现容性直流负载可热接入直流微网。
在其中一实施例中，所述直流母线接入端包括：
直流母线正接入端，与所述直流母线的正极电连接；
直流母线负接入端，与所述直流母线的负极电连接；
所述负载接入端包括：
负载正接入端，与所述待充电负载的正极电连接；
负载负接入端，与所述待充电负载的负极电连接。
在其中一实施例中，所述充电电路包括：
第一开关电路，包括第一开关，所述第一开关的一端与所述直流母线正接入端电连接，所述第一开关的另一端与所述负载正接入端电连接；
第二开关电路，包括第二开关和与所述第二开关串联的限流单元，所述第二开关的一端与所述直流母线正接入端电连接，所述第二开关的另一端与所述限流单元的一端电连接，所述限流单元的另一端与所述待充电负载电连接；
所述第一开关电路与所述第二开关电路并联。
在其中一实施例中，所述充电电路包括继电器，所述第一开关为所述继电器的第一触点，所述第二开关为所述继电器的第二触点，所述限流单元与所述第二触点串联。
在其中一实施例中，所述控制电路包括：
芯片处理器，与所述充电电路电连接，用于控制所述第一开关和所述第二开关断开或闭合，以控制所述充电电路完成充电过程。
在其中一实施例中，所述限流单元包括：
至少一个限流电阻，所述限流电阻互相串联。
在其中一实施例中，所述限流单元还包括：
至少一个限流电感，与至少一个所述限流电阻串联。
在其中一实施例中，所述控制电路还包括：
第一采样单元，一端与所述直流母线正接入端电连接，另一端与所述芯片处理器电连接，用于在所述充电电路对所述待充电负载充电时，采集第一电压，所述第一电压所为述直流母线两端的电压；
第二采样单元，一端与所述负载正接入端电连接，另一端与所述芯片处理器电连接，用于在所述充电电路对所述待充电负载充电时，采集第二电压，所述第二电压为所述负载两端的电压
所述芯片处理器依据所述第一电压和所述第二电压的差值，判断所述待充电负载是否充电完成：若所述第一电压和所述第二电压的差值小于预设阈值，判断所述待充电负载充电完成。
在其中一实施例中，所述第一采样单元包括第一运算放大器，电阻R1，电阻R2，电阻R3，电阻R4和电阻R5；
所述电阻R1的一端电连接所述直流母线正接入端，所述电阻R1的另一端电连接所述第一运算放大器的同相输入端；
所述电阻R2的一端电连接所述直流母线负接入端，所述电阻R2的另一端电连接所述第一运算放大器的反相输入端，所述电阻R2的另一端还电连接所述电阻R4的一端；
所述电阻R4的一端还电连接所述第一运算放大器的反相输入端，所述电阻R4的另一端电连接所述第一运算放大器的输出端；
所述电阻R3的一端接地，所述电阻R3的另一端电连接所述第一运算放大器的同相输入端；
所述第一运算放大器的输出端与所述芯片处理器电连接。
在其中一实施例中，所述第二采样单元包括第二运算放大器，电阻R5，电阻R6，电阻R7和电阻R8；
所述电阻R5的一端电连接所述负载正接入端，所述电阻R5的另一端电连接所述第二运算放大器的同相输入端；
所述电阻R6的一端电连接所述负载负接入端，所述电阻R6的另一端电连接所述第二运算放大器的反相输入端，所述电阻R6的另一端还电连接所述电阻R8的一端；
所述电阻R8的一端还电连接所述第二运算放大器的反相输入端，所述电阻R8的另一端电连接所述第二运算放大器的输出端；
所述电阻R7的一端接地，所述电阻R7的另一端电连接所述第二运算放大器的同相输入端；
所述第二运算放大器的输出端与所述芯片处理器电连接。
在其中一实施例中，所述控制电路还包括：
电流传感器，一端与所述直流母线接入端直流母线接入端连接，另一端与所述芯片处理器电连接，用于采集所述直流母线输入所述充电装置的电流信号；
电量计量器，一端与所述电流传感器电连接，另一端与所述芯片处理器电连接，用于依据所述直流母线输入所述充电装置的电流信号和电压信号，计算充入所述待充电负载的电量并将所述充入所述待充电负载的电量发送至所述芯片处理器。
在其中一实施例中，所述充电装置还包括：
电量显示屏，与所述芯片处理器电连接，用于显示所述充入所述待充电负载的电量。
一种充电系统，应用于直流微网系统，所述充电系统包括前述内容提及的所述的充电装置。
上述充电装置与充电系统，将充电电路独立设置成充电装置，通过设置控制电路控制充电电路将所述直流母线的电能充入所述待充电负载，可以兼容多种直流母线电压等级，实现容性直流负载可热接入直流微网；此外，所述充电装置还可以实现电量计量功能，方便实用。
附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据公开的附图获得其他的附图。
图1为本申请一实施例提供的一种充电装置的结构示意图；
图2为本申请一实施例提供的一种充电装置的结构示意图；
图3为本申请一实施例提供的一种充电装置的结构示意图；
图4为本申请一实施例提供的一种充电装置的结构示意图；
图5为本申请一实施例提供的一种充电装置的结构示意图；
图6为本申请一实施例提供的一种充电装置的结构示意图；
图7为本申请一实施例提供的一种充电装置的结构示意图；
图8为本申请一实施例提供的一种充电装置的结构示意图；
图9为本申请一实施例提供的一种充电装置的结构示意图；
图10为本申请一实施例提供的一种充电装置的结构示意图。
附图标号说明
10     直流母线接入端
110    直流母线正接入端
120    直流母线负接入端
20     负载接入端
210    负载正接入端
220    负载负接入端
30     充电电路
310    第一开关电路
311    第一开关
320    第二开关电路
321    第二开关
322    限流单元
323    限流电阻
324    限流电感
330    继电器
331    第一触点
332    第二触点
40     控制电路
410    芯片处理器
420    第一采样单元
421    第一运算放大器
430    第二采样单元
431    第二运算放大器
440    电流传感器
450    电量计量器
460    电量显示屏
具体实施方式
为了使本申请的目的，技术方案及优点更加清楚明白，以下结合附图及实施例对本申请中的充电装置进行进一步详细说明。应当理解，此处所描述的具体实施例仅用以解释本申请，并不用于限定本申请。
本申请提供一种充电装置。需要说明的是，本申请提供的充电装置不仅限应用于单一充电场景。任何充电场景均可采用本申请提供的充电装置。可选地，本申请提供的充电装置备应用于直流微网系统中，对容性负载进行预充电。
如图1所示，在本申请的一实施例中，所述充电装置包括直流母线接入端10，负载接入端20，充电电路30和控制电路40。在本申请的一实施例中，所述负载为容性负载。具体地，所述负载可以为电容。本申请将所述充电电路30从所述负载中独立出来，与所述 控制电路40，所述直流母线接入端10和所述负载接入端20组成所述充电装置，使得容性负载本身不需要增加充电电路30，在容性负载需要充电时，搭配所述充电装置使用即可。所述充电装置既大大的减少了容性负载的生产成本，又使得容性负载的充电过程更为简便。
在本实施例中，所述直流母线接入端10，用于与直流母线电连接，以使所述充电装置与所述直流母线电连接。具体地，所述直流母线接入端10可以包括至少一个直流母线接入触点。所述直流母线接入触点用于与所述直流母线电连接。
在本实施例中，所述负载接入端20，用于与待充电负载电连接，以使所述充电装置与所述待充电负载电连接。具体地，所述负载接入端20可以包括至少一个负载接入触点。所述负载接入触点用于与所述负载电连接。
在本实施例中，所述充电电路30的输入端与所述直流母线接入端10电连接。所述充电电路30的输出端与所述负载接入端20电连接。所述充电电路30使得所述直流母线的电能充入所述待充电负载。也就是说，所述充电电路30可以充当所述直流母线和所述负载之间的“桥梁”。
在本实施例中，所述控制电路40与所述充电电路30电连接。所述控制电路40用于控制所述充电电路30完成充电。具体地，所述控制电路40可以向所述充电电路30下达指令，以使所述充电电路30开始/中断充电。
如图2所示，在本申请的一实施例中，所述直流母线接入端10包括直流母线正接入端110和直流母线负接入端120。所述直流母线正接入端110与所述直流母线的正极电连接。所述直流母线负接入端120与所述直流母线的负极电连接。
在本实施例中，所述直流母线可以包括正极和负极。所述直流母线正接入端110和所述直流母线负接入端120可以为所述充电装置伸出的两个触点。
在本申请的一实施例中，所述负载接入端20包括负载正接入端210和负载负接入端220。所述负载正接入端210与所述待充电负载的正极电连接。所述负载负接入端220与所述待充电负载的负极电连接。
在本实施例中，所述待充电负载可以包括正极和负极。所述负载正接入端210和所述负载负接入端220可以为所述充电装置伸出的两个触点。
可选的，所述待充电负载可以为容性负载。具体地，所述待充电负载可以为电容。
如图3所示，在本申请的一实施例中，所述充电电路30包括第一开关电路310和第二开关电路320。所述第一开关电路310与所述第二开关电路320并联。
在本实施例中，所述第一开关电路310包括第一开关311。所述第一开关311的一端 与所述直流母线正接入端110电连接。所述第一开关311的另一端与所述负载正接入端210电连接。
在本实施例中，所述第二开关电路320包括第二开关321和与所述第二开关321串联的限流单元322。所述第二开关321的一端与所述直流母线正接入端110电连接，所述第二开关321的另一端与所述限流单元322的一端电连接。所述限流单元322的另一端与所述待充电负载电连接。
在本实施例中，所述限流单元322的作用是：在所述充电装置对所述待充电负载充电时，产生限流作用。当所述待充电负载热接入直流微网系统，对所述待充电负载充电时，如果直流母线电压与所述待充电负载充电的额定电压压差过大，会造成充电电流过大，所述待充电负载可以会被充电电流击穿而导致损坏。
如图6所示，在本申请的一实施例中，所述限流单元322包括至少一个限流电阻323。所述限流电阻323互相串联。
如图7所示，在本申请的一实施例中，所述限流单元322还包括至少一个限流电感324，与至少一个所述限流电阻323串联。
本申请中的所述限流单元322不限于包括何种电子元件和以何种连接方式连接电子元件，所述限流单元322只需实现限流作用即可。
在直流微网系统中，所述直流母线的电压有750V、400V、200V等多个电压等级。所述直流母线的电压等级会根据不同的直流微网系统变动。相关方案中所述待充电负载自身带有充电电路30，使得所述待充电负载只能适配唯一的直流母线电压，一旦接入高电压等级的直流母线，所述待充电负载会因充电电流过大而导致损坏。
在本申请的一实施例中，所述限流单元322的总电阻值设置为可调节。所述限流单元322可以根据所述直流母线的电压自动调节所述限流单元322的总电阻值，以使得所述充电电流与所述待充电负载适配。
在本申请的一实施例中，所述限流单元322的总电阻值为一预设值。所述预设值设置为与所述直流母线的最高电压等级相配合。可以理解的是，在所述限流单元322的总电阻值设置为与所述直流母线的最高电压等级相配合后，所述充电电流足够小，可以适配所有不同电压等级的直流母线。
本申请的上述实施例将所述充电电路30独立出来，制成充电装置，并在所述充电电路30中设置了限流单元322。在充电时，所述充电装置可以通过所述限流单元322自动适配不同电压大小的直流母线，使得所述充电装置满足不同直流母线电压等级和不同所述待充电负载的需要，通用性强，充电方便。
如图4所示，在本申请的一实施例中，所述控制电路40包括芯片处理器410。所述芯片处理器410与所述充电电路30电连接，用于控制所述第一开关311和所述第二开关321断开或闭合，以控制所述充电电路30完成充电过程。
具体地，在所述充电装置连接所述直流母线和所述待充电负载后，所述芯片处理器410向所述充电电路30发送第一指令，使得所述第一开关311断开，所述第二开关321闭合，所述充电电路30开始充电。此时，与所述第二开关321串联的所述限流单元322连入所述充电电路30，产生限流作用，限制充电电流的大小，保证充电过程的安全。
在所述待充电负载的电量达到要求后，所述芯片处理器410向所述充电电路30发送第二指令，使得所述第一开关311闭合，所述第二开关321断开，所述充电电路30结束充电。此时，与所述第二开关321串联的所述限流单元322失去作用，充电完成。
如图5所示，在本申请的一实施例中，所述充电电路30包括继电器330。所述第一开关311为所述继电器330的第一触点331。所述第二开关321为所述继电器330的第二触点332。所述限流单元322与所述第二触点332串联。
在本实施例中，所述充电电路30由所述继电器330和所述限流单元322实现。所述第一开关311为所述继电器330的第一触点331。所述第二开关321为所述继电器330的第二触点332。
具体地，在所述充电装置连接所述直流母线和所述待充电负载后，所述芯片处理器410向所述继电器330发送第三指令，使得所述第一触点331断开，所述第二触点332吸合，所述充电电路30开始充电。此时，与所述第二触点332串联的所述限流单元322连入所述充电电路30，产生限流作用，限制充电电流的大小，保证充电过程的安全。
在所述芯片处理器410判断所述待充电负载充电完成后，所述芯片处理器410向所述继电器330发送第四指令，使得所述第一触点331吸合，所述第二触点332断开，所述充电电路30结束充电。此时，与所述第二触点332串联的所述限流单元322失去作用，充电完成。
下文内容介绍所述芯片处理器410如何判断所述待充电负载充电是否完成。
如图8所示，在本申请的一实施例中，所述控制电路40还包括第一采样单元420和第二采样单元430。
所述第一采样单元420的一端与所述直流母线正接入端110电连接。所述第一采样单元420的另一端与所述芯片处理器410电连接。所述第一采样单元420用于在所述充电电路30对所述待充电负载充电时，采集第一电压。所述第一电压所为述直流母线两端的电压。
所述第二采样单元430的一端与所述负载正接入端210电连接。所述第二采样单元430的另一端与所述芯片处理器410电连接。所述第二采样单元430用于在所述充电电路30对所述待充电负载充电时，采集第二电压。所述第二电压为所述负载两端的电压。
所述芯片处理器410依据所述第一电压和所述第二电压的差值，判断所述待充电负载是否充电完成。若所述第一电压和所述第二电压的差值小于预设阈值，所述芯片处理器410判断所述待充电负载充电完成。
在本实施中，所述第一采样单元420和所述第二采样单元430用于分别采集所述直流母线两端的电压和所述待充电负载两端的电压，即所述第一电压和所述第二电压，以判断充电过程是否完成。
在本申请的一实施例中，所述预设阈值为所述第一电压的1％。
在本申请的一实施例中，所述芯片处理器410预设充电时间，若在所述充电时间内所述第一电压和所述第二电压的差值均小于预设阈值，所述芯片处理器410报警。所述报警的实施方式可以为多种，可以为以报警灯的实施方式，也可以为报警音的实施方式。在本申请的一实施例中，所述芯片处理器410与上位机电连接。在本申请的一实施例中，经一段预设时间延时后，所述芯片处理器410向所述上位机发送报警信号，以通知所述上位机所述充电回路30发生故障。
如图9所示，在本申请的一实施例中，所述第一采样单元420包括第一运算放大器421，电阻R1，电阻R2，电阻R3，电阻R4和电阻R5。
所述电阻R1的一端电连接所述直流母线正接入端110。所述电阻R1的另一端电连接所述第一运算放大器421的同相输入端。
所述电阻R2的一端电连接所述直流母线负接入端120。所述电阻R2的另一端电连接所述第一运算放大器421的反相输入端。所述电阻R2的另一端还电连接所述电阻R4的一端。
所述电阻R4的一端还电连接所述第一运算放大器421的反相输入端。所述电阻R4的另一端电连接所述第一运算放大器421的输出端。
所述电阻R3的一端接地，所述电阻R3的另一端电连接所述第一运算放大器421的同相输入端。
所述第一运算放大器421的输出端与所述芯片处理器410电连接。
在本实施例中，所述第二采样单元430包括第二运算放大器431，电阻R5，电阻R6，电阻R7和电阻R8。
所述电阻R5的一端电连接所述负载正接入端210。所述电阻R5的另一端电连接所述 第二运算放大器431的同相输入端。
所述电阻R6的一端电连接所述负载负接入端220。所述电阻R6的另一端电连接所述第二运算放大器431的反相输入端。所述电阻R6的另一端还电连接所述电阻R8的一端。
所述电阻R8的一端还电连接所述第二运算放大器431的反相输入端。所述电阻R8的另一端电连接所述第二运算放大器431的输出端。
所述电阻R7的一端接地。所述电阻R7的另一端电连接所述第二运算放大器431的同相输入端。
所述第二运算放大器431的输出端与所述芯片处理器410电连接。
如图10所示，在本申请的一实施例中，所述控制电路40还包括电流传感器440和电量计量器450。
所述电流传感器440的一端与所述直流母线接入端10电连接。所述电流传感器440的另一端与所述芯片处理器410电连接。所述电流传感器440用于采集所述直流母线输入所述充电装置的电流信号。
所述电量计量器450的一端与所述电流传感器440电连接。所述电量计量器450的另一端与所述芯片处理器410电连接。所述电量计量器450用于依据所述直流母线输入所述充电装置的电流信号和电压信号，计算充入所述待充电负载的电量。所述电量计量器450还用于将所述充入所述待充电负载的电量发送至所述芯片处理器410。
本实施例通过在所述控制电路40中设置所述电流传感器440和所述电量计量器450，实现了对冲入所述待充电负载的电量的计量功能，使得用户可以直观观察入户电量，方便快捷。
在本申请的一实施例中，所述充电装置还包括电量显示屏460。所述电量显示屏460与所述芯片处理器41电连接，用于显示所述充入所述待充电负载的电量。
上述充电装置，将充电电路30独立设置成充电装置，首先，通过设置控制电路40控制充电电路30将所述直流母线的电能充入所述待充电负载，可以兼容多种直流母线电压等级，实现容性直流负载安全、可靠的热接入直流微网系统；其次，通过设置限流单元322，使得所述充电装置可以作为一种通用的充电装置，兼容多种所述直流母线的电压等级和所述待充电负载；最后，所述充电装置通过所述电流传感器440和所述电量计量器450还可以实现电量的计量功能，方便实用。
本申请还提供一种充电系统，应用于直流微网系统，所述充电系统包括前述内容提及的充电装置。
以上所述实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例 中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上所述实施例仅表达了本申请的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对申请专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干变形和改进，这些都属于本申请的保护范围。因此，本申请专利的保护范围应以所附权利要求为准。

Claims (13)

  1. 一种充电装置，其特征在于，所述充电装置包括：
    直流母线接入端(10)，用于与直流母线电连接，以使所述充电装置与所述直流母线电连接；
    负载接入端(20)，用于与待充电负载电连接，以使所述充电装置与所述待充电负载电连接；
    充电电路(30)，其输入端与所述直流母线接入端(10)电连接，其输出端与所述负载接入端(20)电连接，以使所述直流母线的电能充入所述待充电负载；以及
    控制电路(40)，与所述充电电路(30)电连接，用于控制所述充电电路(30)完成充电过程。
  2. 根据权利要求1所述的充电装置，其特征在于，所述直流母线接入端(10)包括：
    直流母线正接入端(110)，与所述直流母线的正极电连接；以及
    直流母线负接入端(120)，与所述直流母线的负极电连接；
    所述负载接入端(20)包括：
    负载正接入端(210)，与所述待充电负载的正极电连接；以及
    负载负接入端(220)，与所述待充电负载的负极电连接。
  3. 根据权利要求2所述的充电装置，其特征在于，所述充电电路(30)包括：
    第一开关电路(310)，包括第一开关(311)，所述第一开关(311)的一端与所述直流母线正接入端(110)电连接，所述第一开关(311)的另一端与所述负载正接入端(210)电连接；以及
    第二开关电路(320)，包括第二开关(321)和与所述第二开关(321)串联的限流单元(322)，所述第二开关(321)的一端与所述直流母线正接入端(110)电连接，所述第二开关(321)的另一端与所述限流单元(322)的一端电连接，所述限流单元(322)的另一端与所述待充电负载电连接；
    所述第一开关电路(310)与所述第二开关电路(320)并联。
  4. 根据权利要求3所述的充电装置，其特征在于，所述充电电路(30)包括继电器(330)，所述第一开关(311)为所述继电器的第一触点(331)，所述第二开关(321)为所述继电器的第二触点(332)，所述限流单元(322)与所述第二触点(332)串联。
  5. 根据权利要求3所述的充电装置，其特征在于，所述控制电路(40)包括：
    芯片处理器(410)，与所述充电电路(30)电连接，用于控制所述第一开关(311)和 所述第二开关(321)断开或闭合，以控制所述充电电路(30)完成充电过程。
  6. 根据权利要求3所述的充电装置，其特征在于，所述限流单元(322)包括：
    至少一个限流电阻(323)，所述限流电阻(323)互相串联。
  7. 根据权利要求6所述的所述的充电装置，其特征在于，所述限流单元(322)还包括：
    至少一个限流电感(324)，与所述限流电阻(323)串联。
  8. 根据权利要求5所述的充电装置，其特征在于，所述控制电路(40)还包括：
    第一采样单元(420)，一端与所述直流母线正接入端(110)电连接，另一端与所述芯片处理器(410)电连接，用于在所述充电电路(30)对所述待充电负载充电时，采集第一电压，所述第一电压所为述直流母线两端的电压；以及
    第二采样单元(430)，一端与所述负载正接入端(210)电连接，另一端与所述芯片处理器(410)电连接，用于在所述充电电路(30)对所述待充电负载充电时，采集第二电压，所述第二电压为所述负载两端的电压；
    所述芯片处理器(410)依据所述第一电压和所述第二电压的差值，判断所述待充电负载是否充电完成：若所述第一电压和所述第二电压的差值小于预设阈值，判断所述待充电负载充电完成。
  9. 根据权利要求8所述的充电装置，其特征在于，所述第一采样单元(420)包括第一运算放大器(421)，电阻R1，电阻R2，电阻R3，电阻R4和电阻R5；
    所述电阻R1的一端电连接所述直流母线正接入端(110)，所述电阻R1的另一端电连接所述第一运算放大器(421)的同相输入端；
    所述电阻R2的一端电连接所述直流母线负接入端(120)，所述电阻R2的另一端电连接所述第一运算放大器(421)的反相输入端，所述电阻R2的另一端还电连接所述电阻R4的一端；
    所述电阻R4的一端还电连接所述第一运算放大器(421)的反相输入端，所述电阻R4的另一端电连接所述第一运算放大器(421)的输出端；
    所述电阻R3的一端接地，所述电阻R3的另一端电连接所述第一运算放大器(421)的同相输入端；
    所述第一运算放大器(421)的输出端与所述芯片处理器(410)电连接。
  10. 根据权利要求8所述的充电装置，其特征在于，所述第二采样单元(430)包括第二运算放大器(431)，电阻R5，电阻R6，电阻R7和电阻R8；
    所述电阻R5的一端电连接所述负载正接入端，所述电阻R5的另一端电连接所述第二 运算放大器(431)的同相输入端；
    所述电阻R6的一端电连接所述负载负接入端(220)，所述电阻R6的另一端电连接所述第二运算放大器(431)的反相输入端，所述电阻R6的另一端还电连接所述电阻R8的一端；
    所述电阻R8的一端还电连接所述第二运算放大器(431)的反相输入端，所述电阻R8的另一端电连接所述第二运算放大器(431)的输出端；
    所述电阻R7的一端接地，所述电阻R7的另一端电连接所述第二运算放大器(431)的同相输入端；
    所述第二运算放大器(431)的输出端与所述芯片处理器(410)电连接。
  11. 根据权利要求5所述的充电装置，其特征在于，所述控制电路(40)还包括：
    电流传感器(440)，一端与所述直流母线接入端(10)电连接，另一端与所述芯片处理器(410)电连接，用于采集所述直流母线输入所述充电装置的电流信号；以及
    电量计量器(450)，一端与所述电流传感器(440)电连接，另一端与所述芯片处理器(410)电连接，用于依据所述直流母线输入所述充电装置的电流信号和电压信号，计算充入所述待充电负载的电量并将所述充入所述待充电负载的电量发送至所述芯片处理器(410)。
  12. 根据权利要求11所述的充电装置，其特征在于，所述充电装置还包括：
    电量显示屏(460)，与所述芯片处理器(410)电连接，用于显示所述充入所述待充电负载的电量。
  13. 一种充电系统，应用于直流微网系统，其特征在于，所述充电系统包括权利要求1-12任一项所述的充电装置。
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