WO2019216292A1 - Resin multilayer substrate, package for electronic components, and package for optical components - Google Patents

Resin multilayer substrate, package for electronic components, and package for optical components Download PDF

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Publication number
WO2019216292A1
WO2019216292A1 PCT/JP2019/018177 JP2019018177W WO2019216292A1 WO 2019216292 A1 WO2019216292 A1 WO 2019216292A1 JP 2019018177 W JP2019018177 W JP 2019018177W WO 2019216292 A1 WO2019216292 A1 WO 2019216292A1
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WO
WIPO (PCT)
Prior art keywords
resin
multilayer substrate
layer
resin layer
thickness
Prior art date
Application number
PCT/JP2019/018177
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French (fr)
Japanese (ja)
Inventor
喜人 大坪
池田　哲也
Original Assignee
株式会社村田製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 株式会社村田製作所 filed Critical 株式会社村田製作所
Priority to CN201990000600.4U priority Critical patent/CN213662042U/en
Publication of WO2019216292A1 publication Critical patent/WO2019216292A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits

Definitions

  • the present invention relates to a resin multilayer substrate.
  • the present invention also relates to an electronic component package and an optical component package produced using the resin multilayer substrate of the present invention.
  • a resin multilayer substrate including a laminate in which a plurality of resin layers are laminated is widely used in various electronic devices.
  • irregularities may be formed on the main surface for the purpose of accommodating electronic components.
  • Patent Document 1 Japanese Patent Application Laid-Open No. 2007-59844 discloses a concavo-convex resin multilayer substrate in which a concave portion is formed on a main surface of a multilayer circuit board and an electronic component is mounted on the concave portion.
  • FIG. 12 shows an uneven multilayer circuit board module (resin multilayer substrate) 1000 disclosed in Patent Document 1.
  • the uneven multilayer circuit board module 1000 includes a multilayer circuit board 101. Circuits 102 are formed on both main surfaces of the multilayer circuit board 101.
  • a convex portion 103 and a concave portion (cavity) 104 are formed on the upper main surface of the multilayer circuit board 101.
  • the convex part 103 is formed of resin.
  • the circuit 102 formed on the multilayer circuit board 101 is exposed on the bottom surface of the recess 104.
  • a circuit 105 is formed on the surface of the convex portion 103.
  • Components (electronic components) 106 are mounted on the circuit 102 formed on the lower main surface of the multilayer circuit board 101 and the circuit 102 exposed from the recess 104, respectively.
  • the uneven multi-layer circuit board module 1000 is produced by the following method, for example.
  • a multilayer circuit board 101 having circuits 102 formed on both main surfaces is prepared.
  • a resin sheet and a metal layer are laminated on the multilayer circuit board 101.
  • the resin sheet and the metal layer are pressed by a mold having a convex molding portion formed on the lower surface, and the resin sheet and the metal layer are pressed against the upper main surface of the multilayer circuit board 101.
  • a depression is formed in the portion pressed by the convex molding portion of the mold, and the convex portion 103 is formed in the other portion.
  • the metal layer present in the recessed portion of the resin sheet is removed by etching.
  • a desmear process is performed to the resin sheet part exposed by removing the metal layer. That is, the resin of the unnecessary resin sheet remaining at the bottom of the depression is removed to form the recess (cavity) 104.
  • the desmear process is performed by, for example, plasma cleaning.
  • the circuit 102 formed on the multilayer circuit board 101 is exposed at the bottom of the recess 104.
  • the metal layer on the convex portion 103 is processed to form the circuit 105.
  • the component 106 is mounted on the circuit 102 to complete the uneven multilayer circuit board module 1000.
  • a resin sheet is laminated on the multilayer circuit board 101, a recess is formed on the mold, and the resin remaining on the bottom of the recess is removed by a desmear process.
  • a recess (cavity) 104 is formed in the circuit board 101.
  • the resin multilayer substrate of the present invention includes a laminate in which a plurality of resin layers are laminated, and at least one of the resin layers is provided. It is assumed that a first portion having a thickness that is partially different and a second portion having a thickness smaller than that of the first portion is provided. In this case, a cavity and a convex part can be easily formed in the laminate.
  • the resin layer is not limited to the first portion having a large thickness and the second portion having a small thickness, but includes a portion having an intermediate thickness between the first portion and the second portion. Furthermore, you may provide. Further, the thickness of the intermediate thickness portion is not limited to one, and a plurality of thicknesses having different thicknesses may include the intermediate portion.
  • the resin layer including the first portion and the second portion may include a third portion whose thickness changes between the first portion and the second portion.
  • At least one laminated resin layer includes the first portion and the second portion, but all laminated resin layers may include the first portion and the second portion.
  • the laminate has a pair of main surfaces, at least one main surface having an inner wall and an inner bottom surface, at least one cavity is formed, and the thickness of at least one resin layer is formed in the portion where the cavity is formed. A small part of may be arranged. In this case, a cavity can be easily formed in the laminate.
  • At least one wiring electrode may be formed from the main surface on the side where the cavity of the laminate is formed to the inner bottom surface of the cavity via the inner side wall of the cavity.
  • the electronic component can be accommodated in the cavity, and the formed wiring electrode can be used for electrical wiring to the electronic component.
  • a metal layer may be formed on at least a part of the inner wall of the cavity. In this case, for example, it is possible to suppress the noise from being radiated to the outside from the electronic component accommodated in the cavity, or to prevent the noise from entering the electronic component accommodated in the cavity from the outside.
  • a shield function may be provided. Further, for example, the metal layer may be provided with a heat radiating function for radiating heat generated by an electronic component accommodated in the cavity to the outside.
  • a through hole may be formed to connect the inner bottom surface of the cavity and the main surface on the side where the cavity of the laminate is not formed.
  • an optical component can be accommodated in the cavity, and the formed through hole can be used as a light path.
  • At least one of an electronic component and an optical component may be accommodated in the cavity.
  • the kind of electronic component accommodated is arbitrary, For example, chip components, such as a capacitor
  • the kind of optical component accommodated is arbitrary, a lens component etc. can be accommodated, for example.
  • the laminate has a pair of main surfaces, at least one convex portion is formed on at least one main surface, and at least one resin layer having a large thickness is formed in the portion where the convex portions are formed. It may be arranged. In this case, a convex part can be easily formed in a laminated body.
  • At least one of an electronic component and an optical component may be mounted on the convex portion.
  • an electronic component is mounted on the convex portion, generally, the distance between the mounted electronic component and the inner layer electrode formed in the laminated body can be increased. Mutual interference with the inner layer electrode can be suppressed.
  • the laminate is formed by laminating the lowermost resin layer, at least one intermediate resin layer, and the uppermost resin layer, and the lowermost layer, the intermediate layer, and the uppermost resin layer are respectively
  • the thickness of the first part of the resin layer of the intermediate layer is smaller than the thickness of the first part of the lowermost layer and the uppermost resin layer
  • the thickness of the second portion of the resin layer may be smaller than the thickness of the second portion of the lowermost layer and the uppermost resin layer.
  • the resin constituting the resin layer flows inside the resin layer, and a phenomenon called resin flow occurs. May occur.
  • the inner layer electrode formed around the resin layer may be displaced.
  • the circuit wiring inside the resin multilayer substrate may be disconnected or the reliability may be lowered.
  • the resin flow is less likely to occur as the thickness of the resin layer is smaller, and is more likely to occur as the thickness of the resin layer is greater.
  • the thickness of the resin layer of the intermediate layer is smaller than the thickness of the lowermost layer or the uppermost resin layer as described above, the resin flow of the intermediate resin layer can be suppressed, and the inner layer The positional deviation of the electrodes can be suppressed, and the disconnection of the circuit wiring inside the resin multilayer substrate and the deterioration of the reliability can be suppressed.
  • the resin layer may be made of a thermoplastic resin. In this case, a portion having a small thickness can be easily formed in the resin layer by applying pressure or heat to the resin layer.
  • At least one via electrode that establishes electrical continuity between both main surfaces may be formed.
  • at least one inner layer electrode may be formed between at least one of the resin layers of the laminate. In these cases, circuit wiring can be easily formed inside the multilayer body using via electrodes and inner layer electrodes.
  • an electronic component package for accommodating electronic components and an optical component package for accommodating optical components can be produced.
  • the resin multilayer substrate of the present invention since at least one resin layer has a thick portion and a thin portion, a cavity, a convex portion, and the like can be easily and accurately formed on a laminate without using unnecessary markings. Can be formed.
  • FIG. 1A is a plan view of a resin multilayer substrate 100 according to the first embodiment.
  • FIG. 1B is a cross-sectional view of the resin multilayer substrate 100.
  • 2A to 2C are cross-sectional views illustrating steps performed in an example of a method for manufacturing the resin multilayer substrate 100.
  • FIG. FIGS. 3D and 3E are continuations of FIG. 2C, and are cross-sectional views illustrating steps performed in an example of a method for manufacturing the resin multilayer substrate 100.
  • FIGS. 4F and 4G are continuations of FIG. 3E and are cross-sectional views illustrating steps performed in an example of the method for manufacturing the resin multilayer substrate 100, respectively. It is sectional drawing of the resin multilayer substrate 200 concerning 2nd Embodiment.
  • each embodiment shows an embodiment of the present invention by way of example, and the present invention is not limited to the content of the embodiment. Moreover, it is also possible to implement combining the content described in different embodiment, and the implementation content in that case is also included in this invention.
  • the drawings are for helping the understanding of the specification, and may be schematically drawn, and the drawn components or the ratio of dimensions between the components are described in the specification. There are cases where the ratio of these dimensions does not match.
  • the constituent elements described in the specification may be omitted in the drawings or may be drawn with the number omitted.
  • FIG. 1A and 1B show a resin multilayer substrate 100 according to the first embodiment.
  • 1A is a plan view of the resin multilayer substrate 100.
  • FIG. 1B is a cross-sectional view of the resin multilayer substrate 100, and shows a dot-dash line XX portion in FIG.
  • the resin multilayer substrate 100 includes a laminated body 4 in which a lowermost resin layer 1, an intermediate resin layer 2, and an uppermost resin layer 3 are laminated.
  • thermoplastic resin such as a liquid crystal polymer (LCP)
  • LCP liquid crystal polymer
  • thermoplastic resin other than the liquid crystal polymer may be used.
  • PEEK polyetheretherketone
  • PEI polyetherimide
  • PI polyimide
  • the resin layer 1 is partially different in thickness, and includes a first portion 1a having a large thickness and a second portion 1b having a smaller thickness than the first portion 1a having a large thickness. And the 3rd part 1c from which thickness changes is provided between the 1st part 1a with large thickness, and the 2nd part 1b with small thickness.
  • the second portion 1b is rectangular, and the first portion 1a surrounds the periphery of the second portion 1b.
  • the resin layer 2 is also partially different in thickness, and includes a first portion 2a having a large thickness and a second portion 2b having a smaller thickness than the first portion 2a having a large thickness. And the 3rd part 2c from which thickness changes is provided between the 1st part 2a with large thickness, and the 2nd part 2b with small thickness.
  • the second portion 2b is rectangular, and the first portion 2a surrounds the second portion 2b in an annular shape.
  • the resin layer 3 is also partially different in thickness, and includes a first portion 3a having a large thickness and a second portion 3b having a smaller thickness than the first portion 3a having a large thickness. And the 3rd part 3c from which thickness changes is provided between the 1st part 3a with large thickness, and the 2nd part 3b with small thickness.
  • the second portion 3b is rectangular, and the first portion 3a surrounds the second portion 3b in an annular shape.
  • the second portion 1b of the resin layer 1, the second portion 2b of the resin layer 2, and the second portion 3b of the resin layer 3 are arranged so as to overlap each other, and the cavity 5 is formed in that portion.
  • the cavity 5 has an open upper main surface of the laminate 4 and has an inner wall 5a and an inner bottom surface 5b.
  • the resin layer 2 and the resin layer 3 are respectively provided with via electrodes 6 for electrical conduction between both main surfaces.
  • the material of the via electrode 6 is arbitrary, but, for example, copper, silver, a copper alloy, a silver alloy, Sn—Ag solder, or the like can be used.
  • Inner layer electrodes 7 are formed between the resin layer 1 and the resin layer 2 and between the resin layer 2 and the resin layer 3, respectively.
  • the material of the inner layer electrode 7 is arbitrary, for example, copper, silver, a copper alloy, a silver alloy, or the like can be used.
  • a wiring electrode 8 is formed so as to reach the inner bottom surface 5b of the cavity 5 from the upper main surface of the multilayer body 4 via the inner wall 5a of the cavity 5.
  • the material of the wiring electrode 8 is arbitrary, for example, copper, a copper alloy, or the like can be used.
  • the material of the plating layer can be, for example, Ni / Sn, Ni / solder, Ni / Au, or the like.
  • the resin multilayer substrate 100 twelve wiring electrodes 8 that are continuous from the inner bottom surface 5 b of the cavity 5 to the inner side wall 5 a and the upper main surface of the multilayer body 4 are formed.
  • the number of wiring electrodes 8 is arbitrary and can be increased or decreased.
  • An inner layer electrode 7 formed between the resin layer 1 and the resin layer 2 and an inner layer electrode 7 formed between the resin layer 2 and the resin layer 3 are formed by the via electrode 6 formed in the resin layer 2. Electrically connected.
  • the inner layer electrode 7 and the wiring electrode 8 are electrically connected by a via electrode 6 formed in the resin layer 3.
  • the electronic component can be accommodated in the cavity 5 by mounting the electronic component on the portion formed on the inner bottom surface 5 b of the cavity 5 of the wiring electrode 8. That is, the resin multilayer substrate 100 can be used as an electronic component package.
  • the portion formed on the inner bottom surface 5b of the cavity 5 of the wiring electrode 8 functions as a mounting electrode.
  • the type of electronic component accommodated in the cavity 5 is arbitrary, but for example, a semiconductor integrated circuit component or a resin-encapsulated electronic module component can be accommodated. Alternatively, instead of these, chip components such as a capacitor, a coil, and a resistor may be accommodated.
  • the resin layer 1 is provided with the first part 1a and the second part 1b
  • the resin layer 2 is provided with the first part 2a and the second part 2b
  • the resin layer 3 is provided with the first part 3a and
  • the cavity 5 is easily formed in the laminated body 4 by providing the second portion 3b and arranging the second portions 1b, 2b, and 3b in an overlapping manner.
  • the resin layer is not limited to three layers, and may be one layer, two layers, or more than three layers.
  • Resin multilayer substrate 100 can be manufactured, for example, by the method shown in FIGS. 2 (A) to 4 (G).
  • FIGS. 2 (A) to 4 (G) a case where one resin multilayer substrate 100 is manufactured will be described as an example.
  • a mother resin layer in which a large number of resin layers are arranged in a matrix is used.
  • the resin multilayer substrate 100 may be manufactured in a lump, and may be divided into individual resin multilayer substrates 100 during the manufacturing process or after completion.
  • a resin layer 1, a resin layer 2, and a resin layer 3 are prepared.
  • Copper foils 17 for forming the inner layer electrode 7 and the wiring electrode 8 are attached in advance to the upper main surfaces of the resin layers 1 to 3, respectively.
  • the copper foil 17 is etched into a desired shape by a well-known etching technique, and the inner layer electrodes 7 are formed on the upper principal surfaces of the resin layer 1 and the resin layer 2, respectively.
  • a wiring electrode 8 is formed on the upper main surface of the layer 3. More specifically, first, resist patterns each having a desired pattern shape are formed on the surfaces of the copper foils 17 of the resin layer 1, the resin layer 2, and the resin layer 3. Next, the resin layer 1, the resin layer 2, and the resin layer 3 are each immersed in an etching solution to etch the copper foil 17, and the inner layer electrode 7 is formed on each of the resin layer 1 and the resin layer 2. A wiring electrode 8 is formed on the substrate. Next, unnecessary resist patterns are removed from the resin layer 1, the resin layer 2, and the resin layer 3, respectively.
  • the through hole 16 for forming the via electrode 6 is formed in the resin layer 2 by a method such as irradiating laser light. .
  • the through hole 16 reaches the inner layer electrode 7.
  • the through hole 16 for forming the via electrode 6 is formed in the resin layer 3 by a method such as irradiating a laser beam.
  • the through hole 16 reaches the wiring electrode 8.
  • the resin layer 1 is also drawn upside down.
  • the conductive paste 26 for forming the via electrode 6 is filled into the through holes 16 formed in the resin layer 2 and the resin layer 3 respectively.
  • the resin layer 1, the resin layer 2, and the resin layer 3 are superposed and integrated by heating and pressurizing to produce a laminate 4.
  • the conductive paste 26 filled in the through holes 16 formed in the resin layers 2 and 3 is cured and becomes the via electrode 6.
  • the laminate 4 is pressurized while being heated by a mold having a desired shape to form a cavity 5.
  • the resin layer 1 is plastically deformed to form a second portion 1b having a small thickness, and the resin portion 1 has a first portion 1a having a large thickness, a second portion 1b having a small thickness, and a third portion having a changed thickness. 1c.
  • the resin layer 2 is plastically deformed to form a second portion 2b having a small thickness, and the resin portion 2 has a first portion 2a having a large thickness, a second portion 2b having a small thickness, and a third portion having a varying thickness. 2c.
  • the resin layer 3 is plastically deformed to form a second portion 3b having a small thickness, and the resin layer 3 has a first portion 3a having a large thickness, a second portion 3b having a small thickness, and a third portion having a varying thickness. 3c is provided. And the part in which each 2nd part 1b, 2b, 3b in the laminated body 4 is piled up becomes the cavity 5. FIG. In addition, with the plastic deformation of the resin layer 3, the wiring electrode 8 formed on the upper main surface of the resin layer 3 is also deformed.
  • a plating layer is formed on the surface of the wiring electrode 8 as necessary, and the resin multilayer substrate 100 is completed.
  • FIG. 5 shows a resin multilayer substrate 200 according to the second embodiment. However, FIG. 5 is a cross-sectional view of the resin multilayer substrate 200.
  • the resin multilayer substrate 200 is obtained by housing electronic components in the cavity 5 of the resin multilayer substrate 100 according to the first embodiment described above. Specifically, a semiconductor integrated circuit component 21 as an electronic component was mounted on the wiring electrode 8 formed on the resin multilayer substrate 100 on the inner bottom surface 5 b of the cavity 5 using bumps 22.
  • the electronic component accommodated in the cavity is not limited to a semiconductor integrated circuit component, and may be a resin-encapsulated module, a chip component such as a capacitor, a coil, or a resistor.
  • the electronic component accommodated in the cavity may be a resin-encapsulated module, a chip component such as a capacitor, a coil, or a resistor.
  • optical components such as lens components may be accommodated.
  • FIG. 6 shows a resin multilayer substrate 300 according to the third embodiment. However, FIG. 6 is a cross-sectional view of the resin multilayer substrate 300.
  • Resin multilayer substrate 300 is characterized in that metal layer 36 is formed in cavity 5.
  • the resin multilayer substrate 300 includes a laminate 35 in which a lowermost resin layer 31, two intermediate resin layers 32 and 33, and an uppermost resin layer 34 are laminated.
  • the resin layer 31 includes a first portion 31a having a large thickness, a second portion 31b having a small thickness, and a third portion 31c having a varying thickness.
  • the resin layer 32 includes a first portion 32a having a large thickness, a second portion 32b having a small thickness, and a third portion 32c having a varying thickness.
  • the resin layer 33 includes a first portion 33a having a large thickness, a second portion 33b having a small thickness, and a third portion 33c having a varying thickness.
  • the resin layer 34 includes a first portion 34a having a large thickness, a second portion 34b having a small thickness, and a third portion 34c having a varying thickness.
  • the second portion 31b of the resin layer 31, the second portion 32b of the resin layer 32, the second portion 33b of the resin layer 33, and the second portion 34b of the resin layer 34 are overlapped.
  • the cavity 5 is formed in that portion.
  • the cavity 5 is opened at the upper main surface of the laminate 35 and has an inner wall 5a and an inner bottom surface 5b.
  • the via electrode 6 and the inner layer electrode 7 are formed in the laminated body 35 as necessary.
  • a wiring electrode 8 is formed on the inner bottom surface 5 b of the cavity 5. *
  • a metal layer 36 is formed on the upper main surface of the laminate 35 and on the inner wall 5 a in the cavity 5.
  • the material of the metal layer 36 is arbitrary, for example, copper, a copper alloy, or the like can be used.
  • Resin multilayer substrate 300 can accommodate electronic components in cavity 5.
  • the electronic component is mounted on the wiring electrode 8 formed on the inner bottom surface 5 b of the cavity 5.
  • the metal layer 36 can be used as a shield or a heat dissipation path.
  • the metal layer 36 on the inner wall 5a of the cavity 5 shields the side surface of the electronic component housed in the cavity 5, and suppresses noise from being radiated from the electronic component to the outside. Can be prevented from entering.
  • the heat can be absorbed by the metal layer 36 on the inner wall 5 a of the cavity 5, and the heat can be dissipated from the metal layer 36 on the upper main surface of the laminate 35. And it can suppress that an electronic component becomes abnormally high temperature.
  • FIG. 7 shows a resin multilayer substrate 400 according to the fourth embodiment. However, FIG. 7 is a cross-sectional view of the resin multilayer substrate 400.
  • the resin multilayer substrate 400 is obtained by housing electronic components in the cavity 5 of the resin multilayer substrate 300 according to the third embodiment described above. Specifically, a resin sealing module 41 as an electronic component was mounted on the wiring electrode 8 formed on the inner bottom surface 5 b of the cavity 5 of the resin multilayer substrate 300 with solder 42.
  • the resin sealing module 41 includes a substrate 43 inside. Various electronic components 44 are mounted on both main surfaces of the substrate 43. In addition, metal pins 45 for electrical connection are mounted on the lower main surface of the substrate 43. The substrate 43 is sealed with a sealing resin 46 together with the electronic component 44 and the metal pin 45. Although not shown, an electrode is formed on the bottom surface of the resin sealing module 41.
  • the side surface of the resin sealing module 41 accommodated in the cavity 5 is shielded by the metal layer 36 on the inner wall 5 a of the cavity 5. That is, the metal layer 36 prevents noise from being radiated from the resin sealing module 41 to the outside. Further, the metal layer 36 suppresses noise from entering the resin sealing module 41 from the outside.
  • the resin multilayer substrate 400 absorbs heat by the metal layer 36 on the inner wall 5a of the cavity 5 and dissipates the heat from the metal layer 36 on the upper main surface of the laminate 35. Can do. And it can suppress that the resin sealing module 41 becomes abnormally high temperature.
  • FIG. 8 shows a resin multilayer substrate 500 according to the fifth embodiment. However, FIG. 8 is a cross-sectional view of the resin multilayer substrate 500.
  • the thicknesses of the first portions 1a, 2a, and 3a having large thicknesses are mutually different in the three resin layers 1, 2, and 3 constituting the laminate 4.
  • the thicknesses of the second portions 1b, 2b, and 3b having the same and small thickness were equal to each other.
  • the resin multilayer substrate 500 according to the fifth embodiment is characterized in that the thickness of the first portion having a large thickness is not uniform between the resin layers, and the thickness of the second portion having a small thickness is not uniform between the resin layers. It is said.
  • the resin multilayer substrate 500 includes a laminate 56 in which a lowermost resin layer 51, three intermediate resin layers 52, 53, and 54 and an uppermost resin layer 55 are laminated.
  • the resin layer 51 includes a first portion 51a having a large thickness, a second portion 51b having a small thickness, and a third portion 51c having a varying thickness.
  • the resin layer 52 includes a first portion 52a having a large thickness, a second portion 52b having a small thickness, and a third portion 52c having a varying thickness.
  • the resin layer 53 includes a first portion 53a having a large thickness, a second portion 53b having a small thickness, and a third portion 53c having a varying thickness.
  • the resin layer 54 includes a first portion 54a having a large thickness, a second portion 54b having a small thickness, and a third portion 54c having a varying thickness.
  • the resin layer 55 includes a first portion 55a having a large thickness, a second portion 55b having a small thickness, and a third portion 55c having a varying thickness.
  • the second portion 51b of the resin layer 51, the second portion 52b of the resin layer 52, the second portion 53b of the resin layer 53, the second portion 54b of the resin layer 54, and the resin layer 55 The second portion 55b is overlapped and the cavity 5 is formed in that portion.
  • the cavity 5 is opened at the upper main surface of the laminate 56, and has an inner wall 5a and an inner bottom surface 5b.
  • the thickness of the first portion 52a of the intermediate resin layer 52, the first portion 53a of the resin layer 53, and the first portion 54a of the resin layer 54 is the first portion of the lowermost resin layer 51. 51a and the thickness of the first portion 55a of the uppermost resin layer 55 are smaller. Further, the thickness of the second portion 52b of the intermediate resin layer 52, the second portion 53b of the resin layer 53, and the second portion 54b of the resin layer 54 is set so that the second portion 51b of the lowermost resin layer 51 and the uppermost layer. The thickness of the second portion 55b of the resin layer 55 is smaller. That is, in the resin multilayer substrate 500, the thickness of the intermediate resin layers 52, 53, and 54 is smaller than the thickness of the lowermost resin layer 51 and the uppermost resin layer 55 over the entire area.
  • the via electrode 6 and the inner layer electrode 7 are formed in the laminated body 56 as needed.
  • a wiring electrode 8 is formed on the inner bottom surface 5 b of the cavity 5.
  • more inner layer electrodes 7 are concentrated and formed between the intermediate resin layers 52, 53, and 54.
  • the resin layers 51 to 55 are respectively sandwiched between molds of desired shapes, heated and pressurized to be plastically deformed, and the first portions 51a to 55a having a large thickness.
  • the second portions 51b to 55b having a small thickness and the third portions 51c to 55c having a varying thickness may be formed.
  • the resin constituting the resin layers 51 to 55 may flow inside the resin layers 51 to 55, causing a phenomenon of resin flow.
  • the inner layer electrode 7 formed around the resin layer may be displaced. If the inner layer electrode 7 is displaced, the circuit wiring inside the resin multilayer substrate may be disconnected or the characteristics may be deteriorated.
  • the resin flow is less likely to occur as the thickness of the resin layer is smaller, and more likely to occur as the thickness of the resin layer is greater.
  • the thickness of the intermediate resin layers 52, 53, 54 is made smaller than the thickness of the lowermost resin layer 51 and the uppermost resin layer 55, and the intermediate resin layer 52,
  • the inner layer electrode 7 By concentrating and forming the inner layer electrode 7 between the layers 53 and 54, the generation of the resin flow of the intermediate resin layers 52, 53 and 54 is suppressed, and the intermediate resin layers 52, 53 and 54 are formed around the intermediate resin layers 52, 53 and 54.
  • the positional deviation of the formed inner layer electrode 7 is suppressed, and disconnection of the internal circuit wiring and deterioration of characteristics are suppressed.
  • the resin flow of the intermediate resin layers 52, 53, and 54 is less likely to occur, and disconnection of internal circuit wiring and deterioration of characteristics due to the resin flow are less likely to occur.
  • FIG. 9 shows a resin multilayer substrate 600 according to the sixth embodiment. However, FIG. 9 is a cross-sectional view of the resin multilayer substrate 600.
  • the resin multilayer substrate 600 is obtained by omitting the via electrode 6, the inner layer electrode 7, and the wiring electrode 8 from the resin multilayer substrate 100 according to the first embodiment. That is, in the resin multilayer substrate of the present invention, the via electrode 6, the inner layer electrode 7, and the wiring electrode 8 are not essential components, and a resin multilayer substrate that does not include them can be configured like the resin multilayer substrate 600.
  • FIG. 10 shows a resin multilayer substrate 700 according to the seventh embodiment. However, FIG. 10 is a cross-sectional view of the resin multilayer substrate 700.
  • Resin multilayer substrate 700 is characterized in that convex portions 75 are formed on the upper main surface of laminate 74. Further, the resin sealing module 41 is mounted on the convex portion 75.
  • the resin multilayer substrate 700 includes a laminate 74 in which a lowermost resin layer 71, an intermediate resin layer 72, and an uppermost resin layer 73 are laminated.
  • the resin layer 71 includes a first portion 71a having a large thickness and a second portion 71b having a small thickness.
  • the resin layer 72 includes a first portion 72a having a large thickness, a second portion 72b having a small thickness, and a third portion 72c having a varying thickness.
  • the resin layer 73 includes a first portion 73a having a large thickness, a second portion 73b having a small thickness, and a third portion 73c having a varying thickness.
  • the first portion 71a of the resin layer 71, the first portion 72a of the resin layer 72, and the first portion 73a of the resin layer 73 are arranged so as to overlap with each other, and the convex portion 75 is formed in that portion. It is configured.
  • the resin layer 72 and the resin layer 73 are formed with via electrodes 6 for electrical conduction between the two main surfaces.
  • Inner layer electrodes 7 are formed between the resin layer 71 and the resin layer 72 and between the resin layer 72 and the resin layer 73, respectively.
  • the wiring electrode 8 is formed on the upper main surface of the first portion 73 a of the resin layer 73.
  • the inner layer electrode 7 formed between the resin layer 71 and the resin layer 72 and the inner layer electrode 7 formed between the resin layer 72 and the resin layer 73 are formed by the via electrode 6 formed in the resin layer 72. Electrically connected. Further, the inner layer electrode 7 and the wiring electrode 8 that are formed between the resin layer 72 and the resin layer 73 are electrically connected by the via electrode 6 formed in the resin layer 73.
  • a resin sealing module 41 is mounted as an electronic component by solder 42 on the wiring electrode 8 formed on the upper main surface of the first portion 73 a having a large thickness of the resin layer 73. That is, in the resin multilayer substrate 700, the resin sealing module 41 is mounted on the convex portion 75 formed on the upper main surface of the multilayer body 74.
  • the resin sealing module 41 includes a substrate 43 inside. Various electronic components 44 are mounted on both main surfaces of the substrate 43. In addition, metal pins 45 for electrical connection are mounted on the lower main surface of the substrate 43. The substrate 43 is sealed with a sealing resin 46 together with the electronic component 44 and the metal pin 45. Although not shown, an electrode is formed on the bottom surface of the resin sealing module 41. Instead of the metal pin 45, electrical connection may be achieved by vias or plating.
  • the resin sealing module 41 is mounted as an electronic component on the convex portion 75 formed on the upper main surface of the laminate 74, as can be seen from FIG. And the distance between the inner layer electrode 7 formed inside the stacked body 74 is large.
  • the distance between the electronic component (resin sealing module 41) and the inner layer electrode 7 formed in the laminated body 74 is large, the electronic component (resin sealing module 41) and the inner layer electrode Mutual interference with 7 is suppressed.
  • FIG. 11 shows a resin multilayer substrate 800 according to the eighth embodiment. However, FIG. 11 is a cross-sectional view of the resin multilayer substrate 800.
  • Resin multilayer substrate 800 is for mounting optical components such as lens components.
  • the resin multilayer substrate 800 includes a laminate 87 in which a lowermost resin layer 81, four intermediate resin layers 82 to 85, and an uppermost resin layer 86 are laminated.
  • the resin layer 81 includes a first portion 81a having a large thickness, a second portion 81b having a small thickness, and a third portion 81c having a varying thickness.
  • the resin layer 82 includes a first portion 82a having a large thickness, a second portion 82b having a small thickness, and a third portion 82c having a varying thickness.
  • the resin layer 83 includes a first portion 83a having a large thickness, a second portion 83b having a small thickness, and a third portion 83c having a varying thickness.
  • the resin layer 84 includes a first portion 84a having a large thickness, a second portion 84b having a small thickness, and a third portion 84c having a varying thickness.
  • the resin layer 85 includes a first portion 85a having a large thickness, a second portion 85b having a small thickness, and a third portion 85c having a varying thickness.
  • the resin layer 86 includes a first portion 86a having a large thickness and a second portion 86b having a small thickness.
  • the second portion 85b and the second portion 86b of the resin layer 86 are disposed so as to overlap each other, and a cavity 95 is formed in that portion.
  • the cavity 95 is opened at the lower main surface of the laminated body 87 and has an inner wall 95a and an inner bottom surface 95b.
  • a through hole 96 is formed through the upper main surface of the laminated body 87 and the inner bottom surface 95 b of the cavity 95.
  • a mounting electrode 97 used for mounting the resin multilayer substrate 800 on another large substrate or the like is formed on the lower main surface of the laminate 87. Further, an optical component mounting electrode 98 for mounting an optical component is formed on the inner bottom surface 95 b of the cavity 95.
  • the resin multilayer substrate 800 can mount an optical component such as a lens component on the upper surface or inside of the cavity 95 using the optical component mounting electrode 98. That is, the resin multilayer substrate 800 constitutes an optical component package.
  • the through hole 96 can be used as a light path.
  • the resin multilayer substrates 100, 200, 300, 400, 500, 600, 700, and 800 according to the first to eighth embodiments have been described above.
  • the present invention is not limited to the contents described above, and various modifications can be made in accordance with the spirit of the invention.
  • all the resin layers constituting the laminate were provided with a portion having a large thickness and a portion having a small thickness.
  • all the resin layers 1, 2, 3 constituting the laminated body 4 include the first portions 1 a, 2 a, 3 a having a large thickness and the second portions 1 b, 2 b, 3 b having a small thickness. I was prepared.
  • the first portion having a large thickness and the second portion having a small thickness may be provided.
  • each of the resin multilayer substrates is formed with either a cavity or a convex portion.
  • the cavities 5 (95) were formed in the resin multilayer substrates 100, 200, 300, 400, 500, 600, and 800, respectively.
  • the convex part 75 was formed in the resin multilayer substrate 700.
  • both the cavity and the convex portion may be formed on one resin multilayer substrate.
  • the number and shape of the cavities and projections are arbitrary and are not limited to the above-described contents.
  • the laminate 4 is formed by stacking and integrating the resin layers 1, 2, and 3, and then molding the laminate 4 into a desired shape.
  • the present invention is not limited to this method.
  • the resin layers 1, 2, 3 may be a method of producing the laminate 4 by integrating the three.

Abstract

The purpose of the present invention is to easily produce a resin multilayer substrate having a cavity or a convex part. The resin multilayer substrate is provided with a laminate 4 in which a plurality of resin layers 1, 2, and 3 are laminated together, wherein the resin layer 1 (2, 3) has partly varying thicknesses and is provided with a large-thickness first part 1a (2a, 3a) and a small-thickness second part 1b (2b, 3b) having a thickness smaller than that of the large-thickness first part 1a (2a, 3a). The resin layer 1 (2, 3) may be provided with a third part 1c (2c, 3c) of which the thickness is varied. The small-thickness second parts 1b, 2b, and 3b are superposed together to form a cavity 5.

Description

樹脂多層基板、電子部品用パッケージおよび光学部品用パッケージResin multilayer substrate, electronic component package and optical component package
　本発明は樹脂多層基板に関する。また、本発明は、本発明の樹脂多層基板を使用して作製した電子部品用パッケージおよび光学部品用パッケージに関する。 The present invention relates to a resin multilayer substrate. The present invention also relates to an electronic component package and an optical component package produced using the resin multilayer substrate of the present invention.
　複数の樹脂層が積層された積層体を備えた樹脂多層基板が、種々の電子機器に広く使用されている。そのような樹脂多層基板において、その主面に、電子部品を収納する等の目的で凹凸を形成する場合がある。 A resin multilayer substrate including a laminate in which a plurality of resin layers are laminated is widely used in various electronic devices. In such a resin multilayer substrate, irregularities may be formed on the main surface for the purpose of accommodating electronic components.
　特許文献１（特開２００７-５９８４４号公報）に、多層回路板の主面に凹部を形成し、当該凹部に電子部品を実装した凹凸型の樹脂多層基板が開示されている。図１２に、特許文献１に開示された凹凸多層回路板モジュール（樹脂多層基板）１０００を示す。 Patent Document 1 (Japanese Patent Application Laid-Open No. 2007-59844) discloses a concavo-convex resin multilayer substrate in which a concave portion is formed on a main surface of a multilayer circuit board and an electronic component is mounted on the concave portion. FIG. 12 shows an uneven multilayer circuit board module (resin multilayer substrate) 1000 disclosed in Patent Document 1.
　凹凸多層回路板モジュール１０００は、多層回路板１０１を備えている。多層回路板１０１の両主面には、回路１０２が形成されている。 The uneven multilayer circuit board module 1000 includes a multilayer circuit board 101. Circuits 102 are formed on both main surfaces of the multilayer circuit board 101.
　多層回路板１０１の上側の主面に、凸部１０３と凹部（キャビティ）１０４が形成されている。凸部１０３は、樹脂によって形成されている。凹部１０４の底面には、多層回路板１０１に形成された回路１０２が露出している。凸部１０３の表面には、回路１０５が形成されている。 A convex portion 103 and a concave portion (cavity) 104 are formed on the upper main surface of the multilayer circuit board 101. The convex part 103 is formed of resin. The circuit 102 formed on the multilayer circuit board 101 is exposed on the bottom surface of the recess 104. A circuit 105 is formed on the surface of the convex portion 103.
　多層回路板１０１の下側主面に形成された回路１０２や、凹部１０４から露出した回路１０２に、それぞれ、部品（電子部品）１０６が実装されている。 Components (electronic components) 106 are mounted on the circuit 102 formed on the lower main surface of the multilayer circuit board 101 and the circuit 102 exposed from the recess 104, respectively.
　凹凸多層回路板モジュール１０００は、たとえば、次の方法によって作製される。 The uneven multi-layer circuit board module 1000 is produced by the following method, for example.
　まず、両主面に回路１０２が形成された多層回路板１０１を用意する。次に、多層回路板１０１上に、樹脂シートおよび金属層を積層する。次に、加熱しながら、下面に凸成形部が形成された金型によって樹脂シートおよび金属層を押圧し、樹脂シートおよび金属層を多層回路板１０１の上側主面に圧着させる。この結果、樹脂シートは、金型の凸成形部によって押圧された部分に窪みが形成され、それ以外の部分に凸部１０３が形成される。 First, a multilayer circuit board 101 having circuits 102 formed on both main surfaces is prepared. Next, a resin sheet and a metal layer are laminated on the multilayer circuit board 101. Next, while heating, the resin sheet and the metal layer are pressed by a mold having a convex molding portion formed on the lower surface, and the resin sheet and the metal layer are pressed against the upper main surface of the multilayer circuit board 101. As a result, in the resin sheet, a depression is formed in the portion pressed by the convex molding portion of the mold, and the convex portion 103 is formed in the other portion.
　次に、樹脂シートの窪んだ部分に存在する金属層をエッチングによって除去する。次に、金属層が除去されて露出した樹脂シート部分にデスミア処理をおこなう。すなわち、窪みの底部に残った不要な樹脂シートの樹脂を除去して、凹部（キャビティ）１０４を形成する。デスミア処理は、たとえば、プラズマ洗浄によっておこなう。デスミア処理の結果、凹部１０４の底部に、多層回路板１０１に形成された回路１０２が露出する。 Next, the metal layer present in the recessed portion of the resin sheet is removed by etching. Next, a desmear process is performed to the resin sheet part exposed by removing the metal layer. That is, the resin of the unnecessary resin sheet remaining at the bottom of the depression is removed to form the recess (cavity) 104. The desmear process is performed by, for example, plasma cleaning. As a result of the desmear process, the circuit 102 formed on the multilayer circuit board 101 is exposed at the bottom of the recess 104.
　次に、凸部１０３上の金属層を加工して、回路１０５を形成する。最後に、回路１０２に部品１０６を実装して、凹凸多層回路板モジュール１０００を完成させる。 Next, the metal layer on the convex portion 103 is processed to form the circuit 105. Finally, the component 106 is mounted on the circuit 102 to complete the uneven multilayer circuit board module 1000.
特開２００７-５９８４４号公報JP 2007-59844 A
　特許文献１に開示された方法では、多層回路板１０１に樹脂シートを積層して、これに金型で窪みを成形し、窪みの底部に残った樹脂をデスミア処理にて除去することにより、多層回路板１０１に凹部（キャビティ）１０４を形成している。しかしながら、デスミア処理で凹部１０４を形成する方法では、凹部１０４の深さを精度よく制御するために、凹部１０４の底面（多層回路板１０１の主面）にマーキングを施す必要があった。そして、このときの不要なマーキングが製品に残ってしまうという問題があった。 In the method disclosed in Patent Document 1, a resin sheet is laminated on the multilayer circuit board 101, a recess is formed on the mold, and the resin remaining on the bottom of the recess is removed by a desmear process. A recess (cavity) 104 is formed in the circuit board 101. However, in the method of forming the recess 104 by the desmear process, it is necessary to mark the bottom surface of the recess 104 (the main surface of the multilayer circuit board 101) in order to accurately control the depth of the recess 104. And there was a problem that the unnecessary marking at this time remained in the product.
　本発明は、上述した従来の問題を解決するためになされたものであり、その手段として本発明の樹脂多層基板は、複数の樹脂層が積層された積層体を備え、樹脂層の少なくとも１つが、部分的に厚みが異なり、厚みの大きな第１部分と、第１部分よりも厚みが小さい、第２部分とを備えたものとする。この場合には、積層体に容易にキャビティや凸部を形成することができる。 The present invention has been made in order to solve the above-described conventional problems, and as a means thereof, the resin multilayer substrate of the present invention includes a laminate in which a plurality of resin layers are laminated, and at least one of the resin layers is provided. It is assumed that a first portion having a thickness that is partially different and a second portion having a thickness smaller than that of the first portion is provided. In this case, a cavity and a convex part can be easily formed in the laminate.
　なお、樹脂層が備えるのは、厚みの大きな第１部分および厚みの小さな第２部分のみには限られず、第１部分と第２部分との中間の厚みからなる、厚みが中間の部分などをさらに備えていてもよい。また、厚みが中間の部分の厚みは１つには限られず、厚みの異なる複数の厚みが中間の部分を備えていてもよい。 The resin layer is not limited to the first portion having a large thickness and the second portion having a small thickness, but includes a portion having an intermediate thickness between the first portion and the second portion. Furthermore, you may provide. Further, the thickness of the intermediate thickness portion is not limited to one, and a plurality of thicknesses having different thicknesses may include the intermediate portion.
　また、第１部分と第２部分とを備えた樹脂層が、第１部分と第２部分との間に、厚みの変化する第３部分を備えていてもよい。 Further, the resin layer including the first portion and the second portion may include a third portion whose thickness changes between the first portion and the second portion.
　また、積層された少なくとも１つの樹脂層が第１部分と第２部分とを備えていればよいが、積層された全ての樹脂層が第１部分と第２部分とを備えていてもよい。 Further, it is sufficient that at least one laminated resin layer includes the first portion and the second portion, but all laminated resin layers may include the first portion and the second portion.
　積層体が１対の主面を有し、少なくとも一方の主面に、内側壁および内底面を有する、少なくとも１つのキャビティが形成され、キャビティが形成された部分に、少なくとも１つの樹脂層の厚みの小さな部分が配置されていてもよい。この場合には、積層体に、容易にキャビティを形成することができる。 The laminate has a pair of main surfaces, at least one main surface having an inner wall and an inner bottom surface, at least one cavity is formed, and the thickness of at least one resin layer is formed in the portion where the cavity is formed. A small part of may be arranged. In this case, a cavity can be easily formed in the laminate.
　この場合において、積層体のキャビティが形成された側の主面から、キャビティの内側壁を経由して、キャビティの内底面に至る、少なくとも１つの配線電極が形成されていてもよい。この場合には、たとえば、キャビティに電子部品を収容し、形成した配線電極を電子部品への電気的な配線に使用することができる。 In this case, at least one wiring electrode may be formed from the main surface on the side where the cavity of the laminate is formed to the inner bottom surface of the cavity via the inner side wall of the cavity. In this case, for example, the electronic component can be accommodated in the cavity, and the formed wiring electrode can be used for electrical wiring to the electronic component.
　キャビティの内側壁の少なくとも一部分に金属層が形成されていてもよい。この場合において、金属層に、たとえば、キャビティに収容された電子部品から外部にノイズが放射されることを抑制したり、外部からキャビティに収容された電子部品にノイズが侵入することを抑制したりするシールド機能をもたせてもよい。また、金属層に、たとえば、キャビティに収容された電子部品が発生させた熱を外部に放熱する放熱機能をもたせてもよい。 A metal layer may be formed on at least a part of the inner wall of the cavity. In this case, for example, it is possible to suppress the noise from being radiated to the outside from the electronic component accommodated in the cavity, or to prevent the noise from entering the electronic component accommodated in the cavity from the outside. A shield function may be provided. Further, for example, the metal layer may be provided with a heat radiating function for radiating heat generated by an electronic component accommodated in the cavity to the outside.
　キャビティの内底面と、積層体のキャビティが形成されていない側の主面とを繋ぐ、貫通孔が形成されていてもよい。この場合には、たとえば、キャビティに光学部品を収容し、形成した貫通孔を光の通路として使用することができる。 A through hole may be formed to connect the inner bottom surface of the cavity and the main surface on the side where the cavity of the laminate is not formed. In this case, for example, an optical component can be accommodated in the cavity, and the formed through hole can be used as a light path.
　キャビティの内部に電子部品および光学部品の少なくとも一方が収容されていてもよい。なお、収容される電子部品の種類は任意であるが、たとえば、コンデンサ、コイル、抵抗などのチップ部品や、半導体集積回路部品や、樹脂封止モジュールなどを収容することができる。また、収容される光学部品の種類は任意であるが、たとえば、レンズ部品などを収容することができる。 At least one of an electronic component and an optical component may be accommodated in the cavity. In addition, although the kind of electronic component accommodated is arbitrary, For example, chip components, such as a capacitor | condenser, a coil, and resistance, a semiconductor integrated circuit component, a resin sealing module, etc. can be accommodated. Moreover, although the kind of optical component accommodated is arbitrary, a lens component etc. can be accommodated, for example.
　また、積層体が１対の主面を有し、少なくとも一方の主面に、少なくとも１つの凸部が形成され、凸部が形成された部分に、少なくとも１つの樹脂層の厚みの大きな部分が配置されていてもよい。この場合には、積層体に、容易に凸部を形成することができる。 Further, the laminate has a pair of main surfaces, at least one convex portion is formed on at least one main surface, and at least one resin layer having a large thickness is formed in the portion where the convex portions are formed. It may be arranged. In this case, a convex part can be easily formed in a laminated body.
　この場合において、凸部に電子部品および光学部品の少なくとも一方が実装されていてもよい。たとえば、凸部に電子部品を実装すれば、一般に、実装された電子部品と、積層体の内部に形成された内層電極との間の距離を大きくすることができるため、実装された電子部品と内層電極との相互干渉を抑制することができる。 In this case, at least one of an electronic component and an optical component may be mounted on the convex portion. For example, if an electronic component is mounted on the convex portion, generally, the distance between the mounted electronic component and the inner layer electrode formed in the laminated body can be increased. Mutual interference with the inner layer electrode can be suppressed.
　また、積層体が、最下層の樹脂層と、少なくとも１つの中間層の樹脂層と、最上層の樹脂層が積層されたものからなり、最下層、中間層、最上層の樹脂層が、それぞれ、第１部分と第２部分とを有する場合において、中間層の樹脂層の第１部分の厚みが、最下層および最上層の樹脂層の第１部分の厚みよりも小さく、かつ、中間層の樹脂層の第２部分の厚みが、最下層および最上層の樹脂層の第２部分の厚みよりも小さくてもよい。 In addition, the laminate is formed by laminating the lowermost resin layer, at least one intermediate resin layer, and the uppermost resin layer, and the lowermost layer, the intermediate layer, and the uppermost resin layer are respectively In the case of having the first part and the second part, the thickness of the first part of the resin layer of the intermediate layer is smaller than the thickness of the first part of the lowermost layer and the uppermost resin layer, and The thickness of the second portion of the resin layer may be smaller than the thickness of the second portion of the lowermost layer and the uppermost resin layer.
　樹脂層に厚みの大きな部分や厚みの小さな部分を形成するために、樹脂層に熱や圧力をかけると、樹脂層を構成する樹脂が樹脂層の内部で流動して、樹脂流れと呼ばれる現象が発生する場合がある。そして、樹脂層に樹脂流れが発生すると、その樹脂層の周辺に形成された内層電極が位置ずれを起こす虞がある。そして、内層電極が位置ずれを起こすと、樹脂多層基板の内部の回路配線が断線したり信頼性が低下したりする虞がある。一方、一般に、樹脂流れは、樹脂層の厚みが小さいほど発生しにくく、樹脂層の厚みが大きいほど発生しやすい。したがって、上記のように、中間層の樹脂層の厚みを、最下層や最上層の樹脂層の厚みよりも小さくしておけば、中間層の樹脂層の樹脂流れを抑制することができ、内層電極の位置ずれを抑制することができ、樹脂多層基板の内部の回路配線の断線や信頼性の低下を抑制することができる。 When heat or pressure is applied to the resin layer to form a thick part or a thin part in the resin layer, the resin constituting the resin layer flows inside the resin layer, and a phenomenon called resin flow occurs. May occur. When a resin flow occurs in the resin layer, the inner layer electrode formed around the resin layer may be displaced. When the inner layer electrode is displaced, the circuit wiring inside the resin multilayer substrate may be disconnected or the reliability may be lowered. On the other hand, in general, the resin flow is less likely to occur as the thickness of the resin layer is smaller, and is more likely to occur as the thickness of the resin layer is greater. Therefore, if the thickness of the resin layer of the intermediate layer is smaller than the thickness of the lowermost layer or the uppermost resin layer as described above, the resin flow of the intermediate resin layer can be suppressed, and the inner layer The positional deviation of the electrodes can be suppressed, and the disconnection of the circuit wiring inside the resin multilayer substrate and the deterioration of the reliability can be suppressed.
　樹脂層が熱可塑性樹脂によって作製されていてもよい。この場合には、樹脂層に圧力や熱を加えることによって、樹脂層に容易に厚みの小さな部分を形成することができる。 The resin layer may be made of a thermoplastic resin. In this case, a portion having a small thickness can be easily formed in the resin layer by applying pressure or heat to the resin layer.
　少なくとも１つの樹脂層に、両主面間の電気的導通をはかる、少なくとも１つのビア電極が形成されていてもよい。また、積層体の樹脂層の少なくとも１つの層間に、少なくとも１つの内層電極が形成されていてもよい。これらの場合には、ビア電極や内層電極を使って、積層体の内部に容易に回路配線を形成することができる。 In the at least one resin layer, at least one via electrode that establishes electrical continuity between both main surfaces may be formed. In addition, at least one inner layer electrode may be formed between at least one of the resin layers of the laminate. In these cases, circuit wiring can be easily formed inside the multilayer body using via electrodes and inner layer electrodes.
　本発明の樹脂多層基板を使用して、電子部品を収容するための電子部品用パッケージや、光学部品を収容するための光学部品用パッケージを作製することができる。 Using the resin multilayer substrate of the present invention, an electronic component package for accommodating electronic components and an optical component package for accommodating optical components can be produced.
　本発明の樹脂多層基板は、少なくとも１つの樹脂層が、厚みの大きな部分と厚みの小さな部分とを備えるため、不要なマーキングを用いることなく、積層体に容易に精度よくキャビティや凸部などを形成することができる。 In the resin multilayer substrate of the present invention, since at least one resin layer has a thick portion and a thin portion, a cavity, a convex portion, and the like can be easily and accurately formed on a laminate without using unnecessary markings. Can be formed.
図１（Ａ）は、第１実施形態にかかる樹脂多層基板１００の平面図である。図１（Ｂ）は、樹脂多層基板１００の断面図である。FIG. 1A is a plan view of a resin multilayer substrate 100 according to the first embodiment. FIG. 1B is a cross-sectional view of the resin multilayer substrate 100. 図２（Ａ）～（Ｃ）は、それぞれ、樹脂多層基板１００の製造方法の一例で実施される工程を示す断面図である。2A to 2C are cross-sectional views illustrating steps performed in an example of a method for manufacturing the resin multilayer substrate 100. FIG. 図３（Ｄ）、（Ｅ）は、図２（Ｃ）の続きであり、それぞれ、樹脂多層基板１００の製造方法の一例で実施される工程を示す断面図である。FIGS. 3D and 3E are continuations of FIG. 2C, and are cross-sectional views illustrating steps performed in an example of a method for manufacturing the resin multilayer substrate 100. 図４（Ｆ）、（Ｇ）は、図３（Ｅ）の続きであり、それぞれ、樹脂多層基板１００の製造方法の一例で実施される工程を示す断面図である。FIGS. 4F and 4G are continuations of FIG. 3E and are cross-sectional views illustrating steps performed in an example of the method for manufacturing the resin multilayer substrate 100, respectively. 第２実施形態にかかる樹脂多層基板２００の断面図である。It is sectional drawing of the resin multilayer substrate 200 concerning 2nd Embodiment. 第３実施形態にかかる樹脂多層基板３００の断面図である。It is sectional drawing of the resin multilayer substrate 300 concerning 3rd Embodiment. 第４実施形態にかかる樹脂多層基板４００の断面図である。It is sectional drawing of the resin multilayer substrate 400 concerning 4th Embodiment. 第５実施形態にかかる樹脂多層基板５００の断面図である。It is sectional drawing of the resin multilayer substrate 500 concerning 5th Embodiment. 第６実施形態にかかる樹脂多層基板６００の断面図である。It is sectional drawing of the resin multilayer substrate 600 concerning 6th Embodiment. 第７実施形態にかかる樹脂多層基板７００の断面図である。It is sectional drawing of the resin multilayer substrate 700 concerning 7th Embodiment. 第８実施形態にかかる樹脂多層基板８００の断面図である。It is sectional drawing of the resin multilayer substrate 800 concerning 8th Embodiment. 特許文献１に開示された凹凸多層回路板モジュール１０００の分解要部斜視図である。It is a disassembled principal part perspective view of the uneven | corrugated multilayer circuit board module 1000 disclosed by patent document 1. FIG.
　以下、図面とともに、本発明を実施するための形態について説明する。 Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings.
　なお、各実施形態は、本発明の実施の形態を例示的に示したものであり、本発明が実施形態の内容に限定されることはない。また、異なる実施形態に記載された内容を組合せて実施することも可能であり、その場合の実施内容も本発明に含まれる。また、図面は、明細書の理解を助けるためのものであって、模式的に描画されている場合があり、描画された構成要素または構成要素間の寸法の比率が、明細書に記載されたそれらの寸法の比率と一致していない場合がある。また、明細書に記載されている構成要素が、図面において省略されている場合や、個数を省略して描画されている場合などがある。 Each embodiment shows an embodiment of the present invention by way of example, and the present invention is not limited to the content of the embodiment. Moreover, it is also possible to implement combining the content described in different embodiment, and the implementation content in that case is also included in this invention. Further, the drawings are for helping the understanding of the specification, and may be schematically drawn, and the drawn components or the ratio of dimensions between the components are described in the specification. There are cases where the ratio of these dimensions does not match. In addition, the constituent elements described in the specification may be omitted in the drawings or may be drawn with the number omitted.
　［第１実施形態］
　図１（Ａ）、（Ｂ）に、第１実施形態にかかる樹脂多層基板１００を示す。ただし、図１（Ａ）は、樹脂多層基板１００の平面図である。図１（Ｂ）は、樹脂多層基板１００の断面図であり、図１（Ａ）の一点鎖線Ｘ-Ｘ部分を示している。 [First Embodiment]
1A and 1B show a resin multilayer substrate 100 according to the first embodiment. 1A is a plan view of the resin multilayer substrate 100. FIG. FIG. 1B is a cross-sectional view of the resin multilayer substrate 100, and shows a dot-dash line XX portion in FIG.
　樹脂多層基板１００は、最下層の樹脂層１と、中間層の樹脂層２と、最上層の樹脂層３とが積層された積層体４を備えている。 The resin multilayer substrate 100 includes a laminated body 4 in which a lowermost resin layer 1, an intermediate resin layer 2, and an uppermost resin layer 3 are laminated.
　積層体４（樹脂層１、２、３）の材質には、たとえば、液晶ポリマー（ＬＣＰ）などの熱可塑性樹脂を使用することができる。ただし、液晶ポリマー以外の熱可塑性樹脂を使用してもよい。たとえば、ポリエーテルエーテルケトン（ＰＥＥＫ）、ポリエーテルイミド（ＰＥＩ）、ポリイミド（ＰＩ）でもよい。また、エポキシ、不飽和ポリエステルなどの熱硬化性樹脂を使用してもよい。 As the material of the laminate 4 (resin layers 1, 2, 3), for example, a thermoplastic resin such as a liquid crystal polymer (LCP) can be used. However, a thermoplastic resin other than the liquid crystal polymer may be used. For example, polyetheretherketone (PEEK), polyetherimide (PEI), and polyimide (PI) may be used. Moreover, you may use thermosetting resins, such as an epoxy and unsaturated polyester.
　樹脂層１は、部分的に厚みが異なり、厚みの大きな第１部分１ａと、厚みの大きな第１部分１ａよりも厚みが小さい、厚みの小さな第２部分１ｂとを備えている。そして、厚みの大きな第１部分１ａと厚みの小さな第２部分１ｂとの間に、厚みの変化する第３部分１ｃを備えている。平面視において、第２部分１ｂは矩形であり、その周りを第１部分１ａが環状に囲っている。 The resin layer 1 is partially different in thickness, and includes a first portion 1a having a large thickness and a second portion 1b having a smaller thickness than the first portion 1a having a large thickness. And the 3rd part 1c from which thickness changes is provided between the 1st part 1a with large thickness, and the 2nd part 1b with small thickness. In plan view, the second portion 1b is rectangular, and the first portion 1a surrounds the periphery of the second portion 1b.
　樹脂層２も、部分的に厚みが異なり、厚みの大きな第１部分２ａと、厚みの大きな第１部分２ａよりも厚みが小さい、厚みの小さな第２部分２ｂとを備えている。そして、厚みの大きな第１部分２ａと厚みの小さな第２部分２ｂとの間に、厚みの変化する第３部分２ｃを備えている。平面視において、第２部分２ｂは矩形であり、その周りを第１部分２ａが環状に囲っている。 The resin layer 2 is also partially different in thickness, and includes a first portion 2a having a large thickness and a second portion 2b having a smaller thickness than the first portion 2a having a large thickness. And the 3rd part 2c from which thickness changes is provided between the 1st part 2a with large thickness, and the 2nd part 2b with small thickness. In plan view, the second portion 2b is rectangular, and the first portion 2a surrounds the second portion 2b in an annular shape.
　樹脂層３も、部分的に厚みが異なり、厚みの大きな第１部分３ａと、厚みの大きな第１部分３ａよりも厚みが小さい、厚みの小さな第２部分３ｂとを備えている。そして、厚みの大きな第１部分３ａと厚みの小さな第２部分３ｂとの間に、厚みの変化する第３部分３ｃを備えている。平面視において、第２部分３ｂは矩形であり、その周りを第１部分３ａが環状に囲っている。 The resin layer 3 is also partially different in thickness, and includes a first portion 3a having a large thickness and a second portion 3b having a smaller thickness than the first portion 3a having a large thickness. And the 3rd part 3c from which thickness changes is provided between the 1st part 3a with large thickness, and the 2nd part 3b with small thickness. In plan view, the second portion 3b is rectangular, and the first portion 3a surrounds the second portion 3b in an annular shape.
　樹脂多層基板１００においては、樹脂層１の第２部分１ｂと、樹脂層２の第２部分２ｂと、樹脂層３の第２部分３ｂとが、重ねて配置され、その部分にキャビティ５が構成されている。キャビティ５は、積層体４の上側主面が開口されており、内側壁５ａと内底面５ｂとを有している。 In the resin multilayer substrate 100, the second portion 1b of the resin layer 1, the second portion 2b of the resin layer 2, and the second portion 3b of the resin layer 3 are arranged so as to overlap each other, and the cavity 5 is formed in that portion. Has been. The cavity 5 has an open upper main surface of the laminate 4 and has an inner wall 5a and an inner bottom surface 5b.
　樹脂層２および樹脂層３には、それぞれ、両主面間の電気的導通をはかるためのビア電極６が形成されている。ビア電極６の材質は任意であるが、たとえば、銅や、銀や、銅の合金や、銀の合金、Ｓｎ－Ａｇ系のはんだなどを使用することができる。 The resin layer 2 and the resin layer 3 are respectively provided with via electrodes 6 for electrical conduction between both main surfaces. The material of the via electrode 6 is arbitrary, but, for example, copper, silver, a copper alloy, a silver alloy, Sn—Ag solder, or the like can be used.
　樹脂層１と樹脂層２との層間、および、樹脂層２と樹脂層３との層間には、それぞれ、内層電極７が形成されている。内層電極７の材質は任意であるが、たとえば、銅や、銀や、銅の合金や、銀の合金などを使用することができる。 Inner layer electrodes 7 are formed between the resin layer 1 and the resin layer 2 and between the resin layer 2 and the resin layer 3, respectively. Although the material of the inner layer electrode 7 is arbitrary, for example, copper, silver, a copper alloy, a silver alloy, or the like can be used.
　そして、積層体４の上側主面から、キャビティ５の内側壁５ａを経由して、キャビティ５の内底面５ｂに至るように、配線電極８が形成されている。配線電極８の材質は任意であるが、たとえば、銅や、銅の合金などを使用することができる。なお、配線電極８の表面に、必要に応じてめっき層を形成することも好ましい。めっき層の材質は、たとえば、Ｎｉ／Ｓｎ、Ｎｉ／はんだ、Ｎｉ／Ａｕなどとすることができる。 A wiring electrode 8 is formed so as to reach the inner bottom surface 5b of the cavity 5 from the upper main surface of the multilayer body 4 via the inner wall 5a of the cavity 5. Although the material of the wiring electrode 8 is arbitrary, for example, copper, a copper alloy, or the like can be used. In addition, it is also preferable to form a plating layer on the surface of the wiring electrode 8 as necessary. The material of the plating layer can be, for example, Ni / Sn, Ni / solder, Ni / Au, or the like.
　樹脂多層基板１００においては、キャビティ５の内底面５ｂから内側壁５ａ、積層体４の上側主面に渡って連続した、１２個の配線電極８が形成されている。ただし、配線電極８の数は任意であり、増減させることができる。 In the resin multilayer substrate 100, twelve wiring electrodes 8 that are continuous from the inner bottom surface 5 b of the cavity 5 to the inner side wall 5 a and the upper main surface of the multilayer body 4 are formed. However, the number of wiring electrodes 8 is arbitrary and can be increased or decreased.
　樹脂層１と樹脂層２との層間に形成された内層電極７と、樹脂層２と樹脂層３との層間に形成された内層電極７とが、樹脂層２に形成されたビア電極６によって電気的に接続されている。 An inner layer electrode 7 formed between the resin layer 1 and the resin layer 2 and an inner layer electrode 7 formed between the resin layer 2 and the resin layer 3 are formed by the via electrode 6 formed in the resin layer 2. Electrically connected.
　樹脂層２と樹脂層３との層間に形成されたと内層電極７と、配線電極８とが、樹脂層３に形成されたビア電極６によって電気的に接続されている。 When formed between the resin layer 2 and the resin layer 3, the inner layer electrode 7 and the wiring electrode 8 are electrically connected by a via electrode 6 formed in the resin layer 3.
　樹脂多層基板１００においては、配線電極８のキャビティ５の内底面５ｂに形成された部分に電子部品を実装することによって、キャビティ５に電子部品を収容することができる。すなわち、樹脂多層基板１００は、電子部品用パッケージとして使用することができる。この場合、配線電極８のキャビティ５の内底面５ｂに形成された部分は、実装用電極としての機能を果たす。 In the resin multilayer substrate 100, the electronic component can be accommodated in the cavity 5 by mounting the electronic component on the portion formed on the inner bottom surface 5 b of the cavity 5 of the wiring electrode 8. That is, the resin multilayer substrate 100 can be used as an electronic component package. In this case, the portion formed on the inner bottom surface 5b of the cavity 5 of the wiring electrode 8 functions as a mounting electrode.
　キャビティ５に収容される電子部品の種類は任意であるが、たとえば、半導体集積回路部品や、樹脂封止電子モジュール部品などを収容することができる。あるいは、これらに代えて、コンデンサ、コイル、抵抗などのチップ部品を収容してもよい。 The type of electronic component accommodated in the cavity 5 is arbitrary, but for example, a semiconductor integrated circuit component or a resin-encapsulated electronic module component can be accommodated. Alternatively, instead of these, chip components such as a capacitor, a coil, and a resistor may be accommodated.
　樹脂多層基板１００においては、樹脂層１に第１部分１ａと第２部分１ｂとを設け、樹脂層２に第１部分２ａと第２部分２ｂとを設け、樹脂層３に第１部分３ａと第２部分３ｂとを設けたうえで、各々の第２部分１ｂ、２ｂ、３ｂを重ねて配置することによって、積層体４に容易にキャビティ５が形成されている。なお、樹脂層は３層に限られず、１層であってもよいし、２層であってもよいし、３層より多くてもよい。 In the resin multilayer substrate 100, the resin layer 1 is provided with the first part 1a and the second part 1b, the resin layer 2 is provided with the first part 2a and the second part 2b, and the resin layer 3 is provided with the first part 3a and The cavity 5 is easily formed in the laminated body 4 by providing the second portion 3b and arranging the second portions 1b, 2b, and 3b in an overlapping manner. The resin layer is not limited to three layers, and may be one layer, two layers, or more than three layers.
　樹脂多層基板１００は、たとえば、図２（Ａ）～図４（Ｇ）に示す方法によって製造することができる。なお、ここでは便宜上、１つの樹脂多層基板１００を製造する場合を例にとって説明するが、実際の製造ラインにおいては、多数の樹脂層がマトリックス状に配置されたマザー樹脂層を使用し、多数の樹脂多層基板１００を一括して製造し、製造工程の途中か、完成後に、個々の樹脂多層基板１００に分割する場合がある。 Resin multilayer substrate 100 can be manufactured, for example, by the method shown in FIGS. 2 (A) to 4 (G). Here, for convenience, a case where one resin multilayer substrate 100 is manufactured will be described as an example. However, in an actual manufacturing line, a mother resin layer in which a large number of resin layers are arranged in a matrix is used. The resin multilayer substrate 100 may be manufactured in a lump, and may be divided into individual resin multilayer substrates 100 during the manufacturing process or after completion.
　まず、図２（Ａ）に示すように、樹脂層１、樹脂層２、樹脂層３をそれぞれ用意する。樹脂層１～３の上側主面には、それぞれ、内層電極７や配線電極８を形成するための銅箔１７が予め貼り付けられている。 First, as shown in FIG. 2A, a resin layer 1, a resin layer 2, and a resin layer 3 are prepared. Copper foils 17 for forming the inner layer electrode 7 and the wiring electrode 8 are attached in advance to the upper main surfaces of the resin layers 1 to 3, respectively.
　次に、図２（Ｂ）に示すように、銅箔１７を周知のエッチング技術によって所望の形状にエッチングし、樹脂層１および樹脂層２の上側主面にそれぞれ内層電極７を形成し、樹脂層３の上側主面に配線電極８を形成する。より具体的には、まず、樹脂層１、樹脂層２、樹脂層３の銅箔１７の表面に、それぞれ、所望のパターン形状からなるレジストパターンを形成する。次に、樹脂層１、樹脂層２、樹脂層３を、それぞれ、エッチング液に浸漬して銅箔１７をエッチングし、樹脂層１、樹脂層２にそれぞれ内層電極７を形成し、樹脂層３に配線電極８を形成する。次に、樹脂層１、樹脂層２、樹脂層３から、それぞれ、不要となったレジストパターンを除去する。 Next, as shown in FIG. 2B, the copper foil 17 is etched into a desired shape by a well-known etching technique, and the inner layer electrodes 7 are formed on the upper principal surfaces of the resin layer 1 and the resin layer 2, respectively. A wiring electrode 8 is formed on the upper main surface of the layer 3. More specifically, first, resist patterns each having a desired pattern shape are formed on the surfaces of the copper foils 17 of the resin layer 1, the resin layer 2, and the resin layer 3. Next, the resin layer 1, the resin layer 2, and the resin layer 3 are each immersed in an etching solution to etch the copper foil 17, and the inner layer electrode 7 is formed on each of the resin layer 1 and the resin layer 2. A wiring electrode 8 is formed on the substrate. Next, unnecessary resist patterns are removed from the resin layer 1, the resin layer 2, and the resin layer 3, respectively.
　次に、図２（Ｃ）に示すように、上下方向を反転させたうえで、樹脂層２に、レーザー光を照射するなどの方法によってビア電極６を形成するための貫通孔１６を形成する。貫通孔１６は、内層電極７に到達させる。同様に、上下方向を反転させたうえで、樹脂層３に、レーザー光を照射するなどの方法によってビア電極６を形成するための貫通孔１６を形成する。貫通孔１６は、配線電極８に到達させる。なお、図２（Ｃ）においては、樹脂層１も、上下を反転させて描いている。 Next, as shown in FIG. 2C, after the vertical direction is reversed, the through hole 16 for forming the via electrode 6 is formed in the resin layer 2 by a method such as irradiating laser light. . The through hole 16 reaches the inner layer electrode 7. Similarly, after the vertical direction is reversed, the through hole 16 for forming the via electrode 6 is formed in the resin layer 3 by a method such as irradiating a laser beam. The through hole 16 reaches the wiring electrode 8. In FIG. 2C, the resin layer 1 is also drawn upside down.
　次に、図３（Ｄ）に示すように、樹脂層２および樹脂層３にそれぞれ形成した貫通孔１６に、ビア電極６を形成するための導電性ペースト２６を充填する。 Next, as shown in FIG. 3D, the conductive paste 26 for forming the via electrode 6 is filled into the through holes 16 formed in the resin layer 2 and the resin layer 3 respectively.
　次に、図３（Ｅ）に示すように、樹脂層１、樹脂層２、樹脂層３の上下方向を、それぞれ、再び反転させる。 Next, as shown in FIG. 3E, the up and down directions of the resin layer 1, the resin layer 2, and the resin layer 3 are inverted again.
　次に、図４（Ｆ）に示すように、樹脂層１、樹脂層２、樹脂層３を重ね合わせ、加熱および加圧して一体化させ、積層体４を作製する。この結果、樹脂層２、３に形成された貫通孔１６に充填された導電性ペースト２６が硬化して、ビア電極６になる。 Next, as shown in FIG. 4 (F), the resin layer 1, the resin layer 2, and the resin layer 3 are superposed and integrated by heating and pressurizing to produce a laminate 4. As a result, the conductive paste 26 filled in the through holes 16 formed in the resin layers 2 and 3 is cured and becomes the via electrode 6.
　次に、図４（Ｇ）に示すように、積層体４を、所望の形状からなる金型によって、加熱しながら加圧し、キャビティ５を形成する。この結果、樹脂層１が塑性変形し、厚みの小さな第２部分１ｂが形成されて、樹脂層１に厚みの大きな第１部分１ａと厚みの小さな第２部分１ｂと厚みの変化する第３部分１ｃとが設けられる。同様に、樹脂層２が塑性変形し、厚みの小さな第２部分２ｂが形成されて、樹脂層２に厚みの大きな第１部分２ａと厚みの小さな第２部分２ｂと厚みの変化する第３部分２ｃとが設けられる。同様に、樹脂層３が塑性変形し、厚みの小さな第２部分３ｂが形成されて、樹脂層３に厚みの大きな第１部分３ａと厚みの小さな第２部分３ｂと厚みの変化する第３部分３ｃとが設けられる。そして、積層体４における各々の第２部分１ｂ、２ｂ、３ｂが重ねて配置された部分が、キャビティ５になる。なお、樹脂層３の塑性変形にともない、樹脂層３の上側主面に形成された配線電極８も変形する。 Next, as shown in FIG. 4 (G), the laminate 4 is pressurized while being heated by a mold having a desired shape to form a cavity 5. As a result, the resin layer 1 is plastically deformed to form a second portion 1b having a small thickness, and the resin portion 1 has a first portion 1a having a large thickness, a second portion 1b having a small thickness, and a third portion having a changed thickness. 1c. Similarly, the resin layer 2 is plastically deformed to form a second portion 2b having a small thickness, and the resin portion 2 has a first portion 2a having a large thickness, a second portion 2b having a small thickness, and a third portion having a varying thickness. 2c. Similarly, the resin layer 3 is plastically deformed to form a second portion 3b having a small thickness, and the resin layer 3 has a first portion 3a having a large thickness, a second portion 3b having a small thickness, and a third portion having a varying thickness. 3c is provided. And the part in which each 2nd part 1b, 2b, 3b in the laminated body 4 is piled up becomes the cavity 5. FIG. In addition, with the plastic deformation of the resin layer 3, the wiring electrode 8 formed on the upper main surface of the resin layer 3 is also deformed.
　図示しないが、最後に、配線電極８の表面に、必要に応じてめっき層を形成して、樹脂多層基板１００が完成する。 Although not shown in the figure, finally, a plating layer is formed on the surface of the wiring electrode 8 as necessary, and the resin multilayer substrate 100 is completed.
　［第２実施形態］
　図５に、第２実施形態にかかる樹脂多層基板２００を示す。ただし、図５は、樹脂多層基板２００の断面図である。 [Second Embodiment]
FIG. 5 shows a resin multilayer substrate 200 according to the second embodiment. However, FIG. 5 is a cross-sectional view of the resin multilayer substrate 200.
　樹脂多層基板２００は、上述した第１実施形態にかかる樹脂多層基板１００のキャビティ５に、電子部品を収納したものである。具体的には、樹脂多層基板１００に形成された配線電極８における、キャビティ５の内底面５ｂに形成された部分に、電子部品として半導体集積回路部品２１を、バンプ２２によって実装した。 The resin multilayer substrate 200 is obtained by housing electronic components in the cavity 5 of the resin multilayer substrate 100 according to the first embodiment described above. Specifically, a semiconductor integrated circuit component 21 as an electronic component was mounted on the wiring electrode 8 formed on the resin multilayer substrate 100 on the inner bottom surface 5 b of the cavity 5 using bumps 22.
　このように、本発明の樹脂多層基板に形成されたキャビティには、電子部品を収容することができる。ただし、キャビティに収容される電子部品は、半導体集積回路部品には限られず、樹脂封止モジュールや、コンデンサ、コイル、抵抗などのチップ部品などであってもよい。あるいは、キャビティに電子部品を収容するのに代えて、レンズ部品などの光学部品を収容してもよい。 Thus, electronic components can be accommodated in the cavity formed in the resin multilayer substrate of the present invention. However, the electronic component accommodated in the cavity is not limited to a semiconductor integrated circuit component, and may be a resin-encapsulated module, a chip component such as a capacitor, a coil, or a resistor. Alternatively, instead of accommodating electronic components in the cavity, optical components such as lens components may be accommodated.
　［第３実施形態］
　図６に、第３実施形態にかかる樹脂多層基板３００を示す。ただし、図６は、樹脂多層基板３００の断面図である。 [Third Embodiment]
FIG. 6 shows a resin multilayer substrate 300 according to the third embodiment. However, FIG. 6 is a cross-sectional view of the resin multilayer substrate 300.
　樹脂多層基板３００は、キャビティ５に金属層３６を形成したことを特徴としている。 Resin multilayer substrate 300 is characterized in that metal layer 36 is formed in cavity 5.
　樹脂多層基板３００は、最下層の樹脂層３１と、２層の中間層の樹脂層３２、３３と、最上層の樹脂層３４とが積層された積層体３５を備えている。 The resin multilayer substrate 300 includes a laminate 35 in which a lowermost resin layer 31, two intermediate resin layers 32 and 33, and an uppermost resin layer 34 are laminated.
　樹脂層３１は、厚みの大きな第１部分３１ａと厚みの小さな第２部分３１ｂと厚みの変化する第３部分３１ｃとを備えている。同様に、樹脂層３２は、厚みの大きな第１部分３２ａと厚みの小さな第２部分３２ｂと厚みの変化する第３部分３２ｃとを備えている。樹脂層３３は、厚みの大きな第１部分３３ａと厚みの小さな第２部分３３ｂと厚みの変化する第３部分３３ｃとを備えている。樹脂層３４は、厚みの大きな第１部分３４ａと厚みの小さな第２部分３４ｂと厚みの変化する第３部分３４ｃとを備えている。 The resin layer 31 includes a first portion 31a having a large thickness, a second portion 31b having a small thickness, and a third portion 31c having a varying thickness. Similarly, the resin layer 32 includes a first portion 32a having a large thickness, a second portion 32b having a small thickness, and a third portion 32c having a varying thickness. The resin layer 33 includes a first portion 33a having a large thickness, a second portion 33b having a small thickness, and a third portion 33c having a varying thickness. The resin layer 34 includes a first portion 34a having a large thickness, a second portion 34b having a small thickness, and a third portion 34c having a varying thickness.
　樹脂多層基板３００においては、樹脂層３１の第２部分３１ｂと、樹脂層３２の第２部分３２ｂと、樹脂層３３の第２部分３３ｂと、樹脂層３４の第２部分３４ｂとが、重ねて配置され、その部分にキャビティ５が構成されている。キャビティ５は、積層体３５の上側主面が開口されており、内側壁５ａと内底面５ｂとを有している。 In the resin multilayer substrate 300, the second portion 31b of the resin layer 31, the second portion 32b of the resin layer 32, the second portion 33b of the resin layer 33, and the second portion 34b of the resin layer 34 are overlapped. The cavity 5 is formed in that portion. The cavity 5 is opened at the upper main surface of the laminate 35 and has an inner wall 5a and an inner bottom surface 5b.
　積層体３５の内部に、必要に応じて、ビア電極６や内層電極７が形成されている。また、キャビティ５の内底面５ｂに、配線電極８が形成されている。　 The via electrode 6 and the inner layer electrode 7 are formed in the laminated body 35 as necessary. A wiring electrode 8 is formed on the inner bottom surface 5 b of the cavity 5. *
　樹脂多層基板３００においては、積層体３５の上側主面、および、キャビティ５に内側壁５ａに、金属層３６が形成されている。金属層３６の材質は任意であるが、たとえば、銅や、銅の合金などを使用することができる。 In the resin multilayer substrate 300, a metal layer 36 is formed on the upper main surface of the laminate 35 and on the inner wall 5 a in the cavity 5. Although the material of the metal layer 36 is arbitrary, for example, copper, a copper alloy, or the like can be used.
　樹脂多層基板３００は、キャビティ５に、電子部品を収容することができる。電子部品は、キャビティ５の内底面５ｂに形成された配線電極８に実装する。 Resin multilayer substrate 300 can accommodate electronic components in cavity 5. The electronic component is mounted on the wiring electrode 8 formed on the inner bottom surface 5 b of the cavity 5.
　樹脂多層基板３００においては、金属層３６を、シールドや放熱経路として利用することができる。 In the resin multilayer substrate 300, the metal layer 36 can be used as a shield or a heat dissipation path.
　すなわち、キャビティ５の内側壁５ａの金属層３６によって、キャビティ５に収容された電子部品の側面を遮蔽し、電子部品から外部にノイズが放射されることを抑制するとともに、外部から電子部品にノイズが侵入することを抑制することができる。 That is, the metal layer 36 on the inner wall 5a of the cavity 5 shields the side surface of the electronic component housed in the cavity 5, and suppresses noise from being radiated from the electronic component to the outside. Can be prevented from entering.
　また、キャビティ５に収容された電子部品が発熱した場合、キャビティ５の内側壁５ａの金属層３６によって吸熱し、その熱を積層体３５の上側主面の金属層３６から放熱することができる。そして、電子部品が異常に高温になることを抑制することができる。 Further, when the electronic component housed in the cavity 5 generates heat, the heat can be absorbed by the metal layer 36 on the inner wall 5 a of the cavity 5, and the heat can be dissipated from the metal layer 36 on the upper main surface of the laminate 35. And it can suppress that an electronic component becomes abnormally high temperature.
　［第４実施形態］
　図７に、第４実施形態にかかる樹脂多層基板４００を示す。ただし、図７は、樹脂多層基板４００の断面図である。 [Fourth Embodiment]
FIG. 7 shows a resin multilayer substrate 400 according to the fourth embodiment. However, FIG. 7 is a cross-sectional view of the resin multilayer substrate 400.
　樹脂多層基板４００は、上述した第３実施形態にかかる樹脂多層基板３００のキャビティ５に、電子部品を収納したものである。具体的には、樹脂多層基板３００のキャビティ５の内底面５ｂに形成された配線電極８に、電子部品として樹脂封止モジュール４１を、はんだ４２によって実装した。 The resin multilayer substrate 400 is obtained by housing electronic components in the cavity 5 of the resin multilayer substrate 300 according to the third embodiment described above. Specifically, a resin sealing module 41 as an electronic component was mounted on the wiring electrode 8 formed on the inner bottom surface 5 b of the cavity 5 of the resin multilayer substrate 300 with solder 42.
　樹脂封止モジュール４１は、内部に基板４３を備えている。基板４３の両主面には、種々の電子部品４４が実装されている。また、基板４３の下側主面には、電気的接続をはかるための金属ピン４５が実装されている。そして、基板４３が電子部品４４および金属ピン４５とともに、封止樹脂４６によって封止されている。樹脂封止モジュール４１の底面には、図示を省略しているが、電極が形成されている。 The resin sealing module 41 includes a substrate 43 inside. Various electronic components 44 are mounted on both main surfaces of the substrate 43. In addition, metal pins 45 for electrical connection are mounted on the lower main surface of the substrate 43. The substrate 43 is sealed with a sealing resin 46 together with the electronic component 44 and the metal pin 45. Although not shown, an electrode is formed on the bottom surface of the resin sealing module 41.
　樹脂多層基板４００は、キャビティ５の内側壁５ａの金属層３６によって、キャビティ５に収容された樹脂封止モジュール４１の側面がシールドされている。すなわち、金属層３６によって、樹脂封止モジュール４１から外部にノイズが放射されることが抑制されている。また、金属層３６によって、外部から樹脂封止モジュール４１にノイズが侵入することが抑制されている。 In the resin multilayer substrate 400, the side surface of the resin sealing module 41 accommodated in the cavity 5 is shielded by the metal layer 36 on the inner wall 5 a of the cavity 5. That is, the metal layer 36 prevents noise from being radiated from the resin sealing module 41 to the outside. Further, the metal layer 36 suppresses noise from entering the resin sealing module 41 from the outside.
　また、樹脂多層基板４００は、樹脂封止モジュール４１が発熱した場合、キャビティ５の内側壁５ａの金属層３６によって吸熱し、その熱を積層体３５の上側主面の金属層３６から放熱することができる。そして、樹脂封止モジュール４１が異常に高温になることを抑制することができる。 Further, when the resin sealing module 41 generates heat, the resin multilayer substrate 400 absorbs heat by the metal layer 36 on the inner wall 5a of the cavity 5 and dissipates the heat from the metal layer 36 on the upper main surface of the laminate 35. Can do. And it can suppress that the resin sealing module 41 becomes abnormally high temperature.
　［第５実施形態］
　図８に、第５実施形態にかかる樹脂多層基板５００を示す。ただし、図８は、樹脂多層基板５００の断面図である。 [Fifth Embodiment]
FIG. 8 shows a resin multilayer substrate 500 according to the fifth embodiment. However, FIG. 8 is a cross-sectional view of the resin multilayer substrate 500.
　たとえば、上述した第１実施形態にかかる樹脂多層基板１００では、積層体４を構成する３層の樹脂層１、２、３において、厚みの大きな第１部分１ａ、２ａ、３ａの厚みが相互に等しく、厚みの小さな第２部分１ｂ、２ｂ、３ｂの厚みが相互に等しかった。 For example, in the resin multilayer substrate 100 according to the first embodiment described above, the thicknesses of the first portions 1a, 2a, and 3a having large thicknesses are mutually different in the three resin layers 1, 2, and 3 constituting the laminate 4. The thicknesses of the second portions 1b, 2b, and 3b having the same and small thickness were equal to each other.
　これに対し、第５実施形態にかかる樹脂多層基板５００は、厚みの大きな第１部分の厚みが樹脂層間で均一ではなく、厚みの小さな第２部分の厚みも樹脂層間で均一ではないことを特徴としている。 In contrast, the resin multilayer substrate 500 according to the fifth embodiment is characterized in that the thickness of the first portion having a large thickness is not uniform between the resin layers, and the thickness of the second portion having a small thickness is not uniform between the resin layers. It is said.
　樹脂多層基板５００は、最下層の樹脂層５１と、３層の中間層の樹脂層５２、５３、５４と、最上層の樹脂層５５とが積層された積層体５６を備えている。 The resin multilayer substrate 500 includes a laminate 56 in which a lowermost resin layer 51, three intermediate resin layers 52, 53, and 54 and an uppermost resin layer 55 are laminated.
　樹脂層５１は、厚みの大きな第１部分５１ａと厚みの小さな第２部分５１ｂと厚みの変化する第３部分５１ｃとを備えている。同様に、樹脂層５２は、厚みの大きな第１部分５２ａと厚みの小さな第２部分５２ｂと厚みの変化する第３部分５２ｃとを備えている。樹脂層５３は、厚みの大きな第１部分５３ａと厚みの小さな第２部分５３ｂと厚みの変化する第３部分５３ｃとを備えている。樹脂層５４は、厚みの大きな第１部分５４ａと厚みの小さな第２部分５４ｂと厚みの変化する第３部分５４ｃとを備えている。樹脂層５５は、厚みの大きな第１部分５５ａと厚みの小さな第２部分５５ｂと厚みの変化する第３部分５５ｃとを備えている。 The resin layer 51 includes a first portion 51a having a large thickness, a second portion 51b having a small thickness, and a third portion 51c having a varying thickness. Similarly, the resin layer 52 includes a first portion 52a having a large thickness, a second portion 52b having a small thickness, and a third portion 52c having a varying thickness. The resin layer 53 includes a first portion 53a having a large thickness, a second portion 53b having a small thickness, and a third portion 53c having a varying thickness. The resin layer 54 includes a first portion 54a having a large thickness, a second portion 54b having a small thickness, and a third portion 54c having a varying thickness. The resin layer 55 includes a first portion 55a having a large thickness, a second portion 55b having a small thickness, and a third portion 55c having a varying thickness.
　樹脂多層基板５００においては、樹脂層５１の第２部分５１ｂと、樹脂層５２の第２部分５２ｂと、樹脂層５３の第２部分５３ｂと、樹脂層５４の第２部分５４ｂと、樹脂層５５の第２部分５５ｂとが、重ねて配置され、その部分にキャビティ５が構成されている。キャビティ５は、積層体５６の上側主面が開口されており、内側壁５ａと内底面５ｂとを有している。 In the resin multilayer substrate 500, the second portion 51b of the resin layer 51, the second portion 52b of the resin layer 52, the second portion 53b of the resin layer 53, the second portion 54b of the resin layer 54, and the resin layer 55 The second portion 55b is overlapped and the cavity 5 is formed in that portion. The cavity 5 is opened at the upper main surface of the laminate 56, and has an inner wall 5a and an inner bottom surface 5b.
　樹脂多層基板５００においては、中間層の樹脂層５２の第１部分５２ａ、樹脂層５３の第１部分５３ａ、樹脂層５４の第１部分５４ａの厚みが、最下層の樹脂層５１の第１部分５１ａおよび最上層の樹脂層５５の第１部分５５ａの厚みよりも小さい。また、中間層の樹脂層５２の第２部分５２ｂ、樹脂層５３の第２部分５３ｂ、樹脂層５４の第２部分５４ｂの厚みが、最下層の樹脂層５１の第２部分５１ｂおよび最上層の樹脂層５５の第２部分５５ｂの厚みよりも小さい。すなわち、樹脂多層基板５００においては、中間層の樹脂層５２、５３、５４の厚みが、全域にわたって、最下層の樹脂層５１および最上層の樹脂層５５の厚みよりも小さい。 In the resin multilayer substrate 500, the thickness of the first portion 52a of the intermediate resin layer 52, the first portion 53a of the resin layer 53, and the first portion 54a of the resin layer 54 is the first portion of the lowermost resin layer 51. 51a and the thickness of the first portion 55a of the uppermost resin layer 55 are smaller. Further, the thickness of the second portion 52b of the intermediate resin layer 52, the second portion 53b of the resin layer 53, and the second portion 54b of the resin layer 54 is set so that the second portion 51b of the lowermost resin layer 51 and the uppermost layer. The thickness of the second portion 55b of the resin layer 55 is smaller. That is, in the resin multilayer substrate 500, the thickness of the intermediate resin layers 52, 53, and 54 is smaller than the thickness of the lowermost resin layer 51 and the uppermost resin layer 55 over the entire area.
　積層体５６の内部に、必要に応じて、ビア電極６や内層電極７が形成されている。また、キャビティ５の内底面５ｂに、配線電極８が形成されている。なお、樹脂多層基板５００においては、中間層の樹脂層５２、５３、５４の層間に、内層電極７が、集中して、より多く形成されている。 The via electrode 6 and the inner layer electrode 7 are formed in the laminated body 56 as needed. A wiring electrode 8 is formed on the inner bottom surface 5 b of the cavity 5. In the resin multilayer substrate 500, more inner layer electrodes 7 are concentrated and formed between the intermediate resin layers 52, 53, and 54.
　樹脂多層基板５００を製造するに際し、樹脂層５１～５５を、それぞれ、所望の形状の金型の間に挟み込み、加熱しながら加圧して、塑性変形させて、厚みの大きな第１部分５１ａ～５５ａ、厚みの小さな第２部分５１ｂ～５５ｂ、厚みの変化する第３部分５１ｃ～５５ｃを形成する場合がある。そして、このとき、樹脂層５１～５５を構成する樹脂が、樹脂層５１～５５の内部で流動し、樹脂流れという現象が発生する場合がある。 When the resin multilayer substrate 500 is manufactured, the resin layers 51 to 55 are respectively sandwiched between molds of desired shapes, heated and pressurized to be plastically deformed, and the first portions 51a to 55a having a large thickness. The second portions 51b to 55b having a small thickness and the third portions 51c to 55c having a varying thickness may be formed. At this time, the resin constituting the resin layers 51 to 55 may flow inside the resin layers 51 to 55, causing a phenomenon of resin flow.
　樹脂層に樹脂流れが発生すると、その樹脂層の周辺に形成された内層電極７が位置ずれを起こす虞がある。そして、内層電極７が位置ずれを置こすと、樹脂多層基板の内部の回路配線が断線したり、特性が劣化したりする虞がある。 When a resin flow occurs in the resin layer, the inner layer electrode 7 formed around the resin layer may be displaced. If the inner layer electrode 7 is displaced, the circuit wiring inside the resin multilayer substrate may be disconnected or the characteristics may be deteriorated.
　一方、一般に、樹脂流れは、樹脂層の厚みが小さいほど発生しにくく、樹脂層の厚みが大きいほど発生しやすい傾向にある。 On the other hand, generally, the resin flow is less likely to occur as the thickness of the resin layer is smaller, and more likely to occur as the thickness of the resin layer is greater.
　そこで、樹脂多層基板５００では、中間層の樹脂層５２、５３、５４の厚みを、最下層の樹脂層５１および最上層の樹脂層５５の厚みよりも小さくするとともに、中間層の樹脂層５２、５３、５４の層間に内層電極７を集中して形成することによって、中間層の樹脂層５２、５３、５４の樹脂流れの発生を抑制し、中間層の樹脂層５２、５３、５４の周辺に形成された内層電極７の位置ずれを抑制し、内部の回路配線の断線や特性の劣化を抑制している。 Therefore, in the resin multilayer substrate 500, the thickness of the intermediate resin layers 52, 53, 54 is made smaller than the thickness of the lowermost resin layer 51 and the uppermost resin layer 55, and the intermediate resin layer 52, By concentrating and forming the inner layer electrode 7 between the layers 53 and 54, the generation of the resin flow of the intermediate resin layers 52, 53 and 54 is suppressed, and the intermediate resin layers 52, 53 and 54 are formed around the intermediate resin layers 52, 53 and 54. The positional deviation of the formed inner layer electrode 7 is suppressed, and disconnection of the internal circuit wiring and deterioration of characteristics are suppressed.
　樹脂多層基板５００は、中間層の樹脂層５２、５３、５４の樹脂流れが発生しにくく、その樹脂流れに起因した内部の回路配線の断線や特性の劣化が発生しにくい。 In the resin multilayer substrate 500, the resin flow of the intermediate resin layers 52, 53, and 54 is less likely to occur, and disconnection of internal circuit wiring and deterioration of characteristics due to the resin flow are less likely to occur.
　［第６実施形態］
　図９に、第６実施形態にかかる樹脂多層基板６００を示す。ただし、図９は、樹脂多層基板６００の断面図である。 [Sixth Embodiment]
FIG. 9 shows a resin multilayer substrate 600 according to the sixth embodiment. However, FIG. 9 is a cross-sectional view of the resin multilayer substrate 600.
　樹脂多層基板６００は、第１実施形態にかかる樹脂多層基板１００から、ビア電極６、内層電極７、配線電極８を省略したものである。すなわち、本発明の樹脂多層基板において、ビア電極６、内層電極７、配線電極８は必須の構成ではなく、樹脂多層基板６００のように、これらを備えない樹脂多層基板を構成することもできる。 The resin multilayer substrate 600 is obtained by omitting the via electrode 6, the inner layer electrode 7, and the wiring electrode 8 from the resin multilayer substrate 100 according to the first embodiment. That is, in the resin multilayer substrate of the present invention, the via electrode 6, the inner layer electrode 7, and the wiring electrode 8 are not essential components, and a resin multilayer substrate that does not include them can be configured like the resin multilayer substrate 600.
　［第７実施形態］
　図１０に、第７実施形態にかかる樹脂多層基板７００を示す。ただし、図１０は、樹脂多層基板７００の断面図である。 [Seventh Embodiment]
FIG. 10 shows a resin multilayer substrate 700 according to the seventh embodiment. However, FIG. 10 is a cross-sectional view of the resin multilayer substrate 700.
　樹脂多層基板７００は、積層体７４の上側主面に、凸部７５を形成したことを特徴としている。また、凸部７５に、樹脂封止モジュール４１を実装したことを特徴としている。 Resin multilayer substrate 700 is characterized in that convex portions 75 are formed on the upper main surface of laminate 74. Further, the resin sealing module 41 is mounted on the convex portion 75.
　樹脂多層基板７００は、最下層の樹脂層７１と、中間層の樹脂層７２と、最上層の樹脂層７３とが積層された積層体７４を備えている。 The resin multilayer substrate 700 includes a laminate 74 in which a lowermost resin layer 71, an intermediate resin layer 72, and an uppermost resin layer 73 are laminated.
　樹脂層７１は、厚みの大きな第１部分７１ａと厚みの小さな第２部分７１ｂとを備えている。樹脂層７２は、厚みの大きな第１部分７２ａと厚みの小さな第２部分７２ｂと厚みの変化する第３部分７２ｃとを備えている。樹脂層７３は、厚みの大きな第１部分７３ａと厚みの小さな第２部分７３ｂと厚みの変化する第３部分７３ｃとを備えている。 The resin layer 71 includes a first portion 71a having a large thickness and a second portion 71b having a small thickness. The resin layer 72 includes a first portion 72a having a large thickness, a second portion 72b having a small thickness, and a third portion 72c having a varying thickness. The resin layer 73 includes a first portion 73a having a large thickness, a second portion 73b having a small thickness, and a third portion 73c having a varying thickness.
　樹脂多層基板７００においては、樹脂層７１の第１部分７１ａと、樹脂層７２の第１部分７２ａと、樹脂層７３の第１部分７３ａとが、重ねて配置され、その部分に凸部７５が構成されている。 In the resin multilayer substrate 700, the first portion 71a of the resin layer 71, the first portion 72a of the resin layer 72, and the first portion 73a of the resin layer 73 are arranged so as to overlap with each other, and the convex portion 75 is formed in that portion. It is configured.
　樹脂層７２および樹脂層７３には、それぞれ、両主面間の電気的導通をはかるためのビア電極６が形成されている。 The resin layer 72 and the resin layer 73 are formed with via electrodes 6 for electrical conduction between the two main surfaces.
　樹脂層７１と樹脂層７２との層間、および、樹脂層７２と樹脂層７３との層間には、それぞれ、内層電極７が形成されている。 Inner layer electrodes 7 are formed between the resin layer 71 and the resin layer 72 and between the resin layer 72 and the resin layer 73, respectively.
　樹脂層７３の第１部分７３ａの上側主面に、配線電極８が形成されている。 The wiring electrode 8 is formed on the upper main surface of the first portion 73 a of the resin layer 73.
　樹脂層７１と樹脂層７２との層間に形成された内層電極７と、樹脂層７２と樹脂層７３との層間に形成された内層電極７とが、樹脂層７２に形成されたビア電極６によって電気的に接続されている。また、樹脂層７２と樹脂層７３との層間に形成されたと内層電極７と、配線電極８とが、樹脂層７３に形成されたビア電極６によって電気的に接続されている。 The inner layer electrode 7 formed between the resin layer 71 and the resin layer 72 and the inner layer electrode 7 formed between the resin layer 72 and the resin layer 73 are formed by the via electrode 6 formed in the resin layer 72. Electrically connected. Further, the inner layer electrode 7 and the wiring electrode 8 that are formed between the resin layer 72 and the resin layer 73 are electrically connected by the via electrode 6 formed in the resin layer 73.
　樹脂層７３の厚みの大きな第１部分７３ａの上側主面に形成された配線電極８に、電子部品として、樹脂封止モジュール４１が、はんだ４２によって実装されている。すなわち、樹脂多層基板７００は、積層体７４の上側主面に形成された凸部７５に、樹脂封止モジュール４１が実装されている。 A resin sealing module 41 is mounted as an electronic component by solder 42 on the wiring electrode 8 formed on the upper main surface of the first portion 73 a having a large thickness of the resin layer 73. That is, in the resin multilayer substrate 700, the resin sealing module 41 is mounted on the convex portion 75 formed on the upper main surface of the multilayer body 74.
　樹脂封止モジュール４１は、内部に基板４３を備えている。基板４３の両主面には、種々の電子部品４４が実装されている。また、基板４３の下側主面には、電気的接続をはかるための金属ピン４５が実装されている。そして、基板４３が電子部品４４および金属ピン４５とともに、封止樹脂４６によって封止されている。樹脂封止モジュール４１の底面には、図示を省略しているが、電極が形成されている。なお、金属ピン４５に代えて、ビアやめっきによって電気的接続をはかってもよい。 The resin sealing module 41 includes a substrate 43 inside. Various electronic components 44 are mounted on both main surfaces of the substrate 43. In addition, metal pins 45 for electrical connection are mounted on the lower main surface of the substrate 43. The substrate 43 is sealed with a sealing resin 46 together with the electronic component 44 and the metal pin 45. Although not shown, an electrode is formed on the bottom surface of the resin sealing module 41. Instead of the metal pin 45, electrical connection may be achieved by vias or plating.
　樹脂多層基板７００は、積層体７４の上側主面に形成された凸部７５に、電子部品として、樹脂封止モジュール４１が実装されているため、図１０から分かるように、樹脂封止モジュール４１と、積層体７４の内部に形成された内層電極７との間の距離が大きい。 In the resin multilayer substrate 700, since the resin sealing module 41 is mounted as an electronic component on the convex portion 75 formed on the upper main surface of the laminate 74, as can be seen from FIG. And the distance between the inner layer electrode 7 formed inside the stacked body 74 is large.
　第７実施形態においては、電子部品（樹脂封止モジュール４１）と積層体７４の内部に形成された内層電極７との間の距離が大きいため、電子部品（樹脂封止モジュール４１）と内層電極７との相互干渉が抑制されている。 In the seventh embodiment, since the distance between the electronic component (resin sealing module 41) and the inner layer electrode 7 formed in the laminated body 74 is large, the electronic component (resin sealing module 41) and the inner layer electrode Mutual interference with 7 is suppressed.
　［第８実施形態］
　図１１に、第８実施形態にかかる樹脂多層基板８００を示す。ただし、図１１は、樹脂多層基板８００の断面図である。 [Eighth Embodiment]
FIG. 11 shows a resin multilayer substrate 800 according to the eighth embodiment. However, FIG. 11 is a cross-sectional view of the resin multilayer substrate 800.
　樹脂多層基板８００は、レンズ部品などの光学部品を実装するためのものである。 Resin multilayer substrate 800 is for mounting optical components such as lens components.
　樹脂多層基板８００は、最下層の樹脂層８１と、４層の中間層の樹脂層８２～８５と、最上層の樹脂層８６とが積層された積層体８７を備えている。 The resin multilayer substrate 800 includes a laminate 87 in which a lowermost resin layer 81, four intermediate resin layers 82 to 85, and an uppermost resin layer 86 are laminated.
　樹脂層８１は、厚みの大きな第１部分８１ａと厚みの小さな第２部分８１ｂと厚みの変化する第３部分８１ｃとを備えている。樹脂層８２は、厚みの大きな第１部分８２ａと厚みの小さな第２部分８２ｂと厚みの変化する第３部分８２ｃとを備えている。樹脂層８３は、厚みの大きな第１部分８３ａと厚みの小さな第２部分８３ｂと厚みの変化する第３部分８３ｃとを備えている。樹脂層８４は、厚みの大きな第１部分８４ａと厚みの小さな第２部分８４ｂと厚みの変化する第３部分８４ｃとを備えている。樹脂層８５は、厚みの大きな第１部分８５ａと厚みの小さな第２部分８５ｂと厚みの変化する第３部分８５ｃとを備えている。樹脂層８６は、厚みの大きな第１部分８６ａと厚みの小さな第２部分８６ｂとを備えている。 The resin layer 81 includes a first portion 81a having a large thickness, a second portion 81b having a small thickness, and a third portion 81c having a varying thickness. The resin layer 82 includes a first portion 82a having a large thickness, a second portion 82b having a small thickness, and a third portion 82c having a varying thickness. The resin layer 83 includes a first portion 83a having a large thickness, a second portion 83b having a small thickness, and a third portion 83c having a varying thickness. The resin layer 84 includes a first portion 84a having a large thickness, a second portion 84b having a small thickness, and a third portion 84c having a varying thickness. The resin layer 85 includes a first portion 85a having a large thickness, a second portion 85b having a small thickness, and a third portion 85c having a varying thickness. The resin layer 86 includes a first portion 86a having a large thickness and a second portion 86b having a small thickness.
　樹脂多層基板８００においては、樹脂層８１の第２部分８１ｂと、樹脂層８２の第２部分８２ｂと、樹脂層８３の第２部分８３ｂと、樹脂層８４の第２部分８４ｂと、樹脂層８５の第２部分８５ｂと、樹脂層８６の第２部分８６ｂとが、重ねて配置され、その部分にキャビティ９５が構成されている。キャビティ９５は、積層体８７の下側主面が開口されており、内側壁９５ａと内底面９５ｂとを有している。 In the resin multilayer substrate 800, the second portion 81 b of the resin layer 81, the second portion 82 b of the resin layer 82, the second portion 83 b of the resin layer 83, the second portion 84 b of the resin layer 84, and the resin layer 85. The second portion 85b and the second portion 86b of the resin layer 86 are disposed so as to overlap each other, and a cavity 95 is formed in that portion. The cavity 95 is opened at the lower main surface of the laminated body 87 and has an inner wall 95a and an inner bottom surface 95b.
　積層体８７の上側主面と、キャビティ９５の内底面９５ｂとの間を貫通して、貫通孔９６が形成されている。 A through hole 96 is formed through the upper main surface of the laminated body 87 and the inner bottom surface 95 b of the cavity 95.
　積層体８７の下側主面に、この樹脂多層基板８００を、別の大きな基板などへ実装するために使用する実装用電極９７が形成されている。また、キャビティ９５の内底面９５ｂに、光学部品を実装するための光学部品実装用電極９８が形成されている。 A mounting electrode 97 used for mounting the resin multilayer substrate 800 on another large substrate or the like is formed on the lower main surface of the laminate 87. Further, an optical component mounting electrode 98 for mounting an optical component is formed on the inner bottom surface 95 b of the cavity 95.
　樹脂多層基板８００は、光学部品実装用電極９８を使用して、キャビティ９５の上面もしくは内部に、レンズ部品などの光学部品を実装することができる。すなわち、樹脂多層基板８００は、光学部品用パッケージを構成している。なお、樹脂多層基板８００においては、貫通孔９６を光の通路として使用することができる。 The resin multilayer substrate 800 can mount an optical component such as a lens component on the upper surface or inside of the cavity 95 using the optical component mounting electrode 98. That is, the resin multilayer substrate 800 constitutes an optical component package. In the resin multilayer substrate 800, the through hole 96 can be used as a light path.
　以上、第１実施形態～第８実施形態にかかる樹脂多層基板１００、２００、３００、４００、５００、６００、７００、８００について説明した。しかしながら、本発明が上述した内容に限定されることはなく、発明の趣旨に沿って、種々の変更をなすことができる。 The resin multilayer substrates 100, 200, 300, 400, 500, 600, 700, and 800 according to the first to eighth embodiments have been described above. However, the present invention is not limited to the contents described above, and various modifications can be made in accordance with the spirit of the invention.
　たとえば、上記実施形態においては、積層体を構成する全ての樹脂層が、厚みの大きな部分と厚みの小さな部分とを備えていた。たとえば、樹脂多層基板１００では、積層体４を構成する全ての樹脂層１、２、３が、厚みの大きな第１部分１ａ、２ａ、３ａと厚みの小さな第２部分１ｂ、２ｂ、３ｂとを備えていた。しかしながら、本発明において、積層体を構成する全ての樹脂層が厚みの大きな第１部分と厚みの小さな第２部分とを備えている必要はなく、積層体を構成する少なくとも１つの樹脂層が厚みの大きな第１部分と厚みの小さな第２部分とを備えていればよい。 For example, in the embodiment described above, all the resin layers constituting the laminate were provided with a portion having a large thickness and a portion having a small thickness. For example, in the resin multilayer substrate 100, all the resin layers 1, 2, 3 constituting the laminated body 4 include the first portions 1 a, 2 a, 3 a having a large thickness and the second portions 1 b, 2 b, 3 b having a small thickness. I was prepared. However, in the present invention, it is not necessary that all the resin layers constituting the laminate have the first portion having a large thickness and the second portion having a small thickness, and at least one resin layer constituting the laminate has a thickness. The first portion having a large thickness and the second portion having a small thickness may be provided.
　また、上記実施形態においては、各樹脂多層基板に、キャビティか凸部かの一方を形成した。具体的には、樹脂多層基板１００、２００、３００、４００、５００、６００、８００に、それぞれ、キャビティ５（９５）を形成した。そして、樹脂多層基板７００に、凸部７５を形成した。しかし、１つの樹脂多層基板に、キャビティと凸部との両方を形成してもよい。 Further, in the above embodiment, each of the resin multilayer substrates is formed with either a cavity or a convex portion. Specifically, the cavities 5 (95) were formed in the resin multilayer substrates 100, 200, 300, 400, 500, 600, and 800, respectively. And the convex part 75 was formed in the resin multilayer substrate 700. FIG. However, both the cavity and the convex portion may be formed on one resin multilayer substrate.
　また、樹脂多層基板にキャビティや凸部を形成する場合、その個数や形状などは任意であり、上述した内容には限定されない。 In addition, when forming cavities and projections on the resin multilayer substrate, the number and shape of the cavities and projections are arbitrary and are not limited to the above-described contents.
　また、上述した樹脂多層基板１００の製造方法の一例では、樹脂層１、２、３を積み重ねて一体化させて積層体４を作製した後に、積層体４を所望の形状に成型していた。しかしながら、この方法には限られず、たとえば、樹脂層１、２、３をそれぞれ成型し、それぞれに厚みの大きな第１部分と厚みの小さな第２部分とを設けた後に、樹脂層１、２、３を一体化させて積層体４を作製する方法であってもよい。 Further, in the example of the method for manufacturing the resin multilayer substrate 100 described above, the laminate 4 is formed by stacking and integrating the resin layers 1, 2, and 3, and then molding the laminate 4 into a desired shape. However, the present invention is not limited to this method. For example, after molding the resin layers 1, 2, and 3, respectively, and after providing the first portion having a large thickness and the second portion having a small thickness, the resin layers 1, 2, 3 may be a method of producing the laminate 4 by integrating the three.
１、２、３、３１、３２、３３、３４、５１、５２、５３、５４、５５、７１７２、７３、８１、８２、８３、８４、８５、８６・・・樹脂層
４、３５、５６、７４、８７・・・積層体
１ａ、２ａ、３ａ、３１ａ、３２ａ、３３ａ、３４ａ、５１ａ、５２ａ、５３ａ、５４ａ、５５ａ、７１ａ、７２ａ、７３ａ、８１ａ、８２ａ、８３ａ、８４ａ、８５ａ、８６ａ・・・第１部分
１ｂ、２ｂ、３ｂ、３１ｂ、３２ｂ、３３ｂ、３４ｂ、５１ｂ、５２ｂ、５３ｂ、５４ｂ、５５ｂ、７１ｂ、７２ｂ、７３ｂ、８１ｂ、８２ｂ、８３ｂ、８４ｂ、８５ｂ、８６ｂ・・・第２部分
１ｃ、２ｃ、３ｃ、３１ｃ、３２ｃ、３３ｃ、３４ｃ、５１ｃ、５２ｃ、５３ｃ、５４ｃ、５５ｃ、７２ｃ、７３ｃ、８１ｃ、８２ｃ、８３ｃ、８４ｃ、８５ｃ・・・第３部分
５、９５・・・キャビティ
５ａ、９５ａ・・・内側壁
５ｂ、９５ｂ・・・内底面
６・・・ビア電極
７・・・内層電極
８・・・配線電極
２１・・・半導体集積回路部品（電子部品）
４１・・・樹脂封止モジュール（電子部品）
７５・・・凸部
９８・・・光学部品実装用電極
９６・・・貫通孔 1, 2, 3, 31, 32, 33, 34, 51, 52, 53, 54, 55, 7172, 73, 81, 82, 83, 84, 85, 86 ... resin layers 4, 35, 56, 74, 87 ... Laminated bodies 1a, 2a, 3a, 31a, 32a, 33a, 34a, 51a, 52a, 53a, 54a, 55a, 71a, 72a, 73a, 81a, 82a, 83a, 84a, 85a, 86a .. First part 1b, 2b, 3b, 31b, 32b, 33b, 34b, 51b, 52b, 53b, 54b, 55b, 71b, 72b, 73b, 81b, 82b, 83b, 84b, 85b, 86b, etc. 2 part 1c, 2c, 3c, 31c, 32c, 33c, 34c, 51c, 52c, 53c, 54c, 55c, 72c, 73c, 81c, 82c, 83c, 84c, 85c, etc. Portions 5, 95 ... cavities 5a, 95a ... inner side walls 5b, 95b ... inner bottom surface 6 ... via electrode 7 ... inner layer electrode 8 ... wiring electrode 21 ... semiconductor integrated circuit component (Electronic parts)
41 ... Resin sealing module (electronic component)
75 ... convex part 98 ... electrode 96 for mounting optical parts ... through hole

Claims (18)

  1. 　複数の樹脂層が積層された積層体を備えた樹脂多層基板であって、
    　前記複数の樹脂層の少なくとも１つが、部分的に厚みが異なり、第１部分と、前記第１部分よりも厚みが小さい、第２部分とを備えた、樹脂多層基板。     A resin multilayer substrate including a laminate in which a plurality of resin layers are laminated,
    A resin multilayer substrate comprising at least one of the plurality of resin layers having a first portion and a second portion having a thickness that is partially smaller than the first portion.
  2. 　前記第１部分と前記第２部分とを備えた前記樹脂層が、前記第１部分と前記第２部分との間に、厚みの変化する第３部分を備えた、請求項１に記載された樹脂多層基板。 The said resin layer provided with the said 1st part and the said 2nd part was provided with the 3rd part from which the thickness changes between the said 1st part and the said 2nd part. Resin multilayer substrate.
  3. 　前記積層体に積層された全ての前記樹脂層が、それぞれ、前記第１部分と前記第２部分とを備えた、請求項１または２に記載された樹脂多層基板。 3. The resin multilayer substrate according to claim 1, wherein all the resin layers laminated on the laminate each include the first portion and the second portion.
  4. 　前記積層体が１対の主面を有し、
    　少なくとも一方の前記主面に、内側壁および内底面を有する、少なくとも１つのキャビティが形成され、
    　前記キャビティが形成された部分に、少なくとも１つの前記樹脂層の前記厚みの小さな部分が配置された、請求項１ないし３のいずれか１項に記載された樹脂多層基板。     The laminate has a pair of main surfaces;
    At least one cavity having an inner wall and an inner bottom surface is formed on at least one of the main surfaces;
    4. The resin multilayer substrate according to claim 1, wherein the portion having the small thickness of at least one of the resin layers is disposed in a portion where the cavity is formed. 5.
  5. 　前記積層体の前記キャビティが形成された側の前記主面から、前記キャビティの前記内側壁を経由して、前記キャビティの前記内底面に至る、少なくとも１つの配線電極が形成された、請求項４に記載された樹脂多層基板。 The at least 1 wiring electrode from the said main surface in the side in which the said cavity of the said laminated body was formed to the said inner bottom face of the said cavity via the said inner wall is formed. The resin multilayer substrate described in 1.
  6. 　前記キャビティの前記内側壁の少なくとも一部分に金属層が形成された、請求項４または５に記載された樹脂多層基板。 The resin multilayer substrate according to claim 4 or 5, wherein a metal layer is formed on at least a part of the inner wall of the cavity.
  7. 　前記金属層がノイズの透過を抑制するシールド機能を有する、請求項６に記載された樹脂多層基板。 The resin multilayer substrate according to claim 6, wherein the metal layer has a shielding function for suppressing noise transmission.
  8. 　前記金属層が熱を外部に放熱する放熱機能を有する、請求項６または７に記載された樹脂多層基板。 The resin multilayer substrate according to claim 6 or 7, wherein the metal layer has a heat radiation function of radiating heat to the outside.
  9. 　前記キャビティの前記内底面と、前記積層体の前記キャビティが形成されていない側の前記主面とを繋ぐ、貫通孔が形成された、請求項４ないし８のいずれか１項に記載された樹脂多層基板。 The resin according to any one of claims 4 to 8, wherein a through-hole is formed to connect the inner bottom surface of the cavity and the main surface of the laminated body where the cavity is not formed. Multilayer board.
  10. 　前記キャビティの内部に、電子部品および光学部品の少なくとも一方が収容された、請求項４ないし９のいずれか１項に記載された樹脂多層基板。 The resin multilayer substrate according to any one of claims 4 to 9, wherein at least one of an electronic component and an optical component is accommodated in the cavity.
  11. 　前記積層体が１対の主面を有し、
    　少なくとも一方の前記主面に、少なくとも１つの凸部が形成され、
    　前記凸部が形成された部分に、少なくとも１つの前記樹脂層の前記厚みの大きな部分が配置された、請求項１ないし１０のいずれか１項に記載された樹脂多層基板。     The laminate has a pair of main surfaces;
    At least one convex portion is formed on at least one of the main surfaces,
    The resin multilayer substrate according to any one of claims 1 to 10, wherein the thick portion of at least one of the resin layers is disposed in a portion where the convex portion is formed.
  12. 　前記凸部に電子部品および光学部品の少なくとも一方が実装された、請求項１１に記載された樹脂多層基板。 The resin multilayer substrate according to claim 11, wherein at least one of an electronic component and an optical component is mounted on the convex portion.
  13. 　前記積層体が、最下層の前記樹脂層と、少なくとも１つの中間層の前記樹脂層と、最上層の前記樹脂層が積層されたものからなり、
    　前記最下層、前記中間層、前記最上層の前記樹脂層が、それぞれ、前記第１部分と前記第２部分とを有する場合において、
    　前記中間層の前記樹脂層の前記第１部分の厚みが、前記最下層および前記最上層の前記樹脂層の前記第１部分の厚みよりも小さく、かつ、
    　前記中間層の前記樹脂層の前記第２部分の厚みが、前記最下層および前記最上層の前記樹脂層の前記第２部分の厚みよりも小さい、請求項１ないし１２のいずれか１項に記載された樹脂多層基板。     The laminate comprises a laminate of the lowermost resin layer, at least one intermediate resin layer, and the uppermost resin layer,
    In the case where the lowermost layer, the intermediate layer, and the uppermost resin layer each have the first portion and the second portion,
    The thickness of the first portion of the resin layer of the intermediate layer is smaller than the thickness of the first portion of the lowermost layer and the uppermost resin layer, and
    The thickness of the said 2nd part of the said resin layer of the said intermediate | middle layer is smaller than the thickness of the said 2nd part of the said lowermost layer and the said resin layer of the uppermost layer, The any one of Claims 1 thru | or 12 Resin multilayer substrate.
  14. 　前記樹脂層が熱可塑性樹脂によって作製された、請求項１ないし１３のいずれか１項に記載された樹脂多層基板。 The resin multilayer substrate according to any one of claims 1 to 13, wherein the resin layer is made of a thermoplastic resin.
  15. 　少なくとも１つの前記樹脂層に、両主面間の電気的導通をはかる、少なくとも１つのビア電極が形成された、請求項１ないし１４のいずれか１項に記載された樹脂多層基板。 15. The resin multilayer substrate according to any one of claims 1 to 14, wherein at least one via electrode is formed on at least one of the resin layers so as to electrically connect both main surfaces.
  16. 　前記積層体の前記樹脂層の少なくとも１つの層間に、少なくとも１つの内層電極が形成された、請求項１ないし１５のいずれか１項に記載された樹脂多層基板。 The resin multilayer substrate according to any one of claims 1 to 15, wherein at least one inner layer electrode is formed between at least one of the resin layers of the laminate.
  17. 　請求項４ないし１０のいずれか１項に記載された前記樹脂多層基板を備え、
    　前記キャビティに電子部品を実装することができる、電子部品用パッケージ。     The resin multilayer substrate according to any one of claims 4 to 10, comprising:
    An electronic component package capable of mounting an electronic component in the cavity.
  18. 　請求項４ないし１０のいずれか１項に記載された前記樹脂多層基板を備え、
    　前記キャビティに光学部品を実装することができる、光学部品用パッケージ。     The resin multilayer substrate according to any one of claims 4 to 10, comprising:
    An optical component package capable of mounting an optical component in the cavity.
PCT/JP2019/018177 2018-05-10 2019-05-01 Resin multilayer substrate, package for electronic components, and package for optical components WO2019216292A1 (en)

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JPS63135433A (en) * 1986-11-27 1988-06-07 Hitachi Chem Co Ltd Thermoplastic resin laminate
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JP2016033939A (en) * 2014-07-31 2016-03-10 シーシーエス株式会社 Led mounting substrate and led

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2022097427A (en) * 2020-12-18 2022-06-30 ティーイー コネクティビティ ジャーマニー ゲゼルシャフト ミット ベシュレンクテル ハフツンク Electrical element, preparing method of electrical element for soldering process, and device preparing electrical element for the soldering process

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