WO2019181064A1

WO2019181064A1 - Endoscope

Info

Publication number: WO2019181064A1
Application number: PCT/JP2018/042859
Authority: WO
Inventors: 裕仲摩; 紗依里齋藤
Original assignee: オリンパス株式会社
Priority date: 2018-03-23
Filing date: 2018-11-20
Publication date: 2019-09-26

Abstract

This endoscope 2 has an imaging element 21 provided with a parity addition unit 24 for adding parity to pixel data output from a sensor unit 22 in retrieval order controlled by a retrieval control unit 23, and has a connector unit 12 located closer to the proximal end than a cable 41, the connector unit 12 having: an error detection unit (parity check unit) 26 for detecting errors of the pixel data with the parity added thereto; a pixel rearrangement unit 27 for rearranging the pixel data after error detection that are output from the error detection unit 26; and an interpolation process unit 28 for inputting the pixel data rearranged by the pixel rearrangement unit 27 and performing an interpolation process on the basis of information that is output from the error detection unit 26 and that indicates whether or not an error has been detected.

Description

Endoscope

The present invention relates to an endoscope, and more particularly, to an endoscope including a solid-state image sensor.

An endoscope system including an endoscope that captures an object inside a subject and an image processing device that generates an observation image of the object captured by the endoscope is widely used in the medical field, the industrial field, and the like. It is used.

As an endoscope in such an endoscope system, for example, a CMOS image sensor is adopted as a solid-state imaging device, and an imaging signal (video data) output from the CMOS image sensor is sent to an image processing apparatus at a subsequent stage. Transmitting endoscopes are widely known.

The above-described imaging device such as a CMOS image sensor is generally driven by receiving a predetermined power supply voltage and a control signal from an image processing device via a cable disposed in an insertion portion of an endoscope and in a universal cord. It has come to be. In addition, an image pickup signal (video data) output from the image pickup device is also transferred via this cable toward a connector portion disposed at the base end portion of the insertion portion and further to the image processing apparatus.

Incidentally, in an endoscope system, when an endoscope is used, treatment with an electric knife or the like may be used in the vicinity. Due to the nature of the electric knife, it is inevitable that the electric knife generates high-intensity noise, and disturbance noise may be applied to the cable in the endoscope. That is, when an image signal (video data) output from the image sensor is transferred, there is a possibility that a burst error in which many errors are concentrated in a short time due to disturbance noise from an electric knife or the like may occur.

Corresponding to such transfer errors, various methods are conventionally known for data transfer error detection and error correction.

For example, when transmitting data, a parity for error correction is added to the transmission data for transmission, and the reception side checks the parity and the reception data for errors, or so-called ECC (Error Check and Correct ) Error correction technology using the technology is widely known (Japanese Unexamined Patent Publication No. 2012-11123).

However, although an error correction technique using ECC (Error Check and Correct) as shown in Japanese Patent Application Laid-Open No. 2012-11123 is effective for random errors that occur sporadically and independently, There is a possibility that the burst error in which many errors are concentrated in a short time due to noise from an electric knife or the like cannot be corrected accurately. When a transfer error due to such disturbance noise occurs, there is a problem that the image related to the transferred pixel data is greatly disturbed.

The present invention has been made in view of the above-described circumstances, and an object thereof is to provide an endoscope that reliably transfers pixel data even in a situation where a strong disturbance noise can be applied.

An endoscope according to one aspect of the present invention includes an imaging device disposed at a distal end portion of an insertion portion that is inserted into a subject, and a base that is disposed on a proximal side from the imaging device and connected to the imaging device. An end-side processing unit; a sensor unit that is provided in the image sensor; images a subject, performs photoelectric conversion; and outputs predetermined pixel data; and an order of the pixel data provided in the image sensor and read from the sensor unit A read control unit for instructing the image data, a parity adding unit for adding a predetermined parity to the pixel data output by controlling the read order of the read control unit, and the base end side processing unit. Based on the parity added by the parity adding unit, error detection is performed on the pixel data to which the parity is added and error detection presence / absence information is output, and the error detection is performed. An error detection unit that outputs the pixel data of the pixel, a pixel rearrangement unit that is provided in the base end side processing unit and rearranges the pixel data after error detection output from the error detection unit, and the base end side processing unit An interpolation processing unit that inputs the pixel data rearranged by the pixel rearrangement unit and performs predetermined interpolation processing based on the error detection presence / absence information output from the error detection unit; Are provided.

FIG. 1 is a diagram illustrating a configuration of an endoscope system including an endoscope according to a first embodiment of the present invention. FIG. 2 is a block diagram illustrating an electrical configuration of the endoscope system including the endoscope according to the first embodiment. FIG. 3 is an explanatory diagram illustrating an example in which pixel data output from the image sensor is divided into an odd number and an even number in the endoscope of the first embodiment. FIG. 4 is an explanatory diagram showing an example of parity added to pixel data output from the image sensor in the endoscope of the first embodiment. FIG. 5 is an explanatory diagram illustrating an example of parity deletion and pixel data rearrangement after performing a parity check on pixel data to which parity has been added in the endoscope of the first embodiment. FIG. 6 shows pixel data after parity check and parity removal and rearrangement after the parity check in the endoscope of the first embodiment, and shows the relationship between the pixel data in the block in which an error has occurred and the adjacent pixel data. It is explanatory drawing shown. FIG. 7 shows pixel data after parity removal and rearrangement after parity check in the endoscope of the first embodiment, before and after interpolation of pixel data in a block in which an error has occurred. It is explanatory drawing shown. FIG. 8 is an explanatory diagram illustrating an example of rearrangement of pixel data according to an instruction from the read control unit in the endoscope according to the first embodiment. FIG. 9 is an explanatory diagram illustrating another example of rearrangement of pixel data according to an instruction from the read control unit in the endoscope according to the first embodiment. FIG. 10 is an explanatory diagram illustrating another example of rearrangement of pixel data according to an instruction from the read control unit in the endoscope according to the first embodiment. FIG. 11 is an explanatory diagram showing table data prepared in advance in another example of rearrangement of pixel data in accordance with an instruction from the read control unit in the endoscope of the first embodiment. FIG. 12 is an explanatory diagram showing another example of rearrangement of pixel data according to an instruction from the readout control unit in the endoscope according to the first embodiment, using the table data shown in FIG. is there. FIG. 13 is a timing chart showing the internal operation of the imaging device when the imaging device receives an external synchronization timing control signal in the endoscope according to the second embodiment of the present invention. FIG. 14 is a block diagram illustrating a configuration of an endoscope system including an endoscope according to the third embodiment of the present invention. FIG. 15 is a block diagram showing a configuration of an endoscope system including an endoscope according to the fourth embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

<First Embodiment>
FIG. 1 is a diagram illustrating a configuration of an endoscope system including an endoscope according to a first embodiment of the present invention, and FIG. 2 is a diagram of an endoscope system including an endoscope according to the first embodiment. It is a block diagram which shows an electric structure.

As shown in FIGS. 1 and 2, an endoscope system 1 having an endoscope according to the first embodiment is connected to an endoscope 2 that observes and images a subject, and the endoscope 2. A video processor 3 that inputs the imaging signal and performs predetermined image processing; a light source device 4 that supplies illumination light for illuminating the subject; and a monitor device 5 that displays an observation image corresponding to the imaging signal. Have.

The endoscope 2 includes an elongated insertion portion 6 that is inserted into a body cavity or the like of a subject, and an endoscope operation portion 10 that is disposed on the proximal end side of the insertion portion 6 and is operated by being grasped by an operator. And a universal cord 11 provided with one end portion so as to extend from the side portion of the endoscope operation unit 10.

The insertion portion 6 includes a rigid distal end portion 7 provided on the distal end side, a bendable bending portion 8 provided at the rear end of the distal end portion 7, and a long and flexible portion provided at the rear end of the bending portion 8. And a flexible tube portion 9 having flexibility.

A connector portion 12 is provided on the base end side of the universal cord 11 (that is, the base end side with respect to the image sensor), and the connector portion 12 is connected to the light source device 4. That is, a base (not shown) serving as a connection end of a fluid conduit projecting from the tip of the connector portion 12 and a light guide base (not shown) serving as an illumination light supply end are attached to and detached from the light source device 4. It is designed to be connected freely.

Furthermore, one end of the connection cable 13 is connected to the electrical contact portion provided on the side surface of the connector portion 12. The connection cable 13 includes, for example, a signal line for transmitting an imaging signal from a solid-state imaging device (CMOS image sensor) 21 (see FIG. 2) in the endoscope 2 and a solid-state imaging device (hereinafter, both imaging devices). A control signal line and a power supply line for driving are described, and the connector at the other end is connected to the video processor 3.

As shown in FIG. 2, the endoscope 2 according to the present embodiment includes an objective optical system (not shown) including a lens for receiving a subject image disposed at the distal end portion 7 of the insertion portion 6, and an objective. And an image sensor (CMOS image sensor) 21 disposed on an image forming surface in the optical system.

The endoscope 2 extends from the image sensor 21, and passes through the insertion section 6 and the universal cord 11 (see FIG. 1) from the image sensor 21 to be connected to the connector section 12 (in FIG. 2, the connector section 12. The cable 41 is provided to reach the FPGA 25).

<Image sensor 21>
As described above, the imaging element 21 is a solid-state imaging element configured by a CMOS image sensor in the present embodiment. In the present embodiment, the image sensor 21 includes a sensor unit 22, a read control unit 23, and a parity adding unit 24 described below.

The sensor unit 22 receives a subject image and photoelectrically converts it, and then outputs predetermined pixel data. The read control unit 23 instructs the order of pixel data read from the sensor unit 22. The parity adding unit 24 adds a predetermined parity to the pixel data output with the reading control unit 23 controlling the reading order.

Further, when the reading control unit 23 uses L as a physical pixel array number on the same line of the sensor unit 22, N is an integer of 2 or more, and L mod N is a remainder when L is divided by N, The pixel data of the physical pixel array on the same line with the same L mod 一致 N is collected to form a data group, and the pixel data is read so as to set the array of pixel data with the data group as the minimum unit. An instruction is given to the sensor unit 22.

In the present embodiment, the case where N = 2 is taken as an example. In this embodiment, the physical pixel arrangement on the same line in the sensor unit 22 is rearranged in units of pixels under the control of the reading control unit 23. However, the rearrangement of pixels is not limited to this. Other schemes are also conceivable. For example, it may be an example of rearrangement in line units.

The cable 41 extends from the image sensor 21 and is disposed from the image sensor 21 through the insertion section 6 and the universal cord 11 (see FIG. 1) to the connector section 12 (in FIG. 2, the connector section 12). The cable 41 also includes a drive signal line for transmitting various drive signals (reference clock CLK, various synchronization signals, etc.), a power supply line for supplying a power supply voltage VDD for driving the image sensor 21, and the image signal. It is a cable that includes an imaging signal output line to be transmitted.

<FPGA25>
In the present embodiment, an FPGA 25 that is a proximal end processing unit connected to the image sensor 21 is disposed on the connector unit 12 via the cable 41 from the image sensor 21. In this embodiment, the FPGA 25 is configured by a so-called FPGA (Field Programmable Gate Array), adjusts various timings related to the image sensor 21 under the control of the video processor 3, and receives image data from the image sensor 21. After being input and subjected to predetermined processing, it is sent to an image processing unit in the video processor 3.

Further, in the present embodiment, the FPGA 25 forms a parity check unit 26, a pixel rearrangement unit 27, and an interpolation processing unit 28, which will be described in detail below.

The parity check unit 26 performs error detection of the pixel data to which the parity is added based on the parity added by the parity addition unit 24 in the image sensor 21 and outputs error detection presence / absence information, and also The pixel data after detection is output.

The pixel rearrangement unit 27 rearranges the pixel data after parity check (error detection) output from the parity check unit 26 into the original array.

The interpolation processing unit 28 inputs the pixel data rearranged by the pixel rearrangement unit 27 and performs predetermined interpolation processing based on the error detection presence / absence information output from the parity check unit 26.

On the other hand, the endoscope system 1 of the present embodiment includes a video processor 3 that is connected to the endoscope 2 and that inputs the imaging signal and performs predetermined image processing.

<Operation of this embodiment>
Hereinafter, the operation of error detection and error correction in the endoscope 2 of the present embodiment configured as described above will be described.

FIG. 3 is an explanatory diagram illustrating an example in which pixel data output from the image sensor is divided into an odd number and an even number in the endoscope of the first embodiment. FIG. 4 is an explanatory diagram showing an example of parity added to pixel data output from the image sensor in the endoscope of the first embodiment, and FIG. 5 is an endoscope of the first embodiment. It is explanatory drawing which showed an example of the parity deletion and pixel data rearrangement after carrying out a parity check with respect to the pixel data to which the parity was added in the mirror.

In the present embodiment, when the pixel data is output from the sensor unit 22 of the image sensor 21, the sensor unit 22 controls the readout control unit 23 to set the data of all 400 pixels as an odd number as shown in FIG. Divide even numbers and transfer.

In the description of the rearrangement of pixel data shown below, an example is given in which data of all 400 pixels is transferred, and an example in which the data is divided into blocks every 100 pixels is given. However, the technical idea of the present invention is The present invention is not limited to such pixel data transfer and block division methods, but can be applied to transfer of pixel data of other pixel numbers or block division.

As described above, in this embodiment, under the control of the read control unit 23, the data of all 400 pixels are rearranged into odd numbers and even numbers from the sensor unit 22, and transferred by the parity adding unit 24. When the transferred pixel data is received, the parity adding unit 24 adds a parity for every 100 pixels, for example, as shown in FIG.

Specifically, in this embodiment, the parity adding unit 24 divides the data of 400 pixels into four blocks for every 100 pixels (odd block A, odd block B, even block C, even block D), respectively. Two parities are added to the pixel group of each block and output toward the subsequent stage.

The pixel data group to which the parity is added, which is output from the parity adding unit 24, is input via the cable 41 to the parity check unit 26 in the FPGA 25 which is the base-end processing unit.

In the parity check unit 26, the pixel data group to which the above-described parity is added is input, a predetermined parity check is executed, the parity is deleted, and then output to the pixel rearrangement unit 27.

At the same time, the parity check unit 26 transmits error detection presence / absence information and error position information to the interpolation processing unit 28.

Here, for example, as shown in FIG. 5, it is assumed that an error has occurred in the transfer of pixel data due to disturbance noise or the like in block A (see x in the figure). At this time, the parity check unit 26 uses the pixel data relating to the block A (the block A has 100 pixels at this time, the data for all 100 pixels) as an interpolation candidate having an error, and the information is used as an interpolation processing unit. Send to 28.

On the other hand, in the pixel rearrangement unit 27, the parity check (error detection) is executed in the parity check unit 26, and the pixel data group from which the parity is deleted is rearranged again to the original array as shown in FIG. To the subsequent interpolation processing unit 28.

<Processing in the interpolation processing unit>
Next, the interpolation processing in the interpolation processing unit 28 when the parity check unit 26 detects an interpolation candidate having an error will be described.

FIG. 6 shows pixel data after parity check and parity removal and rearrangement after the parity check in the endoscope of the first embodiment, and shows the relationship between the pixel data in the block in which an error has occurred and the adjacent pixel data. FIG. 7 is a diagram illustrating pixel data after parity check and parity deletion and rearrangement after parity check in the endoscope of the first embodiment, and interpolation of pixel data in a block in which an error has occurred It is explanatory drawing which showed the mode before and after interpolation.

The interpolation processing unit 28 inputs the pixel data rearranged in the original array in the pixel rearrangement unit 27 and acquires the parity check result (error detection presence / absence information and error position information) from the parity check unit 26.

Here, the interpolation processing unit 28 executes the following processing based on the parity check result from the parity check unit 26.

That is, the interpolation processing unit 28 sets two adjacent pixel data (FIG. 5) after the output values of the pixel data related to the block that is an interpolation candidate in which an error has occurred (block A in the above example) are rearranged. And the average value of the output values of the pixel data on both sides of the pixel data determined as the interpolation candidate in FIG. Note that the pixel data on both sides of the pixel data set as the interpolation candidate is pixel data related to a block that is considered to have no error.

Here, as illustrated in FIG. 6, the interpolation processing unit 28 calculates the output value of the pixel data related to the block A that is an interpolation candidate in which an error has occurred, and the output value of two adjacent pixel data after being rearranged. When it is determined that the deviation from the average value is small, the interpolation processing unit 28 does not execute the interpolation process and outputs it directly to the subsequent stage.

On the other hand, as illustrated in FIG. 7, the interpolation processing unit 28 calculates the output value of the pixel data related to the block A which is an interpolation candidate in which an error has occurred, and the output value of two adjacent pixel data after being rearranged. When it is determined that the deviation from the average value is large, the interpolation processing unit 28 performs an interpolation process.

That is, at this time, the interpolation processing unit 28 replaces the output value of the pixel data related to the block A, which is an interpolation candidate in which an error has occurred, with the average value of the output values of the two adjacent pixel data after the rearrangement.

As described above, the endoscope 2 of the present embodiment has the following features. That is, first, in the image sensor 21 provided at the distal end portion 7, pixel data in which the pixel arrangement is rearranged according to a predetermined rule is divided into a plurality of pixel data groups, and a predetermined pixel data group is assigned to each block. Is added to the base end side via the cable.

On the other hand, in the FPGA 25 on the base end side via the cable, the received pixel data is subjected to a parity check for each block, and the pixel data group of each block is rearranged to the original pixel arrangement again. When the parity check unit 26 detects an error, the pixel data related to the block in which the error is detected is regarded as an interpolation candidate having an error.

Thereafter, the interpolation processing unit 28 compares the output value of the pixel data set as the interpolation candidate with the output value of the adjacent pixel data after being rearranged in the original array, and performs interpolation according to the value. The candidate pixel data is replaced with the average value of the adjacent pixel data.

As described above, the endoscope 2 according to the present embodiment transmits the pixel data after rearranging the pixel data in the image sensor 21 in advance so as not to continuously transmit the pixels in which the error has occurred. On the other hand, even under a situation where a strong disturbance noise from an electric knife or the like is applied, the error is accurately detected and corrected accurately, so that the pixel data can be transferred accurately.

<About sorting examples>
As described above, the first embodiment is characterized in that the pixel data output from the sensor unit 22 is rearranged in accordance with an instruction from the readout control unit 23. Hereinafter, an example of this rearrangement will be described.

8 to 12 are explanatory views respectively showing examples of rearrangement of pixel data in accordance with an instruction from the read control unit in the endoscope of the first embodiment.

As described above, in the present embodiment, as shown in FIG. 8, the rearrangement is performed by the odd-numbered pixels and the even-numbered pixels in units of pixels with respect to the physical pixel arrangement on the same line in the sensor unit 22.

On the other hand, as shown in FIG. 9, it may be rearranged for each calculated value of MOD4 (the remainder when the physical pixel number on the same line in the sensor unit 22 is divided by 4).

In addition, as shown in FIG. 10, when the physical pixel arrangement on the same line in the sensor unit 22 is rearranged once with the odd-numbered pixel and the even-numbered pixel, the transfer is performed from the end when the transfer is performed. May be performed.

Further, the physical pixel rearrangement order on the same line in the sensor unit 22 is stored in advance in a table as shown in FIG. 11 (FIG. 11 shows the transfer order for the physical pixel arrangement. The arrangement of the pixels corresponds to each other), and they may be rearranged and transferred as shown in FIG. 12 according to the order.

Here, the requirements of the “reordering rules” in the present embodiment are as follows. In other words, even if there is an error in the pixel data continuously at the time of data transfer, a rule that makes it possible to disperse the continuous error data into independent error data when the original physical array is restored. It is important that Such a rule can be arbitrarily set by using a conversion table storing a correspondence relationship between a physical arrangement (pixel data number) and a transfer order array (data transmission order).

By the way, conventionally, an image sensor capable of controlling the vertical synchronization timing (V synchronization control) in order to synchronize the image sensor disposed at the distal end portion of the insertion portion with the endoscope system is known ( Japanese Patent No. 5356630).

However, such an image sensor may erroneously recognize the disturbance noise as V-synchronous control when disturbance noise is applied. If it is erroneously recognized, the synchronization timing between the image sensor and the endoscope system is shifted, and there is a detrimental effect such as a deviation of the displayed image.

The following is an example to resolve such a problem. That is, by setting a dead zone that does not accept V synchronization control in the image sensor, when V synchronization control is performed in the dead zone, it is invalidated (the image sensor does not accept). Here, the start / end timing of the dead zone can be set in units of rows and clocks, and the dead zone can be switched between valid / invalid.

Here, it is necessary to perform V synchronization control in the following two cases. That is,
(1) When the system and the image sensor are operating at the output of their respective clock generators, and when it is desired to correct for each field that the synchronization timing slightly shifts in each field due to the deviation between them, (2) At startup, Or, when the disturbance timing is applied, the synchronization timing of the image sensor is greatly deviated from the synchronization timing of the system, and the timing is to be corrected.

Mainly, in the case of (1) above, since the maximum deviation amount in one field is determined by design, it is determined in which range the synchronization timing is controlled. For this reason, it is possible to reduce the probability of malfunction due to disturbance by accepting synchronization timing control only in that range and ignoring the synchronization timing control when the dead zone is set in other ranges. .

On the other hand, in the case of (2), if the dead zone is valid, the synchronization timing control cannot be performed. However, as shown in FIG. 13, the synchronization timing is set in a state where the dead zone setting of the image sensor is once invalidated. After performing the control and controlling to a desired timing, the dead zone may be made effective again.

By the way, in general, an endoscope can be connected to a plurality of types of processors. Here, conventionally, an endoscope performs the same operation regardless of the type of a connection destination processor.

In such a situation, in order to maintain compatibility and improve image quality, an endoscope capable of switching the operation of the endoscope according to the connected processor has been desired.

FIG. 14 is an example of an endoscope system 101 having an endoscope 102 that solves such a problem. As shown in FIG. 14, the endoscope 102 includes a CMOS image sensor 121 at the distal end, and an image processing unit 113 and a control unit 114 at the connector unit 112.

The endoscope 102 can be connected to an NTSC video processor 103A and a PAL video processor 103B. Here, it is known that the NTSC video processor and the PAL video processor have different frame rates and different driving frequencies of clocks supplied from the processors. On the other hand, a CMOS image sensor mounted on the endoscope 102 operates by setting an operation mode including a frame rate as a register.

Under such circumstances, the endoscope 102 can change the operation mode according to the difference in the broadcast standard to which the video processor to be connected complies. That is, the endoscope 102 determines whether the video processor to be connected is the NTSC video processor 103A or the PAL video processor 103B, and based on the determination result, the image sensor 121 is controlled by the control signal. These registers are set to switch between NTSC and PAL. At the same time, the endoscope 102 switches the control method of the image processing unit 113 of the connector unit 112 between NTSC and PAL.

Furthermore, the endoscope 102 sets the register of the image sensor 121 by a control signal based on whether the video processor to be connected is the NTSC video processor 103A or the PAL video processor 103B, and It is designed to use by switching the rate. Further, the frame rate for driving the image sensor is switched by changing the timing of the synchronization signal.

Further, the endoscope 102 is not limited to switching between NTSC and PAL, but can also switch the driving mode of the image sensor, such as pixel addition, according to the connected video processor. This pixel addition may be performed by the image sensor 121 or by the FPGA in the connector unit 112.

Here, if pixels are added in the image sensor 121, the readout time of the image sensor can be shortened. As a result, the frame rate can be improved, the vertical blanking period becomes longer, and the light emission possible period of the PWM light source desired to emit light during vertical blanking becomes longer and brighter.

On the other hand, if pixel addition is performed in the FPGA of the connector unit, the dynamic range and AD resolution can be improved in a pseudo manner as compared with pixel addition in the image sensor.

By the way, the image output from the image sensor may require image processing such as pixel defects. When connected to a conventional processor, image processing that is not installed in the conventional processor must be performed in the endoscope. When the endoscope is connected to the new processor, optimal image processing can be performed by the processor. Therefore, the endoscope may output an image without processing to the processor without performing image processing. Image processing performed in an endoscope when a conventional processor is connected may be equivalent to the image processing installed in the new processor, and the endoscope is simpler because it uses fewer resources than the processor. It may be a typical image processing.

By the way, in general, a CMOS image sensor has a register and a counter inside, unlike a CCD image sensor. In general, after initial reset at the time of startup, necessary register settings are performed from the outside to drive.

Also, the image sensor may be reset unintentionally due to static electricity, electric knife, or other disturbance noise, or the internal register may become abnormal, causing image abnormality (image loss).

Conventionally, for such problems,
(1) If the image sensor can be restarted, restart the image sensor. (2) If the image sensor cannot be restarted, stop driving the image sensor (power supply, clock, control signal). An endoscope was desired.

FIG. 15 is an example of an endoscope system 201 having an endoscope 202 that solves such a problem. As shown in FIG. 15, the endoscope 202 has a CMOS image sensor 221 disposed at the distal end portion, and an FPGA 225 and a drive circuit 247 are disposed in the connector portion 212.

In the FPGA 225, a video receiving circuit 241, an image processing circuit 242, a video transmitting circuit 43, a communication control circuit 244, a drive control circuit 245, and an operation state monitor 246 are formed.

In addition, the connector unit 212 in the endoscope 202 is connected to the video processor 203, and the endoscope 202 is supplied with power, a clock, and the like from the video processor 203, while a video signal from the endoscope 202 toward the video processor 203. Is transmitted.

The endoscope 202 having such a configuration has the following characteristics. That is,
CMOS image sensor CMOS image sensor register that can be set by communication from outside The CMOS image sensor has a means for externally monitoring the operation status of the CMOS image sensor. The CMOS image sensor has a means for externally controlling driving (power supply, clock, control signal).

More specifically, the endoscope 202 includes:
(1) Monitor the operation status of the image sensor. The method may be any of the following. That is,
* Check if the video signal from the image sensor is received a: Check that the header and footer information included in the video signal can be read (correct) b: Check that no decoding error such as 8B10B has occurred Check c: Check that the CDR of the video receiving circuit is locked d: Brightness information of the video signal (Abnormal value such as OB value is appropriate or stuck at 0 or the upper limit of AD) * Check the power consumption (current and / or voltage) of the image sensor. A; The power consumption differs between the driving state and the standby state. Monitor the register status a: Periodically read out the register of the operation mode by communication and check whether it indicates the standby status or the operation status b: Video signal block Check whether the register of the operation mode embedded in the ranking indicates the standby state or the operation.

(2) It is determined that the image sensor is not operating normally. That is,
* Considering the case where the video signal and register are not correctly confirmed due to disturbance noise, etc., it is not judged only by detecting an abnormal state once, and it is not operating only when the abnormality continues for several fields. to decide.

(3) Restart the image sensor. That is,
* Perform the software reset first and set the necessary registers. Thereafter, the process returns to (1). Immediately after static electricity is applied, or when an electrosurgical knife is being applied, the image sensor must operate normally because it may succeed in the second and subsequent restarts even if the restart is not successful once. Repeat steps (1) to (3).

(4) Stop driving the image sensor. That is,
* If it does not recover even after a certain number of restarts, it is determined that restart is not possible and the image sensor drive (power supply, clock, control signal) is stopped. At this time, an error notification may be made to the user that the state is abnormal.

According to the present invention, it is possible to provide an endoscope that reliably transfers pixel data even under a situation where a strong disturbance noise can be applied.

The present invention is not limited to the above-described embodiment, and various changes and modifications can be made without departing from the scope of the present invention.

This application is filed on the basis of priority claim of Japanese Patent Application No. 2018-57100 filed in Japan on March 23, 2018. The above disclosure is included in the present specification and claims. Shall be quoted.

Claims

An imaging device disposed at the distal end of the insertion portion to be inserted into the subject;
A proximal-side processing unit disposed on the proximal side from the imaging device and connected to the imaging device;
A sensor unit that is provided in the image sensor, images a subject, performs photoelectric conversion, and outputs predetermined pixel data;
A readout control unit that is provided in the imaging device and instructs the order of the pixel data to be read from the sensor unit;
A parity adding unit that is provided in the image sensor and adds a predetermined parity to the pixel data that is output after the reading order is controlled by the reading control unit;
Based on the parity added by the parity adding unit provided in the base end side processing unit, error detection of the pixel data to which the parity is added is performed and error detection presence / absence information is output, and the error An error detection unit that outputs pixel data after detection;
A pixel rearrangement unit that is provided in the proximal side processing unit and rearranges pixel data after error detection output from the error detection unit;
A predetermined interpolation process is performed based on the presence / absence information of the error detection output from the error detection unit and the pixel data rearranged by the pixel rearrangement unit provided in the base end side processing unit An interpolation processing unit for performing
An endoscope comprising:
The read control unit collects the pixel data of physical pixel array numbers having the same L mod N to form a data group, and sets the pixel data array so that the data group is the minimum unit. The endoscope according to claim 1, wherein an instruction is given to the sensor unit to read data.
However, L is a physical pixel array number of the sensor unit, N is an integer of 2 or more, and L mod N is a remainder when L is divided by N.
The reading control unit reads the pixel data so as to convert and set the pixel array with a predetermined regularity that does not include adjacent pixels with respect to the physical pixel array number of the sensor unit. The endoscope according to claim 1, wherein an instruction is given to a unit.
The parity adding unit provides parity for each of a plurality of pixel data,
When the error exceeds a predetermined threshold based on the error detection presence / absence information output from the error detection unit, the interpolation processing unit has a physical pixel array adjacent to the data group in which the error has occurred. The endoscope according to claim 2, wherein error pixels are corrected using the pixel data obtained.