WO2019168537A1

WO2019168537A1 - Magnetoelectric spin orbit logic device with field biasing

Info

Publication number: WO2019168537A1
Application number: PCT/US2018/020522
Authority: WO
Inventors: Sasikanth Manipatruni; Dmitri E. Nikonov; Ian A. Young
Original assignee: Intel Corporation
Priority date: 2018-03-01
Filing date: 2018-03-01
Publication date: 2019-09-06

Abstract

An apparatus is provided which comprises: a magnet structure including a first magnet (e.g., ferromagnet/paramagnet), a second magnet (e.g., ferromagnet/paramagnet), and a coupling structure (e.g., Ru, Ir, Cu, Os, Hs, Fe, etc.) between the first and second magnets. The apparatus further includes a first structure comprising spin orbit material (e.g., β-Ta, Ta, β-W, W, Pt, Cu doped with elements including on of Iridium, Bismuth or elements of 3d, 4d, 5d, 4f, and 5f periodic groups, Ti, S, W, Mo, Se, B, Sb, Re, La, C, P, La, As, Sc, Bi, Ga, Al, Y, In, Ce, Pr, Nd, F, Ir, Mn, Pd, or Fe), wherein a portion of the first structure is adjacent to the magnet structure. The apparatus also includes a second structure comprising magnetoelectric material; and a conductor coupled to at least a portion of the first and second structures.

Description

MAGNETOELECTRIC SPIN ORBIT LOGIC DEVICE WITH FIELD BIASING

BACKGROUND

[0001] Spintronics is the study of intrinsic spin of the electron and its associated magnetic moment in solid-state devices. Spintronic logic are integrated circuit devices that use a physical variable of magnetization or spin as a computation variable. Such variables can be non-volatile (e.g., preserving a computation state when the power to an integrated circuit is switched off). Non-volatile logic can improve the power and computational efficiency by allowing architects to put a processor to un-powered sleep states more often and therefore reduce energy consumption. Existing spintronic logic generally suffer from high energy and relatively long switching times.

[0002] For example, large write current (e.g., greater than 100 mA/bit) and voltage

(e.g., greater than 0.7 V) are needed to switch a magnet (i.e., to write data to the magnet) in Magnetic Tunnel Junctions (MTJs). Existing Magnetic Random Access Memory (MRAM) based on MTJs also suffer from high write error rates (WERs) or low speed switching. For example, to achieve lower WERs, switching time is slowed down which degrades the performance of the MRAM. MTJ based MRAMs also suffer from reliability issues due to tunneling current in the spin filtering tunneling dielectric of the MTJs e.g., magnesium oxide (MgO).

BRIEF DESCRIPTION OF THE DRAWINGS

[0003] The embodiments of the disclosure will be understood more fully from the detailed description given below and from the accompanying drawings of various embodiments of the disclosure, which, however, should not be taken to limit the disclosure to the specific embodiments, but are for explanation and understanding only.

[0004] Fig. 1A illustrates magnetization response to applied magnetic field for a ferromagnet.

[0005] Fig. IB illustrates magnetization response to applied magnetic field for a paramagnet.

[0006] Fig. 1C illustrates magnetization response to applied voltage field for a paramagnet connected to a magnetoelectric layer.

[0007] Fig. 2A illustrates a magnetoelectric spin orbit (MESO) logic with field biasing, according to some embodiments of the disclosure. [0008] Fig. 2B illustrates a spin orbit material stack at the input of an interconnect, according to some embodiments of the disclosure.

[0009] Fig. 3 illustrates a MESO logic with distributed magnets are the input and output, according to some embodiments of the disclosure.

[0010] Fig. 4A illustrates a MESO logic operable as a repeater, according to some embodiments.

[0011] Fig. 4B illustrates a MESO logic operable as an inverter, according to some embodiments.

[0012] Fig. 5 illustrates a top view of a layout of the MESO logic of Fig. 2A, according to some embodiments.

[0013] Fig. 6 illustrates a majority gate using MESO logic devices of Fig. 2A, according to some embodiments.

[0014] Fig. 7 illustrates a flowchart of a method for forming a MESO logic device, according to some embodiments of the disclosure.

[0015] Fig. 8 illustrates a smart device or a computer system or a SoC (System-on-

Chip) with MESO logic, according to some embodiments.

DETAILED DESCRIPTION

[0016] The Magnetoelectric (ME) effect has the ability to manipulate the

magnetization (and the associated spin of electrons in the material) by an applied electric field. Since an estimated energy dissipation per unit area per magnet switching event through the ME effect is an order of magnitude smaller than with spin-transfer torque (STT) effect, ME materials have the capability for next-generation memory and logic applications.

[0017] When magnets with high magnetostrictive coefficients are used (e.g., materials such as FeGa class of ferromagnets that have changing magnetic anisotropy in response to strain) in conjunction with magnetoelectric materials that exhibit piezoelectric effect, the magnetizations for the magnets switches by 90 degrees relative to the magnets easy or preferred axis upon application of a bias. Detecting change in magnetization of a magnet when it switches by 90 degrees is generally more cumbersome than detecting change in magnetization of a magnet when it switches by 180 degrees instead. This is because, the direction of corresponding current generated by switching of magnets by 90 degrees may not change enough to cause detection of magnetization switching. As such, detecting logic states of the magnet when it switches by 90 degrees may use additional structural and/or fabrication methods. For example, the magnets may need to orient or be canted by 45 degrees relative to a length of a conductor coupled to the magnets. In some embodiments, a magnet structure is described that produces a cancelling field for the exchange anisotropy. For example, the magnet structure generates a dipole field to counter the coercivity modulation. This dipole field is also referred to as field biasing. As such, magnetoelectric materials with piezoelectric effect can be used for Magnetoelectric Spin Orbit (MESO) Logic.

[0018] The MESO Logic of various embodiments is a combination of various physical phenomena for spin-to-charge and charge-to-spin conversion, where the MESO logic comprises a magnet structure including: a first magnet, a second magnet, and a coupling structure between the first and second magnets. In various embodiments, the first and/or second magnets have low magnetostrictive coefficients. In various embodiments, the magnet structure forms a synthetic ferromagnet by having a certain thickness for the coupling layer. As such, the magnetizations of the first and second magnets align with reference to one another. In some embodiments, the MESO logic comprises a first structure comprising spin orbit material, wherein a portion of the first structure is adjacent to the magnet structure. In some embodiments, the MESO logic comprises a second structure comprising piezo-electric material. In some embodiments, the MESO logic comprises a conductor coupled to at least a portion of the first and second structures.

[0019] In some embodiments, spin-to-charge conversion is achieved via one or more layers with the inverse Rashba-Edelstein effect (or spin Hall effect) wherein a spin current injected from an input magnet produces a charge current, and wherein the input magnet comprises the first magnet, second magnet, and the coupling structure in between the first and second magnets. The coupling structure may comprises materials such as Ru, Os, Hs, Fe, and other transition metals from the platinum group of the periodic table. The coupling structure also provides the effect of synthetic ferromagnet because it is sandwiched between the two magnets. The sign of the charge current is determined by the direction of the injected spin and thus of magnetization of the input magnet. In some embodiments, charge-to-spin conversion is achieved via the magnetoelectric effect which is a combination of the piezoelectric effect and the magnetostrictive (MS) effect.

[0020] In the piezoelectric effect, the charge current produces a voltage on a capacitor, comprising a layer with piezoelectric effect, and creating strain in the piezoelectric material. This strain creates stress in the magnetic layer. In the magnetostrictive effect, stress changes the dependence of energy on the magnetization direction, leading to switching magnetization in the magnet towards the preferred axis. In some embodiments, magnetic response of a magnet is according to a bias field (or biasing field) from the magnetoelectric effect and from a dipole field from the magnet, wherein the dipole field is used to counter the coercivity modulation.

[0021] There are many technical effects of various embodiments. For example, high speed operation of the logic (e.g., 100 picoseconds (ps)) is achieved via the use of magnetoelectric switching operating on semi-insulating and/or insulating nanomagnets. In some examples, switching energy is reduced (e.g., 1-10 attojoules (aJ)) because the current needs to be“on” for a shorter time (e.g., approximately 3 ps) in order to charge the capacitor. In some examples, in contrast to the spin current, charge current does not attenuate when it flows through an interconnect. The MESO logic of various embodiments allow the use of piezoelectric materials with synthetic magnets. The magnetization of these synthetic magnets switch by about 180 degrees, that allows for east detection of magnetic states. Other technical effects will be evident from various embodiments and figures.

[0022] In the following description, numerous details are discussed to provide a more thorough explanation of embodiments of the present disclosure. It will be apparent, however, to one skilled in the art, that embodiments of the present disclosure may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form, rather than in detail, in order to avoid obscuring embodiments of the present disclosure.

[0023] Note that in the corresponding drawings of the embodiments, signals are represented with lines. Some lines may be thicker, to indicate more constituent signal paths, and/or have arrows at one or more ends, to indicate primary information flow direction. Such indications are not intended to be limiting. Rather, the lines are used in connection with one or more exemplary embodiments to facilitate easier understanding of a circuit or a logical unit. Any represented signal, as dictated by design needs or preferences, may actually comprise one or more signals that may travel in either direction and may be implemented with any suitable type of signal scheme.

[0024] Throughout the specification, and in the claims, the term "connected" means a direct connection, such as electrical, mechanical, or magnetic connection between the things that are connected, without any intermediary devices.

[0025] Here, the term“preferred” or“easy” axis generally refers to a pair of magnetization directions of a magnet which result in the lowest energy.

[0026] In some embodiments at least two contributions to the energy of the magnet are relevant. The shape anisotropy (aka“demagnetization”) is the energy determined by the dipole interaction between various parts of the nanomagnets. Typically the longest direction of the magnet corresponds to the easy axis of this contribution. The strain induced anisotropy is determined by the stress applied to the magnet. When stress is applied to the magnet via the piezoelectric/magnetostrictive effects, the magnetization easy axis switches typically by 90 degrees. Therefore the sum of two contributions is being switched between the configuration with the easy axis along the long axis of the magnet and the configuration with the easy axis perpendicular to the long axis (and in the plane of the chip).

[0027] The term "coupled" means a direct or indirect connection, such as a direct electrical, mechanical, or magnetic connection between the things that are connected or an indirect connection, through one or more passive or active intermediary devices.

[0028] The terms“free” or“unfixed” here with reference to a magnet generally refers to a magnet whose magnetization direction can change along its easy axis upon application of an external field or force (e.g., Oersted field, spin torque, etc.). Conversely, the term“fixed” or“pinned” here with reference to a magnet refers to a magnet whose magnetization direction is pinned or fixed along an axis and which may not change due to application of an external field (e.g., electrical field, Oersted field, spin torque,).

[0029] Here, perpendicularly magnetized generally magnet (or perpendicular magnet, or magnet with perpendicular magnetic anisotropy (PMA)) refers to a magnet having a magnetization which is substantially perpendicular to a plane of the magnet or a device. For example, a magnet with a magnetization which is in a z-direction in a range of 90 (or 270) degrees +/- 20 degrees relative to an x-y plane of a device.

[0030] Here, an in-plane magnet generally refers to a magnet that has magnetization in a direction substantially along the plane of the magnet. For example, a magnet with a magnetization which is in an x or y direction and is in a range of 0 (or 180 degrees) +/- 20 degrees relative to an x-y plane of a device.

[0031] Here, the term“canted” generally refers to an orientation of a structure such as a magnet or an orientation of a magnetization of a magnet relative to a reference axis. For example, a magnet is oriented along an x-y plane at an angle between 0 and 90 degrees (e.g., around 45 degrees) relative to an x-axis or relative to a y-axis.

[0032] The term“device” may generally refer to an apparatus according to the context of the usage of that term. For example, a device may refer to a stack of layers or structures, a single structure or layer, a connection of various structures having active and/or passive elements, etc. Generally a device is a three dimensional structure with a plane along the x-y direction and a height along the z direction of an x-y-z Cartesian coordinate system. The plane of the device may also be the plane of an apparatus which comprises the device. [0033] Throughout the specification, and in the claims, the term "connected" means a direct connection, such as electrical, mechanical, or magnetic connection between the things that are connected, without any intermediary devices.

[0034] The term "coupled" means a direct or indirect connection, such as a direct electrical, mechanical, or magnetic connection between the things that are connected or an indirect connection, through one or more passive or active intermediary devices.

[0035] The term“adjacent” here generally refers to a position of a thing being next to

(e.g., immediately next to or close to with one or more things between them) or adjoining another thing (e.g., abutting it).

[0036] The term "circuit" or“module” may refer to one or more passive and/or active components that are arranged to cooperate with one another to provide a desired function.

[0037] The term "signal" may refer to at least one current signal, voltage signal, magnetic signal, or data/clock signal. The meaning of "a," "an," and "the" include plural references. The meaning of "in" includes "in" and "on."

[0038] The term“scaling” generally refers to converting a design (schematic and layout) from one process technology to another process technology and subsequently being reduced in layout area. The term“scaling” generally also refers to downsizing layout and devices within the same technology node. The term“scaling” may also refer to adjusting (e.g., slowing down or speeding up - i.e. scaling down, or scaling up respectively) of a signal frequency relative to another parameter, for example, power supply level. The terms “substantially,”“close,”“approximately,”“near,” and“about,” generally refer to being within +/- 10% of a target value.

[0039] Unless otherwise specified the use of the ordinal adjectives“first,”“second,” and“third,” etc., to describe a common object, merely indicate that different instances of like objects are being referred to, and are not intended to imply that the objects so described must be in a given sequence, either temporally, spatially, in ranking or in any other manner.

[0040] For the purposes of the present disclosure, phrases“A and/or B” and“A or B” mean (A), (B), or (A and B). For the purposes of the present disclosure, the phrase“A, B, and/or C” means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B and C).

[0041] The terms“left,”“right,”“front,”“back,”“top,”“bottom,”“over,”“under,” and the like in the description and in the claims, if any, are used for descriptive purposes and not necessarily for describing permanent relative positions.

[0042] For the purposes of present disclosure, the terms“spin” and“magnetic moment” are used equivalently. More rigorously, the direction of the spin is opposite to that of the magnetic moment, and the charge of the particle is negative (such as in the case of electron).

[0043] It is pointed out that those elements of the figures having the same reference numbers (or names) as the elements of any other figure can operate or function in any manner similar to that described, but are not limited to such.

[0044] For purposes of the embodiments, the transistors in various circuits and logic blocks described here are metal oxide semiconductor (MOS) transistors or their derivatives, where the MOS transistors include drain, source, gate, and bulk terminals. The transistors and/or the MOS transistor derivatives also include Tri-Gate and FinFET transistors, Gate All Around Cylindrical Transistors, Tunneling FET (TFET), Square Wire, or Rectangular Ribbon Transistors, ferroelectric FET (FeFETs), or other devices implementing transistor functionality like carbon nanotubes or spintronic devices. MOSFET symmetrical source and drain terminals i.e., are identical terminals and are interchangeably used here. A TFET device, on the other hand, has asymmetric Source and Drain terminals. Those skilled in the art will appreciate that other transistors, for example, Bi-polar junction transistors— BJT PNP/NPN, BiCMOS, CMOS, eFET, etc., may be used without departing from the scope of the disclosure. The term“MN” indicates an n-type transistor (e.g., NMOS, NPN BJT, etc.) and the term“MP” indicates a p-type transistor (e.g., PMOS, PNP BJT, etc.).

[0045] Fig. 1A illustrates a magnetization hysteresis plot 100 for ferromagnet (FM)

101. The x-axis of plot 100 is magnetic field Ή’ while the y-axis is magnetization‘m’. For ferromagnet (FM) 101, the relationship between Ή’ and‘m’ is not linear and results in a hysteresis loop as shown by curves 102 and 103. The maximum and minimum magnetic field regions of the hysteresis loop correspond to saturated magnetization configurations 104 and 106, respectively. In saturated magnetization configurations 104 and 106, FM 101 has stable magnetizations. In the zero magnetic field region 105 of the hysteresis loop, FM 101 does not have a definite value of magnetization, but rather depends on the history of applied magnetic fields. For example, the magnetization of FM 101 in configuration 105 can be either in the +X direction or the -x direction for an in-plane FM. As such, changing or switching the state of FM 101 from one magnetization direction (e.g., configuration 104) to another magnetization direction (e.g., configuration 106) is time consuming resulting in slower nanomagnets response time. It is associated with the intrinsic energy of switching proportional to the area in the graph contained between curves 102 and 103.

[0046] In some embodiments, ferromagnet 101 comprises one or a combination of materials which include one or more of: a Heusler alloy, Co, Fe, Ni, Gd, B, Ge, Ga, permalloy, or Yttrium Iron Garnet (YIG), and wherein the Heusler alloy is a material which includes one or more of: Cu, Mn, Al, In, Sn, Ni, Sb, Ga, Co, Fe, Si, Pd, Sb, V, Ru, Cu₂MnAl, Cu₂MnIn, Cu₂MnSn, Ni₂MnAl, Ni₂MnIn, Ni₂MnSn, Ni₂MnSb, Ni₂MnGa Co₂MnAl,

Co₂MnSi, Co₂MnGa, Co₂MnGe, Pd₂MnAl, Pd₂MnIn, Pd₂MnSn, Pd₂MnSb, Co₂FeSi, Co₂FeAl, Fe₂VAl, Mn₂VGa, Co₂FeGe, MnGa, MnGaRu, or Mn₃X, where‘X’ is one of Ga or Ge.

[0047] Fig. IB illustrates magnetization plot 120 for paramagnet 121. Plot 120 shows the magnetization response to an applied magnetic field for paramagnet 121. The x-axis of plot 120 is magnetic field Ή’ while the y-axis is magnetization‘m’. A paramagnet, as opposed to a ferromagnet, exhibits magnetization when a magnetic field is applied to it. Paramagnets generally have magnetic permeability greater or equal to one and hence are attracted to magnetic fields. Compared to plot 100, the magnetic plot 120 of Fig. IB does not exhibit hysteresis which allows for faster switching speeds and smaller switching energies between the two saturated magnetization configurations 124 and 126 of curve 122. In the middle region 125, paramagnet 121 does not have any magnetization because there is no applied magnetic field (e.g., H=0). The intrinsic energy associated with switching is absent in this case.

[0048] A paramagnet, as opposed to a ferromagnet, exhibits magnetization when a magnetic field is applied to it. Paramagnets generally have magnetic permeability greater or equal to one and hence are attracted to magnetic fields. In some embodiments, magnets 209a/b and 210a/b comprise a material which includes one or more of: Platinum(Pt), Palladium (Pd), Tungsten (W), Cerium (Ce), Aluminum (Al), Lithium (Li), Magnesium (Mg), Sodium (Na), CnCL (chromium oxide), CoO (cobalt oxide), Dysprosium (Dy), Dy₂0 (dysprosium oxide), Erbium (Er), EG₂0₃ (Erbium oxide), Europium (Eu), EU2O3 (Europium oxide), Gadolinium (Gd), Gadolinium oxide (Gd₂0_{3 )}, FeO and Fe^Os (Iron oxide),

Neodymium (Nd), Nd₂0₃ (Neodymium oxide), K0₂ (potassium superoxide), praseodymium (Pr), Samarium (Sm), Sm₂0₃ (samarium oxide), Terbium (Tb), Tb₂0₃ (Terbium oxide), Thulium (Tm), Tm₂0₃ (Thulium oxide), or V₂0₃ (Vanadium oxide). In some embodiments, paramagnets comprise dopants selected from a group which includes one or more of: Ce, Cr, Mn, Nb, Mo, Tc, Re, Nd, Gd, Tb, Dy, Ho, Er, Tm, or Yb.

[0049] Fig. 1C illustrates plot 130 showing magnetization response to applied voltage field for a paramagnet 131 connected to a magnetoelectric layer 132. Here, the x-axis is voltage‘V’ applied across a magnetoelectric, ME, (which furthermore may be ferroelectric, FE) layer 132 and y-axis is magnetization‘m’. Magnetoelectric polarization‘PFE’ is in ME layer 132 is indicated by an arrow. In this example, magnetization is driven by exchange bias exerted by a ME effect from ME layer 132. When positive voltage is applied to ME layer 132, magnet 131 establishes a deterministic magnetization (e.g., in the +x direction by voltage +V_C) as shown by configuration 136. When negative voltage is applied by ME layer 132, paramagnet or ferromagnet 131 establishes a deterministic magnetization (e.g., in the -x direction by voltage -V_c) as shown by configuration 134. Plot 130 shows that magnetization functions l33a and l33b have hysteresis. In some embodiments, by combining ME layer 132 with magnet 131, switching speeds of paramagnet as shown in Fig. IB are achieved. In some embodiments, the hysteresis behavior of FM 131, as shown in Fig. 1C, is associated with the driving force of switching rather than the intrinsic resistance of the magnet to switching.

[0050] In some embodiments, magnetoelectric structure 132 comprises CnCT or multiferroic material. In some embodiments, magnetoelectric structure 132 comprises Cr and O. In some embodiments, the multiferroic material comprises BFO (e.g., BiFeCb), LFO (LuFeC , LuFe₂0₄), or La doped BiFeCb. In some embodiments, the multiferroic material includes one of: Bi, Fe, O, Lu, or La. In some embodiments, magnetoelectric structure 132 comprises one of: dielectric, para-electric, or ferro-electric material.

[0051] Figs. 1D-E illustrate structures 140 and 150, respectively, showing switching of magnetization for a ferromagnet using exchange bias from a magnetoelectric material. Structure 140 comprises ferromagnet 141 connected to magnetoelectric structure 142.

[0052] Here, the long axis is 143 which runs along the y-direction along the direction of the length of the magnet 141. The long axis is determined by the shape of the magnet. Here, when electric field E is applied across magnetoelectric structure 142, magnet 141 realizes magnetization l44a along the long axis 143. The electric field E results in exchange bias from magnetoelectric structure 142 which is applied to magnet 141. The exchange bias causes stress on magnet 141 resulting in magnetization l44a along the long axis 143.

[0053] Structure 150 shows the same structure 140 but with a different direction of applied electric field E. Here, when the electric field E is applied across magnetoelectric structure 142, magnet 141 realizes magnetization l44b along the long axis 143. The electric field E results in exchange bias from magnetoelectric structure 142 which is applied to magnet 141. The exchange bias causes stress on magnet 141 resulting in the magnetization l44b along the long axis 143. Magnetization l44b is about 180 degrees shifted from magnetization l44a. As such, magnet 141 illustrates two possible magnet states (along -i-y and -y) indicated by the two magnetizations l44a/b separated by about 180 degrees.

[0054] Figs. 1F-G illustrate structures 160 and 170, respectively, showing switching of magnetization for a magnetostrictive magnet using magnetostrictive effect from a piezo- electric material. Structure 160 comprises magnet 161 with magnetostrictive properties connected to piezoelectric structure 162. In some embodiments, magnet 161 with magnetostrictive properties is a magnet with high magnetic saturation coefficient. Saturated magnetization M_s is generally the state reached when an increase in applied external magnetic field H cannot increase the magnetization of the material. Examples of materials with magnetostrictive properties include: FeGa, Ro, Terfenol-D (Tb_xDy_(i-X)Fe2, where x is approximately 0.3), FeGa and CoFeGa derivatives, Co2FeGa, Co2FeGeGa and derivatives.

[0055] In some embodiments, piezoelectric structure 162 includes one or more materials such as: lead zirconate titanate (Pb[Zr_xTi_(i-X)]03, also referred to as PZT, where x is greater or equal to zero and less than or equal to 1) and its derivatives, BiFe0₃ (BFO) class of perovskites and its derivatives, tetragonal zirconia (TPZ or TZP, Zr0₂-Y20₃), or lanthanum cobaltite perovskite (LaCo03).

[0056] Here, the preferred axis is 164 that is perpendicular to the long axis 143. In some embodiments, when an electric field E is applied across piezoelectric structure 162, magnet 161 realizes magnetization l44a along the long axis 143. The electric field E results in magnetostriction from piezoelectric structure 162 which is applied to magnet 161. The magnetostrictive effect applies a stress on magnet 161 and causes the magnet 161 to achieve magnetization l44a. Structure 170 shows the same structure 160 but with different direction of electric field E. Here, when the electric field E is applied across piezoelectric structure 162, magnet 161 realizes magnetization l74b along the easy or preferred axis 164. The electric field E results in piezoelectric based strain from piezoelectric structure 162 which is applied to magnetostrictive magnet 161. The magnetostriction from piezoelectric structure 162 is applied to magnetostrictive magnet 161 which causes magnetization l74b.

Magnetization l74b is about 90 degrees shifted from magnetization l44a. As such, magnet 161 illustrates two possible magnet states indicated by the two magnetizations l44a and l74b separated by about 90 degrees.

[0057] As discussed herein, detecting change in magnetization of a magnet when it switches by 90 degrees is generally more cumbersome than detecting change in

magnetization of a magnet when it switches by 180 degrees instead. This is because, the direction of current generated by switching of magnets by 90 degrees may not change enough to cause detection of magnetization switching. As such, detecting logic states of the magnet when it switches by 90 degrees may use additional structural and/or fabrication methods. For example, the magnets may need to orient or be canted by 45 degrees relative to a length of a conductor coupled to the magnets. In some embodiments, a magnet structure is described that produces a cancelling field for the exchange anisotropy. For example, the magnet structure generates a dipole filed to counter the coercivity modulation. As such,

magnetoelectric materials with piezoelectric effect can be used for MESO Logic.

[0058] Fig. 2A illustrates MESO logic 200 using semi-insulating or insulating magnet, according to some embodiments of the disclosure. Fig. 2B illustrates a material stack at the input of an interconnect, according to some embodiments of the disclosure.

[0059] In some embodiments, MESO logic 200 comprises a first magnet structure comprising first magnet 201, second magnet 2l2b, and coupling structure 2l3b, a spin orbit coupling (SOC) structure having a stack of layers (e.g., layers 202, 203, and 204, also labeled as 202a/b, 203a/b, and 204a/b), interconnecting conductor 205 (e.g., a non-magnetic charge conductor), magnetoelectric (ME) structure 206 (206a/b), second magnet structure comprising first magnet 207, second magnet 2l2a, and coupling structure 2l3a, metal contacts 209a/b, and transistors MN1, MP1, MN2, and MP2. The first and second magnet structures are also referred to as input and output magnet structures, respectively. The magnetoelectric (ME) structure 206 (206a/b) is also referred to as the piezoelectric (PE) structure 206 (206a/b).

[0060] In some embodiments, the first and second magnet structures have respective magnets with in-plane magnetic anisotropy. For example, first and second magnets 201 and 2l2b of the first magnet structure have a magnetization pointing along the -y/+y direction relative to the x-y plane of the device 200. Here, first and second magnets 207 and 212a of the second magnet structure also have magnetization pointing along the -y/+y direction relative to the x-y plane of the device 200. In some embodiments, the first 201/207 and second 2l2a/b magnets (of the first and second magnet structures) have respective magnetizations in opposite directions. In some embodiments, the coupling structures 2l3a/b comprises one or more of: Ru, Ir, Cu, Os, Ag, W, Mo, Pt or other transition metals from a platinum group of the periodic table. In various embodiments, the thickness t_c of the coupling structure is selected such that the magnets on either surfaces of the coupling structure have opposite magnetizations. For each material, this thickness is determined from the conditions of interface quantum exchange, and in general these thicknesses are in the range of 0.3nm to 3nm.

[0061] In various embodiments, magnets 201 and 2l2a together with the coupling structure 2l3a form a synthetic magnet. As such, the first and second magnet structures (that include a coupling structure between magnets) generate dipole field to make the

magnetization direction in 2l2b more stable. Magnetization in 2l2b switches mostly in response to the exchange bias generated by the ME effect. The effect accompanying magnetoelectric switching are the exchange coupling. It represents magnetic anisotropy typically favoring magnetization direction perpendicular to exchange bias. It originates from the interface of the ME layer 206b, and thus acts on the magnetic layer 2l2b, but not on other magnetic layers. Another accompanying effect is the MS effect. It represents magnetic anisotropy which may favor magnetization direction parallel or perpendicular to exchange bias, depending on the sign of strain and the MS coefficient. The magnetic stack is designed such that the dipole field compensates exchange coupling and/or MS effect.

[0062] In some embodiments, the first 201/207 and second 2l2a/b magnets are one of a paramagnet or ferromagnet. In some embodiments, the first 201/207 and/or second 2l2a/b magnets comprise a material which includes one or more of: Pt, Pd, W, Ce, Al, Li, Mg, Na, Cr, O, Co, Dy, Er, Eu, Gd, Fe, Nd, K, Pr, Sm, Tb, Tm, or V. In some embodiments, first 201/207 and/or second 2l2a/b magnets comprise one or a combination of materials which includes one or more of: a Heusler alloy, Co, Fe, Ni, Gd, B, Ge, Ga, permalloy, or Yttrium Iron Garnet (YIG), and wherein the Heusler alloy is a material which includes one or more of: Cu, Mn, Al, In, Sn, Ni, Sb, Ga, Co, Fe, Si, Pd, Sb, Si, V, or Ru.

[0063] In some embodiments, the first magnet structure comprises first and second portions, wherein the first portion of first magnet structure is adjacent to a portion of a first spin orbit coupling structure having a stack of layers (e.g., layers 202a, 203a, and 204a).

Here, structure having stack of layers (e.g., layers 202a, 203a, and 204a) is also referred to as the first SOC structure. In some embodiments, the second portion of first magnet structure is adjacent to a magnetoelectric material stack or layer 206b.

[0064] In some embodiments, second magnet structure comprises first and second portions, wherein the first portion of second magnet structure is adjacent to the ME material stack or layer 206a. In some embodiments, the second portion of second magnet structure is adjacent to another stack of layers (e.g., layers 202b, 203b, and 204b). Here, the other stack of layers (e.g., layers 202b, 203b, and 204b) is also referred to as the second SOC structure.

[0065] In some embodiments, I_Char_ge(iN) is converted to corresponding magnetic polarization of 201 by ME layer 206b. The materials for ME layers 206a/b are the same as the materials of ME layer 206. In some embodiments, an output interconnect 21 lb is provided to transfer output charge current I_Char_ge(ouT) to another logic or stage. In some embodiments, output interconnect 21 lb is coupled to the second magnet structure via a stack of layers that exhibit spin Hall effect and/or Rashba Edelstein effect. For example, layers 202b, 203b, and 204b are provided as a stack to couple output interconnect 21 lb with the second magnet structure. Material wise, layers 202b, 203b, and 204b are formed of the same material as layers 202a, 203 a, and 204a, respectively.

[0066] In some embodiments, conductor 205 (or charge interconnect) is coupled to at least a portion of the first SOC structure (e.g., one of layers 202a, 203a, or 204a) and ME layer 206a. For example, conductor 205 is coupled to layer 204a of the stack.

[0067] In some embodiments, first and second SOC structures (e.g., layers 202a/b,

203a/b, or 204a/b) are to provide Rashba-Edelstein effect or an inverse Rashba-Edelstein effect (or inverse spin Hall effect). In some embodiments, the stack of layers provide spin-to- charge conversion where a spin current I_s (or spin energy L) is injected from first magnet 201 and charge current I_c is generated by the stack of layers. This charge current I_c is provided to conductor 205 (e.g., charge interconnect). In contrast to spin current, charge current does not attenuate in conductor 205. The direction of the charge current I_c depends on the direction of magnetization of first magnet 201.

[0068] In some embodiments, the charge current I_c charges the capacitor around ME layer 206a and switches its polarization. ME layer 206a exerts magnetostriction on second magnet structure, and the direction of the magnetostriction determines the magnetization of first and second magnets 2l2a and 207, respectively, of the second magnet structure. The same dynamics occurs by ME layer 206b which exerts magnetostriction on the first magnet structure according to an input charge current on conductor 21 la.

[0069] In this example, the length of first magnet 201 is L_mi, the length of second magnet 207 is L_m2 (which can be same as L_mi or different, in the range of 10 nm to 100 nm) the width of conductor 205 is W_c (in the range of 5nm to 50 nm), the length of conductor 205 from the interface of layer 204a to ME layer 206a is L_c (in the range of 20 nm to 400 nm), t_mi and t_m2 are the thicknesses of the magnets 201/207 and 2l2a/b (in the range of 0.5nm to 5nm), t_c is the thickness of the coupling layer (in the range of 0.3 nm to 2 nm), and t_ME is the thickness of PE layer 206a (in the range of 2 nm to 50 nm). Here, the length of magnets is collectively referred to L_m.

[0070] In some embodiments, conductor 205 comprises a material including one of:

Graphene, W, Cu, Ag, Al, or Au. In some embodiments, the input and output charge conductors (21 la and 21 lb, respectively) and associated spin-to-charge and charge-to-spin converters are provided. In some embodiments, input charge current I_Char_ge(iN) is provided on interconnect 21 la (e.g., charge interconnect made of same material as interconnect 205). In some embodiments, interconnect 21 la is coupled to first magnet 201 of the first magnet structure via ME layer 206b. In some embodiments, interconnect 21 la is orthogonal to first magnet 201 of the first magnet structure. For example, interconnect 21 la extends in the +x direction while first magnet 201 extends in the -y direction. In some embodiments, I_Char_ge(iN) is converted to corresponding magnetic polarization of magnet 201 by ME structure 206b. The materials for ME layers 206a/b are the same as the materials of ME structure 206.

[0071] In some embodiments, an output interconnect 21 lb is provided to transfer output charge current I_Char_ge(ouT) to another logic or stage. In some embodiments, the output interconnect 21 lb is coupled to first magnet 207 of the second magnet structure via an SOC structure (e.g., stack of layers) that exhibits spin Hall effect and/or Rashba Edelstein effect. For example, layers 202b, 203b, and 204b are provided as a stack to couple output interconnect 21 lb with first magnet 207 of the second magnet structure. Material wise, layers 202b, 203b, and 204b are formed of the same material as layers 202a, 203 a, and 204a, respectively.

[0072] In some embodiments, a transistor (e.g., p-type transistor MP1) is coupled to first magnet 201 of the First magnet structure via contact 209a (e.g., Cu, Al, Ag, or Au, etc.). In this example, the source terminal of MP1 is coupled to a supply V_dd, the gate terminal of MP1 is coupled to a control voltage V_ci (e.g., a switching clock signal, which switches between V_dd and ground), and the drain terminal of MP1 is coupled to first magnet 201 of the first magnet structure via contact 209a. In some embodiments, contact 209a is made of any suitable conducting material used to connect the transistor to the first magnet 201. In some embodiments, the current I_drive from transistor MP1 generates spin current into the stack of layers (e.g., layers 202a, 203a, and 204a).

[0073] In some embodiments, along with the p-type transistor MP1 connected to V_dd

(or an n-type transistor connected to V_dd but with gate overdrive above V_dd), an n-type transistor MN1 is provided which couples to first magnet 201 of the first magnet structure via contact 209a, where the n-type transistor is operable to couple ground (or 0 V) to first magnet 201. In some embodiments, n-type transistor MN2 is provided which is operable to couple ground (or 0V) to the first magnet 207 of the second magnet structure via contact 209b.

[0074] In some embodiments, p-type transistor MP2 is provided which is operable to couple power supply (V_dd or -V_dd) to first magnet 207 of the second magnet structure via contact 209b. For example, when clock is low (e.g., V_ci=0 V), then transistor MP1 is on and V_dd is coupled to first magnet 201 of the first magnet structure (e.g., power supply is V_dd) and 0V is coupled to the first magnet 207 of the second magnet structure. This provides a potential difference for charge current to flow. Continuing with this example, when clock is high (e.g., V_ci=V_dd and power supply is V_dd), then transistor MP1 is off, transistor MN1 is on, and transistor MN2 is off. As such, 0 V is coupled to first conducting magnet 201.

[0075] In some embodiments, the power supply is a negative power supply (e.g., -

V_dd). In that case, then transistor MPl’s source is connected to 0 V, and transistor MNl’s source is connected to -V_dd, and transistor MN2 is on. When V_ci = 0 V and power supply is - V_dd , then transistor MN1 is on, and transistor MP1 is off, and transistor MN2 (whose source is at -V_dd ) is off and MP2 whose source is 0 V is on. In this case, -V_dd is coupled to input magnet 201 of the first magnet structure and 0 V is coupled to output magnet 207 of the second magnet structure via respective contacts 209a/b, respectively. This also provides a path for charge current to flow. Continuing with this example, when the clock is high (e.g., Vd=-Vdd and power supply is -Vdd), then transistor MP1 is off, transistor MN1 is on, and transistor MN2 is off. As such, 0 V is coupled to input magnet 201 of the first magnet structure.

[0076] In some embodiments, ME layer 206a/b forms the capacitor with

magnetoelectric properties to switch first and second magnets 201/207 and 2l2a/b of the first and second magnet structures, respectively. For example, conductor 205 forms one plate of the capacitor, second magnet 212a of the second magnet structure forms the other plate of the capacitor, and layer 206a is the magnetic-electric oxide that provides the magnetostriction effect to second magnet 212a of the second magnet structure.

[0077] In some embodiments, the first magnet structure injects a spin polarized current into the high spin-orbit coupling (SOC) material stack (e.g., layers 202a, 203a, and 204a). The spin polarization is determined by the magnetization of first magnet 201 (which is same as magnetization of second magnet 212b) of the first magnet structure.

[0078] In some embodiments, the stack comprises i) an interface 203a/b with a high density 2D (two dimensional) electron gas and with high SOC formed between 202a/b and 204a/b materials such as i) Ag or Bi, or ii) a bulk material 204 with high Spin Hall Effect (SHE) coefficient such as Ta, W, or Pt. In some embodiments, a spacer (or template layer) is formed between second magnet 2l2b and the injection stack. In some embodiments, this spacer is a templating metal layer which provides a template for forming second magnet 2l2b. In some embodiments, the metal of the spacer which is directly coupled to second magnet 2l2b is a noble metal (e.g., Ag, Cu, or Au) doped with other elements from Group 4d and/or 5d of the Periodic Table. In some embodiments, second magnet 2l2b are sufficiently lattice matched to Ag (e.g., a material which is engineered to have a lattice constant close (e.g., within 3%) to that of Ag). [0079] In some embodiments, the 2D materials include one or more of: Mo, S, W, Se,

Graphene, M0S2, WSe₂, WS2, or MoSe2. In some embodiments, the 2D materials include an absorbent which includes one or more of: Cu, Ag, Pt, Bi, Fr, or H absorbents. In some embodiments, the SOC structures comprise a spin orbit material which includes materials that exhibit Rashba-Bychkov effect. In some embodiments, material which includes materials that exhibit Rashba-Bychkov effect comprises materials ROCI12, where‘R’ includes one or more of: La, Ce, Pr, Nd, Sr, Sc, Ga, Al, or In, and where“Ch” is a chalcogenide which includes one or more of: S, Se, or Te.

[0080] Here, sufficiently matched atomistic crystalline layers refer to matching of the lattice constant‘a’ within a threshold level above which atoms exhibit dislocation which is harmful to the device (for instance, the number and character of dislocations lead to a significant (e.g., greater than 10%) probability of spin flip while an electron traverses the interface layer). For example, the threshold level is within 5% (i.e., threshold levels in the range of 0% to 5% of the relative difference of the lattice constants). As the matching improves (e.g., matching gets closer to perfect matching), spin injection efficiency from spin transfer from first magnet structure to first ISHE/ISOC stacked layer increases. Poor matching (e.g., matching worse than 5%) implies dislocation of atoms that is harmful for the device.

[0081] Table 1 summarizes transduction mechanisms for converting magnetization to charge current and charge current to magnetization for bulk materials and interfaces.

Table 1: Transduction mechanisms for Spin to Charge and Charge to Spin Conversion

[0082] The following section describes the spin to charge and charge to spin dynamics. In some embodiments, the spin-orbit mechanism responsible for spin-to-charge conversion is described by the inverse Rashba-Edelstein effect in 2D electron gases. The Hamiltonian (energy) of spin-orbit coupling electrons in a 2D electron gas is:

H_R = a_R(k x z) . s

where a_R is the Rashba-Edelstein coefficient,‘k’ is the operator of momentum of electrons, z is a unit vector perpendicular to the 2D electron gas, and s is the operator of spin of electrons. [0083] The spin polarized electrons with direction of polarization in-plane (e.g., in the xy-plane) experience an effective magnetic field dependent on the spin direction:

where /r_Bis the Bohr magneton.

[0084] This results in the generation of a charge current I_c in interconnect 205 proportional to the spin current 7_S (or J_s). The spin-orbit interaction by Ag and Bi interface layers 202 and 204 (e.g., the Inverse Rashba-Edelstein Effect (IREE)) produces a charge current I_c in the horizontal direction given as:

where w_m is width of the input magnet structure, and l_IKEE is the IREE constant (with units of length) proportional to a_R .

[0085] Alternatively, the Inverse Spin Hall Effect in Ta, W, or Pt layer 203a/b produces the horizontal charge current I_c given as:

[0086] Both IREE and ISHE effects produce spin-to-charge current conversion around 0.1 with existing materials at 10 nm (nanometers) magnet width. For scaled nanomagnets (e.g., 5 nm wide magnets) and exploratory SHE materials such as Bi₂Se3, the spin-to-charge conversion efficiency can be between 1 and 2.5. The net conversion of the drive charge current 1 _drive to magnetization dependent charge current is given as:

where‘P’ is the dimensionless spin polarization. For this estimate, the drive current I _dri_ve and the charge current I_c = I _d = 100 mA is set. As such, when estimating the resistance of the ISHE interface to be equal to R = 100 W, then the induced voltage is equal to V_ISHE =

10 mV.

[0087] The charge current I_c, carried by interconnect 205, produces a voltage on the capacitor of ME structure 206a comprising magnetoelectric material dielectric (such as BiFeCT (BFO) or CnCT) in contact with second magnet 212a (which serves as one of the plates of the capacitor) and interconnect 205 (which series as the other of the plates of the capacitor). In some embodiments, magnetoelectric materials are either intrinsic multiferroic or composite multiferroic structures. As the charge accumulates on the magnetoelectric capacitor of ME structure 206a, a strong magnetoelectric interaction causes the switching of magnetization in second insulating or semi-insulating magnet 212a (and by extension second conducting magnet 207).

[0088] For the following parameters of the magnetoelectric capacitor: thickness t_ME = 5 Jim, dielectric constant e = 500, area A = 60 nm x 20 nm. Then the capacitance is given as:

ee₀A

C = IfF

^LME

[0089] Demonstrated values of the magnetoelectric coefficient is a_ME~10/c , where the speed of light is c. This translates to the effective magnetic field exerted on second semi- insulating magnet 207, which is expressed as:

0.06 T

This is a strong field sufficient to switch magnetization.

[0090] The charge on the capacitor of ME layer 206a is Q =— x 10 mV = 10 aC,

fF

and the time to fully charge it to the induced voltage is td = 10— ~1 ps (with the account of

Id

decreased voltage difference as the capacitor charges). If the driving voltage is V_d =

100 mV, then the energy E_sw to switch is expressed as:

E_sw~100mV x 100mA x lps~10a/

which is comparable to the switching energy of CMOS transistors. Note that the time to switch t_sw magnetization remains much longer than the charging time and is determined by the magnetization precession rate. The micro-magnetic simulations predict this time to be t_sw~100ps, for example.

[0091] In some embodiments, materials for first and second magnets 201/207 and

212a/b of the first and second magnet structures, respectively, have saturated magnetization M_s and effective anisotropy field ¾. Saturated magnetization M_s is generally the state reached when an increase in applied external magnetic field H cannot increase the magnetization of the material. Anisotropy H_k generally refers material properties that are highly directionally dependent.

[0092] In some embodiments, materials for first and second magnets 201/207 and

212a/b of the first and second magnet structures, respectively, are non-ferromagnetic elements with strong paramagnetism which have high number of unpaired spins but are not room temperature ferromagnets. A paramagnet, as opposed to a ferromagnet, exhibits magnetization when a magnetic field is applied to it. Paramagnets generally have magnetic permeability greater or equal to one and hence are attracted to magnetic fields. In some embodiments, first and second magnets 201/207 and 2l2a/b of the first and second magnet structures, respectively, comprise a material which includes one or more of: Platinum(Pt), Palladium (Pd), Tungsten (W), Cerium (Ce), Aluminum (Al), Lithium (Li), Magnesium (Mg), Sodium (Na), CnCL (chromium oxide), CoO (cobalt oxide), Dysprosium (Dy), Dy₂0 (dysprosium oxide), Erbium (Er), EnCL (Erbium oxide), Europium (Eu), E_¾(¾ (Europium oxide), Gadolinium (Gd), Gadolinium oxide (Gd₂0₃), FeO and Fe₂0₃ (Iron oxide),

Neodymium (Nd), Nd₂0₃ (Neodymium oxide), K0₂ (potassium superoxide), praseodymium (Pr), Samarium (Sm), Sm₂0₃ (samarium oxide), Terbium (Tb), Tb₂0₃ (Terbium oxide), Thulium (Tm), Tm₂0₃ (Thulium oxide), or V₂0₃ (Vanadium oxide). In some embodiments, first and second magnets 201/207 and 2l2a/b of the first and second magnet structures, respectively, comprise dopants selected from a group which includes one or more of: Ce, Cr, Mn, Nb, Mo, Tc, Re, Nd, Gd, Tb, Dy, Ho, Er, Tm, or Yb.

[0093] In some embodiments, first and second magnets 201/207 and 2l2a/b of the first and second magnet structures, respectively, are ferromagnets. In some embodiments, first and second magnets 201/207 and 2l2a/b of the first and second magnet structures, respectively, comprise one or a combination of materials which includes one or more of: a Heusler alloy, Co, Fe, Ni, Gd, B, Ge, Ga, permalloy, or Yttrium Iron Garnet (YIG), and wherein the Heusler alloy is a material which includes one or more of: Cu, Mn, Al, In, Sn, Ni, Sb, Ga, Co, Fe, Si, Pd, Sb, V, Ru, Cu₂MnAl, Cu₂MnIn, Cu₂MnSn, Ni₂MnAl, NLMnTn, NLMnSn, Ni₂MnSb, Ni₂MnGa Co₂MnAl, Co₂MnSi, Co₂MnGa, Co₂MnGe, Pd₂MnAl, Pd₂MnIn, Pd₂MnSn, Pd₂MnSb, Co₂FeSi, Co₂FeAl, Fe₂VAl, Mn₂VGa, Co₂FeGe, MnGa, MnGaRu, or M X, where‘X’ is one of Ga or Ge.

[0094] In some embodiments, first and second magnets 201/207 and 2l2a/b of the first and second magnet structures, respectively, (like magnet 161) have magnetostrictive properties and have high magnetic saturation coefficient. Examples of materials with magnetostrictive properties include: FeGa, Ro, Terfenol-D (Tb_xDy_(i-X)Fe₂, where x is approximately 0.3), FeGa and CoFeGa derivatives, Co₂FeGa, Co₂FeGeGa and derivatives.

[0095] In some embodiments, ME structure 206a/b (like structure 162) includes one or more materials such as: lead zirconate titanate (Pb[Zr_xTi_(i-X)]0₃, also referred to as PZT, where x is greater or equal to zero and less than or equal to 1) and its derivatives, BiFe0₃ (BFO) class of perovskites and its derivatives, tetragonal zirconia (TPZ or TZP, Zr0₂-Y20₃), or lanthanum cobaltite perovskite (LaCo0₃). In some embodiments, ME structure 206a/b comprises a material which includes one of: Cr₂0₃ and multiferroic material. In some embodiments, ME structure 206 comprises Cr and O. In some embodiments, the multiferroic material comprises BFO (e.g., BiFeCb), LFO (LuFeCh, LuFe₂0₄), or La doped BiFeCb. In some embodiments, the multiferroic material includes one of: Bi, Fe, O, Lu, or La.

[0096] In some embodiments, the SOC structures (e.g., stack of layers providing spin orbit coupling) comprises: a first layer 202a/b comprising Ag, wherein the first layer is adjacent to magnets 2l2a/b; and a second layer 204a/b comprising Bi or W, wherein second layer 204a/b is adjacent to first layer 202a/b and to a conductor (e.g., 205, 21 lb). In some embodiments, a third layer 203a/b (having material which is one or more of Ta, W, or Pt) is sandwiched between first layer 202a/b and second layer 204a/b as shown. In some embodiments, the stack of layers comprises a material which includes one of: b-Ta, b-W, W, Pt, Cu doped with Iridium, Cu doped with Bismuth, or Cu doped an element of 3d, 4d, 5d, 4f, or 5f of periodic table groups.

[0097] Fig. 3 illustrates MESO logic 300 with distributed magnets at the input and output, according to some embodiments of the disclosure. The MESO logic 300 is similar to MESO logic 200 but for the structure of the first and second magnet structures. In MESO logic 200, the first magnet structure includes three structures— first magnet 201, second magnet 2l2b, and coupling structure 2l3b, where the first magnet 201, second magnet 2l2b, and coupling structure 213b extend along the entire length L_mi of the magnet structure.

[0098] In MESO logic 300, the first magnet structure has distributed structures. For example, the first magnet structure of MESO logic 300 comprises first magnet 201, second magnet 3l2aa, third magnet 3l2bb, first coupling structure 3l3aa, and second coupling structure 3l3aa. In some embodiments, second magnet 3l2aa couples to the first magnet 201 via first coupling structure 3l3aa. In some embodiments, third magnet 3l2bb couples to the first magnet 201 via second coupling structure 3l3bb. In this example, the magnetizations of second and third magnets 3l2aa/bb is the same, and in the identical direction as the magnetization of first magnet 201. MESO logic 300 may be cheaper in cost in terms of material cost since the second magnet 2l2b and coupling structure 2l3b of MESO logic 200 is distributed. For example, second magnet 212b is distributed into second magnet 3l2aa and third magnet 3l2bb, while coupling structure 213b is distributed as first and second coupling structures 3l3aa/bb, respectively.

[0099] In MESO logic 200, the second magnet structure includes three structures— first magnet 207, second magnet 2l2a, and coupling structure 2l3a, where the second magnet 207, second magnet 2l2a, and coupling structure 2l3a extend along the entire length of the magnet structure. In MESO logic 300, the second magnet structure has distributed structures. For example, the second magnet structure of MESO logic 300 comprises first magnet 207, second magnet 3l2ba, third magnet 3l2ab, first coupling structure 3l3ba, and second coupling structure 3l3ba. In some embodiments, second magnet 3l2ba couples to the first magnet 207 via first coupling structure 3l3ba. In some embodiments, third magnet 3l2ab couples to the first magnet 207 via second coupling structure 3l3ab. In this example, the magnetizations of second and third magnets 3l2ba/ab is the same, and in the identical direction as the magnetization of first magnet 207. Like the input magnet structure, here the output magnet structure is distributed. For example, second magnet 212a is distributed into second magnet 3l2ba and third magnet 3 l2ab, while coupling structure 2l3b is distributed as first and second coupling structures 3l3ba/ab, respectively.

[00100] Fig. 4A illustrates MESO logic 400 operable as a repeater, according to some embodiments. In some embodiments, to configure PE MESO logic 200 as a repeater, a portion of the stack of the layers (e.g., layer 204a/b) is coupled to ground, first magnet 201 of the first magnet structure is coupled to a negative supply (e.g., -V_dd), and first magnet 207 of the second magnet structure is coupled to ground (e.g., 0 V). In some embodiment, the clocking signals, V_ci and V_ci-t>, enable operation of stages of MESO logic 400 consecutively. For example, in one of the clocking stages, first magnet 201 of the first magnet structure is coupled to V_dd via high conductance in transistor MP1 while the first magnet 207 of the second magnet structure is coupled to ground high conductance in transistor MN2. In some embodiments, for repeater MESO logic 400, the magnetization direction of first magnet 201 of the first magnet structure is the same as the magnetization direction of first magnet 207 of the second magnet structure. For example, the magnetization direction of first magnet 201 is in the -y direction while the magnetization direction of first magnet 207 is in the -y direction.

[00101] Fig. 4B illustrates MESO logic 420 operable as an inverter, according to some embodiments. In some embodiments, to configure the MESO logic 200 as an inverter, a portion of the stack of the layers (e.g., layer 204a/b) is coupled to ground, first magnet 201 of the first magnet structure is coupled to a positive supply (e.g., +V_dd), and first magnet 207 of the second magnet structure is coupled to ground (e.g., 0V). In some embodiments, the clocking signals, V_ci and V_ci-t>, enable operation of stages of MESO logic 420 consecutively. For example, in one of the clocking stages, first magnet 201 of the first magnet structure is coupled to V_dd via high conductance in transistor MP1 while the first magnet 207 of the second magnet structure is coupled to ground high conductance in transistor MN2. In some embodiments, for inverter MESO 420, the magnetization direction of first magnet 201 of the first magnet structure is opposite compared to the magnetization direction of the first magnet 207 of the second magnet structure. In some embodiments, for repeater MESO logic 400, the magnetization direction of first magnet 201 of the first magnet structure is the same as the magnetization direction of first magnet 207 of the second magnet structure. For example, the magnetization direction of first magnet 201 is in the +y direction while the magnetization direction of first magnet 207 is in the -y direction.

[00102] MESO logic devices of various embodiments provide logic cascadability and unidirectional signal propagation (e.g., input-output isolation). The unidirectional nature of logic is ensured due to large difference in impedance for injection path versus detection path, in accordance with some embodiments. In some embodiments, the injector is essentially a metallic spin valve with spin to charge transduction with RA (resistance area) products of approximately 10 mOhm.micron². In some embodiments, the detection path is a low leakage capacitance with RA products much larger than 1 MOhm.micron² in series with the resistance of the FM capacitor plate with estimated resistance greater than 500 Ohms.

[00103] Fig. 5 illustrates a top view 500 of a layout of the MESO logic of Fig. 2A, according to some embodiments. An integration scheme for MESO devices with CMOS drivers for power supply and clocking is shown in the top view. Here, transistor MP1 is formed in the active region 501, and power supply is provided via metal layer 3 (M3) indicated as 506. The gate terminal 504 of transistor MP1 is coupled to a supply interconnect 505 through via or contact 503. In some embodiments, M3 layer 507 is coupled to ground which provides ground supply to layer 204. In some embodiments, another transistor can be formed in active region 503 with gate terminal 510. Here, 508 and 509 are contact vias coupled to power supply line. In some embodiments, the density of integration of the devices exceeds that of CMOS since an inverter operation can be achieved within 2.5P x 2M0. In some embodiments, since the power transistor MP1 can be shared among all the devices at the same clock phases, vertical integration can also be used to increase the logic density as described with reference to Fig. 6, in accordance with some embodiments.

[00104] Fig. 6 illustrates a majority gate 600 using MESO logic devices of Fig. 2A, according to some embodiments. A charge mediated majority gate is proposed using the spin orbit coupling and magnetoelectric switching. A charge mediated majority gate is shown in Fig. 6. Majority gate 600 comprises at least three input stages 601, 602, and 603 with their respective charge conductors 205₁, 205₂, and 205₃ coupled to summing interconnect 604. In some embodiments, summing interconnect 604 is made of the same materials as interconnect 205. In some embodiments, summing interconnect 604 is coupled to output stage 605 which includes the first magnet 207. The three input stages 601, 602, and 603 share a common power/clock region therefore the power/clock gating transistor can be shared among the three inputs of the majority gate, in accordance with some embodiments. The input stages 601, 602, and 603 can also be stacked vertically to improve the logic density, in accordance with some embodiments. The charge current at the output (I_Charge(ou_T)) is the sum of currents I_Chi, Ich2, and Ich3-

[00105] Fig. 7 illustrates a flowchart of a method for forming a MESO logic device, according to some embodiments of the disclosure. While blocks or operations of flowchart 700 are shown in a particular order, the order can be changed. For example, some blocks or operations can be performed before others while some can be performed simultaneously.

[00106] At block 701, a magnet structure is formed. In various embodiments, forming the magnet structure comprises forming a first magnet 201, a second magnet 212, and a coupling structure 213 between the first and second magnets. In some embodiments, the first and second magnets (201 and 212, respectively) have respective magnetizations in the opposite directions. In some embodiments, the method of forming the coupling structure 213 comprises depositing one or more of: Ru, Ir, Cu, Os, Hs, Fe, or other transition metals from a platinum group of the periodic table. In some embodiments, the first and second magnets (201 and 212, respectively) are one of a paramagnet or ferromagnet. In some embodiments, the method of forming the first and/or second magnets (201 and 212, respectively) comprises forming a material which includes one or more of: Pt, Pd, W, Ce, Al, Li, Mg, Na, Cr, O, Co, Dy, Er, Eu, Gd, Fe, Nd, K, Pr, Sm, Tb, Tm, or V.

[00107] In some embodiments, the method of forming the first and/or second magnets (201 and 212, respectively) comprises one or a combination of materials which includes one or more of: a Heusler alloy, Co, Fe, Ni, Gd, B, Ge, Ga, permalloy, or Yttrium Iron Garnet (YIG), and wherein the Heusler alloy is a material which includes one or more of: Cu, Mn, Al, In, Sn, Ni, Sb, Ga, Co, Fe, Si, Pd, Sb, Si, V, or Ru. In some embodiments, the first and second magnets have in-plane magnetic anisotropy relative to an x-y plane of a device.

[00108] At block 702, a first structure (e.g., SOC) is formed comprising spin orbit material, wherein a portion of the first structure is adjacent to the magnet structure. In some embodiments, the method of forming the first structure comprises: forming a first arrangement comprising Ag, wherein the first arrangement is adjacent to the magnet; and forming a second arrangement including one of: Bi or W, wherein the second arrangement is adjacent to the conductor. In some embodiments, the spin orbit material comprises one or more of: b-Tantalum (b-Ta), Ta, b-Tungsten (b-W), W, Platinum (Pt), Copper (Cu) doped with elements including on of Iridium, Bismuth or elements of 3d, 4d, 5d and 4f, 5f periodic groups, Ti, S, W, Mo, Se, B, Sb, Re, La, C, P, La, As, Sc, O, Bi, Ga, Al, Y, In, Ce, Pr, Nd, F, Ir, Mn, Pd, or Fe.

[00109] At block 703, a second structure is formed comprising piezoelectric material. In some embodiments, the piezo-electric structure of the second structure includes one of: Pb, Zr, Ti, O, Bi, Fe, La, Ce, Co, or Sr.

[00110] At block 704, a conductor 205 is formed coupled to at least a portion of the first and second arrangements. In some embodiments, the method of forming the conductor comprises forming a material which includes one or more of: Graphene, W, Cu, Ag, Al, or Au. In some embodiments, the method comprises: coupling a transistor (e.g., MN1 and/or MP1) to the magnet structure.

[00111] Fig. 8 illustrates a smart device or a computer system or a SoC (System-on- Chip) with MESO logic, according to some embodiments. Fig. 8 illustrates a block diagram of an embodiment of a mobile device in which flat surface interface connectors could be used. In some embodiments, computing device 1600 represents a mobile computing device, such as a computing tablet, a mobile phone or smart-phone, a wireless-enabled e-reader, or other wireless mobile device. It will be understood that certain components are shown generally, and not all components of such a device are shown in computing device 1600.

[00112] In some embodiments, computing device 1600 includes first processor 1610 with MESO logic, according to some embodiments discussed. Other blocks of the computing device 1600 may also include a MESO logic, according to some embodiments. The various embodiments of the present disclosure may also comprise a network interface within 1670 such as a wireless interface so that a system embodiment may be incorporated into a wireless device, for example, cell phone or personal digital assistant.

[00113] In some embodiments, processor 1610 can include one or more physical devices, such as microprocessors, application processors, microcontrollers, programmable logic devices, or other processing means. The processing operations performed by processor 1610 include the execution of an operating platform or operating system on which applications and/or device functions are executed. The processing operations include operations related to I/O (input/output) with a human user or with other devices, operations related to power management, and/or operations related to connecting the computing device 1600 to another device. The processing operations may also include operations related to audio I/O and/or display I/O.

[00114] In some embodiments, computing device 1600 includes audio subsystem 1620, which represents hardware (e.g., audio hardware and audio circuits) and software (e.g., drivers, codecs) components associated with providing audio functions to the computing device. Audio functions can include speaker and/or headphone output, as well as microphone input. Devices for such functions can be integrated into computing device 1600, or connected to the computing device 1600. In one embodiment, a user interacts with the computing device 1600 by providing audio commands that are received and processed by processor 1610.

[00115] In some embodiments, computing device 1600 comprises display subsystem 1630. Display subsystem 1630 represents hardware (e.g., display devices) and software (e.g., drivers) components that provide a visual and/or tactile display for a user to interact with the computing device 1600. Display subsystem 1630 includes display interface 1632, which includes the particular screen or hardware device used to provide a display to a user. In one embodiment, display interface 1632 includes logic separate from processor 1610 to perform at least some processing related to the display. In one embodiment, display subsystem 1630 includes a touch screen (or touch pad) device that provides both output and input to a user.

[00116] In some embodiments, computing device 1600 comprises I/O controller 1640. I/O controller 1640 represents hardware devices and software components related to interaction with a user. I/O controller 1640 is operable to manage hardware that is part of audio subsystem 1620 and/or display subsystem 1630. Additionally, I/O controller 1640 illustrates a connection point for additional devices that connect to computing device 1600 through which a user might interact with the system. For example, devices that can be attached to the computing device 1600 might include microphone devices, speaker or stereo systems, video systems or other display devices, keyboard or keypad devices, or other I/O devices for use with specific applications such as card readers or other devices.

[00117] As mentioned above, I/O controller 1640 can interact with audio subsystem 1620 and/or display subsystem 1630. For example, input through a microphone or other audio device can provide input or commands for one or more applications or functions of the computing device 1600. Additionally, audio output can be provided instead of, or in addition to display output. In another example, if display subsystem 1630 includes a touch screen, the display device also acts as an input device, which can be at least partially managed by I/O controller 1640. There can also be additional buttons or switches on the computing device 1600 to provide I/O functions managed by I/O controller 1640.

[00118] In some embodiments, I/O controller 1640 manages devices such as accelerometers, cameras, light sensors or other environmental sensors, or other hardware that can be included in the computing device 1600. The input can be part of direct user interaction, as well as providing environmental input to the system to influence its operations (such as filtering for noise, adjusting displays for brightness detection, applying a flash for a camera, or other features).

[00119] In some embodiments, computing device 1600 includes power management 1650 that manages battery power usage, charging of the battery, and features related to power saving operation. Memory subsystem 1660 includes memory devices for storing information in computing device 1600. Memory can include nonvolatile (state does not change if power to the memory device is interrupted) and/or volatile (state is indeterminate if power to the memory device is interrupted) memory devices. Memory subsystem 1660 can store application data, user data, music, photos, documents, or other data, as well as system data (whether long-term or temporary) related to the execution of the applications and functions of the computing device 1600.

[00120] Elements of embodiments are also provided as a machine-readable medium (e.g., memory 1660) for storing the computer-executable instructions (e.g., instructions to implement any other processes discussed herein). The machine-readable medium (e.g., memory 1660) may include, but is not limited to, flash memory, optical disks, CD-ROMs, DVD ROMs, RAMs, EPROMs, EEPROMs, magnetic or optical cards, phase change memory (PCM), or other types of machine-readable media suitable for storing electronic or computer- executable instructions. For example, embodiments of the disclosure may be downloaded as a computer program (e.g., BIOS) which may be transferred from a remote computer (e.g., a server) to a requesting computer (e.g., a client) by way of data signals via a communication link (e.g., a modem or network connection).

[00121] In some embodiments, computing device 1600 comprises connectivity 1670. Connectivity 1670 includes hardware devices (e.g., wireless and/or wired connectors and communication hardware) and software components (e.g., drivers, protocol stacks) to enable the computing device 1600 to communicate with external devices. The computing device 1600 could be separate devices, such as other computing devices, wireless access points or base stations, as well as peripherals such as headsets, printers, or other devices.

[00122] Connectivity 1670 can include multiple different types of connectivity. To generalize, the computing device 1600 is illustrated with cellular connectivity 1672 and wireless connectivity 1674. Cellular connectivity 1672 refers generally to cellular network connectivity provided by wireless carriers, such as provided via GSM (global system for mobile communications) or variations or derivatives, CDMA (code division multiple access) or variations or derivatives, TDM (time division multiplexing) or variations or derivatives, or other cellular service standards. Wireless connectivity (or wireless interface) 1674 refers to wireless connectivity that is not cellular, and can include personal area networks (such as Bluetooth, Near Field, etc.), local area networks (such as Wi-Fi), and/or wide area networks (such as WiMax), or other wireless communication.

[00123] In some embodiments, computing device 1600 comprises peripheral connections 1680. Peripheral connections 1680 include hardware interfaces and connectors, as well as software components (e.g., drivers, protocol stacks) to make peripheral connections. It will be understood that the computing device 1600 could both be a peripheral device ("to" 1682) to other computing devices, as well as have peripheral devices ("from" 1684) connected to it. The computing device 1600 commonly has a "docking" connector to connect to other computing devices for purposes such as managing (e.g., downloading and/or uploading, changing, synchronizing) content on computing device 1600. Additionally, a docking connector can allow computing device 1600 to connect to certain peripherals that allow the computing device 1600 to control content output, for example, to audiovisual or other systems.

[00124] In addition to a proprietary docking connector or other proprietary connection hardware, the computing device 1600 can make peripheral connections 1680 via common or standards-based connectors. Common types can include a Universal Serial Bus (USB) connector (which can include any of a number of different hardware interfaces), DisplayPort including MiniDisplayPort (MDP), High Definition Multimedia Interface (HDMI), Firewire, or other types.

[00125] Reference in the specification to "an embodiment," "one embodiment," "some embodiments," or "other embodiments" means that a particular feature, structure, or characteristic described in connection with the embodiments is included in at least some embodiments, but not necessarily all embodiments. The various appearances of "an embodiment," "one embodiment," or "some embodiments" are not necessarily all referring to the same embodiments. If the specification states a component, feature, structure, or characteristic "may," "might," or "could" be included, that particular component, feature, structure, or characteristic is not required to be included. If the specification or claim refers to "a" or "an" element, that does not mean there is only one of the elements. If the specification or claims refer to "an additional" element, that does not preclude there being more than one of the additional element.

[00126] Furthermore, the particular features, structures, functions, or characteristics may be combined in any suitable manner in one or more embodiments. For example, a first embodiment may be combined with a second embodiment anywhere the particular features, structures, functions, or characteristics associated with the two embodiments are not mutually exclusive.

[00127] While the disclosure has been described in conjunction with specific embodiments thereof, many alternatives, modifications and variations of such embodiments will be apparent to those of ordinary skill in the art in light of the foregoing description. The embodiments of the disclosure are intended to embrace all such alternatives, modifications, and variations as to fall within the broad scope of the appended claims.

[00128] In addition, well known power/ground connections to integrated circuit (IC) chips and other components may or may not be shown within the presented figures, for simplicity of illustration and discussion, and so as not to obscure the disclosure. Further, arrangements may be shown in block diagram form in order to avoid obscuring the disclosure, and also in view of the fact that specifics with respect to implementation of such block diagram arrangements are highly dependent upon the platform within which the present disclosure is to be implemented (i.e., such specifics should be well within purview of one skilled in the art). Where specific details (e.g., circuits) are set forth in order to describe example embodiments of the disclosure, it should be apparent to one skilled in the art that the disclosure can be practiced without, or with variation of, these specific details. The description is thus to be regarded as illustrative instead of limiting.

[00129] The following examples pertain to further embodiments. Specifics in the examples may be used anywhere in one or more embodiments. All optional features of the apparatus described herein may also be implemented with respect to a method or process.

[00130] Example 1. An apparatus comprising: a magnet structure comprising a first magnet, a second magnet, and a coupling structure between the first and second magnets; a first structure comprising spin orbit material, wherein a portion of the first structure is adjacent to the magnet structure; a second structure comprising piezo-electric material; and a conductor coupled to at least a portion of the first and second structures.

[00131] Example 2. The apparatus of claim 1, wherein the first and second magnets have respective magnetizations in the opposite direction.

[00132] Example 3. The apparatus according to any one of claim 1 or 2, wherein the coupling structure comprises one or more of: Ru, Ir, Cu, Os, Hs, Fe, or other transition metals from a platinum group of the periodic table.

[00133] Example 4. The apparatus according to any one of claim 1 or 3, wherein the first and second magnets are one of a paramagnet or ferromagnet. [00134] Example 5. The apparatus according to any one of claims 1 to 3, wherein the first and/or second magnet comprises a material which includes one or more of: Pt, Pd, W, Ce, Al, Li, Mg, Na, Cr, O, Co, Dy, Er, Eu, Gd, Fe, Nd, K, Pr, Sm, Tb, Tm, or V.

[00135] Example 6. The apparatus according to any one of claims 1 to 3, wherein the first and/or second magnet comprises one or a combination of materials which includes one or more of: a Heusler alloy, Co, Fe, Ni, Gd, B, Ge, Ga, permalloy, or Yttrium Iron Garnet (YIG), and wherein the Heusler alloy is a material which includes one or more of: Cu, Mn, Al, In, Sn, Ni, Sb, Ga, Co, Fe, Si, Pd, Sb, Si, V, or Ru.

[00136] Example 7. The apparatus according to any one of claims 1 to 5, wherein the piezo-electric structure of the second structure includes one of: Pb, Zr, Ti, O, Bi, Fe, La, Ce, Co, or Sr.

[00137] Example 8. The apparatus according to any one of claims 1 to 5, wherein the first structure comprises: a first arrangement comprising Ag, wherein the first arrangement is adjacent to the magnet; and a second arrangement including one of: Bi or W, wherein the second arrangement is adjacent to the conductor.

[00138] Example 9. The apparatus according to any one of claims 1 to 5, wherein the conductor comprises a material which includes one or more of: Graphene, W, Cu, Ag, Al, or Au.

[00139] Example 10. The apparatus of claim 1, wherein the spin orbit material comprises one or more of: b-Tantalum (b-Ta), Ta, b-Tungsten (b-W), W, Platinum (Pt), Copper (Cu) doped with elements including on of Iridium, Bismuth or elements of 3d, 4d, 5d and 4f, 5f periodic groups, Ti, S, W, Mo, Se, B, Sb, Re, La, C, P, La, As, Sc, O, Bi, Ga, Al, Y, In, Ce, Pr, Nd, F, Ir, Mn, Pd, or Fe.

[00140] Example 11. The apparatus of claim 1 comprises a transistor coupled to the magnet structure.

[00141] Example 12. The apparatus of claim 1, wherein the first and second magnets have in-plane magnetic anisotropy relative to an x-y plane of a device.

[00142] Example 13. An apparatus comprising: a magnet structure having a first portion and a second portion, wherein the magnet comprises a first magnet, a second magnet, and a coupling structure between the first and second magnets; a first structure a portion of which is adjacent to the first portion of the magnet structure, wherein the first structure comprises a spin orbit material; a second structure comprising piezo-electric material, wherein the second structure is adjacent to the second portion; a first conductor adjacent to the second structure; and a second conductor adjacent to a portion of the first structure. [00143] Example 14. The apparatus of claim 13 comprises: a second magnet structure having a first portion and a second portion, wherein the second magnet structure comprises a third magnet, a fourth magnet, and a coupling structure between the third and fourth magnets; a third structure a portion of which is adjacent to the first portion of the second magnet, wherein the third structure comprises a spin orbit material; a fourth structure comprising piezo-electric material, wherein the fourth structure is adjacent to the second portion of the second magnet; and a third conductor adjacent to the fourth structure, wherein a portion of the fourth structure is adjacent to the second conductor.

[00144] Example 15. The apparatus of claim 14, wherein the first magnet is parallel to the second magnet, and wherein the third magnet is parallel to the fourth magnet.

[00145] Example 16. The apparatus of claim 14, wherein the first and second magnets of the magnet structure have respective magnetizations in the opposite directions, and wherein the third and fourth magnets of the second magnet structure have respective magnetizations in the opposite directions.

[00146] Example 17. The apparatus according to any one of claim 13 or 15, wherein the coupling structure of the magnet structure comprises one or more of: Ru, Ir, Cu, Os, or Hs, and wherein the coupling structure of the second magnet structure comprises one or more of: Ru, Ir, Cu, Os, or Hs.

[00147] Example 18. The apparatus according to any one of claims 13 to 17, wherein the piezo-electric structures of the second and/or fourth structures includes one or more of: Pb, Zr, Ti, O, Bi, Fe, La, Ce, Co, or Sr.

[00148] Example 19. The apparatus according to any one of claims 13 to 17, wherein the first structure comprises: a first arrangement comprising Ag, wherein the first arrangement is adjacent to the magnet; and a second arrangement including one of: Bi or W, wherein the second arrangement is adjacent to the second conductor.

[00149] Example 20. The apparatus according to any one of claims 13 to 17, wherein the third structure comprises: a first arrangement comprising Ag, wherein the first arrangement is adjacent to the second magnet; and a second arrangement including one of: Bi or W, wherein the second arrangement is adjacent to the fourth conductor.

[00150] Example 21. The apparatus according to any one of claims 13 to 17, wherein the first, second, third and/or fourth conductors comprise a material which includes one or more of: Graphene, W, Cu, Ag, Al, or Au.

[00151] Example 22. The apparatus according to any one of claims 13 to 21, wherein the spin orbit material comprises one or more of: b-Tantalum (b-Ta), Ta, b-Tungsten (b-W), W, Platinum (Pt), Copper (Cu) doped with elements including on of Iridium, Bismuth or elements of 3d, 4d, 5d and 4f, 5f periodic groups, Ti, S, W, Mo, Se, B, Sb, Re, La, C, P, La, As, Sc, O, Bi, Ga, Al, Y, In, Ce, Pr, Nd, F, Ir, Mn, Pd, or Fe.

[00152] Example 23. The apparatus according to any one of claims 13 to 22 comprises a first transistor coupled to the magnet structure; and a second transistor coupled to the second magnet structure.

[00153] Example 24. The apparatus of claim 13 comprises: a first transistor coupled to the magnet structure via a contact, wherein the first transistor is controllable by a switching signal, and wherein the first transistor is coupled to a first supply having a first potential voltage; and a second transistor coupled to the magnet structure via the contact, wherein the second transistor is controllable by the switching signal, and wherein the second transistor is coupled to a second supply having a second potential voltage, wherein the second potential voltage is higher than the first potential voltage, and wherein the first and second transistors are of different conductivity types.

[00154] Example 25. A system comprising: a memory; a processor coupled to the memory, the processor including an apparatus according to any one of apparatus claims 1 to 12 or apparatus claims 13 to 24; and a wireless interface to allow the processor to

communicate with another device.

[00155] Example 26. A method comprising: forming a magnet structure comprising forming a first magnet, a second magnet, and a coupling structure between the first and second magnets; forming a first structure comprising spin orbit material, wherein a portion of the first structure is adjacent to the magnet structure; forming a second structure comprising piezo-electric material; and forming a conductor coupled to at least a portion of the first and second structures.

[00156] Example 27. The method of claim 26, wherein the first and second magnets have respective magnetizations in the opposite directions.

[00157] Example 28. The method according to any one of claim 26 or 27, wherein forming the coupling structure comprises depositing one or more of: Ru, Ir, Cu, Os, Hs, Fe, or other transition metals from a platinum group of the periodic table.

[00158] Example 29. The method according to any one of claim 26 or 28, wherein the first and second magnets are one of a paramagnet or ferromagnet.

[00159] Example 30. The method according to any one of claims 26 to 29, wherein forming the first and/or second magnets comprises forming a material which includes one or more of: Pt, Pd, W, Ce, Al, Li, Mg, Na, Cr, O, Co, Dy, Er, Eu, Gd, Fe, Nd, K, Pr, Sm, Tb, Tm, or V.

[00160] Example 31. The method according to any one of claims 26 to 29, wherein forming the first and/or second magnets comprises one or a combination of materials which includes one or more of: a Heusler alloy, Co, Fe, Ni, Gd, B, Ge, Ga, permalloy, or Yttrium Iron Garnet (YIG), and wherein the Heusler alloy is a material which includes one or more of: Cu, Mn, Al, In, Sn, Ni, Sb, Ga, Co, Fe, Si, Pd, Sb, Si, V, or Ru.

[00161] Example 32. The method according to any one of preceding method claims, wherein the piezo-electric structure of the second structure includes one of: Pb, Zr, Ti, O, Bi, Fe, La, Ce, Co, or Sr.

[00162] Example 33. The method according to any one of preceding method claims, wherein forming the first structure comprises: forming a first arrangement comprising Ag, wherein the first arrangement is adjacent to the magnet; and forming a second arrangement including one of: Bi or W, wherein the second arrangement is adjacent to the conductor.

[00163] Example 34. The method according to any one of preceding method claims, wherein forming the conductor comprises forming a material which includes one or more of: Graphene, W, Cu, Ag, Al, or Au.

[00164] Example 35. The method according to any one of preceding method claims, wherein the spin orbit material comprises one or more of: b-Tantalum (b-Ta), Ta, b-Tungsten (b-W), W, Platinum (Pt), Copper (Cu) doped with elements including on of Iridium, Bismuth or elements of 3d, 4d, 5d and 4f, 5f periodic groups, Ti, S, W, Mo, Se, B, Sb, Re, La, C, P, La, As, Sc, O, Bi, Ga, Al, Y, In, Ce, Pr, Nd, F, Ir, Mn, Pd, or Fe.

[00165] Example 36. The method according to any one of preceding method claims comprises coupling a transistor to the magnet structure.

[00166] Example 37. The method o according to any one of preceding method claims, wherein the first and second magnets have in-plane magnetic anisotropy relative to an x-y plane of a device.

[00167] An abstract is provided that will allow the reader to ascertain the nature and gist of the technical disclosure. The abstract is submitted with the understanding that it will not be used to limit the scope or meaning of the claims. The following claims are hereby incorporated into the detailed description, with each claim standing on its own as a separate embodiment.

Claims

CLAIMS We claim:

1. An apparatus comprising:

a magnet structure comprising a first magnet, a second magnet, and a coupling structure between the first and second magnets;

a first structure comprising spin orbit material, wherein a portion of the first structure is adjacent to the magnet structure;

a second structure comprising magnetoelectric material; and

a conductor coupled to at least a portion of the first or second structures.

2. The apparatus of claim 1, wherein the first and second magnets have respective

magnetizations in opposite directions.

3. The apparatus according to any one of claim 1 or 2, wherein the coupling structure

comprises one or more of: Ru, Ir, Cu, Os, Hs, Fe, or other transition metals from a platinum group of the periodic table.

4. The apparatus of claim 1, wherein the first and second magnets are one of a paramagnet or ferromagnet.

5. The apparatus of claim 1, wherein the first or second magnet comprises a material which includes one or more of: Pt, Pd, W, Ce, Al, Li, Mg, Na, Cr, O, Co, Dy, Er, Eu, Gd, Fe,

Nd, K, Pr, Sm, Tb, Tm, or V.

6. The apparatus of claim 1, wherein the first or second magnets comprise one or more of: a Heusler alloy, Co, Fe, Ni, Gd, B, Ge, Ga, permalloy, or Yttrium Iron Garnet (YIG), and wherein the Heusler alloy is a material which includes one or more of: Cu, Mn, Al, In, Sn, Ni, Sb, Ga, Co, Fe, Si, Pd, Sb, Si, V, or Ru.

7. The apparatus of claim 1, wherein the magnetoelectric material of the second structure includes at least one of: Pb, Zr, Ti, O, Bi, Fe, La, Ce, Co, or Sr.

8. The apparatus of claim 1, wherein the first structure comprises:

a first layer comprising Ag; and a second layer including one of: Bi or W, wherein the second layer is adjacent to the conductor.

9. The apparatus of claim 1, wherein the conductor comprises a material which includes one or more of: Graphene, W, Cu, Ag, Al, or Au.

10. The apparatus of claim 1, wherein the spin orbit material comprises one or more of: b- Tantalum (b-Ta), Ta, b-Tungsten (b-W), W, Platinum (Pt), Copper (Cu) doped with elements including on of Iridium, Bismuth or elements of 3d, 4d, 5d and 4f, 5f periodic groups, Ti, S, W, Mo, Se, B, Sb, Re, La, C, P, La, As, Sc, O, Bi, Ga, Al, Y, In, Ce, Pr,

Nd, F, Ir, Mn, Pd, or Fe.

11. The apparatus of claim 1 comprises a transistor coupled to the magnet structure.

12. The apparatus of claim 1, wherein the first and second magnets have in-plane magnetic anisotropy relative to an x-y plane of a device.

13. An apparatus comprising:

a magnet structure having a first portion and a second portion, wherein the magnet comprises a first magnet, a second magnet, and a coupling structure between the first and second magnets;

a first structure, a portion of which is adjacent to the first portion of the magnet structure, wherein the first structure comprises a spin orbit material;

a second structure comprising magnetoelectric material, wherein the second structure is adjacent to the second portion of the magnet structure;

a first conductor adjacent to the second structure; and

a second conductor adjacent to a portion of the first structure.

14. The apparatus of claim 13 comprises:

a second magnet structure having a first portion and a second portion, wherein the second magnet structure comprises a third magnet, a fourth magnet, and a coupling structure between the third and fourth magnets;

a third structure, a portion of which is adjacent to the first portion of the second magnet, wherein the third structure comprises a spin orbit material; a fourth structure comprising magnetoelectric material, wherein the fourth structure is adjacent to the second portion of the second magnet; and

a third conductor adjacent to the fourth structure, wherein a portion of the fourth structure is adjacent to the second conductor.

15. The apparatus of claim 14, wherein the first magnet is substantially parallel to the second magnet, and wherein the third magnet is substantially parallel to the fourth magnet.

16. The apparatus of claim 14, wherein the first and second magnets of the magnet structure have respective magnetizations in substantially opposite directions, and wherein the third and fourth magnets of the second magnet structure have respective magnetizations in substantially opposite directions.

17. The apparatus of claim 13, wherein the coupling structure of the magnet structure

comprises one or more of: Ru, Ir, Cu, Os, or Hs, and wherein the coupling structure of the second magnet structure comprises one or more of: Ru, Ir, Cu, Os, or Hs.

18. The apparatus of claim 13, wherein the magnetoelectric structures of the second or fourth structures includes one or more of: Pb, Zr, Ti, O, Bi, Fe, La, Ce, Co, or Sr.

19. The apparatus of claim 13, wherein the first structure comprises:

a first layer comprising Ag, wherein the first layer of the first structure is adjacent to the magnet structure; and

a second layer including one of: Bi or W, wherein the second layer of the first structure is adjacent to the second conductor.

20. The apparatus of claim 13, wherein the third structure comprises:

a first layer comprising Ag, wherein the first layer of the third structure is adjacent to the second magnet; and

a second layer including one of: Bi or W, wherein the second layer of the third structure is adjacent to the fourth conductor.

21. The apparatus of claim 13, wherein the first, second, third or fourth conductors comprise a material which includes one or more of: Graphene, W, Cu, Ag, Al, or Au.

22. The apparatus according to any one of claims 13 to 20, wherein the spin orbit material comprises one or more of: b-Tantalum (b-Ta), Ta, b-Tungsten (b-W), W, Platinum (Pt), Copper (Cu) doped with elements including on of Iridium, Bismuth or elements of 3d, 4d, 5d and 4f, 5f periodic groups, Ti, S, W, Mo, Se, B, Sb, Re, La, C, P, La, As, Sc, O, Bi,

Ga, Al, Y, In, Ce, Pr, Nd, F, Ir, Mn, Pd, or Fe.

23. The apparatus of claim 13 comprises a first transistor coupled to the magnet structure; and a second transistor coupled to the second magnet structure.

24. The apparatus of claim 13 comprises:

a first transistor coupled to the magnet structure via a contact, wherein the first transistor is controllable by a switching signal, and wherein the first transistor is coupled to a first supply having a first potential voltage; and

a second transistor coupled to the magnet structure via the contact, wherein the second transistor is controllable by the switching signal, and wherein the second transistor is coupled to a second supply having a second potential voltage, wherein the second potential voltage is higher than the first potential voltage, and wherein the first and second transistors are of different conductivity types.

25. A system comprising: a memory; a processor coupled to the memory, the processor

including an apparatus according to any one of apparatus claims 1 to 12 or apparatus claims 13 to 24; and a wireless interface to allow the processor to communicate with another device.