WO2019163276A1

WO2019163276A1 - Semiconductor light-emitting device

Info

Publication number: WO2019163276A1
Application number: PCT/JP2018/046786
Authority: WO
Inventors: 裕幸萩野; 信一郎能崎
Original assignee: パナソニック株式会社
Priority date: 2018-02-26
Filing date: 2018-12-19
Publication date: 2019-08-29
Also published as: JP7232239B2; JPWO2019163276A1

Abstract

This semiconductor light-emitting device (2) comprises: a semiconductor light-emitting element (1) having a substrate (10) and three or more light-emitting sections (71 to 75) aligned to follow the upper surface of the substrate (10); a first base (101) disposed below the lower surface of the substrate (10); and a first adhesive layer (103a) that adheres the semiconductor light-emitting element (1) onto the first base(101). The substrate (10) has a higher thermal conductivity than the first adhesive layer (103a). In the alignment direction of the three or more light-emitting sections (71 to 75), the thickness of the first adhesive layer (103a) is smaller toward the center than toward the two end sections.

Description

Semiconductor light emitting device

The present disclosure relates to a semiconductor light emitting device including an array type semiconductor light emitting element.

In addition, this application is the 2016 New Energy and Industrial Technology Development Organization, "High-brightness and high-efficiency next-generation laser technology development / New light source and element technology development for next-generation processing / for high-efficiency processing" This is a patent application that is subject to Article 19 “Contract research, Industrial Technology Strengthening Law Article 19”, “Development of GaN-based high-power, high-beam quality semiconductor laser”.

In recent years, semiconductor light-emitting elements such as semiconductor laser elements have been used as light sources for image display devices such as displays and projectors, light sources for in-vehicle headlamps, light sources for industrial lighting and consumer lighting, or laser welding devices, thin film annealing devices, and lasers. It attracts attention as a light source for various uses such as a light source for industrial equipment such as processing equipment. In addition, a semiconductor laser element used as a light source for the above applications is desired to have a high output that greatly exceeds 1 watt.

As a technique for increasing the output of a semiconductor laser element, a technique of forming an array by arranging a plurality of wide waveguides in parallel is widely used. In such a high-power semiconductor laser device, a large amount of heat is generated during a high-power operation. Therefore, it is important to efficiently dissipate the heat generated in the waveguide in order to increase the power. Generally, heat is diffused by connecting a material having high thermal conductivity in the vicinity of the waveguide, and the heat is radiated to the outside through a metal package or the like.

Patent Document 1 discloses a conventional array type semiconductor laser element. FIG. 7 is a schematic front view showing a configuration of a conventional array type semiconductor laser device 1010 disclosed in Patent Document 1. In FIG.

As shown in FIG. 7, a conventional array type semiconductor laser device 1010 has a plurality of stripes 1011 to 1014 arranged in a line at a predetermined interval. Each of the plurality of stripes 1011 to 1014 is a light emitting portion that becomes a waveguide of laser light. The array type semiconductor laser element 1010 has a plurality of laser electrodes 1008 provided separately corresponding to each stripe. The plurality of laser electrodes 1008 of the array type semiconductor laser element 1010 are arranged at positions facing the plurality of metal wiring bodies 1007 provided on the support body 1003, respectively. The plurality of laser electrodes 1008 are thermocompression bonded via a plurality of metal wiring bodies 1007 and conductive adhesives 1006 such as solder. Accordingly, the plurality of laser electrodes 1008 and the plurality of metal wiring bodies 1007 are electrically connected, and the array type semiconductor laser element 1010 is physically fixed to the support body 1003. Further, a resin 1009 having good thermal conductivity is filled between the array type semiconductor laser element 1010 and the support 1003.

Japanese Laid-Open Patent Publication No. 1-164084

However, in the case of such a structure, since the heat generated in each waveguide interferes with each other, the temperature distribution of the plurality of waveguides (that is, the light emitting portions) becomes non-uniform. Specifically, among the plurality of waveguides, the temperature of the waveguide located on the center side in the arrangement direction of the plurality of waveguides becomes higher than the temperature of the waveguide located on the end side. As a result, in the conventional array-type semiconductor laser device 1010, the temperature distribution is non-uniform, so that the deterioration of the light output characteristics of the waveguide in the high-temperature portion proceeds faster than the low-temperature portion due to the non-uniform temperature distribution. However, there is a problem of deterioration of reliability that leads to damage of the element.

This disclosure is intended to provide a semiconductor light emitting device that suppresses deterioration in reliability by suppressing nonuniformity of temperature distribution between light emitting portions.

In order to achieve the above object, one aspect of a semiconductor light emitting device according to the present disclosure includes a semiconductor light emitting element including a substrate and three or more light emitting units arranged along an upper surface of the substrate, and the substrate. And a first adhesive layer that bonds the semiconductor light emitting element to the first base, and the substrate has a thermal conductivity higher than that of the first adhesive layer. The thickness of the first adhesive layer is higher at the center side in the arrangement direction of the three or more light emitting portions than at both end portions.

Thus, by reducing the thickness at the center side in the arrangement direction of the first adhesive layer having a lower thermal conductivity than that of the substrate, the heat dissipation at the center side of the first adhesive layer is enhanced from both end portions. Can do. Thereby, it can suppress that the light emission part of the center side of an arrangement direction among three or more light emission parts becomes high temperature rather than the light emission part of both edge parts due to the thermal interference with an adjacent light emission part. . Therefore, since the nonuniformity of the temperature distribution in three or more light emitting units can be suppressed, deterioration of the reliability of the semiconductor light emitting device can be suppressed.

Moreover, in one aspect of the semiconductor light emitting device according to the present disclosure, the thickness of the substrate may be larger than both end portions on the central side in the arrangement direction.

Further, in one aspect of the semiconductor light emitting device according to the present disclosure, the lower surface of the substrate may be inclined so that a central side in the arrangement direction is convex.

Further, in one aspect of the semiconductor light emitting device according to the present disclosure, the upper surface of the substrate may be parallel to a bonding surface with the first adhesive layer of the first base in the arrangement direction.

Thereby, since the propagation direction of the emitted light from the semiconductor light emitting element and the upper surface of the first base are substantially parallel, the upper surface of the first base can be used as a reference for alignment of the optical axis. Therefore, it is possible to realize a semiconductor light emitting device that can easily adjust the optical axis.

Moreover, in one aspect of the semiconductor light emitting device according to the present disclosure, a second base disposed on the opposite side of the first base across the semiconductor light emitting element, and the semiconductor light emitting element in the second A second adhesive layer that adheres to the base.

Thus, in the semiconductor light emitting device according to the present disclosure, both sides of the semiconductor light emitting element are sandwiched between the bases. Therefore, the heat dissipation of the semiconductor light emitting device can be further improved by forming each base with a member having high thermal conductivity.

Moreover, in one aspect of the semiconductor light emitting device according to the present disclosure, the first base may have a thermal conductivity higher than that of the first adhesive layer.

In order to achieve the above object, one aspect of a semiconductor light emitting device according to the present disclosure includes a semiconductor light emitting element including a substrate and three or more light emitting units arranged along an upper surface of the substrate, and the substrate. And a first adhesive layer that adheres the semiconductor light-emitting element to the first base, the first base being more heated than the first adhesive layer. The conductivity is high, and the thickness of the first adhesive layer is smaller than both end portions on the center side in the arrangement direction of the three or more light emitting portions.

Thus, by reducing the thickness at the center side in the arrangement direction of the first adhesive layer having a lower thermal conductivity than the first base, the heat dissipation at the center side of the first adhesive layer is reduced at both end sides. Can be increased. Thereby, it can suppress that the light emission part of the center side of an arrangement direction among three or more light emission parts becomes high temperature rather than the light emission part of both edge parts due to the thermal interference with an adjacent light emission part. . Therefore, since the nonuniformity of the temperature distribution in three or more light emitting units can be suppressed, deterioration of the reliability of the semiconductor light emitting device can be suppressed.

Also, in one aspect of the semiconductor light emitting device according to the present disclosure, the thickness of the first base may be larger than both end portions on the center side in the arrangement direction.

According to the present disclosure, deterioration in reliability can be suppressed by suppressing nonuniformity of the temperature distribution between the light emitting units.

FIG. 1A is a schematic top view illustrating a configuration of a semiconductor light emitting element according to an embodiment. FIG. 1B is a schematic cross-sectional view showing the configuration of the semiconductor light emitting element according to the embodiment. FIG. 2A is a cross-sectional view illustrating a process of forming each of the first semiconductor layer, the light emitting layer, and the second semiconductor layer in the method for manufacturing a semiconductor light emitting element according to the embodiment. FIG. 2B is a cross-sectional view showing a step of forming a first protective film in the method for manufacturing a semiconductor light emitting element according to the embodiment. FIG. 2C is a cross-sectional view showing a step of patterning the first protective film in the method for manufacturing the semiconductor light emitting device according to the embodiment. FIG. 2D is a cross-sectional view illustrating a process of forming a waveguide portion and a flat portion in the method for manufacturing a semiconductor light emitting element according to the embodiment. FIG. 2E is a cross-sectional view showing a step of forming a dielectric layer in the method for manufacturing a semiconductor light emitting device according to the embodiment. FIG. 2F is a cross-sectional view showing the step of forming the p-side electrode in the method for manufacturing the semiconductor light emitting device according to the embodiment. FIG. 2G is a cross-sectional view showing a step of forming a pad electrode in the method for manufacturing a semiconductor light emitting device according to the embodiment. FIG. 2H is a cross-sectional view showing a step of forming a convex shape on the lower surface of the substrate in the method for manufacturing a semiconductor light emitting element according to the embodiment. FIG. 2I is a cross-sectional view illustrating a process of forming an n-side electrode in the method for manufacturing a semiconductor light emitting device according to the embodiment. FIG. 3A is a schematic cross-sectional view showing the configuration of the semiconductor light emitting device according to the embodiment. FIG. 3B is a schematic cross-sectional view illustrating a configuration of a semiconductor light emitting device according to a modification of the embodiment. FIG. 4 is a graph showing an outline of the temperature of each waveguide portion of the semiconductor light emitting device according to the embodiment. FIG. 5A is a schematic cross-sectional view illustrating a configuration of a semiconductor light emitting device according to Modification 1. FIG. 5B is a schematic cross-sectional view illustrating a configuration of a semiconductor light emitting device according to Modification 2. FIG. 5C is a schematic cross-sectional view illustrating a configuration of a semiconductor light emitting device according to Modification 3. FIG. 5D is a schematic cross-sectional view illustrating a configuration of a semiconductor light emitting device according to Modification 4. FIG. 6 is a schematic cross-sectional view showing a configuration of a semiconductor light emitting device according to Modification 5. FIG. 7 is a schematic front view showing a configuration of a conventional array type semiconductor laser device.

Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. Note that each of the embodiments described below shows a preferred specific example of the present disclosure. Therefore, the numerical values, shapes, materials, components, component arrangement positions and connection forms, steps (steps) and order of steps, and the like shown in the following embodiments are merely examples and limit the present disclosure. It is not the purpose to do. Therefore, among the constituent elements in the following embodiments, constituent elements that are not described in the independent claims indicating the highest concept of the present disclosure are described as arbitrary constituent elements.

Each figure is a schematic diagram and is not necessarily shown strictly. Accordingly, the scales and the like do not necessarily match in each drawing. In each figure, substantially the same components are denoted by the same reference numerals, and redundant descriptions are omitted or simplified.

In the present specification and drawings, the X axis, the Y axis, and the Z axis represent the three axes of the three-dimensional orthogonal coordinate system. The X axis and the Y axis are orthogonal to each other, and both are orthogonal to the Z axis.

(Embodiment)
A semiconductor light emitting device according to an embodiment will be described.

[Configuration of Semiconductor Light Emitting Element]
First, the structure of the semiconductor light emitting element included in the semiconductor light emitting device according to this embodiment will be described with reference to FIGS. 1A and 1B. 1A and 1B are a schematic top view and a cross-sectional view showing the configuration of the semiconductor light emitting device 1 according to the present embodiment, respectively. 1B is a cross-sectional view of the semiconductor light emitting device 1 taken along the line IB-IB in FIG. 1A.

The semiconductor light emitting element 1 according to the present embodiment is an element having a substrate 10 and three or more light emitting units arranged along the upper surface of the substrate 10. As shown in FIG. 1B, in the present embodiment, the semiconductor light emitting element 1 has five light emitting portions 71 to 75 arranged in the X-axis direction of FIG. 1B along the main surface of the substrate 10. The arrangement direction of the five light emitting units 71 to 75 coincides with the X-axis direction shown in each drawing. Hereinafter, the arrangement direction of the five light emitting portions 71 to 75 is also simply referred to as “the arrangement direction”. In the present embodiment, the semiconductor light emitting device 1 is a semiconductor laser device including a nitride semiconductor material. As shown in FIG. 1B, the substrate 10, the first semiconductor layer 20, the light emitting layer 30, and the second A semiconductor layer 40, an electrode member 50, a dielectric layer 60, and an n-side electrode 80 are provided.

As shown in FIG. 1B, the second semiconductor layer 40 includes waveguide portions 40a1 to 40a5 composed of stripe-shaped convex portions extending in the laser resonator length direction (Y-axis direction in FIG. 1B), and each waveguide portion. And a flat portion 40b extending in the horizontal direction (in other words, in the X-axis direction in FIG. 1B). The positions of the waveguide portions 40a1 to 40a5 correspond to the positions of the light emitting portions 71 to 75, respectively.

The number of waveguide portions provided in the semiconductor light emitting device 1 may be three or more, and may be five or more in order to operate the semiconductor light emitting device 1 with high light output (for example, watt class). . In the present embodiment, the semiconductor light emitting element 1 has five waveguide portions 40a1 to 40a5. The waveguide portions 40a1 to 40a5 are arranged in parallel to each other. Thereby, light is emitted in the same direction from each light emitting part corresponding to each waveguide part.

The width and interval of each waveguide part (the distance between the centers of each waveguide part) are not particularly limited. For example, the width of each waveguide portion in the X-axis direction is 1 μm or more and 100 μm or less, and the interval between adjacent waveguide portions is 50 μm or more and 1000 μm or less. In order to operate the semiconductor light emitting device 1 with a high light output (for example, watt class), the width of each waveguide portion may be 10 μm or more and 50 μm or less, and the interval between adjacent waveguide portions may be 300 μm or more and 500 μm or less. In the present embodiment, the width of each waveguide portion is 30 μm and the interval is 400 μm. Further, the intervals between the waveguide portions need not be equal in the semiconductor light emitting device 1. In consideration of the influence of temperature distribution, stress, etc. in the semiconductor light emitting device 1, the intervals between the waveguide portions may be made non-uniform.

The height of each waveguide part is not particularly limited, but as an example, it is 100 nm or more and 1 μm or less. In order to operate the semiconductor light emitting element 1 with a high light output (for example, watt class), the semiconductor light emitting element 1 may have a thickness of 300 nm to 800 nm. In the present embodiment, the height of each waveguide portion is 600 nm.

The substrate 10 is, for example, a GaN substrate. In the present embodiment, an n-type hexagonal GaN substrate whose main surface is a (0001) plane is used as the substrate 10.

The first semiconductor layer 20 is disposed above the substrate 10. The first semiconductor layer 20 is an n-side cladding layer made of n-type AlGaN, for example.

The light emitting layer 30 is disposed above the first semiconductor layer 20. The light emitting layer 30 is made of a nitride semiconductor. For example, as shown in FIG. 1B, the light emitting layer 30 includes, in order from the first semiconductor layer 20 side, an n-side light guide layer 31 made of n-GaN, an active layer 32 made of an InGaN quantum well layer, and p-GaN. The p-side light guide layer 33 is made of a laminated structure. The light emitting layer 30 includes light emitting portions 71 to 75. The light emitting portions 71 to 75 are portions disposed at positions corresponding to the waveguide portions 40a1 to 40a5, and are portions where most of the light emitted from the semiconductor light emitting element 1 is generated and propagated. In the present embodiment, each light emitting section is arranged below each waveguide section (that is, the lower side in FIG. 1B). The width of each light emitting section (that is, the width in the X-axis direction in FIG. 1B) is approximately the same as the width of each waveguide section (that is, the width in the X-axis direction in FIG. 1B). Note that light may be generated or propagated in portions other than the light emitting portions 71 to 75.

The second semiconductor layer 40 is disposed above the light emitting layer 30. For example, as illustrated in FIG. 1B, the second semiconductor layer 40 includes, in order from the light emitting layer 30 side, an electron barrier layer 41 made of AlGaN, a p-side cladding layer 42 made of a p-type AlGaN layer, and p-type GaN. A p-side contact layer 43 is laminated. The p-side contact layer 43 is formed as the uppermost layer of the waveguide portions 40a1 to 40a5.

These layers can be formed with a substantially uniform film thickness by adjusting the growth conditions.

As shown in FIG. 1B, the p-side cladding layer 42 has a convex portion. The convex portions of the p-side cladding layer 42 and the p-side contact layer 43 constitute striped waveguide portions 40a1 to 40a5. The p-side cladding layer 42 has a flat portion as a flat portion 40b on both sides of each waveguide portion. That is, the uppermost surface of the flat portion 40b is the surface of the p-side cladding layer 42, and the p-side contact layer 43 is not formed on the uppermost surface of the flat portion 40b.

The electrode member 50 is disposed above the second semiconductor layer 40. The electrode member 50 is wider than each waveguide part. That is, the width of the electrode member 50 (width in the X-axis direction) is larger than the width of each waveguide portion (width in the X-axis direction). The electrode member 50 is in contact with the dielectric layer 60 and the upper surface of each waveguide portion.

In the present embodiment, the electrode member 50 includes a p-side electrode 51 for supplying a current to each light emitting portion, and a pad electrode 52 disposed above the p-side electrode 51.

The p-side electrode 51 is in contact with the upper surface of each waveguide part. The p-side electrode 51 is an ohmic electrode that is in ohmic contact with the p-side contact layer 43 above each waveguide portion, and is in contact with the upper surface of the p-side contact layer 43 that is the upper surface of each waveguide portion. The p-side electrode 51 is formed using a metal material such as Pd, Pt, or Ni, for example. In the present embodiment, the p-side electrode 51 has a two-layer structure of Pd / Pt.

The pad electrode 52 is wider than each waveguide part and is in contact with the dielectric layer 60. That is, the pad electrode 52 is formed so as to cover each waveguide part and the dielectric layer 60. The pad electrode 52 is formed using a metal material such as Ti, Ni, Pt, or Au, for example. In the present embodiment, the pad electrode 52 has a three-layer structure of Ti / Pt / Au.

As shown in FIG. 1A, the pad electrode 52 is formed on the inner side of the dielectric layer 60 (that is, the first electrode) in the top view of the semiconductor light emitting device 1 in order to improve the yield when the semiconductor light emitting device 1 is separated. 2 inside the semiconductor layer 40). That is, when the semiconductor light emitting element 1 is viewed from above, the pad electrode 52 is not formed on the peripheral edge of the semiconductor light emitting element 1. Thereby, the semiconductor light emitting device 1 has a non-current injection region where no current is supplied to the periphery of the end portion. Moreover, the cross-sectional shape perpendicular | vertical to the longitudinal direction (namely, Y-axis direction) of each waveguide part of the area | region in which the pad electrode 52 is formed becomes a shape shown by FIG. 1B in any part.

The dielectric layer 60 is an insulating film disposed on the side surface of each waveguide portion in order to confine light. Specifically, the dielectric layer 60 is continuously formed from the side surface (that is, the surface intersecting the X-axis direction in FIG. 1B) of each waveguide portion to the flat portion 40b. In the present embodiment, the dielectric layer 60 is continuous over the side surface of the p-side contact layer 43, the side surface of the convex portion of the p-side cladding layer 42, and the upper surface of the p-side cladding layer 42 around each waveguide portion. Is formed. In this embodiment, the dielectric layer 60 is formed of SiO _2.

The shape of the dielectric layer 60 is not particularly limited, but the dielectric layer 60 may be in contact with the side surface of each waveguide portion and the flat portion 40b. Thereby, it is possible to stably confine light emitted directly under each waveguide portion.

Also, in a semiconductor light emitting device intended to operate with high light output (that is, high output operation), an end face coating film such as a dielectric multilayer film is formed on the light emitting end face. This end face coating film is difficult to be formed only on the end face, and also extends around the upper surface of the semiconductor light emitting element 1. In this case, since the pad electrode 52 is not formed at the end of the semiconductor light emitting element 1 in the laser resonator length direction (that is, the Y-axis direction in FIGS. 1A and 1B), the end face coat film does not reach the upper surface. As a result, the dielectric layer 60 and the end face coating film may be in contact with each other at the end in the longitudinal direction of the semiconductor light emitting device 1. At this time, if the dielectric layer 60 is not formed or if the film thickness of the dielectric layer 60 is thin relative to the optical confinement, it is affected by the end face coating film, which causes light loss. Therefore, in order to sufficiently confine the light generated in the light emitting layer 30, the film thickness of the dielectric layer 60 may be 100 nm or more. On the other hand, if the dielectric layer 60 is too thick, it is difficult to form the pad electrode 52. Therefore, the thickness of the dielectric layer 60 may be less than the height of each waveguide portion.

In addition, etching damage may remain on the side surface and the flat portion 40b of each waveguide portion in the etching process when forming each waveguide portion, resulting in leakage current. However, in the present embodiment, generation of unnecessary leakage current can be reduced by covering each waveguide portion and the flat portion 40b with the dielectric layer 60.

The n-side electrode 80 is an electrode disposed below the substrate 10 and is an ohmic electrode in ohmic contact with the substrate 10. The n-side electrode 80 is a laminated film made of Ti / Pt / Au, for example. The configuration of the n-side electrode 80 is not limited to this. The n-side electrode 80 may be a laminated film in which Ti and Au are laminated.

As shown in FIG. 1B, the thickness of the substrate 10 varies depending on the position of the waveguide portions 40a1 to 40a5 in the arrangement direction (X-axis direction). In this embodiment, the thickness of the substrate 10 immediately below each waveguide portion is defined as d1, d2, d3, d4, and d5 in order from directly below the leftmost waveguide portion. In other words, the thickness of the substrate 10 immediately below the light emitting portions 71 to 75 is defined as d1 to d5, respectively. The substrate thickness immediately below each waveguide portion is perpendicular to the boundary surface between the substrate 10 and the first semiconductor layer 20 through the center in the width direction (X-axis direction) of each waveguide portion (or each light emitting portion). This is the distance on the line from the boundary between the substrate 10 and the first semiconductor layer 20 to the boundary between the substrate 10 and the n-side electrode 80. In the present embodiment, the thickness of the substrate 10 is between the leftmost waveguide portion 40a1 and the central waveguide portion 40a3, and between the rightmost waveguide portion 40a5 and the central waveguide portion 40a3. Changes continuously, and there is a relationship of d3> d1 and d3> d5. That is, the thickness of the substrate 10 is larger than both end portions on the center side in the arrangement direction. Further, the lower surface of the substrate 10 (the lower surface in FIG. 1B) is inclined so that the central side in the arrangement direction is convex. The operation and effect of the semiconductor light emitting device 1 having the substrate 10 as described above will be described later.

[Method for Manufacturing Semiconductor Light-Emitting Element]
Next, a method for manufacturing the semiconductor light emitting device 1 according to the embodiment will be described with reference to FIGS. 2A to 2I. 2A to 2I are cross-sectional views showing each step in the method for manufacturing the semiconductor light emitting device 1 according to the embodiment.

First, as shown in FIG. 2A, on a substrate 10 which is an n-type hexagonal GaN substrate having a (0001) plane as a main surface, using an organic metal vapor deposition method (MOCVD method), The first semiconductor layer 20, the light emitting layer 30, and the second semiconductor layer 40 are sequentially formed.

Specifically, an n-side cladding layer made of n-type AlGaN is grown as a first semiconductor layer 20 on the substrate 10 having a thickness of 400 μm by 3 μm. Subsequently, an n-side light guide layer 31 made of n-GaN is grown by 0.1 μm. Subsequently, an active layer 32 having three periods of a barrier layer made of InGaN and an InGaN quantum well layer is grown. Subsequently, a p-side light guide layer 33 made of p-GaN is grown by 0.1 μm. Subsequently, an electron barrier layer 41 made of AlGaN is grown by 10 nm. Subsequently, a p-side cladding layer 42 made of a strained superlattice having a thickness of 0.48 μm formed by repeating a 160-cycle p-AlGaN layer having a thickness of 1.5 nm and a GaN layer having a thickness of 1.5 nm is grown. Subsequently, a p-side contact layer 43 made of p-GaN is grown by 0.05 μm. Here, in each layer, for example, trimethylgallium (TMG), trimethylammonium (TMA), and trimethylindium (TMI) are used as organometallic raw materials containing Ga, Al, and In, respectively. In addition, ammonia (NH ₃ ) is used as the nitrogen raw material.

Next, as shown in FIG. 2B, a first protective film 91 is formed on the second semiconductor layer 40. Specifically, a 300 nm thick silicon oxide film (SiO ₂ ) is formed as the first protective film 91 on the p-side contact layer 43 by plasma CVD (Chemical Vapor Deposition) using silane (SiH ₄ ). To do.

The film formation method of the first protective film 91 is not limited to the plasma CVD method. For example, a known film formation method such as a thermal CVD method, a sputtering method, a vacuum evaporation method, or a pulse laser film formation method is used. Can be used. In addition, the material for forming the first protective film 91 is not limited to the above, and for example, a second semiconductor layer 40 (a p-side cladding layer 42 and a p-side contact layer 43) described later, such as a dielectric or a metal. Any material may be used as long as it is selective with respect to the etching.

Next, as shown in FIG. 2C, the first protective film 91 is selectively removed by using a photolithography method and an etching method so that the first protective film 91 remains in a strip shape. As an etching method, for example, dry etching by reactive ion etching (RIE) using a fluorine-based gas such as CF ₄ or wet etching using hydrofluoric acid (HF) diluted to about 1:10 is used. Can be used.

Next, as shown in FIG. 2D, the p-side contact layer 43 and the p-side cladding layer 42 are etched using the first protective film 91 formed in a band shape as a mask, so that the waveguide portion is formed in the second semiconductor layer 40. 40a1 to 40a5 and a flat portion 40b are formed. As the etching of the p-side contact layer 43 and the p-side cladding layer 42, dry etching by RIE using a chlorine-based gas such as Cl ₂ may be used.

Next, as shown in FIG. 2E, the strip-shaped first protective film 91 is removed by wet etching using hydrofluoric acid or the like, and then the dielectric is formed so as to cover the p-side contact layer 43 and the p-side cladding layer 42. The body layer 60 is formed. That is, the dielectric layer 60 is formed on the waveguide portions 40a1 to 40a5 and the flat portion 40b. As the dielectric layer 60, for example, a silicon oxide film (SiO ₂ ) having a thickness of 300 nm is formed by a plasma CVD method using silane (SiH ₄ ).

The film formation method of the dielectric layer 60 is not limited to the plasma CVD method, and a film formation method such as a thermal CVD method, a sputtering method, a vacuum deposition method, or a pulse laser film formation method may be used.

Next, as shown in FIG. 2F, only the dielectric layer 60 on the waveguide portions 40a1 to 40a5 is removed by photolithography and wet etching using hydrofluoric acid, and the p-side contact layer 43 is removed. Expose the top surface. Thereafter, the p-side electrode 51 made of Pd / Pt is formed only on the waveguide portions 40a1 to 40a5 by using a vacuum deposition method and a lift-off method. Specifically, the p-side electrode 51 is formed on the p-side contact layer 43 exposed from the dielectric layer 60.

In addition, the film formation method of the p-side electrode 51 is not limited to the vacuum evaporation method, and may be a sputtering method or a pulse laser film formation method. The electrode material of the p-side electrode 51 may be any material that is in ohmic contact with the second semiconductor layer 40 (p-side contact layer 43), such as Ni / Au or Pt.

Next, as shown in FIG. 2G, a pad electrode 52 is formed so as to cover the p-side electrode 51 and the dielectric layer 60. Specifically, a resist is patterned on a portion other than a portion to be formed by a photolithography method or the like, and a pad electrode 52 made of Ti / Pt / Au is formed on the entire upper surface of the substrate 10 by a vacuum deposition method or the like. Use to remove unnecessary portions of the electrode. Thereby, a pad electrode 52 having a predetermined shape can be formed on the p-side electrode 51 and the dielectric layer 60. As described above, the electrode member 50 including the p-side electrode 51 and the pad electrode 52 is formed.

Next, as shown in FIG. 2H, the substrate 10 is thinned. This is for the purpose of facilitating singulation and improving heat dissipation. The substrate 10 can be thinned by physical and chemical polishing using abrasive grains and a chemical solution. In the present embodiment, the substrate 10 having a thickness of 400 μm is thinned to a thickness of about 85 μm. At this time, the thickness distribution of the substrate can be controlled by installing the substrate 10 obliquely with respect to the polishing surface. Specifically, the substrate was polished with an inclination of about 0.1 degree with respect to the polishing table so that the center portion of the substrate was about 3 μm thicker than the end portion of the substrate. In this embodiment, the substrate thicknesses (d1 to d5) defined in FIG. 1B are set to d1 = 85 μm, d2 = 87 μm, d3 = 88 μm, d4 = 86 μm, and d5 = 84 μm by polishing. Thus, a convex shape can be formed on the lower surface of the substrate 10.

It should be noted that the substrate thickness distribution can be adjusted by a method other than polishing, for example, dry etching. Plasma is generated by applying a high voltage to the reactive gas, and etching proceeds when ions or radicals in the plasma collide with the wafer. At this time, if there is a difference in plasma density or energy, the etching amount can be adjusted according to the position of the substrate 10.

For example, the etching amount can be adjusted according to the position of the substrate 10 by supplying the gas to be supplied from the edge of the wafer and exhausting it from the center of the wafer. In this method, a lot of plasma is generated on the upstream side of the gas supply and decreases on the downstream side. As a result, a large amount of etching proceeds on the upstream side and a small amount proceeds on the downstream side.

As another method, even when the gas supply is made uniform, the etching amount can be adjusted according to the position of the substrate 10 by changing the distribution of the applied high voltage. For example, the etching amount can be changed in accordance with the position of the substrate 10 by applying a high voltage to the edge of the wafer and applying a voltage lower than this at the center.

Next, as shown in FIG. 2I, an n-side electrode 80 is formed on the lower surface of the substrate 10. Specifically, an n-side electrode 80 made of Ti / Pt / Au is formed on the back surface of the substrate 10 by vacuum deposition or the like, and patterned by using a photolithography method and an etching method, whereby an n-side electrode having a predetermined shape is formed. 80 is formed. Thereby, the semiconductor light emitting element 1 according to the present embodiment can be manufactured.

[Semiconductor light emitting device]
Next, a semiconductor light emitting device on which the semiconductor light emitting element 1 according to the present embodiment is mounted will be described with reference to FIG. 3A. FIG. 3A is a schematic cross-sectional view showing the configuration of the semiconductor light emitting device 2 according to the present embodiment. As shown in FIG. 3A, the semiconductor light emitting device 2 includes a semiconductor light emitting element 1 and a submount 100. The submount 100 includes a first base 101, a first electrode 102a, a third electrode 102b, a first adhesive layer 103a, and a third adhesive layer 103b.

The first base is a base disposed below the substrate 10 of the semiconductor light emitting element 1 and functions as a heat sink. The material of the first base 101 is not particularly limited, but ceramics such as aluminum nitride (AlN) and silicon carbide (SiC), diamond (C) formed by CVD, Cu, Al, etc. The metal may be composed of a material having a thermal conductivity equivalent to or higher than that of the semiconductor light emitting device 1 such as a simple metal or an alloy such as CuW.

The first electrode 102 a is disposed on one surface of the first base 101. The third electrode 102 b is disposed on the other surface of the first base 101. In the present embodiment, the first electrode 102 a is disposed on the surface of the first base 101 on the semiconductor light emitting element 1 side. The first electrode 102a and the third electrode 102b are, for example, a laminated film composed of three metal films of Ti having a thickness of 0.1 μm, Pt having a thickness of 0.2 μm, and Au having a thickness of 0.2 μm.

The first adhesive layer 103a is an adhesive layer that adheres the semiconductor light emitting element 1 to the first base. The first adhesive layer 103a is disposed above the first electrode 102a. The third adhesive layer 103b is formed above the third electrode 102b. The first adhesive layer 103a and the third adhesive layer 103b are eutectic solder made of a gold-tin alloy containing, for example, 70% and 30% content of Au and Sn, respectively. In the present embodiment, the maximum thickness of the first adhesive layer 103a and the third adhesive layer 103b is about 6 μm. The first adhesive layer 103 a has a lower thermal conductivity than the substrate 10 and the first base 101 of the semiconductor light emitting device 1.

The semiconductor light emitting device 1 is mounted on the submount 100. In the present embodiment, since the surface on the n-side electrode 80 side of the semiconductor light-emitting element 1 is connected to the submount 100, that is, junction-up mounting, the n-side electrode 80 of the semiconductor light-emitting element 1 is connected to the submount 100. To the first adhesive layer 103a. Here, the upper surface of the substrate 10 of the semiconductor light emitting element 1 is parallel to the bonding surface of the first base 101 with the first adhesive layer 103a in the arrangement direction of the light emitting portions 71 to 75. Thereby, since the propagation direction of the emitted light from the semiconductor light emitting element 1 and the upper surface of the first base 101 are substantially parallel, the upper surface of the first base 101 can be used as a reference for alignment of the optical axis. For this reason, the semiconductor light-emitting device 2 with easy optical axis adjustment is realizable.

As shown in FIG. 1B, the thickness d3 of the substrate 10 immediately below the waveguide section 40a3 at the center in the arrangement direction, the thickness d5 immediately below the waveguide section 40a5 at the right end, and the thickness d1 directly below the waveguide section 40a1 at the left end. There is a relationship between d3> d1 and d3> d5. Here, as shown in FIG. 3A, the thickness of the first adhesive layer 103a immediately below the five waveguide portions 40a1 to 40a5 (that is, immediately below the light emitting portions 71 to 75) is set to s1, s2, s3 in order from the left. , S4 and s5. In this embodiment, s1 = 4.2 μm, s2 = 2.1 μm, s3 = 1.0 μm, s4 = 2.9 μm, and s5 = 4.8 μm. There is a relationship of s3 <s1 and s3 <s5 between s1, s3, and s5. That is, the thickness s3 of the first adhesive layer 103a at the center is thinner than the thicknesses s1 and s5 of the first adhesive layer 103a at the end. Further, the thickness of the first adhesive layer 103 a is thicker than the difference in thickness between the center portion of the substrate 10 and the end portion of the substrate 10. Note that, as in the present embodiment, when mounting on the first adhesive layer 103a using gold tin solder, the gold tin solder causes a eutectic reaction with the gold of the n-side electrode 80 and the gold of the first electrode 102a. , It may be difficult to determine the boundary. In this case, the thickness of the first adhesive layer 103a here is a layer that does not eutectic react with gold tin of the first electrode 102a from a layer that does not eutectic react with gold tin of the n-side electrode 80 (for example, Pt). It is defined as the distance to (for example, Pt). Although not shown, the submount 100 is mounted on, for example, a metal package for the purpose of improving heat dissipation and simplifying handling. That is, it adheres to the metal package by the third adhesive layer 103b. Note that the first base 101 itself may function as a package. In this case, the submount 100 may not include the third adhesive layer 103b.

Further, in the semiconductor light emitting device 2 shown in FIG. 3A, the semiconductor light emitting element 1 is junction-up mounted, but a mounting form in which the electrode member 50 side of the semiconductor light emitting element 1 is connected to the submount 100, that is, junction down mounting is applied. May be. Hereinafter, such an implementation will be described with reference to FIG. 3B.

FIG. 3B is a schematic cross-sectional view showing a configuration of a semiconductor light emitting device 3 according to a modification of the present embodiment. As shown in FIG. 3B, the semiconductor light emitting device 3 according to this modification includes a semiconductor light emitting element 1, a submount 300, and a heat dissipation part 200. The submount 300 includes a second base 301, a second electrode 302a, a fourth electrode 302b, a second adhesive layer 303a, and a fourth adhesive layer 303b. The heat radiating unit 200 includes a first base 201 and a first adhesive layer 203.

The first base 201 is a base disposed below (upper side of FIG. 3B) below the lower surface (upper side surface of FIG. 3B) of the substrate 10 of the semiconductor light emitting element 1. The first adhesive layer 203 is an adhesive layer that adheres the semiconductor light emitting element 1 to the first base 201.

The second base 301 is a base disposed on the opposite side of the first base 201 with the semiconductor light emitting element 1 interposed therebetween. The second adhesive layer 303 a is an adhesive layer that adheres the semiconductor light emitting element 1 to the second base 301. The second electrode 302 a is disposed on one surface of the second base 301. The fourth electrode 302b is disposed on the other surface of the second base 301. In the present embodiment, the second electrode 302a is disposed on the surface of the second base 301 on the semiconductor light emitting element 1 side.

The second base 301 and the first base 201 according to this modification have the same configuration as the first base 101 of the semiconductor light emitting device 2. Further, the second electrode 302a and the fourth electrode 302b according to this modification have the same configuration as the first electrode 102a and the third electrode 102b of the semiconductor light emitting device 2. The fourth adhesive layer 303b has the same configuration as the third adhesive layer 103b of the semiconductor light emitting device 2.

In the semiconductor light emitting device 3, the electrode member 50 of the semiconductor light emitting element 1 is connected to the second adhesive layer 303 a of the submount 300. As described above, by mounting the semiconductor light emitting element 1 in a junction-down manner, the electrode member 50 side close to the heat source is connected to the submount 300, so that the heat dissipation of the semiconductor light emitting element 1 can be improved. The second adhesive layer 303a is eutectic solder having a maximum thickness of about 3 μm made of, for example, a gold-tin alloy of Au (70%) and Sn (30%). Furthermore, in order to improve heat dissipation, the heat dissipation part 200 is also connected to the n-side electrode 80 side. A first adhesive layer 203 is formed on one surface of the heat radiating portion 200, and the first adhesive layer 203 is connected to the n-side electrode 80. Thus, the heat dissipation of the semiconductor light-emitting device 3 can be improved by sandwiching both sides of the semiconductor light-emitting element 1 with a material having high thermal conductivity.

In the present modification, the thickness of the first adhesive layer 203 to which the n-side electrode 80 of the semiconductor light emitting element 1 is connected differs between the center portion and the end portion. As shown in FIG. 3B, the thickness of the first adhesive layer 203 is defined as w1, w2, w3, w4, and w5. The thickness (d1 to d5) of the substrate 10 is the same as that of the semiconductor light emitting device 2. In this modification, w1 = 4.3 μm, w2 = 2.2 μm, w3 = 1.2 μm, w4 = 3.1 μm, and w5 = 5.1 μm.

For example, as in the semiconductor light emitting device 2, the first adhesive layer 203 is formed on a laminated film composed of three metal films of Ti having a thickness of 0.1 μm, Pt having a thickness of 0.2 μm, and Au having a thickness of 0.2 μm. Further, a eutectic solder having a maximum thickness of about 6 μm made of a gold-tin alloy containing Au and Sn at a content of 70% and 30%, respectively, is formed. In this case, since the n-side electrode 80 and the heat dissipation part 200 can be firmly connected, the heat from the semiconductor light emitting element 1 can be efficiently exhausted. Further, as the first adhesive layer 203, for example, a soft material such as gold for the first base 201 and the substrate 10 can be used. In this case, since the first adhesive layer 203 and the n-side electrode 80 are only in contact with each other, the semiconductor light emitting device 1 cannot be fixed, but heat from the laser can be exhausted. Further, in this configuration, unnecessary stress applied to the semiconductor light emitting element can be reduced, so that reliability is improved.

In this embodiment, a gold-tin alloy is shown as the material of each adhesive layer. However, the substrate 10, the

first bases

101 and 201, and the second base, such as Sn—Ag series and Sn—Cu series solder, are shown. As long as the material has a lower thermal conductivity than that of the table 301, a material used for known semiconductor bonding may be used.

[Effects of semiconductor light emitting device]
Next, functions and effects of the semiconductor light emitting device 2 according to the present embodiment will be described with reference to FIG. FIG. 4 is a graph showing an outline of the temperature of each waveguide portion of the semiconductor light emitting device 2 according to the embodiment. In FIG. 4, the temperature of each waveguide part of the semiconductor light emitting element 1 in the semiconductor light emitting device 2 according to the present embodiment is indicated by a solid line, and the semiconductor of the comparative example having the configuration described in Patent Document 1 The temperature of each waveguide part of the light emitting device is indicated by a broken line. In the semiconductor light emitting device of the comparative example, as indicated by a broken line in FIG. 4, the temperature of the central waveguide portion 40a3 is higher than the temperature of the end waveguide portion. This is because the waveguide portion closer to the center is affected by the heat generated in the outer waveguide portion.

On the other hand, as described above, the semiconductor light emitting device according to the present embodiment includes the semiconductor light emitting element 1, the first base 101 disposed below the lower surface of the substrate 10, and the semiconductor light emitting element 1 as the first. A first adhesive layer 103a that adheres to the base 101. Further, the substrate 10 has higher thermal conductivity than the first adhesive layer 103a, and the thickness of the first adhesive layer 103a is smaller than both end portions on the center side in the arrangement direction of three or more light emitting portions.

Thus, by reducing the thickness of the first adhesive layer 103a having a lower thermal conductivity than that of the substrate 10 on the center side in the arrangement direction, the heat dissipation on the center side of the first adhesive layer 103a is reduced on both end sides. Can be increased. As a result, among the three or more light emitting portions 71 to 75, the light emitting portion on the center side in the arrangement direction becomes higher in temperature than the light emitting portions on both end sides due to thermal interference with the adjacent light emitting portions. Can be suppressed. For this reason, as shown by a solid line in FIG. 4, a substantially uniform temperature distribution can be realized by lowering the temperature of the central waveguide portion in the arrangement direction.

This effect will be explained more specifically. The first adhesive layer 103a is made of a gold-tin alloy and has a thermal conductivity of 57 W / m · K. The substrate 10 is made of GaN, and its thermal conductivity is 200 W / m · K. Since the first adhesive layer 103a used for bonding in this manner has a lower thermal conductivity than the substrate 10, the heat dissipation improves as the first adhesive layer 103a becomes thinner. On the other hand, in order to maintain the bonding strength between the semiconductor light emitting element 1 and the first base 101, the first adhesive layer 103a needs to have a certain thickness, and thus the first adhesive layer 103a is uniformly thinned. It is not possible. Therefore, in the present embodiment, by thickening the central portion of the substrate 10 having a higher thermal conductivity than the first adhesive layer 103a, the first adhesive layer 103a immediately below is thinned, and only the central portion in the arrangement direction has heat dissipation properties. It is improving. The same effect can be obtained also in the semiconductor light emitting device 3 according to the above-described modified example in which both sides of the semiconductor light emitting element 1 are sandwiched. In the semiconductor light emitting device 3, the temperature distribution is made uniform by reducing the thickness of the first adhesive layer 203 at the center in the arrangement direction.

As described above, in the semiconductor light emitting device 2 according to the present embodiment and the semiconductor light emitting device 3 according to the modification, it is possible to suppress nonuniform temperature distribution in three or more light emitting units, and thus the reliability of the semiconductor light emitting device is improved. Deterioration can be suppressed.

(Modification)
Although the semiconductor light emitting device according to the present disclosure has been described based on the embodiments and the modifications, the present disclosure is not limited to the above embodiments and the like.

For example, it is possible to arbitrarily combine the components and functions in the embodiments and modifications without departing from the spirit of the present disclosure, or forms obtained by making various modifications conceived by those skilled in the art with respect to the above-described embodiments and the like. Implemented forms are also included in the present disclosure.

For example, in the semiconductor light emitting device 2 according to the above embodiment, the substrate 10 of the semiconductor light emitting element 1 has the maximum thickness of the substrate 10 immediately below the central waveguide portion 40a3 (that is, directly below the light emitting portion 73). However, the configuration of the substrate 10 is not limited to this. Each modification will be described below with reference to FIGS. 5A to 5D and FIG. 5A to 5D are schematic cross-sectional views showing the configurations of the semiconductor light emitting devices 2a to 2d according to the modified examples 1 to 4, respectively. FIG. 6 is a schematic cross-sectional view showing a configuration of a semiconductor light emitting device 402 according to Modification 5. The semiconductor light emitting devices 2a to 2c shown in FIGS. 5A to 5C are different from the semiconductor light emitting device 2 according to the embodiment in the shapes of the substrates 10a to 10c of the semiconductor light emitting elements 1a to 1c, respectively, and are identical in other points. Further, the semiconductor light emitting device 2d shown in FIG. 5D is different from the semiconductor light emitting device 2 according to the embodiment in the number of waveguide portions (that is, light emitting portions) of the semiconductor light emitting element 1d, and is identical in other points.

As in the semiconductor light emitting device 2a according to the first modification illustrated in FIG. 5A, the thickness of the substrate 10a may not be the maximum immediately below the central waveguide portion 40a3. Even with such a configuration, d1 <d2 <d3 and d3> d4> d5 can be satisfied with respect to the thicknesses d1 to d5 of the substrate 10a immediately below the waveguide portions 40a1 to 40a5. Accordingly, s1> s2> s3 and s3 <s4 <s5 are established with respect to the thicknesses s1 to s5 of the first adhesive layer 103a immediately below each of the waveguide portions 40a1 to 40a5. For this reason, also in the semiconductor light-emitting device 2a which concerns on this modification, the effect similar to the semiconductor light-emitting device 2 which concerns on the said embodiment is acquired.

Further, as in the semiconductor light emitting device 2b according to Modification 2 shown in FIG. 5B, the thickness of the substrate 10b may be uniform in the vicinity immediately below the central waveguide portion 40a3. In other words, the lower surface of the substrate 10b may be parallel to the upper surface near the center in the arrangement direction. Even in such a configuration, s1> s2> s3 and s3 <s4 <s5 are satisfied with respect to the thicknesses s1 to s5 of the first adhesive layer 103a immediately below the waveguide portions 40a1 to 40a5. obtain. For this reason, also in the semiconductor light-emitting device 2b which concerns on this modification, the effect similar to the semiconductor light-emitting device 2 which concerns on the said embodiment is acquired.

Further, as in the semiconductor light emitting device 2c according to Modification 3 shown in FIG. 5C, the thickness of the substrate 10c may be changed stepwise. In other words, the thickness of the substrate 10c may change discretely. Even in such a configuration, s1> s2> s3 and s3 <s4 <s5 are satisfied with respect to the thicknesses s1 to s5 of the first adhesive layer 103a immediately below the waveguide portions 40a1 to 40a5. obtain. For this reason, also in the semiconductor light-emitting device 2c which concerns on this modification, the effect similar to the semiconductor light-emitting device 2 which concerns on the said embodiment is acquired.

Further, as in the semiconductor light emitting device 2d according to the modified example 4 shown in FIG. 5D, the number of waveguide portions and light emitting portions may be an even number. Even with such a configuration, s1> s2 and s3 <s4 can be satisfied with respect to the thicknesses s1 to s4 of the first adhesive layer 103a immediately below the waveguide portions 40a1 to 40a4. That is, the thickness of the first adhesive layer 103a is smaller than both end portions on the center side in the arrangement direction of the three or more light emitting portions 71 to 74. For this reason, also in the semiconductor light-emitting device 2d which concerns on this modification, the effect similar to the semiconductor light-emitting device 2 which concerns on the said embodiment is acquired.

Further, as in the semiconductor light emitting device 402 according to the modified example 5 shown in FIG. 6, the semiconductor light emitting element 401 having the substrate 410 with a uniform thickness and the submount 500 may be provided. The submount 500 includes a first base 501, a first electrode 502a, a first adhesive layer 503a, a third electrode 502b, and a third adhesive layer 503b. The thicknesses t1 to t5 of the first base 501 directly below the waveguide portions 40a1 to 40a5 according to this modification are large on the center side in the arrangement direction of the light emitting portions 71 to 75 of the semiconductor light emitting element 401, and are on the end side Is small. Accordingly, the central portion in the arrangement direction of the surface of the first base 501 on the semiconductor light emitting element 401 side protrudes. More specifically, the surface of the first base 501 on the semiconductor light emitting element 401 side is inclined so that the center side in the arrangement direction is convex. For this reason, the thickness of the first adhesive layer 503a is smaller than both end portions on the center side in the arrangement direction of the light emitting portions 71 to 75. Also in this modification, the first base 501 has higher thermal conductivity than the first adhesive layer 503a, as in the above embodiment. As described above, in the semiconductor light emitting device 402 according to this modification, the first adhesive layer 503a having a lower thermal conductivity than the first base 501 is reduced in thickness on the center side in the arrangement direction, thereby reducing the first adhesion. The heat dissipation at the center side of the layer 503a can be enhanced from both end sides. As a result, among the three or more light emitting portions 71 to 75, the light emitting portion on the center side in the arrangement direction becomes higher in temperature than the light emitting portions on both end sides due to thermal interference with the adjacent light emitting portions. Can be suppressed.

Moreover, in the said embodiment and each modification, it had the structure in which only one of a board | substrate and a 1st base protruded in the center part of the sequence direction of three or more light emission parts, but a board | substrate and 1st Both bases may protrude in a convex shape. In addition, the second base may protrude in a convex shape toward the semiconductor light emitting element at the center in the arrangement direction of the three or more light emitting units. Thereby, the thickness of a 2nd contact bonding layer can be made smaller than the both edge part side in the center side of the sequence direction of three or more light emission parts. Thereby, also on the 2nd base side, like the 1st base side, the heat dissipation in the center side of an arrangement direction can be improved from both end side.

In each of the semiconductor light emitting devices according to the above-described embodiments and modifications, a nitride semiconductor is used. However, the semiconductor material used in the semiconductor light emitting device is not limited to this. For example, the semiconductor light emitting device has a quantum well structure in which an active layer is made of GaAs and AlGaAs, and may emit red laser light, or has a quantum well structure in which an active layer is made of InP and InGaAsP, Laser light may be emitted.

In the embodiment and each modification described above, the first adhesive layer and the second adhesive layer have a thickness larger than zero, but may have a region where the thickness is zero. For example, the thickness of the first adhesive layer and the second adhesive layer may be zero at the center in the arrangement direction of three or more light emitting parts. In this case, the substrate of the semiconductor light emitting element may be in contact with the first base and the second base.

Further, in the above-described embodiment and each modification, the semiconductor substrate is used as the substrate of the semiconductor light emitting element, but the substrate of the semiconductor light emitting element may not be a semiconductor. For example, the substrate may be formed of sapphire or the like. In this case, the electrode on the first conductive side may be disposed on the upper surface side of the substrate.

In addition, in the semiconductor light emitting device according to the above-described embodiment and each modification, current confinement is realized using a stripe structure formed in the second semiconductor layer, but means for realizing current confinement is not limited to this. Without limitation, an electrode stripe structure, a buried structure, or the like may be used.

The semiconductor light emitting device according to the present disclosure can be used as a light source for an image display device, illumination, or industrial equipment, and is particularly useful as a light source for equipment that requires a relatively high light output.

1, 1a, 1b, 1c, 1d, 401 Semiconductor

light emitting element

2, 2a, 2b, 2c, 2d, 3, 402 Semiconductor light emitting

device

10, 10a, 10b, 10c, 410 Substrate 20 First semiconductor layer 30 Light emitting layer 31 n Side light guide layer 32 Active layer 33 P side light guide layer 40 Second semiconductor layer 40a1, 40a2, 40a3, 40a4, 40a5 Waveguide portion 40b Flat portion 41 Electron barrier layer 42 p side cladding layer 43 p side contact layer 50 Electrode member 51 p-side electrode 52 pad electrode 60

dielectric layer

71, 72, 73, 74, 75 light emitting part 80 n-side electrode 91 first

protective film

100, 300, 500

submount

101, 201, 501

first base

102a, 502a

First electrode

102b, 502b

Third electrode

103a, 203, 503a First

adhesive layer

103b, 503b First Adhesive layer 200 Radiation part 301 Second base 302a Second electrode 302b Fourth electrode 303a Second adhesive layer 303b Fourth adhesive layer 1003 Support body 1006 Conductive adhesive material 1007 Metal wiring body 1008 Laser electrode 1009 Resin 1010 Array type

semiconductor laser Element

1011, 1012, 1013, 1014 stripe

Claims

A semiconductor light emitting device having a substrate and three or more light emitting portions arranged along the upper surface of the substrate;
A first base disposed below the lower surface of the substrate;
A first adhesive layer for adhering the semiconductor light emitting element to the first base,
The substrate has a higher thermal conductivity than the first adhesive layer,
The thickness of the said 1st contact bonding layer is a semiconductor light-emitting device smaller than both the edge part sides in the center side of the sequence direction of the said three or more light-emitting parts.
The semiconductor light emitting device according to claim 1, wherein a thickness of the substrate is larger than both end portions on a central side in the arrangement direction.
The semiconductor light emitting device according to claim 2, wherein the lower surface of the substrate is inclined so that a central side in the arrangement direction is convex.
The semiconductor light emitting device according to claim 2, wherein the upper surface of the substrate is parallel to a bonding surface of the first base with the first adhesive layer in the arrangement direction.
Furthermore, a second base disposed on the opposite side of the first base across the semiconductor light emitting element,
The semiconductor light-emitting device according to any one of claims 1 to 4, further comprising: a second adhesive layer that adheres the semiconductor light-emitting element to the second base.
6. The semiconductor light emitting device according to claim 1, wherein the first base has a higher thermal conductivity than the first adhesive layer.
A semiconductor light emitting device having a substrate and three or more light emitting portions arranged along the upper surface of the substrate;
A first base disposed below the lower surface of the substrate;
A first adhesive layer for adhering the semiconductor light emitting element to the first base,
The first base has a higher thermal conductivity than the first adhesive layer,
The thickness of the said 1st contact bonding layer is a semiconductor light-emitting device smaller than both the edge part sides in the center side of the sequence direction of the said three or more light-emitting parts.
The semiconductor light emitting device according to claim 7, wherein a thickness of the first base is larger than both end portions on a central side in the arrangement direction.