WO2019148948A1 - 一种内核完整性保护方法及装置 - Google Patents

一种内核完整性保护方法及装置 Download PDF

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Publication number
WO2019148948A1
WO2019148948A1 PCT/CN2018/117500 CN2018117500W WO2019148948A1 WO 2019148948 A1 WO2019148948 A1 WO 2019148948A1 CN 2018117500 W CN2018117500 W CN 2018117500W WO 2019148948 A1 WO2019148948 A1 WO 2019148948A1
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Prior art keywords
memory
space
running
processing module
running space
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PCT/CN2018/117500
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English (en)
French (fr)
Inventor
肖福洲
尹友展
夏登洲
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华为技术有限公司
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Priority claimed from PCT/CN2018/075086 external-priority patent/WO2019148447A1/zh
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to CN201880016634.2A priority Critical patent/CN110383256B/zh
Priority to EP18904028.0A priority patent/EP3726390B1/en
Priority to US16/965,935 priority patent/US20210049112A1/en
Publication of WO2019148948A1 publication Critical patent/WO2019148948A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1416—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G06F12/1425—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block
    • G06F12/1441—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block for a range
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1491—Protection against unauthorised use of memory or access to memory by checking the subject access rights in a hierarchical protection system, e.g. privilege levels, memory rings
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1416—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
    • G06F21/52—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow
    • G06F21/53—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow by executing in a restricted environment, e.g. sandbox or secure virtual machine
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/60—Protecting data
    • G06F21/62—Protecting access to data via a platform, e.g. using keys or access control rules
    • G06F21/6218—Protecting access to data via a platform, e.g. using keys or access control rules to a system of files or objects, e.g. local or distributed file system or database
    • G06F21/6281—Protecting access to data via a platform, e.g. using keys or access control rules to a system of files or objects, e.g. local or distributed file system or database at program execution time, where the protection is within the operating system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/74—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information operating in dual or compartmented mode, i.e. at least one secure mode
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1052—Security improvement
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/15—Use in a specific computing environment
    • G06F2212/152—Virtualized environment, e.g. logically partitioned system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65—Details of virtual memory and virtual address translation
    • G06F2212/651—Multi-level translation tables

Definitions

  • the present application relates to the field of electronic devices, and in particular, to a kernel integrity protection method and apparatus.
  • Operating system security is an integral part of the security of computing device systems.
  • the system kernel obtains the execution permission of the processor, the execution of malicious code in the kernel cannot usually be interfered, so the usual kernel integrity detection can only Statically implements metrics for kernel integrity, and such metrics are either that malicious intrusions may not have occurred, or that malicious intrusions have succeeded, and real-time intrusion termination is not possible.
  • kernel integrity protection methods themselves need to implement the necessary functional modules in the kernel or set up a hook program in the kernel to check and protect the kernel intrusion.
  • RAP return address protection
  • CFI control flow integrity
  • stack overflow protection Since the added functional modules or programs are on the same layer as the kernel, the integrity of the kernel itself cannot be guaranteed, and in some cases these schemes themselves destroy the integrity of the kernel.
  • existing protection techniques may be bypassed or cracked. Checking the code exists in the kernel and has a large impact on system performance and power consumption.
  • the embodiment of the invention provides a kernel integrity protection method and device, which can implement dynamic measurement of kernel integrity, thereby realizing real-time intrusion termination and higher security.
  • a kernel integrity protection method is provided.
  • the kernel integrity protection method is performed by a kernel integrity protection device, where the kernel integrity protection device includes a processor execution unit, and the running space of the processor execution unit partition includes a first running space and a second running space.
  • the abnormality level of the second running space is higher than the abnormal level of the first running space;
  • the kernel integrity protection method includes: the first processing module running in the first running space to the second running space
  • the second processing module running in the middle sends a request message for requesting a memory access, the memory access involving access to a preset register and/or access to a preset memory space; the second run space
  • the second processing module running in the second operation module acquires information of an event corresponding to the memory access in response to the request message;
  • the second processing module running in the second running space sends the information to the first running space a first processing module running in the first processing module, wherein the first processing module running in the first running space advances the event according to the information deal with.
  • the second operating space needs to pass through the second running space because the abnormal level of the second running space is higher than the abnormal level of the first running space, and the first processing module in the first running space needs to perform a specific memory access.
  • Authorization of the second processing module such that the first processing module in the first running space cannot access the register and/or the memory space arbitrarily, and the second processing module running in the second running space determines that the verification result is When the memory access is invalid, the first processing module running in the first running space is further notified to process the attack event, so that dynamic metrics can be implemented on the kernel integrity, thereby realizing real-time intrusion termination, and the security is more high.
  • the first running space is a kernel space
  • the first processing module is an operating system
  • the second running space is a super management space or a security monitoring space.
  • the super management space or the security monitoring space is higher than the abnormal level of the kernel space, so that when the processing module of the super management space or the security monitoring space detects that the operating system running in the kernel space is attacked, the operating system is instructed to attack. The event is processed.
  • the super management space or the security monitoring space has higher permissions than the kernel space, and the kernel space is automatically converted to the super management space or the security monitoring space by the attack execution flow.
  • it can be configured at the beginning of the processor startup, that is, when the processor is in the super management space or the security monitoring space, when the kernel space runs the operating system, due to the super management space or the security monitoring space for the application
  • the program does not have an interface, only the exception handling interface. Therefore, the super management space or the security monitoring space cannot be intruded and the security is high.
  • the accessing the preset register comprises: reading or writing to a system control register. According to this embodiment, malicious tampering with the preset register can be prevented.
  • the accessing the preset memory space includes: modifying a kernel code segment, closing a memory management unit (MMU), modifying a kernel page table, and modifying at least a user page table.
  • MMU memory management unit
  • the operating space of the processor execution unit partition further includes a third running space, where an abnormal level of the third running space is lower than an abnormal level of the first running space;
  • the first processing module running in a running space processes the event according to the information, including: the first processing module running in the first running space runs in the third running space according to the information
  • the third processing module sends a signal for killing the process corresponding to the event.
  • the manner in which the attack is processed may include killing the attack process, thereby realizing real-time intrusion termination.
  • the operating space of the processor execution unit partition further includes a third running space, where an abnormal level of the third running space is lower than an abnormal level of the first running space;
  • the first processing module running in a running space processes the event according to the information, including: the first processing module running in the first running space runs in the third running space according to the information
  • the fourth processing module reports a log, and the log includes the information.
  • the method for processing the attack may include reporting the attack log to the third running space, so as to record the attack information, so as to facilitate subsequent statistical analysis and further processing of the attack information.
  • the method further includes: a fourth processing module running in the third running space uploading the log to a cloud server; and a fourth processing module running in the third running space Receive security policies or patches from the cloud server.
  • the fourth processing module running in the third running space can not only implement real-time intrusion termination, but also prevent subsequent similar attacks.
  • the third running space is a user program space. According to this embodiment, it is guaranteed that the processing of the attack event is visible to the user.
  • the information includes at least one of an attack type, a name of the attack process, and a port number. It can be understood that the above attack information can be obtained by reading a specific register. According to this embodiment, security policies or patches can be optimized by statistical analysis of multiple attack information.
  • the operating data in the operating system on the electronic device is stored using memory. Some of these operational data are important to protect, that is, they cannot be changed at will.
  • the operating system may run incorrectly, resulting in electronic device failure or information security vulnerability.
  • the kernel integrity protection method is specifically a data protection method, where the kernel integrity protection device is specifically a data protection device, where the data protection device includes the processor execution unit and memory management. Unit, the data protection method includes:
  • the first processing module running in the first running space sends a first message to the memory management unit, where the first message is used to request to modify the attribute of the first memory;
  • the memory management unit sends a second message to the second processing module running in the second running space, where the second message is used to request to determine whether the first memory is protected;
  • the second processing module running in the second running space determines whether the first memory is protected according to the pre-acquired memory protection table
  • the second processing module running in the second running space sends a third message to the memory management unit, where the third message is used to indicate whether to modify the attribute of the first memory;
  • the memory management unit modifies the attribute of the first memory according to the first message; if the third message is used to indicate that the attribute of the first memory is not modified, the memory management unit refuses to modify The first memory attribute.
  • the abnormal level of the second running space is higher than the abnormal level of the first running space, and the first processing module in the first running space needs to modify the attribute of the memory, it needs to pass through the second running space.
  • the authorization of the second processing module which makes the first processing module in the first running space unable to arbitrarily modify the attributes of the memory, so that the data in the memory cannot be arbitrarily modified, and finally helps to improve the security of the data.
  • the data protection method before the second processing module running in the second running space determines whether the first memory is protected according to the pre-acquired memory protection table, the data protection method further includes:
  • the first processing module in the first running space sends a fourth message to the second processing module in the second running space, where the fourth message is used to indicate whether the first memory is protected;
  • the second processing module in the second running space generates a memory protection table according to the fourth message, the memory protection table is used for recording the protected memory and/or the unprotected memory, and the protected memory includes storing the protected data.
  • Memory, unprotected memory includes memory for storing unprotected data.
  • the first processing module in the first runtime may indicate to the second processing module in the second runtime that which memory is protected and/or which memory is unprotected.
  • the data protection method before the second processing module running in the second running space determines whether the first memory is protected according to the pre-acquired memory protection table, the data protection method further includes:
  • the second processing module running in the second running space determines that the first memory is used to store the protected data or the first memory is used to store the unprotected data;
  • the second processing module running in the second running space generates a memory protection table, where the memory protection table is used to record the first memory as protected memory or to record the first memory as unprotected memory, and the protected memory includes For memory that stores protected data, unprotected memory includes memory for storing unprotected data.
  • protected memory and/or unprotected memory may be predetermined.
  • the first running space is a kernel space
  • the first processing module is an operating system
  • the second running space is a super management space.
  • the protected data includes: constant data written to the memory by the operating system during the compile phase, and constant data written by the operating system during the initialization phase.
  • the data protection device is a mobile phone, a tablet, a server, a personal computer, a network router, or a switch.
  • a core integrity protection device in a second aspect, includes a processor execution unit, and the operating space of the processor execution unit partition includes a first running space and a second running space.
  • the abnormality level of the second running space is higher than the abnormal level of the first running space, the first running space is used to run the first processing module, and the second running space is used to run the second processing module;
  • the first processing module is configured to send a request message to the second processing module, where the request message is used to request a memory access, where the memory access involves accessing a preset register and/or a preset memory space Access;
  • the second processing module is configured to: obtain, according to the request message, information about an event corresponding to the memory access, and send the information to a first processing module that is executed in the first running space;
  • the first processing module is further configured to process the event according to the information.
  • the first running space is a kernel space
  • the first processing module is an operating system
  • the second running space is a super management space or a security monitoring space.
  • the first processing module is configured to request the access to the preset register, including:
  • the first processing module is configured to request the access to the preset memory space, including:
  • Modify the kernel code section close the memory management unit, modify the kernel page table, and modify at least one of the user page tables.
  • the operating space of the processor execution unit partition further includes a third running space, where an abnormal level of the third running space is lower than an abnormal level of the first running space; Three operating spaces are used to run the third processing module;
  • the first processing module is specifically configured to send a signal to the third processing module according to the information, where the signal is used to kill a process corresponding to the event.
  • the operating space of the processor execution unit partition further includes a third running space, where an abnormal level of the third running space is lower than an abnormal level of the first running space;
  • the third running space is used to run the fourth processing module;
  • the first processing module is specifically configured to report a log to the fourth processing module according to the information, where the log includes the information.
  • the fourth processing module is further configured to: upload the log to a cloud server; and receive a security policy or a patch from the cloud server.
  • the third running space is a user program space.
  • the attack information includes at least one of an attack type, a name of the attack process, and a port number.
  • the device is specifically a data protection device, and the data protection device includes a processor execution unit and a memory management unit.
  • the first processing module is configured to send a first message to the memory management unit, where the first message is used to request to modify an attribute of the first memory;
  • the memory management unit is configured to send a second message to the second processing module, where the second message is used to request to determine whether the first memory is protected;
  • the second processing module is configured to determine, according to the pre-acquired memory protection table, whether the first memory is protected
  • the second processing module is further configured to send a third message to the memory management unit, where the third message is used to indicate whether to modify the attribute of the first memory;
  • the memory management unit is further configured to: when the third message is used to indicate that the attribute of the first memory is modified, the attribute of the first memory is modified according to the first message, and the third message is used to indicate that the first memory is refused to be modified when the attribute of the first memory is not modified. Attributes.
  • the first processing module is further configured to send a fourth message to the second processing module in the second running space, where the fourth message is used to indicate whether the first memory is protected.
  • the second processing module determines, according to the pre-acquired memory protection table, whether the first memory is protected, and is further configured to: generate a memory protection table according to the fourth message, where the memory protection table is used to record the protected memory and/or not Protected memory, protected memory includes memory for storing protected data, and unprotected memory includes memory for storing unprotected data.
  • the second processing module determines, according to the pre-acquired memory protection table, whether the first memory is protected, and is further configured to:
  • Generating a memory protection table for recording the first memory as protected memory or for recording the first memory as unprotected memory the protected memory including memory for storing protected data
  • Protected memory includes memory for storing unprotected data.
  • the first running space is a kernel space
  • the first processing module is an operating system
  • the second running space is a super management space.
  • the protected data includes: constant data written to the memory by the operating system during the compile phase, and constant data written by the operating system during the initialization phase.
  • the data protection device is a mobile phone, a tablet, a server, a personal computer, a network router, or a switch.
  • the core integrity protection device is a system chip
  • the system chip includes a processor and an output interface
  • the processor includes a processor execution unit
  • the output interface is used in the processor execution unit to When the access of the register and/or access to the preset memory space is set, the physical address of the first memory is output to the address bus.
  • the processor further includes a memory management unit, configured to output a physical address of the first memory to the address bus when the memory management unit modifies the attribute of the first memory.
  • the kernel integrity protection device may further include a memory for storing program code, a kernel code segment, a kernel page table, a user page table, and the like executed by the processor execution unit.
  • the memory is used to store program code executed by the processor execution unit, protected data, unprotected data, and the like.
  • the present application provides a computer readable storage medium.
  • Program code for kernel integrity protection device execution is stored in the computer readable storage medium.
  • the program code includes instructions for performing the kernel integrity protection method of the first aspect or any of the possible implementations of the first aspect.
  • the present application provides a computer program product comprising instructions.
  • the kernel integrity protection device is caused to perform the kernel integrity protection method of any of the possible implementations of the first aspect or the first aspect.
  • the application provides a data protection device, where the data protection device includes a processor execution unit and a memory management unit, and the running space of the processor execution unit partition includes a kernel space and a super management space, and an abnormality of the super management space.
  • the level of exception is higher than the kernel space.
  • An operating system running in the kernel space is configured to send a first message to the memory management unit, where the first message is used to request to modify an attribute of the first memory;
  • the memory management unit is configured to send a second message to the critical data protection module running in the super management space, where the second message is used to request to determine whether the first memory is protected;
  • the key data protection module is configured to determine whether the first memory is protected according to the pre-acquired memory protection table
  • the key data protection module is further configured to send a third message to the memory management unit, where the third message is used to indicate whether to modify the attribute of the first memory;
  • the memory management unit is further configured to: when the third message is used to indicate that the attribute of the first memory is modified, the attribute of the first memory is modified according to the first message, and the third message is used to indicate that the first memory is refused to be modified when the attribute of the first memory is not modified. Attributes.
  • the operating system is further configured to send a fourth message to the critical data protection module, where the fourth message is used to indicate whether the first memory is protected.
  • the key data protection module determines whether the first memory is protected according to the pre-acquired memory protection table, and is further configured to: generate a memory protection table according to the fourth message, where the memory protection table is used to record the protected memory and/or not Protected memory, protected memory includes memory for storing protected data, and unprotected memory includes memory for storing unprotected data.
  • the critical data protection module determines whether the first memory is protected according to a pre-acquired memory protection table, and is also used to:
  • Generating a memory protection table for recording the first memory as protected memory or for recording the first memory as unprotected memory the protected memory including memory for storing protected data
  • Protected memory includes memory for storing unprotected data.
  • the protected data includes: constant data written by the operating system during the compile phase, and constant data written by the operating system during the initialization phase.
  • FIG. 1 is a schematic diagram of an abnormality level according to an embodiment of the present invention
  • FIG. 2 is a schematic structural diagram of a kernel integrity protection apparatus according to an embodiment of the present invention.
  • FIG. 3 is a schematic structural diagram of another kernel integrity protection apparatus according to an embodiment of the present invention.
  • FIG. 4 is a flowchart of a kernel integrity protection method according to an embodiment of the present invention.
  • FIG. 5 is a schematic diagram of execution of a kernel integrity protection method according to an embodiment of the present invention.
  • FIG. 6 is a schematic structural diagram of another kernel integrity protection apparatus according to an embodiment of the present invention.
  • FIG. 7 is a schematic flowchart of performing address mapping by an MMU according to an embodiment of the present application.
  • FIG. 8 is a schematic structural diagram of a data protection device according to another embodiment of the present application.
  • FIG. 9 is a schematic structural diagram of a data protection device according to another embodiment of the present application.
  • FIG. 10 is a schematic flowchart of a data protection method according to an embodiment of the present application.
  • FIG. 11 is a schematic flowchart of a data protection method according to another embodiment of the present application.
  • FIG. 12 is a schematic flowchart of a data protection method according to another embodiment of the present application.
  • FIG. 13 is a schematic flowchart of a data protection method according to another embodiment of the present application.
  • the computer to which the kernel integrity protection method and the kernel integrity protection device of the embodiment of the present application can be applied may be an electronic device such as a mobile phone, a tablet, a server, a personal computer, a network router, a wearable device, or a switch.
  • the kernel integrity protection method may be specifically a data protection method
  • the kernel integrity protection device may specifically be a data protection device.
  • a processor and a memory can be included in the computer.
  • the processor may also be referred to as a central processing unit (CPU) or a central processing unit.
  • An example of a processor in the computer is an Advanced RISC Machines (ARM) processor.
  • An example of a memory in the computer is a random access memory (RAM) or a flash memory (Flash). Among them, RAM can also be called main memory or memory.
  • the memory has access rights attributes such as read-only, writable, executable, and inaccessible.
  • Virtualization technology is used in the processor of this computer. Virtualization technology can hide the underlying physical hardware in the computer, allowing multiple independent operating systems (OSs) to transparently use and share the computer's hardware resources. Simply put, virtualization technology can enable the computer to run multiple OSs concurrently.
  • OSs independent operating systems
  • the processor in the computer provides different levels of privilege for the program code to access resources in the computer to protect the data in the computer and prevent malicious behavior in the computer, thereby ensuring the security of the computer.
  • EL levels exception levels
  • EL levels the higher the level of the abnormal level, the lower the level of the abnormal level is.
  • the EL0 level is lower than the EL1 level
  • the EL1 level is lower than the EL2 level
  • the EL2 level is lower than the EL3 level.
  • the lower the level of the abnormal level the lower the value, and the higher the level of the abnormality, the higher the level of the abnormality.
  • Different levels of anomaly levels correspond to different levels of running space.
  • the division of the exception level or the division of the runtime space provides logically separate execution rights for the software for all operational states in the processor. It should be understood that the level of anomaly referred to in this application is similar to that of a hierarchical protection domain that is common in computer science and supports the concepts involved in the level protection domain.
  • An example of software running under each of these four exception levels is as follows.
  • a normal user application runs in the runspace corresponding to EL0; an operating system kernel, such as Linux or Windows, can run in the runspace corresponding to EL1, the operating system kernel is usually considered privileged; the hypervisor runs on EL2. In the corresponding running space; low-level firmware, such as the security monitor, runs in the running space corresponding to EL3.
  • the hypervisor can also be called a hypervisor.
  • the hypervisor can provide virtualization services to one or more operating system kernels when enabled.
  • Firmware is the first thing that runs when the processor starts.
  • the firmware provides a number of services, such as platform initialization, installation of trusted operating systems, and routing of commands for security monitors.
  • a piece of software occupies a separate level of exception, or a separate run space.
  • exceptions there are exceptions.
  • a kernel management program such as a kernel virtual machine (KVM)
  • KVM kernel virtual machine
  • the CPU execution unit can manage or access the memory through a memory management unit (MMU).
  • MMU memory management unit
  • the MMU can perform address mapping and provide operations such as memory access authorization.
  • the MMU when the program code running in the running space corresponding to different abnormal levels accesses the memory, the MMU performs different address mapping and different memory access authorization processes.
  • the ARM processor contains the following types of exceptions:
  • Interrupts which are primarily triggered by peripherals, are typical asynchronous exceptions.
  • Aborts which may be synchronous or asynchronous exceptions. Including instruction exceptions (generated when fetching instructions), data exceptions (generated when reading or writing memory data), can be generated by a memory management unit (MMU) (such as a typical page fault exception), or can be generated by an external storage system. (usually a hardware issue).
  • MMU memory management unit
  • Reset is considered a special exception.
  • exception handling is required based on the exception level.
  • the exception handling process in the ARM processor includes the hardware auto-complete part and the software part.
  • the interrupt vector needs to be set and the context is saved. Different exception types may be handled differently. Among them, the user state (EL0) can not handle exceptions. When the exception occurs in the user state, the exception level (EL) will switch, and the default switch to the kernel state (EL1).
  • the kernel integrity protection device 200 shown in FIG. 2 is taken as an example to describe the kernel integrity protection method proposed in the present application. It should be understood that the kernel integrity protection device 200 illustrated in FIG. 2 is merely an example, and the kernel integrity protection device of the embodiment of the present application may further include other modules or units, or include modules similar in function to the respective modules in FIG. 2. Or not all modules in Figure 2 are to be included.
  • the kernel integrity protection device 200 shown in FIG. 2 includes a processor 210 and a memory 220.
  • the memory 220 can exchange data with the processor 210.
  • RAM random access memory
  • main memory main memory
  • flash memory Another example of the memory 220 is a flash memory. It should be understood that the memory in subsequent embodiments may be replaced with a flash memory.
  • processor 210 is a central processing unit (CPU).
  • CPU can also be referred to as a central processor.
  • a CPU execution unit 211, a memory management unit 212, and a register 213 may be included in the processor 210. It should be understood that the memory management unit 212 and the register 213 are integrated in the processor 210 here. The memory management unit 212 and the register 213 may also be located outside the processor 210.
  • ELs exception levels
  • the four exception levels are EL0, EL1, EL2, and EL3 from low to high.
  • EL0, EL1, EL2 and EL3 correspond to four operating spaces.
  • the running space corresponding to EL0 is the user program space, and the user program space is used to run the user program.
  • User programs can also be called applications.
  • the running space corresponding to EL1 is a kernel space, and the kernel space is used to run an operating system (OS).
  • OS operating system
  • An operating system running in kernel space can also be referred to as a guest operating system.
  • the running space corresponding to EL2 is the super management space.
  • the super management space is used to run the hypervisor.
  • the hypervisor can also be called a virtual machine monitor.
  • the hypervisor is an intermediate layer of software that runs between physical hardware and the operating system, allowing multiple operating systems and applications to share a single set of physical hardware.
  • the main function of the hypervisor is memory management and interrupt interception. In these two ways, the hypervisor can well monitor the operation of the operating system in kernel space.
  • the hypervisor can implement memory management through the MMU 212's two-stage (stage 2) memory mapping function.
  • the MMU 212 can implement storage management by techniques such as a shadow page table or an EPT page table.
  • Hypervisor can also prevent malicious tampering by monitoring register 213.
  • stage 1 the operating system or user program space in the kernel space can be The address sent by the user program in the middle is mapped to the intermediate physical address; in stage 2 (stage-2), the intermediate physical address (IPA) can be mapped to the address of the memory chip.
  • stage-2 the intermediate physical address
  • the address sent by the user program in the kernel space or the user program space in the user program space may be referred to as a virtual address, or the address visible to the operating system or the user program is VA; the real address of the memory chip is called a physical address; VA
  • VA The address used in the process of mapping to a physical address (PA) can be called IPA.
  • stage-2 memory map function is only valid for operating systems running in kernel space and user programs in user program space. That is to say, the stage-2 memory mapping function is required only when the operating system running in kernel space and the user program in the user program space access memory.
  • Memory has access rights properties.
  • the access permission attribute of the memory is simply referred to as the attribute of the memory in the embodiment of the present application.
  • Memory attributes can include read-only, writable, inaccessible, and executable.
  • the memory attribute is read-only, which means that only the content in the memory can be read, and the content in the memory cannot be modified; if the attribute of the memory is writable, the content in the memory can be read, or can be modified. The contents of this memory.
  • the MMU 212 After receiving the address sent by the user program in the kernel space or the user program space in the user program space, the MMU 212 can access the content in the memory corresponding to the address according to the attribute of the memory corresponding to the address.
  • the MMU 212 addresses the address. After mapping to the physical address of the memory, the physical address is sent to the address bus for data to be written to.
  • the MMU 212 rejects the request. .
  • An example of the MMU 212 rejecting the request is to make an exception prompt.
  • an operating system running in kernel space can invoke a hypervisor through a hypervisor call (HVC) instruction.
  • HVC hypervisor call
  • the security monitor space corresponding to EL3 is used to run the security monitoring module of the processor.
  • FIG. 4 A schematic flowchart of a kernel integrity protection method in one embodiment of the present application is shown in FIG. This kernel integrity protection method can be performed by the kernel integrity protection device 200.
  • the kernel integrity protection method shown in FIG. 4 includes S410, S420, S430, and S440.
  • FIG. 4 illustrates the steps or operations of the kernel integrity protection method, but these steps or operations are merely examples, and other embodiments of the present application may also perform other operations or variations of the operations in FIG. Moreover, the various steps in FIG. 4 may be performed in a different order than that presented in FIG. 4, and it is possible that not all operations in FIG. 4 are to be performed.
  • the first processing module running in the first running space sends a request message to the second processing module running in the second running space, where the request message is used to request a memory access, where the memory access involves a preset register. Access and/or access to a preset memory space.
  • the first running space is a kernel space
  • the first processing module is an operating system
  • the second running space is a super management space or a security monitoring space.
  • the super management space or the security monitoring space is higher than the abnormal level of the kernel space, so that when the processing module of the super management space or the security monitoring space detects that the operating system running in the kernel space is attacked, the operating system is instructed to attack. The event is processed.
  • the super management space or the security monitoring space has higher permissions than the kernel space, and the kernel space is automatically converted to the super management space or the security monitoring space by the attack execution flow.
  • it can be configured at the beginning of the processor startup, that is, when the processor is in the super management space or the security monitoring space, when the kernel space runs the operating system, due to the super management space or the security monitoring space for the application
  • the program does not have an interface, only the exception handling interface. Therefore, the super management space or the security monitoring space cannot be intruded and the security is high.
  • the accessing the preset register comprises: reading or writing to a system control register. According to this embodiment, malicious tampering with the preset register can be prevented.
  • the accessing the preset memory space includes: modifying a kernel code segment, closing a memory management unit, modifying a kernel page table, and modifying at least one of a user page table.
  • the second processing module running in the second running space acquires information about an event corresponding to the memory access in response to the request message.
  • the second processing module running in the second running space performs a validity check on the memory access, and determines that the verification result is that the memory access is illegal.
  • the processing module running in the second running space determines, according to the pre-fetched memory protection table, whether the first memory accessed by the memory access is protected, wherein the memory protection table is used to record the protected memory and / or unprotected memory.
  • Protected memory can be understood as storing protected data.
  • the protected data may include at least one of the following: constant data of the operating system or data generated by the operating system during operation that needs to be protected.
  • the constant data of the operating system may include at least one of the following: constant data that appears during the compilation phase of the operating system and constant data that appears during the initialization phase of the operating system.
  • the interpretation of the protected memory may include that the attributes of the memory may not be modified from write-only, inaccessible, executable to writable; the interpretation of the unprotected memory may include: The properties of this memory can be modified from any property to any other property. If the first memory accessed by the memory access is protected, changing the memory attribute is considered an illegal memory access.
  • the second processing module running in the second running space sends the information to the first processing module running in the first running space.
  • the information includes at least one of an attack type, a name of the attack process, and a port number.
  • security policies or patches can be optimized by statistical analysis of multiple attack information.
  • the first processing module running in the first running space processes the event according to the information.
  • the operating space of the processor execution unit partition further includes a third running space, where an abnormal level of the third running space is lower than an abnormal level of the first running space;
  • the first processing module running in a running space processes the event according to the information, including: the first processing module running in the first running space runs in the third running space according to the information
  • the third processing module sends a signal for killing the process corresponding to the event.
  • the manner in which the attack is processed may include killing the attack process, thereby realizing real-time intrusion termination.
  • the operating space of the processor execution unit partition further includes a third running space, where an abnormal level of the third running space is lower than an abnormal level of the first running space;
  • the first processing module running in a running space processes the event according to the information, including: the first processing module running in the first running space runs in the third running space according to the information
  • the fourth processing module reports a log, and the log includes the information.
  • the method for processing the attack may include reporting the attack log to the third running space, so as to record the attack information, so as to facilitate subsequent statistical analysis and further processing of the attack information.
  • the method further includes: a fourth processing module running in the third running space uploading the log to a cloud server; and a fourth processing module running in the third running space Receive security policies or patches from the cloud server.
  • the fourth processing module running in the third running space can not only implement real-time intrusion termination, but also prevent subsequent similar attacks.
  • the third running space is a user program space. According to this embodiment, it is guaranteed that the processing of the attack event is visible to the user.
  • the kernel integrity protection method is specifically a data protection method, where the kernel integrity protection device is specifically a data protection device, where the data protection device includes the processor execution unit and a memory.
  • Management unit
  • S410 includes:
  • the first processing module running in the first running space sends a first message to the memory management unit, where the first message is used to request to modify an attribute of the first memory;
  • the memory management unit sends a second message to the second processing module running in the second running space, where the second message is used to request to determine whether the first memory is protected;
  • S420 includes:
  • the second processing module running in the second running space determines whether the first memory is protected according to a pre-acquired memory protection table
  • the method further includes:
  • the second processing module of the second running space sends a third message to the memory management unit, where the third message is used to indicate whether to modify an attribute of the first memory;
  • the memory management unit modifies an attribute of the first memory according to the first message; if the third message is used to indicate that the attribute is not modified And the attribute of the first memory, the memory management unit refuses to modify the attribute of the first memory.
  • the second processing module that is executed in the second running space determines whether the first memory is protected according to a pre-acquired memory protection table, where the data protection method further includes:
  • the first processing module in the first running space sends a fourth message to the second processing module in the second running space, where the fourth message is used to indicate whether the first memory is received protected;
  • the second processing module in the second running space generates the memory protection table according to the fourth message, where the memory protection table is used to record protected memory and/or unprotected memory, Protected memory includes memory for storing protected data, including memory for storing unprotected data.
  • the second processing module that is executed in the second running space determines whether the first memory is protected according to a pre-acquired memory protection table, where the data protection method further includes:
  • the second processing module running in the second running space determines that the first memory is used to store protected data or the first memory is used to store unprotected data;
  • the second processing module running in the second running space generates the memory protection table, where the memory protection table is configured to record the first memory as a protected memory or to record the first memory as Unprotected memory, the protected memory includes memory for storing protected data, and the unprotected memory includes memory for storing unprotected data.
  • the first running space is a kernel space
  • the first processing module is an operating system
  • the second running space is a super management space
  • the protected data includes: constant data written by the operating system to the memory during the compiling phase, and the operating system writes constant data of the memory during the initialization phase.
  • the data protection device is a cell phone, tablet, server, personal computer, network router, or switch.
  • the second operating space needs to pass through the second running space because the abnormal level of the second running space is higher than the abnormal level of the first running space, and the first processing module in the first running space needs to perform a specific memory access.
  • Authorization of the second processing module such that the first processing module in the first running space cannot access the register and/or the memory space arbitrarily, and the second processing module running in the second running space determines that the verification result is When the memory access is invalid, the first processing module running in the first running space is further notified to process the attack event, so that dynamic metrics can be implemented on the kernel integrity, thereby realizing real-time intrusion termination, and the security is more high.
  • an exception occurring under EL0 and EL1 responds at EL1.
  • an exception can be made to respond in EL2 or EL3 by configuring the relevant registers of EL2 and EL3. For example, the HDCR_EL2 and HCR_EL2 of EL2 and the related bits (bit) of SCR_EL3 of EL3 are configured.
  • FIG. 5 is a schematic diagram of execution of a kernel integrity protection method according to an embodiment of the present invention.
  • the virtual layer detects an attack event occurring at a kernel layer and reports it to a kernel layer, where the kernel layer performs the attack event. deal with.
  • the virtual memory monitoring switch is turned on (for example, HCR_EL2 for the ARMv8 processor), and the specific register is read and written to prevent malicious tampering, and the corresponding memory trap is set.
  • Some fuzzy memory accesses perform legality verification.
  • the design includes module monitoring, system control register protection, kernel code segment protection, kernel page table protection, user page table protection and other modules. When the kernel layer is attacked, the kernel layer will be trapped to the virtual layer.
  • the detection and reporting attack module will capture the attack event of the kernel layer, and then use the interrupt communication module to attack the attack type, the name of the attack process, and the process number. (ProcessID, PID) and other information sent to the kernel layer of the attack processing module, it can be understood that for different types of attacks, the interrupt communication module can also report different additional information, for example, modify the code segment, try to modify the address and other attacks. The type may have different additional information; after receiving the interrupt, the attack processing module will use the interrupt communication module to read the attack event reported by the virtual layer, and then send a signal to the attack process, try to kill the attack process, and finally report the attack log to the log.
  • the engine module records the attack log and uploads it to the cloud server for statistical analysis of the big data.
  • the cloud server sends a new security policy or patch based on the analysis result to enhance the security of the device.
  • trap is a normal execution process of the program.
  • the processor detects some abnormal events, it will pause the current execution flow, change the processor mode, and jump to the code of the address to execute the response.
  • FIG. 6 is a schematic structural diagram of a kernel integrity protection apparatus according to an embodiment of the present application. It should be understood that the kernel integrity protection device 600 illustrated in FIG. 6 is merely an example, and the kernel integrity protection device of the embodiment of the present application may further include other modules or units, or include modules similar in function to the respective modules in FIG. 6. Or not all modules in Figure 6 are to be included.
  • the kernel integrity protection device 600 includes a processor execution unit 610 and a memory management unit 620.
  • the operation space divided by the processor execution unit 610 includes a first operation space 611 and a second operation space 612.
  • the second operation space 612 has a high abnormality level. In the abnormal level of the first running space 611, the first running space 611 is used to run the first processing module, and the second running space 612 is used to run the second processing module.
  • the kernel integrity protection device 600 can be used to perform the steps performed by the kernel integrity protection device in the kernel integrity protection method illustrated in FIG. 4 or 5.
  • the first processing module is configured to send a request message to the second processing module, where the request message is used to request a memory access, where the memory access involves accessing a preset register and/or a preset Access to memory space;
  • the second processing module is configured to obtain, according to the request message, information about an event corresponding to the memory access, and send the information to a first processing module that is executed in the first running space 611;
  • the first processing module is further configured to process the event according to the information.
  • the first running space 611 is a kernel space
  • the first processing module is an operating system
  • the second running space 612 is a super management space or a security monitoring space.
  • the first processing module is configured to request the access to the preset register, including:
  • the first processing module is configured to request the access to the preset memory space, including:
  • the operating space partitioned by the processor execution unit 610 further includes a third running space, where an abnormal level of the third running space is lower than an abnormal level of the first running space;
  • the third running space is used to run the third processing module;
  • the first processing module is specifically configured to send a signal to the third processing module according to the attack information, where the signal is used to kill a process corresponding to the event.
  • the operating space divided by the processor execution unit 610 further includes a third running space, where an abnormal level of the third running space is lower than an abnormal level of the first running space 611;
  • the third running space is used to run the fourth processing module;
  • the first processing module is specifically configured to report a log to the fourth processing module according to the information, where the log includes the information.
  • the fourth processing module is further configured to: upload the log to a cloud server; and receive a security policy or a patch from the cloud server.
  • the third running space is a user program space.
  • the information includes at least one of an attack type, an attack process name, and a port number.
  • the device 600 is specifically a data protection device, the data protection device includes: the processor execution unit 610 and a memory management unit 620;
  • the first processing module is specifically configured to send a first message to the memory management unit 620, where the first message is used to request to modify an attribute of the first memory;
  • the memory management unit 620 is configured to send, to the second processing module, a second message, where the second message is used to request to determine whether the first memory is protected;
  • the second processing module is specifically configured to determine, according to the pre-acquired memory protection table, whether the first memory is protected
  • the second processing module is further configured to send a third message to the memory management unit, where the third message is used to indicate whether to modify an attribute of the first memory;
  • the memory management unit 620 is further configured to: when the third message is used to indicate that the attribute of the first memory is modified, modify an attribute of the first memory according to the first message, where the third message is used to indicate The modification of the attribute of the first memory is not modified when the attribute of the first memory is not modified.
  • the first processing module is further configured to send a fourth message to the second processing module in the second running space 612, where the fourth message is used to indicate the first Whether a memory is protected;
  • the second processing module is configured to: before the first memory is protected according to the pre-acquired memory protection table, and configured to: generate the memory protection table according to the fourth message, where the memory protection table is used Recording protected memory and/or unprotected memory, the protected memory including memory for storing protected data, the memory for storing unprotected data .
  • the second processing module determines, according to the pre-acquired memory protection table, whether the first memory is protected, and is further configured to:
  • the memory protection table is configured to record the first memory as protected memory or to record the first memory as unprotected memory, where the protected memory is included
  • the first running space 611 is a kernel space
  • the first processing module is an operating system
  • the protected data includes: constant data written by the operating system to the memory during the compiling phase, and the operating system writes constant data of the memory during the initialization phase.
  • the data protection device 600 is a mobile phone, a tablet, a server, a personal computer, a network router, or a switch.
  • the second process needs to go through the second Authorization of the second processing module in the run space 612, which causes the first processing module in the first run space 611 to be inaccessible to the register and/or memory space, and the second processing module running in the second run space 612
  • the first processing module running in the first running space 611 is further notified to process the attack event, so that dynamic measurement of the kernel integrity can be implemented, thereby realizing real-time The invasion is terminated and the security is higher.
  • the kernel integrity protection method is specifically a data protection method
  • the kernel integrity protection device is specifically a data protection device.
  • the MMU performs a two-stage address mapping process for an application with an exception level of EL0 and an operating system with an exception level of EL1, and is a management program with an exception level of EL3 and a security monitor with an exception level of EL4. Perform a phased address mapping process.
  • the virtual address (VA) of the memory is converted to an intermediate physical address (IPA); in the second phase, the IPA is converted into a physical address (physical address). , PA).
  • TTBR translation table base register
  • VTTBR conversion translation table base register
  • the MMU can directly derive the PA according to the VA conversion.
  • the management program EL2 and the security supervisor EL3 have their own one-stage conversion tables.
  • the hypervisor EL2 and the security supervisor EL3 can directly convert from a virtual address to a physical address through respective corresponding tables.
  • the base address of the conversion table corresponding to the hypervisor EL2 is specified in TTNR0_EL2
  • the base address of the conversion table corresponding to the security supervisor EL3 is specified in TTNR0_EL3.
  • a continuous and variable-size address space at the bottom of the memory is respectively designated as the base address of the translation address table of the hypervisor EL2 and the security supervisor EL3.
  • TTBRn_EL1, TTNR0_EL2 and TTNR0_EL3 are only an example, and different names may be referred to in different materials.
  • the first phase is usually executed under the control of the operating system, and the second phase is usually executed under the control of the hypervisor.
  • the execution of the management program under the control of the management program can be understood as follows: the management program determines that the IPA or the VA corresponding to the IPA can be accessed, and then the MMU is authorized to perform IPA to PA conversion.
  • the data protection method of the embodiment of the present application is mainly implemented in the address mapping process of the second stage described above under the control of the management program.
  • the memory protection table is pre-stored in the computer, and the memory protection table records address information of the memory that needs to be protected and/or does not need to be protected, and a processing module is added in the management program, and the processing module queries the memory protection table whether Includes address information for the memory that the operating system or application requests to modify access properties. If the processing module queries the memory protection table and determines that the memory requested to modify the access attribute is a protected memory, the MMU is denied to modify the access attribute of the memory.
  • Table 1 An example of a memory protection table is shown in Table 1.
  • Table 1 both protected memory and unprotected memory are recorded, the first column records the virtual address of the protected memory, and the second column records the virtual address of the unprotected memory.
  • Protected memory virtual address Virtual address of unprotected memory 0x40000000-0x60000000 0x00000000-0x30000000
  • malware For example, if a computer downloads malware, or if a web page is viewed with a malicious plugin, the malware or
  • the malicious plug-in attacks the operating system, obtains the management rights of the operating system, and controls the operating system to change the access attribute of the memory whose virtual address is 0x41115000 to 0x41116000 from writable to read-only, so that the malware or malicious plug-in can modify the in-memory.
  • the management program in the process of the second stage mapping of the address of the memory by the MMU, the memory protection table is queried to know that the memory is protected, thereby rejecting the MMU to perform the second stage address mapping process, that is, rejecting Attacks by malware or malicious plugins protect the data in memory.
  • the management program may also issue a prompt message that the protected memory is attacked, for example, popping up a display box or sending an alarm sound.
  • the data protection device 800 shown in FIG. 8 is taken as an example to describe the data protection method proposed in the present application. It should be understood that the data protection device 800 shown in FIG. 8 is only an example, and the data protection device of the embodiment of the present application may further include other modules or units, or include modules similar to those of the modules in FIG. 8, or Includes all the modules in Figure 8.
  • the data protection device 800 shown in FIG. 8 includes a processor 810 and a memory 820.
  • the memory can exchange data with the processor 810.
  • RAM random access memory
  • main memory main memory
  • flash memory Another example of the memory 820 is a flash memory. It should be understood that the memory in subsequent embodiments may be replaced with a flash memory.
  • processor 810 is a central processing unit (CPU).
  • CPU central processing unit
  • the CPU can also be referred to as a central processor.
  • a CPU execution unit 811 and a memory management unit 812 may be included in the processor 810. It should be understood that the integration of the MMU herein within the processor 810 is just one example, and the MMU may also be located outside of the processor 810.
  • ELs exception levels
  • the four exception levels are EL0, EL1, EL2, and EL3 from low to high.
  • EL0, EL1, EL2 and EL3 correspond to four operating spaces.
  • the running space corresponding to EL0 is the user program space, and the user program space is used to run the user program.
  • User programs can also be called applications.
  • the running space corresponding to EL1 is a kernel space, and the kernel space is used to run an operating system (OS).
  • OS operating system
  • An operating system running in kernel space can also be referred to as a guest operating system.
  • the running space corresponding to EL2 is the super management space.
  • the super management space is used to run the hypervisor.
  • the hypervisor can also be called a virtual machine monitor.
  • the hypervisor is an intermediate layer of software that runs between physical hardware and the operating system, allowing multiple operating systems and applications to share a single set of physical hardware.
  • the main function of the hypervisor is memory management and interrupt interception. In these two ways, the hypervisor can well monitor the operation of the operating system in kernel space.
  • the hypervisor can implement memory management through the MMU 812's two stage (stage 2) memory mapping function.
  • the MMU 812 can implement storage management through techniques such as a shadow page table or an EPT page table.
  • stage 1 the address of the user program in the kernel space or the user program space in the user program space can be sent.
  • the address sent by the user program in the kernel space or the user program space in the user program space may be referred to as a virtual address, or the address visible to the operating system or the user program is VA; the real address of the memory chip is called a physical address; VA
  • VA The address used in the process of mapping to the PA can be referred to as IPA.
  • stage-2 memory map function is only valid for operating systems running in kernel space and user programs in user program space. That is to say, the stage-2 memory mapping function is required only when the operating system running in kernel space and the user program in the user program space access memory.
  • the implementation of the two-stage memory mapping feature of the MMU 812 described above is just an example.
  • the implementation of the two-stage memory mapping function of the MMU 812 reference may be made to the prior art, and details are not described herein again.
  • Memory has access rights properties.
  • the access permission attribute of the memory is simply referred to as the attribute of the memory in the embodiment of the present application.
  • Memory attributes can include read-only, writable, inaccessible, and executable.
  • the memory attribute is read-only, which means that only the content in the memory can be read, and the content in the memory cannot be modified; if the attribute of the memory is writable, the content in the memory can be read, or can be modified. The contents of this memory.
  • the MMU 812 After receiving the address sent by the user program in the kernel space or the user program space in the user program space, the MMU 812 can access the content in the memory corresponding to the address according to the attribute of the memory corresponding to the address.
  • the MMU 812 For example, if the operating system in the kernel space or the user program in the user program space requests the MMU 812 to write data to the memory corresponding to an address, and the attribute of the memory corresponding to the address is writable, the MMU 812 will After the address is mapped to the physical address of the memory, the physical address is sent to the address bus for data to be written to.
  • the MMU 812 rejects the request.
  • An example of the MMU 812 rejecting the request is to make an exception prompt.
  • an operating system running in kernel space can invoke a hypervisor through a hypervisor call (HVC) instruction.
  • HVC hypervisor call
  • the security monitor space corresponding to the EL4 is used to run the security monitoring module of the processor.
  • the data protection method proposed by the present application mainly includes: when the program code running in the running space of the low abnormal level requests to modify the attribute of the memory, the program code running in the running space of the high abnormal level captures the request, and determines whether the memory is subjected to the request. Protected memory; if the memory is the protected memory, the program code running in the high exception level runtime rejects this modification.
  • FIG. 10 A schematic flowchart of a data protection method of an embodiment of the present application is shown in FIG. This data protection method can be performed by the data protection device 800.
  • the data protection method shown in FIG. 10 includes S1010, S1020, S1030, S1040, and S1050.
  • FIG. 10 illustrates the steps or operations of the data protection method, but these steps or operations are merely examples, and other embodiments of the present application may also perform other operations or variations of the operations in FIG. Moreover, the various steps in FIG. 10 may be performed in a different order than that presented in FIG. 10, and it is possible that not all operations in FIG. 10 are to be performed.
  • the processing module running in the first running space sends a first message to the MMU, where the first message is used to request to modify the attribute of the first memory. Accordingly, the MMU receives the message.
  • the processing module running in the first running space may be referred to as a first processing module.
  • the first memory refers to the memory of the first message requesting modification of the attribute.
  • the first run space may be the user program space or kernel space shown in FIG.
  • the first processing module may be a user program; when the first running space is a kernel space, the first processing module may be an operating system.
  • the first message may include a VA of the first memory and a target attribute of the first memory. That is, the first message is used to request the MMU to modify the attribute of the first memory to the target attribute.
  • the target attribute of the first memory may include at least one of read-only, writable, executable, and inaccessible.
  • An example of requesting to modify the target attribute of the first memory to be writable is an instance of set_memory_RW; an instance of the first message requesting modification of the target attribute of the first memory to read-only is set_memory_RO.
  • S1020 The MMU sends a second message to the processing module running in the second running space, where the second message is used to request the processing module to determine whether the first memory is protected, and the abnormality level of the second running space is higher than the first running space. The level of exception.
  • the processing module running in the second runtime space receives the second message.
  • the processing module running in the second running space may be referred to as a second processing module or a kernel critical data protection module.
  • the second processing module or the kernel critical data protection module may be a processing module in the hypervisor.
  • the second run space may be the super management space shown in FIG.
  • the second message is also understood to be used to request the second processing module to determine whether the attribute of the first memory can be modified, or can be understood to be used to request the second processing module to determine whether the data in the first memory is protected. of.
  • the address of the first memory may be included in the second message.
  • the VA of the first memory may be included in the second message.
  • the information included in the second message may be the same as the information included in the first message.
  • the processing module running in the second running space determines whether the first memory is protected according to the pre-acquired memory protection table, where the memory protection table is used to record the protected memory and/or the unprotected memory.
  • Protected memory can be understood as storing protected data.
  • the protected data may include at least one of the following: constant data of the operating system or data generated by the operating system during operation that needs to be protected.
  • the constant data of the operating system may include at least one of the following: constant data that appears during the compilation phase of the operating system and constant data that appears during the initialization phase of the operating system.
  • the interpretation of the protected memory may include that the attributes of the memory may not be modified from write-only, inaccessible, executable to writable; the interpretation of the unprotected memory may include: The properties of this memory can be modified from any property to any other property.
  • One way in which the memory protection table records protected memory and/or unprotected memory may include: recording the address of the protected memory and/or the address of the unprotected memory in the memory protection table.
  • the memory protection table can record the VA address of the protected memory and/or the VA address of the unprotected memory.
  • the processing module running in the second running space determines whether the first memory is protected according to the pre-acquired memory protection table, and may include: if the protected memory recorded in the memory protection table is included The first memory, the processing module running in the second running space determines that the first memory is protected; if the protected memory recorded in the memory protection does not include the first memory, the processing module running in the second running space Make sure the first memory is unprotected.
  • only unprotected memory can be recorded in the memory protection table.
  • the processing module running in the second running space determines whether the first memory is protected according to the pre-acquired memory protection table, and may include: if the unprotected memory recorded in the memory protection table is not Including the first memory, the processing module running in the second running space determines that the first memory is protected; if the unprotected memory recorded in the memory protection includes the first memory, the processing running in the second running space The module determines that the first memory is unprotected.
  • the memory protection table can record both protected memory and unprotected memory.
  • the processing module running in the second running space determines whether the first memory is protected according to the pre-acquired memory protection table, and may include: if the protected memory recorded in the memory protection table includes the first a memory, the processing module running in the second running space determines that the first memory is protected; if the unprotected memory recorded in the memory protection table includes the first memory, the processing module running in the second running space Make sure the first memory is unprotected.
  • S1040 The processing module running in the second running space sends a third message to the MMU, where the third message is used to indicate whether the MMU modifies the attribute of the first memory. Accordingly, the MMU receives the third message.
  • the third message is used to instruct the MMU to modify the attribute of the first memory; if the second processing module determines that the first memory is protected, The third message is used to indicate that the MMU does not modify the attributes of the first memory.
  • S1050 If the third message is used to instruct the MMU to modify the attribute of the first memory, the MMU modifies the attribute of the first memory according to the first message; if the third message is used to indicate that the MMU does not modify the attribute of the first memory, the MMU refuses to modify The first memory attribute.
  • the MMU modifies the attribute of the first memory to the target attribute.
  • the MMU may return an abnormal operation prompt to the first processing module.
  • FIG. 11 a schematic flowchart of a method for assisting in protecting data is shown in FIG.
  • the method shown in FIG. 11 may include S1110 and S1120.
  • the method can be performed by data protection device 800.
  • FIG. 11 illustrates the steps or operations of the method, but these steps or operations are merely examples, and other embodiments of the present application may also perform other operations or variations of the operations in FIG. Moreover, the various steps in FIG. 11 may be performed in a different order than that presented in FIG. 11, and it is possible that not all operations in FIG. 11 are to be performed.
  • S1110 The processing module running in the third running space sends a fourth message to the processing module running in the second running space, where the fourth message is used to indicate whether the second memory should be protected.
  • the processing module in the second runtime receives the fourth message.
  • the third running space may be the user program space or the kernel space shown in FIG. 9.
  • the second run space may be the super management space shown in FIG.
  • the third running space and the first running space may be the same running space.
  • the processing module running in the second running space may be a second processing module or a kernel critical data protection module.
  • the fourth message may also be understood to indicate that the data stored in the second memory should be protected, or may be understood to indicate that the attribute of the second memory cannot be modified from any of read-only, executable, and inaccessible to Writable, or, can be understood as indicating that the data stored in the second memory should not be modified.
  • Data that should be protected or should not be modified may include at least one of the following: constant data stored by the operating system in memory during the compilation phase, constant data stored in memory during the initialization phase of the operating system, operating system or user program at Data that is stored in memory during the run phase and cannot be modified.
  • the address of the second memory may be included in the fourth message.
  • the VA of the second memory may be included in the fourth message.
  • the sending, by the processing module running in the third running space, the fourth message to the processing module running in the second running space may include: the processing module running in the third running space is called in the second running space.
  • the processing module is executed, and when invoked, the fourth message is delivered to the processing module running in the second running space through the interface.
  • an operating system running in kernel space can invoke a hypervisor running in a hypervisor space through an HVC instruction, so that the hypervisor generates a memory protection table based on the fourth message.
  • the processing module running in the second running space obtains a memory protection table according to the fourth message, where the memory protection table is used to record the protected and/or unprotected memory.
  • the abnormality level of the second running space is higher than the abnormal level of the third running space.
  • the processing module running in the second running space can record the second memory into the memory protection table. If the fourth message is used to indicate that the second memory should not be protected, the processing module running in the second running space does not record the second memory into the memory protection table.
  • the processing module running in the second running space can record the second memory to the memory protection.
  • the processing module running in the second running space does not record the second memory into the memory protection table.
  • the processing module running in the second running space may Recording the second memory into the memory protection table and identifying the second memory as protected memory; if the fourth message is used to indicate that the second memory should not be protected, the processing module running in the second running space may be The second memory is logged to the memory protection table and identifies the second memory as unprotected memory.
  • An example of the embodiment of the present application includes: the operating system writes constant data into the memory during the compiling phase, and after identifying the attribute of the memory as read-only, the hypervisor is called by the HVC instruction, and the memory is recorded as the protected memory.
  • Another example of the embodiment of the present application includes: the operating system writes constant data into the memory during the initialization phase, and after identifying the attribute of the memory as read-only, calls the hypervisor through HVC therapy, and records the memory as protected memory. .
  • the operating system writes data into the memory during the running phase, and after identifying the attribute of the memory as read-only, the hypervisor is invoked by the HVC treatment, and the memory is recorded as the protected memory.
  • the memory protection table used in S1030 can be obtained by the method shown in FIG. In other words, the memory protection table used in S1030 can be the memory protection table obtained in S1120.
  • the second memory and the first memory may be the same memory; the third running space and the first running space may be the same running space, or may be different. Running space.
  • the processing module running in the third running space and the first processing module may be the same processing module.
  • the first running space and the third running space are both kernel spaces
  • the processing module and the first processing module running in the third running space are both operating systems.
  • the hypervisor can be called by the HVC instruction.
  • the first memory is recorded as protected memory in the memory protection table.
  • the MMU may send a second message to the hypervisor requesting the hypervisor to determine whether the first memory is protected. Since the first memory is protected memory in the memory protection table, the hypervisor indicates that the MMU cannot modify the attributes of the first memory.
  • the running space that is not the same as the first running space is that the first running space is a user program space, the third running space is a kernel space, the first processing module is an operating system, and the third running space is in a third running space.
  • the processing module is a user program.
  • FIG. 12 a schematic flowchart of a method for assisting in protecting data is shown in FIG.
  • the method shown in FIG. 12 may include S1210 and S1220.
  • the method can be performed by data protection device 800.
  • FIG. 12 illustrates the steps or operations of the method, but these steps or operations are merely examples, and other embodiments of the present application may also perform other operations or variations of the various operations in FIG. Moreover, the various steps in FIG. 12 may be performed in a different order than that presented in FIG. 12, and it is possible that not all operations in FIG. 12 are to be performed.
  • the processing module running in the second running space determines that the third memory is used to store the protected data and/or the fourth memory is used to store the unprotected data.
  • the processing module running in the second run space determines which memory is used to store the protected data and/or which memory is used to store the unprotected data.
  • the memory used to store protected data is the third memory
  • the memory used to store unprotected data is the fourth memory.
  • the second run space may be the super management space shown in FIG.
  • the protected data may include at least one of the following: constant data stored in the operating system during the compilation phase, constant data stored in the operating system during the initialization phase, and the operating system or user program being stored in the memory during the run phase. Data that cannot be modified.
  • the third memory and/or the fourth memory may be determined by the processing module running in the second running space according to the pre-configured information, wherein the third memory is recorded in the pre-configured information for storing the protected data and / or fourth memory is used to store unprotected data.
  • the pre-configured information records which memory is used to store protected data, and/or records which memory is used to store unprotected data.
  • a memory for storing constant data of an operating system may be allocated in advance to an operating system in the kernel space. Since the constant data of the operating system is data that needs to be protected, the memory can be pre-configured as the information of the third memory. In this way, the processing module running in the second running space can determine, according to the pre-configured information, that the third memory is used to store the protected data.
  • the VA of the memory allocated for the constant data of the operating system can be recorded in the pre-configured information.
  • the processing module running in the second running space can determine, according to the pre-configured information, that the memory corresponding to the VA is used to store the protected data, that is, the memory is the third memory.
  • the processing module running in the second running space generates a memory protection table, where the third memory is protected memory and/or the fourth memory is unprotected memory.
  • the processing module running in the second running space determines that the third memory is the memory for storing the protected data
  • the third memory is recorded into the memory protection table, and the third memory is identified as the protected memory.
  • the fourth memory is recorded into the memory protection table, and the fourth memory is identified as unprotected memory.
  • the memory protection table used in S1030 can be obtained by the method shown in FIG. In other words, the memory protection table used in S1030 can be the memory protection table obtained in S1220.
  • the third memory and the first memory may be the same memory, or the fourth memory and the first memory may be the same memory.
  • the hypervisor can record the third memory in the memory protection table. Protected memory.
  • the MMU may send a second message to the hypervisor requesting the hypervisor to determine whether the third memory is protected. Since the third memory is protected memory in the memory protection table, the hypervisor indicates that the MMU cannot modify the attributes of the third memory.
  • FIG. 1 A schematic flowchart of a data protection method of an embodiment of the present application is shown in FIG.
  • the data protection method includes S1310 and S1320.
  • FIG. 13 shows the steps or operations of the data protection method, but these steps or operations are merely examples, and other embodiments of the present application may also perform other operations or variations of the operations in FIG. Further, the respective steps in Fig. 13 may be performed in a different order from that presented in Fig. 13, and it is possible that not all operations in Fig. 13 are to be performed.
  • the processing module in the fourth running space sends a fifth message to the processing module in the second running space, where the fifth message is used to request that the first data is written into the fifth memory, where the abnormality level of the second running space is high.
  • the level of exception in the fourth run space is not limited to:
  • the fourth run space may be the user program space or kernel space shown in FIG. 9, and the second run space may be the super management space shown in FIG.
  • the address of the first data and the fifth memory may be carried in the fifth message.
  • the VA of the first data and the fifth memory may be carried in the fifth message.
  • the first data may include at least one of the following: constant data of the operating system at the compile stage, and constant data of the operating system during the initialization phase.
  • the fifth memory is a memory for storing the first data.
  • the processing module running in the second running space writes the first data into the fifth memory according to the fifth message.
  • the processing module in the fourth running space needs to modify the data in the memory through the processing module in the second running space that is higher than the abnormal level, that is, the processing module in the fourth running space. You can't directly modify the data in memory, so this method can improve the security of the data.
  • the method in the embodiment of the present application can modify the data in the memory as compared with the method in FIG. 10, and thus the flexibility is higher.
  • the processing module running in the second running space may write the first data to the fifth according to the request of the fifth message if the fifth message is sent by a predetermined module.
  • Memory to further improve the security of the data, thereby improving the security of the operating system.
  • the hypervisor writes the first data to the fifth memory only if the operating system's patch calls the hypervisor via the HVC instruction.
  • the S1320 may specifically include: when the fifth message is sent by the pre-specified processing module to the processing module running in the second running space, in the second running space The running processing module writes the first data into the fifth memory according to the request of the fifth message.
  • the data protection method shown in FIG. 13 can be used in combination with the method shown in at least one of FIGS. 10 to 12.
  • the data protection device 800 can generate a memory protection table by the method of FIG. 11 and/or FIG. 12, and then can determine whether the memory is protected by the method shown in FIG. 10, and can pass the data protection method shown in FIG. To modify the data.
  • the fourth running space and the first running space may be the same running space.
  • the fourth running space and the first running space may both be kernel space
  • the processing module in the first running space may be an operating system
  • the processing module in the fourth running space may be a patch of an operating system
  • FIG. 6 a schematic structural diagram of a data protection device of an embodiment of the present application is shown. It should be understood that the data protection device 600 shown in FIG. 6 is only an example, and the data protection device of the embodiment of the present application may further include other modules or units, or include modules similar to those of the modules in FIG. 6, or not Includes all the modules in Figure 6.
  • the data protection device 600 includes a processor execution unit 610 and a memory management unit 620.
  • the operation space divided by the processor execution unit 610 includes a first operation space 611 and a second operation space 612, and the abnormality level of the second operation space is higher than the first An exception level of the running space, the first running space is for running the first processing module, and the second running control is for running the second processing module.
  • the data protection device 600 can be used to perform the steps performed by the data protection device in the data protection method shown in any of FIGS. 9 to 13.
  • the first processing module is configured to send a first message to the memory management unit 620, where the first message is used to request to modify an attribute of the first memory.
  • the memory management unit 620 is configured to send a second message to the second processing module, where the second message is used to request to determine whether the first memory is protected.
  • the second processing module is configured to determine, according to the pre-acquired memory protection table, whether the first memory is protected.
  • the second processing module sends a third message to the memory management unit 620, where the third message is used to indicate whether to modify the attribute of the first memory.
  • the memory management unit is configured to: when the third message is used to indicate that the attribute of the first memory is modified, modify an attribute of the first memory according to the first message; and use the third message in the third message Instructing not to modify the attribute of the first memory, and refusing to modify the attribute of the first memory.
  • the first processing module is configured to send a fourth message to the second processing module in the second running space, where the fourth message is used to indicate whether the first memory is protected.
  • the second processing module is specifically configured to generate, according to the fourth message, the memory protection table, where the memory protection table is used to record protected memory and/or unprotected memory, where the protected memory includes A memory for storing protected data, including memory for storing unprotected data.
  • the second processing module is specifically configured to: determine that the first memory is used to store protected data or determine that the first memory is used to store unprotected data; and generate the memory protection table,
  • the memory protection table is configured to record the first memory as protected memory or to record the first memory as unprotected memory, where the protected memory includes memory for storing protected data.
  • the unprotected memory includes memory for storing unprotected data.
  • the first running space is a kernel space
  • the first processing module is an operating system
  • the protected data includes: constant data written by the operating system into a memory during a compiling phase, The constant data that the operating system writes to memory during the initialization phase.
  • the data protection device 600 may further include a memory for storing program codes and data executed by the processor execution unit 610.
  • the data protection device 600 can be a cell phone, a tablet, a server, a personal computer, a network router, or a switch.
  • the disclosed apparatus and method can be implemented in other ways.
  • the device embodiments described above are merely illustrative.
  • the division of the unit is only a logical function division.
  • there may be another division manner for example, multiple units or components may be combined or Can be integrated into another system, or some features can be ignored or not executed.
  • the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or unit, and may be in an electrical, mechanical or other form.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of the embodiment.
  • each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.
  • the functions may be stored in a computer readable storage medium if implemented in the form of a software functional unit and sold or used as a standalone product.
  • the technical solution of the present application which is essential or contributes to the prior art, or a part of the technical solution, may be embodied in the form of a software product, which is stored in a storage medium, including
  • the instructions are used to cause a computer device (which may be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present application.
  • the foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory, a magnetic disk, or an optical disk, and the like, which can store program codes.

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Abstract

本发明实施例涉及一种内核完整性保护方法及装置，该方法包括：第一运行空间中运行的第一处理模块向第二运行空间中运行的第二处理模块发送请求消息，所述请求消息用于请求进行内存访问，所述内存访问涉及对预设寄存器的访问和/或对预设内存空间的访问；第二运行空间中运行的第二处理模块响应于所述请求消息，获取所述内存访问对应的事件的信息，并将所述信息发送给所述第一运行空间中运行的第一处理模块；所述第一运行空间中运行的第一处理模块根据所述信息对所述事件进行处理，从而能够做到动态对内核完整性实施度量，进而实现实时的入侵终止。

Description

一种内核完整性保护方法及装置
本申请要求于2018年03月02日提交中国专利局、申请号为201810173059.9、申请名称为“基于芯片虚拟化技术的内核完整性保护方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
本申请要求于2018年02月02日提交中国专利局、申请号为PCT/CN2018/075086、申请名称为“数据保护方法和数据保护装置”的PCT专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及电子设备领域，尤其涉及一种内核完整性保护方法及装置。
背景技术
操作系统安全性是计算设备系统安全性不可或缺的一部分，在操作系统中，系统内核获得处理器执行权限后，内核中恶意代码的执行通常无法被干涉，因此通常的内核完整性检测只能做到静态对内核完整性实施度量，而这样的度量要不就是恶意入侵可能还没发生，要不就是恶意入侵已经得手，都无法实现实时的入侵终止。
为了实现实时的入侵终止，大多数的内核完整性保护方法本身需要在内核中实现必要功能模块或在内核中设置钩子(hook)程序实现对内核入侵的检查和保护。比如返回地址保护(return address protection，RAP)，控制流完整性(control flow integrity，CFI)保护，栈溢出保护等。由于增加的功能模块或程序与内核处于同一层，因此，这种方法本身内核的完整性就无法保证，并且某种意义上这些方案本身就破坏了内核的完整性。在内核存在漏洞的情况，现有保护技术有被绕过或破解的可能。检查代码存在于内核中，对系统的性能和功耗影响较大。
因此，需要提出一种安全性更高的内核完整性保护方法来保护内核。
发明内容
本发明实施例提供了一种内核完整性保护方法及装置，能够做到动态对内核完整性实施度量，进而实现实时的入侵终止，安全性更高。
第一方面，提供了一种内核完整性保护方法。所述内核完整性保护方法由内核完整性保护装置执行，所述内核完整性保护装置中包括处理器执行单元，所述处理器执行单元划分的运行空间包括第一运行空间和第二运行空间，所述第二运行空间的异常级别高于所述第一运行空间的异常级别；所述内核完整性保护方法包括：所述第一运行空间中运行的第一处理模块向所述第二运行空间中运行的第二处理模块发送请求消息，所述请求消息用于请求进行内存访问，所述内存访问涉及对预设寄存器的访问和/或对预设内存空间的访问；所述第二运行空间中运行的第二处理模块响应于所述请求消息，获取所述内存访问对应的事件的信息；所述第二运行空间中运行的第二处理模 块将所述信息发送给所述第一运行空间中运行的第一处理模块；所述第一运行空间中运行的第一处理模块根据所述信息对所述事件进行处理。
本发明实施例中，由于第二运行空间的异常级别高于第一运行空间的异常级别，且第一运行空间中的第一处理模块需要进行特定的内存访问时，需要经过第二运行空间中的第二处理模块的授权，这使得第一运行空间中的第一处理模块不能随意访问寄存器和/或内存空间，并且所述第二运行空间中运行的第二处理模块确定校验结果为所述内存访问不合法时，进一步通知所述第一运行空间中运行的第一处理模块对攻击事件进行处理，从而能够做到动态对内核完整性实施度量，进而实现实时的入侵终止，安全性更高。
在一种可能的实施方式中，所述第一运行空间为内核空间，所述第一处理模块为操作系统，所述第二运行空间为超级管理空间或安全监视空间。
可以理解的是，超级管理空间或安全监视空间比内核空间的异常级别高，从而可以当超级管理空间或安全监视空间的处理模块检测出内核空间运行的操作系统受到攻击时，指示操作系统对攻击事件进行处理。此外，超级管理空间或安全监视空间的权限比内核空间要高，内核空间受到攻击执行流会自动转换到超级管理空间或安全监视空间。为了实现这种自动转换可以在处理器启动的初期进行配置，即处理器处于超级管理空间或安全监视空间的时候进行配置，当内核空间运行操作系统后，由于超级管理空间或安全监视空间对于应用程序不存在接口，仅有异常处理接口，因此，超级管理空间或安全监视空间无法入侵，安全性高。
在一种可能的实施方式中，所述对预设寄存器的访问，包括：对系统控制寄存器的读或写。根据该实施方式，能够防止对预设寄存器的恶意篡改。
在一种可能的实施方式中，所述对预设内存空间的访问，包括：修改内核代码段、关闭内存管理单元(memory management unit，MMU)、修改内核页表和修改用户页表中的至少一项。根据该实施方式，能够实现对多种试图修改内核的操作进行检测。可以理解的是，检测的操作可以但不限于包括上述至少一种操作。
在一种可能的实施方式中，所述处理器执行单元划分的运行空间还包括第三运行空间，所述第三运行空间的异常级别低于所述第一运行空间的异常级别；所述第一运行空间中运行的第一处理模块根据所述信息对所述事件进行处理，包括：所述第一运行空间中运行的第一处理模块根据所述信息向所述第三运行空间中运行的第三处理模块发送信号，所述信号用于杀掉所述事件对应的进程。根据该实施方式，对攻击进行处理的方式可以包括杀掉攻击进程，从而实现实时的入侵终止。
在一种可能的实施方式中，所述处理器执行单元划分的运行空间还包括第三运行空间，所述第三运行空间的异常级别低于所述第一运行空间的异常级别；所述第一运行空间中运行的第一处理模块根据所述信息对所述事件进行处理，包括：所述第一运行空间中运行的第一处理模块根据所述信息向所述第三运行空间中运行的第四处理模块上报日志，所述日志包括所述信息。根据该实施方式，对攻击进行处理的方式可以包括向第三运行空间上报攻击日志，以便对攻击信息进行记录，便于后续对攻击信息的统计分析及进一步的处理。
在一种可能的实施方式中，所述方法还包括：所述第三运行空间中运行的第四处 理模块将所述日志上传到云端服务器；所述第三运行空间中运行的第四处理模块从所述云端服务器接收安全策略或补丁。根据该实施方式，第三运行空间中运行的第四处理模块从云端服务器接收安全策略或补丁后，不仅可以实现实时的入侵终止，而且可以防止后续发生类似的攻击。
在一种可能的实施方式中，所述第三运行空间为用户程序空间。根据该实施方式，可以保证对攻击事件的处理用户可见。
在一种可能的实施方式中，所述信息包括攻击类型、攻击进程的名字和端口号中的至少一项。可以理解的是，上述攻击信息可以通过读取特定寄存器获取。根据该实施方式，通过对多种攻击信息的统计分析，从而可以优化安全策略或补丁。
电子设备上的操作系统中的运行数据都是使用内存进行存储。这些运行数据中有的重要是需要保护的，即不能被随意更改的。
一般来说，这些不可更改的数据被更改的话，会导致电子设备故障或者信息安全漏洞。
例如，电子设备上的操作系统中的重要数据被恶意更改的话，会导致操作系统运行错误，从而导致电子设备故障或者信息安全漏洞。
现有的电子设备中，重要数据可以通过如下方式来保护：操作系统将重要数据所在的内存的属性设置为只读，以保护这些重要数据不被恶意修改。
但这种保护方法的安全性较低。例如，恶意软件获取操作系统的管理权限之后，就可以去掉操作系统设置的内存的只读属性，从而可以修改这些重要数据。
因此，需要提出一种安全性更高的数据保护方法来保护数据。
在一种可能的实施方式中，所述内核完整性保护方法具体为数据保护方法，所述内核完整性保护装置具体为数据保护装置，该数据保护装置中包括所述处理器执行单元和内存管理单元，该数据保护方法包括：
第一运行空间中运行的第一处理模块向内存管理单元发送第一消息，第一消息用于请求修改第一内存的属性；
内存管理单元向第二运行空间中运行的第二处理模块发送第二消息，第二消息用于请求确定第一内存是否是受保护的；
第二运行空间中运行的第二处理模块根据预先获取的内存保护表，确定第一内存是否是受保护的；
第二运行空间运行的第二处理模块向内存管理单元发送第三消息，第三消息用于指示是否修改第一内存的属性；
若第三消息用于指示修改第一内存的属性，则内存管理单元根据第一消息修改第一内存的属性；若第三消息用于指示不修改第一内存的属性，则内存管理单元拒绝修改第一内存的属性。
该数据保护方法中，由于第二运行空间的异常级别高于第一运行空间的异常级别，且第一运行空间中的第一处理模块需要修改内存的属性时，需要经过第二运行空间中的第二处理模块的授权，这使得第一运行空间中的第一处理模块不能随意修改内存的属性，从而不能随意修改内存中的数据，最终有助于提高数据的安全性。
在一种可能的实现方式中，第二运行空间中运行的第二处理模块根据预先获取的 内存保护表，确定第一内存是否是受保护的之前，该数据保护方法还包括：
第一运行空间中的第一处理模块向第二运行空间中的第二处理模块发送第四消息，第四消息用于指示第一内存是否是受保护的；
第二运行空间中的第二处理模块根据第四消息生成内存保护表，内存保护表用于记录受保护的内存和/或不受保护的内存，受保护的内存包括用于存储受保护的数据的内存，不受保护的内存包括用于存储不受保护的数据的内存。
该实现方式中，可以由第一运行空间中的第一处理模块向第二运行空间中的第二处理模块指示哪些内存是受保护和/或哪些内存是不受保护的。
在一种可能的实现方式中，第二运行空间中运行的第二处理模块根据预先获取的内存保护表，确定第一内存是否是受保护的之前，该数据保护方法还包括：
第二运行空间中运行的第二处理模块确定第一内存用于存储受保护的数据或确定第一内存用于存储不受保护的数据；
第二运行空间中运行的第二处理模块生成内存保护表，内存保护表用于记录第一内存为受保护的内存或用于记录第一内存为不受保护的内存，受保护的内存包括用于存储受保护的数据的内存，不受保护的内存包括用于存储不受保护的数据的内存。
该实现方式中，受保护的内存和/或不受保护的内存可以是预先确定的。
在一种可能的实现方式中，第一运行空间为内核空间，第一处理模块为操作系统，所述第二运行空间为超级管理空间。其中，受保护的数据包括：操作系统在编译阶段写入内存的常量数据，操作系统在初始化阶段写入内存的常量数据。
在一种可能的实现方式中，数据保护装置为手机、平板电脑、服务器、个人电脑、网络路由器或交换机。
第二方面，提供了一种内核完整性保护装置，所述内核完整性保护装置中包括处理器执行单元，所述处理器执行单元划分的运行空间包括第一运行空间和第二运行空间，所述第二运行空间的异常级别高于所述第一运行空间的异常级别，所述第一运行空间用于运行第一处理模块，所述第二运行空间用于运行第二处理模块；
所述第一处理模块，用于向所述第二处理模块发送请求消息，所述请求消息用于请求进行内存访问，所述内存访问涉及对预设寄存器的访问和/或对预设内存空间的访问；
所述第二处理模块，用于响应于所述请求消息，获取所述内存访问对应的事件的信息，并将所述信息发送给所述第一运行空间中运行的第一处理模块；
所述第一处理模块，还用于根据所述信息对所述事件进行处理。
在一种可能的实施方式中，所述第一运行空间为内核空间，所述第一处理模块为操作系统，所述第二运行空间为超级管理空间或安全监视空间。
在一种可能的实施方式中，所述第一处理模块用于请求的所述对预设寄存器的访问，包括：
对系统控制寄存器的读或写。
在一种可能的实施方式中，所述第一处理模块用于请求的所述对预设内存空间的访问，包括：
修改内核代码段、关闭内存管理单元、修改内核页表和修改用户页表中的至少一 项。
在一种可能的实施方式中，所述处理器执行单元划分的运行空间还包括第三运行空间，所述第三运行空间的异常级别低于所述第一运行空间的异常级别；所述第三运行空间用于运行第三处理模块；
所述第一处理模块，具体用于根据所述信息向所述第三处理模块发送信号，所述信号用于杀掉所述事件对应的进程。
在一种可能的实施方式中，所述处理器执行单元划分的运行空间还包括第三运行空间，所述第三运行空间的异常级别低于所述第一运行空间的异常级别；所述第三运行空间用于运行第四处理模块；
所述第一处理模块，具体用于根据所述信息向所述第四处理模块上报日志，所述日志包括所述信息。
在一种可能的实施方式中，所述第四处理模块，还用于将所述日志上传到云端服务器；以及从所述云端服务器接收安全策略或补丁。
在一种可能的实施方式中，所述第三运行空间为用户程序空间。
在一种可能的实施方式中，所述攻击信息包括攻击类型、攻击进程的名字和端口号中的至少一项。
在一种可能的实施方式中，所述装置具体为数据保护装置，该数据保护装置中包括处理器执行单元和内存管理单元。
第一处理模块用于向内存管理单元发送第一消息，第一消息用于请求修改第一内存的属性；
内存管理单元用于向第二处理模块发送第二消息，第二消息用于请求确定第一内存是否是受保护的；
第二处理模块用于根据预先获取的内存保护表，确定第一内存是否是受保护的；
第二处理模块还用于向内存管理单元发送第三消息，第三消息用于指示是否修改第一内存的属性；
内存管理单元还用于：第三消息用于指示修改第一内存的属性时根据第一消息修改第一内存的属性，第三消息用于指示不修改第一内存的属性时拒绝修改第一内存的属性。
在一种可能的实现方式中，第一处理模块还用于向第二运行空间中的第二处理模块发送第四消息，第四消息用于指示第一内存是否是受保护的。
第二处理模块根据预先获取的内存保护表，确定第一内存是否是受保护的之前，还用于：根据第四消息生成内存保护表，内存保护表用于记录受保护的内存和/或不受保护的内存，受保护的内存包括用于存储受保护的数据的内存，不受保护的内存包括用于存储不受保护的数据的内存。
在一种可能的实现方式中，第二处理模块根据预先获取的内存保护表，确定第一内存是否是受保护的之前，还用于：
确定第一内存用于存储受保护的数据或确定第一内存用于存储不受保护的数据；
生成内存保护表，该内存保护表用于记录第一内存为受保护的内存或用于记录第一内存为不受保护的内存，受保护的内存包括用于存储受保护的数据的内存，不受保 护的内存包括用于存储不受保护的数据的内存。
在一种可能的实现方式中，第一运行空间为内核空间，第一处理模块为操作系统，第二运行空间为超级管理空间。其中，受保护的数据包括：操作系统在编译阶段写入内存的常量数据，操作系统在初始化阶段写入内存的常量数据。
在一种可能的实现方式中，数据保护装置为手机、平板电脑、服务器、个人电脑、网络路由器或交换机。
在一种可能的设计中，该内核完整性保护装置为系统芯片，该系统芯片包括处理器和输出接口，该处理器包括处理器执行单元，该输出接口用于在处理器执行单元涉及对预设寄存器的访问和/或对预设内存空间的访问时，向地址总线输出第一内存的物理地址。或者，该处理器还包括内存管理单元，该输出接口用于在内存管理单元修改第一内存的属性时，向地址总线输出第一内存的物理地址。
可选地，该内核完整性保护装置还可以包括存储器，该存储器用于存储处理器执行单元执行的程序代码、内核代码段、内核页表和用户页表等。或者，该存储器用于存储处理器执行单元执行的程序代码、受保护的数据和不受保护的数据等。
第三方面，本申请提供了一种计算机可读存储介质。该计算机可读存储介质中存储用于内核完整性保护装置执行的程序代码。该程序代码包括用于执行第一方面或第一方面中任意一种可能的实现方式中的内核完整性保护方法的指令。
第四方面，本申请提供了一种包含指令的计算机程序产品。当该计算机程序产品在内核完整性保护装置上运行时，使得内核完整性保护装置执行第一方面或第一方面中任意一种可能的实现方式中的内核完整性保护方法。
第五方面，本申请提供了一种数据保护装置，该数据保护装置中包括处理器执行单元和内存管理单元，处理器执行单元划分的运行空间包括内核空间和超级管理空间，超级管理空间的异常级别高于内核空间的异常级别。
内核空间中运行的操作系统用于向内存管理单元发送第一消息，第一消息用于请求修改第一内存的属性；
内存管理单元用于向超级管理空间中运行的关键数据保护模块发送第二消息，第二消息用于请求确定第一内存是否是受保护的；
关键数据保护模块用于根据预先获取的内存保护表，确定第一内存是否是受保护的；
关键数据保护模块还用于向内存管理单元发送第三消息，第三消息用于指示是否修改第一内存的属性；
内存管理单元还用于：第三消息用于指示修改第一内存的属性时根据第一消息修改第一内存的属性，第三消息用于指示不修改第一内存的属性时拒绝修改第一内存的属性。
在一种可能的实现方式中，操作系统还用于向关键数据保护模块发送第四消息，第四消息用于指示第一内存是否是受保护的。
关键数据保护模块根据预先获取的内存保护表，确定第一内存是否是受保护的之前，还用于：根据第四消息生成内存保护表，内存保护表用于记录受保护的内存和/或不受保护的内存，受保护的内存包括用于存储受保护的数据的内存，不受保护的内 存包括用于存储不受保护的数据的内存。
在一种可能的实现方式中，关键数据保护模块根据预先获取的内存保护表，确定第一内存是否是受保护的之前，还用于：
确定第一内存用于存储受保护的数据或确定第一内存用于存储不受保护的数据；
生成内存保护表，该内存保护表用于记录第一内存为受保护的内存或用于记录第一内存为不受保护的内存，受保护的内存包括用于存储受保护的数据的内存，不受保护的内存包括用于存储不受保护的数据的内存。
在一种可能的实现方式中，受保护的数据包括：操作系统在编译阶段写入内存的常量数据，操作系统在初始化阶段写入内存的常量数据。
附图说明
图1为本发明实施例提供的一种异常等级示意图；
图2为本发明实施例提供的一种内核完整性保护装置结构示意图；
图3为本发明实施例提供的另一种内核完整性保护装置结构示意图；
图4为本发明实施例提供的一种内核完整性保护方法流程图；
图5为本发明实施例提供的一种内核完整性保护方法的执行示意图；
图6为本发明实施例提供的另一种内核完整性保护装置结构示意图；
图7是本申请实施例的MMU进行地址映射的示意流程图；
图8是本申请另一个实施例的数据保护装置的示意性结构图；
图9是本申请另一个实施例的数据保护装置的示意性结构图；
图10是本申请一个实施例的数据保护方法的示意性流程图；
图11是本申请另一个实施例的数据保护方法的示意性流程图；
图12是本申请另一个实施例的数据保护方法的示意性流程图；
图13是本申请另一个实施例的数据保护方法的示意性流程图。
具体实施方式
可以应用本申请实施例的内核完整性保护方法和内核完整性保护装置的计算机可以是手机、平板电脑、服务器、个人电脑、网络路由器、可穿戴设备或交换机等电子设备。
可选地，作为一个实施例，内核完整性保护方法具体可以为数据保护方法，内核完整性保护装置具体可以为数据保护装置。
该计算机中可以包括处理器和存储器。处理器也可以称为中央处理单元(central processing unit，CPU)或中央处理器。
该计算机中的处理器的一种示例为精简指令系统(Advanced RISC Machines，ARM)处理器。该计算机中的存储器的示例为随机存取存储器(random access memory，RAM)或闪存(Flash)。其中，RAM也可以称为主存或者内存。存储器具有访问权限属性，例如只读、可写、可执行和不可访问。
该计算机的处理器中使用了虚拟化技术。虚拟化技术可以隐藏该计算机中的底层物理硬件，从而可以让多个各自独立运行的操作系统(operator system，OS)透明地 使用和共享该计算机的硬件资源。简单地说，虚拟化技术可以使得该计算机能并发运行多个OS。
该计算机中的处理器为程序代码提供了不同的权限级别来访问该计算机中的资源，以保护该计算机中的数据和阻止该计算机中发生恶意行为，从而确保该计算机的安全。
例如，如图1所示，ARM处理器中可以定义四种异常级别(Exception levels，EL)，分别为EL0、EL1、EL2和EL3。其中，数值越大的异常级别的等级越高，数值越小的异常级别的等级越低。例如，EL0的等级低于EL1的等级，EL1的等级低于EL2的等级，EL2的等级低于EL3的等级。当然，也可以是数值越大的异常级别的等级越低，数值越小的异常界别的等级越高，本申请实施例对此不作限制。
不同等级的异常级别对应不同等级的运行空间。异常级别的划分或者说运行空间的划分为处理器中所有操作状态的软件提供了逻辑分离的执行权限。应理解，本申请所说的异常级别与计算机科学中常见的等级保护域相似并且支持等级保护域中涉及的概念。
运行在这四种异常级别中每种异常级别下的软件的示例如下。普通的用户应用程序运行在EL0对应的运行空间中；操作系统内核，例如Linux或Windows，可以运行在EL1对应的运行空间中，操作系统内核通常被认为具有特权；管理程序(hypervisor)运行在EL2对应的运行空间中；低级别的固件，例如安全监视器运行在EL3对应的运行空间中。hypervisor也可以称为超级管理器。
管理程序在使能状态下可以为一个或多个操作系统内核提供虚拟化服务。
固件是处理器启动时运行的第一个东西。固件提供很多服务，例如，平台初始化、可信任操作系统的安装以及安全监视器的命令的路由等。
一般来说，一个软件(例如用户的应用程序，操作系统的内核或管理程序)占用一个单独的异常级别，或者说占用一个单独的运行空间。当然，也可以有例外。例如，内核管理程序，例如内核虚拟机(kernel virtual machine，KVM)，可以既运行在EL2对应的运行空间中，也可以运行在EL1对应的运行空间中。
该计算机的处理器中，CPU执行单元可以通过内存管理单元(memory management unit，MMU)来管理或访问存储器。例如，MMU可以执行地址映射以及提供内存访问授权等操作。
处理器中，不同异常级别对应的运行空间中运行的程序代码对存储器进行访问时，MMU进行不同的地址映射和不同的内存访问授权流程。
ARM处理器中包含如下几种类型的异常(exception)：
中断(interrupts)，主要由外设触发，是典型的异步异常。
中止(aborts)，可能是同步或异步异常。包括指令异常(取指令时产生)、数据异常(读写内存数据时产生)，可以由内存管理单元(memory management unit，MMU)产生(比如典型的缺页异常)，也可以由外部存储系统产生(通常是硬件问题)。
复位(reset)，被视为一种特殊的异常。
由异常触发指令触发的异常(exception generating instructions)。
当出现上述任意一种类型的异常时，需要根据异常级别进行异常处理。
ARM处理器中的异常处理过程包括硬件自动完成部分和软件部分，需要设置中断 向量，保存上下文，不同的异常类型的处理方式可能有细微差别。其中，用户态(EL0)不能处理异常，当异常发生在用户态时，异常级别(EL)会发生切换，默认切换到内核态(EL1)。
下面以图2所示的内核完整性保护装置200为例，介绍本申请提出的内核完整性保护方法。应理解，图2示出的内核完整性保护装置200仅是示例，本申请实施例的内核完整性保护装置还可包括其他模块或单元，或者包括与图2中的各个模块的功能相似的模块，或者并非要包括图2中所有模块。
图2所示的内核完整性保护装置200包括处理器210和存储器220。存储器220可以与处理器210交换数据。
存储器220的一种示例为随机存取存储器(random access memory，RAM)。RAM也可以称为主存或者内存。存储器220的另一种示例为闪存(Flash)。应理解，后续实施例中的内存可以替换为闪存。
处理器210的一种示例为中央处理单元(central processing unit，CPU)。CPU也可以称为中央处理器。
处理器210中可以包括CPU执行单元211、内存管理单元212和寄存器213。应理解，此处内存管理单元212和寄存器213集成在处理器210内只是一种示例，内存管理单元212和寄存器213也可以位于处理器210之外。
如图3所示，处理器210中定义了四种异常级别(exception level，EL)。或者可以说，CPU执行单元211执行的程序代码可以分为四种异常级别。这四个异常级别从低到高分别为EL0、EL1、EL2和EL3。EL0、EL1、EL2和EL3对应四个运行空间。
其中，EL0对应的运行空间为用户程序空间，用户程序空间用于运行用户程序。用户程序也可以称为应用程序。
EL1对应的运行空间为内核(kernel)空间，内核空间用于运行操作系统(operating system，OS)。内核空间中运行的操作系统也可以称为客户端(guest)操作系统。
EL2对应的运行空间为超级管理空间。超级管理空间用于运行管理程序(hypervisor)。hypervisor也可以称为虚拟机监视器(virtual machine monitor)。hypervisor是一种运行在物理硬件和操作系统之间的中间软件层,可允许多个操作系统和应用程序共享一套基础物理硬件。
从系统安全的角度来看，hypervisor的主要功能是内存管理和中断拦截，通过这两种方式，hypervisor可以很好地监控内核空间中的操作系统的运行。
hypervisor可以通过MMU 212的两阶段(stage 2)内存映射功能来实现内存管理。MMU212可以通过影子页表或EPT页表等技术来实现存储管理。
Hypervisor也可以通过对寄存器213的监控，防止恶意的篡改。
如图3所示，MMU 212接收到从用户程序空间或内核空间发送的虚拟地址(virtual address，VA)后，在阶段1(stage-1)，可以将内核空间中的操作系统或用户程序空间中的用户程序发送的地址映射到中间物理地址；在阶段2(stage-2)，可以将中间物理地址(immediate physical address，IPA)映射到内存芯片的地址。
其中，内核空间中的操作系统或用户程序空间中的用户程序发送的地址可以称为虚拟地址，或者说，操作系统或用户程序可见的地址为VA；内存芯片的真实地址称 为物理地址；VA映射至物理地址(physical address，PA)的过程中所使用的地址均可以称为IPA。
应注意的是，stage-2内存映射功能只对内核空间中运行的操作系统和用户程序空间中的用户程序有效。也就是说，内核空间中运行的操作系统和用户程序空间中的用户程序访问内存时才需要使用stage-2内存映射功能。
上面介绍的MMU 212的两阶段内存映射功能的实现方式仅是一种示例。MMU 212的两阶段内存映射功能的实现方式可以参考现有技术，此处不再赘述。
内存具有访问权限属性。为了描述方便，本申请实施例中将内存的访问权限属性简称为内存的属性。
内存的属性可以包括只读、可写、不可访问和可执行。其中，内存的属性为只读是指只能读取该内存中的内容，而不能修改该内存中的内容；内存的属性为可写是指即可以读取该内存中的内容，也可以修改该内存中的内容。
MMU 212接收内核空间中的操作系统或用户程序空间中的用户程序发送的地址后，可以根据该地址所对应的内存的属性来访问该地址对应的内存中的内容。
例如，若内核空间中的操作系统或用户程序空间中的用户程序请求MMU 212向某个地址对应的内存中写入数据，且该地址所对应的内存的属性为可写时，MMU212将该地址映射到内存的物理地址后，将该物理地址发送到地址总线，以便于数据写到该内存中。
例如，若内核空间中的操作系统或用户程序空间中的用户程序请求MMU 212向某个地址对应的内存中写入数据，但该地址所对应的内存的属性为只读时，MMU212拒绝该请求。MMU 212拒绝该请求的一种示例为进行异常提示。
数据保护装置200中，内核空间中运行的操作系统可以通过超级管理调用(hypervisor call，HVC)指令调用hypervisor。
EL3对应的安全监视(secure monitor)空间用于运行处理器的安全监控模块。
应理解，图3所示的处理器中的运行空间的划分仅是一种示例，处理器中可以划分更多或更少的运行空间，本申请对此不作限制。
本申请一个实施例的内核完整性保护方法的示意性流程图如图4所示。该内核完整性保护方法可以由内核完整性保护装置200执行。图4所示的内核完整性保护方法包括S410、S420、S430和S440。
应理解，图4示出了该内核完整性保护方法的步骤或操作，但这些步骤或操作仅是示例，本申请实施例还可以执行其他操作或者图4中的各个操作的变形。此外，图4中的各个步骤可以按照与图4呈现的不同的顺序来执行，并且有可能并非要执行图4中的全部操作。
S410，第一运行空间中运行的第一处理模块向第二运行空间中运行的第二处理模块发送请求消息，所述请求消息用于请求进行内存访问，所述内存访问涉及对预设寄存器的访问和/或对预设内存空间的访问。
在一种可能的实施方式中，所述第一运行空间为内核空间，所述第一处理模块为操作系统，所述第二运行空间为超级管理空间或安全监视空间。
可以理解的是，超级管理空间或安全监视空间比内核空间的异常级别高，从而可 以当超级管理空间或安全监视空间的处理模块检测出内核空间运行的操作系统受到攻击时，指示操作系统对攻击事件进行处理。此外，超级管理空间或安全监视空间的权限比内核空间要高，内核空间受到攻击执行流会自动转换到超级管理空间或安全监视空间。为了实现这种自动转换可以在处理器启动的初期进行配置，即处理器处于超级管理空间或安全监视空间的时候进行配置，当内核空间运行操作系统后，由于超级管理空间或安全监视空间对于应用程序不存在接口，仅有异常处理接口，因此，超级管理空间或安全监视空间无法入侵，安全性高。
在一种可能的实施方式中，所述对预设寄存器的访问，包括：对系统控制寄存器的读或写。根据该实施方式，能够防止对预设寄存器的恶意篡改。
在一种可能的实施方式中，所述对预设内存空间的访问，包括：修改内核代码段、关闭内存管理单元、修改内核页表和修改用户页表中的至少一项。根据该实施方式，能够实现对多种试图修改内核的操作进行检测。可以理解的是，检测的操作可以但不限于包括上述至少一种操作。
S420，所述第二运行空间中运行的第二处理模块响应于所述请求消息，获取所述内存访问对应的事件的信息。
在一个示例中，第二运行空间中运行的第二处理模块对所述内存访问进行合法性校验，并确定校验结果为所述内存访问不合法。
作为示例，第二运行空间中运行的处理模块根据预先获取的内存保护表，确定所述内存访问所访问的第一内存是否是受保护的，其中，内存保护表用于记录受保护的内存和/或不受保护的内存。受保护的内存可以理解为存储了受保护的数据。受保护的数据可以包括以下至少一种数据：操作系统的常量数据或操作系统在运行过程中生成的需要保护的数据。操作系统的常量数据可以包括以下至少一种数据：操作系统在编译阶段出现的常量数据和操作系统在初始化阶段出现的常量数据。从另一个角度来说，受保护的内存的解释可以包括：该内存的属性不可以从只读、不可访问、可执行中任意一种修改为可写；不受保护的内存的解释可以包括：该内存的属性可以从任意属性修改为其他任意属性。如果所述内存访问所访问的第一内存是否是受保护的，则更改内存属性就被认为是不合法的内存访问。
S430，第二运行空间中运行的第二处理模块将所述信息发送给所述第一运行空间中运行的第一处理模块。
在一种可能的实施方式中，所述信息包括攻击类型、攻击进程的名字和端口号中的至少一项。根据该实施方式，通过对多种攻击信息的统计分析，从而可以优化安全策略或补丁。
S440，第一运行空间中运行的第一处理模块根据所述信息对所述事件进行处理。
在一种可能的实施方式中，所述处理器执行单元划分的运行空间还包括第三运行空间，所述第三运行空间的异常级别低于所述第一运行空间的异常级别；所述第一运行空间中运行的第一处理模块根据所述信息对所述事件进行处理，包括：所述第一运行空间中运行的第一处理模块根据所述信息向所述第三运行空间中运行的第三处理模块发送信号，所述信号用于杀掉所述事件对应的进程。根据该实施方式，对攻击进行处理的方式可以包括杀掉攻击进程，从而实现实时的入侵终止。
在一种可能的实施方式中，所述处理器执行单元划分的运行空间还包括第三运行空间，所述第三运行空间的异常级别低于所述第一运行空间的异常级别；所述第一运行空间中运行的第一处理模块根据所述信息对所述事件进行处理，包括：所述第一运行空间中运行的第一处理模块根据所述信息向所述第三运行空间中运行的第四处理模块上报日志，所述日志包括所述信息。根据该实施方式，对攻击进行处理的方式可以包括向第三运行空间上报攻击日志，以便对攻击信息进行记录，便于后续对攻击信息的统计分析及进一步的处理。
在一种可能的实施方式中，所述方法还包括：所述第三运行空间中运行的第四处理模块将所述日志上传到云端服务器；所述第三运行空间中运行的第四处理模块从所述云端服务器接收安全策略或补丁。根据该实施方式，第三运行空间中运行的第四处理模块从云端服务器接收安全策略或补丁后，不仅可以实现实时的入侵终止，而且可以防止后续发生类似的攻击。
在一种可能的实施方式中，所述第三运行空间为用户程序空间。根据该实施方式，可以保证对攻击事件的处理用户可见。
可选地，作为一个实施例，所述内核完整性保护方法具体为数据保护方法，所述内核完整性保护装置具体为数据保护装置，所述数据保护装置中包括所述处理器执行单元和内存管理单元；
S410包括：
所述第一运行空间中运行的第一处理模块向所述内存管理单元发送第一消息，所述第一消息用于请求修改第一内存的属性；
所述内存管理单元向所述第二运行空间中运行的第二处理模块发送第二消息，所述第二消息用于请求确定所述第一内存是否是受保护的；
S420包括：
所述第二运行空间中运行的所述第二处理模块根据预先获取的内存保护表，确定所述第一内存是否是受保护的；
所述方法还包括：
所述第二运行空间运行的所述第二处理模块向所述内存管理单元发送第三消息，所述第三消息用于指示是否修改所述第一内存的属性；
若所述第三消息用于指示修改所述第一内存的属性，则所述内存管理单元根据所述第一消息修改所述第一内存的属性；若所述第三消息用于指示不修改所述第一内存的属性，则所述内存管理单元拒绝修改所述第一内存的属性。
在一个示例中，所述第二运行空间中运行的所述第二处理模块根据预先获取的内存保护表，确定所述第一内存是否是受保护的之前，所述数据保护方法还包括：
所述第一运行空间中的所述第一处理模块向所述第二运行空间中的所述第二处理模块发送第四消息，所述第四消息用于指示所述第一内存是否是受保护的；
所述第二运行空间中的所述第二处理模块根据所述第四消息生成所述内存保护表，所述内存保护表用于记录受保护的内存和/或不受保护的内存，所述受保护的内存包括用于存储受保护的数据的内存，所述不受保护的内存包括用于存储不受保护的数据的内存。
在一个示例中，所述第二运行空间中运行的所述第二处理模块根据预先获取的内存保护表，确定所述第一内存是否是受保护的之前，所述数据保护方法还包括：
所述第二运行空间中运行的所述第二处理模块确定所述第一内存用于存储受保护的数据或确定所述第一内存用于存储不受保护的数据；
所述第二运行空间中运行的所述第二处理模块生成所述内存保护表，所述内存保护表用于记录所述第一内存为受保护的内存或用于记录所述第一内存为不受保护的内存，所述受保护的内存包括用于存储受保护的数据的内存，所述不受保护的内存包括用于存储不受保护的数据的内存。
在一个示例中，所述第一运行空间为内核空间，所述第一处理模块为操作系统，所述第二运行空间为超级管理空间；
其中，所述受保护的数据包括：所述操作系统在编译阶段写入内存的常量数据，所述操作系统在初始化阶段写入内存的常量数据。
在一个示例中，所述数据保护装置为手机、平板电脑、服务器、个人电脑、网络路由器或交换机。
本发明实施例中，由于第二运行空间的异常级别高于第一运行空间的异常级别，且第一运行空间中的第一处理模块需要进行特定的内存访问时，需要经过第二运行空间中的第二处理模块的授权，这使得第一运行空间中的第一处理模块不能随意访问寄存器和/或内存空间，并且所述第二运行空间中运行的第二处理模块确定校验结果为所述内存访问不合法时，进一步通知所述第一运行空间中运行的第一处理模块对攻击事件进行处理，从而能够做到动态对内核完整性实施度量，进而实现实时的入侵终止，安全性更高。
在一个示例中，可以通过设置中断向量表的方式从内核层陷入到虚拟层或安全监控层。
默认情况下，在EL0和EL1下发生的异常(exception)会在EL1响应，本发明实施例中，通过配置EL2和EL3的相关寄存器，可以让异常(exception)在EL2或EL3响应。如配置EL2的HDCR_EL2和HCR_EL2以及EL3的SCR_EL3的相关位(bit)。
图5为本发明实施例提供的一种内核完整性保护方法的执行示意图，该实施例由虚拟层来检测发生在内核层的攻击事件，并上报给内核层，由内核层对该攻击事件进行处理。参照图5，打开虚拟内存监控开关(例如：对于ARMv8处理器来说可以为HCR_EL2)，通过对特定的寄存器读写进行监控，防止恶意的篡改，同时设置相应的内存陷入(trap)，对某些模糊的内存访问进行合法性校验。在设计中包括了寄存器监控、系统控制寄存器保护、内核代码段保护、内核页表防护、用户页表防护等模块。当内核层遭受攻击时，内核层会陷入(trap)到虚拟层，检测和上报攻击模块会捕获到内核层的这个攻击事件，然后，利用中断通讯模块将攻击类型、攻击进程的名字、进程号(ProcessID，PID)等信息发送给内核层的攻击处理模块，可以理解的是，针对不同的攻击类型，中断通讯模块还可以上报不同的附加信息，例如，修改代码段，尝试修改地址等不同攻击类型可以有不同的附加信息；攻击处理模块收到中断之后，会利用中断通讯模块读出虚拟层上报的攻击事件消息，然后发送信号给攻击进程，尝试杀掉攻击进程，最后上报攻击日志到日志引擎模块，记录攻击日志，并上传到云端服 务器进行大数据统计分析，云端服务器根据分析结果下发新的安全策略或补丁，以增强设备的安全性。其中，陷入(trap)是一种程序正常执行的流程，处理器检测到一些异常事件时，会暂停当前执行流程，改变处理器模式，并跳转到某个地址执行响应的代码。
图6是本申请一个实施例的内核完整性保护装置的示意性结构图。应理解，图6示出的内核完整性保护装置600仅是示例，本申请实施例的内核完整性保护装置还可包括其他模块或单元，或者包括与图6中的各个模块的功能相似的模块，或者并非要包括图6中所有模块。
内核完整性保护装置600中包括处理器执行单元610和内存管理单元620，处理器执行单元610划分的运行空间包括第一运行空间611和第二运行空间612，第二运行空间612的异常级别高于第一运行空间611的异常级别，所述第一运行空间611用于运行第一处理模块，第二运行空间612用于运行第二处理模块。
内核完整性保护装置600可以用于执行图4或图5所示的内核完整性保护方法中的内核完整性保护装置执行的步骤。
例如，所述第一处理模块，用于向所述第二处理模块发送请求消息，所述请求消息用于请求进行内存访问，所述内存访问涉及对预设寄存器的访问和/或对预设内存空间的访问；
所述第二处理模块，用于响应于所述请求消息，获取所述内存访问对应的事件的信息；并将所述信息发送给所述第一运行空间611中运行的第一处理模块；
所述第一处理模块，还用于根据所述信息对所述事件进行处理。
可选地，作为一个实施例，所述第一运行空间611为内核空间，所述第一处理模块为操作系统，所述第二运行空间612为超级管理空间或安全监视空间。
可选地，作为一个实施例，所述第一处理模块用于请求的所述对预设寄存器的访问，包括：
对系统控制寄存器的读或写。
可选地，作为一个实施例，所述第一处理模块用于请求的所述对预设内存空间的访问，包括：
修改内核代码段、关闭内存管理单元620、修改内核页表和修改用户页表中的至少一项。
可选地，作为一个实施例，所述处理器执行单元610划分的运行空间还包括第三运行空间，所述第三运行空间的异常级别低于所述第一运行空间的异常级别；所述第三运行空间用于运行第三处理模块；
所述第一处理模块，具体用于根据所述攻击信息向所述第三处理模块发送信号，所述信号用于杀掉所述事件对应的进程。
可选地，作为一个实施例，所述处理器执行单元610划分的运行空间还包括第三运行空间，所述第三运行空间的异常级别低于所述第一运行空间611的异常级别；所述第三运行空间用于运行第四处理模块；
所述第一处理模块，具体用于根据所述信息向所述第四处理模块上报日志，所述日志包括所述信息。
可选地，作为一个实施例，所述第四处理模块，还用于将所述日志上传到云端服务器；以及从所述云端服务器接收安全策略或补丁。
可选地，作为一个实施例，所述第三运行空间为用户程序空间。
可选地，作为一个实施例，所述信息包括攻击类型、攻击进程的名字和端口号中的至少一项。
可选地，作为一个实施例，所述装置600具体为数据保护装置，所述数据保护装置包括：所述处理器执行单元610和内存管理单元620；
所述第一处理模块，具体用于向所述内存管理单元620发送第一消息，所述第一消息用于请求修改第一内存的属性；
所述内存管理单元620用于向所述第二处理模块发送第二消息，所述第二消息用于请求确定所述第一内存是否是受保护的；
所述第二处理模块，具体用于根据预先获取的内存保护表，确定所述第一内存是否是受保护的；
所述第二处理模块还用于向所述内存管理单元发送第三消息，所述第三消息用于指示是否修改所述第一内存的属性；
所述内存管理单元620还用于：所述第三消息用于指示修改所述第一内存的属性时根据所述第一消息修改所述第一内存的属性，所述第三消息用于指示不修改所述第一内存的属性时拒绝修改所述第一内存的属性。
可选地，作为一个实施例，所述第一处理模块还用于向所述第二运行空间612中的所述第二处理模块发送第四消息，所述第四消息用于指示所述第一内存是否是受保护的；
所述第二处理模块根据预先获取的内存保护表，确定所述第一内存是否是受保护的之前，还用于：根据所述第四消息生成所述内存保护表，所述内存保护表用于记录受保护的内存和/或不受保护的内存，所述受保护的内存包括用于存储受保护的数据的内存，所述不受保护的内存包括用于存储不受保护的数据的内存。
可选地，作为一个实施例，所述第二处理模块根据预先获取的内存保护表，确定所述第一内存是否是受保护的之前，还用于：
确定所述第一内存用于存储受保护的数据或确定所述第一内存用于存储不受保护的数据；
生成所述内存保护表，所述内存保护表用于记录所述第一内存为受保护的内存或用于记录所述第一内存为不受保护的内存，所述受保护的内存包括用于存储受保护的数据的内存，所述不受保护的内存包括用于存储不受保护的数据的内存。
可选地，作为一个实施例，所述第一运行空间611为内核空间，所述第一处理模块为操作系统；
其中，所述受保护的数据包括：所述操作系统在编译阶段写入内存的常量数据，所述操作系统在初始化阶段写入内存的常量数据。
可选地，作为一个实施例，所述数据保护装置600为手机、平板电脑、服务器、个人电脑、网络路由器或交换机。
本发明实施例中，由于第二运行空间612的异常级别高于第一运行空间611的异 常级别，且第一运行空间611中的第一处理模块需要进行特定的内存访问时，需要经过第二运行空间612中的第二处理模块的授权，这使得第一运行空间611中的第一处理模块不能随意访问寄存器和/或内存空间，并且所述第二运行空间612中运行的第二处理模块确定校验结果为所述内存访问不合法时，进一步通知所述第一运行空间611中运行的第一处理模块对攻击事件进行处理，从而能够做到动态对内核完整性实施度量，进而实现实时的入侵终止，安全性更高。
在如下的实施例中，内核完整性保护方法具体为数据保护方法，内核完整性保护装置具体为数据保护装置。
例如，如图7所示，MMU为异常级别为EL0的应用程序与异常级别为EL1的操作系统执行两阶段的地址映射流程，为异常级别为EL3的管理程序和异常级别为EL4的安全监视器执行一个阶段的地址映射流程。
两阶段的地址映射流程中，在第一阶段，存储器的虚拟地址(virtual address，VA)转换为中间物理地址(immediate physical address，IPA)；在第二阶段，IPA被转换为物理地址(physical address，PA)。
第一阶段的地址转换中，MMU使用的转换表基址寄存器(translation table base registers，TTBR)的一种示例为TTBRn_EL1；第二阶段的地址转换中，MMU使用的转换表的基地址在虚拟化转化表基址寄存器(virtualization translation table base register，VTTBR)0_EL2中被指定。例如，在VTTBR0_EL2中指定存储器底部的一个连续的地址空间作为该转换表中的基地址。
一个阶段的地址映射流程中，MMU可以直接根据VA转换得到PA。其中，管理程序EL2和安全监督器EL3均有属于自己的一阶段转换的表格。管理程序EL2和安全监督器EL3通过各自对应的表格可以直接从虚拟地址转换到物理地址。管理程序EL2对应的转换表的基地址在TTNR0_EL2中指定，安全监督器EL3对应的转换表的基地址在TTNR0_EL3中指定。在这两个寄存器中，分别指定了存储器底部的一个连续的、且大小可变的地址空间作为管理程序EL2和安全监督器EL3的转换地址表的基地址。
应理解，上述提到的TTBRn_EL1、TTNR0_EL2和TTNR0_EL3仅是一种示例，在不同的资料中可能会引用不同的名称。
在上述两个阶段的地址映射流程中，第一个阶段通常在操作系统的控制下执行，第二个阶段通常在管理程序的控制下执行。
此处所述的在管理程序的控制下执行，可以理解为：管理程序确定可以访问该IPA或该IPA对应的VA时，才授权MMU进行IPA至PA的转换。
本申请实施例的数据保护方法主要是在上述第二个阶段的地址映射流程中，在管理程序的控制下实现的。具体地，计算机中预先存储内存保护表，该内存保护表中记录需要保护和/或不需要保护的存储器的地址信息，并在管理程序中添加处理模块，由该处理模块在内存保护表查询是否包括了操作系统或应用程序请求修改访问属性的存储器的地址信息。若该处理模块查询内存保护表后确定被请求修改访问属性的存储器为受保护的存储器，则拒绝MMU修改该存储器的访问属性。
内存保护表的一个示例如表1所示。表1中，既记录了受保护的内存，也记录了 不受保护的内存，第一列记录受保护的内存的虚拟地址，第二列记录不受保护的内存的虚拟地址。
表1内存保护表
受保护的内存的虚拟地址 不受保护的内存的虚拟地址
0x40000000-0x60000000 0x00000000-0x30000000
例如，计算机下载了恶意软件，或者浏览的网页中携带了恶意插件后，恶意软件或者
恶意插件对操作系统发起攻击，获取操作系统的管理权限，控制操作系统将虚拟地址为0x41115000至0x41116000的内存的访问属性从可写修改为只读，以便于恶意软件或恶意插件修改该内存中的数据时时，管理程序在MMU对该存储器的地址进行第二阶段的映射的过程中，从内存保护表中查询获知该存储器是受保护的，从而拒绝MMU进行第二阶段的地址映射流程，即拒绝恶意软件或恶意插件的攻击，保护了存储器中的数据。
可选地，管理程序拒绝恶意软件或恶意插件修改存储器的访问属性后，还可以发出受保护存储器受到攻击的提示信息，例如，弹出显示框或发送警报声等。
下面以图8所示的数据保护装置800为例，介绍本申请提出的数据保护方法。应理解，图8示出的数据保护装置800仅是示例，本申请实施例的数据保护装置还可包括其他模块或单元，或者包括与图8中的各个模块的功能相似的模块，或者并非要包括图8中所有模块。
图8所示的数据保护装置800包括处理器810和存储器820。存储器可以与处理器810交换数据。
存储器820的一种示例为随机存取存储器(random access memory，RAM)。RAM也可以称为主存或者内存。存储器820的另一种示例为闪存(Flash)。应理解，后续实施例中的内存可以替换为闪存。
处理器810的一种示例为中央处理单元(central processing unit，CPU)。CPU也可以称为中央处理器。
处理器810中可以包括CPU执行单元811和内存管理单元812。应理解，此处MMU集成在处理器810内只是一种示例，MMU也可以位于处理器810之外。
如图9所示，处理器810中定义了四种异常级别(exception level，EL)。或者可以说，CPU执行单元811执行的程序代码可以分为四种异常级别。这四个异常级别从低到高分别为EL0、EL1、EL2和EL3。EL0、EL1、EL2和EL3对应四个运行空间。
其中，EL0对应的运行空间为用户程序空间，用户程序空间用于运行用户程序。用户程序也可以称为应用程序。
EL1对应的运行空间为内核(kernel)空间，内核空间用于运行操作系统(operating system，OS)。内核空间中运行的操作系统也可以称为客户端(guest)操作系统。
EL2对应的运行空间为超级管理空间。超级管理空间用于运行管理程序(hypervisor)。hypervisor也可以称为虚拟机监视器(virtual machine monitor)。hypervisor是一种运行在物理硬件和操作系统之间的中间软件层,可允许多个操作系统和应用程序共享一套基础物理硬件。
从系统安全的角度来看，hypervisor的主要功能是内存管理和中断拦截，通过这两种方式，hypervisor可以很好地监控内核空间中的操作系统的运行。
hypervisor可以通过MMU 812的两阶段(stage 2)内存映射功能来实现内存管理。MMU 812可以通过影子页表或EPT页表等技术来实现存储管理。
如图9所示，MMU 812接收到从用户程序空间或内核空间发送的VA后，在阶段1(stage-1)，可以将内核空间中的操作系统或用户程序空间中的用户程序发送的地址映射到中间物理地址；在阶段2(stage-2)，可以将IPA映射到内存芯片的地址。
其中，内核空间中的操作系统或用户程序空间中的用户程序发送的地址可以称为虚拟地址，或者说，操作系统或用户程序可见的地址为VA；内存芯片的真实地址称为物理地址；VA映射至PA的过程中所使用的地址均可以称为IPA。
应注意的是，stage-2内存映射功能只对内核空间中运行的操作系统和用户程序空间中的用户程序有效。也就是说，内核空间中运行的操作系统和用户程序空间中的用户程序访问内存时才需要使用stage-2内存映射功能。
上面介绍的MMU 812的两阶段内存映射功能的实现方式仅是一种示例。MMU812的两阶段内存映射功能的实现方式可以参考现有技术，此处不再赘述。
内存具有访问权限属性。为了描述方便，本申请实施例中将内存的访问权限属性简称为内存的属性。
内存的属性可以包括只读、可写、不可访问和可执行。其中，内存的属性为只读是指只能读取该内存中的内容，而不能修改该内存中的内容；内存的属性为可写是指即可以读取该内存中的内容，也可以修改该内存中的内容。
MMU 812接收内核空间中的操作系统或用户程序空间中的用户程序发送的地址后，可以根据该地址所对应的内存的属性来访问该地址对应的内存中的内容。
例如，若内核空间中的操作系统或用户程序空间中的用户程序请求MMU 812向某个地址对应的内存中写入数据，且该地址所对应的内存的属性为可写时，MMU 812将该地址映射到内存的物理地址后，将该物理地址发送到地址总线，以便于数据写到该内存中。
例如，若内核空间中的操作系统或用户程序空间中的用户程序请求MMU 812向某个地址对应的内存中写入数据，但该地址所对应的内存的属性为只读时，MMU 812拒绝该请求。MMU 812拒绝该请求的一种示例为进行异常提示。
数据保护装置800中，内核空间中运行的操作系统可以通过超级管理调用(hypervisor call，HVC)指令调用hypervisor。
EL4对应的安全监视(secure monitor)空间用于运行处理器的安全监控模块。
应理解，图9所示的处理器中的运行空间的划分仅是一种示例，处理器中可以划分更多或更少的运行空间，本申请对此不作限制。
本申请提出的数据保护方法主要包括：低异常级别的运行空间中运行的程序代码请求修改内存的属性时，高异常级别的运行空间中运行的程序代码捕获该请求，并判断该内存是否为受保护的内存；若该内存为该受保护的内存，则高异常级别的运行空间中运行的程序代码拒绝这次修改。
本申请一个实施例的数据保护方法的示意性流程图如图10所示。该数据保护方法 可以由数据保护装置800执行。图10所示的数据保护方法包括S1010、S1020、S1030、S1040和S1050。
应理解，图10示出了该数据保护方法的步骤或操作，但这些步骤或操作仅是示例，本申请实施例还可以执行其他操作或者图10中的各个操作的变形。此外，图10中的各个步骤可以按照与图10呈现的不同的顺序来执行，并且有可能并非要执行图10中的全部操作。
S1010，第一运行空间中运行的处理模块向MMU发送第一消息，第一消息用于请求修改第一内存的属性。相应地，MMU接收该消息。
为了描述方便，第一运行空间中运行的该处理模块可以称为第一处理模块。第一内存是指第一消息请求修改属性的内存。
第一运行空间可以是图9中所示的用户程序空间或内核空间。第一运行空间为用户程序空间时，第一处理模块可以是用户程序；第一运行空间为内核空间时，第一处理模块可以是操作系统。
第一消息中可以包括第一内存的VA和第一内存的目标属性。也就是说，第一消息用于请求MMU将第一内存的属性修改为目标属性。第一内存的目标属性可以包括只读、可写、可执行和不可访问中至少一种。
请求将第一内存的目标属性修改可写的第一消息的一种实例为set_memory_RW；请求将第一内存的目标属性修改只读的第一消息的一种实例为set_memory_RO。
S1020，MMU向第二运行空间中运行的处理模块发送第二消息，第二消息用于请求该处理模块确定第一内存是否是受保护的，第二运行空间的异常级别高于第一运行空间的异常级别。相应地，第二运行空间中运行的处理模块接收第二消息。
为了描述方便，第二运行空间中运行的处理模块可以称为第二处理模块或者内核关键数据保护(kernel critical data protection)模块。第二处理模块或者内核关键数据保护模块可以是hypervisor中的处理模块。
第二运行空间可以为图9中所示的超级管理空间。
可选地，第二消息也可以理解为用于请求第二处理模块确定是否可以修改第一内存的属性，或者可以理解为用于请求第二处理模块确定第一内存中的数据是否是受保护的。
第二消息中可以包括第一内存的地址。例如，第二消息中可以包括第一内存的VA。
可选地，第二消息中包括的信息可以与第一消息中包括的信息相同。
S1030，第二运行空间中运行的处理模块根据预先获取的内存保护表，确定第一内存是否是受保护的，其中，内存保护表用于记录受保护的内存和/或不受保护的内存。
受保护的内存可以理解为存储了受保护的数据。受保护的数据可以包括以下至少一种数据：操作系统的常量数据或操作系统在运行过程中生成的需要保护的数据。操作系统的常量数据可以包括以下至少一种数据：操作系统在编译阶段出现的常量数据和操作系统在初始化阶段出现的常量数据。
从另一个角度来说，受保护的内存的解释可以包括：该内存的属性不可以从只读、不可访问、可执行中任意一种修改为可写；不受保护的内存的解释可以包括：该内存的属性可以从任意属性修改为其他任意属性。
内存保护表记录受保护的内存和/或不受保护的内存的一种实现方式可以包括：内存保护表中记录受保护的内存的地址和/或不受保护的内存的地址。
例如，内存保护表中可以记录受保护的内存的VA地址和/或不受保护的内存的VA地址。
在一种可能的实现方式中，内存保护表中可以仅记录受保护的内存。这种实现方式中，第二运行空间中运行的处理模块根据预先获取的内存保护表，确定第一内存是否是受保护的，可以包括：若内存保护表中记录的受保护的内存中包括了第一内存，则第二运行空间中运行的处理模块确定第一内存是受保护的；若内存保护中记录的受保护的内存中不包括第一内存，则第二运行空间中运行的处理模块确定第一内存是不受保护的。
在一种可能的实现方式中，内存保护表中可以仅记录不受保护的内存。这种实现方式汇总，第二运行空间中运行的处理模块根据预先获取的内存保护表，确定第一内存是否是受保护的，可以包括：若内存保护表中记录的不受保护的内存中不包括第一内存，则第二运行空间中运行的处理模块确定第一内存是受保护的；若内存保护中记录的不受保护的内存中包括第一内存，则第二运行空间中运行的处理模块确定第一内存是不受保护的。
在一种可能的实现方式中，内存保护表中可以既记录受保护的内存，也记录不受保护的内存。这种实现方式中，第二运行空间中运行的处理模块根据预先获取的内存保护表，确定第一内存是否是受保护的，可以包括：若内存保护表中记录的受保护的内存中包括第一内存，则第二运行空间中运行的处理模块确定第一内存是受保护的；若内存保护表中记录的不受保护的内存中包括第一内存，则第二运行空间中运行的处理模块确定第一内存是不受保护的。
S1040，第二运行空间中运行的处理模块向MMU发送第三消息，其中，第三消息用于指示MMU是否修改第一内存的属性。相应地，MMU接收第三消息。
例如，S1030中，若第二处理模块确定第一内存是不受保护的，则第三消息用于指示MMU修改第一内存的属性；若第二处理模块确定第一内存是受保护的，则第三消息用于指示MMU不修改第一内存的属性。
S1050，若第三消息用于指示MMU修改第一内存的属性，则MMU根据第一消息修改第一内存的属性；若第三消息用于指示MMU不修改第一内存的属性，则MMU拒绝修改第一内存的属性。
例如，若第三消息用于指示MMU修改第一内存的属性，且第一消息中包括第一内存的地址和第一内存的目标属性，则MMU将第一内存的属性修改为目标属性。
例如，若第三消息用于指示MMU不修改第一内存的属性，则MMU可以向第一处理模块返回异常操作提示。
图10所示的数据保护方法中，由于低异常级别的运行空间中运行的处理模块不能修改搞特别级别的运行空间中的代码逻辑和功能，因此，在低异常级别的运行空间中的处理模块的权限被恶意程序或外部装置获取的情况下，依然可以保护需要保护的重要数据，从而可以提高数据的安全性。
例如，即使操作系统管理员权限和账户被恶意程序获取的情况下，依然可以保护 操作系统中的重要数据，从而可以提高操作系统中的数据的安全性。
本申请另一个实施例中，用于辅助保护数据的方法的示意性流程图如图11所示。图11所示的方法可以包括S1110和S1120。该方法可以由数据保护装置800执行。
应理解，图11示出了该方法的步骤或操作，但这些步骤或操作仅是示例，本申请实施例还可以执行其他操作或者图11中的各个操作的变形。此外，图11中的各个步骤可以按照与图11呈现的不同的顺序来执行，并且有可能并非要执行图11中的全部操作。
S1110，第三运行空间中运行的处理模块向第二运行空间中运行的处理模块发送第四消息，第四消息用于指示第二内存是否应受到保护。相应地，第二运行空间中的处理模块接收第四消息。
其中，第三运行空间中可以是图9中所示的用户程序空间或内核空间。第二运行空间可以是图9中所示的超级管理空间。
可选地，第三运行空间与第一运行空间可以是同一运行空间。第二运行空间中运行的处理模块可以是第二处理模块或内核关键数据保护模块。
第四消息也可以理解为用于指示第二内存中存储的数据应受到保护，或者，可以理解为用于指示第二内存的属性不能从只读、可执行和不可访问中任意一种修改为可写，或者，可以理解为用于指示第二内存中存储的数据不应被修改。
应受到保护或不应被修改的数据可以包括以下至少一种数据：操作系统在编译阶段存储到内存中的常量数据，操作系统在初始化阶段存储到内存中的常量数据，操作系统或用户程序在运行阶段存储到内存中且不能被修改的数据。
第四消息中可以包括第二内存的地址。例如，第四消息中可以包括第二内存的VA。
在一种可能的实现方式中，第三运行空间中运行的处理模块向第二运行空间中运行的处理模块发送第四消息可以包括：第三运行空间中运行的处理模块调用第二运行空间中运行的处理模块，并在调用时，通过接口将第四消息传递给第二运行空间中运行的处理模块。
例如，内核空间中运行的操作系统可以通过HVC指令调用超级管理空间中运行的hypervisor，以便于hypervisor根据第四消息生成内存保护表。
S1120，第二运行空间中运行的处理模块根据第四消息得到内存保护表，该内存保护表用于记录受保护和/或不受保护的内存。其中，第二运行空间的异常级别高于第三运行空间的异常级别。
例如，内存保护表仅用于记录受保护的内存时，若第四消息用于指示第二内存应受保护，则第二运行空间中运行的处理模块可以将第二内存记录到内存保护表中；若第四消息用于指示第二内存不应受保护，则第二运行空间中运行的处理模块不会将第二内存记录到内存保护表中。
例如，内存保护表仅用于记录不受保护的内存时，若第四消息用于指示第二内存不应受保护，则第二运行空间中运行的处理模块可以将第二内存记录到内存保护表中；若第四消息用于指示第二内存应受保护，则第二运行空间中运行的处理模块不会将第二内存记录到内存保护表中。
例如，内存保护表既用于记录受保护的内存，又用于记录不受保护的内存时，若 第四消息用于指示第二内存应受保护，则第二运行空间中运行的处理模块可以将第二内存记录到内存保护表中，并标识第二内存为受保护的内存；若第四消息用于指示第二内存不应受保护，则第二运行空间中运行的处理模块可以将第二内存记录到内存保护表中，并标识第二内存为不受保护的内存。
本申请实施例的一个示例中包括：操作系统在编译阶段将常量数据写入内存，且将该内存的属性标识为只读后，通过HVC指令调用hypervisor，将该内存记录为受保护的内存。
本申请实施例的另一个示例中包括：操作系统在初始化阶段将常量数据写入内存，且将该内存的属性标识为只读后，通过HVC治疗调用hypervisor，将该内存记录为受保护的内存。
本申请实施例的另一个示例中包括：操作系统在运行阶段将数据写入内存，且将该内存的属性标识为只读后，通过HVC治疗调用hypervisor，将该内存记录为受保护的内存。
在本申请的一个实施例中，S1030中所使用的内存保护表可以通过图11所示的方法得到。换句话说，S1030中所使用的内存保护表可以是S1120中得到的内存保护表。
S1030中所使用的内存保护表为S1120中得到的内存保护表时，第二内存与第一内存可以是同一内存；第三运行空间与第一运行空间可以是相同的运行空间，也可以是不同的运行空间。
第三运行空间与第一运行空间是相同的运行空间时，第三运行空间中运行的处理模块与第一处理模块可以是相同的处理模块。例如，第一运行空间与第三运行空间均为内核空间，第三运行空间中运行的处理模块与第一处理模块均为操作系统。
例如，操作系统在编译阶段将常量数据或者在初始化阶段将常量数据或者在运行阶段将数据写入第一内存，且将第一内存的属性标识为只读后，可以通过HVC指令调用hypervisor，在内存保护表中记录第一内存为受保护的内存。这样，操作系统向MMU发送第一消息，请求修改第一内存的属性时，MMU可以向hypervisor发送第二消息，请求hypervisor确定第一内存是否是受保护的。由于内存保护表中记录了第一内存是受保护的内存，因此，hypervisor指示MMU不能修改第一内存的属性。
第三运行空间与第一运行空间不是相同的运行空间的一种示例为：第一运行空间为用户程序空间，第三运行空间为内核空间，第一处理模块为操作系统，第三运行空间中的处理模块为用户程序。
本申请又一个实施例中，用于辅助保护数据的方法的示意性流程图如图12所示。图12所示的方法可以包括S1210和S1220。该方法可以由数据保护装置800执行。
应理解，图12示出了该方法的步骤或操作，但这些步骤或操作仅是示例，本申请实施例还可以执行其他操作或者图12中的各个操作的变形。此外，图12中的各个步骤可以按照与图12呈现的不同的顺序来执行，并且有可能并非要执行图12中的全部操作。
S1210，第二运行空间中运行的处理模块确定第三内存用于存储受保护的数据和/或第四内存用于存储不受保护的数据。
或者可以说，第二运行空间中运行的处理模块确定哪些内存用于存储受保护的数 据和/或确定哪些内存用于存储不受保护的数据。用于存储受保护的数据的内存即为第三内存，用于存储不受保护的数据的内存即为第四内存。
第二运行空间可以是图9中所示的超级管理空间。
受保护的数据可以包括以下至少一种数据：操作系统在编译阶段存储到内存中的常量数据，操作系统在初始化阶段存储到内存中的常量数据，操作系统或用户程序在运行阶段存储到内存中且不能被修改的数据。
可选地，第三内存和/或第四内存可以是第二运行空间中运行的处理模块根据预先配置的信息确定的，该预先配置的信息中记录第三内存用于存储受保护的数据和/或第四内存用于存储不受保护的数据。
或者可以说，该预先配置的信息中记录了哪些内存是用于存储受保护的数据的，和/或记录了哪些内存是用于存储不受保护的数据的。
例如，数据保护装置800中可以预先为内核空间中的操作系统分配用于存储操作系统的常量数据的内存。由于操作系统的常量数据为需要保护的数据，因此，可以预先配置该内存为第三内存的信息。这样，第二运行空间中运行的处理模块可以根据该预先配置的信息确定出第三内存是用于存储受保护的数据的。
例如，该预先配置的信息中可以记录为操作系统的常量数据分配的内存的VA。这样，第二运行空间中运行的处理模块可以根据该预先配置的信息确定该VA对应的内存是用于存储受保护的数据的，即该内存为第三内存。
S1220，第二运行空间中运行的处理模块生成内存保护表，该内存保护表中记录第三内存为受保护的内存和/或第四内存为不受保护的内存。
例如，第二运行空间中运行的处理模块确定第三内存为用于存储受保护的数据的内存后，将第三内存记录到内存保护表中，并标识第三内存为受保护的内存。
例如，第二运行空间中运行的处理模块确定第四内存为用于存储不受保护的数据的内存后，将第四内存记录到内存保护表中，并标识第四内存为不受保护的内存。
在本申请的一个实施例中，S1030中所使用的内存保护表可以通过图12所示的方法得到。换句话说，S1030中所使用的内存保护表可以是S1220中得到的内存保护表。
S1030中所使用的内存保护表为S1220中得到的内存保护表时，第三内存与第一内存可以是同一内存，或者第四内存与第一内存可以是同一内存。
例如，操作系统在编译阶段将常量数据写入原先为该常量数据分配的第三内存，且操作系统将第三内存的属性标识为只读后，hypervisor可以在内存保护表中记录第三内存为受保护的内存。这样，操作系统向MMU发送第一消息，请求修改第三内存的属性时，MMU可以向hypervisor发送第二消息，请求hypervisor确定第三内存是否是受保护的。由于内存保护表中记录了第三内存是受保护的内存，因此，hypervisor指示MMU不能修改第三内存的属性。
本申请有一个实施例的数据保护方法的示意性流程图如图13所示。该数据保护方法包括S1310和S1320。
应理解，图13示出了该数据保护方法的步骤或操作，但这些步骤或操作仅是示例，本申请实施例还可以执行其他操作或者图13中的各个操作的变形。此外，图13中的各个步骤可以按照与图13呈现的不同的顺序来执行，并且有可能并非要执行图13中 的全部操作。
S1310，第四运行空间中的处理模块向第二运行空间中的处理模块发送第五消息，第五消息用于请求将第一数据写入第五内存，其中，第二运行空间的异常级别高于第四运行空间的异常级别。
第四运行空间可以是图9中所示的用户程序空间或内核空间，第二运行空间可以是图9中所示的超级管理空间。
第五消息中可以携带第一数据和第五内存的地址。例如，第五消息中可以携带第一数据和第五内存的VA。
第一数据可以包括以下至少一种数据：操作系统在编译阶段的常量数据，操作系统在初始化阶段的常量数据。
第五内存是用于存储第一数据的内存。
S1320，第二运行空间中运行的处理模块根据第五消息，将第一数据写入第五内存。
本申请实施例中，由于第四运行空间中的处理模块需要经过比其异常级别高的第二运行空间中的处理模块来修改内存中的数据，也就是说，第四运行空间中的处理模块不能直接修改内存中的数据，因此，该方法是可以提高数据的安全性的。
此外，与图10中的方法相比，本申请实施例中的方法可以修改内存中的数据，因此灵活性更高。
本申请实施例中，可选地，第二运行空间中运行的处理模块可以在第五消息是预先规定的模块发送的情况下，才根据第五消息的请求，将第一数据写入第五内存，以进一步提高数据的安全性，从而提高操作系统的安全性。
例如，仅在操作系统的补丁程序通过HVC指令调用hypervisor的情况下，hypervisor才将第一数据写入第五内存。
也就是说，在本申请实施例的一种实现方式中，S1320具体可以包括：第五消息由预先规定的处理模块向第二运行空间中运行的处理模块发送的情况下，第二运行空间中运行的处理模块根据第五消息的请求，将第一数据写入第五内存。
本申请另一个实施例中，图13所示的数据保护方法可以与图10至图12中至少一个所示的方法结合在一起使用。
例如，数据保护装置800可以通过图11和/或图12的方法生成内存保护表，然后可以通过图10所示的方法来判定内存是否是受保护，并可以通过图13所示的数据保护方法来修改数据。
若将图10所示的数据保护方法与图11所述的数据保护方法结合在一起使用，则第四运行空间与第一运行空间可以是同一个运行空间。
例如，第四运行空间与第一运行空间均可以为内核空间，第一运行空间中的处理模块可以是操作系统，第四运行空间中的处理模块可以是操作系统的补丁程序。
参照图6所示的本申请一个实施例的数据保护装置的示意性结构图。应理解，图6示出的数据保护装置600仅是示例，本申请实施例的数据保护装置还可包括其他模块或单元，或者包括与图6中的各个模块的功能相似的模块，或者并非要包括图6中所有模块。
数据保护装置600中包括处理器执行单元610和内存管理单元620，处理器执行 单元610划分的运行空间包括第一运行空间611和第二运行空间612，第二运行空间的异常级别高于第一运行空间的异常级别，所述第一运行空间用于运行第一处理模块，第二运行控制用于运行第二处理模块。
数据保护装置600可以用于执行图9至图13中任意一个所示的数据保护方法中的数据保护装置执行的步骤。
例如，第一处理模块用于向内存管理单元620发送第一消息，所述第一消息用于请求修改第一内存的属性。
内存管理单元620用于向第二处理模块发送第二消息，所述第二消息用于请求确定所述第一内存是否是受保护的。
第二处理模块用于根据预先获取的内存保护表，确定所述第一内存是否是受保护的。
第二处理模块向内存管理单元620发送第三消息，所述第三消息用于指示是否修改所述第一内存的属性。
所述内存管理单元用于：在所述第三消息用于指示修改所述第一内存的属性时，根据所述第一消息修改所述第一内存的属性；在所述第三消息用于指示不修改所述第一内存的属性，拒绝修改所述第一内存的属性。
可选地，第一处理模块具体用于向所述第二运行空间中的所述第二处理模块发送第四消息，所述第四消息用于指示所述第一内存是否是受保护的。
所述第二处理模块具体用于根据所述第四消息生成所述内存保护表，所述内存保护表用于记录受保护的内存和/或不受保护的内存，所述受保护的内存包括用于存储受保护的数据的内存，所述不受保护的内存包括用于存储不受保护的数据的内存。
可选地，所述第二处理模块具体用于：确定所述第一内存用于存储受保护的数据或确定所述第一内存用于存储不受保护的数据；生成所述内存保护表，所述内存保护表用于记录所述第一内存为受保护的内存或用于记录所述第一内存为不受保护的内存，所述受保护的内存包括用于存储受保护的数据的内存，所述不受保护的内存包括用于存储不受保护的数据的内存。
可选地，所述第一运行空间为内核空间，所述第一处理模块为操作系统；其中，所述受保护的数据包括：所述操作系统在编译阶段写入内存的常量数据，所述操作系统在初始化阶段写入内存的常量数据。
可选地，数据保护装置600中还可以包括存储器，该存储器用于存储处理器执行单元610执行的程序代码以及数据。
可选地，数据保护装置600可以为手机、平板电脑、服务器、个人电脑、网络路由器或交换机。
本领域普通技术人员可以意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本申请的范围。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的装置 和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
在本申请所提供的几个实施例中，应该理解到，所揭露装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。
所述功能如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本申请各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(read-only memory，ROM)、随机存取存储器、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。

Claims (18)

  1. 一种内核完整性保护方法，其特征在于，所述内核完整性保护方法由内核完整性保护装置执行，所述内核完整性保护装置中包括处理器执行单元，所述处理器执行单元划分的运行空间包括第一运行空间和第二运行空间，所述第二运行空间的异常级别高于所述第一运行空间的异常级别；
    所述内核完整性保护方法包括：
    所述第一运行空间中运行的第一处理模块向所述第二运行空间中运行的第二处理模块发送请求消息，所述请求消息用于请求进行内存访问，所述内存访问涉及对预设寄存器的访问和/或对预设内存空间的访问；
    所述第二运行空间中运行的第二处理模块响应于所述请求消息，获取所述内存访问对应的事件的信息；
    所述第二运行空间中运行的第二处理模块将所述信息发送给所述第一运行空间中运行的第一处理模块；
    所述第一运行空间中运行的第一处理模块根据所述信息对所述事件进行处理。
  2. 如权利要求1所述的内核完整性保护方法，其特征在于，所述第一运行空间为内核空间，所述第一处理模块为操作系统，所述第二运行空间为超级管理空间或安全监视空间。
  3. 如权利要求1所述的内核完整性保护方法，其特征在于，所述对预设寄存器的访问，包括：
    对系统控制寄存器的读或写。
  4. 如权利要求1所述的内核完整性保护方法，其特征在于，所述对预设内存空间的访问，包括：
    修改内核代码段、关闭内存管理单元、修改内核页表和修改用户页表中的至少一项。
  5. 如权利要求1至4中任一项所述的方法，其特征在于，所述处理器执行单元划分的运行空间还包括第三运行空间，所述第三运行空间的异常级别低于所述第一运行空间的异常级别；所述第一运行空间中运行的第一处理模块根据所述信息对所述事件进行处理，包括：
    所述第一运行空间中运行的第一处理模块根据所述信息向所述第三运行空间中运行的第三处理模块发送信号，所述信号用于杀掉所述事件对应的进程。
  6. 如权利要求1至4中任一项所述的方法，其特征在于，
    所述处理器执行单元划分的运行空间还包括第三运行空间，所述第三运行空间的异常级别低于所述第一运行空间的异常级别；所述第一运行空间中运行的第一处理模块根据所述信息对所述事件进行处理，包括：
    所述第一运行空间中运行的第一处理模块根据所述信息向所述第三运行空间中运行的第四处理模块上报日志，所述日志包括所述信息。
  7. 如权利要求6所述的方法，其特征在于，所述方法还包括：
    所述第三运行空间中运行的第四处理模块将所述日志上传到云端服务器；
    所述第三运行空间中运行的第四处理模块从所述云端服务器接收安全策略或补丁。
  8. 如权利要求5至7中任一项所述的方法，其特征在于，所述第三运行空间为用户程序空间。
  9. 如权利要求1至8中任一项所述的方法，其特征在于，所述信息包括攻击类型、攻击进程的名字和端口号中的至少一项。
  10. 如权利要求1至9中任一项所述的内核完整性保护方法，其特征在于，所述内核完整性保护方法具体为数据保护方法，所述内核完整性保护装置具体为数据保护装置，所述数据保护装置中包括所述处理器执行单元和内存管理单元；
    所述第一运行空间中运行的第一处理模块向所述第二运行空间中运行的第二处理模块发送请求消息，所述请求消息用于请求进行内存访问，所述内存访问涉及对预设寄存器的访问和/或对预设内存空间的访问，包括：
    所述第一运行空间中运行的第一处理模块向所述内存管理单元发送第一消息，所述第一消息用于请求修改第一内存的属性；
    所述内存管理单元向所述第二运行空间中运行的第二处理模块发送第二消息，所述第二消息用于请求确定所述第一内存是否是受保护的；
    所述方法还包括：
    所述第二运行空间中运行的所述第二处理模块根据预先获取的内存保护表，确定所述第一内存是否是受保护的；
    所述第二运行空间运行的所述第二处理模块向所述内存管理单元发送第三消息，所述第三消息用于指示是否修改所述第一内存的属性；
    若所述第三消息用于指示修改所述第一内存的属性，则所述内存管理单元根据所述第一消息修改所述第一内存的属性；若所述第三消息用于指示不修改所述第一内存的属性，则所述内存管理单元拒绝修改所述第一内存的属性。
  11. 根据权利要求10所述的数据保护方法，其特征在于，所述第二运行空间中运行的所述第二处理模块根据预先获取的内存保护表，确定所述第一内存是否是受保护的之前，所述数据保护方法还包括：
    所述第一运行空间中的所述第一处理模块向所述第二运行空间中的所述第二处理模块发送第四消息，所述第四消息用于指示所述第一内存是否是受保护的；
    所述第二运行空间中的所述第二处理模块根据所述第四消息生成所述内存保护表，所述内存保护表用于记录受保护的内存和/或不受保护的内存，所述受保护的内存包括用于存储受保护的数据的内存，所述不受保护的内存包括用于存储不受保护的数据的内存。
  12. 根据权利要求10所述的数据保护方法，其特征在于，所述第二运行空间中运行的所述第二处理模块根据预先获取的内存保护表，确定所述第一内存是否是受保护的之前，所述数据保护方法还包括：
    所述第二运行空间中运行的所述第二处理模块确定所述第一内存用于存储受保护的数据或确定所述第一内存用于存储不受保护的数据；
    所述第二运行空间中运行的所述第二处理模块生成所述内存保护表，所述内存保护表用于记录所述第一内存为受保护的内存或用于记录所述第一内存为不受保护的内存，所述受保护的内存包括用于存储受保护的数据的内存，所述不受保护的内存包括 用于存储不受保护的数据的内存。
  13. 根据权利要求11或12所述的数据保护方法，其特征在于，所述第一运行空间为内核空间，所述第一处理模块为操作系统，所述第二运行空间为超级管理空间；
    其中，所述受保护的数据包括：所述操作系统在编译阶段写入内存的常量数据，所述操作系统在初始化阶段写入内存的常量数据。
  14. 根据权利要求10至13中任一项所述的数据保护方法，其特征在于，所述数据保护装置为手机、平板电脑、服务器、个人电脑、网络路由器或交换机。
  15. 一种内核完整性保护装置，其特征在于，所述内核完整性保护装置中包括处理器执行单元，所述处理器执行单元划分的运行空间包括第一运行空间和第二运行空间，所述第二运行空间的异常级别高于所述第一运行空间的异常级别，所述第一运行空间用于运行第一处理模块，所述第二运行空间用于运行第二处理模块；
    所述第一处理模块，用于向所述第二处理模块发送请求消息，所述请求消息用于请求进行内存访问，所述内存访问涉及对预设寄存器的访问和/或对预设内存空间的访问；
    所述第二处理模块，用于响应于所述请求消息，获取所述内存访问对应的事件的信息，并将所述信息发送给所述第一运行空间中运行的第一处理模块；
    所述第一处理模块，还用于根据所述信息对所述事件进行处理。
  16. 一种计算设备，其特征在于，所述计算设备包括存储器和处理器，所述存储器中存储有可执行代码，所述可执行代码用于实现内核完整性保护装置，所述内核完整性保护装置中包括处理器执行单元，所述处理器执行单元划分的运行空间包括第一运行空间和第二运行空间，所述第二运行空间的异常级别高于所述第一运行空间的异常级别，所述第一运行空间用于运行第一处理模块，所述第二运行空间用于运行第二处理模块；
    所述处理器执行所述可执行代码时，执行以下操作：
    控制所述第一处理模块向所述第二处理模块发送请求消息，所述请求消息用于请求进行内存访问，所述内存访问涉及对预设寄存器的访问和/或对预设内存空间的访问；
    控制所述第二处理模块响应于所述请求消息，获取所述内存访问对应的事件的信息，并将所述信息发送给所述第一运行空间中运行的第一处理模块；
    控制所述第一处理模块根据所述信息对所述事件进行处理。
  17. 一种计算机可读存储介质，其特征在于，所述计算机可读存储介质中存储用于内核完整性保护装置执行的程序代码，所述程序代码包括用于执行权利要求1至14中任一项所述的方法的指令。
  18. 一种芯片，其特征在于，所述芯片用于实现内核完整性保护装置，所述内核完整性保护装置中包括处理器执行单元，所述处理器执行单元划分的运行空间包括第一运行空间和第二运行空间，所述第二运行空间的异常级别高于所述第一运行空间的异常级别，所述第一运行空间用于运行第一处理模块，所述第二运行空间用于运行第 二处理模块；
    所述芯片包括处理器，所述处理器用于执行以下操作：
    控制所述第一处理模块向所述第二处理模块发送请求消息，所述请求消息用于请求进行内存访问，所述内存访问涉及对预设寄存器的访问和/或对预设内存空间的访问；
    控制所述第二处理模块响应于所述请求消息，获取所述内存访问对应的事件的信息，并将所述信息发送给所述第一运行空间中运行的第一处理模块；
    控制所述第一处理模块根据所述信息对所述事件进行处理。
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