WO2019108406A1 - Method of improving deposition induced cd imbalance using spatially selective ashing of carbon based film - Google Patents
Method of improving deposition induced cd imbalance using spatially selective ashing of carbon based film Download PDFInfo
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- WO2019108406A1 WO2019108406A1 PCT/US2018/061347 US2018061347W WO2019108406A1 WO 2019108406 A1 WO2019108406 A1 WO 2019108406A1 US 2018061347 W US2018061347 W US 2018061347W WO 2019108406 A1 WO2019108406 A1 WO 2019108406A1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
- H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
- H10P76/408—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes
- H10P76/4085—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes characterised by the processes involved to create the masks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
- H01J37/32174—Circuits specially adapted for controlling the RF discharge
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- H—ELECTRICITY
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- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
- H10P14/6326—Deposition processes
- H10P14/6328—Deposition from the gas or vapour phase
- H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H10P14/6336—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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- H—ELECTRICITY
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- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
- H10P14/6326—Deposition processes
- H10P14/6328—Deposition from the gas or vapour phase
- H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H10P14/6339—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
- H10P14/668—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials
- H10P14/6681—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
- H10P14/668—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials
- H10P14/6681—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si
- H10P14/6687—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound comprising silicon and nitrogen
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/69—Inorganic materials
- H10P14/6902—Inorganic materials composed of carbon, e.g. alpha-C, diamond or hydrogen doped carbon
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/69—Inorganic materials
- H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
- H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
- H10P14/69215—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/73—Etching of wafers, substrates or parts of devices using masks for insulating materials
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
- H10P76/20—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
- H10P76/204—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials of organic photoresist masks
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
- H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
- H10P50/286—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials
- H10P50/287—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials by chemical means
Definitions
- the present disclosure relates to the formation of semiconductor devices. More specifically, the disclosure relates to the formation of semiconductor devices where pattern multiplication is used to double or quadruple a mask density or line frequency. Such pattern multiplication may form oxide spacers around carbon features and then remove the carbon features, leaving the oxide spacers to act as a mask.
- a method for forming features over a wafer with a carbon based deposition is provided.
- the carbon based deposition is pretuned, wherein the pretuning causes a non-uniform removal of some of the carbon based deposition.
- An oxide deposition of a silicon oxide (S1O2) based material is deposited through an atomic layer deposition process, wherein the depositing the oxide deposition causes a non-uniform removal of some of the carbon based deposition, which is complementary to the non-uniform removal of some of the carbon based deposition by the pretuning.
- a method for forming features over a wafer with a carbon based deposition is provided.
- the carbon based deposition is pretuned, wherein the pretuning causes a non-uniform removal of some of the carbon based deposition.
- An oxide deposition is deposited through an atomic layer deposition process, wherein the depositing the oxide deposition causes a non-uniform removal of some of the carbon based deposition.
- At least one additional process is provided, wherein the at least one additional process completes formation of features over the wafer, wherein the features are more uniform than features that would be formed without pretuning.
- FIG. 1 is a high level flow chart of an embodiment.
- FIG. 2 is a schematic view of a process chamber that may be used in an embodiment.
- FIG. 3 is a schematic view of a computer system that may be used in practicing an embodiment.
- FIGS. 4A-F are schematic cross-sectional views of a stack processed according to an embodiment.
- FIG. 5 is a more detailed flow chart of a pretuning process.
- FIG. 6 is a more detailed flow chart of a lower energy oxide deposition.
- FIG. 7 is a more detailed flow chart of a higher energy oxide deposition.
- FIG. 8 is a graph of carbon removal according to an embodiment.
- FIG. 9 is a flow chart another embodiment.
- the oxide spacer film may be etched to expose the carbon based film, leaving oxide spacers on sides of carbon based film features.
- the carbon based film is removed leaving oxide spacers with twice the frequency and half the spacing and CD between features. If the process is repeated N times, the CD of the final structure would be 2 N of the initial structure of the carbon film.
- the deposition of the oxide spacer film and subsequent etching removes some of the carbon film in a non-uniform way across a wafer. Such a non-uniform removal of carbon is called loss non-uniformity (NU) across the wafer. In an example, more of the carbon film is removed within 3 cm of the edge of the wafer compared to the remaining parts of a wafer.
- NU loss non-uniformity
- Another conventional method may be to tune the carbon core etch profile across the wafer to compensate for the loss NU imparted by the deposition process.
- etch profile tuning is often non-trivial and there is general unwillingness to modify a complex etch process to compensate for shortcomings in the deposition process.
- FIG. 1 is a high level flow chart of an embodiment.
- a carbon based deposition is deposited over a wafer (step 104).
- the carbon based deposition is pretuned where the pretuning causes a non-uniform removal of some of the carbon based deposition (step 108).
- a lower energy atomic layer deposition (ALD) process is used to deposit an oxide deposition (step 110), where the lower energy ALD process does not remove or minimally removes some of the carbon based deposition.
- a higher energy ALD process is used to deposit an oxide deposition (step 112), where the depositing the oxide deposition causes a non-uniform removal of some of the carbon based deposition that is complementary to the non- uniform removal of some of the carbon based deposition by the pretuning.
- the oxide deposition is a silicon oxide based material.
- the oxide deposition is etched back (step 116).
- the carbon based deposition is removed (step 120).
- An underlying layer is etched, where the oxide deposition is used as a mask (step 124).
- FIG. 2 is a schematic view of a process chamber which may be used in an embodiment.
- a process chamber 200 comprises a gas distribution plate 206 providing a gas inlet and a wafer support 208, within a chamber 249, enclosed by a chamber wall 252.
- a wafer 203 is positioned over the wafer support 208.
- An edge ring 209 surrounds the wafer support 208.
- a gas source 210 is connected to the chamber 249 through the gas distribution plate 206.
- a support temperature controller 250 is connected the wafer support 208.
- a radio frequency (RF) source 230 provides RF power to an upper electrode, which in this embodiment is the gas distribution plate 206.
- 400 kHz, 13.56 MHz, and optionally 2 MHz, 27 MHz power sources make up the RF source 230.
- the wafer support 208 is grounded.
- one generator is provided for each frequency.
- the generators may be in separate RF sources, or separate RF generators may be connected to different electrodes.
- the upper electrode may have inner and outer electrodes connected to different RF sources. Other arrangements of RF sources and electrodes may be used in other embodiments.
- a controller 235 is controllably connected to the RF source 230, an exhaust pump 220, and the gas source 210.
- An example of such a chamber is the StrikerTM Oxide system manufactured by Lam Research Corporation of Fremont, CA.
- FIG. 3 is a high level block diagram showing a computer system 300, which is suitable for implementing a controller 235 used in embodiments.
- the computer system may have many physical forms ranging from an integrated circuit, a printed circuit board, and a small handheld device up to a huge super computer.
- the computer system 300 includes one or more processors 302, and further can include an electronic display device 304 (for displaying graphics, text, and other data), a main memory 306 (e.g., random access memory (RAM)), storage device 308 (e.g., hard disk drive), removable storage device 310 (e.g., optical disk drive), user interface devices 312 (e.g., keyboards, touch screens, keypads, mice or other pointing devices, etc.), and a communications interface 314 (e.g., wireless network interface).
- the communications interface 314 allows software and data to be transferred between the computer system 300 and external devices via a link.
- the system may also include a communications infrastructure 316 (e.g., a communications bus, cross-over bar, or network) to which the aforementioned devices/modules are connected.
- a communications infrastructure 316 e.g., a communications bus, cross-over bar, or network
- Information transferred via communications interface 314 may be in the form of signals such as electronic, electromagnetic, optical, or other signals capable of being received by communications interface 314, via a communication link that carries signals and may be implemented using wire or cable, fiber optics, a phone line, a cellular phone link, a radio frequency link, and/or other communication channels.
- a communications interface it is contemplated that the one or more processors 302 might receive information from a network, or might output information to the network in the course of performing the above-described method steps.
- method embodiments may execute solely upon the processors or may execute over a network such as the Internet, in conjunction with remote processors that shares a portion of the processing.
- non-transient computer readable medium is used generally to refer to media such as main memory, secondary memory, removable storage, and storage devices, such as hard disks, flash memory, disk drive memory, CD-ROM, and other forms of persistent memory and shall not be construed to cover transitory subject matter, such as carrier waves or signals.
- Examples of computer code include machine code, such as produced by a compiler, and files containing higher level code that are executed by a computer using an interpreter.
- Computer readable media may also be computer code transmitted by a computer data signal embodied in a carrier wave and representing a sequence of instructions that are executable by a processor.
- FIG. 4A is a schematic cross sectional view of part of a stack 400 with a wafer 404 disposed below an intermediate layer 408, disposed below a carbon based deposition 412.
- the carbon based deposition 412 is an organic patterned mask, such as a photoresist mask, with a first mask feature 414 and a second mask feature 416.
- One or more layers may be disposed between the wafer 404 and the intermediate layer 408.
- One or more layers (not shown), such as an antireflective coating, may also be disposed between the intermediate layer 408 and the carbon based deposition 412.
- FIG. 5 is a more detailed flow chart of the step of pretuning.
- a pretuning gas is provided is flowed into the process chamber (step 504).
- the pretuning gas is 1000 seem 0 2 , 1500 seem Ar, and 25,000 seem N 2 .
- the pretuning gas is transformed into a plasma (step 508).
- 750 watts of RF are provided at a frequency of 13.56 MHz.
- a bias of 15 volts is provided.
- the flow of the pretuning gas into the process chamber is stopped (step 512).
- FIG. 1 is a plasma.
- FIG. 4B is a cross sectional view of the stack 400 after the carbon based deposition 412 has been pretuned (step 108).
- the NU is across a wafer 404, where the center of a wafer 404 may not be uniformly processed with respect to features at the edge of the wafer.
- FIG. 4B schematically illustrates nonuniformity in features that are illustrated as being side by side, where such nonuniformity is actually in features that are spaced apart.
- certain aspects have been exaggerated in order to illustrate general aspects of the embodiment.
- some of the first mask feature 414 is removed by the pretuning and none of the second mask feature 416 is removed by the pretuning.
- a lower energy oxide deposition is deposited on the carbon based deposition (step 110) through an ALD process.
- FIG. 6 is a more detailed flow chart of the lower energy oxide deposition (step 110).
- a precursor gas flowed into the process chamber (step 604). In this example the precursor gas is 400 seem aminosilane.
- the flow of the precursor gas into the process chamber is stopped (step 612).
- a silicon containing precursor layer is deposited over the carbon based deposition 412.
- a first purge gas is flowed into the process chamber (step 616). In this example, the first purge gas is argon and oxygen (0 2 ). The flow of the first purge gas is stopped (step 620).
- An oxidation gas flowed into the process chamber (step 624).
- the oxidation gas is 13,000 seem Ar and 1500 seem 0 2 .
- the oxidation gas is transformed into a plasma (step 628). In this example, 100 to 500 watts of RF are provided at a frequency of 13.56 MHz.
- the flow of the oxidation gas into the process chamber is stopped (step 632).
- the plasma from the oxidation gas transforms the deposited silicon containing precursor layer into silicon oxide.
- a second purge gas is flowed into the process chamber (step 636).
- the flow of the second purge gas is stopped (step 640).
- the cycle then repeats from the step of flowing the precursor gas into the process chamber (step 604). In this example, the process is repeated for 2 to 10 cycles.
- the lower energy oxide deposition (step 110) is performed at a sufficiently low energy for depositing a silicon oxide layer, with minimal damage to the carbon based deposition 412.
- a higher energy oxide deposition is deposited on the carbon based deposition (step 112) through an ALD process.
- FIG. 7 is a more detailed flow chart of the higher energy oxide deposition (step 112).
- a silicon containing precursor layer is deposited over the carbon based deposition 412.
- a first purge gas is flowed into the process chamber (step 716).
- the first purge gas is argon and oxygen.
- the flow of the first purge gas is stopped (step 720).
- An oxidation gas flowed into the process chamber (step 724).
- the oxidation gas is 13,000 seem Ar and 1500 seem 0 2 .
- the oxidation gas is transformed into a plasma (step 728). In this example, 800 to 1200 watts of RF are provided at a frequency of 13.56 MHz.
- the RF power provided during the higher energy oxide deposition is higher than the RF power provided during the lower energy oxide deposition. More preferably, the RF power provided during the higher energy oxide deposition is at least 300 watts higher than the RF power provided during the lower energy oxide deposition. In some embodiments, the RF power provided during the higher energy oxide deposition is at least twice the RF power provided during the lower energy oxide deposition.
- the cycle then repeats from the step of flowing the precursor gas into the process chamber (step 704).
- the process is repeated for 126 to 134 cycles.
- the higher energy oxide deposition (step 112) imparts less damage to the carbon based deposition 412 due to the protective film formed during the preceding lower energy oxide deposition.
- FIG. 4C is a cross sectional view of the stack 400 after the higher energy oxide deposition is deposited on the carbon based deposition 412 (step 112).
- the oxide deposition 420 has unevenly removed the carbon based deposition 412, by removing more of the second mask feature 416 than the first mask feature 414.
- the non-uniform removal of the carbon based deposition by the depositing the oxide deposition 420 is complementary to the non-uniform removal of some of the carbon based deposition 412 by the pretuning in that the combination of the non- uniform removal of some of the carbon based deposition by the depositing the oxide deposition and the non-uniform removal of some of the carbon based deposition by the pretuning results in a more uniform removal of the carbon based deposition than the non-uniform removal of some of the carbon based deposition by the depositing the oxide deposition alone.
- the amount removed from the first mask feature 414 is approximately equal to the amount removed from the second mask feature 416.
- FIG. 4D is a cross sectional view of the stack 400 after the oxide deposition 420 has been etched back.
- RIE reactive ion etct
- the carbon based deposition is removed (step 120).
- An example of a recipe would be plasma ashing with oxygen containing species.
- FIG. 4E is a cross sectional view of the stack 400 after the carbon based deposition has been removed.
- An underlying layer is etched, where the oxide deposition is used as a mask (step 124).
- the underlying layer that is etched is the intermediate layer 408, which in this example is polysilicon.
- FIG. 4F is a cross sectional view of the stack 400 after the intermediate layer 408 is etched.
- FIG. 8 demonstrates how the final carbon based deposition removal profile can be flattened by superposing the loss profiles of the pretuning and depositing the oxide deposition.
- FIG. 8 shows a graph of the carbon removal caused by the pretuning versus the distance from the center of the wafer 804.
- a graph of the carbon removal caused by the higher energy oxide deposition versus the distance from the center of the wafer 808 is also shown.
- the sum of the carbon removed by both the pretuning and the higher energy oxide deposition 812 is also graphed.
- the sum of the carbon removed by both the pretuning and the higher energy oxide deposition 812 is equivalent to executing the two processes in sequence.
- Table 1 shows the average loss and the loss range in angstroms of the carbon based deposition caused by the higher energy oxide deposition alone and the sum of the pretuning and the higher energy oxide deposition in an example.
- the bowl shaped loss profile of the higher energy oxide deposition process is compensated by the dome shaped profile of the pretuning.
- the final profile is substantially flatter than that of the higher energy oxide deposition alone, and a corresponding improvement in loss range from 12.5 A for the higher energy oxide deposition alone to 6.0 A for the sum of the loss due to pretuning and the higher energy oxide deposition is observed.
- improved uniformity is indicated by the lower range.
- the removal of the carbon based deposition from pretuning may be minimized.
- less than 20 A total of the thickness of the carbon based deposition is removed by the pretuning.
- less than 10 A total of the thickness of the carbon based deposition is removed by the pretuning.
- the removal or loss range of the carbon deposition by the pretuning and the higher energy oxide deposition is less than 10 A.
- the removal or loss range of the carbon deposition by the pretuning and the higher energy oxide deposition is less than 5 A.
- a target removal depth is provided, since the target removal depth is used in determining a complex
- Providing a process where the thickness of the carbon removed is significantly greater or less than the target removal depth changes the complex manufacturing process in a way that reduces yield.
- providing the pretuning increases the thickness of the carbon removed. If only standard higher energy oxide deposition is used then the carbon removed would be greater than the target thickness.
- Providing lower energy oxide deposition reduces the thickness of the carbon that is removed. By providing a combination of lower energy oxide deposition and higher energy oxide deposition the target removal depth is achieved.
- the above embodiment provides a more uniform pattern. As device sizes shrink, such an improvement increases uniformity and decreases defects.
- the pretuning can be done in- situ immediately preceding depositing the oxide deposition.
- the cumulative carbon based deposition removal after the pretuning and depositing the oxide deposition is substantially uniform or otherwise tailored to fulfill a given integration requirement.
- the removal of the carbon based deposition by the pretuning is minimized by maximally biasing the etch profile to where the removal caused by the depositing the oxide deposition is minimum.
- the pretuning may use a pretuning gas comprising at least one of oxygen, nitrogen, or argon. The pretuning, allows for the tuning of the etch profile, which can be modulated and tailored by varying the respective ratios of the gas components.
- pressure and RF power of the pretuning can also be utilized to further tune the etch profile.
- both feedforward and feedback schemes can be utilized as part of the process implementation.
- inspection results from after the preceding etch step can be used as inputs to controllers that determine the optimal settings for the pretuning.
- the final CD measurements after oxide deposition and etch can be used as the inputs.
- Various embodiments provide independent controllability of the carbon deposition removal.
- the plasma pretuning has no other function than to pre-tune the loss profile, which gives flexibility in terms of the profiles it can achieve (e.g. bowl, dome, and flat).
- pretuning is performed in-situ in the same module as oxide deposition and requires no additional hardware or facilities. For typical desired profiles, the pretuning adds less than ten seconds to the total deposition time thereby minimizing any time impact.
- the relative flow ratios and rates of different gases such as Ar, N 2 , and 0 2 for the pretuning gas are used as control parameters for tuning the non-uniform pretuning of the carbon based deposition.
- FIG. 9 is a high level flow chart of another embodiment.
- a carbon based deposition is deposited over a wafer (step 904).
- the carbon based deposition is pretuned where the pretuning causes a non-uniform removal of some of the carbon based deposition (step 908).
- An oxide deposition is deposited through an ALD process (step 912), where the depositing the oxide deposition causes a non-uniform removal of some of the carbon based deposition.
- the oxide deposition is a silicon oxide based deposition.
- At least one additional process is provided (step 916), where the at least one additional process completes formation of features over the wafer, wherein the features are more uniform than features that would be formed without pretuning.
- the process chamber may provide a non- uniform process for the at least one additional process.
- a tailored profile that complements the non-uniformity of the at least one additional process is desired after depositing the oxide deposition, since the process chamber would use the tailored profile to provide more uniform semiconductors across the wafer after the at least one additional process.
- the pretuning is designed to provide the tailored profile after depositing the oxide deposition, so that the resulting features are more uniform than features formed without the pretuning.
- the oxygen in the pretuning gas provides some ashing to cause some carbon based deposition removal during the pretuning.
- the argon and nitrogen in the pretuning gas may be used for uniformity control, where the ratio of oxygen to argon to nitrogen is used to tune the profile of the carbon based deposition. In some embodiments, for the pretuning gas the ratio of oxygen to argon is between 2:1 to 1:2.
- the carbon based deposition 412 may be amorphous carbon, photoresist, spin on carbon, or chemical vapor deposition (CVD) carbon, or ashable hardmask.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201880077280.2A CN111512413B (en) | 2017-11-29 | 2018-11-15 | Method for improving deposition-induced CD imbalance using spatially selective ashing of carbon-based films |
| KR1020207018635A KR102700803B1 (en) | 2017-11-29 | 2018-11-15 | A method for improving deposition-induced CD imbalance using spatially selective ashing of carbon-based films |
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| US201762591949P | 2017-11-29 | 2017-11-29 | |
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| US15/974,172 | 2018-05-08 | ||
| US15/974,172 US10978302B2 (en) | 2017-11-29 | 2018-05-08 | Method of improving deposition induced CD imbalance using spatially selective ashing of carbon based film |
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| US10978302B2 (en) | 2017-11-29 | 2021-04-13 | Lam Research Corporation | Method of improving deposition induced CD imbalance using spatially selective ashing of carbon based film |
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- 2018-11-15 CN CN201880077280.2A patent/CN111512413B/en active Active
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| WO2016054531A1 (en) * | 2014-10-03 | 2016-04-07 | Applied Materials, Inc. | High temperature silicon oxide atomic layer deposition technology |
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| KR20200084055A (en) | 2020-07-09 |
| US20210202250A1 (en) | 2021-07-01 |
| KR102700803B1 (en) | 2024-08-29 |
| US10978302B2 (en) | 2021-04-13 |
| CN111512413B (en) | 2025-04-15 |
| US11651963B2 (en) | 2023-05-16 |
| US20190164757A1 (en) | 2019-05-30 |
| CN111512413A (en) | 2020-08-07 |
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