WO2019017283A1 - Electronic component - Google Patents

Electronic component Download PDF

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Publication number
WO2019017283A1
WO2019017283A1 PCT/JP2018/026451 JP2018026451W WO2019017283A1 WO 2019017283 A1 WO2019017283 A1 WO 2019017283A1 JP 2018026451 W JP2018026451 W JP 2018026451W WO 2019017283 A1 WO2019017283 A1 WO 2019017283A1
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WO
WIPO (PCT)
Prior art keywords
resin layer
filler
fillers
substrate
sealing resin
Prior art date
Application number
PCT/JP2018/026451
Other languages
French (fr)
Japanese (ja)
Inventor
浩章 徳矢
佐野　雄一
敏博 多田
Original Assignee
株式会社村田製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社村田製作所 filed Critical 株式会社村田製作所
Priority to CN201880047748.3A priority Critical patent/CN110914977A/en
Publication of WO2019017283A1 publication Critical patent/WO2019017283A1/en
Priority to US16/744,449 priority patent/US11335617B2/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3142—Sealing arrangements between parts, e.g. adhesion promotors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293—Organic, e.g. plastic
    • H01L23/295—Organic, e.g. plastic containing a filler
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape
    • H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
    • H01L2924/18161—Exposing the passive side of the semiconductor or solid-state body of a flip chip

Definitions

  • the present invention relates to an electronic component in which a semiconductor chip mounted on a substrate is sealed by a sealing resin.
  • Patent Document 1 There is known an electronic component including a substrate, a semiconductor chip mounted on the substrate, and a sealing resin layer for sealing the semiconductor chip (Patent Document 1).
  • the electronic component disclosed in Patent Document 1 is formed by laminating resin sheets in contact with a substrate and an electronic device. For laminating the resin sheets, a method such as a heat press or a laminator is used.
  • the resin sheet is divided into a first resin layer and a second resin layer.
  • the first resin layer contains heat conductive particles, and is designed to have a thermal conductivity of 1 W / mK or more.
  • the second resin layer preferably contains a filler. This filler has the effect of favorably reducing the linear expansion coefficient of the second resin layer.
  • the first resin layer contacts the substrate and the electronic device. Since the first resin layer has high thermal conductivity, heat generated in the electronic device can be released to the substrate.
  • a clear interface is formed between the first resin layer and the second resin layer.
  • the thermal expansion coefficients of the first resin layer and the second resin layer are different, stress is generated at the interface between the two due to the difference in the thermal expansion coefficient. Since the stress is concentrated at the interface between the first resin layer and the second resin layer, the sealing resin layer including the first resin layer and the second resin layer becomes fragile to the heat history, and the reliability It leads to the decrease of sex.
  • An object of the present invention is to provide an electronic component which is less likely to cause a decrease in reliability while maintaining thermal conductivity.
  • An electronic component is A substrate, A semiconductor chip mounted on the substrate; And a sealing resin layer for sealing the semiconductor chip,
  • the sealing resin layer is With a binder, And at least two types of fillers composed of a plurality of particles dispersed in the binder and having different physical quantities of at least one of average particle diameter and density, The volume density of the filler in the sealing resin layer is lowered upward from the substrate, and a region in which two types of the filler are mixed in a part in the height direction of the sealing resin layer is obtained.
  • the thermal conductivity of the filler is higher than the thermal conductivity of the binder resin. For this reason, the heat generated in the semiconductor chip is more likely to be conducted through the filler than the binder resin. Since the volume density of the filler in the sealing resin layer is lowered from the substrate upward, the heat generated in the semiconductor chip is preferentially transferred to the substrate side. In addition, since the sealing resin layer includes the region in which the two types of fillers are mixed, the change in the thermal expansion coefficient is gradual in the height direction of the sealing resin layer. This alleviates the concentration of stress due to temperature changes. As a result, it is possible to suppress the decrease in reliability due to the temperature change.
  • FIG. 1 is a cross-sectional view of the electronic component according to the first embodiment and a graph showing the volume density of the filler.
  • FIG. 2A is a chart showing particle sizes and densities of two types of fillers used in the electronic component according to the first embodiment and its modification
  • FIG. 2B is a chart used for the electronic component according to the first embodiment
  • FIG. 2C is a graph showing an example of the particle size distribution of the entire filler dispersed in the sealing resin layer of the electronic component according to the first embodiment.
  • FIG. 2D is a schematic view of particles constituting two types of fillers used in the electronic component according to the first modification of the first embodiment.
  • FIG. 3 is a cross-sectional view of the electronic component according to the second embodiment and a graph showing the volume density of the filler.
  • FIG. 4 is a graph showing the distribution of the volume density of the filler contained in the sealing resin layer of the electronic component according to the third embodiment and the distribution of the thermal conductivity.
  • FIG. 1 is a cross-sectional view of the electronic component according to the first embodiment and a graph showing the distribution of the volume density of the filler.
  • the electronic component according to the first embodiment includes a substrate 10, a semiconductor chip 20 mounted on the substrate 10, and a sealing resin layer 30 for sealing the semiconductor chip 20.
  • the substrate 10 is, for example, a package substrate (interposer).
  • the semiconductor chip 20 is, for example, a power amplifier in which a hetero bipolar transistor (HBT) is formed on a GaAs substrate.
  • HBT hetero bipolar transistor
  • the semiconductor chip 20 is flip chip bonded to the substrate 10 face down.
  • the semiconductor chip 20 includes a heterobipolar transistor (HBT) 21 formed on the surface facing the substrate 10, and is mechanically fixed to and electrically connected to the substrate 10 via the plurality of bumps 22.
  • the sealing resin layer 30 is filled between the substrate 10 and the semiconductor chip 20 and disposed on the substrate 10 and the semiconductor chip 20 around the semiconductor chip 20.
  • the sealing resin layer 30 contains a binder and two types of fillers dispersed in the binder.
  • the two types of fillers are composed of a plurality of minute particles. Materials of the same composition are used for the two types of fillers, and the average particle size of one filler is different from the average particle size of the other filler.
  • the filler material for example, ZnO, TiO 2 , FeO 2 , Fe 2 O 3 , Si 3 N 4 , GaN, TiN, InGaN, AlN, BN, Al 2 O 3 , MgO, SiO 2 , Mg (OH) 2 etc.
  • Inorganic compounds can be used.
  • inorganic compounds used as the material of the filler do not necessarily have to be in the state of stoichiometry, and may be in the state of non-stoichiometry.
  • an epoxy resin, a phenol resin or the like can be used as the binder.
  • the particle size of the filler When the particle size of the filler is too small, the viscosity of the binder is increased, and the coating property, the filling property and the like are reduced. If the particle size of the filler is too large, the yield is likely to be reduced due to filler attack. In consideration of these, it is preferable to set the particle size of the filler to 0.1 ⁇ m or more and 25 ⁇ m or less. For example, a filler having an average particle diameter of 1 ⁇ m and a filler having an average particle diameter of 10 ⁇ m may be used.
  • the graph on the right side of the cross-sectional view of the electronic component according to the first example shows an example of the distribution of the volume density of the filler in the sealing resin layer 30 in the height direction.
  • the horizontal axis represents the volume density of the filler
  • the vertical axis represents the height based on the upper surface of the substrate 10.
  • volume density of filler means the mass of the filler per unit volume of the sealing resin layer 30.
  • the thin solid line in the graph indicates the volume density of one filler, the broken line indicates the volume density of the other filler, and the thick solid line indicates the total volume density of the two types of fillers.
  • the volume density of one filler gradually decreases from the substrate 10 upward, and the volume density of the other filler gradually increases from the substrate 10 upward.
  • the distribution of the volume density of one filler is biased to the lower region inside the sealing resin layer 30 as compared with the distribution of the volume density of the other filler.
  • the sealing resin layer 30 includes a region in which two types of fillers are mixed in at least a part in the height direction. The total volume density of the two types of fillers gradually decreases from the substrate 10 upward.
  • Two types of fillers are dispersed in the binder resin before curing to prepare a sealing resin. Further, the semiconductor chip 20 is flip-chip bonded to the substrate 10 face down. The substrate 10 on which the semiconductor chip 20 is mounted is mounted on a resin molding die. Thereafter, the sealing resin in which the filler is dispersed is poured into a mold and then cured to form the sealing resin layer 30.
  • the substrate 10 When the sealing resin is poured into the mold, the substrate 10 is substantially horizontal and the semiconductor chip 20 is maintained above the substrate 10. Thus, gravity acts in the direction from the semiconductor chip 20 toward the substrate 10.
  • the density of the inorganic filler is higher than the density of the binder resin such as epoxy. For this reason, the filler tends to stagnate downward in the binder resin before curing.
  • the two types of fillers are not uniformly mixed because they are affected by gravity.
  • the distribution of volume density as shown in the graph of FIG. 1 is generated. For example, relatively large fillers accumulate below, and small fillers enter the gaps. The placement of the remaining small fillers above the large fillers results in the volume density distribution shown in the graph of FIG.
  • the thermal conductivity of the sealing resin layer 30 is higher as the volume density of the filler contained is larger. Further, since the semiconductor chip 20 is mounted face down, a heat generation area such as the HBT 21 exists on the surface facing the substrate 10 side.
  • the volume density of the filler is higher in the part on the substrate 10 side in the sealing resin layer 30 than in the part on the upper surface side of the sealing resin layer 30. The heat generated in the heat generation region is transmitted to the substrate 10 through the region where the thermal conductivity of the sealing resin layer 30 is relatively high, whereby the heat dissipation can be enhanced.
  • the volume density of the filler is lower in the portion on the upper surface side of the sealing resin layer 30 compared to the portion on the substrate 10 side, the total amount of filler can be reduced compared to the case where the filler is dispersed almost uniformly. it can. As a result, costs can be reduced.
  • the volume density of the filler in the sealing resin layer 30 When the volume density of the filler in the sealing resin layer 30 is different, a difference occurs in the thermal expansion coefficient.
  • the volume density of the fillers gradually increases in the height direction in the sealing resin layer 30. Change. That is, no clear interface is formed between the regions where the volume density of the filler is different. Therefore, the concentration of stress on the interface due to the difference in the thermal expansion coefficient is alleviated. As a result, peeling or the like of the resin layer at the interface is less likely to occur, and a decrease in reliability due to a temperature change can be suppressed.
  • the average filling ratio of the filler in the sealing resin layer 30 in order to obtain a sufficient effect of improving the thermal conductivity by the filler, it is preferable to set the average filling ratio of the filler in the sealing resin layer 30 to 30% by weight or more. Further, in order to obtain a sufficient effect of sealing the semiconductor chip 20, the average filling rate of the filler is preferably 70% by weight or less.
  • the “filling ratio” means the ratio of the mass of the filler to the total mass per unit volume of the sealing resin layer 30.
  • FIG. 2A is a chart showing average particle sizes and densities of two types of fillers used in the electronic component according to the first embodiment and its modification.
  • the two types of fillers those having the same density and different average particle sizes were used.
  • the first modification of the first embodiment two kinds of fillers having the same average particle diameter and different density are used. For example, when two types of fillers having different material compositions are used, the densities of the two types of fillers will be different.
  • two types of fillers having different densities and average particle sizes are used.
  • the two types of fillers those having different physical quantities of at least one of the average particle diameter and the density. By doing this, it is possible to obtain an electronic component having a configuration in which the volume density of the filler in the sealing resin layer 30 gradually decreases upward from the substrate 10 (FIG. 1).
  • FIG. 2B is a schematic view of particles constituting each of two types of fillers.
  • the average particle size of the filler having a large average particle size is represented by PS1
  • the average particle size of the filler having a small average particle size is represented by PS2. If the difference between the average particle sizes of the two types of fillers is too small, a sufficient effect of dispersing the two types of fillers in the sealing resin layer 30 can not be obtained. In order to obtain sufficient effects, it is preferable to set the average particle size PS2 to 0.5 times or less of the average particle size PS1.
  • the filler resin having a small average particle diameter can enter the gaps of the large filler, thereby forming a sealing resin layer.
  • the effect of gradually changing the volume density of the filler in 30 is easily obtained.
  • FIG. 2C is a graph showing an example of the frequency distribution of the particle diameter of the entire filler dispersed in the sealing resin layer 30 of the electronic component according to the first embodiment.
  • the horizontal axis represents particle size
  • the vertical axis represents the number of fillers. Peaks of frequency distribution appear in the range where the particle diameter is relatively small and the range where the particle diameter is relatively large.
  • the sealing resin layer 30 includes two types of fillers having different particle diameters.
  • the part of the foot of two mountains may mutually overlap. Even in this case, when two peaks separated from each other appear, it can be said that the sealing resin layer 30 contains two types of fillers.
  • the graph of the frequency distribution shown in FIG. 2C does not necessarily have to cover all the fillers contained in the sealing resin layer 30.
  • the frequency distribution of the particle sizes of a plurality of fillers located at the height at which two types of fillers are mixed may be obtained. Also in this case, when two peaks separated from each other appear, it can be said that the sealing resin layer 30 contains two types of fillers.
  • FIG. 2D is a schematic view of particles constituting each of two types of fillers.
  • the average particle sizes of the two types of fillers are equal.
  • the density of the higher density filler is represented by PD1
  • the density of the lower density filler is represented by PD2.
  • the density of the filler means the density of the material of each particle. Since different particle materials usually cause different particle densities, it can be said that in the first modification of the first embodiment, two types of fillers different in material are dispersed in the binder of the sealing resin layer 30.
  • the volume density of the filler in the region on the substrate 10 (FIG. 1) side in the sealing resin layer 30 is the region on the upper surface A distribution occurs that is higher than the volume density of the filler. Thereby, the distribution of the volume density shown in the graph of FIG. 1 is obtained.
  • the difference in density between the two types of fillers is small, a sufficient effect of dispersing the two types of fillers in the sealing resin layer 30 can not be obtained.
  • the average mass of the heavier filler is at least 120 times the average value of the average mass of the lighter fillers. It is preferable to Here, "the average mass of the filler” means an average value of the mass of each of the plurality of particles constituting the filler. By providing a difference of 120 times or more in the average mass, a sufficient effect of dispersing the two types of fillers in the sealing resin layer 30 can be obtained.
  • FIG. 3 is a cross-sectional view of the electronic component according to the second embodiment and a graph showing the volume density of the filler.
  • two types of fillers having different average particle diameter and / or density are dispersed in the sealing resin layer 30, but in the second embodiment, three types of fillers are dispersed.
  • the first type of filler is mainly accumulated downward
  • the third type of filler is mainly accumulated upward
  • the second filler is mainly accumulated in the center.
  • the volume density of the entire filler gradually decreases from the substrate 10 upward. For this reason, the same effect as that of the first embodiment can be obtained.
  • the type of filler dispersed in the sealing resin layer 30 may be four or more. By increasing the types of fillers to be dispersed in the sealing resin layer 30, the degree of freedom of distribution of the volume density of the fillers can be enhanced.
  • the volume density of the filler was lowered from the substrate 10 upward.
  • the volume density of the filler does not necessarily have to be such a distribution.
  • FIG. 4 is a graph showing the distribution of the volume density of the filler contained in the sealing resin layer 30 (FIG. 1) of the electronic component according to the third embodiment and the distribution of the thermal conductivity.
  • the horizontal axis represents the position in the height direction from the upper surface of the substrate 10, the left vertical axis represents the volume density, and the right vertical axis represents the thermal conductivity.
  • two types of fillers are contained in the sealing resin layer 30 as in the case of the first embodiment.
  • the thickest solid line in the graph indicates the volume density of the entire filler
  • the second thick solid line indicates the volume density of one filler
  • the thinnest solid line indicates the volume density of the other filler.
  • One filler is mainly distributed at a relatively low position
  • the other filler is mainly distributed at a relatively high position.
  • the total volume density of the two types of fillers is substantially constant regardless of height.
  • the thermal conductivity of one filler distributed mainly at a relatively low position is higher than the thermal conductivity of the other filler distributed mainly at a relatively higher position.
  • the broken line in the graph of FIG. 4 represents the thermal conductivity of the sealing resin layer 30 (FIG. 1) containing the binder and the filler.
  • the filler having a relatively high thermal conductivity is mainly distributed at a relatively low position, and the filler having a relatively low thermal conductivity is mainly distributed at a relatively high position.
  • the volume density of the filler is constant regardless of the height. Therefore, the thermal conductivity of the sealing resin layer 30 decreases from the lower side to the upper side.
  • the heat generated in the heat generating area of the semiconductor chip 20 (FIG. 1) is preferentially conducted to the substrate 10 via the area of high thermal conductivity below the sealing resin layer 30. Therefore, as in the case of the first embodiment, the heat dissipation from the heat generating area can be enhanced.
  • hexagonal boron nitride (h-BN), alumina or the like can be used as a filler material having a relatively high thermal conductivity.
  • Crystalline silica can be used as a filler material having a relatively low thermal conductivity.
  • the density of hexagonal boron nitride and the density of alumina are higher than the density of crystalline silica. Therefore, the filler made of hexagonal boron nitride or alumina can be distributed relatively downward, and the filler made of crystalline silica can be distributed relatively upward.
  • the total volume density of the two types of fillers is constant regardless of the height, but the volume density may have a distribution as in the first embodiment.
  • the distribution of the volume density of the filler having a relatively high thermal conductivity may be biased downward relative to the distribution of the volume density of a filler having a relatively low thermal conductivity. With such a distribution, the thermal conductivity of the region under the sealing resin layer 30 can be made higher than the thermal conductivity of the upper region.
  • the sealing resin layer 30 is used to seal the entire surface below, to the side, and above the semiconductor chip 20, but from the bottom and the side And the top surface may be exposed.

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
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Abstract

[PROBLEM] To provide an electronic component that causes hardly any deterioration in reliability while maintaining thermal conductivity. [SOLUTION] According to the present invention, a semiconductor chip is mounted on a substrate. An encapsulating resin layer encapsulates the semiconductor chip. The encapsulating resin layer includes a binder, and two kinds of fillers composed of a plurality of particles that are dispersed in the binder. As the two kinds of fillers, fillers having different physical quantities of at least one among average particle diameter and density are used. The volume density of the fillers in the encapsulating resin layer decreases progressively from the substrate toward the upper side, and a portion in the height direction of the encapsulating resin layer includes a region in which the two kinds of fillers are mixed.

Description

電子部品Electronic parts
　本発明は、基板に実装された半導体チップが封止樹脂によって封止された電子部品に関する。 The present invention relates to an electronic component in which a semiconductor chip mounted on a substrate is sealed by a sealing resin.
　基板、基板に実装された半導体チップ、及び半導体チップを封止する封止樹脂層を含む電子部品が公知である（特許文献１）。特許文献１に開示された電子部品は、基板及び電子デバイスと接触するように樹脂シートを積層して形成される。樹脂シートの積層には、熱プレスやラミネータ等の方法が用いられる。 There is known an electronic component including a substrate, a semiconductor chip mounted on the substrate, and a sealing resin layer for sealing the semiconductor chip (Patent Document 1). The electronic component disclosed in Patent Document 1 is formed by laminating resin sheets in contact with a substrate and an electronic device. For laminating the resin sheets, a method such as a heat press or a laminator is used.
　樹脂シートは、第１の樹脂層と第２の樹脂層とに分かれている。第１の樹脂層は熱伝導粒子を含んでおり、熱伝導率が１Ｗ／ｍＫ以上になるように設計される。第２の樹脂層はフィラーを含むことが好ましい。このフィラーは、第２の樹脂層の線膨張係数を良好に低減させる効果を持つ。第１の樹脂層が基板及び電子デバイスに接する。第１の樹脂層が高熱伝導率を有するため、電子デバイスで発生した熱を基板に逃がすことができる。 The resin sheet is divided into a first resin layer and a second resin layer. The first resin layer contains heat conductive particles, and is designed to have a thermal conductivity of 1 W / mK or more. The second resin layer preferably contains a filler. This filler has the effect of favorably reducing the linear expansion coefficient of the second resin layer. The first resin layer contacts the substrate and the electronic device. Since the first resin layer has high thermal conductivity, heat generated in the electronic device can be released to the substrate.
特開２０１５－３５５６７号公報JP, 2015-35567, A
　特許文献１に開示された電子部品では、第１の樹脂層と第２の樹脂層との間に明確な界面が形成される。第１の樹脂層と第２の樹脂層との熱膨張係数が異なる場合、両者の界面に熱膨張係数の差に起因して応力が発生する。第１の樹脂層と第２の樹脂層との界面に応力が集中するため、第１の樹脂層と第２の樹脂層とを含む封止樹脂層が熱履歴に対して脆弱になり、信頼性の低下につながる。 In the electronic component disclosed in Patent Document 1, a clear interface is formed between the first resin layer and the second resin layer. When the thermal expansion coefficients of the first resin layer and the second resin layer are different, stress is generated at the interface between the two due to the difference in the thermal expansion coefficient. Since the stress is concentrated at the interface between the first resin layer and the second resin layer, the sealing resin layer including the first resin layer and the second resin layer becomes fragile to the heat history, and the reliability It leads to the decrease of sex.
　本発明の目的は、熱伝導性を維持しつつ、信頼性の低下を生じにくい電子部品を提供することである。 An object of the present invention is to provide an electronic component which is less likely to cause a decrease in reliability while maintaining thermal conductivity.
　本発明の一観点による電子部品は、
　基板と、
　前記基板に実装された半導体チップと、
　前記半導体チップを封止する封止樹脂層と
を有し、
　前記封止樹脂層は、
　バインダと、
　前記バインダ内に分散された複数の粒子で構成され、平均粒径及び密度の少なくとも一方の物理量が異なる少なくとも２種類のフィラーと
を含み、
　前記封止樹脂層内における前記フィラーの体積密度が、前記基板から上方に向かって低下しており、前記封止樹脂層の高さ方向の一部に、２種類の前記フィラーが混在する領域を含む。 An electronic component according to one aspect of the present invention is
A substrate,
A semiconductor chip mounted on the substrate;
And a sealing resin layer for sealing the semiconductor chip,
The sealing resin layer is
With a binder,
And at least two types of fillers composed of a plurality of particles dispersed in the binder and having different physical quantities of at least one of average particle diameter and density,
The volume density of the filler in the sealing resin layer is lowered upward from the substrate, and a region in which two types of the filler are mixed in a part in the height direction of the sealing resin layer is obtained. Including.
　一般的には、フィラーの熱伝導率はバインダ樹脂の熱伝導率より高い。このため、半導体チップで発生した熱は、バインダ樹脂よりもフィラーを通って伝導される傾向が高い。封止樹脂層内におけるフィラーの体積密度が、基板から上方に向かって低下しているため、半導体チップで発生した熱が基板側に優先的に伝達される。また、封止樹脂層が、２種類のフィラーが混在する領域を含んでいるため、封止樹脂層の高さ方向に関して熱膨張率の変化が緩やかになる。これにより、温度変化による応力の集中が緩和される。その結果、温度変化による信頼性の低下を抑制することができる。 Generally, the thermal conductivity of the filler is higher than the thermal conductivity of the binder resin. For this reason, the heat generated in the semiconductor chip is more likely to be conducted through the filler than the binder resin. Since the volume density of the filler in the sealing resin layer is lowered from the substrate upward, the heat generated in the semiconductor chip is preferentially transferred to the substrate side. In addition, since the sealing resin layer includes the region in which the two types of fillers are mixed, the change in the thermal expansion coefficient is gradual in the height direction of the sealing resin layer. This alleviates the concentration of stress due to temperature changes. As a result, it is possible to suppress the decrease in reliability due to the temperature change.
図１は、第１実施例による電子部品の断面図及びフィラーの体積密度を示すグラフである。FIG. 1 is a cross-sectional view of the electronic component according to the first embodiment and a graph showing the volume density of the filler. 図２Ａは、第１実施例及びその変形例による電子部品に用いられる２種類のフィラーの粒径及び密度を示す図表であり、図２Ｂは、第１実施例による電子部品に用いられている２種類のフィラーをそれぞれ構成する粒子の模式図であり、図２Ｃは、第１実施例による電子部品の封止樹脂層内に分散されている全体のフィラーの粒径の分布の一例を示すグラフであり、図２Ｄは、第１実施例の第１変形例による電子部品に用いられている２種類のフィラーをそれぞれ構成する粒子の模式図である。FIG. 2A is a chart showing particle sizes and densities of two types of fillers used in the electronic component according to the first embodiment and its modification, and FIG. 2B is a chart used for the electronic component according to the first embodiment FIG. 2C is a graph showing an example of the particle size distribution of the entire filler dispersed in the sealing resin layer of the electronic component according to the first embodiment. FIG. 2D is a schematic view of particles constituting two types of fillers used in the electronic component according to the first modification of the first embodiment. 図３は、第２実施例による電子部品の断面図及びフィラーの体積密度を示すグラフである。FIG. 3 is a cross-sectional view of the electronic component according to the second embodiment and a graph showing the volume density of the filler. 図４は、第３実施例による電子部品の封止樹脂層に含まれるフィラーの体積密度の分布、及び熱伝導率の分布を示すグラフである。FIG. 4 is a graph showing the distribution of the volume density of the filler contained in the sealing resin layer of the electronic component according to the third embodiment and the distribution of the thermal conductivity.
　［第１実施例］
　図１から図２Ｄまでの図面を参照して、第１実施例による電子部品について説明する。
　図１は、第１実施例による電子部品の断面図及びフィラーの体積密度の分布を示すグラフである。第１実施例による電子部品は、基板１０、基板１０に実装された半導体チップ２０、及び半導体チップ２０を封止する封止樹脂層３０を含む。基板１０は、例えばパッケージ基板（インターポーザ）である。半導体チップ２０は、例えばＧａＡｓ基板にヘテロバイポーラトランジスタ（ＨＢＴ）が形成されたパワーアンプである。 [First embodiment]
An electronic component according to a first embodiment will be described with reference to the drawings in FIGS. 1 to 2D.
FIG. 1 is a cross-sectional view of the electronic component according to the first embodiment and a graph showing the distribution of the volume density of the filler. The electronic component according to the first embodiment includes a substrate 10, a semiconductor chip 20 mounted on the substrate 10, and a sealing resin layer 30 for sealing the semiconductor chip 20. The substrate 10 is, for example, a package substrate (interposer). The semiconductor chip 20 is, for example, a power amplifier in which a hetero bipolar transistor (HBT) is formed on a GaAs substrate.
　半導体チップ２０は、フェースダウンで基板１０にフリップチップボンディングされている。例えば、半導体チップ２０は基板１０に対向する表面に形成されたヘテロバイポーラトランジスタ（ＨＢＴ）２１を含み、複数のバンプ２２を介して基板１０に機械的に固定されるとともに、電気的に接続される。封止樹脂層３０は、基板１０と半導体チップ２０との間に充填されるとともに、半導体チップ２０の周囲の基板１０の上及び半導体チップ２０の上に配置されている。 The semiconductor chip 20 is flip chip bonded to the substrate 10 face down. For example, the semiconductor chip 20 includes a heterobipolar transistor (HBT) 21 formed on the surface facing the substrate 10, and is mechanically fixed to and electrically connected to the substrate 10 via the plurality of bumps 22. . The sealing resin layer 30 is filled between the substrate 10 and the semiconductor chip 20 and disposed on the substrate 10 and the semiconductor chip 20 around the semiconductor chip 20.
　封止樹脂層３０は、バインダ及びバインダ内に分散された２種類のフィラーを含む。２種類のフィラーは、複数の微小な粒子で構成される。２種類のフィラーには同一組成の材料が用いられ、一方のフィラーの平均粒径と、他方のフィラーの平均粒径とが異なる。フィラーの材料として、例えばＺｎＯ、ＴｉＯ２、ＦｅＯ２、Ｆｅ２Ｏ３、Ｓｉ３Ｎ４、ＧａＮ、ＴｉＮ、ＩｎＧａＮ、ＡｌＮ、ＢＮ、Ａｌ２Ｏ３、ＭｇＯ、ＳｉＯ２、Ｍｇ（ＯＨ）２等の無機化合物を用いることができる。フィラーの材料として用いるこれらの無機化合物は、必ずしもストイキオメトリの状態である必要は無く、ノンストイキオメトリの状態であってもよい。バインダには、例えばエポキシ樹脂、フェノール樹脂等を用いることができる。 The sealing resin layer 30 contains a binder and two types of fillers dispersed in the binder. The two types of fillers are composed of a plurality of minute particles. Materials of the same composition are used for the two types of fillers, and the average particle size of one filler is different from the average particle size of the other filler. As the filler material, for example, ZnO, TiO 2 , FeO 2 , Fe 2 O 3 , Si 3 N 4 , GaN, TiN, InGaN, AlN, BN, Al 2 O 3 , MgO, SiO 2 , Mg (OH) 2 etc. Inorganic compounds can be used. These inorganic compounds used as the material of the filler do not necessarily have to be in the state of stoichiometry, and may be in the state of non-stoichiometry. For example, an epoxy resin, a phenol resin or the like can be used as the binder.
　フィラーの粒径が小さすぎるとバインダの粘度が高くなり、塗布性、充填性等が低下する。フィラーの粒径が大きすぎると、フィラーアタックによる歩留まりの低下が生じやすくなる。これらを考慮して、フィラーの粒径を０．１μｍ以上２５μｍ以下とすることが好ましい。例えば、平均粒径が１μｍのフィラーと、平均粒径が１０μｍのフィラーとを用いるとよい。 When the particle size of the filler is too small, the viscosity of the binder is increased, and the coating property, the filling property and the like are reduced. If the particle size of the filler is too large, the yield is likely to be reduced due to filler attack. In consideration of these, it is preferable to set the particle size of the filler to 0.1 μm or more and 25 μm or less. For example, a filler having an average particle diameter of 1 μm and a filler having an average particle diameter of 10 μm may be used.
　第１実施例による電子部品の断面図の右側のグラフは、封止樹脂層３０内における高さ方向に関するフィラーの体積密度の分布の一例を示す。横軸はフィラーの体積密度を表し、縦軸は基板１０の上面を基準としたときの高さを表す。ここで、「フィラーの体積密度」は、封止樹脂層３０の単位体積あたりのフィラーの質量を意味する。グラフ中の細い実線は、一方のフィラーの体積密度を示し、破線は他方のフィラーの体積密度を示し、太い実線は２種類のフィラーの合計の体積密度を示す。 The graph on the right side of the cross-sectional view of the electronic component according to the first example shows an example of the distribution of the volume density of the filler in the sealing resin layer 30 in the height direction. The horizontal axis represents the volume density of the filler, and the vertical axis represents the height based on the upper surface of the substrate 10. Here, “volume density of filler” means the mass of the filler per unit volume of the sealing resin layer 30. The thin solid line in the graph indicates the volume density of one filler, the broken line indicates the volume density of the other filler, and the thick solid line indicates the total volume density of the two types of fillers.
　一方のフィラーの体積密度は、基板１０から上方に向かって徐々に低下し、他方のフィラーの体積密度は、基板１０から上方に向かって徐々に増加している。このように、一方のフィラーの体積密度の分布が、他方のフィラーの体積密度の分布と比べて、封止樹脂層３０の内部の下方の領域に偏っている。封止樹脂層３０は、高さ方向の少なくとも一部に、２種類のフィラーが混在する領域を含んでいる。２種類のフィラーの合計の体積密度は、基板１０から上方に向かって徐々に低下している。 The volume density of one filler gradually decreases from the substrate 10 upward, and the volume density of the other filler gradually increases from the substrate 10 upward. Thus, the distribution of the volume density of one filler is biased to the lower region inside the sealing resin layer 30 as compared with the distribution of the volume density of the other filler. The sealing resin layer 30 includes a region in which two types of fillers are mixed in at least a part in the height direction. The total volume density of the two types of fillers gradually decreases from the substrate 10 upward.
　次に、第１実施例による電子部品の製造方法について説明する。硬化前のバインダ樹脂に２種類のフィラーを分散させて封止用樹脂を準備する。さらに、基板１０に半導体チップ２０をフェースダウンでフリップチップボンディングする。半導体チップ２０が実装された基板１０を樹脂成形用の金型に装着する。その後、フィラーを分散させた封止用樹脂を金型内に流し込み、その後硬化させることにより、封止樹脂層３０を形成する。 Next, a method of manufacturing the electronic component according to the first embodiment will be described. Two types of fillers are dispersed in the binder resin before curing to prepare a sealing resin. Further, the semiconductor chip 20 is flip-chip bonded to the substrate 10 face down. The substrate 10 on which the semiconductor chip 20 is mounted is mounted on a resin molding die. Thereafter, the sealing resin in which the filler is dispersed is poured into a mold and then cured to form the sealing resin layer 30.
　封止用樹脂を金型内に流し込むとき、基板１０がほぼ水平で、半導体チップ２０が基板１０の上方に位置する姿勢を維持する。これにより、半導体チップ２０から基板１０に向かう方向に重力が作用する。一般的に、無機フィラーの密度は、エポキシ等のバインダ樹脂の密度より高い。このため、フィラーは硬化前のバインダ樹脂内で下方に溜まる傾向を示す。硬化前の封止用樹脂が金型内に流れ込んだ状態で、２種類のフィラーは、重力の影響を受けるため均一に混ざることはない。その結果、図１のグラフに示したような体積密度の分布が生じる。例えば、相対的に大きなフィラーが下方に溜まり、その隙間に小さなフィラーが入り込む。残余の小さなフィラーが大きなフィラーの上方に配置されることにより、図１のグラフに示した体積密度分布が生じる。 When the sealing resin is poured into the mold, the substrate 10 is substantially horizontal and the semiconductor chip 20 is maintained above the substrate 10. Thus, gravity acts in the direction from the semiconductor chip 20 toward the substrate 10. Generally, the density of the inorganic filler is higher than the density of the binder resin such as epoxy. For this reason, the filler tends to stagnate downward in the binder resin before curing. In a state where the sealing resin before curing flows into the mold, the two types of fillers are not uniformly mixed because they are affected by gravity. As a result, the distribution of volume density as shown in the graph of FIG. 1 is generated. For example, relatively large fillers accumulate below, and small fillers enter the gaps. The placement of the remaining small fillers above the large fillers results in the volume density distribution shown in the graph of FIG.
　次に、第１実施例による電子部品が有する優れた効果について説明する。
　一般に、含有されるフィラーの体積密度が大きいほど、封止樹脂層３０の熱伝導率が高くなることが知られている。また、半導体チップ２０がフェースダウンで実装されているため、基板１０側を向く面にＨＢＴ２１等の発熱領域が存在する。第１実施例においては、封止樹脂層３０内において基板１０側の部分の方が封止樹脂層３０の上面側の部分よりフィラーの体積密度が高い。発熱領域で発生した熱が、封止樹脂層３０の熱伝導率が相対的に高い領域を通って基板１０に伝達されることにより、放熱性を高めることができる。 Next, excellent effects of the electronic component according to the first embodiment will be described.
In general, it is known that the thermal conductivity of the sealing resin layer 30 is higher as the volume density of the filler contained is larger. Further, since the semiconductor chip 20 is mounted face down, a heat generation area such as the HBT 21 exists on the surface facing the substrate 10 side. In the first embodiment, the volume density of the filler is higher in the part on the substrate 10 side in the sealing resin layer 30 than in the part on the upper surface side of the sealing resin layer 30. The heat generated in the heat generation region is transmitted to the substrate 10 through the region where the thermal conductivity of the sealing resin layer 30 is relatively high, whereby the heat dissipation can be enhanced.
　また、封止樹脂層３０の上面側の部分では、基板１０側の部分と比べてフィラーの体積密度が低いため、フィラーをほぼ均一に分散させる場合に比べて、フィラーの総量を少なくすることができる。その結果、コスト削減を図ることが可能になる。 In addition, since the volume density of the filler is lower in the portion on the upper surface side of the sealing resin layer 30 compared to the portion on the substrate 10 side, the total amount of filler can be reduced compared to the case where the filler is dispersed almost uniformly. it can. As a result, costs can be reduced.
　封止樹脂層３０内のフィラーの体積密度が異なると、熱膨張率に差が生じる。第１実施例では、封止樹脂層３０の高さ方向の一部の領域に、２種類のフィラーが混在することにより、フィラーの体積密度が封止樹脂層３０内において高さ方向に徐々に変化する。すなわち、フィラーの体積密度が異なる領域の間の明確な界面が形成されない。このため、熱膨張率の差に起因する界面への応力の集中が緩和される。これにより、界面における樹脂層の剥がれ等が生じにくくなり、温度変化による信頼性の低下を抑制することができる。 When the volume density of the filler in the sealing resin layer 30 is different, a difference occurs in the thermal expansion coefficient. In the first embodiment, by mixing two types of fillers in a partial region in the height direction of the sealing resin layer 30, the volume density of the fillers gradually increases in the height direction in the sealing resin layer 30. Change. That is, no clear interface is formed between the regions where the volume density of the filler is different. Therefore, the concentration of stress on the interface due to the difference in the thermal expansion coefficient is alleviated. As a result, peeling or the like of the resin layer at the interface is less likely to occur, and a decrease in reliability due to a temperature change can be suppressed.
　第１実施例において、フィラーによる熱伝導率向上の十分な効果を得るために、封止樹脂層３０内におけるフィラーの平均の充填率を３０重量％以上とすることが好ましい。また、半導体チップ２０を封止する十分な効果を得るために、フィラーの平均の充填率を７０重量％以下とすることが好ましい。ここで、「充填率」は、封止樹脂層３０の単位体積当たりの全質量に対するフィラーの質量の割合を意味する。 In the first embodiment, in order to obtain a sufficient effect of improving the thermal conductivity by the filler, it is preferable to set the average filling ratio of the filler in the sealing resin layer 30 to 30% by weight or more. Further, in order to obtain a sufficient effect of sealing the semiconductor chip 20, the average filling rate of the filler is preferably 70% by weight or less. Here, the “filling ratio” means the ratio of the mass of the filler to the total mass per unit volume of the sealing resin layer 30.
　図２Ａは、第１実施例及びその変形例による電子部品に用いられる２種類のフィラーの平均粒径及び密度を示す図表である。第１実施例では、２種類のフィラーとして、密度が同一で、平均粒径の異なるものを用いた。第１実施例の第１変形例では、２種類のフィラーとして、平均粒径が同一で、密度の異なるものを用いる。例えば、２種類のフィラーとして、材料の組成の異なるものを用いると、２種類のフィラーの密度が異なるようになる。第１実施例の第２変形例では、２種類のフィラーとして、密度及び平均粒径の両方が異なるものを用いる。 FIG. 2A is a chart showing average particle sizes and densities of two types of fillers used in the electronic component according to the first embodiment and its modification. In the first embodiment, as the two types of fillers, those having the same density and different average particle sizes were used. In the first modification of the first embodiment, two kinds of fillers having the same average particle diameter and different density are used. For example, when two types of fillers having different material compositions are used, the densities of the two types of fillers will be different. In the second modification of the first embodiment, two types of fillers having different densities and average particle sizes are used.
　第１実施例、その第１変形例及び第２変形例のように、２種類のフィラーとして、平均粒径及び密度の少なくとも一方の物理量が異なるものを用いるとよい。このようにすることで、封止樹脂層３０内におけるフィラーの体積密度が、基板１０（図１）から上方に向かって徐々に低下する構成を持つ電子部品を得ることができる。 As in the first embodiment and its first and second modifications, it is preferable to use, as the two types of fillers, those having different physical quantities of at least one of the average particle diameter and the density. By doing this, it is possible to obtain an electronic component having a configuration in which the volume density of the filler in the sealing resin layer 30 gradually decreases upward from the substrate 10 (FIG. 1).
　次に、図２Ｂを参照して、第１実施例による電子部品に用いられる２種類のフィラーの平均粒径について説明する。 Next, referring to FIG. 2B, average particle sizes of two types of fillers used in the electronic component according to the first embodiment will be described.
　図２Ｂは、２種類のフィラーのそれぞれを構成する粒子の模式図である。平均粒径が大きなフィラーの平均粒径をＰＳ１で表し、平均粒径が小さなフィラーの平均粒径をＰＳ２で表す。２種類のフィラーの平均粒径の差が小さすぎると、封止樹脂層３０に２種類のフィラーを分散させる十分な効果が得られない。十分な効果を得るために、平均粒径ＰＳ２を平均粒径ＰＳ１の０．５倍以下にすることが好ましい。 FIG. 2B is a schematic view of particles constituting each of two types of fillers. The average particle size of the filler having a large average particle size is represented by PS1, and the average particle size of the filler having a small average particle size is represented by PS2. If the difference between the average particle sizes of the two types of fillers is too small, a sufficient effect of dispersing the two types of fillers in the sealing resin layer 30 can not be obtained. In order to obtain sufficient effects, it is preferable to set the average particle size PS2 to 0.5 times or less of the average particle size PS1.
　また、平均粒径の大きなフィラーを三次元空間内に最も稠密に充填（最密充填）したときに、平均粒径の小さなフィラーが大きなフィラーの隙間に侵入できる大きさにすると、封止樹脂層３０内におけるフィラーの体積密度を徐々に変化させる効果が得られやすい。最密充填された大きなフィラーの隙間に小さなフィラーが侵入できるようにするために、平均粒径ＰＳ２を平均粒径ＰＳ１の０．２９倍以下にすることが好ましい。 In addition, when the filler having a large average particle diameter is most densely packed (close-packed) in a three-dimensional space, the filler resin having a small average particle diameter can enter the gaps of the large filler, thereby forming a sealing resin layer. The effect of gradually changing the volume density of the filler in 30 is easily obtained. In order to allow small fillers to penetrate into the gaps of the closely packed large fillers, it is preferable to set the average particle size PS2 to 0.29 or less of the average particle size PS1.
　図２Ｃは、第１実施例による電子部品の封止樹脂層３０内に分散されている全体のフィラーの粒径の度数分布の一例を示すグラフである。横軸は粒径を表し、縦軸はフィラーの個数を表す。相対的に粒径が小さな範囲と、相対的に粒径が大きな範囲とに、それぞれ度数分布の山が現れている。このように、粒径の度数分布に２つの山が現れる場合、粒径の異なる２種類のフィラーが封止樹脂層３０に含まれているといえる。なお、２種類のフィラーの粒径の差が小さい場合、またはフィラーの粒径のばらつきが大きい場合には、２つの山の裾野の部分が相互に重なる場合もある。この場合でも、相互に離れた２つの山が現れる場合には、封止樹脂層３０に２種類のフィラーが含まれているといえる。 FIG. 2C is a graph showing an example of the frequency distribution of the particle diameter of the entire filler dispersed in the sealing resin layer 30 of the electronic component according to the first embodiment. The horizontal axis represents particle size, and the vertical axis represents the number of fillers. Peaks of frequency distribution appear in the range where the particle diameter is relatively small and the range where the particle diameter is relatively large. As described above, when two peaks appear in the frequency distribution of the particle diameter, it can be said that the sealing resin layer 30 includes two types of fillers having different particle diameters. In addition, when the difference of the particle size of two types of fillers is small, or when the dispersion | variation in the particle size of a filler is large, the part of the foot of two mountains may mutually overlap. Even in this case, when two peaks separated from each other appear, it can be said that the sealing resin layer 30 contains two types of fillers.
　図２Ｃに示した度数分布のグラフは、必ずしも封止樹脂層３０に含まれているすべてのフィラーを対象にする必要はない。例えば、図１に示したフィラーの体積密度の分布を示すグラフにおいて、２種類のフィラーが混在している高さに位置する複数のフィラーの粒径の度数分布を求めてもよい。この場合にも、相互に離れた２つの山が現れる場合には、封止樹脂層３０に２種類のフィラーが含まれているといえる。 The graph of the frequency distribution shown in FIG. 2C does not necessarily have to cover all the fillers contained in the sealing resin layer 30. For example, in the graph showing the distribution of the volume density of the filler shown in FIG. 1, the frequency distribution of the particle sizes of a plurality of fillers located at the height at which two types of fillers are mixed may be obtained. Also in this case, when two peaks separated from each other appear, it can be said that the sealing resin layer 30 contains two types of fillers.
　次に、図２Ｄを参照して、第１実施例の第１変形例による電子部品に用いられる２種類のフィラーの密度について説明する。 Next, with reference to FIG. 2D, the densities of two types of fillers used in the electronic component according to the first modification of the first embodiment will be described.
　図２Ｄは、２種類のフィラーのそれぞれを構成する粒子の模式図である。２種類のフィラーの平均粒径は等しい。密度が大きい方のフィラーの密度をＰＤ１で表し、密度が小さい方のフィラーの密度をＰＤ２で表す。ここで、「フィラーの密度」は、各粒子の材料の密度を意味する。通常、粒子の材料が異なれば粒子の密度も異なるため、第１実施例の第１変形例では、材料が異なる２種類のフィラーが封止樹脂層３０のバインダ内に分散されているといえる。封止樹脂層３０が硬化する前に密度が大きい方のフィラーが下方に移動することにより、封止樹脂層３０内の基板１０（図１）側の領域のフィラーの体積密度が上面側の領域のフィラーの体積密度より高くなるような分布が生じる。これにより、図１のグラフに示した体積密度の分布が得られる。 FIG. 2D is a schematic view of particles constituting each of two types of fillers. The average particle sizes of the two types of fillers are equal. The density of the higher density filler is represented by PD1, and the density of the lower density filler is represented by PD2. Here, "the density of the filler" means the density of the material of each particle. Since different particle materials usually cause different particle densities, it can be said that in the first modification of the first embodiment, two types of fillers different in material are dispersed in the binder of the sealing resin layer 30. By moving the filler having the larger density downward before the sealing resin layer 30 cures, the volume density of the filler in the region on the substrate 10 (FIG. 1) side in the sealing resin layer 30 is the region on the upper surface A distribution occurs that is higher than the volume density of the filler. Thereby, the distribution of the volume density shown in the graph of FIG. 1 is obtained.
　２種類のフィラーの密度の差が小さいと、封止樹脂層３０内に２種類のフィラーを分散させる十分な効果が得られない。十分な効果を得るために、密度ＰＤ２を密度ＰＤ１の０．５倍以下にすることが好ましい。 If the difference in density between the two types of fillers is small, a sufficient effect of dispersing the two types of fillers in the sealing resin layer 30 can not be obtained. In order to obtain a sufficient effect, it is preferable to set the density PD2 to 0.5 times or less of the density PD1.
　第１実施例の第２変形例において、２種類のフィラーの平均粒径及び密度の両方を異ならせる場合、重い方のフィラーの平均質量を軽い方のフィラーの平均質量の平均値の１２０倍以上にすることが好ましい。ここで、「フィラーの平均質量」は、フィラーを構成する複数の粒子の各々の質量の平均値を意味する。平均質量に１２０倍以上の差を設けることにより、封止樹脂層３０内に２種類のフィラーを分散させることの十分な効果を得ることができる。 In the second modification of the first embodiment, when both of the average particle diameter and density of the two types of fillers are made different, the average mass of the heavier filler is at least 120 times the average value of the average mass of the lighter fillers. It is preferable to Here, "the average mass of the filler" means an average value of the mass of each of the plurality of particles constituting the filler. By providing a difference of 120 times or more in the average mass, a sufficient effect of dispersing the two types of fillers in the sealing resin layer 30 can be obtained.
　［第２実施例］
　次に、図３を参照して第２実施例による電子部品について説明する。以下、第１実施例による電子部品と共通の構成については説明を省略する。 Second Embodiment
Next, an electronic component according to the second embodiment will be described with reference to FIG. Hereinafter, the description of the same configuration as the electronic component according to the first embodiment will be omitted.
　図３は、第２実施例による電子部品の断面図及びフィラーの体積密度を示すグラフである。第１実施例では、封止樹脂層３０内に平均粒径及び密度の少なくとも一方が異なる２種類のフィラーが分散されていたが、第２実施例では３種類のフィラーが分散されている。例えば、第１の種類のフィラーが主として下方に蓄積され、第３の種類のフィラーが主として上方に蓄積され、第２のフィラーが主として中央部に蓄積される。第１実施例の場合と同様に、全体のフィラーの体積密度は基板１０から上方に向かって徐々に低下している。このため、第１実施例の場合と同様の効果が得られる。なお、封止樹脂層３０内分散させるフィラーの種類を４種類以上にしてもよい。封止樹脂層３０内に分散させるフィラーの種類を増やすことにより、フィラーの体積密度の分布の自由度を高めることができる。 FIG. 3 is a cross-sectional view of the electronic component according to the second embodiment and a graph showing the volume density of the filler. In the first embodiment, two types of fillers having different average particle diameter and / or density are dispersed in the sealing resin layer 30, but in the second embodiment, three types of fillers are dispersed. For example, the first type of filler is mainly accumulated downward, the third type of filler is mainly accumulated upward, and the second filler is mainly accumulated in the center. As in the first embodiment, the volume density of the entire filler gradually decreases from the substrate 10 upward. For this reason, the same effect as that of the first embodiment can be obtained. The type of filler dispersed in the sealing resin layer 30 may be four or more. By increasing the types of fillers to be dispersed in the sealing resin layer 30, the degree of freedom of distribution of the volume density of the fillers can be enhanced.
　［第３実施例］
　次に、図４を参照して第３実施例による電子部品について説明する。以下、第１実施例による電子部品と共通の構成については説明を省略する。第１実施例では、フィラーの体積密度を基板１０から上方に向かって低下させた。第３実施例では、フィラーの体積密度は、必ずしもこのような分布である必要はない。 Third Embodiment
Next, an electronic component according to the third embodiment will be described with reference to FIG. Hereinafter, the description of the same configuration as the electronic component according to the first embodiment will be omitted. In the first embodiment, the volume density of the filler was lowered from the substrate 10 upward. In the third embodiment, the volume density of the filler does not necessarily have to be such a distribution.
　図４は、第３実施例による電子部品の封止樹脂層３０（図１）に含まれるフィラーの体積密度の分布、及び熱伝導率の分布を示すグラフである。横軸は基板１０の上面からの高さ方向の位置を表し、左縦軸は体積密度を表し、右縦軸は熱伝導率を表す。本実施例においても、第１実施例の場合と同様に封止樹脂層３０に２種類のフィラーが含まれている。 FIG. 4 is a graph showing the distribution of the volume density of the filler contained in the sealing resin layer 30 (FIG. 1) of the electronic component according to the third embodiment and the distribution of the thermal conductivity. The horizontal axis represents the position in the height direction from the upper surface of the substrate 10, the left vertical axis represents the volume density, and the right vertical axis represents the thermal conductivity. Also in the present embodiment, two types of fillers are contained in the sealing resin layer 30 as in the case of the first embodiment.
　グラフ中の最も太い実線は全体のフィラーの体積密度を示し、２番目に太い実線は一方のフィラーの体積密度を表し、最も細い実線は他方のフィラーの体積密度を表す。一方のフィラーは、主として相対的に低い位置に分布し、他方のフィラーは主として相対的に高い位置に分布する。２種類のフィラーの合計の体積密度は、高さに依らずほぼ一定である。主として相対的に低い位置に分布する一方のフィラーの熱伝導率が、主として相対的に高い位置に分布する他方のフィラーの熱伝導率より高い。 The thickest solid line in the graph indicates the volume density of the entire filler, the second thick solid line indicates the volume density of one filler, and the thinnest solid line indicates the volume density of the other filler. One filler is mainly distributed at a relatively low position, and the other filler is mainly distributed at a relatively high position. The total volume density of the two types of fillers is substantially constant regardless of height. The thermal conductivity of one filler distributed mainly at a relatively low position is higher than the thermal conductivity of the other filler distributed mainly at a relatively higher position.
　図４のグラフ中の破線はバインダとフィラーとを含む封止樹脂層３０（図１）の熱伝導率を表す。第３実施例では、熱伝導率が相対的に高いフィラーが主として相対的に低い位置に分布し、熱伝導率が相対的に低いフィラーが主として相対的に高い位置に分布する。さらに、フィラーの体積密度が高さに依らず一定である。このため、封止樹脂層３０の熱伝導率は、下方から上方に向かって低下する。 The broken line in the graph of FIG. 4 represents the thermal conductivity of the sealing resin layer 30 (FIG. 1) containing the binder and the filler. In the third embodiment, the filler having a relatively high thermal conductivity is mainly distributed at a relatively low position, and the filler having a relatively low thermal conductivity is mainly distributed at a relatively high position. Furthermore, the volume density of the filler is constant regardless of the height. Therefore, the thermal conductivity of the sealing resin layer 30 decreases from the lower side to the upper side.
　次に、第３実施例の優れた効果について説明する。半導体チップ２０（図１）の発熱領域で発声した熱が、封止樹脂層３０の下方の熱伝導率の高い領域を経由して基板１０まで優先的に伝導される。このため、第１実施例の場合と同様に、発熱領域からの放熱性を高めることができる。 Next, the excellent effects of the third embodiment will be described. The heat generated in the heat generating area of the semiconductor chip 20 (FIG. 1) is preferentially conducted to the substrate 10 via the area of high thermal conductivity below the sealing resin layer 30. Therefore, as in the case of the first embodiment, the heat dissipation from the heat generating area can be enhanced.
　例えば、相対的に熱伝導率が高いフィラーの材料として、六方晶窒化ホウ素（ｈ－ＢＮ）、アルミナ等を用いることができる。相対的に熱伝導率が低いフィラーの材料として、結晶性シリカを用いることができる。六方晶窒化ホウ素の密度、及びアルミナの密度は、結晶性シリカの密度より高い。このため、六方晶窒化ホウ素またはアルミナからなるフィラーを相対的に下方に分布させ、結晶性シリカからなるフィラーを相対的に上方に分布させることができる。 For example, hexagonal boron nitride (h-BN), alumina or the like can be used as a filler material having a relatively high thermal conductivity. Crystalline silica can be used as a filler material having a relatively low thermal conductivity. The density of hexagonal boron nitride and the density of alumina are higher than the density of crystalline silica. Therefore, the filler made of hexagonal boron nitride or alumina can be distributed relatively downward, and the filler made of crystalline silica can be distributed relatively upward.
　次に、第３実施例の変形例について説明する。第３実施例では、２種類のフィラーの全体の体積密度を、高さに依らず一定にしたが、第１実施例の場合と同様に体積密度に分布を持たせてもよい。この場合、相対的に熱伝導率の高いフィラーの体積密度の分布を、相対的に熱伝導率の低いフィラーの体積密度の分布に比べて下方に偏らせるとよい。このような分布にすることにより、封止樹脂層３０の下方の領域の熱伝導率を上方の領域の熱伝導率に比べてより高くすることができる。 Next, a modification of the third embodiment will be described. In the third embodiment, the total volume density of the two types of fillers is constant regardless of the height, but the volume density may have a distribution as in the first embodiment. In this case, the distribution of the volume density of the filler having a relatively high thermal conductivity may be biased downward relative to the distribution of the volume density of a filler having a relatively low thermal conductivity. With such a distribution, the thermal conductivity of the region under the sealing resin layer 30 can be made higher than the thermal conductivity of the upper region.
　上記第１実施例、第２実施例、及び第３実施例では、半導体チップ２０の下方、側方、及び上方の全面を封止樹脂層３０で封止したが、下方及び側方から封止し、上面は露出させてもよい。 In the first embodiment, the second embodiment and the third embodiment, the sealing resin layer 30 is used to seal the entire surface below, to the side, and above the semiconductor chip 20, but from the bottom and the side And the top surface may be exposed.
　上述の各実施例は例示であり、異なる実施例で示した構成の部分的な置換または組み合わせが可能であることは言うまでもない。複数の実施例の同様の構成による同様の作用効果については実施例ごとには逐次言及しない。さらに、本発明は上述の実施例に制限されるものではない。例えば、種々の変更、改良、組み合わせ等が可能なことは当業者に自明であろう。 It goes without saying that the above-described embodiments are exemplification, and partial replacement or combination of the configurations shown in the different embodiments is possible. Similar advantages and effects resulting from similar configurations of the multiple embodiments will not be sequentially described in each embodiment. Furthermore, the invention is not limited to the embodiments described above. For example, it will be apparent to those skilled in the art that various modifications, improvements, combinations, and the like can be made.
１０　基板
２０　半導体チップ
２１　ヘテロバイポーラトランジスタ（ＨＢＴ）
２２　バンプ
３０　封止樹脂層 10 Substrate 20 Semiconductor Chip 21 Heterobipolar Transistor (HBT)
22 bump 30 sealing resin layer

Claims (5)

  1. 　基板と、
    　前記基板に実装された半導体チップと、
    　前記半導体チップを封止する封止樹脂層と
    を有し、
    　前記封止樹脂層は、
    　バインダと、
    　前記バインダ内に分散された複数の粒子で構成され、平均粒径及び密度の少なくとも一方の物理量が異なる少なくとも２種類のフィラーと
    を含み、
    　前記封止樹脂層内における前記フィラーの体積密度が、前記基板から上方に向かって低下しており、前記封止樹脂層の高さ方向の一部に、２種類の前記フィラーが混在する領域を含む電子部品。     A substrate,
    A semiconductor chip mounted on the substrate;
    And a sealing resin layer for sealing the semiconductor chip,
    The sealing resin layer is
    With a binder,
    And at least two types of fillers composed of a plurality of particles dispersed in the binder and having different physical quantities of at least one of average particle diameter and density,
    The volume density of the filler in the sealing resin layer is lowered upward from the substrate, and a region in which two types of the filler are mixed in a part in the height direction of the sealing resin layer is obtained. Including electronic components.
  2. 　前記半導体チップは前記基板に、フェースダウンでフリップチップボンディングされており、前記封止樹脂層は、少なくとも前記半導体チップと前記基板との間、及び前記半導体チップの周囲の前記基板の上に配置されている請求項１に記載の電子部品。 The semiconductor chip is flip-chip bonded to the substrate face down, and the sealing resin layer is disposed on the substrate at least between the semiconductor chip and the substrate and around the semiconductor chip. The electronic component according to claim 1.
  3. 　少なくとも２種類の前記フィラーの平均質量のうち、最も大きい平均質量が最も小さい平均質量の１２０倍以上である請求項１または２に記載の電子部品。 The electronic component according to claim 1, wherein the largest average mass among the average masses of the at least two types of fillers is at least 120 times the smallest average mass.
  4. 　少なくとも２種類の前記フィラーの各々の平均粒径のうち、最も小さい平均粒径が最も大きい平均粒径の０．２９倍以下である請求項１乃至３のいずれか１項に記載の電子部品。 The electronic component according to any one of claims 1 to 3, wherein the smallest average particle size among the average particle sizes of each of the at least two types of fillers is 0.29 times or less of the largest average particle size.
  5. 　２種類の前記フィラーの熱伝導率が異なっており、熱伝導率の高い方の前記フィラーの体積密度の分布が、熱伝導率の低い方の前記フィラーの体積密度の分布に比べて前記封止樹脂層の内部の下方の領域に偏っている請求項１乃至４のいずれか１項に記載の電子部品。 The thermal conductivity of the two types of fillers is different, and the distribution of the volume density of the filler with the higher thermal conductivity is compared with the distribution of the volume density of the filler with the lower thermal conductivity. The electronic component according to any one of claims 1 to 4, which is biased to a lower region inside the resin layer.
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JP2017098353A (en) * 2015-11-20 2017-06-01 日東電工株式会社 Sealing sheet for electronic device and manufacturing method for electronic device package

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