WO2019001159A9 - 一种编码方法及装置、计算机存储介质 - Google Patents
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- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/033—Theoretical methods to calculate these checking codes
- H03M13/036—Heuristic code construction methods, i.e. code construction or code search based on using trial-and-error
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- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1131—Scheduling of bit node or check node processing
- H03M13/1137—Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel
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- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
- H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
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- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
- H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
- H03M13/1188—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal wherein in the part with the double-diagonal at least one column has an odd column weight equal or greater than three
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/615—Use of computational or mathematical techniques
- H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
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- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/6306—Error control coding in combination with Automatic Repeat reQuest [ARQ] and diversity transmission, e.g. coding schemes for the multiple transmission of the same information or the transmission of incremental redundancy
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- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6362—Error control coding in combination with rate matching by puncturing
- H03M13/6368—Error control coding in combination with rate matching by puncturing using rate compatible puncturing or complementary puncturing
- H03M13/6393—Rate compatible low-density parity check [LDPC] codes
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- H—ELECTRICITY
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6502—Reduction of hardware complexity or efficient processing
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
- H03M13/6516—Support of multiple code parameters, e.g. generalized Reed-Solomon decoder for a variety of generator polynomials or Galois fields
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
- H04L1/0043—Realisations of complexity reduction techniques, e.g. use of look-up tables
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
Definitions
- the present application relates to the field of communication technologies, and in particular, to a coding method and device, and a computer storage medium.
- the 3rd Generation Partnership Project proposes to provide a Low Density Parity Check Code (LDPC) channel coding design for the 5G Enhanced Mobile Broadband (eMBB) scenario.
- LDPC Low Density Parity Check Code
- LDPC codes are a type of linear codes defined by a check matrix.
- the check matrix needs to meet sparseness when the code length is long, that is, the density of 1 in the check matrix is relatively low, which means that check
- the number of 1s in the matrix is much smaller than the number of 0s, and the longer the code length, the lower the density.
- the embodiments of the present application provide a coding method and device, and a computer storage medium, which are used to improve LDPC coding performance, and thus are applicable to 5G systems.
- LDPC encoding is performed according to the sub-circulation matrix and the base graph.
- a base graph of a low-density parity check LDPC matrix is determined, and a cyclic coefficient index matrix is constructed. According to the cyclic coefficient index matrix, a sub-circulation matrix is determined.
- LDPC encoding which improves LDPC encoding performance and is suitable for 5G systems.
- the constructing the cyclic coefficient index matrix specifically includes:
- Step 1 Divide the set of dimension Z of the sub-circulation matrix to be supported into multiple subsets
- Step 2 For each said subset, generate a set of cyclic coefficient index matrices
- Step 3 determine the cyclic coefficients corresponding to Z of a plurality of subsets according to the cyclic coefficient index matrix
- Step 4 For each Z, check whether the performance of the determined cyclic coefficient index matrix satisfies a preset condition, and if so, end, otherwise, perform step 2 again.
- Z a ⁇ 2 j ; performing step one in one of the following ways:
- Method 1 divide Z into multiple subsets according to the value of a
- Method 2 According to the value of j, divide Z into multiple subsets
- Method 3 Z is divided into multiple subsets according to the length of the information bits.
- the step three specifically includes: determining a cycle coefficient P i, j corresponding to each Z by using the following formula:
- V i, j is the cyclic coefficient corresponding to the (i, j) th element of the cyclic coefficient index matrix.
- the determined cyclic coefficient index matrix is shown in the following table:
- the determined cyclic coefficient index matrix is shown in the following table:
- the determined cyclic coefficient index matrix is shown in the following table:
- the determined cyclic coefficient index matrix is shown in the following table:
- the determined cyclic coefficient index matrix is shown in the following table:
- the determined cyclic coefficient index matrix is shown in the following table:
- the method further includes:
- the updating includes at least row and column replacement of matrix elements.
- performing LDPC encoding according to the sub-circulation matrix and the base graph specifically includes:
- LDPC encoding is performed using the check matrix.
- the method further includes: performing row and column replacement on the check matrix;
- the use of the check matrix to perform LDPC encoding specifically includes: using a check matrix after row and column replacement to perform LDPC encoding.
- performing row and column replacement on the check matrix specifically includes:
- the first unit is used to determine a base graph of a low-density parity-check code LDPC matrix and construct a cyclic coefficient index matrix;
- a second unit configured to determine a sub-circulation matrix according to the cyclic coefficient index matrix
- the third unit is configured to perform LDPC encoding according to the sub-circulation matrix and the base graph.
- the constructing the cyclic coefficient index matrix by the first unit specifically includes:
- Step 1 Divide the set of dimension Z of the sub-circulation matrix to be supported into multiple subsets
- Step 2 For each said subset, generate a set of cyclic coefficient index matrices
- Step 3 determine the cyclic coefficients corresponding to Z of a plurality of subsets according to the cyclic coefficient index matrix
- Step 4 For each Z, check whether the performance of the determined cyclic coefficient index matrix satisfies a preset condition, and if so, end, otherwise, perform step 2 again.
- Z a ⁇ 2 j ; the first unit performs step one in one of the following ways:
- Method 1 divide Z into multiple subsets according to the value of a
- Method 2 According to the value of j, divide Z into multiple subsets
- Method 3 Z is divided into multiple subsets according to the length of the information bits.
- the step three specifically includes: determining a cycle coefficient P i, j corresponding to each Z by using the following formula:
- V i, j is the cyclic coefficient corresponding to the (i, j) th element of the cyclic coefficient index matrix.
- the determined cyclic coefficient index matrix is shown in the following table:
- the determined cyclic coefficient index matrix is shown in the following table:
- the determined cyclic coefficient index matrix is shown in the following table:
- the determined cyclic coefficient index matrix is shown in the following table:
- the determined cyclic coefficient index matrix is shown in the following table:
- the determined cyclic coefficient index matrix is shown in the following table:
- the second unit is further configured to:
- the updating includes at least row and column replacement of matrix elements.
- the third unit is specifically configured to:
- LDPC encoding is performed using the check matrix.
- the third unit is further configured to: after determining the check matrix, perform row and column replacement on the check matrix;
- the third unit uses the check matrix to perform LDPC encoding, and specifically includes: using a check matrix after row and column replacement to perform LDPC encoding.
- the third unit performs row and column replacement on the check matrix, which specifically includes:
- Another encoding device includes a memory and a processor, where the memory is used to store program instructions, the processor is used to call the program instructions stored in the memory, and executed according to the obtained program Either method.
- a computer storage medium provided in the embodiments of the present application.
- the computer-readable storage medium stores computer-executable instructions, and the computer-executable instructions are used to cause the computer to execute any one of the foregoing methods.
- FIG. 1 is a schematic structural diagram of a Base matrix provided by an embodiment of the present application.
- FIG. 2 is a schematic structural diagram of a matrix P provided by an embodiment of the present application.
- FIG. 5 is a schematic structural diagram of an LDPC check matrix supporting redundancy and increment provided by an embodiment of the present application.
- FIG. 6 is a schematic diagram of a set of cyclic matrix sizes Z required to be supported by 5G LDPC provided by an embodiment of the present application;
- Basegraph # 2 is a schematic structural diagram of Basegraph # 2 provided by an embodiment of the present application.
- FIG. 8 is a schematic structural diagram of a first cyclic coefficient index matrix provided by an embodiment of the present application.
- FIG. 9 is a schematic structural diagram of a second cyclic coefficient index matrix provided by an embodiment of the present application.
- FIG. 10 is a schematic structural diagram of a third cyclic coefficient index matrix according to an embodiment of the present application.
- FIG. 11 is a schematic structural diagram of a fourth type of cyclic coefficient index matrix provided by an embodiment of the present application.
- FIG. 12 is a schematic structural diagram of a fifth cyclic coefficient index matrix according to an embodiment of the present application.
- FIG. 13 is a schematic structural diagram of a sixth cyclic coefficient index matrix according to an embodiment of the present application.
- 15 is a schematic diagram of an LDPC cycle coefficient performance according to an embodiment of the present application.
- 16 is a schematic flowchart of an encoding method according to an embodiment of the present application.
- FIG. 17 is a schematic structural diagram of an encoding device according to an embodiment of the present application.
- FIG. 18 is a schematic structural diagram of another encoding apparatus according to an embodiment of the present application.
- the embodiments of the present application provide a coding method and device, and a computer storage medium, which are used to improve LDPC coding performance, and thus are applicable to a 5G system.
- the technical solution provided in the embodiment of the present application provides that the data channel for the eMMB scenario uses LDPC coding instead of turbo coding used in the original long term evolution (LTE) system, that is, an LDPC coding scheme suitable for a 5G system is given.
- LTE long term evolution
- the design of 5G LDPC codes requires quasi-cyclic LDPC codes.
- the check matrix H can be expressed as follows:
- a i, j is a z ⁇ z cyclic permutation matrix.
- a base matrix ( ⁇ ⁇ c) with a size of ⁇ ⁇ c is constructed, and the elements of the matrix are either 0 or 1, as shown in FIG. 1.
- each 1 element of the base matrix B is expanded into a z ⁇ z Circular Permutation Matrix (CPM), and the 0 elements of the base matrix are expanded into a z ⁇ z all 0 matrix.
- Base matrix B is later
- the LDPC construction method based on the original model graph is called a base graph (BG).
- each cyclic permutation matrix P i is actually a unit matrix I cyclically shifted right i times, and the cyclic permutation matrix cyclic shift label i satisfies
- the above-mentioned cyclic shifted reference i is also referred to as the cyclic shifting coefficients of the LDPC check matrix.
- the coefficient matrix thus obtained is also referred to as a cyclic coefficient exponent matrix (SEM).
- FIG. 4 shows an example of the cyclic coefficient index matrix.
- BG is a Base graph with 3 rows and 6 columns. Each element in the base graph corresponds to a sub-circulation matrix with a size of 8 rows and 8 columns.
- the base graph is replaced with the cyclic shift coefficient of each sub-circulation matrix, where 0 is -1. Substitute the cyclic coefficient index matrix.
- the sub-cyclic matrix (CM) corresponding to the quasi-cyclic LDPC code described above may have a column weight greater than 1, for example, a column weight of 2 or more. At this time, the sub-cyclic matrix is no longer a cyclic permutation matrix (CPM).
- CPM cyclic permutation matrix
- 5G LDPC code design requirements must support IR (Incremental Redundancy, Incremental Redundancy)-HARQ (Hybrid Automatic Repeat Request, Hybrid Automatic Repeat Request), so you can use incremental redundancy to construct LDPC codes for 5G scenarios, that is, first Construct an LDPC code with a high bit rate, and then use incremental redundancy to generate more check digits to obtain an LDPC code with a low bit rate.
- the LDPC code constructed based on the incremental redundancy method has excellent performance, code length, and code. It has the advantages of wide coverage, high reuse, easy hardware implementation, and direct encoding with check matrix.
- An example of a specific structure is shown in FIG. 5. Where B is a double-diagonal or quasi-diagonal matrix, C is a 0 matrix, and E is a lower triangular expansion matrix.
- the design of the LDPC check matrix mainly depends on the design of A, D, and E1.
- LDPC performance depends on the two most important factors, one is the design of the base matrix, and the other is how to expand a non-zero element of the base matrix into a z ⁇ z cyclic permutation matrix. These two factors play a decisive role in LDPC performance. Improper design of the base matrix and the extended sub-cycle permutation matrix will greatly degrade LDPC code performance.
- the LDPC check matrix is being designed in the 5G design. Since 5G requires flexible LDPC, taking the eMBB data channel as an example, 3GPP requires a maximum of two LDPC check matrices obtained through two base graph extensions to support a maximum of 8 / 9 bit rate, the lowest 1/5, the longest information bit is 8448bits and the shortest 40bits; the two base graphs, the large base graph is 46x68 columns, of which the first 22 columns correspond to the information bits, the lowest bit rate is 1/3 ; While the small base graph size is 42x52 columns, the minimum bit rate is 1/5.
- the method of expanding the sub-circulation matrix corresponding to each 1 of the base graph into sub-circulation matrices of different sizes that is, the size of the sub-circulation matrix Z can support different values.
- Each Z in the table shown in FIG. 6 corresponds to a check matrix of the LDPC. Therefore, the design of the 5G LDPC code needs to design many check matrices.
- the first step is to determine the base graph based on the density-evolved P-EXITChart decoding threshold (the lowest decoding threshold when the code length is infinite, that is, the minimum required SNR value) in combination with the actual simulation performance;
- Step 2 Construct a cyclic coefficient index matrix, wherein each value of the cyclic coefficient represents the cyclic coefficient of a sub-matrix, and the P i coefficient i is located at the position of the index according to the foregoing description, so it is called a cyclic coefficient index here.
- a matrix can also be called an exponent matrix.
- Method 3 classify according to the size of Z, because Kb * Z is the length of the information bits, where Kb is the number of columns of information bits in the base graph, which is different from the number of information bits K.
- Kb 22
- kb 10
- classifying Z according to size is naturally equivalent to classifying according to the size of the information bit length K.
- the information bit length K is measured in bits.
- Step 2 For each subset, for example, a combination of algebra and randomness can be used to generate a set of cyclic coefficient index matrices.
- the random method is, for example, randomly generating an exponential matrix, and then selecting the optimal one through subsequent methods.
- Algebraic methods for example, can first construct a large exponential matrix, and then use a random masked matrix to obtain an exponential matrix. In this way, a total of 8 sets of cyclic coefficient index matrices are required for the 8 subsets.
- Step 3 According to the cyclic coefficient index matrix determined in step 2, for each Z in the 8 subsets (each set corresponds to a set of cyclic coefficient index matrix) and the Z elements outside its partial set, further determine each Since the cyclic coefficients corresponding to each Z are considered in addition to the elements in the set in the embodiment of the present application, the Z elements other than the set are considered. This makes the coefficient index matrix more adaptable. Larger intervals cannot achieve 1-bit granularity. Considering that Z elements other than the set participate in the design of cyclic coefficients, it will increase the robustness of the coefficient index matrix to different Z performances. Another gain brought by it is that it can be technically different. The set is configured with the same coefficient index matrix, which will further reduce the storage capacity and hardware design complexity.
- each subset generates an exponential matrix.
- This exponential matrix is actually generated according to the largest Z in the subset, and the coefficient of each specific Z in the subset is a function of the exponential matrix generated by this maximum Z.
- the cyclic coefficient is designed to make the The cycle coefficient performance of all Z in the subset is excellent, and the index matrix corresponding to this subset is qualified.
- An example of a method for determining the cyclic coefficient corresponding to each Z according to the cyclic coefficient index matrix is: the cyclic coefficient P i, j can be calculated using the following function:
- V i, j is the cyclic coefficient corresponding to the (i, j) th element of the coefficient index matrix
- function f is defined as:
- Step 4 For all Z in each subset, for example, using the ring distribution and the minimum distance of the codeword as the basic measure, determine the merits of the cyclic coefficient index matrix of the set level determined in step 2. The greater the number of rings and the minimum distance , The better the codeword performance. If the performance of the cyclic coefficient index matrix at the collection level is not good, return to step 2 again.
- the ring distribution is a distribution of ring lengths. For example, the rectangle has a ring length of 4, the larger the better, the never forming a ring means that the figure is not closed, which is called a tree in graph theory.
- the minimum distance is the smallest difference between any two codewords. The smaller the difference, the harder it is to distinguish between them, and the worse the codeword performance. Therefore, only when the minimum distance is large, the codeword performance is good.
- the third step according to the cyclic coefficient index matrix determined in the second step, each cyclic coefficient is expanded into a corresponding sub-cyclic matrix, and finally a check matrix H of the LDPC code is obtained.
- the H matrix is composed of 42 rows and 52 columns of sub-circulation matrices. Substituting each sub-circulation matrix with 0 or 1 is the base graph. Substituting each 1-element of each base graph with a sub-circulation matrix gives the H matrix.
- the cyclic matrix instead of 1 in the base graph is to design the cyclic coefficients of each sub-matrix. All the cyclic coefficients are placed in a matrix and described as the cyclic coefficient index matrix.
- Step 4 Use the check matrix H to complete the LDPC encoding. With the cyclic coefficient and Z, each sub-cyclic matrix is directly obtained, and the entire H matrix is obtained.
- the base graph # 2 used in 5G LDPC design is 42 rows and 52 columns.
- the base graph currently determined is shown in FIG. 7.
- 42 rows correspond to check nodes and 52 columns correspond to variable nodes.
- the set of the cyclic matrix size Z shown in Fig. 6 is classified according to a, that is, divided according to each column of Fig. 6, a has 8 different values, corresponding to 8 different Z.
- Z set corresponding to a 9
- Set5 ⁇ 9,18,36,72,144,288 ⁇
- a set of Z corresponding to a 9
- a 3
- the cyclic coefficient index matrix PCM2 corresponding to the set Set2 is specifically shown in FIG. 9, among which, given in FIG.
- the matrix is the check matrix in the 5G standard.
- FIG. 15 An example of designing LDPC performance based on the base graphs shown in FIGS. 8 to 13 is shown in FIG. 15. It can be seen that the performance of the LDPC code corresponding to the base graph in the embodiment of the present application is better.
- it may further include:
- the updating includes at least row and column replacement of matrix elements.
- row and column replacement may also be performed on the designed check matrix H.
- row and column replacement also includes maintaining replacement of some elements of the row and column.
- the double-diagonal matrix shown below and the lower triangle structure shown by matrix E are taken as an example. When performing the row and column replacement, the double-angle pair and the lower triangle structure can be kept unchanged, and other elements in the row and column can be replaced.
- this permutation can be the exchange between different rows and columns of the exponential matrix, or it can be the exchange of the rows or columns within a row of the subcyclic matrix represented by a row in the exponential matrix, such as the first The row is replaced to the last row of the sub-circulation matrix, so that the value of the exponential matrix is the original coefficient value plus a certain value.
- an encoding method provided by an embodiment of the present application includes:
- the base graph of the low-density parity-check code LDPC matrix is determined, and a cyclic coefficient index matrix is constructed. According to the cyclic coefficient index matrix, a sub-circulation matrix is determined. According to the sub-circulation matrix and the base graph LDPC encoding, which improves LDPC encoding performance and is suitable for 5G systems.
- the constructing the cyclic coefficient index matrix specifically includes:
- Step 1 Divide the set of dimension Z of the sub-circulation matrix to be supported into multiple subsets
- Step 2 For each said subset, generate a set of cyclic coefficient index matrices
- Step 3 determine the cyclic coefficients corresponding to Z of a plurality of subsets according to the cyclic coefficient index matrix
- Step 4 For each Z, check whether the performance of the determined cyclic coefficient index matrix satisfies a preset condition, and if so, end, otherwise, perform step 2 again.
- Method 1 According to the value of a, divide Z into 8 subsets;
- Method 2 Divide Z into 8 subsets according to the value of j;
- Method 3 Z is divided into 8 subsets according to the length of the information bits.
- the step three specifically includes: determining a cycle coefficient P i, j corresponding to each Z by using the following formula:
- V i, j is the cyclic coefficient corresponding to the (i, j) th element of the cyclic coefficient index matrix.
- performing LDPC encoding according to the sub-circulation matrix and the base graph specifically includes:
- LDPC encoding is performed using the check matrix.
- the method further includes: performing row and column replacement on the check matrix;
- the use of the check matrix to perform LDPC encoding specifically includes: using a check matrix after row and column replacement to perform LDPC encoding.
- performing row and column replacement on the check matrix specifically includes:
- an encoding device provided by an embodiment of the present application includes:
- the first unit 11 is configured to determine a base graph of a low-density parity-check code LDPC matrix and construct a cyclic coefficient index matrix;
- a second unit 12 configured to determine a sub-circulation matrix according to the cyclic coefficient index matrix
- the third unit 13 is configured to perform LDPC encoding according to the sub-cyclic matrix and the base graph.
- the constructing the cyclic coefficient index matrix by the first unit specifically includes:
- Step 1 Divide the set of dimension Z of the sub-circulation matrix to be supported into multiple subsets
- Step 2 For each said subset, generate a set of cyclic coefficient index matrices
- Step 3 determine the cyclic coefficients corresponding to Z of a plurality of subsets according to the cyclic coefficient index matrix
- Step 4 For each Z, check whether the performance of the determined cyclic coefficient index matrix satisfies a preset condition, and if so, end, otherwise, perform step 2 again.
- step one the first unit executes the one of the following ways: step one:
- Method 1 According to the value of a, divide Z into 8 subsets;
- Method 2 Divide Z into 8 subsets according to the value of j;
- Method 3 Z is divided into 8 subsets according to the length of the information bits.
- the step three specifically includes: determining a cycle coefficient P i, j corresponding to each Z by using the following formula:
- V i, j is the cyclic coefficient corresponding to the (i, j) th element of the cyclic coefficient index matrix.
- the third unit is specifically configured to:
- LDPC encoding is performed using the check matrix.
- the third unit is further configured to: after determining the check matrix, perform row and column replacement on the check matrix;
- the third unit uses the check matrix to perform LDPC encoding, and specifically includes: using a check matrix after row and column replacement to perform LDPC encoding.
- the third unit performs row and column replacement on the check matrix, which specifically includes:
- Another encoding device includes a memory and a processor, where the memory is used to store program instructions, the processor is used to call the program instructions stored in the memory, and executed according to the obtained program Either method.
- the processor 500 is configured to read a program in the memory 520 and execute the following process:
- LDPC encoding is performed according to the sub-circulation matrix and the base graph.
- the processor 500 constructs a cyclic coefficient index matrix, which specifically includes:
- Step 1 Divide the set of dimension Z of the sub-circulation matrix to be supported into multiple subsets
- Step 2 For each said subset, generate a set of cyclic coefficient index matrices
- Step 3 determine the cyclic coefficients corresponding to Z of a plurality of subsets according to the cyclic coefficient index matrix
- Step 4 For each Z, check whether the performance of the determined cyclic coefficient index matrix satisfies a preset condition, and if so, end, otherwise, perform step 2 again.
- step one the processor 500 executes the method in one of the following ways:
- Method 1 According to the value of a, divide Z into 8 subsets;
- Method 2 Divide Z into 8 subsets according to the value of j;
- Method 3 Z is divided into 8 subsets according to the length of the information bits.
- the step three specifically includes: determining a cycle coefficient P i, j corresponding to each Z by using the following formula:
- V i, j is the cyclic coefficient corresponding to the (i, j) th element of the cyclic coefficient index matrix.
- the processor 500 performs LDPC encoding according to the sub-circulation matrix and the base graph, which specifically include:
- LDPC encoding is performed using the check matrix.
- the processor 500 is further configured to: perform row and column replacement on the check matrix after determining the check matrix;
- the processor 500 uses the check matrix to perform LDPC encoding, and specifically includes: using a check matrix after row and column replacement to perform LDPC encoding.
- the processor 500 performs row and column replacement on the check matrix, which specifically includes:
- the transceiver 510 is configured to receive and send data under the control of the processor 500.
- the bus architecture may include any number of interconnected buses and bridges. Specifically, one or more processors represented by the processor 500 and various circuits of the memory represented by the memory 520 are linked together.
- the bus architecture can also link various other circuits such as peripherals, voltage regulators, and power management circuits, which are well known in the art, so they are not further described herein.
- the bus interface provides an interface.
- the transceiver 510 may be multiple elements, including a transmitter and a transceiver, providing a unit for communicating with various other devices over a transmission medium.
- the processor 500 is responsible for managing the bus architecture and general processing, and the memory 520 may store data used by the processor 500 when performing operations.
- the processor 500 may be a central embedded device (CPU), an application specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or a complex programmable logic device (Complex Programmable Logic Device). , CPLD).
- CPU central embedded device
- ASIC application specific integrated circuit
- FPGA field-programmable gate array
- CPLD complex programmable logic device
- the encoding device provided in the embodiment of the present application can also be regarded as a computing device, and the computing device may specifically be a desktop computer, a portable computer, a smart phone, a tablet computer, a Personal Digital Assistant (PDA), and the like.
- the computing device may include a central processing unit (CPU), memory, input / output devices, etc.
- the input device may include a keyboard, mouse, touch screen, etc.
- the output device may include a display device, such as a liquid crystal display (Liquid Crystal Display, LCD), cathode ray tube (Cathode Ray Tube, CRT) and so on.
- LCD liquid crystal display
- CRT cathode Ray Tube
- the memory may include a read-only memory (ROM) and a random access memory (RAM), and provide the processor with program instructions and data stored in the memory.
- the memory may be used to store a program of the encoding method.
- the processor invokes the program instructions stored in the memory, and the processor is configured to execute the foregoing coding method according to the obtained program instructions.
- a computer storage medium provided in the embodiment of the present application is used to store computer program instructions used by the computing device, which includes a program for executing the coding method.
- the computer storage medium may be any available medium or data storage device that can be accessed by a computer, including but not limited to magnetic storage (such as a floppy disk, hard disk, magnetic tape, magneto-optical disk (MO), etc.), optical storage (such as CD, DVD, BD, HVD, etc.), and semiconductor memory (such as ROM, EPROM, EEPROM, non-volatile memory (NAND FLASH), solid-state hard disk (SSD), etc.
- magnetic storage such as a floppy disk, hard disk, magnetic tape, magneto-optical disk (MO), etc.
- optical storage such as CD, DVD, BD, HVD, etc.
- semiconductor memory such as ROM, EPROM, EEPROM, non-volatile memory (NAND FLASH), solid-state hard disk (SSD), etc.
- this application may be provided as a method, a system, or a computer program product. Therefore, this application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Moreover, this application may take the form of a computer program product implemented on one or more computer-usable storage media (including, but not limited to, magnetic disk storage, optical storage, and the like) containing computer-usable program code.
- computer-usable storage media including, but not limited to, magnetic disk storage, optical storage, and the like
- These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to work in a specific manner such that the instructions stored in the computer-readable memory produce a manufactured article including an instruction device, the instructions
- the device implements the functions specified in one or more flowcharts and / or one or more blocks of the block diagram.
- These computer program instructions can also be loaded onto a computer or other programmable data processing device, so that a series of steps can be performed on the computer or other programmable device to produce a computer-implemented process, which can be executed on the computer or other programmable device.
- the instructions provide steps for implementing the functions specified in one or more flowcharts and / or one or more blocks of the block diagrams.
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Abstract
Description
Claims (32)
- 一种编码方法,其特征在于,该方法包括:确定低密度奇偶校验码LDPC矩阵的基础图base graph,并构造循环系数指数矩阵;根据所述循环系数指数矩阵,确定子循环矩阵;根据所述子循环矩阵以及所述base graph,进行LDPC编码。
- 根据权利要求1所述的方法,其特征在于,所述构造循环系数指数矩阵,具体包括:步骤一:将需要支持的子循环矩阵的维数Z的集合划分为多个子集;步骤二:针对每个所述子集,生成一套循环系数指数矩阵;步骤三:根据所述循环系数指数矩阵,确定多个子集的Z所对应的循环系数;步骤四:对每个Z,检测所确定的循环系数指数矩阵的性能是否满足预设条件,如果是,则结束,否则,重新执行步骤二。
- 根据权利要求2所述的方法,其特征在于,Z=a×2 j,采用下列方式之一执行所述步骤一:方式一:根据a的取值,将Z分成多个子集;方式二:根据j的取值,将Z分成多个子集;方式三:根据信息比特的长度,将Z分成多个子集。
- 根据权利要求1~10任一权项所述的方法,其特征在于,该方法还包括:对所述循环系数指数矩阵进行更新;利用更新后的循环系数指数矩阵,更新所述子循环矩阵。
- 根据权利要求11所述的方法,其特征在于,所述更新至少包括矩阵元素的行列置换。
- 根据权利要求1所述的方法,其特征在于,根据所述子循环矩阵以及所述base graph,进行LDPC编码,具体包括:根据所述子循环矩阵以及所述base graph,确定校验矩阵;利用所述校验矩阵,进行LDPC编码。
- 根据权利要求13所述的方法,其特征在于,确定校验矩阵之后,该方法还包括:对校验矩阵进行行列置换;利用所述校验矩阵,进行LDPC编码,具体包括:利用行列置换后的校验矩阵,进行LDPC编码。
- 根据权利要求14所述的方法,其特征在于,对所述校验矩阵进行行列置换,具体包括:对校验矩阵中的部分行和/或列元素进行更新,和/或,对校验矩阵中的全部行和/或列元素进行更新。
- 一种编码装置,其特征在于,包括:存储器,用于存储程序指令;处理器,用于调用所述存储器中存储的程序指令,按照获得的程序执行如下方法:确定低密度奇偶校验码LDPC矩阵的基础图base graph,并构造循环系数指数矩阵;根据所述循环系数指数矩阵,确定子循环矩阵;根据所述子循环矩阵以及所述base graph,进行LDPC编码。
- 根据权利要求16所述的装置,其特征在于,所述构造循环系数指数矩阵,具体包括:步骤一:将需要支持的子循环矩阵的维数Z的集合划分为多个子集;步骤二:针对每个所述子集,生成一套循环系数指数矩阵;步骤三:根据所述循环系数指数矩阵,确定多个子集的Z所对应的循环系数;步骤四:对每个Z,检测所确定的循环系数指数矩阵的性能是否满足预设条件,如果是,则结束,否则,重新执行步骤二。
- 根据权利要求17所述的装置,其特征在于,Z=a×2 j;采用下列方式之一执行所述步骤一:方式一:根据a的取值,将Z分成多个子集;方式二:根据j的取值,将Z分成多个子集;方式三:根据信息比特的长度,将Z分成多个子集。
- 根据权利要求16~25任一权项所述的装置,其特征在于,还包括:对所述循环系数指数矩阵进行更新;利用更新后的循环系数指数矩阵,更新所述子循环矩阵。
- 根据权利要求26所述的装置,其特征在于,所述更新至少包括矩阵元素的行列置换。
- 根据权利要求16所述的装置,其特征在于,根据所述子循环矩阵以及所述base graph,进行LDPC编码,具体包括:根据所述子循环矩阵以及所述base graph,确定校验矩阵;利用所述校验矩阵,进行LDPC编码。
- 根据权利要求28所述的装置,其特征在于,确定校验矩阵之后,还包括:对校验矩阵进行行列置换;利用所述校验矩阵,进行LDPC编码,具体包括:利用行列置换后的校验矩阵,进行LDPC编码。
- 根据权利要求29所述的装置,其特征在于,对所述校验矩阵进行行列置换,具体包括:对校验矩阵中的部分行和/或列元素进行更新,和/或,对校验矩阵中的全部行和/或列元素进行更新。
- 一种编码装置,其特征在于,包括:第一单元,用于确定低密度奇偶校验码LDPC矩阵的基础图base graph,并构造循环系数指数矩阵;第二单元,用于根据所述循环系数指数矩阵,确定子循环矩阵;第三单元,用于根据所述子循环矩阵以及所述base graph,进行LDPC编码。
- 一种计算机存储介质,其特征在于,所述计算机可读存储介质存储有计算机可执行指令,所述计算机可执行指令用于使所述计算机执行权利要求1至15任一项所述的方法。
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