WO2018232785A1 - 一种多电池电源管理电路和一种虚拟现实头戴设备 - Google Patents

一种多电池电源管理电路和一种虚拟现实头戴设备 Download PDF

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Publication number
WO2018232785A1
WO2018232785A1 PCT/CN2017/091826 CN2017091826W WO2018232785A1 WO 2018232785 A1 WO2018232785 A1 WO 2018232785A1 CN 2017091826 W CN2017091826 W CN 2017091826W WO 2018232785 A1 WO2018232785 A1 WO 2018232785A1
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Prior art keywords
battery
switch
power management
chip
processor chip
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PCT/CN2017/091826
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English (en)
French (fr)
Inventor
逄淑万
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Goertek Techology Co Ltd
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Goertek Techology Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—ELECTRIC POWER NETWORKS; CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or discharging batteries or for supplying loads from batteries
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—ELECTRIC POWER NETWORKS; CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or discharging batteries or for supplying loads from batteries
    • H02J7/36—Arrangements using end-cell switching

Definitions

  • the present application relates to the field of power management circuit technologies, and in particular, to a multi-battery power management circuit and a virtual reality headset.
  • the present application proposes a multi-battery power management circuit and a virtual reality wearing device.
  • the present application adopts the following technical solutions:
  • a multi-battery power management circuit comprising: a plurality of fuel gauges, a switch, a power management chip, and a processor chip;
  • Each of the fuel gauges is connected to one of the plurality of batteries for detecting the amount of power of the connected battery and transmitting the power to the processor chip;
  • the processor chip is connected to each of the fuel gauges, the power management chip, and the switch to obtain a power and a state of charge of each battery, and control the switch to switch to a corresponding battery;
  • the switch is configured to connect one of the plurality of batteries to the power management chip
  • the power management chip is configured to discharge the connected battery or control the connected battery.
  • the processor chip is further configured to:
  • the circuit further includes a power supply filter capacitor, one end of the power supply filter capacitor is connected to a connection end of the power management chip and the switch, and the other end of the power supply filter capacitor is grounded, and the power supply filter capacitor It is used for filtering, and the power supply process is not powered down when the switching switch is switched.
  • the power management chip is connected to the processor chip through an IIC bus, and a STAT pin of the power management chip is connected to a universal input/output port of the processor chip, where the processor The chip reads a status value of the power management chip through the universal input/output port.
  • each of the fuel gauges is connected to the processor chip through an IIC bus, and the INT pins of each of the fuel gauges are respectively connected to a universal input and output port of the processor chip.
  • the processor chip reads an interrupt signal of each fuel gauge through the universal input/output port.
  • the VDD pin and the CELL pin of each of the fuel gauges are connected to the VBATT end of the connected battery, and the CTG pin and the GND pin of each of the fuel gauges are grounded.
  • control end of the switch is connected to a universal input/output port of the processor chip, and the processor chip controls a switching action of the switch through the universal input and output port.
  • the switch includes a first switch and a second switch, and the first switch and the second switch are single-pole multi-throw switches;
  • a dynamic end of the first switch is connected to a BAT pin of the power management chip, and a fixed end of the first switch is respectively connected to a VBATT end of the plurality of batteries;
  • a dynamic end of the second switch is connected to a TS pin of the power management chip, and a fixed end of the second switch is respectively connected to a TS end of the plurality of batteries;
  • the control ends of the first switch and the second switch are respectively connected to one universal input and output port of the processor chip.
  • the processor chip is further configured to control, when charging, the switch to sequentially connect the multi-battery to the power management chip for charging; and control the switch according to charging when discharging In the reverse order, the multi-battery is connected to the power management chip for discharging.
  • a virtual reality wearing device comprising a headgear body and a strap, the virtual reality headset comprising at least two batteries and the multi-battery power source of any of the above a management circuit; the multi-battery power management circuit is disposed on the headset device, and the batteries of the virtual reality headset are disposed on the headset device or respectively disposed on the headset device And on the strap.
  • the circuit structure is simple, and the false switching caused by the battery voltage fluctuation caused by the power fluctuation can be effectively prevented, and the battery management is more reliable.
  • FIG. 1 is a circuit diagram of a multi-battery power management circuit according to some embodiments of the present application.
  • FIG. 2 is a circuit diagram of a multi-battery power management circuit for managing two batteries according to other embodiments of the present application;
  • U1 processor chip; U2, power management chip; U3, first switch; U4, second switch; UF1, first fuel gauge; UF2, second fuel gauge; UFn, nth fuel gauge; UB1 First battery; UB2, second battery; UBn, nth battery; C1, bootstrap capacitor; C2, filter capacitor; C3, power supply filter capacitor; L1, inductor.
  • a multi-battery power management circuit can manage a plurality of batteries, and the first battery UB1 and the second The battery UB2 to the nth battery UBn are taken as an example.
  • the multi-battery power management circuit includes: a plurality of fuel gauges (including a first fuel gauge UF1, a second fuel gauge UF2 to a nth fuel gauge UFn), a switch (including a first switch U3 and a second switch U4), and power management Chip U2 and processor chip U1, where n is an integer greater than two.
  • Each fuel gauge is connected to one of the plurality of batteries for detecting the amount of power of the connected battery and transmitting it to the processor chip U1.
  • the processor chip U1 is connected to each of the fuel gauges, the power management chip U2, and the switch to obtain the power and the state of charge of each battery, and controls the switch to switch to the corresponding battery according to the power of the battery.
  • the power management chip U2 is configured to discharge the battery that is connected to the battery or control the access.
  • the multi-battery power management circuit of some embodiments of the present application utilizes a plurality of fuel gauges to respectively perform power detection on a plurality of batteries, and the fuel gauge package and the wiring are simple, so that the circuit structure of the entire circuit is simple.
  • the wiring is easy to circuit and the cost is low; and the fuel gauge is used to detect the battery power.
  • the battery output power consumption is too large and the battery voltage is instantaneously reduced, the battery power is not erroneously judged, and the battery power detection result is more reliable. .
  • the processor chip U1 can also be used to determine whether the battery power of the access power management chip U2 is full when charging, and if the battery is full, control the switching of the switch, and connect another battery to the power management chip U2; When discharging, it is judged whether the battery power of the power management chip U2 is lower than the discharge threshold. If it is lower, the switch is controlled to switch, and another battery is connected to the power management chip U2 to realize charging and discharging management of the plurality of batteries.
  • the circuit further includes a power supply filter capacitor C3, and one end of the power supply filter capacitor C3 is connected to the power source tube.
  • the connection terminal of the chip U2 and the switch is grounded, and the other end is grounded.
  • the power supply filter capacitor C3 is connected between the BAT pin of the power management chip U2 and the ground, and the power supply filter capacitor C3 can be used for BAT. Pin filtering, and in the power supply process, when the switching switch is switched, the temporary voltage is supplied through the energy storage function of the capacitor C3, and the power supply process is not powered down.
  • the power management chip U2 is connected to the processor chip U1 through the IIC bus, and the STAT pin of the power management chip U2 is connected to a general-purpose input/output port of the processor chip U1 (ie, GPIO2 in the figure), and processed.
  • the chip U1 reads the state value of the power management chip U2 through the general-purpose input/output port.
  • the IIC bus is composed of a data line SDA and a clock signal line SCL, and can transmit and receive data.
  • the processor chip U1 completes the related configuration of the power management chip U2 and the reading of the status information through the IIC bus.
  • a general-purpose input/output port of the processor chip U1 is connected to the STAT pin of the power management chip U2, and reads the STAT value of the power management chip U2, for example, reading status values such as charging, charging completion, and temperature failure.
  • the processor chip U1 is also connected to the INT pin of the power management chip through a general-purpose input and output interface to read the interrupt signal of the power management chip.
  • a bootstrap capacitor C1 is connected between the SW pin and the BTST pin of the power management chip U2, and the SW pin is also connected to one end of the inductor L1, and the other end of the inductor L1 is an output terminal, and the output end is filtered.
  • Capacitor C2 is grounded.
  • the first fuel gauge UF1, the second fuel gauge UF2 to the nth fuel gauge UFn are all connected to the processor chip U1 through the IIC bus, and the INT pins of each fuel gauge are respectively associated with the processor chip U1.
  • a general-purpose input and output port is connected, and the processor chip U1 reads the interrupt signal of each fuel gauge through the general-purpose input and output port.
  • the first fuel gauge UF1 is connected to the first battery UB1
  • the second fuel gauge UF2 is connected to the second battery UB2
  • the nth fuel gauge UFn is connected to the nth battery UBn, and each power is connected.
  • the VDD pin and CELL pin of the meter are connected to the VBATT end of the connected battery to detect the corresponding battery power.
  • the CTG pin and GND pin of each fuel gauge are grounded.
  • the control terminal of the switch is connected to the general-purpose input/output port of the processor chip U1, and the processor chip U1 controls the switching action of the switch through the universal input/output port.
  • the switch includes a first switch U3 and a second switch U4.
  • the first switch U3 and the second switch U4 are single-pole multi-throw switches.
  • the dynamic end of the first switch U3 ( That is, the IN terminal is connected to the BAT pin of the power management chip U2, and the non-moving terminals (ie, Y1, Y2 to Yn terminals) are respectively connected to the VBATT terminals of the plurality of batteries; the mobile terminal (ie, the IN terminal) of the second switch U4 is connected to the power supply.
  • the TS pin of the management chip U2 the fixed ends (ie, Y1, Y2 to Yn terminals) are respectively connected to the TS ends of the plurality of batteries; the control ends of the first switch U3 and the second switch U4 (ie, C1, C2 to Cn terminals) Connected to a general purpose input and output port of processor chip U1.
  • the first battery UB1, the second battery UB2 to the nth battery UBn are batteries of the same model
  • the first The default state of a switch U3 and the second switch U4 is to connect the first battery UB1 with the power management chip U2
  • the processor chip U1 is configured to control the switch to charge the first battery UB1, the second battery UB2 to the nth during charging
  • the battery UBn is sequentially connected to the power management chip U2 for charging; and when the discharge is controlled, the switch is connected to the power management chip U2 in the reverse order of charging, that is, in FIG. 1, according to the nth battery UBn
  • the second battery UB2 and the first battery UB1 are sequentially connected to the power management chip U2 for discharging.
  • Some embodiments of the present application also disclose a virtual reality headset, including a headset body and a strap.
  • the virtual reality headset includes at least two batteries and a multi-cell power management circuit as shown in some embodiments above.
  • the multi-battery power management circuit can be disposed on the body of the headset.
  • the batteries of the virtual reality headset may be disposed on the body of the headset or separately on the body of the headset and on the strap.
  • the virtual reality headset can include more than two batteries, such as n batteries, where n is an integer greater than two.
  • n batteries an integer greater than two.
  • the default state of the first switch U3 and the second switch U4 is that the IN terminal is connected to the Y1 terminal, that is, the first battery UB1 is connected to the circuit.
  • the processor chip U1 completes a series of configurations of the power management chip U2. At this time, the processor chip U1 communicates with the first fuel gauge UF1, the second fuel gauge UF2, and the nth fuel gauge UFn through the IIC bus, and acquires the amount of electricity of the first battery UB1, the second battery UB2 to the NBb at this time.
  • the processor chip U1 controls the first switch U3 and the second switch U4 through the general-purpose input/output interface (including GPIOC1 to GPIOCn and GPIOT1 to GPIOTn) so that the IN terminal is connected to the Yn terminal. That is, the nth battery UBn is connected to supply power to the headset.
  • the processor chip U1 controls the first switch U3 and the second switch U4 to have the IN terminal and the Yn-1 terminal (not shown). ) Connected, that is, the n-1th battery UBn-1 is used to supply power to the headset, and if the n-1 battery is too low, it continues to switch.
  • the processor chip U1 controls the first switch U3 and the second switch U4 to connect the IN terminal to the Y1 terminal. Charging the first battery UB1.
  • the processor chip U1 controls the first switch U3 and the second switch U4 to connect the IN terminal to the Y2 terminal to charge the second battery UB2, and so on. The sequential charging of each battery is realized.
  • the head-mounted device When the electric quantities of the first battery UB1 to the n-th battery UBn are both higher than the minimum amount but are not full, according to the foregoing In the order of discharge, the head-mounted device is turned on, and the processor chip U1 controls the first switch U3 and the second switch U4 to connect the IN terminal to the Yn terminal, and firstly supplies the n-th battery UBn to the head-mounted device to supply power thereto.
  • the first battery UB1 Since the first switch U3 and the second switch U4 are in the default state, the first battery UB1 is connected to the headset, the first battery UB1 is preferentially powered, and the nth battery UBn is preferentially used to power the headset. It is possible to make the amount of electric power of the first battery UB1 always lower than the amount of power of the second battery UB2 to the UBn subsequent thereto, so that the power supply to the head device can be supplied when the first battery UB1 is accessed in the default state.
  • FIG. 2 is a circuit diagram showing still another embodiment of the multi-battery power management circuit of the present application, the multi-battery power management circuit in this embodiment for managing two batteries.
  • the VDD and CELL pins of the first fuel gauge UF1 and the second fuel gauge UF2 of the circuit are respectively connected to the VBATT of the first battery UB1 and the second battery UB2 for detecting the power of the first battery UB1 and the second battery UB2.
  • the first switch U3 and the second switch U4 are connected to the IN terminal and the Y1 terminal by default, and the first battery UB1 is connected to the circuit.
  • the head mounted device is turned off.
  • the charger When the power of the first battery UB1 and the second battery UB2 are not full, the charger is inserted at this time, and the processor chip U1 controls the first switch U3 and the second switch U4 to connect the IN terminal to the Y1 terminal, with priority A battery UB1 is charged. After the first battery UB1 is fully charged, the processor chip U1 connects the first terminal U3 and the second switch U4 to connect the IN terminal to the Y2 terminal to charge the second battery UB2. During discharge, the processor chip U1 controls the first switch U3 and the second switch U4 to connect the IN terminal to the Y2 terminal, and the second battery UB2 is preferentially discharged.
  • Some embodiments of the present application also disclose a virtual reality wearing device including two batteries, the virtual reality wearing device including a head device body and a strap and a multi-battery power management circuit, wherein two batteries are respectively disposed at the head
  • the device body and the strap and the multi-battery power management circuit are disposed on the headset body, and the multi-battery management circuit can adopt the circuit structure as shown in FIG. 2.
  • the fuel gauge, the switch, the power management chip, and the processor chip used in some of the above embodiments are commercially available.
  • the above embodiments are for the purpose of explanation, and no specific model is specified.
  • the multi-battery power management circuit in some embodiments of the present application can also be used in various electronic products such as mobile phones or smart bracelets, and details are not described herein.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)
  • Secondary Cells (AREA)

Abstract

本申请公开了一种多电池电源管理电路和一种虚拟现实头戴设备。该电路包括：多个电量计、切换开关、电源管理芯片和处理器芯片；每个电量计，与多电池中的一个电池连接，用于检测所连接电池的电量，并发送给处理器芯片；处理器芯片，与每个电量计、电源管理芯片和切换开关连接，用于获取每个电池的电量和充电状态，控制切换开关切换接入相应的电池；切换开关，用于将多电池中的一个电池接入电源管理芯片；电源管理芯片，用于对接入的电池充电或控制接入的电池放电。通过使用电量计实时读取每个电池的电量，并通过电池电量判断是否切换电池，电路结构简单，并且能够有效防止因功耗波动引起电池电压波动造成的误切换，电池管理更加可靠。

Description

一种多电池电源管理电路和一种虚拟现实头戴设备 技术领域
本申请涉及电源管理电路技术领域，特别涉及一种多电池电源管理电路和一种虚拟现实头戴设备。
申请背景
众所周知，如今的电子产品，尤其是穿戴式电子产品，如手机、手环、虚拟现实(Virtual Reality，VR)头戴设备等产品不断向着小型化、智能化发展。这样一来，这些电子产品中用来放置电池的空间越来越小，随着人们对电子产品的依赖，这些电子产品应用越来越多，其耗电量不断增大。然而，一般情况下电池的容量与电池的体积是成正比的，狭小的空间将无法为大容量电池提供安放位置，因此，越来越多的产品采用多电池进行供电。
申请内容
本申请提出了一种多电池电源管理电路和一种虚拟现实头戴设备，本申请采用了如下技术方案：
依据本申请的一个方面，提供了一种多电池电源管理电路，该电路包括：多个电量计、切换开关、电源管理芯片和处理器芯片；
每个所述电量计，与多电池中的一个电池连接，用于检测所连接电池的电量，并发送给所述处理器芯片；
所述处理器芯片，与每个所述电量计、所述电源管理芯片和所述切换开关连接，用于获取每个电池的电量和充电状态，控制所述切换开关切换接入相应的电池；
所述切换开关，用于将所述多电池中的一个电池接入所述电源管理芯片；
所述电源管理芯片，用于对接入的电池充电或控制接入的电池放电。
可选地，所述处理器芯片还用于，
在充电时判断接入所述电源管理芯片的电池电量是否充满，若充满则控制所述切换开关切换，将另一电池连接到所述电源管理芯片；
在放电时判断接入所述电源管理芯片的电池电量是否低于放电阈值，若低于则控制所述切换开关切换，将另一电池连接到所述电源管理芯片。
可选地，该电路还包括供电滤波电容，所述供电滤波电容的一端连接至所述电源管理芯片和所述切换开关的连接端，所述供电滤波电容的另一端接地，所述供电滤波电容用于滤波，以及在所述切换开关切换时保持供电过程不掉电。
可选地，所述电源管理芯片，通过IIC总线与所述处理器芯片连接通信，且所述电源管理芯片的STAT引脚接至所述处理器芯片的一个通用输入输出端口，所述处理器芯片通过所述通用输入输出端口读取所述电源管理芯片的状态值。
可选地，每个所述电量计，通过IIC总线与所述处理器芯片连接通信，且每个所述电量计的INT引脚分别与所述处理器芯片的一个通用输入输出端口连接，所述处理器芯片通过所述通用输入输出端口读取每个电量计的中断信号。
可选地，每个所述电量计的VDD引脚和CELL引脚均连接所连接电池的VBATT端，每个所述电量计的CTG引脚和GND引脚接地。
可选地，所述切换开关的控制端接至所述处理器芯片的通用输入输出端口，所述处理器芯片通过所述通用输入输出端口控制所述切换开关的切换动作。
可选地，所述切换开关包括第一开关和第二开关，所述第一开关和所述第二开关均为单刀多掷开关；
所述第一开关的动端连接所述电源管理芯片的BAT引脚，所述第一开关的不动端分别连接所述多个电池的VBATT端；
所述第二开关的动端连接所述电源管理芯片的TS引脚，所述第二开关的不动端分别连接所述多个电池的TS端；
所述第一开关和所述第二开关的控制端分别连接至所述处理器芯片的一个通用输入输出端口。
可选地，所述处理器芯片，还用于在充电时控制所述切换开关将所述多电池依次接入所述电源管理芯片进行充电；以及在放电时控制所述切换开关按照与充电时相反的顺序，将所述多电池接入所述电源管理芯片进行放电。
依据本申请的另一个方面，提供了一种虚拟现实头戴设备，包括头戴设备本体和绑带，所述虚拟现实头戴设备包括至少两块电池以及如上任一项所述的多电池电源管理电路；所述多电池电源管理电路设置在所述头戴设备本体上，所述虚拟现实头戴设备的电池均设置在所述头戴设备本体上或者分别设置在所述头戴设备本体上和所述绑带上。
综上所述，本申请的有益效果是：
通过使用电量计实时读取每个电池的电量，并通过电池电量判断是否切换电池，电路结构简单，并且能够有效防止因功耗波动引起电池电压波动造成的误切换，电池管理更加可靠。
附图简要说明
附图用来提供对本申请的进一步理解，并且构成说明书的一部分，与本申请实施例一起 用于解释本申请，并不构成对本申请的限制。在附图中：
图1为本申请一些实施例提供的一种多电池电源管理电路的电路图；
图2为本申请另一些实施例提供的一种管理两个电池的多电池电源管理电路的电路图；
图中，U1、处理器芯片；U2、电源管理芯片；U3、第一开关；U4、第二开关；UF1、第一电量计；UF2、第二电量计；UFn、第n电量计；UB1、第一电池；UB2、第二电池；UBn、第n电池；C1、自举电容；C2、滤波电容；C3、供电滤波电容；L1、电感。
具体实施方式
为使本申请的目的、技术方案和优点更加清楚，下面将结合附图对本申请一些实施方式作进一步描述。
图1为本申请一些实施例提供的一种多电池电源管理电路的电路图，参考图1所示，一些实施例中，多电池电源管理电路可以管理多个电池，以第一电池UB1、第二电池UB2至第n电池UBn为例。
该多电池电源管理电路包括：多个电量计(包括第一电量计UF1、第二电量计UF2至第n电量计UFn)、切换开关(包括第一开关U3和第二开关U4)、电源管理芯片U2和处理器芯片U1，其中n为大于2的整数。
每个电量计，与多电池中的一个电池连接，用于检测所连接电池的电量，并发送给处理器芯片U1。
处理器芯片U1，与每个电量计、电源管理芯片U2和切换开关连接，用于获取每个电池的电量和充电状态，并根据电池的电量，控制切换开关切换接入相应的电池。
切换开关，用于将多电池中的一个电池接入电源管理芯片U2。
电源管理芯片U2，用于对接入的电池充电或控制接入的电池放电。
结合图1可以看出，本申请一些实施例的中多电池电源管理电路，利用多个电量计分别对多个电池进行电量检测，电量计封装和走线简单，使得整个电路的电路结构简单，布线容易电路成本低；并且，采用电量计实现电池电量的检测，在电池输出功耗过大导致电池电压瞬间降低时，也不会错误地判断电池电量已放完，电池电量的检测结果更加可靠。
一些实施例中，处理器芯片U1还可以用于在充电时判断接入电源管理芯片U2的电池电量是否充满，若充满则控制切换开关切换，将另一电池连接到电源管理芯片U2；以及，在放电时判断接入电源管理芯片U2的电池电量是否低于放电阈值，若低于则控制切换开关切换，将另一电池连接到电源管理芯片U2，以实现多电池的充电和放电管理。
一些实施例中，该电路还包括供电滤波电容C3，供电滤波电容C3的一端连接至电源管 理芯片U2和切换开关的连接端，另一端接地，如图1所示，该供电滤波电容C3连接在电源管理芯片U2的BAT引脚与地之间，该供电滤波电容C3可以用于为BAT引脚滤波，以及在供电过程中，在切换开关切换时通过电容C3的储能作用，提供临时电压，保持供电过程不掉电。
一些实施例中，电源管理芯片U2，通过IIC总线与处理器芯片U1连接通信，且电源管理芯片U2的STAT引脚接至处理器芯片U1的一个通用输入输出端口(即图中GPIO2)，处理器芯片U1通过通用输入输出端口读取电源管理芯片U2的状态值。
参考图1所示，IIC总线由数据线SDA和时钟信号线SCL构成，可发送和接收数据，处理器芯片U1通过IIC总线完成对电源管理芯片U2的相关配置以及状态信息的读取。处理器芯片U1的一个通用输入输出端口与电源管理芯片U2的STAT引脚连接，读取电源管理芯片U2的STAT值，例如读取充电中、充电完成和温度故障等状态值。此外，处理器芯片U1还通过一个通用输入输出接口连接电源管理芯片的INT引脚，来读取电源管理芯片的中断信号。
一些实施例中，电源管理芯片U2的SW引脚和BTST引脚之间连接有自举电容C1，SW引脚还连接一电感L1的一端，电感L1的另一端为输出端，输出端通过滤波电容C2接地。
一些实施例中，第一电量计UF1、第二电量计UF2至第n电量计UFn均通过IIC总线与处理器芯片U1连接通信，且每个电量计的INT引脚分别与处理器芯片U1的一个通用输入输出端口连接，处理器芯片U1通过通用输入输出端口读取每个电量计的中断信号。
如图1所示，一些实施例中，第一电量计UF1与第一电池UB1连接，第二电量计UF2与第二电池UB2连接，第n电量计UFn与第n电池UBn连接，每个电量计的VDD引脚和CELL引脚均连接所连接电池的VBATT端，以检测对应电池的电量，每个电量计的CTG引脚和GND引脚接地。使用电量计检测电池电量提高了电量检测的准确性，不会因为功耗突变引起的电池电压变化导致误切换，使得多电池电源管理更加可靠。
一些实施例中，切换开关的控制端接至处理器芯片U1的通用输入输出端口，处理器芯片U1通过通用输入输出端口控制切换开关的切换动作。如图1所示，切换开关包括第一开关U3和第二开关U4，第一开关U3和第二开关U4均为单刀多掷开关，具体到本实施例中，第一开关U3的动端(即IN端)连接电源管理芯片U2的BAT引脚，不动端(即Y1、Y2至Yn端)分别依次连接多个电池的VBATT端；第二开关U4的动端(即IN端)连接电源管理芯片U2的TS引脚，不动端(即Y1、Y2至Yn端)分别连接多个电池的TS端；第一开关U3和第二开关U4的控制端(即C1、C2至Cn端)分别连接至处理器芯片U1的一个通用输入输出端口。
一些实施例中，第一电池UB1、第二电池UB2至第n电池UBn为型号相同的电池，第 一开关U3和第二开关U4的默认状态为将第一电池UB1与电源管理芯片U2连接；处理器芯片U1，用于在充电时控制切换开关将第一电池UB1、第二电池UB2至第n电池UBn依次接入电源管理芯片U2进行充电；以及在放电时控制切换开关按照与充电时相反的顺序将多电池接入电源管理芯片U2进行放电，即本图1中，按照从第n电池UBn至第二电池UB2、第一电池UB1的顺序依次接入电源管理芯片U2进行放电。
本申请一些实施例还公开了一种虚拟现实头戴设备，包括头戴设备本体和绑带。该虚拟现实头戴设备包括至少两块电池以及如上述一些实施例所示的多电池电源管理电路。该多电池电源管理电路可以设置在头戴设备本体上。该虚拟现实头戴设备的电池可以均设置在头戴设备本体上，或者分别设置在头戴设备本体上和绑带上。
一些实施例中，虚拟现实头戴设备可以包括两块以上电池，例如n块电池，其中n为大于2的整数。此时，多电池电源管理电路的工作原理如下：
第一开关U3和第二开关U4的默认状态为IN端与Y1端相连，即将第一电池UB1接入电路。
首先：当插入充电器后该头戴设备启动，处理器芯片U1完成对电源管理芯片U2的一系列配置。此时处理器芯片U1通过IIC总线与第一电量计UF1、第二电量计UF2至第n电量计UFn进行通信，获取此时第一电池UB1、第二电池UB2至第n电池UBn的电量。
当第一电池UB1至第n电池UBn都满电时，第一开关U3和第二开关U4的IN端与Y1端相连，此时拔掉充电器(电源管理芯片U2可检测到充电器的插入与拔出并告知处理器芯片U1)，处理器芯片U1通过通用输入输出接口(包括GPIOC1至GPIOCn和GPIOT1至GPIOTn)控制第一开关U3和第二开关U4，使其IN端与Yn端相连，即此时接入第n电池UBn为头戴设备供电。
当第n电量计UFn检测到第n电池UBn的电量低于设定阈值时，处理器芯片U1通过控制第一开关U3和第二开关U4，使其IN端与Yn-1端(未图示)相连，即此时改为第n-1电池UBn-1为头戴设备供电，若该第n-1电池电量也过低，则继续依次切换。
当第n电池UBn至第一电池UB1的电量均低于设定放电阈值时，可知电量不足，整个头戴设备关机。
当第一电池UB1至第n电池UBn的电量均不满时，此时若插入充电器充电，处理器芯片U1通过控制第一开关U3和第二开关U4，使其IN端与Y1端相连，优先为第一电池UB1充电，当第一电池UB1充满后，处理器芯片U1通过控制第一开关U3和第二开关U4，使其IN端与Y2端相连，为第二电池UB2充电，依次类推，实现对各电池的依次充电。
当第一电池UB1至第n电池UBn的电量均高于最低电量但都未满的情况下，按照前述 放电的顺序，头戴设备开机，处理器芯片U1通过控制第一开关U3和第二开关U4，使其IN端与Yn端相连，首先将第n电池UBn接入头戴设备为其供电。
由于第一开关U3、第二开关U4默认状态下是将第一电池UB1接入头戴设备的，优先为第一电池UB1供电以及优先使用靠后的第n电池UBn等为头戴设备供电，可以使得第一电池UB1的电量总是不低于其后的第二电池UB2至第n电池UBn的电量，从而在默认状态接入第一电池UB1时，可以为头戴设备供电。
附图2示出了本申请多电池电源管理电路另一些实施例的电路图，该实施例中的多电池电源管理电路用于管理两块电池。该电路的第一电量计UF1和第二电量计UF2的VDD和CELL引脚分别接至第一电池UB1和第二电池UB2的VBATT处，用来检测第一电池UB1和第二电池UB2的电量。第一开关U3和第二开关U4默认状态下为IN端和Y1端相连，将第一电池UB1接入电路。当第一电池UB1和第二电池UB2的电量均低于设定阈值时，头戴设备关机。当第一电池UB1和第二电池UB2的电量均不满时，此时插入充电器，处理器芯片U1通过控制第一开关U3和第二开关U4，使其IN端与Y1端相连，优先为第一电池UB1充电，待第一电池UB1充满后，处理器芯片U1通过控制第一开关U3和第二开关U4，使其IN端与Y2端相连，为第二电池UB2充电。放电时，处理器芯片U1通过控制第一开关U3和第二开关U4，使其IN端与Y2端相连，第二电池UB2优先放电。
本申请一些实施例还公开了一种包括两块电池的虚拟现实头戴设备，该虚拟现实头戴设备包括头戴设备本体和绑带以及多电池电源管理电路，其中两块电池分别设置在头戴设备本体和绑带上、多电池电源管理电路设置在头戴设备本体上，多电池管理电路可以采用如图2所示的电路结构。
上述一些实施例中所使用的电量计、切换开关、电源管理芯片和处理器芯片等市面上均有售，上述实施例为做原理性说明，未指定具体型号。
本申请一些实施例中的多电池电源管理电路还可以用于手机或智能手环等各类电子产品中，在此不再赘述。

Claims (10)

  1. 一种多电池电源管理电路，其特征在于，该电路包括：多个电量计、切换开关、电源管理芯片和处理器芯片；
    每个所述电量计，与多电池中的一个电池连接，用于检测所连接电池的电量，并发送给所述处理器芯片；
    所述处理器芯片，与每个所述电量计、所述电源管理芯片和所述切换开关连接，用于获取每个电池的电量和充电状态，控制所述切换开关切换接入相应的电池；
    所述切换开关，用于将所述多电池中的一个电池接入所述电源管理芯片；
    所述电源管理芯片，用于对接入的电池充电或控制接入的电池放电。
  2. 如权利要求1所述的多电池电源管理电路，其特征在于，所述处理器芯片还用于，
    在充电时判断接入所述电源管理芯片的电池电量是否充满，若充满则控制所述切换开关切换，将另一电池连接到所述电源管理芯片；
    在放电时判断接入所述电源管理芯片的电池电量是否低于放电阈值，若低于则控制所述切换开关切换，将另一电池连接到所述电源管理芯片。
  3. 如权利要求1所述的多电池电源管理电路，其特征在于，该电路还包括供电滤波电容，所述供电滤波电容的一端连接至所述电源管理芯片和所述切换开关的连接端，所述供电滤波电容的另一端接地，所述供电滤波电容用于滤波，以及在所述切换开关切换时保持供电过程不掉电。
  4. 如权利要求1所述的多电池电源管理电路，其特征在于，所述电源管理芯片，通过IIC总线与所述处理器芯片连接通信，且所述电源管理芯片的STAT引脚接至所述处理器芯片的一个通用输入输出端口，所述处理器芯片通过所述通用输入输出端口读取所述电源管理芯片的状态值。
  5. 如权利要求1所述的多电池电源管理电路，其特征在于，每个所述电量计，通过IIC总线与所述处理器芯片连接通信，且每个所述电量计的INT引脚分别与所述处理器芯片的一个通用输入输出端口连接，所述处理器芯片通过所述通用输入输出端口读取每个电量计的中断信号。
  6. 如权利要求1所述的多电池电源管理电路，其特征在于，每个所述电量计的VDD引脚和CELL引脚均连接所连接电池的VBATT端，每个所述电量计的CTG引脚和GND引脚接地。
  7. 如权利要求1所述的多电池电源管理电路，其特征在于，所述切换开关的控制端接至 所述处理器芯片的通用输入输出端口，所述处理器芯片通过所述通用输入输出端口控制所述切换开关的切换动作。
  8. 如权利要求1所述的多电池电源管理电路，其特征在于，所述切换开关包括第一开关和第二开关，所述第一开关和所述第二开关均为单刀多掷开关；
    所述第一开关的动端连接所述电源管理芯片的BAT引脚，所述第一开关的不动端分别连接所述多个电池的VBATT端；
    所述第二开关的动端连接所述电源管理芯片的TS引脚，所述第二开关的不动端分别连接所述多个电池的TS端；
    所述第一开关和所述第二开关的控制端分别连接至所述处理器芯片的一个通用输入输出端口。
  9. 如权利要求1所述的多电池电源管理电路，其特征在于，所述处理器芯片，还用于在充电时控制所述切换开关将所述多电池依次接入所述电源管理芯片进行充电；以及在放电时控制所述切换开关按照与充电时相反的顺序，将所述多电池接入所述电源管理芯片进行放电。
  10. 一种虚拟现实头戴设备，包括头戴设备本体和绑带，其特征在于，所述虚拟现实头戴设备包括至少两块电池以及如权利要求1-9任一项所述的多电池电源管理电路；所述多电池电源管理电路设置在所述头戴设备本体上，所述虚拟现实头戴设备的电池均设置在所述头戴设备本体上或者分别设置在所述头戴设备本体上和所述绑带上。
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