WO2018228774A1

WO2018228774A1 - A power efficient integrated circuit low output impedance voltage regulator

Info

Publication number: WO2018228774A1
Application number: PCT/EP2018/062922
Authority: WO
Inventors: Colm Donovan; Ciaran Cahill; Patrick Murphy
Original assignee: Firecomms Limited
Priority date: 2017-06-13
Filing date: 2018-05-17
Publication date: 2018-12-20

Abstract

A voltage regulator has an input node and an output node, a supply voltage rail, and an output transistor (Mn1) with its drain connected directly to the supply voltage (Vdd) rail and its source connected to the output node (14). A first differential voltage amplifier (A1) with its output (11) is coupled to the gate of the output transistor (Mn1). A control loop and a sense transistor (Mn2) are connected to the output transistor and to behave as a scaled copy of the output transistor in which the output transistor acts as a voltage follower, and in which the drain of the sense transistor is connected to the control loop.

Description

"A Power Efficient Integrated Circuit Low Output Impedance Voltage Regulator"

INTRODUCTION Field of the Invention

The present invention relates to voltage regulator circuits. Specifically, this invention relates to a voltage follower output stage low output impedance regulator in a high-speed integrated circuit.

Prior Art Discussion

There are various considerations in the design of a voltage regulator, such as power efficiency, bandwidth, accuracy, integrated chip area, and output impedance. These often trade off against each other. Of particular interest is achievement of an integrated low output impedance voltage regulator over all ranges of frequencies, with a high degree of power efficiency for use in broadband highly noise sensitive circuits. In such circuits, a change in output impedance of even a few ohms can measurably affect performance.

A circuit that can be used to create a reference output voltage is a common-gate voltage follower amplifier shown in Fig. 1, so called because the output voltage follows the gate input voltage minus a gate-source voltage drop, approximated by a threshold voltage (usually around 0.7 volts in a typical 0.35μιη process). While this type of circuit does not provide accurate regulation, it provides relatively low output impedance. The output impedance of such a circuit at low and medium frequency ranges (< 10MHz) can be approximated by the inverse of the device transconductance (1/Gm). The high frequency output impedance of the circuit of Fig. 1 is dominated by the capacitor CI between the output and the ground node, and whose purpose is to provide a low-output impedance at high frequencies. A drawback to a simple common gate amplifier with a fixed gate bias is that it does not provide precise voltage regulation. As its output is defined by the gate-source voltage drop, its output voltage varies with load conditions, temperature, and, in integrated circuits, variations in process corners. An addition to a common gate amplifier is shown in Fig. 2, which uses a differential amplifier Al to regulate the output voltage. This regulator provides very low output impedance within the bandwidth of the amplifier Al, because in this range of frequencies the output impedance of 1/Gm is further divided by the amplifier loop gain. Beyond the bandwidth of the amplifier this circuit behaves like the common-gate amplifier of Fig. 1. - -

The circuit of Fig. 2 is not functional with loads connected between Vdd and the Output node. This is because the circuit lacks the ability to sink current to ground. To allow the circuit of Fig. 2 the ability to sink current to ground, a common technique is to provide a constant bias current, as shown in Fig. 3, in which an NMOS follower supplies the difference in current between a current sink bias and the load current. A problem with this design is that it is very inefficient, as the current sink needs to be larger than the largest possible load current. Therefore, in any load condition other than maximum load current, the current sink is sub-optimum.

Fig. 1 of US9274536, [1] describes a resistor placed between the drain of the output NMOS follower and the power supply. The sense voltage developed across this resistor is proportional to the current flowing in the output NMOS. A control loop with this sense voltage as an input forces a current to flow in the current sink NMOS such that the bias current in the NMOS follower is forced to a set value.

In another circuit example US7554309 [2] a load control circuit is described in which an NMOS follower output (214) is regulated with an amplifier.

In another circuit example US8044653 [3] the author presents a voltage regulator circuit that uses a PMOS output device, and uses a sense resistor between the output device and the output node to develop a sense voltage proportional to the current in the output PMOS to regulate said current with a current sink transistor. This circuit uses a PMOS output device and thus does not benefit from the improved output impedance of a voltage follower output stage. In addition, this circuit uses a sense resistor which increases the output impedance.

In [4] the authors present a power amplifier having a PMOS output device M6. A copy of the current of this device is developed with the device of M9, and demonstrates a technique to develop a sense current for an output device of a PMOS type rather than of a voltage follower type NMOS device. The present invention is directed towards providing a voltage regulator with a low output impedance over a wide range of frequencies, with a high degree of power efficiency for use in circuits which are highly sensitive to noise.

References

Patent: US9274536 B2 - Mar 1, 2016

"Low-Impedance Reference Voltage Circuit'

Author: Richard Y. Tseng

Assignee: Intel Corporation

Patent: US7554309 B2 - Jun 30, 2009

"Circuits, Devices, and Methods for Regulator Minimum Load Control"

Author: Carpenter, Jr, et al

Assignee: Texas Instruments Incorporated

Patent: US8044653 B2 - Oct 25, 2011

"Low Drop-Out Voltage Regulator"

Author: Maige et al

Assignee: STMicroelectronics SA

Title: "Large Swing CMOS Power Amplifier"

Authors: Kevin E. Brehmer and James B. Weiser

Publication: IEEE Journal of Solid-State Circuits,

VOL. SC-18, No. 6, December 1983, p624

Summary of the Invention

We describe a voltage regulator as set out in claim 1.

Preferably, the current sink is connected between output node and ground. Preferably, the current sink comprises a sink transistor with its source coupled to ground, and with its drain coupled to the output node and with its gate coupled to the output of the control loop.

Preferably, the second input to the control loop can be a reference voltage or current that is proportional to a parameter such as temperature or supply voltage. - -

Preferably, the second input to the control loop can be a reference voltage or current that is programmable. The regulator may further comprise a reference voltage node coupled to the input node.

Preferably, the regulator further comprises a load filtering capacitor linked with the output node. Preferably, a load circuit is coupled between the output node and the drain of the output transistor. The control loop may comprise a second differential amplifier whose output is linked with the input of the current sink, said second differential amplifier having a first input from the drain of the sense transistor, and a second input.

The regulator may further comprise a resistor linking the source of the output transistor and the output terminal to stabilize an amplification loop comprising the first differential amplifier and the output transistor.

Preferably, the regulator further comprises a first switch for isolating the input of the current sink and a second switch to connect the input of the current sink to the supply voltage, and a third output from the control loop for controlling the state of said switches.

Preferably, the control circuit further comprises a current mirror circuit having an input of a drain current from the sense transistor and an output that is a scaled copy of the drain current of the sense transistor.

Preferably, the control circuit further comprises a differential voltage amplifier, a first resistor and a second resistor, wherein said differential voltage amplifier has its negative input terminal coupled to the output of the current mirror circuit and has its positive input terminal connected to the second control loop input and has its output connected to the current sink, and wherein said first resistor is connected between the second input of the control loop and ground, and wherein said second resistor is connected between the output of the current mirror and ground.

Preferably, the regulator further comprises a reference current source that is connected to the input of the control loop. Preferably, the reference current source has a current which can be proportional to voltage supply or temperature, to optimise the regulator performance over variations of voltage supply and temperature. - -

The regulator may comprise a capacitor connected between the input of the current sink and ground, the capacitor having a value suitable to stabilize an amplification loop comprising the second amplifier, the current sink, the sense transistor, and to also act as a high frequency power supply filter at the gate of the sink transistor.

The voltage regulator may comprise a first and second amplification loops,

wherein the first amplification loop comprises the differential amplifier and the output transistor,

the second amplification loop comprises the current sink, the sense transistor, and the control loop, and

wherein the bandwidth of the first amplification loop is higher than that of the second amplification loop, simplifying stabilisation of the loop combinations. We also describe an optical receiver or transmitter comprising a voltage regulator of any embodiment.

Additional Statements

We describe a voltage regulator comprising:

an input node and an output node,

a supply voltage rail,

an output transistor with its drain connected directly to the supply voltage rail and its source connected to the output node,

a first differential voltage amplifier with its output coupled to the gate of the output transistor, and

a control loop and a sense transistor connected to the output transistor and to behave as a scaled copy of the output transistor in which the output transistor acts as a voltage follower, and in which the drain of the sense transistor is connected to the control loop.

In one embodiment, the control loop is connected to a current sink arranged to control current through the output transistor. In one embodiment, the current sink is connected between the source of the output transistor and ground. In one embodiment, the regulator further comprises a reference voltage node coupled to the positive terminal of the first differential amplifier, and a feedback link between the source of the output transistor and the negative input of the first differential amplifier, the feedback link providing a voltage feedback of a portion or all the output voltage to the first differential amplifier. In one embodiment, the sense transistor gate and source are coupled to the gate and source respectively of the output transistor.

In one embodiment, the current sink comprises a sink transistor with its source coupled to ground and with its drain coupled to the output node.

In one embodiment, the control loop comprises a first input connected to the drain current from the sense transistor, and with its output connected to the gate of the sink transistor, and the control loop comprises a second input providing a reference current or voltage to the control loop.

In one embodiment, the control loop comprises a second differential amplifier linked with the gate of the current sink transistor, said second differential amplifier having as inputs a sense current from the sense transistor drain and a reference current. In one embodiment, the control loop comprises a stabilising capacitor for a gate of a current sink transistor linked with the output node.

In one embodiment, the regulator further comprises a load filtering capacitor.

A resistor may be connected between the source of the output transistor and the output terminal to stabilize an amplification loop comprising the first differential amplifier and the output transistor

In one embodiment, the regulator further comprises a switch for isolating the current sink. In one embodiment, the regulator further comprises a current mirror circuit having an input of a drain current from the sense transistor and the output of the current mirror is coupled to a resistor in order to create a sense voltage representative of the current in the output transistor.

In one embodiment, the regulator further comprises a second differential amplifier with its output coupled to the gate of the sink transistor, and with its negative input terminal coupled to a sense voltage, and with its positive input terminal connected to a bias reference voltage, to regulate current through the sink transistor from a load to maintain a controlled DC bias current in the output transistor.

In one embodiment, the regulator further comprises a capacitor connected between the gate of the sink transistor and a ground reference terminal, to stabilize an amplification loop comprising the second amplifier, the sink transistor, the sense transistor, and the current mirror, and to also act as a high frequency power supply filter at the gate of the sink transistor.

The regulator may for example be incorporated in an optical receiver or transmitter.

Detailed Description of the Invention

The invention will be more clearly understood from the following description of some embodiments thereof, given by way of example only with reference to the accompanying drawings in which :-

Figs. 1 to 3 are diagrams of prior art voltage regulators as described above;

Fig. 4 is a circuit diagram of a voltage regulator of the invention;

Fig. 5 is a diagram showing a regulator with a current mirror;

Fig. 6 shows a still further embodiment, including stabilising capacitor and resistor;

Fig. 7 shows a voltage regulator with a switch for a transistor sink, the switch having the ability to isolate the control function; and

Fig. 8 shows the simulated output impedance of the implementation of Fig. 6.

Voltage regulators of the invention provide an integrated circuit with a voltage reference source lower than the power supply voltage to the chip. For example, a chip might have supply voltages of 3.3V and 0V, and an internal circuit is required to be connected between 3.3V and an internally generated low-impedance 2V. In this situation, it is necessary to generate a 2V low impedance regulated voltage, and the load current will present between the voltage supply of 3.3V and the output of the 2V regulated voltage. The load circuit may be a circuit that has a current with a dominant low frequency or DC component, and a smaller medium to high- frequency component. Such a load circuit is typical of signal processing circuits which often have a large DC current bias point, and a small- signal high-frequency signal component. The large DC component would typically vary depending on ambient conditions, voltage supplies, and process variations. The high frequency components of such a load may require a low impedance regulated voltage for correct operation of the circuit.

We describe a dual-loop, power-efficient, low output impedance voltage regulator. Referring to Fig. 4, a voltage regulator is arranged to continuously regulate an output voltage and control a bias current in an output transistor. The circuit comprises:

- An output transistor (Mnl) with its drain connected directly to the supply voltage (Vdd) and its source connected to the output node (14).

- A first differential voltage amplifier (Al) with its output (11) coupled to the gate of the output transistor (Mnl).

- A reference voltage (VI) coupled to the positive terminal of the first differential amplifier (Al).

- Feedback circuitry connected between the source of the output transistor (14) and the negative input of the first amplifier (Al), the feedback circuitry providing a voltage feedback of a portion (with the addition of a resistor divider network) or all the output voltage to the amplifier (Al).

- A sense transistor (Mn2) with its gate and source coupled to the gate and source respectively of the output transistor (Mnl). The purpose of the sense transistor is to output a current in its drain that is approximately proportional to the current flowing in the output transistor without adversely affecting the output impedance of the output transistor.

- A sink transistor (Mnsnk) with its source coupled to ground and with its drain coupled to the output node (14).

- A load circuit connected between V_dd and V_out-

- A control loop circuit (41) with a first input connected to the drain current from the sense transistor (Mn2), and with its output connected to the gate of the sink transistor (Mnsnk). A second input (42) provides a reference current or voltage to the control loop. The purpose of the control loop is to regulate the current through the sink transistor from the load to maintain a controlled DC bias current in the output transistor (Mnl), and uses the second input reference to set a target DC bias current for the output transistor (Mnl). The first amplification loop consists of Al and Mnl. The purpose of this loop is to accurately regulate the output voltage. The second amplification loop consists of Mnsnk, Mn2, and the control loop 41. The purpose of this second amplification loop is to maintain a controlled bias current through Mnl over all conditions of voltage, temperature, load, and process variations. Such an arrangement allows for efficient current biasing and good control over the Gm of Mnl, and help provide a power-efficient consistent low output impedance throughout all operating conditions. Generally, the bandwidth of the second loop is lower than that of the first loop, simplifying stabilisation of the loop combinations. The use of Mn2 feeding into the control loop monitors current through Mnl. Mn2 is effectively a scaled copy of Mnl. The control loop controls the gate of Mnsink, which in turn controls the current through Mnl.

In various embodiments, the control loop input is a reference voltage, or is a reference current, or is a digital input.

The controlled DC bias current may be designed to maintain a current in the output transistor (Mnl) which ensures a constant transconductance in the output transistor (Mnl), and/or to maintain a current in the output transistor (Mnl) which is constant, and/or to maintain a current in the output transistor (Mnl) which is proportional to temperature.

An important benefit of this arrangement is that the output current is sensed (with Mn2) without placing a resistor or any other circuitry between the drain of Mnl and the Vdd supply. Such a resistor has the drawback of increasing the output impedance of the regulator. Highly sensitive communications circuits can be affected by even 1 ohm of increased output impedance, so any increase in output impedance is undesirable.

In this specification, mid-band frequencies refer to those frequencies beyond the bandwidth of the amplifiers ability to regulate the voltage, and below the frequencies filtered by the capacitor. This mid-band frequency range is typically around lMHz to lGHz, which is a very sensitive frequency range for communications circuitry. This is a range of frequencies at which it is particularly problematic to provide a low output impedance in an integrated circuit with no external capacitor. This is because a regulator amplifier has a finite bandwidth and cannot provide a low output impedance to an arbitrarily high frequency. - -

In addition, the output capacitor cannot be large for two reasons. Firstly, large capacitors require prohibitively large die area in an integrated circuit. Secondly, the stability of the regulator requires careful placement of the system output pole formed by the output impedance and Cfilt. For optimum low impedance throughout the full range of frequencies the amplifier would need to regulate up to a very high frequency and this would necessitate a smaller filter capacitor, thus requiring less integrated circuit area. At the mid-band range of frequencies, beyond the bandwidth of the regulating amplifier to reduce the output impedance, the circuit behaves more like a common-gate amplifier, and the common-gate configuration output impedance dominates. Thus it is advantageous to reduce this common-gate output impedance as much as possible, avoiding any extra circuitry that could increase its output impedance.

In some embodiments, the regulator has an NMOS follower output stage, and a bias sink control loop to provide current sink capability to a load connected between the positive supply and the voltage output node. The bias sink control loop uses a measure of the current in the follower output stage from a copy transistor to control the current sink loop and to create a stable current in the voltage follower transistor. Provided the large current changes that occur in the load circuit are within the low frequency range of the current sink loop, the current in the voltage follower will remain constant.

Fig. 5 shows an embodiment of a regulator 50, which controls the bias current in the output transistor. The circuit comprises:

- A positive voltage rail and a ground rail (which may also be a negative supply rail)

- An output transistor (Mnl) with its drain connected to the supply voltage (Vdd) and its source connected to the output node (14).

- Feedback circuitry connected between the source of the output transistor (14) and the negative input of the first amplifier (Al), the feedback circuitry providing a voltage feedback of a portion (with the addition of a resistor divider network) or all the output voltage to the amplifier. In other embodiments, a resistor (32) can be connected between the source of Mnl and the output (14) and the feedback will still be connected to the source of Mnl.

- A sense transistor (Mn2) with its gate and source coupled to the gate and source respectively of the output transistor (Mnl). The purpose of said sense transistor is to output a current in its drain that is approximately proportional to the current flowing in the output transistor without adversely affecting the output impedance of the output transistor.

- A current mirror circuit (16) in which the input to the current mirror is the drain current from the sense transistor (Mn2) and the output of the current mirror is coupled to a resistor (R2) in order to create a sense voltage (13) representative of the current in the output transistor (Mnl).

- A reference current (il) connected to a resistor (Rl) in order to create a bias reference voltage (12) proportional to the reference current.

- A second differential amplifier (A2) with its output (15) coupled to the gate of the sink transistor, and with its negative input terminal (13) coupled to the sense voltage, and with its positive input terminal (12) connected to the bias reference voltage, and the purpose of which is to regulate the current through the sink transistor from the load to maintain a controlled DC bias current in the output transistor (Mnl).

The current mirror circuit (16) also comprises an input transistor (Mpl) which has its gate and drain connected to the input node (17) of the current mirror circuit and its source connected to the supply voltage (Vdd). The gate of the input transistor is coupled to the gate of a copy transistor (Mp2) with its source connected to the supply voltage (Vdd) and its drain serves as the output node of the current mirror circuit.

Referring to Fig. 6, in a regulator 80 a filter capacitor (Cfilt) (31) is connected between the output node (14) and the ground reference terminal, with the purpose of providing a low impedance path between the output terminal and the ground reference terminal. In an integrated circuit this capacitor is usually a relatively small value (< 10pF), but a much larger capacitor could advantageously be used to lower output impedance at the expense of either integrated circuit area or through the use of an external capacitor. In such a case the stability of the amplifier may be compromised without careful consideration of the stability. In such a situation, a resistor (32) of small value, usually less than 10 ohms, may be connected between the source of the output transistor (Mnl) and the output terminal, and whose purpose is to stabilize the amplification loop consisting of the first amplifier (Al) and the output transistor (Mnl), by reducing the phase-shift of the feedback due to the output pole created by the output impedance and the filter capacitor (Cfilt). While this resistor (32) moderately increases the output impedance, the advantage of the reduction of output impedance at high frequencies due to the increased size of the filter capacitor may be of greater benefit.

Also, in Fig. 6, a capacitor (Cstb) (33) is connected between the gate of the sink transistor (Mnsnk) and the ground reference terminal, the dual purpose of which is to stabilize the amplification loop consisting of the second amplifier (A2), the sink transistor (Mnsnk), the sense transistor (Mn2), and the current mirror (16), and to also act as a high frequency power supply filter at the gate of the sink transistor (Mn2). Referring to Fig. 7, in a voltage regulator 90, a control signal disconnects the gate of the sink transistor from the control loop, and connects the gate of the sink transistor (Mnsnk) to the supply voltage, the purpose of which is to supply an output voltage equal to the negative supply voltage (gnd). This is to allow the control loop account for the possibility that the desired reference output voltage in a changing circuit conditions may require a reference of the negative supply. In this situation, a control signal to Mnsnk may be headroom limited, and may not have the possibility of applying a voltage of the positive power supply to the gate of Mnsnk. In order to compensate for this potential limitation, the control loop may then disconnect the continuous control signal and instead connect the gate of Mnsnk to the positive power supply. Advantageously, in all embodiments the output voltage follower transistor (Mnl) has its drain (or collector in the case of a bipolar) connected directly to the positive supply voltage. This direct connection minimizes output impedance. A first voltage regulation loop, which uses feedback of some or all the output voltage, maintains the desired output voltage through control of the gate (or base) of the output transistor. It should be noted that although this document predominantly refers to terminology for MOS transistors (gate, drain, base), the present invention may be extended to other transistor technologies such as bipolar transistors, in which case it may be assumed that where references are made to the gate, drain and source, the equivalent terminology may be substituted, that is the base, collector and emitter. Also, there may be a scaled sense transistor (Mn2), of the same type of transistor as the output transistor, with its gate and source coupled to the gate and source respectively of the output transistor, whose purpose is to output an approximate scaled copy of the current flowing in the output transistor. The benefit of scaling of the sense transistor to a smaller size than the output transistor is to improve power efficiency.

The sense transistor (Mn2) delivers its current to a circuit that will require some headroom. This will necessitate that the drain voltage of the sense transistor be unequal to the drain voltage of the output transistor. This will result in an imperfect scaled copy of the output transistor current. This scaled copy will be relatively accurate while both the output transistor and the copy transistor have their respective drain-source voltages greater than their respective drain-source saturation voltages. Inaccuracies in the sense current can be reduced by minimizing the voltage headroom used in subsequent circuitry, and thereby ensure close matching between the drain and source voltage of both the output transistor and the sense transistor.

A close approximation of the current in the output transistor is sufficient to design a highly efficient circuit, and with modern simulation tools, a designer can easily quantify, and compensate for, any potential inaccuracies in the sense transistor for a given set of design conditions.

To one skilled in the art it should be clear there are many methods of using the sense current to create a regulating voltage for the gate of the sink transistor.

Referring again to Figure 5, this regulator uses a PMOS mirror (16) to create a current source copy of the sense transistor. This is just one example of a current mirror, and to one skilled in the art it should be clear there are other well-known implementations of a current mirror that could be used to create a current source copy of the sense transistor. This current source is sent to a resistor connected to ground with the intention of creating a voltage that is representative of the current in the output transistor. A differential amplifier then uses this voltage as a first input, and takes a reference voltage as a second input, and as an output regulates a voltage on the gate of the sink transistor. The amplifier has the purpose of adjusting the current in the output transistor to equalize the voltages at its input, and thus creating a controlled bias current in the output transistor. The Figure 8 shows a plot of the output impedance from a simulation of an embodiment of Figure 5. This plot shows a maximum output impedance at the mid-band frequency around 100MHz. This plot, for purposes of illustration, also shows the effect of removing the output capacitance on the high frequency output impedance, and the effect of reducing the Gm of the output NMOS Mnl by a factor of approximately 50%.

The invention is not limited to the embodiments described but may be varied in scope and detail. Features of embodiments may be incorporated in other embodiments where they are compatible in a manner known to those skilled in the art.

Claims

A voltage regulator (1) comprising:

an input node (9) and an output node (14),

a supply voltage (Vdd) and a ground,

an output transistor (Mnl) with its drain connected directly to the supply voltage (Vdd)and its source linked to the output node (14),

and a first differential voltage amplifier (Al) with its positive input terminal coupled to the input node (9) and with its output (11) coupled to the gate of the output transistor (Mnl), and a feedback link (8) between the source of the output transistor (Mnl) and the negative input of the first differential amplifier (Al), the feedback link providing a voltage feedback of a portion (5, 6) or all the output voltage to the first differential amplifier (Al),

and a sense transistor (Mn2) with its gate coupled to the gate of the output transistor and its source coupled to the source of the output transistor (Mnl), the purpose of said sense transistor is to have a drain current that behaves as a scaled copy of the drain current in the output transistor (Mnl) in which the output transistor acts as a voltage follower, and a control loop (41),

wherein the control loop has a first input (17) connected to the drain of the sense transistor (Mn2) to measure the current in the output transistor (Mnl), a second input (42) providing a reference current or voltage to the control loop, and an output (15) connected to a current sink (Mnsnk) arranged to control current through the output transistor.

A voltage regulator as claimed in claim 1, wherein the current sink (Mnsnk) is connected between output node (14) and ground.

A voltage regulator as claimed in claims 1 or 2, wherein the current sink comprises a sink transistor (Mnsnk) with its source coupled to ground, and with its drain coupled to the output node (14) and with its gate coupled to the output (15) of the control loop (41).

A voltage regulator as claimed in any preceding claim, wherein the second input (42) to the control loop can be a reference voltage or current that is proportional to a parameter such as temperature or supply voltage. A voltage regulator as claimed in any preceding claim, wherein the second input (42) to the control loop can be a reference voltage or current that is programmable.

6. A voltage regulator as claimed in any preceding claim, wherein the regulator further comprises a reference voltage node (VI) coupled to the input node (9).

A voltage regulator as claimed in any preceding claim, wherein the regulator further comprises a load filtering capacitor (Cfilt) linked with the output node (14).

A voltage regulator as claimed in any preceding claim, wherein a load circuit (20) is coupled between the output node (14) and the drain of the output transistor (Mnl).

A voltage regulator as claimed in any preceding claim, wherein the control loop (41) comprises a second differential amplifier (A2) whose output (15) is linked with the input of the current sink (Mnsnk), said second differential amplifier (A2) having a first input (17) from the drain of the sense transistor (Mn2), and a second input (42) .

A voltage regulator as claimed in any preceding claim, which further comprises a resistor (32) linking the source of the output transistor (Mnl) and the output terminal to stabilize an amplification loop comprising the first differential amplifier (Al) and the output transistor (Mnl).

A voltage regulator as claimed in any preceding claim, wherein the regulator further comprises a first switch (71) for isolating the input of the current sink (Mnsnk) and a second switch (72) to connect the input of the current sink (Mnsnk) to the supply voltage (V_dd), and a third output (73) from the control loop (41) for controlling the state of said switches.

A voltage regulator as claimed in any preceding claim, in which the control circuit further comprises a current mirror circuit (16) having an input (17) of a drain current from the sense transistor (Mn2) and an output (13) that is a scaled copy of the drain current of the sense transistor (Mn2). 13. A voltage regulator as claimed in claim 12, wherein the control circuit further comprises a differential voltage amplifier (A2), a first resistor (Rl) and a second resistor (R2), wherein said differential voltage amplifier has its negative input terminal coupled to the output of the current mirror circuit (13) and has its positive input terminal connected to the second control loop input (42) and has its output (15) connected to the current sink (Mnsnk), and wherein said first resistor (Rl) is connected between the second input of the control loop (42) and ground, and wherein said second resistor (R2) is connected between the output of the current mirror (13) and ground.

14. A voltage regulator as claimed in claim 13, further comprising a reference current source (il) that is connected to the input of the control loop (42).

15. A voltage regulator as claimed in claim 14 in which the reference current source (il) has a current which can be proportional to voltage supply or temperature, to optimise the regulator performance over variations of voltage supply and temperature.

16. A voltage regulator as claimed in any of claims 9 to 15, comprising a capacitor (Cstb, 33) connected between the input of the current sink (Mnsnk) and ground, the capacitor having a value suitable to stabilize an amplification loop comprising the second amplifier (A2), the current sink (Mnsnk), the sense transistor (Mn2), and to also act as a high frequency power supply filter at the gate of the sink transistor (Mnsnk).

17. A voltage regulator as claimed in any proceeding claim comprising a first and second amplification loops,

wherein the first amplification loop comprises the differential amplifier (Al) and the output transistor (Mnl), and

the second amplification loop comprises the current sink (Mnsnk), the sense transistor (Mn2), and the control loop (41),

wherein the bandwidth of the first amplification loop is higher than that of the second amplification loop, simplifying stabilisation of the loop combinations. 18. An optical receiver or transmitter comprising a voltage regulator as claimed in any preceding claim.