WO2018228327A1 - 内存分配方法、装置、电子设备及可读存储介质 - Google Patents

内存分配方法、装置、电子设备及可读存储介质 Download PDF

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Publication number
WO2018228327A1
WO2018228327A1 PCT/CN2018/090620 CN2018090620W WO2018228327A1 WO 2018228327 A1 WO2018228327 A1 WO 2018228327A1 CN 2018090620 W CN2018090620 W CN 2018090620W WO 2018228327 A1 WO2018228327 A1 WO 2018228327A1
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memory
capacity
memory area
area
preset
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PCT/CN2018/090620
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English (en)
French (fr)
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林庚佑
张文彦
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深圳市万普拉斯科技有限公司
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Priority to EP18818963.3A priority Critical patent/EP3633515B1/en
Priority to US16/623,051 priority patent/US11106574B2/en
Publication of WO2018228327A1 publication Critical patent/WO2018228327A1/zh

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1041Resource optimization
    • G06F2212/1044Space efficiency improvement
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • the present invention relates to computer storage technology, and in particular to a memory allocation method, apparatus, electronic device, and readable storage medium.
  • the electronic device when receiving a memory allocation request, the electronic device directly selects an appropriate area from the available memory blocks of the entire memory, and does not distinguish the required memory capacity.
  • small blocks of memory are constantly distributed throughout the memory. After the system is running for a period of time, the allocation and release of memory blocks continue in the system.
  • the system free physical memory is divided by the used memory blocks, and the large contiguous physical memory blocks are 0.
  • the free memory blocks can only meet the small capacity. distribution. In other words, the system may have a lot of free memory blocks, but it can not meet the large-capacity memory allocation requirements, in this case, memory fragmentation occurs.
  • Embodiments of the present invention provide a memory allocation method, apparatus, electronic device, and readable storage medium, which can solve the problem of fragmentation.
  • An embodiment of the present invention provides a memory allocation method, which is applied to an electronic device, where the memory of the electronic device includes a first memory area and a second memory area, and the method includes:
  • the memory allocation request including a memory capacity to be allocated
  • a memory block of a corresponding capacity is allocated from the first memory area or the second memory area according to the comparison result.
  • the embodiment of the present invention further provides a memory allocation device, which is applied to an electronic device, where the memory of the electronic device includes a first memory area and a second memory area, and the device includes:
  • a receiving module configured to receive a memory allocation request, where the memory allocation request includes a required memory capacity
  • a comparison module configured to compare the required memory capacity with a capacity range of the preset memory block to obtain a comparison result
  • an allocation module configured to allocate a memory block of a corresponding capacity from the first memory area or the second memory area according to the comparison result.
  • the embodiment of the present invention further provides an electronic device, where the memory of the electronic device includes a first memory area and a second memory area, and the electronic device includes:
  • a memory allocation device the memory distribution device being mounted in the memory and including one or more software function modules executed by the processor, the device comprising:
  • a receiving module configured to receive a memory allocation request, where the memory allocation request includes a required memory capacity
  • a comparison module configured to compare the required memory capacity with a capacity range of the preset memory block to obtain a comparison result
  • an allocation module configured to allocate a memory block of a corresponding capacity from the first memory area or the second memory area according to the comparison result.
  • the embodiment of the present invention further provides a readable storage medium, the readable storage medium includes a computer program, and the electronic device that controls the readable storage medium is configured to execute the memory allocation method provided by the embodiment of the present invention.
  • the embodiment of the invention not only responds to the memory allocation requirement, but also manages the memory blocks of different sizes separately, which reduces the probability of fragmentation due to the mixed use of different sizes of memory blocks.
  • FIG. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.
  • FIG. 2 is a schematic flowchart diagram of a memory allocation method according to an embodiment of the present invention.
  • FIG. 3 is a second schematic flowchart of a memory allocation method according to an embodiment of the present invention.
  • FIG. 4 is a third schematic flowchart of a memory allocation method according to an embodiment of the present invention.
  • FIG. 5 is a schematic flowchart diagram of sub-steps included in step S150 of FIG. 4 according to an embodiment of the present invention.
  • FIG. 6 is a schematic structural diagram of a memory allocation apparatus according to an embodiment of the present invention.
  • FIG. 7 is a second schematic structural diagram of a memory allocation apparatus according to an embodiment of the present invention.
  • Icons 100 - electronic device; 110 - memory; 120 - memory controller; 130 - processor; 200 - memory allocation device; 210 - configuration module; 220 - receiving module; 230 - comparison module; Capacity adjustment module; 251 - detection sub-module; 252 - adjustment sub-module.
  • FIG. 1 is a schematic structural diagram of an electronic device 100 according to an embodiment of the present invention.
  • the electronic device 100 in the embodiment of the present invention may be, but not limited to, a smart phone, a tablet computer, or the like.
  • the electronic device 100 includes a memory 110, a storage controller 120, a processor 130, and a memory allocation device 200.
  • the memory 110, the storage controller 120, and the components of the processor 130 are electrically connected directly or indirectly to implement data transmission or interaction.
  • the components can be electrically connected to one another via one or more communication buses or signal lines.
  • a memory allocation device 200 is stored in the memory 110, and the memory allocation device 200 includes at least one software function module that can be stored in the memory 110 in the form of software or firmware.
  • the processor 130 performs various function applications and data processing by executing a software program and a module stored in the memory 110, such as the memory allocation device 200 in the embodiment of the present invention, that is, realizing memory allocation in the embodiment of the present invention. method.
  • the memory 110 may be, but not limited to, a random access memory (RAM), a read only memory (ROM), and a programmable read-only memory (PROM). Erasable Programmable Read-Only Memory (EPROM), Electric Erasable Programmable Read-Only Memory (EEPROM), and the like.
  • RAM random access memory
  • ROM read only memory
  • PROM programmable read-only memory
  • EPROM Erasable Programmable Read-Only Memory
  • EEPROM Electric Erasable Programmable Read-Only Memory
  • the memory 110 is configured to store a program, and the processor 130 executes the program after receiving an execution instruction. Access to the memory 110 by the processor 130 and other possible components can be performed under the control of the memory controller 120.
  • the memory 110 includes a memory of the foregoing type, and may also include a memory, also referred to as an internal memory, for temporarily storing operational data in the processor 130 during power-on, and may also be used for storage. Data acquired from the network, and data exchanged by external devices such as a hard disk.
  • the processor 130 may be an integrated circuit chip with signal processing capabilities.
  • the processor 130 described above may be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), and the like. It can also be a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, a discrete gate or transistor logic device, or a discrete hardware component.
  • DSP digital signal processor
  • ASIC application specific integrated circuit
  • FPGA field programmable gate array
  • the methods, steps, and logical block diagrams disclosed in the embodiments of the present invention may be implemented or carried out.
  • the general purpose processor may be a microprocessor or the processor or any conventional processor or the like.
  • FIG. 1 is merely illustrative, and the electronic device 100 may further include more or less components than those shown in FIG. 1, or have a different configuration than that shown in FIG.
  • the components shown in Figure 1 can be implemented in hardware, software, or a combination thereof.
  • FIG. 2 is a flowchart of a memory allocation method according to an embodiment of the present invention. The method is applied to the electronic device 100, and the memory of the electronic device 100 includes a first memory area and a second memory area. The specific process of the memory allocation method is described in detail below.
  • Step S120 receiving a memory allocation request.
  • the program running (for example, when browsing a webpage through a browser), a memory allocation request is often sent to the system to obtain a memory of a corresponding capacity to meet the need.
  • the memory allocation request includes a memory capacity that needs to be allocated.
  • Step S130 comparing the required memory capacity with a capacity range of the preset memory block to obtain a comparison result.
  • the system of the electronic device 100 after receiving the memory allocation requirement, allocates a memory block of a corresponding capacity by determining whether the required memory capacity is within a capacity range of the preset memory block. It is possible to distinguish between different sized memory blocks and manage memory blocks of different sizes separately.
  • the capacity range of the preset memory block can be set according to actual conditions (for example, different systems).
  • the minimum preset memory block may have a capacity of 4 kilobytes (KB), expressed as 4 KB*2 ⁇ 0, followed by 8 KB (4 KB*2 ⁇ 1), 16 KB (4 KB*). 2 ⁇ 2), ..., 1MB (4KB*2 ⁇ 8), 2MB (4KB*2 ⁇ 9), 4MB (4KB*2 ⁇ 10).
  • the number corresponding to the power of 2 is called order, then the smallest 4KB is order 0, and the largest 4MB is order 10.
  • the capacity range of the preset memory block is set to order 0 to order 10 (4 KB to 4 MB). Due to the difference of the system, the capacity range of the preset memory block can also be set to other ranges, for example, order 3 to order 10 (32 KB to 4 MB).
  • Step S140 allocating a memory block of a corresponding capacity from the first memory area or the second memory area according to the comparison result.
  • the purpose of separately managing memory blocks of different sizes is achieved, thereby reducing the size due to different sizes.
  • the probability of memory fragmentation occurring when the memory blocks are mixed.
  • Memory fragmentation refers to the fact that when the user needs a set capacity (denoted as N) and a continuous memory block, although the total amount of memory that can be used is greater than N, the size of each memory block is smaller than the user.
  • the demand for N causes the user's needs to be unsatisfied.
  • the first memory area allocates a preset memory block of a corresponding capacity.
  • the required memory capacity is within the capacity of the preset memory block, and the memory block corresponding to the allocation request may be a small-capacity memory block.
  • the small-capacity preset memory block is allocated from the first memory area, and the memory blocks of different sizes are separately managed.
  • the required allocated memory capacity is within the capacity range of the preset memory block, and the available memory capacity of the first memory area is smaller than the required allocated memory capacity (for example The available memory capacity of the first memory area is 0), and a preset memory block of a corresponding capacity is allocated from the second memory area.
  • the required memory capacity is within the capacity of the preset memory block
  • the memory block representing the allocation request may be a small-capacity memory block, but the available memory in the first memory area cannot satisfy the memory.
  • the small-capacity preset memory block is allocated from the second memory area to satisfy the memory allocation requirement.
  • a memory block of a corresponding capacity is allocated from the first memory area and/or the second memory area.
  • the memory capacity to be allocated is not within the capacity of the preset memory block, and the memory block representing the allocation request may be a large-capacity memory block.
  • the large-capacity memory block is allocated from the first memory area or the second memory area, thereby achieving separate management of memory blocks of different sizes.
  • the available memory capacity of the second memory area is greater than the memory capacity required to be allocated, a memory block of a corresponding capacity is allocated from the second memory area.
  • the required memory capacity is not within the capacity of the preset memory block, and it is detected that the available memory capacity in the second memory area is greater than the required memory capacity, the memory block of the corresponding capacity is allocated from the second memory area.
  • the available memory capacity in the second memory area refers to a continuous memory space that can be allocated in the second memory area.
  • the memory compaction is to make the usable memory adjacent to each other and to be synthesized into a single continuous memory space.
  • the mapping may include the following two cases.
  • One is a movable mapping.
  • the virtual address can dynamically adjust the mapping with the actual memory address (for example, in general, the memory used by the user uses the same virtual address, but can be dynamically mapped to a different actual memory address).
  • the other is an immovable mapping.
  • the mapping between the virtual address and the actual memory address cannot be changed (for example, the virtual address and physical memory address used by the driver or the operating system itself).
  • Memory reorganization is the dynamic adjustment of the entire movable mapping area to provide enough contiguous physical memory space to meet the demand.
  • FIG. 3 is a second schematic flowchart of a memory allocation method according to an embodiment of the present invention.
  • the method may further include step S110.
  • Step S110 configuring a memory of the electronic device 100, and configuring a memory of the electronic device 100 as a first memory area and a second memory area.
  • the electronic device 100 after the electronic device 100 is initialized, a part of memory is reserved from the memory of the electronic device 100 as the first memory area, and the remaining memory space of the memory is used as the second memory area.
  • the size of the first memory area may be set according to actual conditions (for example, the first memory area is set to 100 MB or 0, etc.).
  • FIG. 4 is a third schematic flowchart of a memory allocation method according to an embodiment of the present invention.
  • the method may further include step S150.
  • Step S150 adjusting the total capacity of the first memory area.
  • the total capacity of the first memory area may be adjusted according to actual conditions (for example, the usage of the memory in the first memory area), so that the first The memory of a memory area will not be used up, and the total capacity of the first memory area can be reduced when the available capacity of the first memory area is large to avoid waste.
  • FIG. 5 is a schematic flowchart diagram of sub-steps included in step S150 of FIG. 4 according to an embodiment of the present invention.
  • the step S150 may include sub-step S151 and sub-step S152.
  • Sub-step S151 detecting the available capacity in the first memory area.
  • the usage of the first memory area such as used capacity, available capacity, etc., may be obtained by detecting the first memory area.
  • Sub-step S152 adjusting the total capacity of the first memory area within a preset adjustable range according to a ratio of the available capacity in the first memory area to the total capacity of the first memory area.
  • the available capacity in the first memory area is compared with the total capacity of the first memory area to obtain a percentage of the total capacity of the first memory area in the first memory area. Adjusting the total capacity of the first memory area within a preset adjustable range according to the obtained ratio.
  • the preset adjustable range may be set according to actual conditions (for example, the preset adjustable range is 0 to the total memory capacity of the electronic device 100, 0 to 1 GB, etc.)
  • the ratio When the ratio is less than the first preset value, increasing the total capacity of the first memory area. When the ratio is greater than the second preset value, the total capacity of the first memory area is reduced. The second preset value is greater than the first preset value. The adjusted total capacity of the first memory area is still within the preset adjustable range.
  • the manner of increasing or decreasing may be that the system of the electronic device 100 automatically increases or decreases the set memory space according to the proportion (for example, 10 MB); or the operation of receiving the input, according to the setting of the operation. Increase or decrease the corresponding memory space for the total capacity of the first memory area.
  • the total capacity of the first memory area is preset to be 100 MB.
  • the used capacity is 95 MB in the first memory area and the available capacity is 5 MB
  • the total capacity of the first memory area is automatically increased by 10 MB
  • the total capacity of the first memory area is increased to 110 MB.
  • the used capacity is 30 MB in the first memory area and the available capacity is 70 MB
  • the total capacity of the first memory area is automatically reduced by 10 MB
  • the total capacity of the first memory area is reduced to 90 MB.
  • FIG. 6 is a schematic structural diagram of a memory allocation device 200 according to an embodiment of the present invention.
  • the memory allocation device 200 is applied to the electronic device 100.
  • the memory of the electronic device 100 includes a first memory area and a second memory area.
  • the memory allocation device 200 includes a receiving module 220, a comparing module 230, and an allocating module 240.
  • the receiving module 220 is configured to receive a memory allocation request, where the memory allocation request includes a memory capacity that needs to be allocated.
  • the receiving module 220 is configured to perform step S120 in FIG. 2 .
  • the receiving module 220 For a detailed description of the receiving module 220, reference may be made to the description of step S120 in FIG. 2 .
  • the comparing module 230 is configured to compare the required memory capacity with a capacity range of the preset memory block to obtain a comparison result.
  • the comparison module 230 is configured to perform step S130 in FIG. 2 .
  • the comparison module 230 For a detailed description of the comparison module 230, reference may be made to the description of step S130 in FIG. 2 .
  • the allocating module 240 is configured to allocate a memory block of a corresponding capacity from the first memory area or the second memory area according to the comparison result.
  • the manner in which the allocating module 240 allocates a memory block of a corresponding capacity from the first memory area or the second memory area according to the comparison result includes:
  • the allocation module 240 is configured to perform step S140 in FIG. 2, and a detailed description of the allocation module 240 may refer to the description of step S140 in FIG. 2.
  • FIG. 7 is a second schematic structural diagram of a memory allocation device 200 according to an embodiment of the present invention.
  • the memory allocation device 200 can also include a configuration module 210.
  • the configuration module 210 is configured to configure a memory of the electronic device 100, and configure a memory of the electronic device 100 as a first memory area and a second memory area.
  • the configuration module 210 is configured to perform step S110 in FIG. 3 .
  • the configuration module 210 For a detailed description of the configuration module 210, reference may be made to the description of step S110 in FIG. 3 .
  • the memory allocation device 200 may further include a capacity adjustment module 250.
  • the capacity adjustment module 250 is configured to adjust the total capacity of the first memory area.
  • the capacity adjustment module 250 can include:
  • the detecting submodule 251 is configured to detect an available capacity in the first memory area
  • the adjustment sub-module 252 is configured to adjust the total capacity of the first memory area within a preset adjustable capacity range according to a ratio of an available capacity in the first memory area to a total capacity of the first memory area .
  • the adjusting sub-module 252 adjusts the total capacity of the first memory area within a preset adjustable capacity range according to a ratio of an available capacity in the first memory area to a total capacity of the first memory area. Ways include:
  • the capacity adjustment module 250 is configured to perform step S150 in FIG. 4, and a detailed description of the capacity adjustment module 250 may refer to the description of step S150 in FIG.
  • the embodiment of the present invention further provides a readable storage medium, the readable storage medium comprising a computer program, the computer program controlling the electronic device 100 where the readable storage medium is located to perform the above memory allocation method, for example, FIG. 2 to The memory allocation method shown in any of the figures of FIG.
  • the embodiments of the present invention provide a memory allocation method, apparatus, electronic device, and readable storage medium.
  • the method is applied to an electronic device.
  • the electronic device receives a memory allocation request, wherein the allocation request includes a memory capacity that is required to be allocated. After comparing the required allocated memory capacity with the capacity range of the preset memory block, a comparison result is obtained. Therefore, a memory block of a corresponding capacity is allocated from the first memory area or the second memory area according to the comparison result, so that memory blocks of different sizes are separately managed. This reduces the chance of fragmentation due to the mixed use of memory blocks of different sizes.
  • Embodiments of the present invention provide a memory allocation method, apparatus, electronic device, and readable storage medium.
  • the memory of the electronic device includes a first memory area and a second memory area.
  • the method includes: receiving a memory allocation request, the memory allocation request includes a required memory capacity; comparing the required memory capacity with a capacity range of the preset memory block to obtain a comparison result; and comparing the result from the first memory
  • the area or the second memory area allocates a memory block of the corresponding capacity.
  • the method separately manages memory blocks of different sizes by allocating memory blocks in different memory areas, so that the memory is not fragmented due to the mixed use of memory blocks of different sizes, thereby reducing the probability of fragmentation.

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Abstract

本发明实施例提供一种内存分配方法、装置、电子设备及可读存储介质。电子设备的内存包括第一内存区及第二内存区。所述方法包括:接收内存分配请求,内存分配请求包括所需分配的内存容量;将所需分配的内存容量与预设内存块的容量范围进行比较,得到比较结果;根据比较结果从第一内存区或第二内存区分配相应容量的内存块。

Description

内存分配方法、装置、电子设备及可读存储介质
相关申请的交叉引用
本申请基于申请号为201710457637.7、申请日为2017年6月16日的中国专利申请提出,并要求该中国专利申请的优先权,该中国专利申请的内容在此引入本申请作为参考。
技术领域
本发明涉及计算机存储技术,具体而言,涉及一种内存分配方法、装置、电子设备及可读存储介质。
背景技术
相关技术中,在接收到内存分配请求时,电子设备直接从整个内存的可用内存块中去选用适合的区域,不区分所需内存容量的大小。由此,小容量的内存块不断分布在整个内存中。在系统运行一段时间后,系统内持续进行内存块的分配和释放,系统空闲物理内存被使用的内存块分割开,大块的连续物理内存块为0,空闲的内存块只能满足小容量的分配。也就是说,系统可能还有很多空闲的内存块,但是却无法满足大容量的内存分配需求,此时就是发生了内存碎片化。
在发生内存碎片化后,需要花费一定的时间来执行内存重整,以得到整块连续的存储空间。上述做法虽然得到了大容量的内存块,但在一定程度上会影响到用户的正常操作或造成消费额外电力等。
发明内容
本发明实施例提供一种内存分配方法、装置、电子设备及可读存储介 质,能够解决碎片化的问题。
本发明实施例提供一种内存分配方法,应用于电子设备,所述电子设备的内存包括第一内存区及第二内存区,所述方法包括:
接收内存分配请求,所述内存分配请求包括所需分配的内存容量;
将所述所需分配的内存容量与预设内存块的容量范围进行比较,得到比较结果;
根据所述比较结果从第一内存区或第二内存区分配相应容量的内存块。
本发明实施例还提供一种内存分配装置,应用于电子设备,所述电子设备的内存包括第一内存区及第二内存区,所述装置包括:
接收模块,配置为接收内存分配请求,所述内存分配请求包括所需分配的内存容量;
比较模块,配置为将所述所需分配的内存容量与预设内存块的容量范围进行比较,得到比较结果;
分配模块,配置为根据所述比较结果从第一内存区或第二内存区分配相应容量的内存块。
本发明实施例还提供一种电子设备,所述电子设备的内存包括第一内存区及第二内存区,所述电子设备包括:
存储器;
处理器;及
内存分配装置,所述内存分配装置安装于所述存储器中并包括一个或多个由所述处理器执行的软件功能模块,所述装置包括:
接收模块,配置为接收内存分配请求,所述内存分配请求包括所需分配的内存容量;
比较模块,配置为将所述所需分配的内存容量与预设内存块的容量范 围进行比较,得到比较结果;
分配模块,配置为根据所述比较结果从第一内存区或第二内存区分配相应容量的内存块。
本发明实施例还提供一种可读存储介质,所述可读存储介质包括计算机程序,所述计算机程序运行时控制所述可读存储介质所在电子设备执行本发明实施例提供的内存分配方法。
本发明实施例具有以下有益效果:
本发明实施例不仅对内存分配需求进行了响应,同时将不同大小的内存块分开管理,降低了由于不同大小的内存块混合使用而发生碎片化的几率。
附图说明
为了更清楚地说明本发明实施例的技术方案,下面将对实施例中所需要使用的附图作简单地介绍,应当理解,以下附图仅示出了本发明的某些实施例,因此不应被看作是对范围的限定,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他相关的附图。
图1是本发明实施例提供的电子设备的结构示意图。
图2是本发明实施例提供的内存分配方法的流程示意图之一。
图3是本发明实施例提供的内存分配方法的流程示意图之二。
图4是本发明实施例提供的内存分配方法的流程示意图之三。
图5是本发明实施例提供的图4中步骤S150包括的子步骤的流程示意图。
图6是本发明实施例提供的内存分配装置的结构示意图之一。
图7是本发明实施例提供的内存分配装置的结构示意图之二。
图标:100-电子设备;110-存储器;120-存储控制器;130-处理器;200-内存分配装置;210-配置模块;220-接收模块;230-比较模块;240-分配模 块;250-容量调整模块;251-检测子模块;252-调整子模块。
具体实施方式
下面将结合本发明实施例中附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。通常在此处附图中描述和示出的本发明实施例的组件可以以各种不同的配置来布置和设计。因此,以下对在附图中提供的本发明的实施例的详细描述并非旨在限制要求保护的本发明的范围,而是仅仅表示本发明的选定实施例。基于本发明的实施例,本领域技术人员在没有做出创造性劳动的前提下所获得的所有其他实施例,都属于本发明保护的范围。
应注意到:相似的标号和字母在下面的附图中表示类似项,因此,一旦某一项在一个附图中被定义,则在随后的附图中不需要对其进行进一步定义和解释。同时,在本发明的描述中,术语“第一”、“第二”等仅用于区分描述,而不能理解为指示或暗示相对重要性。
下面结合附图,对本发明的一些实施方式作详细说明。在不冲突的情况下,下述的实施例及实施例中的特征可以相互组合。
请参照图1,图1是本发明实施例提供的电子设备100的结构示意图。本发明实施例中所述电子设备100可以是,但不限于,智能手机、平板电脑等。所述电子设备100包括:存储器110、存储控制器120、处理器130以及内存分配装置200。
所述存储器110、存储控制器120及处理器130各元件之间直接或间接地电性连接,以实现数据的传输或交互。例如,这些元件相互之间可通过一条或多条通讯总线或信号线实现电性连接。存储器110中存储有内存分配装置200,所述内存分配装置200包括至少一个可以软件或固件(firmware)的形式存储于所述存储器110中的软件功能模块。所述处理器 130通过运行存储在存储器110内的软件程序以及模块,如本发明实施例中的内存分配装置200,从而执行各种功能应用以及数据处理,即实现本发明实施例中的内存分配方法。
其中,所述存储器110可以是,但不限于,随机存取存储器(Random Access Memory,RAM),只读存储器(Read Only Memory,ROM),可编程只读存储器(Programmable Read-Only Memory,PROM),可擦除只读存储器(Erasable Programmable Read-Only Memory,EPROM),电可擦除只读存储器(Electric Erasable Programmable Read-Only Memory,EEPROM)等。其中,存储器110配置为存储程序,所述处理器130在接收到执行指令后,执行所述程序。所述处理器130以及其他可能的组件对存储器110的访问可在所述存储控制器120的控制下进行。
在一些实施例中,存储器110除了包括前述类型的存储器,还可以包括内存(Memory),也称为内存储器,用于在上电期间暂时存放处理器130中的运算数据,还可以用于存储从网络获取的数据、以及硬盘等外部设备交换的数据等。
所述处理器130可能是一种集成电路芯片,具有信号的处理能力。上述的处理器130可以是通用处理器,包括中央处理器(Central Processing Unit,CPU)、网络处理器(Network Processor,NP)等。还可以是数字信号处理器(DSP)、专用集成电路(ASIC)、现场可编程门阵列(FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件。可以实现或者执行本发明实施例中的公开的各方法、步骤及逻辑框图。通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。
可以理解,图1所示的结构仅为示意,电子设备100还可包括比图1中所示更多或者更少的组件,或者具有与图1所示不同的配置。图1中所示的各组件可以采用硬件、软件或其组合实现。
请参照图2,图2是本发明实施例提供的内存分配方法的流程图之一。所述方法应用于所述电子设备100,所述电子设备100的内存包括第一内存区及第二内存区。下面对内存分配方法的具体流程进行详细阐述。
步骤S120,接收内存分配请求。
在本发明实施例中,所述电子设备100上运行有很多程序,在程序运行时(比如,通过浏览器浏览网页时),经常会向系统发送内存分配请求,获得相应容量的内存以满足需要。其中,所述内存分配请求包括所需分配的内存容量。
步骤S130,将所述所需分配的内存容量与预设内存块的容量范围进行比较,得到比较结果。
在本发明实施例中,所述电子设备100的系统在接收到内存分配需求后,通过判定所需分配的内存容量是否在预设内存块的容量范围内,从而分配相应容量的内存块,同时可以区分不同大小的内存块及将不同大小的内存块分开管理。其中,预设内存块的容量范围可以根据实际情况(比如,系统不同)进行设置。
在本发明的一些实施例中,最小的预设内存块的容量可以是4千字节(KB),表示为4KB*2^0,接着为8KB(4KB*2^1)、16KB(4KB*2^2)、…、1MB(4KB*2^8),2MB(4KB*2^9),4MB(4KB*2^10)。将对应2的次方的数字称为order,那么,最小的4KB即为order 0,最大的4MB即为order 10。在本发明的另一些实施例中,将所述预设内存块的容量范围设置为order 0~order 10(4KB~4MB)。由于系统的不同,所述预设内存块的容量范围也可以设置成其他范围,比如,order 3~order 10(32KB~4MB)。
步骤S140,根据所述比较结果从第一内存区或第二内存区分配相应容量的内存块。
在本发明实施例中,通过根据所述比较结果从第一内存区或第二内存 区分配相应容量的内存块,实现了对不同大小的内存块分开管理的目的,由此可降低由于不同大小的内存块混合使用而发生内存碎片化的几率。其中,内存碎片化(Memory fragmentation)是指在用户需要一块设定容量(记为N)且连续的内存块时,虽然可使用内存总量大于N,但是每一个内存块的容量大小都小于用户需求的N,导致用户需求无法被满足。
在本发明实施例中,若所述所需分配的内存容量在所述预设内存块的容量范围内,且所述第一内存区的可用内存容量大于所述所需分配的内存容量,从第一内存区分配相应容量的预设内存块。所需分配的内存容量在预设内存块的容量范围内,表征对应所述分配请求的内存块可能为小容量的内存块。在第一内存区中的可用内存能够满足所述内存分配需求时,从第一内存区分配该小容量的预设内存块,实现了对不同大小的内存块分开管理的目的。
在本发明实施例中,若所述所需分配的内存容量在所述预设内存块的容量范围内,且所述第一内存区的可用内存容量小于所述所需分配的内存容量(比如,第一内存区的可用内存容量为0),从第二内存区分配相应容量的预设内存块。虽然所需分配的内存容量在预设内存块的容量范围内,表征对应所述分配请求的内存块可能为小容量的内存块,但是由于第一内存区中的可用内存不能够满足所述内存分配需求时,从第二内存区分配该小容量的预设内存块以满足所述内存分配需求。
在本发明实施例中,若所述所需分配的内存容量不在所述预设内存块的容量范围内,从第一内存区和/或第二内存区分配相应容量的内存块。所需分配的内存容量不在预设内存块的容量范围内,表征对应所述分配请求的内存块可能为大容量的内存块。从第一内存区或第二内存区分配该大容量的内存块,实现了对不同大小的内存块分开管理的目的。
举例来说,在上述情形下,若所述第二内存区的可用内存容量大于所 述所需分配的内存容量,从所述第二内存区分配相应容量的内存块。在所需分配的内存容量不在预设内存块的容量范围内,且经检测发现第二内存区中的可用内存容量大于所需分配的内存容量时,从第二内存区分配相应容量的内存块,可以使第二内存区管理大容量的内存块。其中,上述第二内存区中的可用内存容量是指第二内存区中连续、可被分配的内存空间。
若所述第二内存区的可用内存容量小于所述所需分配的内存容量,则进行内存重整以从所述第一内存区和/或所述第二内存区获得能够满足所述所需分配的内存容量的内存块。其中,内存重整(Memory compaction)是让可使用的内存相邻,从而合成为一整块连续的内存空间。
在操作系统中,虚拟地址跟实际内存是需要映射转换的,作为示例,映射可以包括以下两种情况。一种是可移动的映射,虚拟地址跟实际内存地址能够动态调整映射(比如:一般情况下,用户使用的内存使用的是相同的虚拟地址,但是可以动态映射到不同的实际内存地址)。另一种是不可移动的映射,虚拟地址跟实际内存地址之间的映射不能改动(比如:驱动程序或是操作系统本身使用到的虚拟地址跟物理内存地址)。而内存重整就是将可移动的映射区域整体进行动态调整,以提供足够大的连续物理内存空间以满足需求。
请参照图3,图3是本发明实施例提供的内存分配方法的流程示意图之二,所述方法还可以包括步骤S110。
步骤S110,对所述电子设备100的内存进行配置,将所述电子设备100的内存配置为第一内存区和第二内存区。
在本发明实施例中,在所述电子设备100初始化之后,从所述电子设备100的内存中先预留一部分内存作为第一内存区,内存的其余内存空间则作为第二内存区。其中,第一内存区的大小可以根据实际情况进行设置(比如,第一内存区设置为100MB或0等)。
请参照图4,图4是本发明实施例提供的内存分配方法的流程示意图之三。所述方法还可以包括步骤S150。
步骤S150,对所述第一内存区的总容量进行调整。
在本发明实施例中,通过内存配置得到第一内存区后,可以根据实际情况(比如,第一内存区中内存的使用情况)将第一内存区的总容量进行调整,从而使得所述第一内存区的内存不会被用尽,还可以在第一内存区的可用容量很多时,缩小第一内存区的总容量,以避免浪费。
请参照图5,图5是本发明实施例提供的图4中步骤S150包括的子步骤的流程示意图。所述步骤S150可以包括子步骤S151及子步骤S152。
子步骤S151,对所述第一内存区中的可用容量进行检测。
在本发明的一些实施例中,通过对所述第一内存区进行检测,可获得所述第一内存区的使用情况,比如,已用容量、可用容量等。
子步骤S152,根据所述第一内存区中的可用容量与所述第一内存区的总容量的占比,在预设可调范围内调整所述第一内存区的总容量。
在本发明的一些实施例中,将第一内存区中的可用容量与第一内存区的总容量进行比较,得到第一内存区中的可用容量在第一内存区的总容量的占比。根据得到的所述占比在预设可调范围内对第一内存区的总容量进行调整。其中,预设可调范围可以根据实际情况进行设定(比如,预设可调范围是0至电子设备100的内存的总容量、0~1GB等。)
当所述占比小于第一预设值时,增大所述第一内存区的总容量。当所述占比大于第二预设值时,减小所述第一内存区的总容量。其中,所述第二预设值大于所述第一预设值。调整后的所述第一内存区的总容量依然在所述预设可调范围内。
其中,增大或减小的方式可以是电子设备100的系统自动根据占比依次增大或减小设定的内存空间(比如,10MB);也可以是接收输入的操作, 根据操作的设定,对第一内存区的总容量增大或减小相应的内存空间。
接下来以举例介绍如何调整第一内存区的总容量。
预先设置第一内存区的总容量为100MB。在第一内存区中已用容量为95MB,可用容量为5MB时,所述第一内存区的总容量自动增大10MB,所述第一内存区的总容量增大为110MB。在第一内存区中已用容量为30MB,可用容量为70MB时,所述第一内存区的总容量自动减小10MB,所述第一内存区的总容量减小为90MB。由此,避免第一内存区的内存空间被用尽,或第一内存区的空闲内存空间过多的情况。
请参照图6,图6是本发明实施例提供的内存分配装置200的结构示意图之一。所述内存分配装置200应用于电子设备100。所述电子设备100的内存包括第一内存区及第二内存区。所述内存分配装置200包括接收模块220、比较模块230及分配模块240。
接收模块220,配置为接收内存分配请求,所述内存分配请求包括所需分配的内存容量。
在本发明实施例中,所述接收模块220配置为执行图2中的步骤S120,关于所述接收模块220的具体描述可以参照图2中步骤S120的描述。
比较模块230,配置为将所述所需分配的内存容量与预设内存块的容量范围进行比较,得到比较结果。
在本发明实施例中,所述比较模块230配置为执行图2中的步骤S130,关于所述比较模块230的具体描述可以参照图2中步骤S130的描述。
分配模块240,配置为根据所述比较结果从第一内存区或第二内存区分配相应容量的内存块。
所述分配模块240根据所述比较结果从第一内存区或第二内存区分配相应容量的内存块的方式包括:
若所述所需分配的内存容量在所述预设内存块的容量范围内,且所述 第一内存区的可用内存容量大于所述所需分配的内存容量,从第一内存区分配相应容量的预设内存块;
若所述所需分配的内存容量在所述预设内存块的容量范围内,且所述第一内存区的可用内存容量小于所述所需分配的内存容量,从第二内存区分配相应容量的预设内存块;
若所述所需分配的内存容量不在所述预设内存块的容量范围内,从第一内存区或第二内存区分配相应容量的内存块。
在本发明实施例中,所述分配模块240配置为执行图2中的步骤S140,关于所述分配模块240的具体描述可以参照图2中步骤S140的描述。
请参照图7,图7是本发明实施例提供的内存分配装置200的结构示意图之二。所述内存分配装置200还可以包括配置模块210。
配置模块210,配置为对所述电子设备100的内存进行配置,将所述电子设备100的内存配置为第一内存区和第二内存区。
在本发明实施例中,所述配置模块210配置为执行图3中的步骤S110,关于所述配置模块210的具体描述可以参照图3中步骤S110的描述。
请再次参照图7,所述内存分配装置200还可以包括容量调整模块250。容量调整模块250,配置为对所述第一内存区的总容量进行调整。
所述容量调整模块250可以包括:
检测子模块251,配置为对所述第一内存区中的可用容量进行检测;
调整子模块252,配置为根据所述第一内存区中的可用容量与所述第一内存区的总容量的占比,在预设可调容量范围内调整所述第一内存区的总容量。
其中,调整子模块252根据所述第一内存区中的可用容量与所述第一内存区的总容量的占比,在预设可调容量范围内调整所述第一内存区的总容量的方式包括:
当所述占比小于第一预设值时,增大所述第一内存区的总容量;
当所述占比大于第二预设值时,减小所述第一内存区的总容量,其中,所述第二预设值大于所述第一预设值。
在本实施中,所述容量调整模块250配置为执行图4中的步骤S150,关于所述容量调整模块250的具体描述可以参照图4中步骤S150的描述。
本发明实施例还提供一种可读存储介质,所述可读存储介质包括计算机程序,所述计算机程序运行时控制所述可读存储介质所在电子设备100执行上述内存分配方法,例如图2至图5任一附图示出的内存分配方法。
综上所述,本发明实施例提供一种内存分配方法、装置、电子设备及可读存储介质。所述方法应用于电子设备。所述电子设备接收内存分配请求,其中,所述分配请求中包括所需分配的内存容量。在将所述所需分配的内存容量与预设内存块的容量范围进行比较后,得到一比较结果。从而根据所述比较结果从第一内存区或第二内存区分配相应容量的内存块,以将不同大小的内存块分开管理。由此降低目前由于不同大小的内存块混合使用而发生碎片化的几率。
以上所述仅为本发明的实施例而已,并不用于限制本发明,对于本领域的技术人员来说,本发明可以有各种更改和变化。凡在本发明的精神和原则之内,所作的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。
工业实用性
本发明实施例提供一种内存分配方法、装置、电子设备及可读存储介质。电子设备的内存包括第一内存区及第二内存区。所述方法包括:接收内存分配请求,内存分配请求包括所需分配的内存容量;将所需分配的内存容量与预设内存块的容量范围进行比较,得到比较结果;根据比较结果从第一内存区或第二内存区分配相应容量的内存块。所述方法通过在不同 的内存区分配内存块,将不同大小的内存块分开管理,使得内存不会因为不同大小的内存块的混合使用而造成碎片化,由此,降低碎片化的发生几率。

Claims (13)

  1. 一种内存分配方法,应用于电子设备,所述电子设备的内存包括第一内存区及第二内存区,所述方法包括:
    接收内存分配请求,所述内存分配请求包括所需分配的内存容量;
    将所述所需分配的内存容量与预设内存块的容量范围进行比较,得到比较结果;
    根据所述比较结果从第一内存区或第二内存区分配相应容量的内存块。
  2. 根据权利要求1所述的方法,其中,所述根据所述比较结果从第一内存区或第二内存区分配相应容量的内存块,包括:
    若所述所需分配的内存容量在所述预设内存块的容量范围内,且所述第一内存区的可用内存容量大于所述所需分配的内存容量,从第一内存区分配相应容量的预设内存块;
    若所述所需分配的内存容量在所述预设内存块的容量范围内,且所述第一内存区的可用内存容量小于所述所需分配的内存容量,从第二内存区分配相应容量的预设内存块;
    若所述所需分配的内存容量不在所述预设内存块的容量范围内,从第一内存区和/或第二内存区分配相应容量的内存块。
  3. 根据权利要求2所述的方法,其中,所述所需分配的内存容量不在所述预设内存块的容量范围内,从第一内存区或第二内存区分配相应容量的内存块,包括:
    若所述第二内存区的可用内存容量大于所述所需分配的内存容量,从所述第二内存区分配相应容量的内存块;
    若所述第二内存区的可用内存容量小于所述所需分配的内存容量,则进行内存重整以从所述第一内存区和/或所述第二内存区获得能够满足所述 所需分配的内存容量的内存块。
  4. 根据权利要求1所述的方法,其中,所述方法还包括:
    对所述电子设备的内存进行配置,将所述电子设备的内存配置为第一内存区和第二内存区。
  5. 根据权利要求1所述的方法,其中,所述方法还包括:
    对所述第一内存区的总容量进行调整;
    所述对所述第一内存区的总容量进行调整,包括:
    对所述第一内存区中的可用容量进行检测;
    根据所述第一内存区中的可用容量与所述第一内存区的总容量的占比,在预设可调容量范围内调整所述第一内存区的总容量。
  6. 根据权利要求5所述的方法,其中,所述根据所述第一内存区中的可用容量与所述第一内存区的总容量的占比,在预设可调容量范围内调整所述第一内存区的总容量,包括:
    当所述占比小于第一预设值时,增大所述第一内存区的总容量;
    当所述占比大于第二预设值时,减小所述第一内存区的总容量,其中,所述第二预设值大于所述第一预设值。
  7. 一种内存分配装置,应用于电子设备,所述电子设备的内存包括第一内存区及第二内存区,所述装置包括:
    接收模块,配置为接收内存分配请求,所述内存分配请求包括所需分配的内存容量;
    比较模块,配置为将所述所需分配的内存容量与预设内存块的容量范围进行比较,得到比较结果;
    分配模块,配置为根据所述比较结果从第一内存区或第二内存区分配相应容量的内存块。
  8. 根据权利要求7所述的装置,其中,所述分配模块还配置为:
    若所述所需分配的内存容量在所述预设内存块的容量范围内,且所述第一内存区的可用内存容量大于所述所需分配的内存容量,从第一内存区分配相应容量的预设内存块;
    若所述所需分配的内存容量在所述预设内存块的容量范围内,且所述第一内存区的可用内存容量小于所述所需分配的内存容量,从第二内存区分配相应容量的预设内存块;
    若所述所需分配的内存容量不在所述预设内存块的容量范围内,从第一内存区和/或第二内存区分配相应容量的内存块。
  9. 根据权利要求7所述的装置,其中,所述装置还包括:
    配置模块,配置为对所述电子设备的内存进行配置,将所述电子设备的内存配置为第一内存区和第二内存区。
  10. 根据权利要求7所述的装置,其中,所述装置还包括:
    容量调整模块,配置为对所述第一内存区的总容量进行调整;
    所述容量调整模块包括:
    检测子模块,配置为对所述第一内存区中的可用容量进行检测;
    调整子模块,配置为根据所述第一内存区中的可用容量与所述第一内存区的总容量的占比,在预设可调容量范围内调整所述第一内存区的总容量。
  11. 根据权利要求10所述的装置,其中,所述调整子模块还配置为:
    当所述占比小于第一预设值时,增大所述第一内存区的总容量;
    当所述占比大于第二预设值时,减小所述第一内存区的总容量,其中,所述第二预设值大于所述第一预设值。
  12. 一种电子设备,所述电子设备的内存包括第一内存区及第二内存区,所述电子设备包括:
    存储器;
    处理器;及
    内存分配装置,所述内存分配装置安装于所述存储器中并包括一个或多个由所述处理器执行的软件功能模块,所述装置包括:
    接收模块,配置为接收内存分配请求,所述内存分配请求包括所需分配的内存容量;
    比较模块,配置为将所述所需分配的内存容量与预设内存块的容量范围进行比较,得到比较结果;
    分配模块,配置为根据所述比较结果从第一内存区或第二内存区分配相应容量的内存块。
  13. 一种可读存储介质,所述可读存储介质包括计算机程序,所述计算机程序运行时控制所述可读存储介质所在电子设备执行权利要求1-6中任意一项所述的内存分配方法。
PCT/CN2018/090620 2017-06-16 2018-06-11 内存分配方法、装置、电子设备及可读存储介质 WO2018228327A1 (zh)

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