WO2018205175A1 - 射频电路开关芯片、射频电路、天线装置及电子设备 - Google Patents

射频电路开关芯片、射频电路、天线装置及电子设备 Download PDF

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Publication number
WO2018205175A1
WO2018205175A1 PCT/CN2017/083842 CN2017083842W WO2018205175A1 WO 2018205175 A1 WO2018205175 A1 WO 2018205175A1 CN 2017083842 W CN2017083842 W CN 2017083842W WO 2018205175 A1 WO2018205175 A1 WO 2018205175A1
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WIPO (PCT)
Prior art keywords
switch
radio frequency
filter
sub
port
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2017/083842
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English (en)
French (fr)
Inventor
丛明
冯斌
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Guangdong Oppo Mobile Telecommunications Corp Ltd
Original Assignee
Guangdong Oppo Mobile Telecommunications Corp Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Guangdong Oppo Mobile Telecommunications Corp Ltd filed Critical Guangdong Oppo Mobile Telecommunications Corp Ltd
Priority to CN201780089421.8A priority Critical patent/CN110537331B/zh
Priority to PCT/CN2017/083842 priority patent/WO2018205175A1/zh
Publication of WO2018205175A1 publication Critical patent/WO2018205175A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40—Circuits

Definitions

  • the present invention relates to the field of communications technologies, and in particular, to a radio frequency circuit switch chip, a radio frequency circuit, an antenna device, and an electronic device.
  • LTE Long Term The Evolution, Long Term Evolution communication signal may include signals having a frequency between 700 MHz and 2700 MHz.
  • the radio frequency signals that the mobile terminal can support can be divided into a low frequency signal, an intermediate frequency signal, and a high frequency signal.
  • the low frequency signal, the intermediate frequency signal, and the high frequency signal each include a plurality of sub-band signals. Each sub-band signal needs to be transmitted to the outside through the antenna.
  • carrier aggregation carrier Aggregation
  • CA carrier aggregation
  • multiple sub-band signals can be aggregated together to improve the uplink and downlink transmission rates of the network.
  • the frequency resources of various communication markets around the world are different. Communication carriers in different areas have different communication spectrum allocations, so there are different carrier aggregation requirements for carrier aggregation, and there is also a need for frequency bands that do not require carrier aggregation.
  • the frequency band of the radio frequency signal or the carrier aggregation signal that the current mobile terminal can transmit and receive is single, lacking in diversity, and cannot meet the above requirements.
  • the embodiment of the invention provides a radio frequency circuit switch chip, a radio frequency circuit, an antenna device and an electronic device, which can improve the diversity of the radio frequency signal transmitted and received by the electronic device.
  • an embodiment of the present invention provides a radio frequency circuit switch chip, where the radio frequency circuit switch chip includes a first switch, a second switch, a first filter, a second filter, a first impedance adjuster, and a second impedance adjustment.
  • the first switch outputs a high frequency signal or an intermediate frequency signal
  • the second switch outputs a low frequency signal
  • the first switch, the first filter and the first impedance adjuster are sequentially connected, the second switch, the second filter, and
  • the second impedance adjusters are connected in sequence;
  • the radio frequency circuit switch chip When the first switch is turned on and the second switch is turned off, the radio frequency circuit switch chip transmits and receives a high frequency signal or an intermediate frequency signal;
  • the radio frequency circuit switch chip When the first switch is turned off and the second switch is turned on, the radio frequency circuit switch chip transmits and receives a low frequency signal
  • the radio frequency circuit switch chip transmits and receives a carrier aggregation signal
  • the carrier aggregation signal is a carrier aggregation signal of a high frequency signal and a low frequency signal, or a carrier aggregation signal of an intermediate frequency signal and a low frequency signal.
  • the embodiment of the present invention further provides a radio frequency circuit, where the radio frequency circuit includes a radio frequency transceiver, a radio frequency circuit switch chip, and an antenna, and the radio frequency transceiver, the radio frequency circuit switch chip, and the antenna are sequentially connected;
  • the RF circuit switch chip includes a first switch, a second switch, a first filter, a second filter, a first impedance adjuster, and a second impedance adjuster, the first switch outputting a high frequency signal or an intermediate frequency signal, the first The second switch outputs a low frequency signal, the first switch, the first filter and the first impedance adjuster are sequentially connected, and the second switch, the second filter and the second impedance adjuster are sequentially connected;
  • the radio frequency circuit switch chip When the first switch is turned on and the second switch is turned off, the radio frequency circuit switch chip transmits and receives a high frequency signal or an intermediate frequency signal;
  • the radio frequency circuit switch chip When the first switch is turned off and the second switch is turned on, the radio frequency circuit switch chip transmits and receives a low frequency signal
  • the radio frequency circuit switch chip transmits and receives a carrier aggregation signal
  • the carrier aggregation signal is a carrier aggregation signal of a high frequency signal and a low frequency signal, or a carrier aggregation signal of an intermediate frequency signal and a low frequency signal.
  • an embodiment of the present invention further provides an antenna device, where the antenna device includes a radio frequency circuit, and the radio frequency circuit includes a radio frequency transceiver, a radio frequency circuit switch chip, and an antenna, and the radio frequency transceiver, the radio frequency circuit switch chip, and the antenna are sequentially connected. ;
  • the RF circuit switch chip includes a first switch, a second switch, a first filter, a second filter, a first impedance adjuster, and a second impedance adjuster, the first switch outputting a high frequency signal or an intermediate frequency signal, the first The second switch outputs a low frequency signal, the first switch, the first filter and the first impedance adjuster are sequentially connected, and the second switch, the second filter and the second impedance adjuster are sequentially connected;
  • the radio frequency circuit switch chip When the first switch is turned on and the second switch is turned off, the radio frequency circuit switch chip transmits and receives a high frequency signal or an intermediate frequency signal;
  • the radio frequency circuit switch chip When the first switch is turned off and the second switch is turned on, the radio frequency circuit switch chip transmits and receives a low frequency signal
  • the radio frequency circuit switch chip transmits and receives a carrier aggregation signal
  • the carrier aggregation signal is a carrier aggregation signal of a high frequency signal and a low frequency signal, or a carrier aggregation signal of an intermediate frequency signal and a low frequency signal.
  • an embodiment of the present invention further provides an electronic device including a housing and a circuit board, wherein the circuit board is installed inside the housing, and the circuit board is provided with a radio frequency circuit, and the radio frequency circuit includes radio frequency transceiver The radio frequency circuit switch chip and the antenna, the radio frequency transceiver, the radio frequency circuit switch chip and the antenna are connected in sequence;
  • the RF circuit switch chip includes a first switch, a second switch, a first filter, a second filter, a first impedance adjuster, and a second impedance adjuster, the first switch outputting a high frequency signal or an intermediate frequency signal, the first The second switch outputs a low frequency signal, the first switch, the first filter and the first impedance adjuster are sequentially connected, and the second switch, the second filter and the second impedance adjuster are sequentially connected;
  • the radio frequency circuit switch chip When the first switch is turned on and the second switch is turned off, the radio frequency circuit switch chip transmits and receives a high frequency signal or an intermediate frequency signal;
  • the radio frequency circuit switch chip When the first switch is turned off and the second switch is turned on, the radio frequency circuit switch chip transmits and receives a low frequency signal
  • the radio frequency circuit switch chip transmits and receives a carrier aggregation signal
  • the carrier aggregation signal is a carrier aggregation signal of a high frequency signal and a low frequency signal, or a carrier aggregation signal of an intermediate frequency signal and a low frequency signal.
  • the embodiment of the invention provides a radio frequency circuit switch chip, a radio frequency circuit, an antenna device and an electronic device, which can improve the diversity of the radio frequency signal transmitted and received by the electronic device.
  • FIG. 1 is an exploded perspective view of an electronic device according to an embodiment of the present invention.
  • FIG. 2 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.
  • FIG. 3 is a schematic diagram of a first structure of a radio frequency circuit according to an embodiment of the present invention.
  • FIG. 4 is a schematic diagram of a second structure of a radio frequency circuit according to an embodiment of the present invention.
  • FIG. 5 is a third schematic structural diagram of a radio frequency circuit according to an embodiment of the present invention.
  • FIG. 6 is a schematic diagram of a fourth structure of a radio frequency circuit according to an embodiment of the present invention.
  • FIG. 7 is a first schematic structural diagram of a radio frequency circuit switch chip according to an embodiment of the present invention.
  • FIG. 8 is a schematic diagram of a second structure of a radio frequency circuit switch chip according to an embodiment of the present invention.
  • FIG. 9 is a third schematic structural diagram of a radio frequency circuit switch chip according to an embodiment of the present invention.
  • FIG. 10 is a fourth structural diagram of a radio frequency circuit switch chip according to an embodiment of the present invention.
  • FIG. 11 is a fifth structural diagram of a radio frequency circuit switch chip according to an embodiment of the present invention.
  • FIG. 12 is a fifth structural diagram of a radio frequency circuit according to an embodiment of the present invention.
  • FIG. 13 is another schematic structural diagram of an electronic device according to an embodiment of the present invention.
  • first and second are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated.
  • features defining “first” or “second” may include one or more of the described features either explicitly or implicitly.
  • the meaning of "a plurality” is two or more unless specifically and specifically defined otherwise.
  • connection In the description of the present invention, it should be noted that the terms “installation”, “connected”, and “connected” are to be understood broadly, and may be fixed or detachable, for example, unless otherwise explicitly defined and defined. Connected, or integrally connected; may be mechanically connected, may be electrically connected or may communicate with each other; may be directly connected, or may be indirectly connected through an intermediate medium, may be internal communication of two elements or interaction of two elements relationship.
  • Connected, or integrally connected may be mechanically connected, may be electrically connected or may communicate with each other; may be directly connected, or may be indirectly connected through an intermediate medium, may be internal communication of two elements or interaction of two elements relationship.
  • the specific meanings of the above terms in the present invention can be understood on a case-by-case basis.
  • the first feature "on” or “under” the second feature may include direct contact of the first and second features, and may also include first and second features, unless otherwise specifically defined and defined. It is not in direct contact but through additional features between them.
  • the first feature "above”, “above” and “above” the second feature includes the first feature directly above and above the second feature, or merely indicating that the first feature level is higher than the second feature.
  • the first feature “below”, “below” and “below” the second feature includes the first feature directly below and below the second feature, or merely the first feature level being less than the second feature.
  • Embodiments of the present invention provide an electronic device.
  • the electronic device can be a device such as a smartphone or a tablet.
  • the electronic device 100 includes a cover 101, a display screen 102, a circuit board 103, a battery 104, and a housing 105.
  • the cover plate 101 is mounted to the display screen 102 to cover the display screen 102.
  • the cover plate 101 may be a transparent glass cover.
  • the cover plate 101 can be a glass cover plate made of a material such as sapphire.
  • the display screen 102 is mounted on the housing 105 to form a display surface of the electronic device 100.
  • the display screen 102 can include a display area 102A and a non-display area 102B.
  • the display area 102A is for displaying information such as images, texts, and the like.
  • the non-display area 102B does not display information.
  • the bottom of the non-display area 102B may be provided with functional components such as a fingerprint module and a touch circuit.
  • the circuit board 103 is mounted inside the housing 105.
  • the circuit board 103 can be a motherboard of the electronic device 100.
  • Functional components such as a camera, a proximity sensor, and a processor can be integrated on the circuit board 103.
  • the display screen 102 can be electrically connected to the circuit board 103.
  • the radio frequency (RF, Radio) is provided on the circuit board 103.
  • Frequency Frequency
  • the radio frequency circuit can communicate with a network device (eg, a server, a base station, etc.) or other electronic device (eg, a smart phone, etc.) through a wireless network to complete transceiving information with the network device or other electronic device.
  • a network device eg, a server, a base station, etc.
  • other electronic device eg, a smart phone, etc.
  • the radio frequency circuit 200 includes a radio frequency transceiver 21, a power amplifying unit 22, a filtering unit 23, a radio frequency circuit switching chip 24, and an antenna 25.
  • the power amplifying unit 22, the filtering unit 23, the radio frequency circuit switching chip 24, and the antenna 25 are sequentially connected.
  • the radio frequency transceiver 21 has a transmit port TX and a receive port RX.
  • the transmitting port TX is used to transmit a radio frequency signal (uplink signal), and the receiving port RX is used to receive a radio frequency signal (downlink signal).
  • the transmitting port TX of the radio frequency transceiver 21 is connected to the power amplifying unit 22, and the receiving port RX is connected to the filtering unit 23.
  • the power amplifying unit 22 is configured to amplify the uplink signal transmitted by the radio frequency transceiver 21 and send the amplified uplink signal to the filtering unit 23.
  • the filtering unit 23 is configured to filter the uplink signal transmitted by the radio frequency transceiver 21 and send the filtered uplink signal to the antenna 25.
  • the filtering unit 23 is further configured to filter the downlink signal received by the antenna 25, and send the filtered downlink signal to the radio frequency transceiver 21.
  • the RF circuit switch chip 24 is used to selectively turn on the communication band between the RF transceiver 21 and the antenna 25.
  • the detailed structure and function of the RF circuit switch chip 24 will be described below.
  • the antenna 25 is configured to transmit an uplink signal sent by the radio frequency transceiver 21 to the outside, or receive a radio frequency signal from the outside, and send the received downlink signal to the radio frequency transceiver 21.
  • the radio frequency circuit 200 also includes a control circuit 26.
  • the control circuit 26 is connected to the RF circuit switch chip 24.
  • Control circuitry 26 may also be coupled to a processor in electronic device 100 to control the state of radio frequency circuit switch chip 24 in accordance with instructions from the processor.
  • the radio frequency transceiver 21 includes a high frequency port 21H, an intermediate frequency port 21M, and a low frequency port 21L.
  • the high frequency port 21H, the intermediate frequency port 21M, and the low frequency port 21L may respectively include a plurality of radio frequency transmitting ports and a plurality of radio frequency receiving ports.
  • the high frequency port 21H is used for transmitting and receiving high frequency radio frequency signals
  • the intermediate frequency port 21M is used for transmitting and receiving intermediate frequency radio frequency signals
  • the low frequency port 21L is used for transmitting and receiving low frequency radio frequency signals.
  • the radio frequency transceiver 21 includes nine radio frequency transmitting ports a1, a2, a3, a4, a5, a6, a7, a8, a9, and nine radio frequency receiving ports b1, b2, b3, b4, b5, b6, b7, B8, b9.
  • a1, a2, and a3 are high-frequency transmitting ports for transmitting high-frequency radio frequency signals (for example, radio frequency signals in bands such as band7, band40, and band41).
  • B1, b2, and b3 are high frequency receiving ports for receiving high frequency RF signals.
  • A4, a5, and a6 are intermediate frequency transmission ports for transmitting intermediate frequency radio frequency signals (for example, radio frequency signals in bands of band 1, band 2, and band 3).
  • B4, b5, and b6 are intermediate frequency receiving ports for receiving intermediate frequency radio frequency signals.
  • A7, a8, and a9 are low-frequency transmitting ports for transmitting low-frequency RF signals (for example, RF signals in bands such as band8, band12, and band20).
  • B7, b8, and b9 are low frequency receiving ports for receiving low frequency RF signals.
  • the above embodiment only takes the high frequency port 21H, the intermediate frequency port 21M, and the low frequency port 21L of the radio frequency transceiver 21 as three radio frequency transmitting ports and three radio frequency receiving ports as an example for description.
  • the high frequency port 21H, the intermediate frequency port 21M, and the low frequency port 21L may also include other numbers of radio frequency transmitting ports and radio frequency receiving ports, respectively. It suffices that the number of the radio frequency transmitting port and the radio frequency receiving port included in each of the high frequency port 21H, the intermediate frequency port 21M, and the low frequency port 21L is the same and greater than one.
  • the power amplifying unit 22 includes nine amplifiers 221, 222, 223, 224, 225, 226, 227, 228, 229.
  • the amplifiers 221, 222, 223, 224, 225, 226, 227, 228, 229 are respectively connected to the radio frequency transmitting ports a1, a2, a3, a4, a5, a6, a7, a8, a9 of the radio frequency transceiver 21.
  • the filtering unit 23 includes nine duplexers 231, 232, 233, 234, 235, 236, 237, 238, 239. Among them, the duplexers 231, 232, 233, 234, 235, 236, 237, 238, 239 are connected to the amplifiers 221, 222, 223, 224, 225, 226, 227, 228, 229, respectively. And, the duplexers 231, 232, 233, 234, 235, 236, 237, 238, 239 are respectively connected to the radio frequency receiving ports b1, b2, b3, b4, b5, b6, b7, b8, b9 of the radio frequency transceiver 21. .
  • the input of the RF circuit switch chip 24 includes nine sub-input ports c1, c2, c3, c4, c5, c6, c7, c8, c9.
  • the sub-input ports c1, c2, c3, c4, c5, c6, c7, c8, and c9 are connected to the duplexers 231, 232, 233, 234, 235, 236, 237, 238, and 239, respectively.
  • the filtering unit 23 includes a filter 231, a filter 232, and seven duplexers 233, 234, 235, 236, 237, 238, 239.
  • the filter 231, the filter 232, and the seven duplexers 233, 234, 235, 236, 237, 238, and 239 are connected to the amplifiers 221, 222, 223, 224, 225, 226, 227, 228, and 229, respectively.
  • the filter 231, the filter 232, and the seven duplexers 233, 234, 235, 236, 237, 238, 239 and the radio frequency receiving ports b1, b2, b3, b4, b5, b6 of the radio frequency transceiver 21, respectively B7, b8, b9 are connected.
  • the input of the RF circuit switch chip 24 includes nine sub-input ports c1, c2, c3, c4, c5, c6, c7, c8, c9.
  • the sub-input ports c1, c2, c3, c4, c5, c6, c7, c8, and c9 are respectively connected to the filter 231, the filter 232, and the seven duplexers 233, 234, 235, 236, 237, 238, and 239. connection.
  • filtering unit 23 may also include other numbers of filters and duplexers.
  • LTE communication frequency band is divided into frequency division duplex (Frequency Division Duplex (FDD for short) and time division duplex (Time Division Duplex, referred to as TDD, is two types.
  • FDD Frequency Division Duplex
  • TDD Time Division Duplex
  • the uplink and downlink communication links use different frequencies.
  • the duplexer needs to filter the uplink and downlink communication signals in the RF circuit.
  • the uplink and downlink communication links use the same frequency to transmit RF signals in different time slots.
  • the RF circuit needs a filter to filter the uplink and downlink communication signals.
  • the number of filters and the number of duplexers included in the filtering unit 23 depend on the duplex mode in which the radio frequency signals of the respective frequency bands transmitted by the radio frequency transceiver 21 are located.
  • the RF transmit port and the RF receive port are connected to a duplexer; in the TDD mode, the RF transmit port and the RF receive port are connected to a filter.
  • the band1 and band2 bands work in the FDD mode, and the transmit port and the receive port of the band1 and band2 radio signals are connected to the duplexer; and the band40 and band41 bands operate in the TDD mode, and the transmit and receive ports of the band 40 and band41 radio frequency signals are transmitted. Connected to the filter.
  • the radio frequency circuit switch chip 24 includes a first switch 241, a second switch 242, and a combiner 243.
  • the first switch 241 is a single-pole multi-throw switch.
  • the first switch 241 includes a plurality of sub input ports.
  • the first switch 241 includes six sub-input ports c1, c2, c3, c4, c5, c6.
  • the output of the first switch 241 can be connected to any one of the c1, c2, c3, c4, c5, c6 sub-input ports.
  • the second switch 242 is also a single pole multi throw switch.
  • the second switch 242 includes a plurality of sub-input ports.
  • the second switch 242 includes three sub-input ports c7, c8, c9.
  • the output of the second switch 242 can be connected to any one of the c7, c8, c9 sub-input ports.
  • the combiner 243 can be a dual frequency combiner.
  • the output of combiner 243 is coupled to antenna 25.
  • connection relationship only indicates a direct connection between components, and does not mean that the components connected to each other are electrically connected.
  • sub-input ports c1, c2, c3 can be coupled to high frequency ports in radio frequency transceiver 21, respectively.
  • the sub-input ports c4, c5, c6 can be respectively connected to the intermediate frequency ports in the radio frequency transceiver 21.
  • Sub-input ports c7, c8, c9 can be connected to the low frequency ports in the radio frequency transceiver 21, respectively.
  • the combiner 243 can realize carrier aggregation of the high frequency signal and the low frequency signal.
  • the combiner 243 can realize carrier aggregation of the intermediate frequency signal and the low frequency signal.
  • the RF circuit switch chip 24 includes a first switch 241, a second switch 242, a first filter 244, a second filter 245, a first impedance adjuster 246, and a second impedance adjuster. 247.
  • the first switch 241 is a single-pole multi-throw switch.
  • the first switch 241 includes a plurality of sub input ports.
  • the first switch 241 includes six sub-input ports c1, c2, c3, c4, c5, c6.
  • the output of the first switch 241 can be connected to any one of the c1, c2, c3, c4, c5, c6 sub-input ports.
  • the second switch 242 is also a single pole multi throw switch.
  • the second switch 242 includes a plurality of sub-input ports.
  • the second switch 242 includes three sub-input ports c7, c8, c9.
  • the output of the second switch 242 can be connected to any one of the c7, c8, c9 sub-input ports.
  • the RF circuit switch chip 24 includes a first output port P1 and a second output port P2, and P1 and P2 are connected to form a third output port P3.
  • the output of the first switch 241 is coupled to the first filter 244.
  • the first filter 244 is coupled to the first impedance adjuster 246.
  • the first impedance adjuster 246 is coupled to the first output port P1.
  • the output of the second switch 242 is coupled to the second filter 245.
  • the second filter 245 is connected to the second impedance adjuster 247.
  • the second impedance adjuster 247 is connected to the second output port P2.
  • the first output port P1 is connected to the second output port P2 to form a third output port P3.
  • the third output port P3 is connected to the antenna 25.
  • the first filter 244 is a high pass filter.
  • the first filter 244 can allow radio frequency signals having a frequency higher than 1710 MHz (megahertz) to pass.
  • the second filter 245 is a low pass filter.
  • the second filter 245 can allow radio frequency signals having a frequency below 1000 MHz to pass.
  • the output impedances of the first filter 244 and the second filter 245 are equal.
  • the output impedances of the first filter 244 and the second filter 245 are both 50 ohms.
  • the first impedance adjuster 246 and the second impedance adjuster 247 are used to jointly adjust the output impedance of the third output port P3 such that the output impedance of the third output port P3 and the output of the first filter 244 and the second filter 245 are The impedance is equal.
  • the first impedance adjuster 246 is a capacitor.
  • the second impedance adjuster 247 is also a capacitor.
  • the capacitor 246 and the capacitor 247 are connected in series with the first filter 244 and the second filter 245, respectively.
  • the capacitor 246 and the capacitor 247 may also be connected in parallel with the first filter 244 and the second filter 245, respectively.
  • sub-input ports c1, c2, c3 can be coupled to high frequency ports in radio frequency transceiver 21, respectively.
  • the sub-input ports c4, c5, c6 can be respectively connected to the intermediate frequency ports in the radio frequency transceiver 21.
  • Sub-input ports c7, c8, c9 can be connected to the low frequency ports in the radio frequency transceiver 21, respectively.
  • the radio frequency circuit switch chip 24 can transmit and receive a high frequency signal or an intermediate frequency signal through the antenna 25.
  • the radio frequency circuit switch chip 24 can transmit and receive low frequency signals through the antenna 25.
  • the radio frequency circuit switch chip 24 can realize carrier aggregation of the high frequency signal and the low frequency signal through the antenna 25. signal.
  • the radio frequency circuit switch chip 24 can realize the carrier aggregation signal of the intermediate frequency signal and the low frequency signal through the antenna 25. .
  • the sub-input port c1 can be connected to the HF band 40 transmit port in the RF transceiver 21
  • the sub-input port c4 can be connected to the IF band 3 transmit port in the RF transceiver 21
  • the sub-input port c7 can be transceived with the RF
  • the low frequency band band 12 in the 21 is connected to the transmit port.
  • the radio frequency circuit switch chip 24 can transmit and receive the band 40 radio frequency signal through the antenna 25.
  • the radio frequency circuit switch chip 24 can transmit and receive the band 3 radio frequency signal through the antenna 25.
  • the radio frequency circuit switch chip 24 can transmit and receive the carrier aggregation signals of the band 40 and the band 12 through the antenna 25.
  • the radio frequency circuit switch chip 24 can transmit and receive the carrier aggregation signals of the band 3 and the band 12 through the antenna 25.
  • the first impedance adjuster 246 is an inductor.
  • the second impedance adjuster 247 is also an inductor.
  • the inductor 246 and the inductor 247 are connected in series to the first filter 244 and the second filter 245, respectively.
  • the inductor 246 and the inductor 247 may also be connected in parallel with the first filter 244 and the second filter 245, respectively.
  • one of the first impedance adjuster 246 and the second impedance adjuster 247 may be a capacitor and the other is an inductor.
  • the first filter 244 can be coupled to a ground point in the electronic device 100 to achieve grounding.
  • the second filter 245 can also be coupled to a ground point in the electronic device 100 to achieve grounding.
  • the RF circuit switch chip 24 includes a first switch 241, a second switch 242, a first filter 244, a second filter 245, a first impedance adjuster 246, and a second impedance adjuster. 247.
  • the first switch 241 is a single-pole multi-throw switch.
  • the first switch 241 includes a plurality of sub input ports.
  • the first switch 241 includes six sub-input ports c1, c2, c3, c4, c5, c6.
  • the output of the first switch 241 can be connected to any one of the c1, c2, c3, c4, c5, c6 sub-input ports.
  • the second switch 242 is also a single pole multi throw switch.
  • the second switch 242 includes a plurality of sub-input ports.
  • the second switch 242 includes three sub-input ports c7, c8, c9.
  • the output of the second switch 242 can be connected to any one of the c7, c8, c9 sub-input ports.
  • the radio frequency circuit switch chip 24 includes a first output port P1 and a second output port P2.
  • the first output port P1 and the second output port P2 are in an off state.
  • the output of the first switch 241 is coupled to the first filter 244.
  • the first filter 244 is coupled to the first impedance adjuster 246.
  • the first impedance adjuster 246 is coupled to the first output port P1.
  • the output of the second switch 242 is coupled to the second filter 245.
  • the second filter 245 is connected to the second impedance adjuster 247.
  • the second impedance adjuster 247 is connected to the second output port P2.
  • the antenna 25 includes a first sub-antenna 251 and a second sub-antenna 252.
  • the first sub-antenna 251 is connected to the first output port P1
  • the second sub-antenna 252 is connected to the second output port P2.
  • the first filter 244 is a high pass filter.
  • the first filter 244 can allow radio frequency signals having a frequency higher than 1710 MHz (megahertz) to pass.
  • the second filter 245 is a low pass filter.
  • the second filter 245 can allow radio frequency signals having a frequency below 1000 MHz to pass.
  • the output impedances of the first filter 244 and the second filter 245 may be equal or may not be equal.
  • the first impedance adjuster 246 is a capacitor.
  • the second impedance adjuster 247 is also a capacitor.
  • the capacitor 246 and the capacitor 247 are connected in series with the first filter 244 and the second filter 245, respectively.
  • the capacitor 246 and the capacitor 247 may also be connected in parallel with the first filter 244 and the second filter 245, respectively.
  • the impedance of the first impedance adjuster 246 can be zero.
  • the impedance of the second impedance adjuster 247 can also be zero.
  • sub-input ports c1, c2, c3 can be coupled to high frequency ports in radio frequency transceiver 21, respectively.
  • the sub-input ports c4, c5, c6 can be respectively connected to the intermediate frequency ports in the radio frequency transceiver 21.
  • Sub-input ports c7, c8, c9 can be connected to the low frequency ports in the radio frequency transceiver 21, respectively.
  • the radio frequency circuit switch chip 24 can transmit and receive a high frequency signal or an intermediate frequency signal through the sub antenna 251.
  • the radio frequency circuit switch chip 24 can transmit and receive low frequency signals through the sub antenna 252.
  • FIG. 12 is a schematic structural diagram of a radio frequency circuit 200.
  • the radio frequency transceiver 21 includes nine radio frequency transmitting ports a1, a2, a3, a4, a5, a6, a7, a8, a9, and nine radio frequency receiving ports b1, b2, b3, b4, b5, b6, b7, B8, b9.
  • a1, a2, and a3 are high-frequency transmitting ports for transmitting high-frequency radio frequency signals (for example, radio frequency signals in bands such as band7, band40, and band41).
  • B1, b2, and b3 are high frequency receiving ports for receiving high frequency RF signals.
  • A4, a5, and a6 are intermediate frequency transmission ports for transmitting intermediate frequency radio frequency signals (for example, radio frequency signals in bands of band 1, band 2, and band 3).
  • B4, b5, and b6 are intermediate frequency receiving ports for receiving intermediate frequency radio frequency signals.
  • A7, a8, and a9 are low-frequency transmitting ports for transmitting low-frequency RF signals (for example, RF signals in bands such as band8, band12, and band20).
  • B7, b8, and b9 are low frequency receiving ports for receiving low frequency RF signals.
  • the foregoing embodiment only takes the high frequency port, the intermediate frequency port, and the low frequency port of the radio frequency transceiver 21 as three radio frequency transmitting ports and three radio frequency receiving ports as an example for description.
  • the high frequency port, the intermediate frequency port, and the low frequency port may also include other numbers of radio frequency transmitting ports and radio frequency receiving ports, respectively. It only needs to satisfy the same number of radio frequency transmitting ports and radio frequency receiving ports included in the high frequency port, the intermediate frequency port, and the low frequency port, and is greater than one.
  • the power amplifying unit 22 includes nine amplifiers 221, 222, 223, 224, 225, 226, 227, 228, 229.
  • the amplifiers 221, 222, 223, 224, 225, 226, 227, 228, 229 are respectively connected to the radio frequency transmitting ports a1, a2, a3, a4, a5, a6, a7, a8, a9 of the radio frequency transceiver 21.
  • the filtering unit 23 includes nine duplexers 231, 232, 233, 234, 235, 236, 237, 238, 239. Among them, the duplexers 231, 232, 233, 234, 235, 236, 237, 238, 239 are connected to the amplifiers 221, 222, 223, 224, 225, 226, 227, 228, 229, respectively. And, the duplexers 231, 232, 233, 234, 235, 236, 237, 238, 239 are respectively connected to the radio frequency receiving ports b1, b2, b3, b4, b5, b6, b7, b8, b9 of the radio frequency transceiver 21. .
  • the RF circuit switch chip 24 includes a first switch 241, a second switch 242, a first filter 244, a second filter 245, a first impedance adjuster 246, and a second impedance adjuster 247.
  • the first switch 241 is a single-pole multi-throw switch.
  • the first switch 241 includes a plurality of sub input ports.
  • the first switch 241 includes six sub-input ports c1, c2, c3, c4, c5, c6.
  • the output of the first switch 241 can be connected to any one of the c1, c2, c3, c4, c5, c6 sub-input ports.
  • the second switch 242 is also a single pole multi throw switch.
  • the second switch 242 includes a plurality of sub-input ports.
  • the second switch 242 includes three sub-input ports c7, c8, c9.
  • the output of the second switch 242 can be connected to any one of the c7, c8, c9 sub-input ports.
  • the sub-input ports c1, c2, c3, c4, c5, c6, c7, c8, and c9 are connected to the duplexers 231, 232, 233, 234, 235, 236, 237, 238, and 239, respectively.
  • the RF circuit switch chip 24 includes a first output port P1 and a second output port P2, and P1 and P2 are connected to form a third output port P3.
  • the output of the first switch 241 is coupled to the first filter 244.
  • the first filter 244 is coupled to the first impedance adjuster 246.
  • the first impedance adjuster 246 is coupled to the first output port P1.
  • the output of the second switch 242 is coupled to the second filter 245.
  • the second filter 245 is connected to the second impedance adjuster 247.
  • the second impedance adjuster 247 is connected to the second output port P2.
  • the first output port P1 is connected to the second output port P2 to form a third output port P3.
  • the third output port P3 is connected to the antenna 25.
  • the first filter 244 is a high pass filter.
  • the first filter 244 can allow radio frequency signals having a frequency higher than 1710 MHz (megahertz) to pass.
  • the second filter 245 is a low pass filter.
  • the second filter 245 can allow radio frequency signals having a frequency below 1000 MHz to pass.
  • the output impedances of the first filter 244 and the second filter 245 are equal.
  • the output impedances of the first filter 244 and the second filter 245 are both 50 ohms.
  • the first impedance adjuster 246 and the second impedance adjuster 247 are used to jointly adjust the output impedance of the third output port P3 such that the output impedance of the third output port P3 and the output of the first filter 244 and the second filter 245 are The impedance is equal.
  • the first impedance adjuster 246 is a capacitor.
  • the second impedance adjuster 247 is also a capacitor.
  • the capacitor 246 and the capacitor 247 are connected in series with the first filter 244 and the second filter 245, respectively.
  • the capacitor 246 and the capacitor 247 may also be connected in parallel with the first filter 244 and the second filter 245, respectively.
  • the radio frequency circuit switch chip 24 can transmit and receive a high frequency signal or an intermediate frequency signal through the antenna 25.
  • the radio frequency circuit switch chip 24 can transmit and receive low frequency signals through the antenna 25.
  • the radio frequency circuit switch chip 24 can realize carrier aggregation of the high frequency signal and the low frequency signal through the antenna 25. signal.
  • the radio frequency circuit switch chip 24 can realize the carrier aggregation signal of the intermediate frequency signal and the low frequency signal through the antenna 25. .
  • the sub-input port c1 can be connected to the HF band 40 transmit port in the RF transceiver 21
  • the sub-input port c4 can be connected to the IF band 3 transmit port in the RF transceiver 21
  • the sub-input port c7 can be transceived with the RF
  • the low frequency band band 12 in the 21 is connected to the transmit port.
  • the radio frequency circuit switch chip 24 can transmit and receive the band 40 radio frequency signal through the antenna 25.
  • the radio frequency circuit switch chip 24 can transmit and receive the band 3 radio frequency signal through the antenna 25.
  • the radio frequency circuit switch chip 24 can transmit and receive the carrier aggregation signals of the band 40 and the band 12 through the antenna 25.
  • the radio frequency circuit switch chip 24 can transmit and receive the carrier aggregation signals of the band 3 and the band 12 through the antenna 25.
  • the radio frequency circuit switch chip 24 can control the first switch 241 to turn on the high frequency port or the intermediate frequency port of the radio frequency transceiver 21, and the second switch 242 is disconnected to send and receive high frequency signals or intermediate frequency signals;
  • the first switch 241 is turned off, while the second switch 242 turns on the low frequency port of the radio frequency transceiver 21 to transmit and receive low frequency signals;
  • the first switch 241 can be controlled to turn on the high frequency port or the intermediate frequency port of the radio frequency transceiver 21, and at the same time
  • the switch 242 turns on the low frequency port of the radio frequency transceiver 21 to transmit and receive a carrier aggregation signal of the high frequency signal and the low frequency signal, or a carrier aggregation signal of the intermediate frequency signal and the low frequency signal.
  • the RF circuit switch chip 24 can control the antenna 25 to transmit and receive radio frequency signals of different frequency bands such as high frequency, intermediate frequency and low frequency, and can also control the antenna 25 to transmit and receive carrier aggregation signals of different frequency bands, thereby improving the diversity of the RF signals transmitted and received by the electronic device 100.
  • the battery 104 is mounted inside the casing 105. Battery 104 is used to provide electrical energy to electronic device 100.
  • the housing 105 is used to form an outer contour of the electronic device 100.
  • the material of the casing 105 may be plastic or metal.
  • the housing 105 can be integrally formed.
  • FIG. 13 is another schematic structural diagram of an electronic device 100 according to an embodiment of the present invention.
  • the electronic device 100 includes an antenna device 10, a memory 20, a display unit 30, a power source 40, and a processor 50.
  • Those skilled in the art can appreciate that the structure of the electronic device 100 shown in FIG. 13 does not constitute a limitation on the electronic device 100.
  • Electronic device 100 may include more or fewer components than illustrated, or some components in combination, or different component arrangements.
  • the antenna device 10 includes the radio frequency circuit 200 described in any of the above embodiments.
  • the antenna device 10 can communicate with a network device (eg, a server) or other electronic device (eg, a smart phone) over a wireless network to perform transceiving of information with a network device or other electronic device.
  • a network device eg, a server
  • other electronic device eg, a smart phone
  • Memory 20 can be used to store applications and data.
  • the application stored in the memory 20 contains executable program code.
  • Applications can form various functional modules.
  • the processor 50 executes various functional applications and data processing by running an application stored in the memory 20.
  • the display unit 30 can be used to display information input by the user to the electronic device 100 or information provided to the user and various graphical user interfaces of the electronic device 100. These graphical user interfaces can be composed of graphics, text, icons, video, and any combination thereof.
  • the display unit 30 may include a display panel.
  • the power source 40 is used to power various components of the electronic device 100.
  • the power source 40 can be logically coupled to the processor 50 through a power management system to enable functions such as managing charging, discharging, and power management through the power management system.
  • the processor 50 is a control center of the electronic device 100.
  • the processor 50 connects various parts of the entire electronic device 100 using various interfaces and lines, performs various functions of the electronic device 100 by running or executing an application stored in the memory 20, and calling data stored in the memory 20.
  • the data is processed to perform overall monitoring of the electronic device 100.
  • the electronic device 100 may further include a camera module, a Bluetooth module, and the like, and details are not described herein again.
  • the radio frequency circuit switch chip, the radio frequency circuit, the antenna device and the electronic device provided by the embodiments of the present invention are described in detail.
  • the principles and implementation manners of the present invention are described in the specific examples. The description of the above embodiments is only used. To help understand the invention. In the meantime, the present invention is not limited by the scope of the present invention.

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Abstract

一种射频电路开关芯片，可以通过第一开关、第二开关不同的接通状态，实现收发高频信号、中频信号或低频信号，或者收发高频信号与低频信号的载波聚合信号，或者收发中频信号与低频信号的载波聚合信号。本发明还提供一种射频电路、天线装置及电子设备。

Description

射频电路开关芯片、射频电路、天线装置及电子设备 技术领域
本发明涉及通信技术领域，特别涉及一种射频电路开关芯片、射频电路、天线装置及电子设备。
 背景技术
随着通信技术的发展，移动终端能够支持的通信频段越来越多。例如，LTE（Long Term Evolution，长期演进）通信信号可以包括频率在700MHz至2700MHz之间的信号。
移动终端能够支持的射频信号可以分为低频信号、中频信号和高频信号。其中，低频信号、中频信号以及高频信号各自又包括多个子频段信号。每个子频段信号都需要通过天线发射到外界。
由此，产生了载波聚合（Carrier Aggregation，简称CA）技术。通过载波聚合，可以将多个子频段信号聚合在一起，以提高网络上下行传输速率。
目前，全球各个通信市场的频率资源互不相同。不同区域的通信运营商拥有不同的通信频谱分配，因此也就存在不同的载波聚合的频段组合需求，也存在不需要进行载波聚合的频段需求。然而，当前的移动终端能够收发的射频信号或载波聚合信号的频段单一，缺乏多样性，无法满足上述需求。
 技术问题
本发明实施例提供一种射频电路开关芯片、射频电路、天线装置及电子设备，可以提高电子设备收发射频信号的多样性。
 技术解决方案
第一方面，本发明实施例提供一种射频电路开关芯片，该射频电路开关芯片包括第一开关、第二开关、第一滤波器、第二滤波器、第一阻抗调节器以及第二阻抗调节器，该第一开关输出高频信号或中频信号，该第二开关输出低频信号，该第一开关、第一滤波器以及第一阻抗调节器依次连接，该第二开关、第二滤波器以及第二阻抗调节器依次连接；
当该第一开关接通，该第二开关断开时，该射频电路开关芯片收发高频信号或中频信号；
当该第一开关断开，该第二开关接通时，该射频电路开关芯片收发低频信号；
当该第一开关、第二开关同时接通时，该射频电路开关芯片收发载波聚合信号，该载波聚合信号为高频信号与低频信号的载波聚合信号，或中频信号与低频信号的载波聚合信号。
第二方面，本发明实施例还提供一种射频电路，该射频电路包括射频收发器、射频电路开关芯片以及天线，该射频收发器、射频电路开关芯片以及天线依次连接；
该射频电路开关芯片包括第一开关、第二开关、第一滤波器、第二滤波器、第一阻抗调节器以及第二阻抗调节器，该第一开关输出高频信号或中频信号，该第二开关输出低频信号，该第一开关、第一滤波器以及第一阻抗调节器依次连接，该第二开关、第二滤波器以及第二阻抗调节器依次连接；
当该第一开关接通，该第二开关断开时，该射频电路开关芯片收发高频信号或中频信号；
当该第一开关断开，该第二开关接通时，该射频电路开关芯片收发低频信号；
当该第一开关、第二开关同时接通时，该射频电路开关芯片收发载波聚合信号，该载波聚合信号为高频信号与低频信号的载波聚合信号，或中频信号与低频信号的载波聚合信号。
第三方面，本发明实施例还提供一种天线装置，该天线装置包括射频电路，该射频电路包括射频收发器、射频电路开关芯片以及天线，该射频收发器、射频电路开关芯片以及天线依次连接；
该射频电路开关芯片包括第一开关、第二开关、第一滤波器、第二滤波器、第一阻抗调节器以及第二阻抗调节器，该第一开关输出高频信号或中频信号，该第二开关输出低频信号，该第一开关、第一滤波器以及第一阻抗调节器依次连接，该第二开关、第二滤波器以及第二阻抗调节器依次连接；
当该第一开关接通，该第二开关断开时，该射频电路开关芯片收发高频信号或中频信号；
当该第一开关断开，该第二开关接通时，该射频电路开关芯片收发低频信号；
当该第一开关、第二开关同时接通时，该射频电路开关芯片收发载波聚合信号，该载波聚合信号为高频信号与低频信号的载波聚合信号，或中频信号与低频信号的载波聚合信号。
第四方面，本发明实施例还提供一种电子设备，该电子设备包括壳体和电路板，该电路板安装在该壳体内部，该电路板上设置有射频电路，该射频电路包括射频收发器、射频电路开关芯片以及天线，该射频收发器、射频电路开关芯片以及天线依次连接；
该射频电路开关芯片包括第一开关、第二开关、第一滤波器、第二滤波器、第一阻抗调节器以及第二阻抗调节器，该第一开关输出高频信号或中频信号，该第二开关输出低频信号，该第一开关、第一滤波器以及第一阻抗调节器依次连接，该第二开关、第二滤波器以及第二阻抗调节器依次连接；
当该第一开关接通，该第二开关断开时，该射频电路开关芯片收发高频信号或中频信号；
当该第一开关断开，该第二开关接通时，该射频电路开关芯片收发低频信号；
当该第一开关、第二开关同时接通时，该射频电路开关芯片收发载波聚合信号，该载波聚合信号为高频信号与低频信号的载波聚合信号，或中频信号与低频信号的载波聚合信号。
 有益效果
本发明实施例提供一种射频电路开关芯片、射频电路、天线装置及电子设备，可以提高电子设备收发射频信号的多样性。
 附图说明
图1是本发明实施例提供的电子设备的分解示意图。
图2是本发明实施例提供的电子设备的结构示意图。
图3是本发明实施例提供的射频电路的第一种结构示意图。
图4是本发明实施例提供的射频电路的第二种结构示意图。
图5是本发明实施例提供的射频电路的第三种结构示意图。
图6是本发明实施例提供的射频电路的第四种结构示意图。
图7是本发明实施例提供的射频电路开关芯片的第一种结构示意图。
图8是本发明实施例提供的射频电路开关芯片的第二种结构示意图。
图9是本发明实施例提供的射频电路开关芯片的第三种结构示意图。
图10是本发明实施例提供的射频电路开关芯片的第四种结构示意图。
图11是本发明实施例提供的射频电路开关芯片的第五种结构示意图。
图12是本发明实施例提供的射频电路的第五种结构示意图。
图13是本发明实施例提供的电子设备的另一结构示意图。
 本发明的最佳实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
在本发明的描述中，需要理解的是，术语“中心”、“纵向”、“横向”、“长度”、“宽度”、“厚度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”、“顺时针”、“逆时针”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本发明和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本发明的限制。此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个所述特征。在本发明的描述中，“多个”的含义是两个或两个以上，除非另有明确具体的限定。
在本发明的描述中，需要说明的是，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是机械连接，也可以是电连接或可以相互通讯；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通或两个元件的相互作用关系。对于本领域的普通技术人员而言，可以根据具体情况理解上述术语在本发明中的具体含义。
在本发明中，除非另有明确的规定和限定，第一特征在第二特征之“上”或之“下”可以包括第一和第二特征直接接触，也可以包括第一和第二特征不是直接接触而是通过它们之间的另外的特征接触。而且，第一特征在第二特征“之上”、“上方”和“上面”包括第一特征在第二特征正上方和斜上方，或仅仅表示第一特征水平高度高于第二特征。第一特征在第二特征“之下”、“下方”和“下面”包括第一特征在第二特征正下方和斜下方，或仅仅表示第一特征水平高度小于第二特征。
下文的公开提供了许多不同的实施方式或例子用来实现本发明的不同结构。为了简化本发明的公开，下文中对特定例子的部件和设置进行描述。当然，它们仅仅为示例，并且目的不在于限制本发明。此外，本发明可以在不同例子中重复参考数字和/或参考字母，这种重复是为了简化和清楚的目的，其本身不指示所讨论各种实施方式和/或设置之间的关系。此外，本发明提供了的各种特定的工艺和材料的例子，但是本领域普通技术人员可以意识到其他工艺的应用和/或其他材料的使用。
本发明实施例提供一种电子设备。该电子设备可以是智能手机、平板电脑等设备。参考图1和图2，电子设备100包括盖板101、显示屏102、电路板103、电池104以及壳体105。
其中，盖板101安装到显示屏102上，以覆盖显示屏102。盖板101可以为透明玻璃盖板。在一些实施例中，盖板101可以是用诸如蓝宝石等材料制成的玻璃盖板。
显示屏102安装在壳体105上，以形成电子设备100的显示面。显示屏102可以包括显示区域102A和非显示区域102B。显示区域102A用于显示图像、文本等信息。非显示区域102B不显示信息。非显示区域102B的底部可以设置指纹模组、触控电路等功能组件。
电路板103安装在壳体105内部。电路板103可以为电子设备100的主板。电路板103上可以集成有摄像头、接近传感器以及处理器等功能组件。同时，显示屏102可以电连接至电路板103。
在一些实施例中，电路板103上设置有射频（RF，Radio Frequency）电路。射频电路可以通过无线网络与网络设备（例如，服务器、基站等）或其他电子设备（例如，智能手机等）通信，以完成与网络设备或其他电子设备之间的信息收发。
在一些实施例中，如图3所示，射频电路200包括射频收发器21、功率放大单元22、滤波单元23、射频电路开关芯片24以及天线25。其中，功率放大单元22、滤波单元23、射频电路开关芯片24以及天线25依次连接。
射频收发器21具有发射端口TX和接收端口RX。发射端口TX用于发射射频信号（上行信号），接收端口RX用于接收射频信号（下行信号）。射频收发器21的发射端口TX与功率放大单元22连接，接收端口RX与滤波单元23连接。
功率放大单元22用于对射频收发器21发射的上行信号进行放大，并将放大后的上行信号发送到滤波单元23。
滤波单元23用于对射频收发器21发射的上行信号进行滤波，并将滤波后的上行信号发送到天线25。滤波单元23还用于对天线25接收的下行信号进行滤波，并将滤波后的下行信号发送到射频收发器21。
射频电路开关芯片24用于选择性接通射频收发器21与天线25之间的通信频段。射频电路开关芯片24的详细结构和功能将在下文进行描述。
天线25用于将射频收发器21发送的上行信号发射到外界，或者从外界接收射频信号，并将接收到的下行信号发送到射频收发器21。
在一些实施例中，如图4所示，射频电路200还包括控制电路26。其中，控制电路26与射频电路开关芯片24连接。控制电路26还可以与电子设备100中的处理器连接，以根据处理器的指令控制射频电路开关芯片24的状态。
在一些实施例中，如图5所示，射频收发器21包括高频端口21H、中频端口21M以及低频端口21L。其中，高频端口21H、中频端口21M、低频端口21L可以分别包括多个射频发射端口和多个射频接收端口。高频端口21H用于收发高频射频信号，中频端口21M用于收发中频射频信号，低频端口21L用于收发低频射频信号。
需要说明的是，上述高频射频信号、中频射频信号、低频射频信号只是相对概念，并无绝对的频率范围区分。
例如，射频收发器21包括9个射频发射端口a1、a2、a3、a4、a5、a6、a7、a8、a9，以及9个射频接收端口b1、b2、b3、b4、b5、b6、b7、b8、b9。
其中，a1、a2、a3为高频发射端口，用于发射高频射频信号（例如，band7、band40、band41等频段的射频信号）。b1、b2、b3为高频接收端口，用于接收高频射频信号。a4、a5、a6为中频发射端口，用于发射中频射频信号（例如，band1、band2、band3等频段的射频信号）。b4、b5、b6为中频接收端口，用于接收中频射频信号。a7、a8、a9为低频发射端口，用于发射低频射频信号（例如，band8、band12、band20等频段的射频信号）。b7、b8、b9为低频接收端口，用于接收低频射频信号。
需要说明的是，上述实施例仅以射频收发器21的高频端口21H、中频端口21M、低频端口21L分别包括3个射频发射端口和3个射频接收端口为例进行说明。在其他一些实施例中，高频端口21H、中频端口21M、低频端口21L还可以分别包括其他数量的射频发射端口和射频接收端口。只需满足高频端口21H、中频端口21M、低频端口21L各自所包括的射频发射端口和射频接收端口的数量相同并且大于1即可。
功率放大单元22包括9个放大器221、222、223、224、225、226、227、228、229。其中，放大器221、222、223、224、225、226、227、228、229分别与射频收发器21的射频发射端口a1、a2、a3、a4、a5、a6、a7、a8、a9连接。
滤波单元23包括9个双工器231、232、233、234、235、236、237、238、239。其中，双工器231、232、233、234、235、236、237、238、239分别与放大器221、222、223、224、225、226、227、228、229连接。并且，双工器231、232、233、234、235、236、237、238、239分别与射频收发器21的射频接收端口b1、b2、b3、b4、b5、b6、b7、b8、b9连接。
射频电路开关芯片24的输入端包括9个子输入端口c1、c2、c3、c4、c5、c6、c7、c8、c9。其中，子输入端口c1、c2、c3、c4、c5、c6、c7、c8、c9分别与双工器231、232、233、234、235、236、237、238、239连接。
在一些实施例中，如图6所示，滤波单元23包括滤波器231、滤波器232以及7个双工器233、234、235、236、237、238、239。其中，滤波器231、滤波器232以及7个双工器233、234、235、236、237、238、239分别与放大器221、222、223、224、225、226、227、228、229连接。并且，滤波器231、滤波器232以及7个双工器233、234、235、236、237、238、239分别与射频收发器21的射频接收端口b1、b2、b3、b4、b5、b6、b7、b8、b9连接。
射频电路开关芯片24的输入端包括9个子输入端口c1、c2、c3、c4、c5、c6、c7、c8、c9。其中，子输入端口c1、c2、c3、c4、c5、c6、c7、c8、c9分别与滤波器231、滤波器232以及7个双工器233、234、235、236、237、238、239连接。
需要说明的是，上述实施例仅以滤波单元23包括2个滤波器以及7个双工器为例进行说明。在其他一些实施例中，滤波单元23还可以包括其他数量的滤波器和双工器。
在长期演进（Long Term Evolution，简称LTE）通讯网络中，根据双工方式的不同，LTE的通讯频段分为频分双工（Frequency Division Duplex，简称FDD）和时分双工（Time Division Duplex，简称TDD）两种类型。处在FDD模式下的通讯频段，上下行通讯链路使用不同的频率，此时射频电路中需要双工器对上下行通讯信号进行滤波处理。处在TDD模式下的通讯频段，上下行通讯链路使用相同的频率，在不同的时隙进行射频信号的传输，此时射频电路中需要滤波器对上下行通讯信号进行滤波处理。
因此，实际应用中，滤波单元23中包括的滤波器数量和双工器数量取决于射频收发器21发射的各个频段的射频信号所处的双工模式。处于FDD模式的频段，射频发射端口和射频接收端口连接的是双工器；处于TDD模式的频段，射频发射端口和射频接收端口连接的是滤波器。例如，band1、band2频段工作在FDD模式，band1、band2射频信号的发射端口和接收端口连接的是双工器；而band40、band41频段工作在TDD模式，band40、band41射频信号的发射端口和接收端口连接的是滤波器。
参考图7，在一些实施例中，射频电路开关芯片24包括第一开关241、第二开关242以及合路器243。
其中，第一开关241为单刀多掷开关。第一开关241包括多个子输入端口。例如，第一开关241包括6个子输入端口c1、c2、c3、c4、c5、c6。第一开关241的输出端可以连接至c1、c2、c3、c4、c5、c6中的任意一个子输入端口。
第二开关242也为单刀多掷开关。第二开关242包括多个子输入端口。例如，第二开关242包括3个子输入端口c7、c8、c9。第二开关242的输出端可以连接至c7、c8、c9中的任意一个子输入端口。
合路器243可以为双频合路器。合路器243的输出端连接到天线25。
需要说明的是，上述连接关系仅表示元器件之间的直接连接，并不代表互相连接的元器件之间处于电性接通状态。
在一些实施例中，子输入端口c1、c2、c3可以分别与射频收发器21中的高频端口连接。子输入端口c4、c5、c6可以分别与射频收发器21中的中频端口连接。子输入端口c7、c8、c9可以分别与射频收发器21中的低频端口连接。
当开关241接通c1、c2、c3中的任意一路，开关242接通c7、c8、c9中的任意一路时，合路器243可以实现高频信号与低频信号载波聚合。
当开关241接通c4、c5、c6中的任意一路，开关242接通c7、c8、c9中的任意一路时，合路器243可以实现中频信号与低频信号载波聚合。
参考图8，在一些实施例中，射频电路开关芯片24包括第一开关241、第二开关242、第一滤波器244、第二滤波器245、第一阻抗调节器246以及第二阻抗调节器247。
其中，第一开关241为单刀多掷开关。第一开关241包括多个子输入端口。例如，第一开关241包括6个子输入端口c1、c2、c3、c4、c5、c6。第一开关241的输出端可以连接至c1、c2、c3、c4、c5、c6中的任意一个子输入端口。
第二开关242也为单刀多掷开关。第二开关242包括多个子输入端口。例如，第二开关242包括3个子输入端口c7、c8、c9。第二开关242的输出端可以连接至c7、c8、c9中的任意一个子输入端口。
其中，射频电路开关芯片24包括第一输出端口P1、第二输出端口P2，并且P1与P2连接以形成第三输出端口P3。
第一开关241的输出端连接至第一滤波器244。第一滤波器244连接至第一阻抗调节器246。第一阻抗调节器246连接至第一输出端口P1。
第二开关242的输出端连接至第二滤波器245。第二滤波器245连接至第二阻抗调节器247。第二阻抗调节器247连接至第二输出端口P2。
第一输出端口P1与第二输出端口P2连接，以形成第三输出端口P3。第三输出端口P3连接至天线25。
其中，第一滤波器244为高通滤波器。例如，第一滤波器244可以允许频率高于1710MHz（兆赫兹）的射频信号通过。第二滤波器245为低通滤波器。例如，第二滤波器245可以允许频率低于1000MHz的射频信号通过。
其中，第一滤波器244、第二滤波器245的输出阻抗相等。例如，第一滤波器244、第二滤波器245的输出阻抗均为50欧姆。第一阻抗调节器246、第二阻抗调节器247用于共同调节第三输出端口P3的输出阻抗，以使得第三输出端口P3的输出阻抗与第一滤波器244、第二滤波器245的输出阻抗相等。
在一些实施例中，第一阻抗调节器246为电容。第二阻抗调节器247也为电容。电容246、电容247分别与第一滤波器244、第二滤波器245串联连接。在一些实施例中，电容246、电容247也可以分别与第一滤波器244、第二滤波器245并联连接。
在一些实施例中，子输入端口c1、c2、c3可以分别与射频收发器21中的高频端口连接。子输入端口c4、c5、c6可以分别与射频收发器21中的中频端口连接。子输入端口c7、c8、c9可以分别与射频收发器21中的低频端口连接。
当开关241接通c1、c2、c3、c4、c5、c6中的任意一路，开关242断开时，射频电路开关芯片24可以通过天线25实现收发高频信号或中频信号。
当开关241断开，开关242接通c7、c8、c9中的任意一路时，射频电路开关芯片24可以通过天线25实现收发低频信号。
当开关241接通c1、c2、c3中的任意一路，开关242接通c7、c8、c9中的任意一路时，射频电路开关芯片24可以通过天线25实现收发高频信号与低频信号的载波聚合信号。
当开关241接通c4、c5、c6中的任意一路，开关242接通c7、c8、c9中的任意一路时，射频电路开关芯片24可以通过天线25实现收发中频信号与低频信号的载波聚合信号。
例如，子输入端口c1可以与射频收发器21中的高频频段band40发射端口连接，子输入端口c4可以与射频收发器21中的中频频段band3发射端口连接，子输入端口c7可以与射频收发器21中的低频频段band12发射端口连接。
当开关241接通c1，开关242断开时，射频电路开关芯片24可以通过天线25实现收发band40射频信号。
当开关241接通c4，开关242断开时，射频电路开关芯片24可以通过天线25实现收发band3射频信号。
当开关241接通c1，开关242接通c7时，射频电路开关芯片24可以通过天线25实现收发band40与band12的载波聚合信号。
当开关241接通c4，开关242接通c7时，射频电路开关芯片24可以通过天线25实现收发band3与band12的载波聚合信号。
在一些实施例中，如图9所示，第一阻抗调节器246为电感。第二阻抗调节器247也为电感。电感246、电感247分别与第一滤波器244、第二滤波器245串联连接。在一些实施例中，电感246、电感247也可以分别与第一滤波器244、第二滤波器245并联连接。
在一些实施例中，第一阻抗调节器246、第二阻抗调节器247中，可以其中一个为电容，另一个为电感。
在一些实施例中，如图10所示，第一滤波器244可以与电子设备100中的接地点连接，以实现接地。第二滤波器245也可以与电子设备100中的接地点连接，以实现接地。
参考图11，在一些实施例中，射频电路开关芯片24包括第一开关241、第二开关242、第一滤波器244、第二滤波器245、第一阻抗调节器246以及第二阻抗调节器247。
其中，第一开关241为单刀多掷开关。第一开关241包括多个子输入端口。例如，第一开关241包括6个子输入端口c1、c2、c3、c4、c5、c6。第一开关241的输出端可以连接至c1、c2、c3、c4、c5、c6中的任意一个子输入端口。
第二开关242也为单刀多掷开关。第二开关242包括多个子输入端口。例如，第二开关242包括3个子输入端口c7、c8、c9。第二开关242的输出端可以连接至c7、c8、c9中的任意一个子输入端口。
其中，射频电路开关芯片24包括第一输出端口P1、第二输出端口P2。第一输出端口P1与第二输出端口P2之间为断开状态。
第一开关241的输出端连接至第一滤波器244。第一滤波器244连接至第一阻抗调节器246。第一阻抗调节器246连接至第一输出端口P1。
第二开关242的输出端连接至第二滤波器245。第二滤波器245连接至第二阻抗调节器247。第二阻抗调节器247连接至第二输出端口P2。
其中，天线25包括第一子天线251和第二子天线252。第一子天线251与第一输出端口P1连接，第二子天线252与第二输出端口P2连接。
其中，第一滤波器244为高通滤波器。例如，第一滤波器244可以允许频率高于1710MHz（兆赫兹）的射频信号通过。第二滤波器245为低通滤波器。例如，第二滤波器245可以允许频率低于1000MHz的射频信号通过。
其中，第一滤波器244、第二滤波器245的输出阻抗可相等，也可以不等。
在一些实施例中，第一阻抗调节器246为电容。第二阻抗调节器247也为电容。电容246、电容247分别与第一滤波器244、第二滤波器245串联连接。在一些实施例中，电容246、电容247也可以分别与第一滤波器244、第二滤波器245并联连接。
在一些实施例中，第一阻抗调节器246的阻抗可以为零。第二阻抗调节器247的阻抗也可以为零。
在一些实施例中，子输入端口c1、c2、c3可以分别与射频收发器21中的高频端口连接。子输入端口c4、c5、c6可以分别与射频收发器21中的中频端口连接。子输入端口c7、c8、c9可以分别与射频收发器21中的低频端口连接。
当开关241接通c1、c2、c3、c4、c5、c6中的任意一路时，射频电路开关芯片24可以通过子天线251实现收发高频信号或中频信号。
当开关242接通c7、c8、c9中的任意一路时，射频电路开关芯片24可以通过子天线252实现收发低频信号。
参考图12，图12为射频电路200的结构示意图。其中，射频收发器21包括9个射频发射端口a1、a2、a3、a4、a5、a6、a7、a8、a9，以及9个射频接收端口b1、b2、b3、b4、b5、b6、b7、b8、b9。
其中，a1、a2、a3为高频发射端口，用于发射高频射频信号（例如，band7、band40、band41等频段的射频信号）。b1、b2、b3为高频接收端口，用于接收高频射频信号。a4、a5、a6为中频发射端口，用于发射中频射频信号（例如，band1、band2、band3等频段的射频信号）。b4、b5、b6为中频接收端口，用于接收中频射频信号。a7、a8、a9为低频发射端口，用于发射低频射频信号（例如，band8、band12、band20等频段的射频信号）。b7、b8、b9为低频接收端口，用于接收低频射频信号。
需要说明的是，上述实施例仅以射频收发器21的高频端口、中频端口、低频端口分别包括3个射频发射端口和3个射频接收端口为例进行说明。在其他一些实施例中，高频端口、中频端口、低频端口还可以分别包括其他数量的射频发射端口和射频接收端口。只需满足高频端口、中频端口、低频端口各自所包括的射频发射端口和射频接收端口的数量相同并且大于1即可。
功率放大单元22包括9个放大器221、222、223、224、225、226、227、228、229。其中，放大器221、222、223、224、225、226、227、228、229分别与射频收发器21的射频发射端口a1、a2、a3、a4、a5、a6、a7、a8、a9连接。
滤波单元23包括9个双工器231、232、233、234、235、236、237、238、239。其中，双工器231、232、233、234、235、236、237、238、239分别与放大器221、222、223、224、225、226、227、228、229连接。并且，双工器231、232、233、234、235、236、237、238、239分别与射频收发器21的射频接收端口b1、b2、b3、b4、b5、b6、b7、b8、b9连接。
射频电路开关芯片24包括第一开关241、第二开关242、第一滤波器244、第二滤波器245、第一阻抗调节器246以及第二阻抗调节器247。
其中，第一开关241为单刀多掷开关。第一开关241包括多个子输入端口。例如，第一开关241包括6个子输入端口c1、c2、c3、c4、c5、c6。第一开关241的输出端可以连接至c1、c2、c3、c4、c5、c6中的任意一个子输入端口。
第二开关242也为单刀多掷开关。第二开关242包括多个子输入端口。例如，第二开关242包括3个子输入端口c7、c8、c9。第二开关242的输出端可以连接至c7、c8、c9中的任意一个子输入端口。
其中，子输入端口c1、c2、c3、c4、c5、c6、c7、c8、c9分别与双工器231、232、233、234、235、236、237、238、239连接。
其中，射频电路开关芯片24包括第一输出端口P1、第二输出端口P2，并且P1与P2连接以形成第三输出端口P3。
第一开关241的输出端连接至第一滤波器244。第一滤波器244连接至第一阻抗调节器246。第一阻抗调节器246连接至第一输出端口P1。
第二开关242的输出端连接至第二滤波器245。第二滤波器245连接至第二阻抗调节器247。第二阻抗调节器247连接至第二输出端口P2。
第一输出端口P1与第二输出端口P2连接，以形成第三输出端口P3。第三输出端口P3连接至天线25。
其中，第一滤波器244为高通滤波器。例如，第一滤波器244可以允许频率高于1710MHz（兆赫兹）的射频信号通过。第二滤波器245为低通滤波器。例如，第二滤波器245可以允许频率低于1000MHz的射频信号通过。
其中，第一滤波器244、第二滤波器245的输出阻抗相等。例如，第一滤波器244、第二滤波器245的输出阻抗均为50欧姆。第一阻抗调节器246、第二阻抗调节器247用于共同调节第三输出端口P3的输出阻抗，以使得第三输出端口P3的输出阻抗与第一滤波器244、第二滤波器245的输出阻抗相等。
在一些实施例中，第一阻抗调节器246为电容。第二阻抗调节器247也为电容。电容246、电容247分别与第一滤波器244、第二滤波器245串联连接。在一些实施例中，电容246、电容247也可以分别与第一滤波器244、第二滤波器245并联连接。
当开关241接通c1、c2、c3、c4、c5、c6中的任意一路，开关242断开时，射频电路开关芯片24可以通过天线25实现收发高频信号或中频信号。
当开关241断开，开关242接通c7、c8、c9中的任意一路时，射频电路开关芯片24可以通过天线25实现收发低频信号。
当开关241接通c1、c2、c3中的任意一路，开关242接通c7、c8、c9中的任意一路时，射频电路开关芯片24可以通过天线25实现收发高频信号与低频信号的载波聚合信号。
当开关241接通c4、c5、c6中的任意一路，开关242接通c7、c8、c9中的任意一路时，射频电路开关芯片24可以通过天线25实现收发中频信号与低频信号的载波聚合信号。
例如，子输入端口c1可以与射频收发器21中的高频频段band40发射端口连接，子输入端口c4可以与射频收发器21中的中频频段band3发射端口连接，子输入端口c7可以与射频收发器21中的低频频段band12发射端口连接。
当开关241接通c1，开关242断开时，射频电路开关芯片24可以通过天线25实现收发band40射频信号。
当开关241接通c4，开关242断开时，射频电路开关芯片24可以通过天线25实现收发band3射频信号。
当开关241接通c1，开关242接通c7时，射频电路开关芯片24可以通过天线25实现收发band40与band12的载波聚合信号。
当开关241接通c4，开关242接通c7时，射频电路开关芯片24可以通过天线25实现收发band3与band12的载波聚合信号。
本发明实施例中，射频电路开关芯片24可以控制第一开关241接通射频收发器21的高频端口或中频端口，同时第二开关242断开，以收发高频信号或中频信号；可以控制第一开关241断开，同时第二开关242接通射频收发器21的低频端口，以收发低频信号；可以控制第一开关241接通射频收发器21的高频端口或中频端口，同时第二开关242接通射频收发器21的低频端口，以收发高频信号与低频信号的载波聚合信号，或收发中频信号与低频信号的载波聚合信号。射频电路开关芯片24能够控制天线25收发高频、中频、低频等不同频段的射频信号，也能控制天线25收发不同频段的载波聚合信号，从而可以提高电子设备100收发射频信号的多样性。
继续参考图1和图2。其中，电池104安装在壳体105内部。电池104用于为电子设备100提供电能。
壳体105用于形成电子设备100的外部轮廓。壳体105的材质可以为塑料或金属。壳体105可以一体成型。
参考图13，图13为本发明实施例提供的电子设备100的另一结构示意图。电子设备100包括天线装置10、存储器20、显示单元30、电源40以及处理器50。本领域技术人员可以理解，图13中示出的电子设备100的结构并不构成对电子设备100的限定。电子设备100可以包括比图示更多或更少的部件，或者组合某些部件，或者不同的部件布置。
其中，天线装置10包括上述任一实施例中所描述的射频电路200。天线装置10可以通过无线网络与网络设备（例如，服务器）或其他电子设备（例如，智能手机）通信，完成与网络设备或其他电子设备之间的信息收发。
存储器20可用于存储应用程序和数据。存储器20存储的应用程序中包含有可执行程序代码。应用程序可以组成各种功能模块。处理器50通过运行存储在存储器20的应用程序，从而执行各种功能应用以及数据处理。
显示单元30可用于显示由用户输入到电子设备100的信息或提供给用户的信息以及电子设备100的各种图形用户接口。这些图形用户接口可以由图形、文本、图标、视频和其任意组合来构成。显示单元30可包括显示面板。
电源40用于给电子设备100的各个部件供电。在一些实施例中，电源40可以通过电源管理系统与处理器50逻辑相连，从而通过电源管理系统实现管理充电、放电、以及功耗管理等功能。
处理器50是电子设备100的控制中心。处理器50利用各种接口和线路连接整个电子设备100的各个部分，通过运行或执行存储在存储器20内的应用程序，以及调用存储在存储器20内的数据，执行电子设备100的各种功能和处理数据，从而对电子设备100进行整体监控。
此外，电子设备100还可以包括摄像头模块、蓝牙模块等，在此不再赘述。
以上对本发明实施例提供的射频电路开关芯片、射频电路、天线装置及电子设备进行了详细介绍，本文中应用了具体个例对本发明的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本发明。同时，对于本领域的技术人员，依据本发明的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本发明的限制。

Claims (20)

  1. 一种射频电路开关芯片，其中，所述射频电路开关芯片包括第一开关、第二开关、第一滤波器、第二滤波器、第一阻抗调节器以及第二阻抗调节器，所述第一开关输出高频信号或中频信号，所述第二开关输出低频信号，所述第一开关、第一滤波器以及第一阻抗调节器依次连接，所述第二开关、第二滤波器以及第二阻抗调节器依次连接；
    当所述第一开关接通，所述第二开关断开时，所述射频电路开关芯片收发高频信号或中频信号；
    当所述第一开关断开，所述第二开关接通时，所述射频电路开关芯片收发低频信号；
    当所述第一开关、第二开关同时接通时，所述射频电路开关芯片收发载波聚合信号，所述载波聚合信号为高频信号与低频信号的载波聚合信号，或中频信号与低频信号的载波聚合信号。
  2. 根据权利要求1所述的射频电路开关芯片，其中，所述射频电路开关芯片具有第一输出端口和第二输出端口，所述第一滤波器和第二滤波器分别连接至所述第一输出端口和第二输出端口。
  3. 根据权利要求2所述的射频电路开关芯片，其中，所述第一输出端口与第二输出端口连接，以形成第三输出端口。
  4. 根据权利要求3所述的射频电路开关芯片，其中，所述第一滤波器的输出阻抗与所述第二滤波器的输出阻抗相等，所述第三输出端口的输出阻抗与所述第一滤波器、第二滤波器的输出阻抗相等。
  5. 根据权利要求1所述的射频电路开关芯片，其中，所述第一滤波器、第二滤波器分别接地。
  6. 根据权利要求1所述的射频电路开关芯片，其中，所述第一阻抗调节器为电感或电容。
  7. 根据权利要求1所述的射频电路开关芯片，其中，所述第二阻抗调节器为电感或电容。
  8. 根据权利要求1所述的射频电路开关芯片，其中，所述第一开关、第二开关均为单刀多掷开关。
  9. 一种射频电路，其中，所述射频电路包括射频收发器、射频电路开关芯片以及天线，所述射频收发器、射频电路开关芯片以及天线依次连接；
    所述射频电路开关芯片包括第一开关、第二开关、第一滤波器、第二滤波器、第一阻抗调节器以及第二阻抗调节器，所述第一开关输出高频信号或中频信号，所述第二开关输出低频信号，所述第一开关、第一滤波器以及第一阻抗调节器依次连接，所述第二开关、第二滤波器以及第二阻抗调节器依次连接；
    当所述第一开关接通，所述第二开关断开时，所述射频电路开关芯片收发高频信号或中频信号；
    当所述第一开关断开，所述第二开关接通时，所述射频电路开关芯片收发低频信号；
    当所述第一开关、第二开关同时接通时，所述射频电路开关芯片收发载波聚合信号，所述载波聚合信号为高频信号与低频信号的载波聚合信号，或中频信号与低频信号的载波聚合信号。
  10. 根据权利要求9所述的射频电路，其中，所述射频收发器包括高频端口、中频端口以及低频端口，所述高频端口、中频端口均与所述第一开关的输入端连接，所述低频端口与所述第二开关的输入端连接。
  11. 根据权利要求10所述的射频电路，其中，所述高频端口包括N1个不同频段的子发射端口以及N1个不同频段的子接收端口，所述第一开关的输入端包括N1个高频子输入端口，所述N1个子发射端口与所述N1个高频子输入端口一一连接，所述N1个子接收端口与所述N1个高频子输入端口一一连接；
    所述中频端口包括N2个不同频段的子发射端口以及N2个不同频段的子接收端口，所述第一开关的输入端还包括N2个中频子输入端口，所述N2个子发射端口与所述N2个中频子输入端口一一连接，所述N2个子接收端口与所述N2个中频子输入端口一一连接；
    所述低频端口包括N3个不同频段的子发射端口以及N3个不同频段的子接收端口，所述第二开关的输入端包括N3个低频子输入端口，所述N3个子发射端口与所述N3个低频子输入端口一一连接，所述N3个子接收端口与所述N3个低频子输入端口一一连接；
    其中，N1、N2、N3均为大于1的自然数。
  12. 根据权利要求11所述的射频电路，其中，所述高频端口的每一个子发射端口与所述第一开关的每一个对应高频子输入端口之间、所述中频端口的每一个子发射端口与所述第一开关的每一个对应中频子输入端口之间、所述低频端口的每一个子发射端口与所述第一开关的每一个对应低频子输入端口之间均连接有功率放大器。
  13. 根据权利要求11所述的射频电路，其中，所述高频端口的每一个子发射端口与所述第一开关的每一个对应高频子输入端口之间、所述中频端口的每一个子发射端口与所述第一开关的每一个对应中频子输入端口之间、所述低频端口的每一个子发射端口与所述第一开关的每一个对应低频子输入端口之间均连接有双工器或滤波器。
  14. 根据权利要求9所述的射频电路，其中，所述第一滤波器的输出端、第二滤波器的输出端均与所述天线连接。
  15. 根据权利要求9所述的射频电路，其中，所述天线包括第一子天线和第二子天线，所述第一滤波器的输出端与所述第一子天线连接，所述第二滤波器的输出端与所述第二子天线连接。
  16. 一种天线装置，其中，包括射频电路，所述射频电路包括射频收发器、射频电路开关芯片以及天线，所述射频收发器、射频电路开关芯片以及天线依次连接；
    所述射频电路开关芯片包括第一开关、第二开关、第一滤波器、第二滤波器、第一阻抗调节器以及第二阻抗调节器，所述第一开关输出高频信号或中频信号，所述第二开关输出低频信号，所述第一开关、第一滤波器以及第一阻抗调节器依次连接，所述第二开关、第二滤波器以及第二阻抗调节器依次连接；
    当所述第一开关接通，所述第二开关断开时，所述射频电路开关芯片收发高频信号或中频信号；
    当所述第一开关断开，所述第二开关接通时，所述射频电路开关芯片收发低频信号；
    当所述第一开关、第二开关同时接通时，所述射频电路开关芯片收发载波聚合信号，所述载波聚合信号为高频信号与低频信号的载波聚合信号，或中频信号与低频信号的载波聚合信号。
  17. 一种电子设备，其中，所述电子设备包括壳体和电路板，所述电路板安装在所述壳体内部，所述电路板上设置有射频电路，所述射频电路包括射频收发器、射频电路开关芯片以及天线，所述射频收发器、射频电路开关芯片以及天线依次连接；
    所述射频电路开关芯片包括第一开关、第二开关、第一滤波器、第二滤波器、第一阻抗调节器以及第二阻抗调节器，所述第一开关输出高频信号或中频信号，所述第二开关输出低频信号，所述第一开关、第一滤波器以及第一阻抗调节器依次连接，所述第二开关、第二滤波器以及第二阻抗调节器依次连接；
    当所述第一开关接通，所述第二开关断开时，所述射频电路开关芯片收发高频信号或中频信号；
    当所述第一开关断开，所述第二开关接通时，所述射频电路开关芯片收发低频信号；
    当所述第一开关、第二开关同时接通时，所述射频电路开关芯片收发载波聚合信号，所述载波聚合信号为高频信号与低频信号的载波聚合信号，或中频信号与低频信号的载波聚合信号。
  18. 根据权利要求17所述的电子设备，其中，所述射频收发器包括高频端口、中频端口以及低频端口，所述高频端口、中频端口均与所述第一开关的输入端连接，所述低频端口与所述第二开关的输入端连接。
  19. 根据权利要求17所述的电子设备，其中，所述第一滤波器的输出端、第二滤波器的输出端均与所述天线连接。
  20. 根据权利要求17所述的射频电路，其中，所述天线包括第一子天线和第二子天线，所述第一滤波器的输出端与所述第一子天线连接，所述第二滤波器的输出端与所述第二子天线连接。
PCT/CN2017/083842 2017-05-10 2017-05-10 射频电路开关芯片、射频电路、天线装置及电子设备 Ceased WO2018205175A1 (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113497630A (zh) * 2020-04-08 2021-10-12 Oppo广东移动通信有限公司 天线装置及电子设备

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111181540B (zh) * 2020-02-11 2026-03-31 开元通信技术（厦门）有限公司 一种射频接收开关电路及射频前端芯片
JP2021180357A (ja) * 2020-05-11 2021-11-18 株式会社村田製作所 高周波モジュールおよび通信装置
CN114189252A (zh) * 2021-06-21 2022-03-15 上海猎芯半导体科技有限公司 一种射频芯片

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN204391286U (zh) * 2015-01-28 2015-06-10 中兴通讯股份有限公司 天线和三载波天线
CN204761429U (zh) * 2015-06-24 2015-11-11 陈林 一种终端设备
CN105162491A (zh) * 2015-09-22 2015-12-16 广东欧珀移动通信有限公司 天线及其传输射频信号的控制方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN202750123U (zh) * 2012-06-18 2013-02-20 青岛海信移动通信技术股份有限公司 一种共用天线的布设结构及移动终端
CN105871411B (zh) * 2012-12-10 2018-08-10 联想(北京)有限公司 射频芯片、射频电路以及电子设备

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN204391286U (zh) * 2015-01-28 2015-06-10 中兴通讯股份有限公司 天线和三载波天线
CN204761429U (zh) * 2015-06-24 2015-11-11 陈林 一种终端设备
CN105162491A (zh) * 2015-09-22 2015-12-16 广东欧珀移动通信有限公司 天线及其传输射频信号的控制方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113497630A (zh) * 2020-04-08 2021-10-12 Oppo广东移动通信有限公司 天线装置及电子设备
CN113497630B (zh) * 2020-04-08 2023-02-28 Oppo广东移动通信有限公司 天线装置及电子设备

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