WO2018176388A1

WO2018176388A1 - Techniques to maintain memory confidentiality through power state changes

Info

Publication number: WO2018176388A1
Application number: PCT/CN2017/079002
Authority: WO
Inventors: Jiewen Yao; Michael A. Rothman; Vincent J. Zimmer
Original assignee: Intel Corporation
Priority date: 2017-03-31
Filing date: 2017-03-31
Publication date: 2018-10-04

Abstract

Various embodiments are generally directed to techniques to maintain confidentiality of non-volatile memoryin a computer system through power state changes, such as, between a hibernation state and an awake state, for instance. Some embodiments are particularly directed a memory confidentiality manager (MCM) that clears content in a protected non-volatile memory unless appropriate session data is provided after a power state change. In various embodiments, the MCM may comprise one or more portions of a state machine (SM). In some embodiments, a memory controller associated with the protected memory may provide the session data to the MCM as part of an authentication operation. In some such embodiments, the memory controller may comprise one or more portions of a system on chip (SOC).

Description

TECHNIQUES TO MAINTAIN MEMORY CONFIDENTIALITY THROUGH POWER STATE CHANGES

BACKGROUND

Generally, in computing, memory can be classified as either volatile or non-volatile. Volatile memory may refer to memory that requires power to maintain stored data and non-volatile memory may refer to memory that does not require power to maintain stored data. In other words, non-volatile memory may maintain data when a power state change occurs and volatile memory may lose data when a power state change occurs. In some systems, inadvertent secrets may remain in non-volatile memory after a power state change. For example, an unexpected power down may cause confidentiality objects to remain on the non-volatile memory.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates an embodiment of a first operating environment.

FIG. 2 illustrates an embodiment of a second operating environment.

FIGS. 3A-3B illustrate an embodiment of a first logic flow.

FIG. 4 illustrates an embodiment of a second logic flow.

FIG. 5 illustrates an embodiment of a third logic flow.

FIG. 6 illustrates an embodiment of a fourth logic flow.

FIG. 7 illustrates an embodiment of a storage medium.

FIG. 8 illustrates an embodiment of a computing architecture.

FIG. 9 illustrates an embodiment of a communications architecture.

DETAILED DESCRIPTION

Various embodiments are generally directed to techniques to maintain confidentiality of non-volatile memory in a computer system through power state changes, such as, between a hibernation state and an awake state, for instance. Some embodiments are particularly directed a memory confidentiality manager (MCM) that clears content in a protected non-volatile memory unless appropriate session data is provided after a power state change. In various embodiments, the MCM may comprise one or more portions of a state machine (SM) . In some embodiments, a memory controller associated with the protected memory may provide the session data to the MCM as part of an authentication operation. In some such embodiments, the memory controller may comprise one or more portions of a system on chip (SOC) .

In various embodiments described here, the MCM may receive session data as part of an authentication operation in response to a power state change. When the session data is null, the MCM may clear content in a non-volatile memory. When the session data is non-null, the MCM may determine whether the session data matches data in a session memory. In such examples, the MCM may clear content in the non-volatile memory when the session data does not match data in the session memory and permit access to content in the non-volatile memory when the session data matches data in the session memory. In some embodiments, the authentication operation may include a handshake procedure. In some such embodiments, session data that enables access to content in the non-volatile memory may have been generated as part of a previous handshake procedure between the MCM and the memory controller performed as part of a previous authentication operation in response to a previous power state change. These and other embodiments are described and claimed.

Some challenges facing memory confidentiality managers maintaining memory confidentiality through power state changes include the inability or use of excessively complex, unreliable, and inefficient techniques to protect confidentiality objects stored in non-volatile memory. Maintaining memory confidentiality through power state changes may require operating system (OS) support and/or encryption, which can create excessive processing overhead. For instance, an OS may have to create, encrypt, and store a hibernation file and decrypt the hibernation file during system resume. Adding further complexity, power state changes can be unexpected. Unexpected power state changes may result in inadvertent secrets being left in non- volatile memory. Sometimes an unauthorized user may attempt to use power state changes as an attack vector to gain access to secrets, such as confidentiality objects, inadvertently left in non-volatile memory. In various embodiments, the non-volatile memory may be moved to a different machine by an unauthorized user in an attempt to gain access to secrets stored in the non-volatile memory. These and other factors may result in poor performance and limited efficiency in maintaining memory confidentiality through power state changes. Such limitations can drastically reduce the capabilities, usability, security, and applicability of memory confidentiality managers, contributing to ineffective systems with limited capabilities.

Various embodiments described herein include a memory confidentiality manager (MCM) that maintains memory confidentiality through power state changes in a secure and efficient manner. For instance, the MCM may clear content in a protected memory in response to a power state change unless appropriate session data is provided by a memory controller in order to protect confidentiality objects stored in the protected memory. In various embodiments, the memory controller may enable the protected memory to be migrated from one computer system to another. For example, session data may be migrated from a first memory controller to a second memory controller. In some embodiments, the memory confidentiality manager may enable a computer system to transition between a hibernation state and an awake state without the need for operating system (OS) support. Without the need for OS support, no OS hibernation file is needed. Absence of a hibernation file can improve security by removing a target for hackers. Further it may increase efficiency by decreasing processor overhead associated with utilization of the hibernation file. For instance, a hibernation file may be encrypted and stored in secondary memory, such as disk storage. In such instances, the hibernation file may slow the actual runtime of a computer system or significantly impact boot time. Additionally, the MCM can protect confidentiality during unexpected power state changes by requiring the appropriate session data to enable access to the protected memory when the system is resumed. In these and other ways the MCM may enable confidentiality of a non-volatile memory to be maintained through various power state changes in a quick, secure, and efficient manner, resulting in several technical effects and advantages.

With general reference to notations and nomenclature used herein, one or more portions of the detailed description which follows may be presented in terms of program procedures executed on a computer or network of computers. These procedural descriptions and representations are used by those skilled in the art to most effectively convey the substances of their work to others skilled in the art. A procedure is here, and generally, conceived to be a self-consistent sequence of operations leading to a desired result. These operations are those requiring physical manipulations of physical quantities. Usually, though not necessarily, these quantities take the form of electrical, magnetic, or optical signals capable of being stored, transferred, combined, compared, and otherwise manipulated. It proves convenient at times, principally for reasons of common usage, to refer to these signals as bits, values, elements, symbols, characters, terms, numbers, or the like. It should be noted, however, that all of these and similar terms are to be associated with the appropriate physical quantities and are merely convenient labels applied to those quantities.

Further, these manipulations are often referred to in terms, such as adding or comparing, which are commonly associated with mental operations performed by a human operator. However, no such capability of a human operator is necessary, or desirable in most cases, in any of the operations described herein that form part of one or more embodiments. Rather, these operations are machine operations. Useful machines for performing operations of various embodiments include general purpose digital computers as selectively activated or configured by a computer program stored within that is written in accordance with the teachings herein, and/or include apparatus specially constructed for the required purpose. Various embodiments also relate to apparatus or systems for performing these operations. These apparatuses may be specially constructed for the required purpose or may include a general-purpose computer. The required structure for a variety of these machines will be apparent from the description given.

Reference is now made to the drawings, wherein like reference numerals are used to refer to like elements throughout. In the following description, for purpose of explanation, numerous specific details are set forth in order to provide a thorough understanding thereof. It may be evident, however, that the novel embodiments can be practiced without these specific details. In other instances, well known structures and devices are shown in block diagram form in order to facilitate a description thereof. The intention is to cover all modification, equivalents, and alternatives within the scope of the claims.

FIG. 1 illustrates an example of an operating environment 100 that may be representative of various embodiments. Operating environment 100 may include a computer system 101 with a state machine (SM) 102 and a system on chip (SOC) 104. In the illustrated embodiment, SM 102 may include a memory confidentiality manager (MCM) 108, a MCM key memory 110, a MCM session memory 112, and a protected memory 114 and SOC 104 may include a memory controller (MC) 116, a MC key memory 118, a MC session memory 120, and a trusted execution environment (TEE) 122. In operating environment 100, an authentication operation 106 may occur between MCM 108 and MC 116 to determine how to handle contents of a protected memory 114 in response to a power state change of the computer system 101. For example, MCM 108 may receive session data stored in MC session memory 120 from MC 116 as part of authentication operation 106. When the session data is null, MCM 108 may clear contents of the protected memory 114 and when the session data is non-null, MCM 108 may determine whether the session data matches data in MCM session memory 112. When the session data does not match data in MCM session memory 112, MCM 108 may clear content in the protected memory 114 and when the session data matches data in MCM session memory 112, MCM 108 may permit access to content in the protected memory 114. Embodiments are not limited in this context.

In some embodiments, the MCM 108 may operate to secure content in protected memory 114 by protecting the content from malicious users using a power state change as an attack vector. For example, protected memory 114 may be a non-volatile dual in-line memory module (NVDIMM) that MCM 108 will clear in response to a power state change unless MC 116 provides appropriate session data (e.g., session data that matches data in MCM session memory 112) . In various embodiments, a power state change may include an expected or unexpected transition of computer system 101 to/from various different power states, such as sleep, awake, hibernate, suspend, shutdown, and the like. For instance, a transition from hibernate to awake may be the basis for authentication operation 106.

In various embodiments the session data may be null when SOC 104 determines computer system 101 did not experience a valid suspend/shutdown prior to the power state change and/or the power state change is not from a resume of computer system 101. In some embodiments, a valid suspend/shutdown prior to the power state change may be indicative of computer system 101 health. In various embodiments, the power state change being from a resume may be indicative of a need to reuse contents of protected memory 114. Thus, the session data being null may imply or indicate that computer system 101 is either unhealthy or has no need for the contents of protected memory 114. Accordingly, MCM 108 may clear contents of the protected memory 114 when session data received by MCM 108 is null.

In some embodiments the session data provided to MCM 108 may be non-null when SOC 104 determines computer system 101 experienced a valid suspend/shutdown prior to the power state change and/or the power state change is from a resume. In various such embodiments, the session data received by MCM 108 may match data in the MCM session memory 112 when the session data was generated or is a copy of data generated based on one or more hard-fused secrets as part of a previous authentication operation in response to a previous power state change. Thus, the session data being non-null and matching data in MCM session memory 112 may indicate computer system 101 is healthy and has a need for the contents of protected memory 114. Accordingly, MCM 108 may permit access to content in the protected memory 114 when the session data is non-null and matches data in MCM session memory 112.

In various embodiments, MCM key memory 110 and MC key memory 118 may each store a hard-fused secret. In various such embodiments, the hard-fused secrets in each of MCM key memory 110 and MC key memory 118 may include any data that enables authentication between SM 102 and SOC 104, such as one or more keys and/or certificates. In some embodiments, the hard-fused secrets may be used during an authentication operation (e.g., authentication operation 106) to generate data to store in MCM session memory 112 and MC session memory 120. In some such embodiments, the authentication operation may include a mutual authentication between SM 102 and SOC 104, such as a two-way handshake procedure.

For instance, new session data may be generated and stored in MCM session memory 112 and MC session memory 120 based on the hard-fused secrets when data in MCM session memory 112 does not match the session data provided by MC 116 as part of authentication operation 106. In other instances, when the session data provided during authentication operation 106 matches data in the MCM session memory 112, MC 116 may be allowed to access contents of protected memory 114 and new session data may not be generated. In such other instances, the session data provided during authentication operation 106 may have been generated based on the hard-fused secrets as part of a previous authentication operation in response to a previous power state change. The authentication operation 106 between SM 102 and SOC 104 will be described in more detail below, such as with respect to FIGS. 2-4. In various embodiments, MC 116 may be an integrated memory controller (IMC) .

In some embodiments, MCM key memory 110 (and therefore the respective hard-fused secret) and MCM session memory 112 may only be accessed by components of SM 102 (e.g., MCM 108) and MC key memory 118 (and therefore the respective hard-fused secret) and MC session memory 120 may only be accessed by components of SOC 104 (e.g., MC 116 and/or TEE 122) . In various embodiments, MCM key memory 110 and MC key memory 118 may be read-only memory (ROM) and MCM session memory 112 and MC session memory 120 may be read-write memory. In some embodiments, the hard-fused secrets included in each of MCM key memory 110 and MC key memory 118 may be provisioned at manufacture. In various embodiments, the hard-fused secrets in each of MCM key memory 110 and MC key memory 118 may include any data that enables authentication of SM 102 and SOC 104, respectively.

In some embodiments, one or more of MCM key memory 110 or MC key memory 118 may be a portion of firmware. For instance, MCM key memory 110 may be a portion of the firmware for SM 102 and/or MC key memory 118 may be a portion of the firmware for SOC 104. In various embodiments, one or more of MCM session memory 112 or MC session memory 120 may be separate portions of protected memory 114. For example, one or more lines of memory in protected memory 114 may be provisioned for use as MCM session memory 112 and one or more other lines of memory in protected memory 114 may be provisioned for use as MC session memory 120.

In some embodiments, the protected memory 114 may include non-volatile memory that may retain confidential data after a power state change. For example, after an unexpected power loss, protected memory 114 may retain its contents. In some embodiments, the contents of a non-volatile memory that remain after a power state change may provide an attack vector for malicious users. In some such embodiments, requiring appropriate session data after a power state change prior to providing access to protected memory 114 can maintain the confidentiality of the contents of the protected memory in an efficient manner without the need for encryption.

In various embodiments, protected memory 114 may include a NVDIMM. In various such embodiments, the NVDIMM may utilize three-dimension cross point (3D XPoint) technology. In some embodiments, the protected memory 114 may be mapped memory. In various embodiments, the protected memory 114 may bind to computer system 101. In some embodiments, content of the protected memory 114 may be migrated to a different computer system. For instance, protected memory 114 may support session migration to enable hotplug without losing content in protected memory 114 (see e.g., FIGS. 5 and 6) . In various embodiments, protected memory 114 may comprise random access memory (RAM) of computer system 101.

FIG. 2 illustrates an example of an operating environment 200 that may be representative of various embodiments. In operating environment 200, authentication operation 106 may include a handshake procedure 220 that occurs between SM 102 and SOC 104 of the computer system 101 to enable MCM 108 to determine how to handle a confidentiality object 208 in protected memory 114, such as during initialization of computer system 101 in response to a power state change. In various embodiments described herein, during initialization of computer system 101, SOC 104 needs to provide evidence that the computer system 101 is healthy and of a need to reuse confidentiality object 208 in protected memory 114. In various such embodiments, sufficient evidence is provided when MC session data 214 is determined to match MCM session data 206 as part of handshake procedure 220. However, if SOC 104 does not provide sufficient evidence (e.g., MC session data 214 does not match MCM session data 206) , confidentiality object 208 may be cleared from protected memory 114 to protect the content of the confidentiality object 208. Embodiments are not limited in this context.

In some embodiments, the handshake procedure 220 may utilize and/or be performed by one or more of MCM 108, MCM private certificate 202 and MCM public certificate list 204 in MCM key memory 110, MCM session data 206 in MCM session memory 112, MC 116, MC private certificate 210 and MC public certificate list 212 in MC key memory 118, MC session data in MC session memory 120, and TEE 122 comprising trusted processor 216 and trusted memory 218. In some such embodiments, handshake procedure 220 may enable MCM 108 to determine how to handle a confidentiality object 208 in protected memory 114 based on whether or not MC session data 214 matches MCM session data 206.

In embodiments that MC session data 214 matches MCM session data 206, handshake procedure 220 may include or be referred to as a partial handshake. In a partial handshake, a previous session may be resumed between SM 102 and SOC 104 with the matching session data. In embodiments, that MC session data 214 does not match MCM session data 206, handshake procedure 220 may include or be referred to as a full handshake. In a full handshake, new session data may be generated to establish a new session between SM 102 and SOC 104. In various embodiments, MCM session data 206 and/or MC session data 214 may include one or more of a master secret, a session ID, a session ticket, or a session key. In some embodiments, handshake procedure 220 may include one or more portions of a handshake protocol, such as a transport layer security (TLS) handshake protocol.

In various embodiments, in response to a power state change, SOC 104 may store a copy of valid session data 221 in MC session memory 120 as MC session data 214 when one or more of the following occur: computer system 101 experienced a valid suspend/shutdown prior to the power state change； the power state change is from a resume； or valid session data 221 exists in trusted memory 218. In some embodiments, in response to a power state change, SOC 104 may store null session data in MC session memory 120 as MC session data 214 when one or more of the following occur: computer system 101 did not experience a valid suspend/shutdown prior to the power state change； the power state change is not from a resume； or valid session data 221 does not exist in trusted memory 218. In one or more embodiments described herein, storing null session data may refer to clearing the contents of MC session memory 120. In some embodiments, a valid suspend/shutdown prior to the power state change and/or a match between MCM session data 206 and MC session data 214 may indicate computer system 101 is healthy. In various embodiments, the power state change being from a resume of computer system 101 may indicate a need to reuse confidentiality object 208 in protected memory 114.

Once either a copy of valid session data 221 or null session data is stored in MC session memory 120 as MC session data 214, MC 116 may then communicate the MC session data 214 to MCM 108 as part of handshake procedure 220. When MC session data 214 matches MCM session data 206, MC 116 may be allowed to access confidentiality object 208 in protected memory 114. However, when MC session data 214 does not match MCM session data 206, MCM 108 may cause confidentiality object 208 to be cleared from protected memory 114. In some embodiments, valid session data 221 may exist in trusted memory 218 when it was generated based on one or more hard- fused secrets (e.g., MCM private certificate 202, MCM public certificate list 204, MC private certificate 210, and MC public certificate list 212) as part of a previous handshake procedure in response to a previous power state change. In various embodiments, MC session data 206 may only match MCM session data 206 when MC session data 214 includes a copy of valid session data 221 that was generated based on one or more hard-fused secrets (e.g., MCM private certificate 202, MCM public certificate list 204, MC private certificate 210, and MC public certificate list 212) as part of a previous handshake procedure that also resulted in generation of MCM session data 206.

In some embodiments, when MC session data 214 does not match MCM session data 206, new session data may also be generated and stored as MCM session data 206 and MC session data 214 based on MCM private certificate 202, MCM public certificate list 204, MC private certificate 210, and MC public certificate list 212 as part of handshake procedure 220. In various embodiments, the new session data may also exist in trusted memory 218 as valid session data 221 in response to generation of the new session data as part of handshake procedure 220. In various such embodiments, a copy of the valid session data 221 may comprise the new session data stored as MCM session data 206 and MC session data 214.

FIGS. 3A-3B illustrate one embodiment of a logic flow 300, which may be representative of operations that may be executed in various embodiments in conjunction with maintaining memory confidentiality through power state changes. The logic flow 300 may be representative of some or all of the operations that may be executed by one or more components of operating

environments

100 and 200 of FIGS. 1-2, such as computer system 101, SOC 104, MC 116, or TEE 122. The embodiments are not limited in this context.

In the portion of the illustrated embodiment shown in FIG. 3A, the logic flow 300 may begin at block 302. At block 302 “begin initialization in response to power state change” a system may begin initialization in response to a power state change. For example, computer system 101 may be powered on as part of a power state change and initialization of the computer system 101 may begin. In various embodiments, initialization of the computer system 101 may begin with execution of basic input/output system (BIOS) code. In various such embodiments, execution of BIOS code may be in response to a power state change comprising a transition of computer system 101 between one or more of a hibernation state, a sleep state, a shutdown state, a suspended state, or an awake state.

Continuing to block 304 “MC initialization” , a memory controller may be initialized. For instance, MC 116 may be initialized. In some embodiments, MC 116 may be initialized by TEE 122 in response to a memory reference code (MRC) being provided to TEE 122. In some such embodiments, the MRC may be provided to TEE 122 as part of execution of BIOS code. In various embodiments, the MRC may identify how protected memory 114 will be read and written. In some embodiments, the MRC may adjust memory timing algorithms associated with protected memory 114 to account for any memory settings or hardware components of computer system 101.

At to block 304 “Valid suspend/shutdown？ ” it may be determined whether a valid suspend or shutdown occurred prior to the power state change. For example, SOC 104 may check if computer system 101 experienced a valid shutdown or suspend prior to the power state change. In some embodiments, TEE 122 of SOC 104 may determine whether computer system 101 experienced a valid shutdown or suspend prior to the power state change. In various embodiments, if computer system 101 did not experience a valid shutdown or suspend prior to the power state change, logic flow 300 may proceed to block 308. At block 308 “set session data in MC session memory to null” session data in MC session memory may be set to null. For example, content of MC session memory 120 may be cleared. In some embodiments, null session data may be stored in MC session memory 120 as MC session data 214 to set session data in MC session memory to null.

Referring back to block 304 “Valid suspend/shutdown？ ” , if computer system 101 did experience a valid shutdown or suspend prior to the power state change, it may be determined if the power state change is from a resume of computer system 101 at block 310 “Resume？ ” . For instance, TEE 122 of SOC 104 may determine whether the power state change is from a resume of computer system 101. If the power state change is not from a resume of computer system 101, logic flow 300 may proceed to block 308 “set session data in MC session memory to null” . On the other hand, if the power state change is from a resume of computer system 101, logic flow 300 may proceed to block 312 “valid session data in trusted memory？ ” .

At block 312 “Valid session data in trusted memory？ ” it may be determined whether or not valid session data is stored in trusted memory. For example, TEE 122 may determine whether or not valid session data is stored in trusted memory 218. In some embodiments, trusted memory 218 may comprise a cache of trusted processor 216. In various embodiments, trusted processor 216 may determine if valid session data 221 is stored in trusted memory 218. If valid session data is not stored in the trusted memory, logic flow 300 may proceed to block 308 “set session data in MC session memory to null” . On the other hand, if valid session data is stored in the trusted memory, logic flow 300 may proceed to block 314 “copy session data to MC session memory” . At block 314 “copy session data to MC session memory” valid session data in trusted memory may be copied to MC session memory. For example, TEE 122 may cause valid session data 221 in trusted memory 218 to be written to MC session memory 120 as MC session data 214.

Proceeding to block 316 “send session data to SM for authentication” the session data stored in MC session memory may be sent to SM for authentication. For example, MC session data 214 may be sent to SM 102 for authentication by MCM 108. In various embodiments, MC session data 214 may be either null or a copy of valid session data 221 in trusted memory 218. At block 318, logic flow 300 proceeds to FIG. 3B.

Continuing to block 320 “session data authenticated？ ” it may be determined if the session data was authenticated. For example, SOC 104 may receive an indication from MCM 108 regarding whether MC session data 214 was authenticated. In some embodiments, the MC session data 214 may be authenticated by MCM 108 when it matches MCM session data 206. If the session data is authenticated, logic flow 300 may end at block 322. However, if the session data is not authenticated, logic flow 300 may proceed to block 324 “interact with SM using contents of MC key memory to determine new session data” .

At block 324 “interact with SM using contents of MC key memory to determine new session data” the SOC may interact with SM using contents of MC key memory to determine new session data. For example, SOC 104 may interact with SM 102 using contents of MC key memory 118, such as MC private certificate 210 and MC public certificate 212, to determine new session data. In some embodiments, the new session data may be determined as part of a full handshake between SOC 104 and SM 102. Proceeding to block 326 “store new session data in MC session memory” the new session data may be stored in MC session memory. For example, the new session data may be stored in MC session memory 120 as MC session data 214. Once the new session data is stored in the MC session memory, logic flow 300 may end at block 322.

FIG. 4 illustrates one embodiment of a logic flow 400, which may be representative of operations that may be executed in various embodiments in conjunction with maintaining memory confidentiality through power state changes. The logic flow 400 may be representative of some or all of the operations that may be executed by one or more components of operating

environments

100 and 200 of FIGS. 1-2, such as computer system 101, SM 102, or MCM 108. The embodiments are not limited in this context.

In the illustrated embodiment shown in FIG. 4, the logic flow 400 may begin at block 402. At block 402 “power on” a component of computer system 101 may be powered on. For example, SM 102 may be powered on. In some embodiments, SM 102 may be powered on and await initialization by SOC 104. In various embodiments, SM 102 may be powered on and await authentication operation 106 and/or handshake procedure 220 to be initialized by SOC 104. In one or more embodiments, handshake procedure 220 may include a TLS handshake. Proceeding to block 404 “receive session data from SOC” session data may be received from an SOC. For example, SM 102 may receive MC session data 214 from SOC 104 as part of authentication operation 106, such as during handshake procedure 220. In various embodiments, session data may be received from SOC 104 by MCM 108. In some embodiments, session data may be received from SOC 104 as part of initializing SM 102 and/or handshake procedure 220.

At block 408 “session data null？ ” it may be determined whether or not the session data received from SOC is null. For example, MCM 108 may determine whether the session data received from SOC 104 is null. If the session data is null, logic flow 400 may proceed to block 410. At block 410 “clear content in protected memory” content in protected memory may be cleared. For example, MCM 108 may clear content in protected memory 114 in response to receiving MC session data 214 that is null. In some embodiments, MCM 108 may clear confidentiality object 208 from protected memory 114 in response to receiving session data from SOC 104 that is null.

Proceeding to block 412 “interact with SOC using contents of MCM key memory to determine new session data” the SM may interact with SOC using contents of MCM key memory to determine new session data. For example, SM 102 may interact with SOC 104 using contents of MCM key memory 110, such as MCM private certificate 202 and MCM public certificate list 204, to determine new session data. In some embodiments, the new session data may be determined as part of a full handshake between SOC 104 and SM 102. Proceeding to block 414 “store new session data in MCM session memory” the new session data may be stored in MCM session memory. For example, the new session data may be stored in MCM session memory 112 as MCM session data 206. Once the new session data is stored in the MC session memory, logic flow 400 may end at block 416.

Referring back to block 408 “session data null？ ” , if the session data is non-null, logic flow 400 may proceed to block 418. At block 418 “Session data match data in MCM session memory？ ” it may be determined if session data received from SOC matches data in MCM session memory. For example, MCM 108 may determine whether or not MC session data 214 received from SOC 104 matches MCM session data 206 in MCM session memory 112. If the session data does not match data in MCM session memory, logic flow 400 may proceed to block 410 and continue and described above. However, if the session data does match data in MCM session memory, logic flow 400 may proceed to block 420.

At block 420 “permit access to protected memory by SOC” SOC may be permitted access to protected memory. For example, SOC 104 may be allowed to access content in protected memory 114. In some embodiments, SM 102 may enable SOC 104 to access confidentiality object 208 in protected memory 114. Once access to protected memory is allowed, logic flow 400 may end at block 416.

FIG. 5 illustrates one embodiment of a logic flow 500, which may be representative of operations that may be executed in various embodiments in conjunction with maintaining memory confidentiality. The logic flow 500 may be representative of some or all of the operations that may be executed by one or more components of operating

environments

In the illustrated embodiment shown in FIG. 5, the logic flow 500 may begin at block 502. At block 502 “Receive session data export request including public key of requestor” a session data export request including a public key of a requestor may be received. For example, SOC 104 may receive a session data export request. In some embodiments, the requestor is another computer system that is the same or similar to computer system 101. Proceeding to block 504 “Allowed by export policy？ ” it may be determined whether an export policy allows the session data export request. In some embodiments, the export policy may be stored in trusted memory 218. If the export policy does not allow the session data export request, logic flow 500 may proceed to block 506. At block 506 “do not perform export request” the export request may not be performed. Logic flow 500 may then end at block 506.

Referring back to block 504 “Allowed by export policy” , if the export policy allows the requested session data export request, logic flow 500 may proceed to block 510. At block 510 “Public key of requestor valid？ ” it may be determined whether or not the public key included in the session data export request is valid. For example, SOC 104 may determine whether or not the public key corresponds to a public key stored in MC key memory 118. In some embodiments, MC public certificate list 212 may include a list of public keys and if the public key included in the session data export request does not match a public key in the list, then it may be deemed invalid. If the public key is deemed invalid, logic flow 500 may proceed to block 506 and proceed as described above. However, if the public key is deemed valid, logic flow 500 may proceed to block 512.

At block 512 “encrypt session data with public key of requestor” session data may be encrypted with the public key received with the session data export request. For example, SOC 104 may encrypt MC session data 214 with the public key received with the session data export request. Proceeding to block 514 “sign session data with private key of exporter” the session data may be signed with the private key of the exporter. For example, SOC 104 may sign the encrypted MC session data 214 with a private key in MC key memory 118. In some embodiments, MC private certificate 210 may be used as the private key to sign the encrypted MC session data 214.

Proceeding to block 514 “send datablob including encrypted and signed session data and public key of exporter to requestor” a datablob including the encrypted and signed session data and a public key of the exporter may be sent to the requestor. For example, SOC 104 may send a datablob with encrypted and signed MC session data 214 and a public key in MC key memory 118 to the session data export requestor. In some embodiments, the public key of the exporter may include a public certificate in MC public certificate list 212. Logic flow 500 may then end at block 508.

FIG. 6 illustrates one embodiment of a logic flow 600, which may be representative of operations that may be executed in various embodiments in conjunction with maintaining memory confidentiality. The logic flow 600 may be representative of some or all of the operations that may be executed by one or more components of operating

environments

In the illustrated embodiment shown in FIG. 6, the logic flow 600 may begin at block 602. At block 602 “send session data export request including public key of requestor” a session data export request including a public key of the requestor may be sent. For example, SOC 104 may send a session data export request including a public key included in MC key memory 118 to an exporter. In some embodiments, the exporter is another computer system that is the same or similar to computer system 101. In various embodiments, the public key of the requestor may include a public certificate in MC public certificate list 212.

Proceeding to block 604 “receive datablob including encrypted and signed session data and public key of exporter in response to export request” a datablob including encrypted and signed session data and a public key of exporter may be received in response to the export request. For example, SOC 104 may receive a datablob including encrypted and signed session data and a public key of exporter from another computer system that is the same or similar to computer system 101.

At block 606 “Allowed by import policy？ ” it may be determined whether an import policy allows the received datablob to be imported. In some embodiments, the import policy may be stored in trusted memory 218. If the import policy does not allow the datablob to be imported, logic flow 600 may proceed to block 608. At block 608 “do not import datablob” the datablob may not me imported. Logic flow 600 may then end at block 610.

Referring back to block 606 “Allowed by import policy” , if the import policy allows the datablob to be imported, logic flow 600 may proceed to block 612. At block 612 “Public key of exporter valid？ ” it may be determined whether or not the public key included in the datablob is valid. For example, SOC 104 may determine whether or not the public key corresponds to a public key stored in MC key memory 118. In some embodiments, MC public certificate list 212 may include a list of public keys and if the public key included in the datablob does not match a public key in the list, then it may be deemed invalid. If the public key is deemed invalid, logic flow 600 may proceed to block 608 and proceed as described above. However, if the public key is deemed valid, logic flow 600 may proceed to block 614.

At block 614 “Verify datablob” it may be determined whether the datablob is verifiable. For example, SOC 104 determine if the encrypted and signed session data received in the datablob was properly signed. In some embodiments SOC 104 may use the public key received in the data blob to verify the encrypted and signed session data received in the datablob was properly signed. If the datablob is unable to be verified, logic flow 600 may proceed to block 608 and proceed as described above. However, if the datablob is verified, logic flow 600 may proceed to block 616.

At block 616 “decrypt session data with private key of requestor” the encrypted session data may be decrypted with the private key of the requestor. For example, SOC 104 may decrypt the encrypted session data using a private key in MC key memory 118 that corresponds to the public key included in the session data export request sent at block 602. Proceeding to block 618 “store session data” the decrypted session data may be stored. For example, SOC 104 may store the decrypted session data in MC session memory 120. In some embodiments, SOC 104 may store the decrypted session data in MC session memory 120 as MC session data 214. Once the session data is stored, logic flow 600 may end at block 610.

FIG. 7 illustrates an embodiment of a storage medium 700. Storage medium 700 may comprise any non-transitory computer-readable storage medium or machine-readable storage medium, such as an optical, magnetic or semiconductor storage medium. In various embodiments, storage medium 700 may comprise an article of manufacture. In some embodiments, storage medium 700 may store computer-executable instructions, such as computer-executable instructions to implement one or more of logic flows or operations described herein, such as with respect to logic flows 300, 400, 500, and 600 of FIGS. 3A-6. Examples of a computer-readable storage medium or machine-readable storage medium may include any tangible media capable of storing electronic data, including volatile memory or non-volatile memory, removable or non-removable memory, erasable or non-erasable memory, writeable or re-writeable memory, and so forth. Examples of computer-executable instructions may include any suitable type of code, such as source code, compiled code, interpreted code, executable code, static code, dynamic code, object-oriented code, visual code, and the like. The embodiments are not limited in this context.

FIG. 8 illustrates an embodiment of an exemplary computing architecture 800 that may be suitable for implementing various embodiments as previously described. In various embodiments, the computing architecture 800 may comprise or be implemented as part of an electronic device. In some embodiments, the computing architecture 800 may be representative, for example, of a computer system that implements one or more components of operating environment 100 of FIG. 1 and/or operating environment 200 of FIG. 2. In some embodiments, computing architecture 800 may be representative, for example, one or more portions of computer system 101 that implement one or more embodiments described herein. The embodiments are not limited in this context.

As used in this application, the terms “system” and “component” and “module” are intended to refer to a computer-related entity, either hardware, a combination of hardware and software, software, or software in execution, examples of which are provided by the exemplary computing architecture 800. For example, a component can be, but is not limited to being, a process running on a processor, a processor, a hard disk drive, multiple storage drives (of optical and/or magnetic storage medium) , an object, an executable, a thread of execution, a program, and/or a computer. By way of illustration, both an application running on a server and the server can be a component. One or more components can reside within a process and/or thread of execution, and a component can be localized on one computer and/or distributed between two or more computers. Further, components may be communicatively coupled to each other by various types of communications media to coordinate operations. The coordination may involve the uni-directional or bi-directional exchange of information. For instance, the components may communicate information in the form of signals communicated over the communications media. The information can be implemented as signals allocated to various signal lines. In such allocations, each message is a signal. Further embodiments, however, may alternatively employ data messages. Such data messages may be sent across various connections. Exemplary connections include parallel interfaces, serial interfaces, and bus interfaces.

The computing architecture 800 includes various common computing elements, such as one or more processors, multi-core processors, co-processors, memory units, chipsets, controllers, peripherals, interfaces, oscillators, timing devices, video cards, audio cards, multimedia input/output (I/O) components, power supplies, and so forth. The embodiments, however, are not limited to implementation by the computing architecture 800.

As shown in FIG. 8, the computing architecture 800 comprises a processing unit 804, a system memory 806 and a system bus 808. The processing unit 804 can be any of various commercially available processors, including without limitation an

and

processors；

application, embedded and secure processors；

and

processors； IBM and

Cell processors；

Core (2)

and

processors； and similar processors. Dual microprocessors, multi-core processors, and other multi-processor architectures may also be employed as the processing unit 804.

The system bus 808 provides an interface for system components including, but not limited to, the system memory 806 to the processing unit 804. The system bus 808 can be any of several types of bus structure that may further interconnect to a memory bus (with or without a memory controller) , a peripheral bus, and a local bus using any of a variety of commercially available bus architectures. Interface adapters may connect to the system bus 808 via a slot architecture. Example slot architectures may include without limitation Accelerated Graphics Port (AGP) , Card Bus, (Extended) Industry Standard Architecture ( (E) ISA) , Micro Channel Architecture (MCA) , NuBus, Peripheral Component Interconnect (Extended) (PCI (X) ) , PCI Express, Personal Computer Memory Card International Association (PCMCIA) , and the like.

The system memory 806 may include various types of computer-readable storage media in the form of one or more higher speed memory units, such as read-only memory (ROM) , random-access memory (RAM) , dynamic RAM (DRAM) , Double-Data-Rate DRAM (DDRAM) , synchronous DRAM (SDRAM) , static RAM (SRAM) , programmable ROM (PROM) , erasable programmable ROM (EPROM) , electrically erasable programmable ROM (EEPROM) , flash memory (e.g., one or more flash arrays) , polymer memory such as ferroelectric polymer memory, ovonic memory, phase change or ferroelectric memory, silicon-oxide-nitride-oxide-silicon (SONOS) memory, magnetic or optical cards, an array of devices such as Redundant Array of Independent Disks (RAID) drives, solid state memory devices (e.g., USB memory, solid state drives (SSD) and any other type of storage media suitable for storing information. In the illustrated embodiment shown in FIG. 8, the system memory 806 can include non-volatile memory 810 and/or volatile memory 812. A basic input/output system (BIOS) can be stored in the non-volatile memory 810.

The computer 802 may include various types of computer-readable storage media in the form of one or more lower speed memory units, including an internal (or external) hard disk drive (HDD) 814, a magnetic floppy disk drive (FDD) 816 to read from or write to a removable magnetic disk 818, and an optical disk drive 820 to read from or write to a removable optical disk 822 (e.g., a CD-ROM or DVD) . The HDD 814, FDD 816 and optical disk drive 820 can be connected to the system bus 808 by a HDD interface 824, an FDD interface 826 and an optical drive interface 828, respectively. The HDD interface 824 for external drive implementations can include at least one or both of Universal Serial Bus (USB) and Institute of Electrical and Electronics Engineers (IEEE) 994 interface technologies.

The drives and associated computer-readable media provide volatile and/or nonvolatile storage of data, data structures, computer-executable instructions, and so forth. For example, a number of program modules can be stored in the drives and

memory units

810, 812, including an operating system 830, one or more application programs 832, other program modules 834, and program data 836. In one embodiment, the one or more application programs 832, other program modules 834, and program data 836 can include, for example, the various applications and/or components of the computer system 101, such as one or more portions of SM 102 and/or SOC 104.

A user can enter commands and information into the computer 802 through one or more wire/wireless input devices, for example, a keyboard 838 and a pointing device, such as a mouse 840. Other input devices may include microphones, infra-red (IR) remote controls, radio-frequency (RF) remote controls, game pads, stylus pens, card readers, dongles, finger print readers, gloves, graphics tablets, joysticks, keyboards, retina readers, touch screens (e.g., capacitive, resistive, etc. ) , trackballs, trackpads, sensors, styluses, and the like. These and other input devices are often connected to the processing unit 804 through an input device interface 842 that is coupled to the system bus 808, but can be connected by other interfaces such as a parallel port, IEEE 994 serial port, a game port, a USB port, an IR interface, and so forth.

A monitor 844 or other type of display device is also connected to the system bus 808 via an interface, such as a video adaptor 846. The monitor 844 may be internal or external to the computer 802. In addition to the monitor 844, a computer typically includes other peripheral output devices, such as speakers, printers, and so forth.

The computer 802 may operate in a networked environment using logical connections via wire and/or wireless communications to one or more remote computers, such as a remote computer 848. In various embodiments, one or more migrations may occur via the networked environment. The remote computer 848 can be a workstation, a server computer, a router, a personal computer, portable computer, microprocessor-based entertainment appliance, a peer device or other common network node, and typically includes many or all of the elements described relative to the computer 802, although, for purposes of brevity, only a memory/storage device 850 is illustrated. The logical connections depicted include wire/wireless connectivity to a local area network (LAN) 852 and/or larger networks, for example, a wide area network (WAN) 854. Such LAN and WAN networking environments are commonplace in offices and companies, and facilitate enterprise-wide computer networks, such as intranets, all of which may connect to a global communications network, for example, the Internet.

When used in a LAN networking environment, the computer 802 is connected to the LAN 852 through a wire and/or wireless communication network interface or adaptor 856. The adaptor 856 can facilitate wire and/or wireless communications to the LAN 852, which may also include a wireless access point disposed thereon for communicating with the wireless functionality of the adaptor 856.

When used in a WAN networking environment, the computer 802 can include a modem 1358, or is connected to a communications server on the WAN 1354, or has other means for establishing communications over the WAN 854, such as by way of the Internet. The modem 858, which can be internal or external and a wire and/or wireless device, connects to the system bus 808 via the input device interface 842. In a networked environment, program modules depicted relative to the computer 802, or portions thereof, can be stored in the remote memory/storage device 850. It will be appreciated that the network connections shown are exemplary and other means of establishing a communications link between the computers can be used.

The computer 802 is operable to communicate with wire and wireless devices or entities using the IEEE 802 family of standards, such as wireless devices operatively disposed in wireless communication (e.g., IEEE 802.16 over-the-air modulation techniques) . This includes at least Wi-Fi (or Wireless Fidelity) , WiMax, and Bluetooth^TMwireless technologies, among others. Thus, the communication can be a predefined structure as with a conventional network or simply an ad hoc communication between at least two devices. Wi-Fi networks use radio technologies called IEEE 802.11x (a, b, g, n, etc. ) to provide secure, reliable, fast wireless connectivity. A Wi-Fi network can be used to connect computers to each other, to the Internet, and to wire networks (which use IEEE 802.3-related media and functions) .

FIG. 9 illustrates a block diagram of an exemplary communications architecture 900 suitable for implementing various embodiments as previously described, such as virtual machine migration. The communications architecture 900 includes various common communications elements, such as a transmitter, receiver, transceiver, radio, network interface, baseband processor, antenna, amplifiers, filters, power supplies, and so forth. The embodiments, however, are not limited to implementation by the communications architecture 900.

As shown in FIG. 9, the communications architecture 900 comprises includes one or more clients 902 and servers 904. The clients 902 and the servers 904 are operatively connected to one or more respective client data stores 908 and server data stores 910 that can be employed to store information local to the respective clients 902 and servers 904, such as cookies and/or associated contextual information. In various embodiments, any one of servers 904 may implement one or more of logic flows or operations described herein, and storage medium 700 of FIG. 7 in conjunction with storage of data received from any one of clients 902 on any of server data stores 910.

The clients 902 and the servers 904 may communicate information between each other using a communication framework 906. The communications framework 906 may implement any well-known communications techniques and protocols. The communications framework 906 may be implemented as a packet-switched network (e.g., public networks such as the Internet, private networks such as an enterprise intranet, and so forth) , a circuit-switched network (e.g., the public switched telephone network) , or a combination of a packet-switched network and a circuit-switched network (with suitable gateways and translators) .

The communications framework 906 may implement various network interfaces arranged to accept, communicate, and connect to a communications network. A network interface may be regarded as a specialized form of an input output interface. Network interfaces may employ connection protocols including without limitation direct connect, Ethernet (e.g., thick, thin, twisted pair 10/100/1900 Base T, and the like) , token ring, wireless network interfaces, cellular network interfaces, IEEE 802.11a-x network interfaces, IEEE 802.16 network interfaces, IEEE 802.20 network interfaces, and the like. Further, multiple network interfaces may be used to engage with various communications network types. For example, multiple network interfaces may be employed to allow for the communication over broadcast, multicast, and unicast networks. Should processing requirements dictate a greater amount speed and capacity, distributed network controller architectures may similarly be employed to pool, load balance, and otherwise increase the communicative bandwidth required by clients 902 and the servers 904. A communications network may be any one and the combination of wired and/or wireless networks including without limitation a direct interconnection, a secured custom connection, a private network (e.g., an enterprise intranet) , a public network (e.g., the Internet) , a Personal Area Network (PAN) , a Local Area Network (LAN) , a Metropolitan Area Network (MAN) , an Operating Missions as Nodes on the Internet (OMNI) , a Wide Area Network (WAN) , a wireless network, a cellular network, and other communications networks.

Various embodiments may be implemented using hardware elements, software elements, or a combination of both. Examples of hardware elements may include processors, microprocessors, circuits, circuit elements (e.g., transistors, resistors, capacitors, inductors, and so forth) , integrated circuits, application specific integrated circuits (ASIC) , programmable logic devices (PLD) , digital signal processors (DSP) , field programmable gate array (FPGA) , logic gates, registers, semiconductor device, chips, microchips, chip sets, and so forth. Examples of software may include software components, programs, applications, computer programs, application programs, system programs, machine programs, operating system software, middleware, firmware, software modules, routines, subroutines, functions, methods, procedures, software interfaces, application program interfaces (API) , instruction sets, computing code, computer code, code segments, computer code segments, words, values, symbols, or any combination thereof. Determining whether an embodiment is implemented using hardware elements and/or software elements may vary in accordance with any number of factors, such as desired computational rate, power levels, heat tolerances, processing cycle budget, input data rates, output data rates, memory resources, data bus speeds and other design or performance constraints.

One or more aspects of at least one embodiment may be implemented by representative instructions stored on a machine-readable medium which represents various logic within the processor, which when read by a machine causes the machine to fabricate logic to perform the techniques described herein. Such representations, known as “IP cores” may be stored on a tangible, machine readable medium and supplied to various customers or manufacturing facilities to load into the fabrication machines that actually make the logic or processor. Some embodiments may be implemented, for example, using a machine-readable medium or article which may store an instruction or a set of instructions that, if executed by a machine, may cause the machine to perform a method and/or operations in accordance with the embodiments. Such a machine may include, for example, any suitable processing platform, computing platform, computing device, processing device, computing system, processing system, computer, processor, or the like, and may be implemented using any suitable combination of hardware and/or software. The machine-readable medium or article may include, for example, any suitable type of memory unit, memory device, memory article, memory medium, storage device, storage article, storage medium and/or storage unit, for example, memory, removable or non-removable media, erasable or non-erasable media, writeable or re-writeable media, digital or analog media, hard disk, floppy disk, Compact Disk Read Only Memory (CD-ROM) , Compact Disk Recordable (CD-R) , Compact Disk Rewriteable (CD-RW) , optical disk, magnetic media, magneto-optical media, removable memory cards or disks, various types of Digital Versatile Disk (DVD) , a tape, a cassette, or the like. The instructions may include any suitable type of code, such as source code, compiled code, interpreted code, executable code, static code, dynamic code, encrypted code, and the like, implemented using any suitable high-level, low-level, object-oriented, visual, compiled and/or interpreted programming language.

The following examples pertain to further embodiments, from which numerous permutations and configurations will be apparent.

Example 1 is an apparatus to maintain memory confidentiality through power state changes, the apparatus comprising: a memory； and logic, at least a portion of the logic implemented in circuitry coupled to the memory, the logic to: receive session data as part of an authentication operation in response to a power state change； clear content in a non-volatile memory when the session data is null； determine whether the session data matches data in a session memory when the session data is non-null； clear content of the non-volatile memory when the session data fails to match data in the session memory； and permit access to content in the non-volatile memory when the session data matches data in the session memory.

Example 2 includes the subject matter of Example 1, the authentication operation comprising a handshake procedure.

Example 3 includes the subject matter of Example 2, the session data to match data in the session memory when the session data was generated as part of a previous authentication operation in response to a previous power state change, the previous authentication operation comprising a previous handshake procedure.

Example 4 includes the subject matter of Example 1, the logic to determine new session data when the session data fails to match data in the session memory or the session data is null.

Example 5 includes the subject matter of Example 4, the logic to determine the new session data based on a handshake protocol.

Example 6 includes the subject matter of Example 4, the logic to utilize a hard-fused secret to determine the new session data.

Example 7 includes the subject matter of Example 4, the logic to utilize a private key and a public key to determine the new session data.

Example 8 includes the subject matter of Example 7, the private key and the public key comprised in firmware.

Example 9 includes the subject matter of Example 7, the private key comprising a hard-fused secret.

Example 10 includes the subject matter of Example 1, the logic and the non-volatile memory comprised in a state machine (SM) .

Example 11 includes the subject matter of Example 1, the logic to receive the session data in a handshake initiation message.

Example 12 includes the subject matter of Example 1, the non-volatile memory comprising a non-volatile dual in-line memory module (NVDIMM) .

Example 13 includes the subject matter of Example 1, the session memory comprising a portion of the non-volatile memory.

Example 14 is an apparatus to maintain memory confidentiality through power state changes, the apparatus comprising: a memory； and logic, at least a portion of the logic implemented in circuitry coupled to the memory, the logic to: determine whether session data is stored in a trusted memory within a trusted execution environment (TEE) ； store null session data in a session memory when session data is not stored in the trusted memory； store a copy of the session data in the session memory when session data is stored in the trusted memory； and communicate the session data in the session memory as part of a handshake procedure.

Example 15 includes the subject matter of Example 14, the handshake procedure in response to a power state change.

Example 16 includes the subject matter of Example 15, the logic to: determine whether the power state change was preceded by a valid shutdown or suspend in response to the power state change； store null session data in the session memory when the power state change was preceded by an invalid shutdown or suspend； determine whether the power state change is a resume； store null session data in the session memory when the power state change is a resume； and determine whether session data is store in the trusted memory within the TEE when the power state change is not a resume.

Example 17 includes the subject matter of Example 14, the logic to utilize the copy of the session data in the session memory to access a confidentiality object in a non-volatile memory when session data is stored in the trusted memory

Example 18 includes the subject matter of Example 17, one or more of the trusted memory or the session memory comprising a portion of the non-volatile memory.

Example 19 includes the subject matter of Example 17, the non-volatile memory comprising a non-volatile dual in-line memory module (NVDIMM) .

Example 20 includes the subject matter of Example 14, the handshake procedure to determine new session data when session data is not stored in the trusted memory.

Example 21 includes the subject matter of Example 20, the logic to utilize a hard-fused secret to determine the new session data.

Example 22 includes the subject matter of Example 20, the logic to utilize a private key and a public key to determine the new session data.

Example 23 includes the subject matter of Example 22, the private key and the public key comprised in firmware.

Example 24 includes the subject matter of Example 22, the private key comprising a hard-fused secret.

Example 25 includes the subject matter of Example 14, the logic and the TEE comprised in a system on chip (SOC) .

Example 26 is a system for maintaining confidentiality, the system comprising: an import memory controller comprising first logic and an export memory controller comprising second logic, the import memory controller provisioned with an import public/private key pair and the export memory controller provisioned with an export public/private key pair, the first logic to: receive a session data export request, the session data export request including the import public key； determine whether the import public key is valid； block the session data export request when the public key is invalid； and when the import public key is valid, generate encrypted session data with the import public key and sign the encrypted session data with the export private key to include in an export datablob comprising the export public key.

Example 27 includes the subject matter of Example 26, the first logic to determine whether the import public key is valid based on a public key list.

Example 28 includes the subject matter of Example 26, the first logic to determine whether the import public key is valid based on a signature of the import public key by a key in the public key list

Example 29 includes the subject matter of Example 26, the second logic to: receive the export datablob； determine whether the export public key in the export datablob is valid； stop importation of the export datablob when the export datablob is invalid； generate decrypted session data from the export datablob with the import private key； and store the decrypted session data in a session memory.

Example 30 includes the subject matter of Example 29, the second logic overwrite previous session data when the decrypted session data is stored in the session memory.

Example 31 includes the subject matter of Example 26, the first logic to: determine whether the session data export request would violate an export policy； block the session data export request when the export policy is violated； and determine whether the import public key is valid when the export policy is not violated.

Example 32 includes the subject matter of Example 31, the export policy comprising a software policy based on user presence.

Example 33 includes the subject matter of Example 31, the import memory controller comprised in a first system on chip (SOC) and the export memory controller comprised in a second SOC.

Example 34 is a method to maintain memory confidentiality through power state changes, the method comprising: receiving session data as part of an authentication operation in response to a power state change； clearing content in a non-volatile memory when the session data is null； determining whether the session data matches data in a session memory when the session data is non-null； clearing content of the non-volatile memory when the session data fails to match data in the session memory； and permitting access to content in the non-volatile memory when the session data matches data in the session memory.

Example 35 includes the subject matter of Example 34, the authentication operation comprising a handshake procedure.

Example 36 includes the subject matter of Example 35, the session data to match data in the session memory when the session data was generated as part of a previous authentication operation in response to a previous power state change, the previous authentication operation comprising a previous handshake procedure.

Example 37 includes the subject matter of Example 34, comprising determining new session data when the session data fails to match data in the session memory or the session data is null.

Example 38 includes the subject matter of Example 37, comprising determining the new session data based on a handshake protocol.

Example 39 includes the subject matter of Example 37, comprising utilizing a hard-fused secret to determine the new session data.

Example 40 includes the subject matter of Example 37, comprising utilizing a private key and a public key to determine the new session data.

Example 41 includes the subject matter of Example 40, the private key and the public key comprised in firmware.

Example 42 includes the subject matter of Example 40, the private key comprising a hard-fused secret.

Example 43 includes the subject matter of Example 34, the non-volatile memory comprised in a state machine (SM) .

Example 44 includes the subject matter of Example 34, comprising receiving the session data in a handshake initiation message.

Example 45 includes the subject matter of Example 34, the non-volatile memory comprising a non-volatile dual in-line memory module (NVDIMM) .

Example 46 includes the subject matter of Example 34, the session memory comprising a portion of the non-volatile memory.

Example 47 is a method to maintain memory confidentiality through power state changes, the method comprising: determining whether session data is stored in a trusted memory within a trusted execution environment (TEE) ； storing null session data in a session memory when session data is not stored in the trusted memory； storing a copy of the session data in the session memory when session data is stored in the trusted memory； and communicating the session data in the session memory as part of a handshake procedure.

Example 48 includes the subject matter of Example 47, the handshake procedure in response to a power state change.

Example 49 includes the subject matter of Example 48, comprising: determining whether the power state change was preceded by a valid shutdown or suspend in response to the power state change； storing null session data in the session memory when the power state change was preceded by an invalid shutdown or suspend； determining whether the power state change is a resume； storing null session data in the session memory when the power state change is a resume； and determining whether session data is stored in the trusted memory within the TEE when the power state change is not a resume.

Example 50 includes the subject matter of Example 47, comprising utilizing the copy of the session data in the session memory to access a confidentiality object in a non-volatile memory when session data is stored in the trusted memory.

Example 51 includes the subject matter of Example 50, one or more of the trusted memory or the session memory comprising a portion of the non-volatile memory.

Example 52 includes the subject matter of Example 50, the non-volatile memory comprising a non-volatile dual in-line memory module (NVDIMM) .

Example 53 includes the subject matter of Example 47, the handshake procedure to determine new session data when session data is not stored in the trusted memory.

Example 54 includes the subject matter of Example 53, comprising utilizing a hard-fused secret to determine the new session data.

Example 55 includes the subject matter of Example 53, comprising utilizing a private key and a public key to determine the new session data.

Example 56 includes the subject matter of Example 55, the private key and the public key comprised in firmware.

Example 57 includes the subject matter of Example 55, the private key comprising a hard-fused secret.

Example 58 includes the subject matter of Example 47, the TEE comprised in a system on chip (SOC) .

Example 59 is a method for maintaining memory confidentiality, the method comprising: receiving a session data export request, the session data export request including an import public key； determining whether the import public key is valid； blocking the session data export request when the import public key is invalid； and when the import public key is valid, generating encrypted session data with the import public key and signing the encrypted session data with an export private key to include in an export datablob comprising an export public key.

Example 60 includes the subject matter of Example 59, comprising determining whether the import public key is valid based on a public key list.

Example 61 includes the subject matter of Example 59, comprising determining whether the import public key is valid based on a signature of the import public key by a key in the public key list.

Example 62 includes the subject matter of Example 59, comprising: receiving the export datablob； determining whether the export public key in the export datablob is valid； stopping importation of the export datablob when the export datablob is invalid； generating decrypted session data from the export datablob with the import private key； and storing the decrypted session data in a session memory.

Example 63 includes the subject matter of Example 62, comprising overwriting previous session data when the decrypted session data is stored in the session memory.

Example 64 includes the subject matter of Example 59, comprising: determining whether the session data export request violates an export policy； blocking the session data export request when the export policy is violated； and determining whether the import public key is valid when the export policy is not violated.

Example 65 includes the subject matter of Example 64, the export policy comprising a software policy based on user presence.

Example 66 includes the subject matter of Example 64, the import memory controller comprised in a first system on chip (SOC) and the export memory controller comprised in a second SOC.

Example 67 is at least one non-transitory computer-readable medium comprising a set of instructions that, in response to being executed by a processor circuit, cause the processor circuit to: receive session data as part of an authentication operation in response to a power state change； clear content in a non-volatile memory when the session data is null； determine whether the session data matches data in a session memory when the session data is non-null； clear content of the non-volatile memory when the session data fails to match data in the session memory； and permit access to content in the non-volatile memory when the session data matches data in the session memory.

Example 68 includes the subject matter of Example 67, the authentication operation comprising a handshake procedure.

Example 69 includes the subject matter of Example 68, the session data to match data in the session memory when the session data was generated as part of a previous authentication operation in response to a previous power state change, the previous authentication operation comprising a previous handshake procedure.

Example 70 includes the subject matter of Example 67, comprising instructions that, in response to being executed by the processor circuit, cause the processor circuit to determine new session data when the session data fails to match data in the session memory or the session data is null.

Example 71 includes the subject matter of Example 70, comprising instructions that, in response to being executed by the processor circuit, cause the processor circuit to determine the new session data based on a handshake protocol.

Example 72 includes the subject matter of Example 70, comprising instructions that, in response to being executed by the processor circuit, cause the processor circuit to utilize a hard-fused secret to determine the new session data.

Example 73 includes the subject matter of Example 70, comprising instructions that, in response to being executed by the processor circuit, cause the processor circuit to utilize a private key and a public key to determine the new session data.

Example 74 includes the subject matter of Example 73, the private key and the public key comprised in firmware.

Example 75 includes the subject matter of Example 73, the private key comprising a hard-fused secret.

Example 76 includes the subject matter of Example 67, the at least one non-transitory computer-readable medium and the non-volatile memory comprised in a state machine (SM) .

Example 77 includes the subject matter of Example 67, comprising instructions that, in response to being executed by the processor circuit, cause the processor circuit receive the session data in a handshake initiation message.

Example 78 includes the subject matter of Example 67, the non-volatile memory comprising a non-volatile dual in-line memory module (NVDIMM) .

Example 79 includes the subject matter of Example 67, the session memory comprising a portion of the non-volatile memory.

Example 80 is at least one non-transitory computer-readable medium comprising a set of instructions that, in response to being executed by a processor circuit, cause the processor circuit to: determine whether session data is stored in a trusted memory within a trusted execution environment (TEE) ； store null session data in a session memory when session data is not stored in the trusted memory； store a copy of the session data in the session memory when session data is stored in the trusted memory； and communicate the session data in the session memory as part of a handshake procedure.

Example 81 includes the subject matter of Example 80, the handshake procedure in response to a power state change.

Example 82 includes the subject matter of Example 81, comprising instructions that, in response to being executed by the processor circuit, cause the processor circuit to: determine whether the power state change was preceded by a valid shutdown or suspend in response to the power state change； store null session data in the session memory when the power state change was preceded by an invalid shutdown or suspend； determine whether the power state change is a resume； store null session data in the session memory when the power state change is a resume； and determine whether session data is stored in the trusted memory within the TEE when the power state change is not a resume.

Example 83 includes the subject matter of Example 80, comprising instructions that, in response to being executed by the processor circuit, cause the processor circuit to utilize the copy of the session data in the session memory to access a confidentiality object in a non-volatile memory when session data is stored in the trusted memory.

Example 84 includes the subject matter of Example 83, one or more of the trusted memory or the session memory comprising a portion of the non-volatile memory.

Example 85 includes the subject matter of Example 83, the non-volatile memory comprising a non-volatile dual in-line memory module (NVDIMM) .

Example 86 includes the subject matter of Example 80, the handshake procedure to determine new session data when session data is not stored in the trusted memory.

Example 87 includes the subject matter of Example 86, comprising instructions that, in response to being executed by the processor circuit, cause the processor circuit to utilize a hard-fused secret to determine the new session data.

Example 88 includes the subject matter of Example 86, comprising instructions that, in response to being executed by the processor circuit, cause the processor circuit to utilize a private key and a public key to determine the new session data.

Example 89 includes the subject matter of Example 88, the private key and the public key comprised in firmware.

Example 90 includes the subject matter of Example 88, the private key comprising a hard-fused secret

Example 91 includes the subject matter of Example 80, the at least one non-transitory computer-readable medium and the TEE comprised in a system on chip (SOC) .

Example 92 is an apparatus to maintain memory confidentiality through power state changes, the apparatus comprising: means for receiving session data as part of an authentication operation in response to a power state change； means for clearing content in a non-volatile memory when the session data is null； means for determining whether the session data matches data in a session memory when the session data is non-null； means for means for clearing content of the non-volatile memory when the session data fails to match data in the session memory； and means for permitting access to content in the non-volatile memory when the session data matches data in the session memory.

Example 93 includes the subject matter of Example 92, the authentication operation comprising a handshake procedure.

Example 94 includes the subject matter of Example 93, the session data to match data in the session memory when the session data was generated as part of a previous authentication operation in response to a previous power state change, the previous authentication operation comprising a previous handshake procedure.

Example 95 includes the subject matter of Example 92, comprising means for determining new session data when the session data fails to match data in the session memory or the session data is null.

Example 96 includes the subject matter of Example 95, comprising means for determining the new session data based on a handshake protocol.

Example 97 includes the subject matter of Example 95, comprising means for utilizing a hard-fused secret to determine the new session data.

Example 98 includes the subject matter of Example 95, comprising means for utilizing a private key and a public key to determine the new session data.

Example 99 includes the subject matter of Example 98, the private key and the public key comprised in firmware.

Example 100 includes the subject matter of Example 98, the private key comprising a hard-fused secret.

Example 101 includes the subject matter of Example 92, the non-volatile memory comprised in a state machine (SM) .

Example 102 includes the subject matter of Example 92, comprising means for receiving the session data in a handshake initiation message.

Example 103 includes the subject matter of Example 92, the non-volatile memory comprising a non-volatile dual in-line memory module (NVDIMM) .

Example 104 includes the subject matter of Example 92, the session memory comprising a portion of the non-volatile memory.

Example 105 is an apparatus to maintain memory confidentiality through power state changes, the apparatus comprising: means for determining whether session data is stored in a trusted memory within a trusted execution environment (TEE) ； means for storing null session data in a session memory when session data is not stored in the trusted memory； means for storing a copy of the session data in the session memory when session data is stored in the trusted memory； and means for communicating the session data in the session memory as part of a handshake procedure.

Example 106 includes the subject matter of Example 105, the handshake procedure in response to a power state change.

Example 107 includes the subject matter of Example 106, comprising: means for determining whether the power state change was preceded by a valid shutdown or suspend in response to the power state change； means for storing null session data in the session memory when the power state change was preceded by an invalid shutdown or suspend； means for determining whether the power state change is a resume； means for storing null session data in the session memory when the power state change is a resume； and means for determining whether session data is stored in the trusted memory within the TEE when the power state change is not a resume.

Example 108 includes the subject matter of Example 105, comprising means for utilizing the copy of the session data in the session memory to access a confidentiality object in a non-volatile memory when session data is stored in the trusted memory.

Example 109 includes the subject matter of Example 108, one or more of the trusted memory or the session memory comprising a portion of the non-volatile memory.

Example 110 includes the subject matter of Example 108, the non-volatile memory comprising a non-volatile dual in-line memory module (NVDIMM) .

Example 111 includes the subject matter of Example 105, the handshake procedure to determine new session data when session data is not stored in the trusted memory.

Example 112 includes the subject matter of Example 111, comprising means for utilizing a hard-fused secret to determine the new session data.

Example 113 includes the subject matter of Example 111, comprising means for utilizing a private key and a public key to determine the new session data.

Example 114 includes the subject matter of Example 113, the private key and the public key comprised in firmware.

Example 115 includes the subject matter of Example 113, the private key comprising a hard-fused secret.

Example 116 includes the subject matter of Example 105, the TEE comprised in a system on chip (SOC) .

Example 117 is an apparatus for maintaining memory confidentiality, the apparatus comprising: means for receiving a session data export request, the session data export request including an import public key； means for determining whether the import public key is valid； means for blocking the session data export request when the import public key is invalid； and means for, when the import public key is valid, generating encrypted session data with the import public key and signing the encrypted session data with an export private key to include in an export datablob comprising an export public key.

Example 118 includes the subject matter of Example 117, comprising means for determining whether the import public key is valid based on a public key list.

Example 119 includes the subject matter of Example 118, comprising means for determining whether the import public key is valid based on a signature of the import public key by a key in the public key list.

Example 120 includes the subject matter of Example 117, comprising: means for receiving the export datablob； means for determining whether the export public key in the export datablob is valid； means for stopping importation of the export datablob when the export datablob is invalid； means for generating decrypted session data from the export datablob with the import private key； and means for storing the decrypted session data in a session memory.

Example 121 includes the subject matter of Example 120, comprising means for overwriting previous session data when the decrypted session data is stored in the session memory.

Example 122 includes the subject matter of Example 17, comprising: means for determining whether the session data export request violates an export policy； means for blocking the session data export request when the export policy is violated； and means for determining whether the import public key is valid when the export policy is not violated.

Example 123 includes the subject matter of Example 122, the export policy comprising a software policy based on user presence.

Example 124 includes the subject matter of Example 122, the import memory controller comprised in a first system on chip (SOC) and the export memory controller comprised in a second SOC.

The foregoing description of example embodiments has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the present disclosure to the precise forms disclosed. Many modifications and variations are possible in light of this disclosure. It is intended that the scope of the present disclosure be limited not by this detailed description, but rather by the claims appended hereto. Future filed applications claiming priority to this application may claim the disclosed subject matter in a different manner, and may generally include any set of one or more limitations as variously disclosed or otherwise demonstrated herein.

Claims

An apparatus, comprising:

a memory； and

logic, at least a portion of the logic implemented in circuitry coupled to the memory, the logic to:

receive session data as part of an authentication operation in response to a power state change；

clear content in a non-volatile memory when the session data is null；

determine whether the session data matches data in a session memory when the session data is non-null；

clear content of the non-volatile memory when the session data fails to match data in the session memory； and

permit access to content in the non-volatile memory when the session data matches data in the session memory.
The apparatus of claim 1, the authentication operation comprising a handshake procedure.
The apparatus of claim 2, the session data to match data in the session memory when the session data was generated as part of a previous authentication operation in response to a previous power state change, the previous authentication operation comprising a previous handshake procedure.
The apparatus of claim 1, the logic to determine new session data when the session data fails to match data in the session memory or the session data is null.
The apparatus of claim 4, the logic to determine the new session data based on a handshake protocol.
The apparatus of claim 4, the logic to utilize a hard-fused secret to determine the new session data.
The apparatus of claim 4, the logic to utilize a private key and a public key to determine the new session data.
The apparatus of claim 7, the private key and the public key comprised in firmware.
The apparatus of claim 7, the private key comprising a hard-fused secret.
A method, comprising:

determining whether session data is stored in a trusted memory within a trusted execution environment (TEE) ；

storing null session data in a session memory when session data is not stored in the trusted memory；

storing a copy of the session data in the session memory when session data is stored in the trusted memory； and

communicating the session data in the session memory as part of a handshake procedure.
The method of claim 10, the handshake procedure in response to a power state change.
The method of claim 11, comprising:

determining whether the power state change was preceded by a valid shutdown or suspend in response to the power state change；

storing null session data in the session memory when the power state change was preceded by an invalid shutdown or suspend；

determining whether the power state change is a resume；

storing null session data in the session memory when the power state change is a resume； and

determining whether session data is store in the trusted memory within the TEE when the power state change is not a resume.
The method of claim 10, comprising utilizing the copy of the session data in the session memory to access a confidentiality object in a non-volatile memory when session data is stored in the trusted memory.
The method of claim 13, one or more of the trusted memory or the session memory comprising a portion of the non-volatile memory.
The method of claim 13, the non-volatile memory comprising a non-volatile dual in-line memory module (NVDIMM) .
The method of claim 10, the handshake procedure to determine new session data when session data is not stored in the trusted memory.
The method of claim 16, comprising utilizing a hard-fused secret to determine the new session data.
The method of claim 20, comprising utilizing a private key and a public key to determine the new session data.
The method of claim 18, the private key and the public key comprised in firmware.
The method of claim 18, the private key comprising a hard-fused secret.
An apparatus to maintain memory confidentiality through power state changes, the apparatus comprising:

means for receiving session data as part of an authentication operation in response to a power state change；

means for clearing content in a non-volatile memory when the session data is null；

means for determining whether the session data matches data in a session memory when the session data is non-null；

means for means for clearing content of the non-volatile memory when the session data fails to match data in the session memory； and

means for permitting access to content in the non-volatile memory when the session data matches data in the session memory.
The apparatus of claim 21, comprising means for determining new session data when the session data fails to match data in the session memory or the session data is null.
The apparatus of claim 22, comprising means for determining the new session data based on a handshake protocol.
An apparatus to maintain memory confidentiality through power state changes, the apparatus comprising:

means for determining whether session data is stored in a trusted memory within a trusted execution environment (TEE) ；

means for storing null session data in a session memory when session data is not stored in the trusted memory；

means for storing a copy of the session data in the session memory when session data is stored in the trusted memory； and

means for communicating the session data in the session memory as part of a handshake procedure.
The apparatus of claim 24, comprising:

means for determining whether the power state change was preceded by a valid shutdown or suspend in response to the power state change；

means for storing null session data in the session memory when the power state change was preceded by an invalid shutdown or suspend；

means for determining whether the power state change is a resume；

means for storing null session data in the session memory when the power state change is a resume； and

means for determining whether session data is stored in the trusted memory within the TEE when the power state change is not a resume.