WO2018080730A1

WO2018080730A1 - Cyclic shift diversity for range estimation in wireless networks

Info

Publication number: WO2018080730A1
Application number: PCT/US2017/054479
Authority: WO
Inventors: Qinghua Li; Feng Jiang; Yuval AMIZUR; Nir DVORECKI; Chen Kojokaro; Robert Stacey; Jonathan Segev
Original assignee: Intel IP Corporation
Priority date: 2016-10-24
Filing date: 2017-09-29
Publication date: 2018-05-03
Also published as: DE112017005362T5

Abstract

A wireless communication device, system, and method. The device includes a memory, and processing circuitry coupled to the memory, the memory including logic. The processing circuitry is to implement the logic to: process a first packet from another device; encode a second packet to the other device by applying cyclic shift delay (CSD) to symbols of the second packet, the CSD being based on a time of arrival (ToA) of the first packet at the device; cause transmission of the second packet such that a time interval between a Fast Fourier Transform (FFT) clock boundary of the first packet and a FFT clock boundary of the second packet at the device is a predetermined integer number of clock cycles of a sampling clock of the device.

Description

CYCLIC SHIFT DIVERSITY FOR RANGE ESTIMATION IN WIRELESS

NETWORKS

CROSS-REFERENCE TO RELATED APPLICATION

[0001] This application is derived from U.S. provisional application serial number 62/412,076, filed October 24, 2016, and claims priority to that date for all applicable subject matter.

TECHNICAL FIELD

[0002] Embodiments pertain to wireless networks and wireless communications. Some embodiments relate to wireless local area networks (WLANs) and Wi-Fi networks including networks operating in accordance with the Institute of Electrical and Electronics Engineers (IEEE) 802.11 family of standards. Some embodiments relate to IEEE 802.1 lax and/or IEEE 802.1 laz. Some embodiments relate to using fine timing measurement (FTM) and round-trip time (RTT) determination to effect ranging and location determination using Wi-Fi.

BACKGROUND

[0003] Efficient use of the resources of a wireless local-area network (WLAN) is important to provide bandwidth and acceptable response times to the users of the WLAN. Current measures proposed with respect to calculating Round-Trip Time (RTT) for ranging and positioning in IEEE 802.1 lax and/or 802.1 laz could use improvement in terms of resource efficiency.

BRIEF DESCRIPTION OF THE DRAWINGS

[0004] The present disclosure is illustrated by way of example and not limitation in the figures of the accompanying drawings, in which like references indicate similar elements and in which:

[0005] Fig. 1 illustrates a Wireless Local Area Network (WLAN) in accordance with some embodiments;

[0006] Fig. 2 illustrates an embodiment of a radio architecture for an access point (AP) or station (STA) as shown in the WLAN of Fig. 1;

[0007] Fig. 3 illustrates a possible packet exchange sequence which uses at least 6-packets to finish a location measurement using RTT;

[0008] Fig. 4 illustrates a packet exchange sequence in accordance with some embodiments; [0009] Fig. 5 illustrates an example plot for aligning the Fast Fourier Transform (FFT) boundary of the DL NDP and an UL DP in the packet exchange of Fig. 3, in accordance with some embodiments;

[0010] Fig. 6 illustrates an example plot to allow an estimation of a linear phase shift across frequency to be applied to uplink (UL) null data packets ( DPs), in accordance with some embodiments;

[0011] Fig. 7 illustrates an example method according to some embodiments; and

[0012] Fig. 8 illustrates a block diagram of an example machine upon which any one or more of the techniques discussed herein may perform.

DETAILED DESCRIPTION

[0013] The following description and the drawings sufficiently illustrate specific embodiments to enable those skilled in the art to practice them. Other embodiments may incorporate structural, logical, electrical, process, and other changes. Portions and features of some embodiments may be included in, or substituted for, those of other embodiments. Embodiments set forth in the claims encompass all available equivalents of those claims.

[0014] Fig. 1 illustrates a WLAN in accordance with some embodiments. The WLAN may comprise a basis service set (BSS) 100 that may include an access point (AP) 102, a plurality of high-efficiency (HE) (e.g., IEEE 802.1 lax) stations (STAs) 104, and a plurality of legacy (e.g., IEEE 802.11n/ac) STAs 106.

[0015] The AP 102 may be an AP using one of the IEEE 802.11 protocols to transmit and receive. The AP 102 may be a base station. The AP 102 may use other communications protocols as well as the IEEE 802.11 protocol. The IEEE 802.11 protocol may be IEEE 802.1 lax. The IEEE 802.11 protocol may include using orthogonal frequency division multiple- access (OFDMA), time division multiple access (TDMA), and/or code division multiple access (CDMA). The IEEE 802.11 protocol may include a multiple access technique. For example, the IEEE 802.11 protocol may include space-division multiple access (SDMA) and/or multi-user multiple-input multiple-output (MU-MFMO). The AP 102 and/or HE STAs 104 may use one or both of MU-MTMO and OFDMA for any of the packets described herein. There may be more than one AP 102 that is part of an extended service set (ESS). A controller (not illustrated) may store information that is common to the more than one AP 102. The controller may have access to an external network such as the Internet. [0016] The legacy STAs 106 and the HE STAs 104 may operate in accordance with one or more of IEEE 802.11 a/b/g/n/ac/ad/af/ah/aj, or another legacy wireless communication standard. The legacy STAs and HE STAs may be 802.11 STAs, and may be wireless transmit and receive devices such as a cellular telephone, a smart telephone, a handheld wireless device, wireless glasses, a wireless watch, a wireless personal device, a tablet, or another device that may be transmitting and receiving using the IEEE 802.11 protocol. In some embodiments, the HE STAs 104 may comply with 802.1 lax and 802.1 lax, and may be a "group owner" (GO) for peer-to- peer modes of operation where the HE STAs 104 may perform some operations of an AP 102.

[0017] The AP 102 may communicate with legacy STAs 106 in accordance with legacy IEEE 802.11 communication techniques. In example embodiments, the AP 102 may also be configured to communicate with HE STAs 104 in accordance with legacy 802.11 or 802.1 lax communication techniques.

[0018] In some embodiments, a HE wireless packet may be configurable to have the same bandwidth as a channel. The bandwidth of a channel may be a 20MHz, 40MHz, or 80MHz, 160MHz, 320MHz contiguous bandwidth or an 80+80MHz (160MHz) non-contiguous bandwidth. In some embodiments, the bandwidth of a channel may be 1 MHz, 1.25MHz, 2.03MHz, 2.5MHz, 5MHz and 10MHz, or a combination thereof, or another bandwidth that is less or equal to the available bandwidth may also be used. In some embodiments, the bandwidth of the channels may be based on a number of active subcarriers. In some embodiments, the bandwidths of the channels may include multiples of 26 (e.g., 26, 52, 104, etc.) active subcarriers or tones that are spaced by 20 MHz. In some embodiments, the bandwidth of the channels may be 256 tones spaced by 20 MHz. In some embodiments, a 20 MHz channel may comprise 256 tones for a 256-point Fast Fourier Transform (FFT). In some embodiments, a different number of tones may be used. In some embodiments, the OFDMA structure may consist of a 26-subcarrier resource unit (RU), 52-subcarrier RU, 106-subcarrier RU, 242- subcarrier RU, 484-subcarrier RU and 996-subcarrier RU. Resource allocations for a single user (SU) may consist of a 242 subcarrier RU, 484-subcarrier RU, 996-subcarrier RU and/or a 2x996-subcarrier RU.

[0019] A HE packet may be configured to be transmitted over a number of spatial streams, which may be in accordance with MU-MFMO. In some embodiments, a HE packet may be configured to be transmitted in accordance with one or both of OFDMA and MU-MFMO. In other embodiments, the AP 102, HE STAs 104, and/or legacy STA 106 may also implement different technologies such as code division multiple access (CDMA) 2000, CDMA 2000 IX, CDMA 2000 Evolution-Data Optimized (EV-DO), Interim Standard 2000 (IS-2000), Interim Standard 95 (IS-95), Interim Standard 856 (IS-856), Long Term Evolution (LTE), Global System for Mobile communications (GSM), Enhanced Data rates for GSM Evolution (EDGE), GSM EDGE (GERAN), IEEE 802.16 (i.e., Worldwide Interoperability for Microwave Access (WiMAX)), BlueTooth®, WiMAX, WiGig, or other technologies.

[0020] Some embodiments relate to HE communications in accordance with 802.1 lax. In accordance with some IEEE 802.1 lax embodiments, an AP 102 may operate as an AP to content for a wireless medium (e.g., during a contention period) to receive exclusive control of the medium for an HE control period. In some embodiments, the HE control period may be termed a transmission opportunity (TXOP). The AP 102 may transmit a HE master-sync transmission, which may be a trigger frame (TF) or HE control and schedule transmission, at the beginning of the HE control period. The AP 102 may transmit a time duration of the TXOP and channel information. During the HE control period, HE STAs 104 may communicate with the AP 102 in accordance with a non-contention based multiple access technique such as OFDMA and/or MU- MFMO. This is unlike conventional WLAN communications in which devices communicate in accordance with a contention-based communication technique, rather than a multiple access technique. During the HE control period, the AP 102 may communicate with HE STAs 104 using one or more HE packets. During the HE control period, the HE STAs 104 may operate on a channel smaller than the operating range of the AP 102. During the HE control period, legacy stations refrain from communicating.

[0021] In accordance with some embodiments, during the master-sync transmission, the HE STAs 104 may contend for the wireless medium with the legacy STAs 106 being excluded from contending for the wireless medium during the master-sync transmission or TXOP. In some embodiments, the trigger frame may indicate an uplink (UL) UL-MU-MIMO and/or UL OFDMA control period. In some embodiments, the trigger frame may indicate portions of the TXOP that are contention based for some HE STAs 104 and portions that are not contention based.

[0022] In some embodiments, the multiple-access technique used during the HE control period may be a scheduled OFDMA technique, although this is not a requirement. In some embodiments, the multiple access technique may be a time-division multiple access (TDMA) technique or a frequency division multiple access (FDMA) technique. In some embodiments, the multiple access technique may be a space-division multiple access (SDMA) technique.

[0023] In example embodiments, the HE STA 104 and/or the AP 102 are configured to perform the methods and operations herein described in conjunction with FIGS. 1, 2 and 4-8.

[0024] Referring next to Fig. 2, a block diagram is shown of a wireless communication system such as STA 200 or AP 200 (hereinafter STA/AP 200) such as any of HE STAs 104, or the AP or AP 102 of Fig. 1, according to some demonstrative embodiments. A wireless communication system may include a wireless communication radio architecture in accordance with some demonstrative embodiments. The shown radio architecture may include radio front-end module (FEM) circuitry 210, radio IC circuitry 202 and baseband processing circuitry 209. In Fig. 2, it is to be noted that the representation of a single antenna may be interpreted to mean one or more antennas. Although Fig. 2 shows a single radio IC circuitry block 202, a single FEM circuitry block 210 and a single baseband circuitry block 209, these blocks are to be viewed as representing the possibility of one or more circuitry blocks, where potentially one set of distinct circuitry blocks, for example, a distinct FEM circuitry, and/or a distinct radio IC circuitry, would work to provide the relevant functionalities noted herein. As used herein, "processing circuitry" or "processor" may be used interchangeably include one or more distinctly identifiable processor blocks. As used herein, "processing" may entail processing fully or processing partially.

[0025] FEM circuitry 210 may include a receive signal path comprising circuitry configured to operate on Wi-Fi signals received from one or more antennas 201, to amplify the received signals and to provide the amplified versions of the received signals to the radio IC circuitry 202 for further processing. FEM circuitry 210 may also include a transmit signal path which may include circuitry configured to amplify signals provided by the radio IC circuitry 202 for wireless transmission by one or more of the antennas 201. The antennas may include directional or omnidirectional antennas, including, for example, dipole antennas, monopole antennas, patch antennas, loop antennas, microstrip antennas or other types of antennas suitable for transmission of RF signals. In some multiple-input multiple-output (MFMO) embodiments, the antennas may be effectively separated to take advantage of spatial diversity and the different channel characteristics that may result.

[0026] Radio IC circuitry 202 as shown may include a receive signal path which may include circuitry to down-convert signals received from the FEM circuitry 210 and provide baseband signals to baseband processor 209. The radio IC circuitry 202 may also include a transmit signal path which may include circuitry to up-convert baseband signals provided by the baseband processor 209 and provide RF output signals to the FEM circuitry 210 for subsequent wireless transmission by the one or more antennas 201. In addition, embodiments include within their scope the provision of a radio IC circuitry that allows transmission of LP-WU signals.

[0027] Baseband processing circuity 209 may include processing circuitry that provides Wi-Fi functionality. In the instant description, the baseband processor 209 may include a memory 212, such as, for example, a set of RAM arrays in a Fast Fourier Transform or Inverse Fast Fourier Transform block (not shown) of the baseband processor 209. Memory 212 may further store control logic. Radio front-end module (FEM) processing circuitry 210 may implement control logic within the memory to process the signals received from the receive signal path of the radio IC circuitry 202. Baseband processor 209 is also configured to also generate corresponding baseband signals for the transmit signal path of the radio IC circuitry 202, and may further include physical layer (PHY) and medium access control layer (MAC) circuitry, and may further interface with application processor 206 for generation and processing of the baseband signals and for controlling operations of the radio IC circuitry 202.

[0028] In some demonstrative embodiments, the front-end module circuitry 210, the radio IC circuitry 202, and baseband processor 209 may be provided on a single radio card. In some other embodiments, the one or more antennas 201, the FEM circuitry 210 and the radio IC circuitry 202 may be provided on a single radio card. In some other embodiments, the radio IC circuitry 202 and the baseband processor 209 may be provided on a single chip or integrated circuit (IC).

[0029] In some demonstrative embodiments, a wireless radio card may include a Wi-Fi radio card and may be configured for Wi-Fi communications, although the scope of the embodiments is not limited in this respect. In some of these embodiments, the radio architecture of STA/AP 200 may be configured to receive and transmit OFDM or OFDMA communication signals over a multi carrier communication channel.

[0030] In some other embodiments, the radio architecture of AP/STA 200 may be configured to transmit and receive signals transmitted using one or more modulation techniques other than OFDM or OFDMA, such as spread spectrum modulation (e.g., direct sequence code division multiple access (DS-CDMA) and/or frequency hopping code division multiple access (FH- CDMA)), time-division multiplexing (TDM) modulation, and/or frequency-division multiplexing (FDM) modulation, and On-Off Keying (OOK), although the scope of the embodiments is not limited in this respect.

[0031] In some demonstrative embodiments, the radio-architecture of AP/STA 200 may include other radio cards, such as a WiGig radio card, or a cellular radio card configured for cellular (e.g., 3GPP such as LTE, LTE-Advanced or 5G communications).

[0032] In some IEEE 802.11 embodiments, the radio architecture of AP/STA 200 may be configured for communication over various channel bandwidths including bandwidths having center frequencies of 900 MHz, 2.4 GHz, 5 GHz, and bandwidths of less than 5 MHz, or of about 1 MHz, 2 MHz, 2.5 MHz, 4 MHz, 5MHz, 8 MHz, 10 MHz, 16 MHz, 20 MHz, 40MHz, 80MHz (with contiguous bandwidths) or 80+80MHz (160MHz) (with non-contiguous bandwidths), or any combination of the above frequencies or bandwidths, or any frequencies or bandwidths between the ones expressly noted above. In some demonstrative embodiments, a 320 MHz channel bandwidth may be used. In a further embodiment, the radio architecture of AP/STA 200 may be configured to operate on center frequencies above 45 GHz. The scope of the embodiments is not limited with respect to the above frequencies however.

[0033] Referring still to Fig. 2, in some demonstrative embodiments, STA/AP 200 may further include an input unit 218, an output unit 219, a memory unit 208. STA/AP 200 may optionally include other suitable hardware components and/or software components. In some demonstrative embodiments, some or all of the components of STA/AP 200 may be enclosed in a common housing or packaging, and may be interconnected or operably associated using one or more wired or wireless links. In other embodiments, components of STA/AP 200 may be distributed among multiple or separate devices.

[0034] In some demonstrative embodiments, application processor 206 may include, for example, a Central Processing Unit (CPU), a Digital Signal Processor (DSP), one or more processor cores, a single-core processor, a dual-core processor, a multiple-core processor, a microprocessor, a host processor, a controller, a plurality of processors or controllers, a chip, a microchip, one or more circuits, circuitry, a logic unit, an Integrated Circuit (IC), an Application-Specific IC (ASIC), or any other suitable multi-purpose or specific processor or controller. Application processor 206 may execute instructions, for example, of an Operating System (OS) of STA/AP 200 and/or of one or more suitable applications.

[0035] In some demonstrative embodiments, input unit 218 may include, for example, one or more input pins on a circuit board, a keyboard, a keypad, a mouse, a touch-screen, a touch-pad, a track-ball, a stylus, a microphone, or other suitable pointing device or input device. Output unit 219 may include, for example, one or more output pins on a circuit board, a monitor, a screen, a touch-screen, a flat panel display, a Light Emitting Diode (LED) display unit, a Liquid Crystal Display (LCD) display unit, a plasma display unit, one or more audio speakers or earphones, or other suitable output devices.

[0036] In some demonstrative embodiments, memory 208 may include, for example, a Random-Access Memory (RAM), a Read-Only Memory (ROM), a Dynamic RAM (DRAM), a Synchronous DRAM (SD-RAM), a flash memory, a volatile memory, a non-volatile memory, a cache memory, a buffer, a short-term memory unit, a long-term memory unit, or other suitable memory units. Memory 208 may include, for example, a hard disk drive, a floppy disk drive, a Compact Disk (CD) drive, a CD-ROM drive, a DVD drive, or other suitable removable or nonremovable storage units. Memory unit 208, for example, may store data processed by STA/AP 200.

[0037] In some embodiments, systems/devices/methods disclosed herein, such as, for example, the AP/STA 200 (STA/AP 200) of Fig. 2, can simplify the measurement protocol for estimating distance in a WLAN. In some embodiments, in a fine timing measurement protocol in an IEEE 802.11 specification, the distance between STA and AP may be estimated using the RTT of the measurement packet exchanged between the AP and STA. To derive the RTT, the time of arrival (ToA) of each sounding/measurement packet needs to be estimated, known and/or shared between the sender and the receiver of the measurement packet. In some embodiments that support the distance estimation of multiple STAs simultaneously, the AP (or STA) may first estimate the ToA of the sounding packet and then the ToA may be fed back to STA (or AP) using a separate location measurement report (LMR) packet as will be explained in further detail below with respect to Fig. 3.

[0038] According to some embodiments, for systems/devices/methods disclosed herein, the number of packets exchanged between the AP and STA to allow ranging and location measurement may be reduced as compared with existing proposals by embedding ToA information of a DL NDP at a wireless communication device, such as STA 200 of Fig. 2, into the UL NDP transmitted by the device, embedding being effected using cyclic shift diversity (CSD), also known as circular shift diversity or cyclic delay diversity (CDD), onto symbols of the UL NDP in order to simulate a time delay in the same, the time delay being based on the DL NDP's ToA at the STA. In some embodiments, a new measurement protocol design contemplates adding the ToA information via CSD to the HE-LTF of the UL NDP, and for STAs to transmit the UL NDPs with CSD's applied thereto as noted above to the AP simultaneously. Different STAs' HE-LTFs may, according to an embodiment, be multiplexed using the P-matrix or TDMA, which would allow the AP to subtract each STA's CSD from its corresponding HE-LTF portion without inter-STA interference. Introducing CSD into each UL NDP based on the ToA of the DL NDP at the same STA advantageously allows the AP and STA to assume a predetermined time interval between the ToA of the DL NDP and the ToD of the UL NDP, in this way doing away with the need for the STA to transmit its ToA and ToD information to the AP, as will be explained in further detail below, in particular with respect to Figs. 4-9. Based on the known predetermined time interval of the STA, and on the AP's own ToA and time of departure (ToD) information, the AP may calculate the RTT for each STA. Details regarding embodiments are provided by way of example with respect to Figs. 4-9 below.

[0039] Referring next to Fig. 3, a possible proposal for a packet exchange sequence 300 for ranging using 802.1 lax is shown. The packet exchange sequence of Fig. 3 disadvantageously requires at least 6-packets to finish a single ranging measurement as will be explained herein. In particular, packet exchange sequence 300 includes a location measurement exchange 302 that has at least four main parts: a UL sounding part 304, a DL sounding part 306, an AP to STA (AP2STA) Location Measurement Report (LMR) part 308 and a STA to AP (STA2AP) LMR part 310. In Fig. 3, the various packets are shown as being separated by a time interval equal to a Short Interframe Space (SIFS) time interval, although this time interval could vary. In addition, in Fig. 3, the DL sounding part 306 could also include a NDP Announcement frame preceding the NDP DL transmission, as would be recognized by one skilled in the art.

[0040] The UL sounding part 304 includes a trigger frame TF 312 sent from the AP to the STAs 1-n to solicit respective UL MU-MFMO Null Data Packets (NDPs) 314 from respective STAs, such as FIE STAs 104 of Fig. 1, securing a TXOP as explained above in relation to Fig. 1. In the shown figure, there are "n" STAs, and therefore "n" NDPs ranging from NDPI to NDPn sent to the AP in an UL MU-MFMO transmission 314. TF 312 is sent to determine which STAs are to conduct the UL MU-MTMO transmission 314 by way of the NDPs, and further to allow the AP to determine and store the To A of each respective NDP from each STAi.

[0041] The DL sounding part 306 includes a DL NDP 307 sent to the respective STAs, in this case STAs 1-n (as Fig. 4 assumes channels were free to transmission to all STAs 1-n). The DL NDP 307 serves among other things to allow the AP to store the ToD of the DL NDP for later RTT determination and ranging measurements.

[0042] The DL sounding part 306 is followed by an AP2STA LMR part 308, where the AP, now having available to it the respective ToAs of the UL NDPs from the UL sounding part 304, and also the ToD of the DL NDP 307 from the DL sounding part, is shown as sending information regarding the latter ToAs and ToD to each respective STAi (with i being equal in the shown example to an integer value from 1 to n) in a DL MU-MEVIO AP2STA LMR transmission 316. Thus, the ToA of the UL NDPi from STAi, along with the ToD of the DL MU-MFMO (which is the same for all STAs 1-n), is sent by the AP to STAi in an DL MU- MFMO transmission, along with similar DL MU-MFMO transmissions to each of the other STAs. In this manner, each STAi, from the ToA of the corresponding UL NDPi at the AP, and with existing information at STAi on the ToD of the UL NDPi, and, in addition, from the ToD of the DL NDP 307 from the AP, and with existing information at STAi on the ToA of the DL NDP 307, can determine the RTT of the NDPi and of the DL NDP 307, and make a ranging/location measurement therefrom.

[0043] The AP2STA LMR part 308 may be followed by the STA2AP LMR part 310, which includes a second trigger frame 318 from the AP to the STAs 1-n to solicit each STAi within STAs 1-n to send it its own LMR. In the STA2AP LMR part 310, each STAi, having available to it the ToD of the corresponding UL NDPi, and also the ToA as received by STAi of the DL NDP 307 from the DL sounding part, is shown as sending information regarding the latter ToD and ToA to the AP in a UL MU-MEVIO STA2AP LMR transmission 320. In this manner, the AP, from the ToD of each UL NDPi from each STAi, and with existing information at the AP on the ToA of each UL NDPi, and, in addition, from the ToA at each STAi of the DL NDP 307, and with existing information on the ToD of the DL NDP 307, can determine the RTT of the NDPi and of the DL NDP 307 for each STAi, and make a ranging/location measurement therefrom for each STAi.

[0044] The ranging regime shown in Fig. 3, however, could be made more efficient for example, as proposed by embodiments, by way of reducing the number of required packets in order to achieve ranging and location measurement as between an AP and a number of STAs, such as a number of HE STAs.

[0045] Reference is now made to Fig. 4, a packet exchange sequence 400 for ranging using 802.1 lax is shown according to some demonstrative embodiments. The packet exchange sequence of Fig. 4 advantageously requires only four packets to finish a single ranging measurement as will be explained herein. In particular, packet exchange sequence 400 includes a location measurement exchange 402 that has at least three main parts: a DL sounding part 406, an UL sounding part 409, and an AP to ST A (AP2STA) Location Measurement Report (LMR) part 410. The AP2STA LMR may not be needed if only the AP needs the range information. The DL sounding part 406 includes a trigger frame TF 412 sent from the AP to the STAs 1-n, such as FIE STAs 104 of Fig. 1. A function of the TF 412 is to solicit and schedule the UL MU-MFMO transmission 414 in an UL sounding part 409. The TF 412 may schedule the entire location measurement exchange part, including the DL packets, the UL packets and the AP2STA LMR packets. In the alternative, the TF 412 may schedule up to the UL NDP and only reserve the medium for the prospective AP2STA LMR. If some or all of the STAs do not receive the TF or the DL NDP, those STAs would not send the UL NDP, and the AP may only send a partial AP2STA LMR, or no AP2STA LMR at all.

[0046] The UL packet may be part of an UL multi-user multiple-input multiple-output (MU- MFMO) packet as shown, or part of a time-multiplexed UL packet along with packets of other devices.

[0047] The TF 412 is followed by a DL NDP 407. Here, the AP, uses the DL sounding part 406 to send a DL NDP 407 to the respective STAs, in this case 1-n (as Fig. 4, similar to Fig. 3, assumes channels were free to transmission to all STAs 1-n). The DL NDP 407 serves among other things to allow the AP to store the ToD of the DL NDP. The TF 412 may be replaced by other types of frames such as a NDP Announcement (NDP A) frame, or a NDPA frame may be aggregated with a trigger frame in the downlink transmission of 412. The function of the NDPA frame is to inform the STAs the immediate transmission of the DL NDP.

[0048] The DL sounding part is followed by the UL sounding part 409. The UL sounding part includes respective UL MU-MFMO Null Data Packets (NDPs) 414 from respective STAs, such as HE STAs 104 of Fig. 1. In the shown figure, there are "n" STAs, and therefore "n" NDPs ranging from NDPI to NDPn sent to the AP in an UL MU-MIMO transmission 414. The UL MU-MIMO NDPs 414 are among other things to allow the AP to determine and store the ToA of each respective UL NDP from each STAi.

[0049] The UL sounding part 409 is followed by the AP2STA LMR part 410, where the AP, now having available to it 409 the ToD of the DL NDP 407 from the DL sounding part 406, and also the respective ToAs of the UL NDPs from the UL sounding part, is shown as sending information regarding the latter ToD and ToAs to each respective STA 1-n in a DL MU-MFMO AP2STA LMR transmission 416. Thus, the ToD of the DL NDP (which is the same for all STAs 1-n), along with the ToA of the UL NDPi from STAi, is sent by the AP to STAi in an DL MU-MFMO transmission, along with similar DL MU-MFMO transmissions to each of the other STAs. In this manner, each STAi, from the ToD of the DL NDP 407, and with existing information at STAi on the ToA of the DL NDP 407, and, in addition, from the ToA of the corresponding UL NDPi at the AP, and with existing information at STAi on the ToD of the UL NDPi, can determine the RTT of the DL NDP 407 and of the UL NDPi, and make a ranging/location measurement therefrom. In Fig. 4, the various packets are shown as being separated by a time interval equal to a Short Interframe Space (SIFS) time interval, although this time interval could vary in other embodiments. In some embodiment, instead of a DL MU- MFMO transmission, the AP2STA LMR transmission 416 can be a broadcast transmission or a multicast transmission or an OFDMA MU transmission. In some embodiment, instead of ToA and ToD, the information in AP2STA LMR 416 can be the respective RTT or distance between the AP to STAi estimated by the AP.

[0050] Unlike the process of Fig. 3 where the packet exchange sequence 300 contemplates a STA2AP LMR part 310 that requires two packets, the exemplary embodiment of Fig. 4 advantageously encodes each UL NDPi to include information that would have normally been sent in the STA2AP LMR part, obviating the need for the STA2AP LMR part altogether, and advantageously saving resources and expediting the ranging process. Some embodiments achieve the above efficiency by (1) at each STAi, causing transmission of the UL NDPi such that a time interval between a Fast Fourier Transform (FFT) clock boundary of the DL NDP being received at STAi and a FFT clock boundary of the UL packet being sent from STAi is a predetermined integer number of clock cycles of a sampling clock of STAi (2) by encoding each UL NDPi packet to the AP by applying cyclic shift delay (CSD) to symbols of the UL NDPi packet, the CSD being based on a time of arrival (ToA) of the DL NDP at the STAi, in a manner that will be described in further detail with respect to Figs. 5 and 6 below.

[0051] For further clarity, let us assume that: (a) di is the delay or time advancement signaled in (or simulated in) STAi's UL NDPi using CSD; (b) Δΐϊ is the predetermined duration at STAi that consists of two intervals: 1) the time interval between STAi's ToA receiving the DL NDP at time t2, and the ToD of its UL NDPi sounding signal after the cyclic prefix, plus 2) di; (c) the ToD of the DL NDP at the AP is tl ; (d) the ToA of the DL NDP at STAi is t2; (e) t3 is the ToD of the UL NDPi at STAi plus di , and (f) the ToA of the UL NDPi at the AP is t4. In this case, the RTT would be equal to RTT = (t4-tl) - (t3-t2). Therefore, in order to be able to calculate the RTT to and from STAi, the AP would typically need to have information about tl, t2, t3 and t4. The AP would already have information about tl and t4 as it knows when it sent the DL NDP 407 when it received the UL NDPi from STAi. In the embodiment of Fig. 3, the t2 and t3 would be communicated by STAi to the AP using the STA2AP LMR. In the embodiment of Fig. 4, the UL NDPi would be encoded to simulate having been sent a predetermined time interval Ati after the ToA of the DL NDP at STAi, and in particular encoded using cyclic shift diversity/delay, for example with respect to symbols in its HE Long Training Fields (HE-LTFs). In this way, there would be an assumption that (t3-t2) = Ati is predetermined, and the need for STA2AP LMR would be obviated. For example, Ati may be a constant for each STAi, it may be the same constant for all ST As 1-n, or it may be predetermined for each STAi but be subject to change depending on application needs. In any event, Ati would be known at the AP to allow RTT calculation according to demonstrative embodiments. Embodiments contemplate estimating the ToA of the DL NDP at STAi, determining a time delay Xi between the FFT clock boundary of the DL NDP at STAi and the ToA of the DL NDP at STAi with respect to the FFT clock boundary, and encoding the UL NDPi to the AP using CSD based on time delay Xi. In this manner, the time delay between the ToA of the DL NDP at STAi and the simulated ToD of the UL NDPi from STAi perceived at the AP can be set to take into account the predetermined Mi. The AP would know the Ati and in this way no longer have a need for the STA2AP LMR packet exchange to perform RTT and ranging measurements.

[0052] Regarding FFT boundaries, the OFDM symbol e.g. the High Efficiency (HE) Long Training Field (LTF) symbol for the channel sounding includes a signal in an FFT window and a cyclic prefix. It is to be understood that the ToD as referred to herein is the starting time of the FFT window, and not the starting time of the CP that is before the FFT window. Thus, for example by "ToD of the UL NDPi", we mean the starting time of the FFT window of the LTF sounding symbol of the UL NDPi.

[0053] According to some demonstrative embodiments, all ST As 1-n may transmit similarly coded UL NDPs 1-n in an UL MU-MFMO fashion to the AP, as shown for example in Fig. 4, with each UL NDPi being encoded to reflect a CSD that is based at least on the specific time delay x estimated by STAi for that particular STA depending on the ToA of each DL NDP to that STAi. For example, where the CSD is applied to the HE-LTFs of each UL NDPi, and since the HE-LTFs of different STAs may be multiplexed using the P-matrix or Time Division Multiple Access (TDMA), the AP may then subtract each STA's CSD from its corresponding HE-LTF portion without inter-STA interference.

[0054] Reference is now made to Fig. 5 in order to further explain the encoding each UL NDPi according to some embodiments. Fig. 5 is an example plot 500 for aligning the Fast Fourier Transform (FFT) boundary of the DL NDP and an UL NDPi at each STAi, in accordance with some embodiments. Plot 500 shows the time domain in the horizontal direction. In a top portion 502 thereof, plot 500 shows multipath magnitude in the vertical direction for the incoming DL NDP signal, and in the bottom portion 504 thereof, plot 500 shows the waveform of the clock pulse for STAi. In the shown embodiment of plot 500, the clock is a 320 MHz clock using 4 μβεϋ for 1280 clock cycles. In the top portion 502, the DL NDP portion 506 received at STAi and the UL NDPi portion 509 transmitted by STAi are shown as spanning 4 μβεϋ, or they could be multiples of 3.2 μβεϋ plus a certain cyclic prefix, by way of example only. Here, the DL NDP peak 507 may correspond to a maximum multipath magnitude peak of the DL NDP signal in the time domain, or, alternatively, to a first multipath magnitude peak of the DL NDP signal above noise level in the time domain, as determined at STAi, as will be explained further below in relation to Fig. 6.

[0055] It is to be noted that, in 802.1 lax, the LTF symbol has multiple formats. The most popular is a 3.2 microsecond FFT window plus a 0.8 microsecond cyclic prefix (CP). The other formats include 4 x 3.2=12.8 microseconds plus a 0.8 microsecond CP, 4 x 3.2=12.8 microseconds plus 3.2 microsecond CP, and more. The CP may for example be 0.8, 1.6, and 3.2 microseconds. The FFT window can be 3.2, 6.4, and 12.8 microseconds. 802.1 lax supports about 4 or 5 combinations of the FFT window duration and CP duration, and the FFT window duration plus CP duration of 4 microseconds may be the most likely one used by 1 laz sounding, but is in no way to limit embodiments. It is further noted that a special case may exist where the CSD shift amount di is equal to shift amount Xi. However, in general only if the FFT window boundary of DL NDP used by the STAi receiver and FFT window boundary of UL NDPi used by the STAi transmitter are precisely Δΐί apart are di and Xi equal to each other. However, as would be recognized by the skilled person, di and Xi are likely to be different from one another, and this is because, in general, since the FFT window of DL NDP used by the STAi receiver may dynamically slide within a range (e.g. CP duration) according to the instant channel multipath realization, the two FFT window are usually not precisely Δΐί apart. A determination or estimation of di therefore, in some embodiments, may take not only Xi but also the sliding of the FFT window for the DL NDP based on CP duration into consideration. [0056] Referring still to Fig. 5, once the STAi detects the peak 507, it will need to determine the time delay Xi back to the closest prior FFT boundary time FFT DL as shown in the figure. This is because STAi, in order to adhere to the predetermined time interval Ati requirement noted above and to thus obviate the need for a STA2AP LMR packet sequence, wants to send the UL NDPi portion 509 the predetermined integer number of clock cycles later than FFT DL (preferable for implementation), at a FFT clock boundary FFT UL as shown. However, at the same time, STAi must know time delay di in order to account for the same when the UL NDPi is sent by encoding the UL NDPi by applying CSD to symbols of the UL NDPi, with the CSD being a function of the time delay Xi and the FFT boundary of the UL NDPi. In this way, when the AP receives the UL NDPi and decodes it, it will extract information from the UL NDPi as if the UL NDPi were sent by STAi at a time that is Ati after the time of arrival of the first multipath t2, and in this way the predetermined time interval Ati would hold true for the RTT determination by the AP without the need for the STA2AP LMR packet exchange shown in Fig. 3. In other words, the time interval between the time t2 (ToA of the DL NDP) when the DL NDP is actually received, and the time t3 (ToD of the UL NDPi as perceived by the AP) would be equal to the predetermined time interval Ati in order to result in a correct RTT calculation and correct ranging by the AP. Thus, a time delay between the FFT clock boundary of the DL packet and a ToA of the DL packet is a real time delay, and the CSD is to introduce a virtual time delay into the UL packet based on the real time delay. The time delay Xi may be determined in a number of ways, which will be described in further detail below, and especially in relation to Fig. 6. In some embodiments, as noted previously, Ati may be a constant for each STAi, it may be the same constant for all ST As 1-n, or it may be predetermined for each STAi but be subject to change depending on application needs. According to some embodiments, the CSD may be applied for example to HE Long Training Fields (HE-LTFs) of the UL NDPi.

[0057] Embodiments assume that the AP and STA have the capability to estimate ToAs in real time based on channel estimation, and further that, on the STA side, a time interval between FFT DL and the actual ToD of the UL NDP may be measured accurately, that is, with an error of up to 1 or a few clock cycles, that is, about 1 or a few nanoseconds.

[0058] The time delay Xi can be estimated from the time domain channel response or the frequency domain phase response of the channel response. For the time domain method, the multipaths may be shown as a plot in time domain. The first multipath above noise level would be identified as the first channel arrival and the delay associated with the first channel arrival would be the time of arrival (ToA). For the frequency domain method, the phase response for the channel response of each subcarrier would be plotted. A line fit may be applied to the resulting bumpy curve. The slope of the line thus fitted may be used to determine the time of arrival. The frequency domain method may not be as accurate as the time domain method. The ToA estimated by the frequency domain method roughly corresponds to the time of arrival of the strongest multipath in the time domain.

[0059] Referring now to Fig. 6, a plot 600 is shown plotting phase response against frequency for a DL NDP at STAi. To generate a plot such as plot 600, STAi is to obtain the frequency domain channel response of the DL NDP. The phase response is determined by each channel tap of the multipath channel. Each channel tap is represented by a peak (delta pulse) for the multipath of the DL NDP signal at a specific time delay value τ. The strength and phase of the channel tap delta pulse or peak is represented by a complex number, and the magnitude of the peak is the multipath magnitude, as would be recognized by one skilled in the art. Having determined multiple such peaks in the multipath magnitude in the time domain, the time of arrival of the first multipath can be determined. The time of arrival of the first multipath may be determined in frequency domain alternatively. For the phase response across frequency subcarriers, a bumpy curve 603 would be generated corresponding to various phase shifts (as the curve is not linear) across the frequency domain as shown the frequency representing subcarriers of the DL NDP signal. According to one embodiment, STAi is to estimate the Xi as shown in Fig. 5, for example, by fitting the bumpy curve to a line as shown in Fig. 6. A slope for line 604, which corresponds to the linear fit to the bumpy curve 603, would usually correspond to the phase shift generated by the multipath with the maximum magnitude and would be given by - coxi where ω is equal to 2πΐ and f is the frequency in Hertz as shown on the x axis of plot 500.

[0060] According to some demonstrative embodiments, a wireless communication device includes a memory (including for example memory 212 of Fig. 2), and processing circuitry coupled to the memory (including for example processing circuitry 214 of Fig. 2), the memory including logic. According to some demonstrative embodiments, the processing circuitry is to implement the logic to process a first packet from another device (such as AP 102 of Fig. 1); and encode a second packet to the other device by applying cyclic shift delay (CSD) to symbols of the UL packet, the CSD being based on a time of arrival (ToA) of the DL packet at the device. The CSD may be applied to HE-LTFs of the UL packet. The DL packet and the UL packet may each be a NDP packet. The processing circuitry is further to cause transmission of the UL packet such that a time interval between a Fast Fourier Transform (FFT) clock boundary of the DL packet and a FFT clock boundary of the UL packet at the device is a predetermined integer number of clock cycles of a sampling clock of the device. In addition, the processing circuitry is to process a Location Measurement Report (LMR) packet from the AP, the LMR packet including information on a time of departure (ToD) of the DL packet and on a ToA of the UL packet at the AP. In addition, the processing circuitry (for example also including application processor 206), is to determine a round trip time (RTT) between the device and the AP based on the LMR packet. According to some embodiments, the processing circuitry may estimate the time delay and then determine the CSD based on the estimated time delay. According to some embodiments, the wireless communication device may include a system including a STA, such as STA 200 of Fig. 2.

[0061] According to some embodiments, a wireless communication device includes a memory (including for example memory 212 of Fig. 2), and processing circuitry coupled to the memory (including for example processing circuitry 214 of Fig. 2), the memory including logic. The processing circuitry is to cause transmission of a downlink (DL) packet to a wireless station (STA); decode an uplink (UL) packet from the STA; encode a Location Measurement Report (LMR) packet to the STA, the LMR packet including information on a time of departure (ToD) of the DL packet and on a ToA of the UL packet at the AP; and cause transmission of the LMR packet to the STA. In addition, the processing circuitry (for example also including application processor 206), is to determine a round trip time (RTT) between the device and the STA based on a time interval between a ToA of the DL packet at the STA and ToD of the UL packet at the STA being a predetermined integer number of clock cycles of a sampling clock of the STA, the predetermined integer number of clock cycles being known to the device. According to some embodiments, the wireless communication device may include a system including an AP, such as AP 200 of Fig. 2.

[0062] Fig. 7 illustrates a method 700 in accordance with some demonstrative embodiments. The method 700 may begin with operation 702, which includes processing a first packet from another device. At operation 704, the method includes encoding a second packet to the other device by applying cyclic shift delay (CSD) to symbols of the UL packet, the CSD being based on a time of arrival (ToA) of the DL packet at the device. At operation 706, the method includes causing transmission of the UL packet such that a time interval between a Fast Fourier Transform (FFT) clock boundary of the DL packet and a FFT clock boundary of the UL packet at the device is a predetermined integer number of clock cycles of a sampling clock of the device. At operation 708, the method includes processing a Location Measurement Report (LMR) packet from the AP, the LMR packet including information on a time of departure (ToD) of the DL packet and on a ToA of the UL packet at the AP. At operation 710, the method includes determining a round trip time (RTT) between the device and the AP based on the LMR packet.

[0063] Fig. 8 illustrates a block diagram of an example machine 800 upon which any one or more of the techniques (e.g., methodologies) discussed herein may perform. In alternative embodiments, the machine 800 may operate as a standalone device or may be connected (e.g., networked) to other machines. In a networked deployment, the machine 800 may operate in the capacity of a server machine, a client machine, or both in server-client network environments. In an example, the machine 800 may act as a peer machine in peer-to-peer (P2P) (or other distributed) network environment. The machine 800 may be an AP 102, HE STAs 104, personal computer (PC), a tablet PC, a set-top box (STB), a personal digital assistant (PDA), a mobile telephone, a smart phone, a web appliance, a network router, switch or bridge, or any machine capable of executing instructions (sequential or otherwise) that specify actions to be taken by that machine. Further, while only a single machine is illustrated, the term "machine" may also be taken to include any collection of machines that individually or jointly execute a set (or multiple sets) of instructions to perform any one or more of the methodologies discussed herein, such as cloud computing, software as a service (SaaS), other computer cluster configurations.

[0064] Examples, as described herein, may include, or may operate on, logic or a number of components, modules, or mechanisms. Modules are tangible entities (e.g., hardware) capable of performing specified operations and may be configured or arranged in a certain manner. In an example, circuits may be arranged (e.g., internally or with respect to external entities such as other circuits) in a specified manner as a module. In an example, the whole or part of one or more computer systems (e.g., a standalone, client or server computer system) or one or more hardware processors may be configured by firmware or software (e.g., instructions, an application portion, or an application) as a module that operates to perform specified operations. In an example, the software may reside on a machine readable medium. In an example, the software, when executed by the underlying hardware of the module, causes the hardware to perform the specified operations.

[0065] Accordingly, the term "module" is understood to encompass a tangible entity, be that an entity that is physically constructed, specifically configured (e.g., hardwired), or temporarily (e.g., transitorily) configured (e.g., programmed) to operate in a specified manner or to perform part or all of any operation described herein. Considering examples in which modules are temporarily configured, each of the modules need not be instantiated at any one moment in time. For example, where the modules comprise a general-purpose hardware processor configured using software, the general-purpose hardware processor may be configured as respective different modules at different times. Software may accordingly configure a hardware processor, for example, to constitute a particular module at one instance of time and to constitute a different module at a different instance of time.

[0066] Machine (e.g., computer system) 800 may include a hardware processor 802 (e.g., a central processing unit (CPU), a graphics processing unit (GPU), a hardware processor core, or any combination thereof), a main memory 804 and a static memory 806, some or all of which may communicate with each other via an interlink (e.g., bus) 808. The machine 800 may further include a display device 810, an input device 812 (e.g., a keyboard), and a user interface (UI) navigation device 814 (e.g., a mouse). In an example, the display device 810, input device 812 and UI navigation device 814 may be a touch screen display. The machine 800 may additionally include a mass storage (e.g., drive unit) 816, a signal generation device 818 (e.g., a speaker), a network interface device 820, and one or more sensors 821, such as a global positioning system (GPS) sensor, compass, accelerometer, or other sensor. The machine 800 may include an output controller 828, such as a serial (e.g., universal serial bus (USB), parallel, or other wired or wireless (e.g., infrared (IR), near field communication (NFC), etc.) connection to communicate or control one or more peripheral devices (e.g., a printer, card reader, etc.). In some embodiments, the processor 802 and/or instructions 824 may comprise processing circuitry and/or transceiver circuitry.

[0067] The storage device 816 may include a machine readable medium 822 on which is stored one or more sets of data structures or instructions 824 (e.g., software) embodying or utilized by any one or more of the techniques or functions described herein. The instructions 824 may also reside, completely or at least partially, within the main memory 804, within static memory 806, or within the hardware processor 802 during execution thereof by the machine 800. In an example, one or any combination of the hardware processor 802, the main memory 804, the static memory 806, or the storage device 816 may constitute machine readable media.

[0068] While the machine readable medium 822 is illustrated as a single medium, the term "machine readable medium" may include a single-medium or multiple-media (e.g., a centralized or distributed database, and/or associated caches and servers) configured to store the one or more instructions 824.

[0069] An apparatus of the machine 800 may be one or more of a hardware processor 802 (e.g., a central processing unit (CPU), a graphics processing unit (GPU), a hardware processor core, or any combination thereof), a main memory 804 and a static memory 806, some or all of which may communicate with each other via an interlink (e.g., bus) 808.

[0070] The term "machine readable medium" may include any medium that is capable of storing, encoding, or carrying instructions for execution by the machine 800 and that cause the machine 800 to perform any one or more of the techniques of the present disclosure, or that is capable of storing, encoding or carrying data structures used by or associated with such instructions. Non-limiting machine readable medium examples may include solid-state memories, and optical and magnetic media. Specific examples of machine readable media may include: non-volatile memory, such as semiconductor memory devices (e.g., Electrically Programmable Read-Only Memory (EPROM), Electrically Erasable Programmable Read-Only Memory (EEPROM)) and flash memory devices; magnetic disks, such as internal hard disks and removable disks; magneto-optical disks; Random Access Memory (RAM); and CD-ROM and DVD-ROM disks. In some examples, machine readable media may include non-transitory machine-readable media. In some examples, machine readable media may include machine readable media that is not a transitory propagating signal.

[0071] The instructions 824 may further be transmitted or received over a communications network 826 using a transmission medium via the network interface device 820 utilizing any one of a number of transfer protocols (e.g., frame relay, internet protocol (IP), transmission control protocol (TCP), user datagram protocol (UDP), hypertext transfer protocol (HTTP), etc.). Example communication networks may include a local area network (LAN), a wide area network (WAN), a packet data network (e.g., the Internet), mobile telephone networks (e.g., cellular networks), Plain Old Telephone (POTS) networks, and wireless data networks (e.g., Institute of Electrical and Electronics Engineers (IEEE) 802.11 family of standards known as Wi-Fi®, IEEE 802.16 family of standards known as WiMax®), IEEE 802.15.4 family of standards, a Long Term Evolution (LTE) family of standards, a Universal Mobile Telecommunications System (UMTS) family of standards, peer-to-peer (P2P) networks, among others.

[0072] In an example, the network interface device 820 may include one or more physical jacks (e.g., Ethernet, coaxial, or phone jacks) or one or more antennas to connect to the communications network 826. In an example, the network interface device 820 may include one or more antennas 860 to wirelessly communicate using at least one of single-input multiple- output (SFMO), multiple-input multiple-output (MFMO), or multiple-input single-output (MISO) techniques. In some examples, the network interface device 820 may wirelessly communicate using Multiple User MFMO techniques. The term "transmission medium" may be taken to include any intangible medium that is capable of storing, encoding or carrying instructions for execution by the machine 800, and includes digital or analog communications signals or other intangible medium to facilitate communication of such software.

[0073] Various embodiments may be implemented fully or partially in software and/or firmware. This software and/or firmware may take the form of computer-executable instructions contained in or on a product comprising a non -transitory computer-readable storage medium or tangible computer-readable non-transitory storage media. Those instructions may then be read and executed by one or more processors to enable performance of the operations described herein. The instructions may be in any suitable form, such as but not limited to source code, compiled code, interpreted code, executable code, static code, dynamic code, and the like. Such a computer-readable medium may include any tangible non-transitory medium for storing information in a form readable by one or more computers, such as but not limited to read only memory (ROM); random access memory (RAM); magnetic disk storage media; optical storage media; flash memory, etc.

[0074] EXAMPLES

[0075] The following examples pertain to further embodiments.

[0076] Example 1 includes a wireless communication device including a memory, and processing circuitry coupled to the memory, the memory including logic, and the processing circuitry to implement the logic to: process a first packet from another device; encode a second packet to the other device by applying cyclic shift delay (CSD) to symbols of the second packet, the CSD being based on a time of arrival (ToA) of the first packet at the device; and cause transmission of the second packet such that a time interval between a Fast Fourier Transform (FFT) clock boundary of the first packet and a FFT clock boundary of the second packet at the device is a predetermined integer number of clock cycles of a sampling clock of the device.

[0077] Example 2 includes the subject matter of Example 1, and optionally, wherein the second packet is an uplink (UL) packet, and wherein the processing circuitry is to apply CSD to a high- efficiency (HE) long training field (LTF) of the UL packet.

[0078] Example 3 includes the subject matter of Example 1, and optionally, wherein the first packet is a downlink (DL) packet and the second packet is an uplink (UL) packet, and wherein at least one of the DL packet and the UL packet includes a null data packet ( DP) sounding packet.

[0079] Example 4 includes the subject matter of Example 1, and optionally, wherein the processing circuitry is further to: estimate a time delay between the FFT clock boundary of the first packet and a ToA of the first packet; and determine the CSD based on the time delay.

[0080] Example 5 includes the subject matter of Example 4, and optionally, wherein the processing circuitry is to estimate the time delay by estimating a slope of a linear phase shift across frequencies of the first packet, and by determining the time delay based on the slope.

[0081] Example 6 includes the subject matter of Example 4, and optionally, wherein the first packet is part of a downlink (DL) multi-user multiple-input multiple-output (MU-MFMO) packet from an access point (AP), and wherein the second packet is an uplink (UL) packet.

[0082] Example 7 includes the subject matter of Example 1, and optionally, wherein the uplink packet is part of an UL multi-user multiple-input multiple-output (MU-MIMO) packet, or part of a time-multiplexed UL packet along with packets of other devices.

[0083] Example 8 includes the subject matter of Example 1, and optionally, wherein the other device is an AP, the processing circuitry further to: process a Location Measurement Report (LMR) packet from the AP, the LMR packet including information on a time of departure (ToD) of the first packet and on a ToA of the second packet at the AP; and determine a round trip time (RTT) between the device and the AP based on the LMR packet.

[0084] Example 9 includes the subject matter of Example 1, and optionally, wherein a time delay between the FFT clock boundary of the first packet and a ToA of the first packet is a real time delay, and wherein the CSD is to introduce a virtual time delay into the second packet based on the real time delay.

[0085] Example 10 includes the subject matter of Example 1, and optionally, wherein a time delay between the FFT clock boundary of the first packet and a ToA of the first packet is a real time delay, and wherein the CSD is to introduce a virtual time delay into the second packet such that the other device decodes the second packet to indicate a ToD of the second packet as occurring at the FFT clock boundary of the second packet plus at least the time delay.

[0086] Example 11 includes the subject matter of Example 1, and optionally, further including a front-end module.

[0087] Example 12 includes the subject matter of Example 11, and optionally, further including a plurality of antennas.

[0088] Example 13 includes a product comprising one or more tangible computer-readable non- transitory storage media comprising computer-executable instructions operable to, when executed by at least one computer processor, enable the at least one computer processor to implement operations at a wireless communication device, the operations comprising: processing a first packet from another device; encoding a second packet to the other device by applying cyclic shift delay (CSD) to symbols of the second packet, the CSD being based on a time of arrival (ToA) of the first packet at the at least one processor; and causing transmission of the second packet such that a time interval between a Fast Fourier Transform (FFT) clock boundary of the first packet and a FFT clock boundary of the second packet at the processor is a predetermined integer number of clock cycles of a sampling clock of the processor.

[0089] Example 14 includes the subject matter of Example 13, and optionally, wherein second packet includes an uplink (UL) packet, and wherein the operations further include applying CSD to a high-efficiency (HE) long training field (LTF) of the UL packet.

[0090] Example 15 includes the subject matter of Example 13, and optionally, wherein the first packet is a downlink (DL) packet, the second packet is an uplink (UL) packet, and the at least one of the DL packet and the second packet includes a null data packet ( DP) sounding packet.

[0091] Example 16 includes the subject matter of Example 13, and optionally, wherein the operations further include: estimating a time delay between the FFT clock boundary of the first packet and a ToA of the first packet; and determining the CSD based on the time delay. [0092] Example 17 includes the subject matter of Example 16, and optionally, wherein the operations further include estimating the time delay by estimating a slope of a linear phase shift across frequencies of the first packet, and by determining the time delay based on the slope.

[0093] Example 18 includes the subject matter of Example 13, and optionally, wherein the first packet is part of a downlink (DL) multi-user multiple-input multiple-output (MU-MIMO) packet from an access point (AP), and wherein the second packet is an uplink (UL) packet.

[0094] Example 19 includes the subject matter of Example 13, and optionally, wherein the uplink packet is part of an UL multi-user multiple-input multiple-output (MU-MIMO) packet, or part of a time-multiplexed UL packet along with packets of other devices.

[0095] Example 20 includes the subject matter of Example 13, and optionally, wherein the other device is an AP, the operations further including: processing a Location Measurement Report (LMR) packet from the AP, the LMR packet including information on a time of departure (ToD) of the first packet and on a ToA of the second packet at the AP; and determining a round trip time (RTT) between the device and the AP based on the LMR packet.

[0096] Example 21 includes the subject matter of Example 13, and optionally, wherein a time delay between the FFT clock boundary of the first packet and a ToA of the first packet is a real time delay, and wherein the CSD is to introduce a virtual time delay into the second packet based on the real time delay.

[0097] Example 22 includes the subject matter of Example 13, and optionally, wherein a time delay between the FFT clock boundary of the first packet and a ToA of the first packet is a real time delay, and wherein the CSD is to introduce a virtual time delay into the second packet such that the other device decodes the second packet to indicate a ToD of the second packet as occurring at the FFT clock boundary of the second packet plus at least the time delay.

[0098] Example 23 includes a method to be performed at a wireless communication device, the method including: processing a first packet from another device; encoding a second packet to the other device by applying cyclic shift delay (CSD) to symbols of the second packet, the CSD being based on a time of arrival (ToA) of the first packet at the device; and causing transmission of the second packet such that a time interval between a Fast Fourier Transform (FFT) clock boundary of the first packet and a FFT clock boundary of the second packet at the device is a predetermined integer number of clock cycles of a sampling clock of the device.

[0099] Example 24 includes the subject matter of Example 23, and optionally, wherein the second packet is an uplink (UL) packet, the method further including applying the CSD to a high-efficiency (HE) long training field (LTF) of the UL packet.

[00100] Example 25 includes the subject matter of Example 23, and optionally, wherein the first packet is a downlink (DL) packet and the second packet is an uplink (UL) packet, and wherein at least one of the DL packet and the UL packet includes a null data packet ( DP) sounding packet.

[00101] Example 26 includes the subject matter of Example 23, and optionally, further including: estimating a time delay between the FFT clock boundary of the first packet and a ToA of the first packet; and determining the CSD based on the time delay.

[00102] Example 27 includes the subject matter of Example 23, and optionally, further including estimating the time delay by estimating a slope of a linear phase shift across frequencies of the first packet, and by determining the time delay based on the slope.

[00103] Example 28 includes the subject matter of Example 23, and optionally, wherein the first packet is part of a downlink (DL) multi-user multiple-input multiple-output (MU-MFMO) packet from an access point (AP), and wherein the second packet is an uplink (UL) packet.

[00104] Example 29 includes the subject matter of Example 23, and optionally, wherein the uplink packet is part of an UL multi-user multiple-input multiple-output (MU-MFMO) packet, or part of a time-multiplexed UL packet along with packets of other devices.

[00105] Example 30 includes the subject matter of Example 23, and optionally, wherein the other device is an AP, the method further including: processing a Location Measurement Report (LMR) packet from the AP, the LMR packet including information on a time of departure (ToD) of the first packet and on a ToA of the second packet at the AP; and determining a round trip time (RTT) between the device and the AP based on the LMR packet.

[00106] Example 31 includes the subject matter of Example 23, and optionally, wherein a time delay between the FFT clock boundary of the first packet and a ToA of the first packet is a real time delay, and wherein the CSD is to introduce a virtual time delay into the second packet based on the real time delay.

[00107] Example 32 includes the subject matter of Example 23, and optionally, wherein a time delay between the FFT clock boundary of the first packet and a ToA of the first packet is a real time delay, and wherein the CSD is to introduce a virtual time delay into the second packet such that the other device decodes the second packet to indicate a ToD of the second packet as occurring at the FFT clock boundary of the second packet plus at least the time delay.

[00108] Example 33 includes a wireless communication device including: means for processing a first packet from another device; means for encoding a second packet to the other device by applying cyclic shift delay (CSD) to symbols of the second packet, the CSD being based on a time of arrival (ToA) of the first packet at the device; and means for causing transmission of the second packet such that a time interval between a Fast Fourier Transform (FFT) clock boundary of the first packet and a FFT clock boundary of the second packet at the device is a predetermined integer number of clock cycles of a sampling clock of the device. [00109] Example 34 includes the subject matter of Example 33, and optionally, wherein the first packet is a downlink (DL) packet and the second packet is an uplink (UL) packet, the device further including means for applying CSD to a high-efficiency (HE) long training field (LTF) of UL packet.

[00110] Example 35 includes the subject matter of Example 33, and optionally, wherein the first packet is a downlink (DL) packet and the second packet is an uplink (UL) packet, and wherein at least one of the DL packet and the UL packet includes a null data packet (NDP) sounding packet.

[00111] Example 36 includes the subject matter of Example 33, and optionally, further including: means for estimating a time delay between the FFT clock boundary of the first packet and a ToA of the first packet; and means for determining the CSD based on the time delay.

[00112] Example 37 includes a wireless communication device including a memory, and processing circuitry coupled to the memory, the memory including logic, and the processing circuitry to implement the logic to: cause transmission of a first packet to a wireless station (STA); decode a second packet from the STA; encode a Location Measurement Report (LMR) packet to the STA, the LMR packet including information on a time of departure (ToD) of the first packet and on a ToA of the second packet at the device; cause transmission of the LMR packet to the STA; and determine a round trip time (RTT) between the device and the STA based on a time interval between a ToA of the first packet at the STA and ToD of the second packet at the STA being a predetermined integer number of clock cycles of a sampling clock of the STA, the predetermined integer number of clock cycles being known to the device.

[00113] Example 38 includes the subject matter of Example 37, and optionally, wherein the first packet is a downlink (DL) packet and the second packet is an uplink (UL) packet, and wherein at least one of the DL packet and the UL packet includes a null data packet (NDP) sounding packet.

[00114] Example 39 includes the subject matter of Example 37, and optionally, wherein the predetermined integer number of clock cycles is a constant.

[00115] Example 40 includes the subject matter of Example 37, and optionally, further including a front-end module.

[00116] Example 41 includes the subject matter of Example 40, and optionally, further including a plurality of antennas.

[00117] Example 42 includes a product comprising one or more tangible computer-readable non-transitory storage media comprising computer-executable instructions operable to, when executed by at least one computer processor, enable the at least one computer processor to implement operations at a wireless communication device, the operations comprising: causing transmission of a first packet to a wireless station (STA); decoding a second packet from the STA; encoding a Location Measurement Report (LMR) packet to the STA, the LMR packet including information on a time of departure (ToD) of the first packet and on a ToA of the second packet at the device; causing transmission of the LMR packet to the STA; and determining a round trip time (RTT) between the device and the STA based on a time interval between a ToA of the first packet at the STA and ToD of the second packet at the STA being a predetermined integer number of clock cycles of a sampling clock of the STA, the predetermined integer number of clock cycles being known to the device.

[00118] Example 43 includes the subject matter of Example 42, and optionally, wherein the first packet is a downlink (DL) packet and the second packet is an uplink (UL) packet, and wherein at least one of the DL packet and the UL packet includes a null data packet (NDP) sounding packet.

[00119] Example 44 includes the subject matter of Example 42, and optionally, wherein the predetermined integer number of clock cycles is a constant.

[00120] Example 45 includes the subject matter of Example 42, and optionally, further including a front-end module.

[00121] Example 46 includes the subject matter of Example 45, and optionally, further including a plurality of antennas.

[00122] Example 47 includes a method to be performed at a wireless communication device, the method comprising: causing transmission of a downlink (DL) packet to a wireless station (STA); decoding an uplink (UL) packet from the STA; encoding a Location Measurement Report (LMR) packet to the STA, the LMR packet including information on a time of departure (ToD) of the first packet and on a ToA of the second packet at the device; cause transmission of the LMR packet to the STA; and determining a round trip time (RTT) between the device and the STA based on a time interval between a ToA of the first packet at the STA and ToD of the second packet at the STA being a predetermined integer number of clock cycles of a sampling clock of the STA, the predetermined integer number of clock cycles being known to the device.

[00123] Example 48 includes the subject matter of Example 47, wherein the first packet is a downlink (DL) packet and the second packet is an uplink (UL) packet, and wherein at least one of the DL packet and the UL packet includes a null data packet (NDP) sounding packet.

[00124] Example 49 includes the subject matter of Example 47, and optionally, wherein the predetermined integer number of clock cycles is a constant.

[00125] Example 50 includes a wireless communication device comprising: causing transmission of a downlink (DL) packet to a wireless station (STA); means for decoding an uplink (UL) packet from the STA; means for encoding a Location Measurement Report (LMR) packet to the STA, the LMR packet including information on a time of departure (ToD) of the first packet and on a ToA of the second packet at the device; means for causing transmission of the LMR packet to the STA; and means for determining a round trip time (RTT) between the device and the STA based on a time interval between a ToA of the first packet at the STA and ToD of the second packet at the STA being a predetermined integer number of clock cycles of a sampling clock of the STA, the predetermined integer number of clock cycles being known to the device.

[00126] Example 51 includes the subject matter of Example 50, and optionally, wherein the first packet is a downlink (DL) packet and the second packet is an uplink (UL) packet, and wherein at least one of the DL packet and the UL packet includes a null data packet (NDP) sounding packet.

[00127] Example 52 includes the subject matter of Example 50, and optionally, wherein the predetermined integer number of clock cycles is a constant.

Claims

CLAIMS:

1. A wireless communication device including a memory, and processing circuitry coupled to the memory, the memory including logic, and the processing circuitry to implement the logic to:

process a first packet from another device;

encode a second packet to the other device by applying cyclic shift delay (CSD) to symbols of the second packet, the CSD being based on a time of arrival (ToA) of the first packet at the device; and

cause transmission of the second packet such that a time interval between a Fast Fourier Transform (FFT) clock boundary of the first packet and a FFT clock boundary of the second packet at the device is a predetermined integer number of clock cycles of a sampling clock of the device.

2. The device of claim 1, wherein the second packet is an uplink (UL) packet, and wherein the processing circuitry is to apply CSD to a high-efficiency (HE) long training field (LTF) of the UL packet.

3. The device of claim 1, wherein the first packet is a downlink (DL) packet and the second packet is an uplink (UL) packet, and wherein at least one of the DL packet and the UL packet includes a null data packet ( DP) sounding packet.

4. The device of claim 1, wherein the processing circuitry is further to:

estimate a time delay between the FFT clock boundary of the first packet and a

ToA of the first packet; and

determine the CSD based on the time delay.

5. The device of claim 4, wherein the processing circuitry is to estimate the time delay by estimating a slope of a linear phase shift across frequencies of the first packet, and by determining the time delay based on the slope.

6. The device of claim 4, wherein the first packet is part of a downlink (DL) multiuser multiple-input multiple-output (MU-MEVIO) packet from an access point (AP), and wherein the second packet is an uplink (UL) packet.

7. The device of claim 1, wherein the uplink packet is part of an UL multi-user multiple-input multiple-output (MU-MIMO) packet, or part of a time-multiplexed UL packet along with packets of other devices.

8. The device of claim 1, wherein the other device is an AP, the processing circuitry further to:

process a Location Measurement Report (LMR) packet from the AP, the LMR packet including information on a time of departure (ToD) of the first packet and on a ToA of the second packet at the AP; and

determine a round trip time (RTT) between the device and the AP based on the

LMR packet.

9. The device of claim 1, wherein a time delay between the FFT clock boundary of the first packet and a ToA of the first packet is a real time delay, and wherein the CSD is to introduce a virtual time delay into the second packet based on the real time delay.

10. The device of claim 1, wherein a time delay between the FFT clock boundary of the first packet and a ToA of the first packet is a real time delay, and wherein the CSD is to introduce a virtual time delay into the second packet such that the other device decodes the second packet to indicate a ToD of the second packet as occurring at the FFT clock boundary of the second packet plus at least the time delay.

11. The device of claim 1, further including a front-end module.

12. The device of claim 11, further including a plurality of antennas.

13. A method to be performed at a wireless communication device, the method including:

processing a first packet from another device;

encoding a second packet to the other device by applying cyclic shift delay (CSD) to symbols of the second packet, the CSD being based on a time of arrival (ToA) of the first packet at the device; and

causing transmission of the second packet such that a time interval between a Fast Fourier Transform (FFT) clock boundary of the first packet and a FFT clock boundary of the second packet at the device is a predetermined integer number of clock cycles of a sampling clock of the device.

14. The method of claim 13, wherein the first packet is a downlink (DL) packet and the second packet is an uplink (UL) packet, and wherein at least one of the DL packet and the UL packet includes a null data packet ( DP) sounding packet, the method further including applying the CSD to a high-efficiency (HE) long training field (LTF) of the UL packet.

15. The method of claim 13, further including:

estimating a time delay between the FFT clock boundary of the first packet and a ToA of the first packet; and

determining the CSD based on the time delay.

16. The method of claim 15, further including estimating the time delay by estimating a slope of a linear phase shift across frequencies of the first packet, and by determining the time delay based on the slope.

17. The method of claim 14, wherein the downlink packet is part of a downlink (DL) multi-user multiple-input multiple-output (MU-MIMO) packet from an access point (AP), and wherein the uplink packet is part of an UL multi-user multiple-input multiple-output (MU- MFMO) packet, or part of a time-multiplexed UL packet along with packets of other devices.

18. The method of claim 13, wherein the other device is an AP, the method further including:

processing a Location Measurement Report (LMR) packet from the AP, the LMR packet including information on a time of departure (ToD) of the first packet and on a ToA of the second packet at the AP; and

determining a round trip time (RTT) between the device and the AP based on the

LMR packet.

19. The method of claim 13, wherein a time delay between the FFT clock boundary of the first packet and a ToA of the first packet is a real time delay, and wherein the CSD is to introduce a virtual time delay into the second packet based on the real time delay.

20. The method of claim 13, wherein a time delay between the FFT clock boundary of the first packet and a ToA of the first packet is a real time delay, and wherein the CSD is to introduce a virtual time delay into the second packet such that the other device decodes the second packet to indicate a ToD of the second packet as occurring at the FFT clock boundary of the second packet plus at least the time delay.

21. A machine readable medium including code, which, when executed, causes a machine to perform the method of any one of claims 13-20.

22. A wireless communication device including:

means for processing a first packet from another device;

means for encoding a second packet to the other device by applying cyclic shift delay (CSD) to symbols of the second packet, the CSD being based on a time of arrival (ToA) of the first packet at the device; and

means for causing transmission of the second packet such that a time interval between a Fast Fourier Transform (FFT) clock boundary of the first packet and a FFT clock boundary of the second packet at the device is a predetermined integer number of clock cycles of a sampling clock of the device.

23. The device of claim 22, wherein the first packet is a downlink (DL) packet and the second packet is an uplink (UL) packet, the device further including means for applying CSD to a high-efficiency (HE) long training field (LTF) of the UL packet.

24. The device of claim 22, wherein the first packet is a downlink (DL) packet and the second packet is an uplink (UL) packet, and wherein at least one of the DL packet and the UL packet includes a null data packet ( DP) sounding packet.

25. The device of claim 22, further including:

means for estimating a time delay between the FFT clock boundary of the first packet and a ToA of the first packet; and

means for determining the CSD based on the time delay.