WO2018044258A1 - Method and apparatus to avoid putting length indicator for same length service data units in radio link control protocol data unit - Google Patents

Abstract

An apparatus for a wireless communication device includes a memory device to store a plurality of radio link control (RLC) service data units (SDUs) and one or more baseband processors to encode an RLC protocol data unit (PDU) including a data field and a PDU header. To encode the RLC PDU the one or more baseband processors are configured to map the plurality of RLC SDUs to the data field and for each group of one or more consecutive RLC SDUs mapped to the data field having a same number of bytes, format the PDU header to include a number field followed by a length indicator (LI) field, wherein the number field indicates the number of consecutive RLC SDUs with the same number of bytes and the LI field indicates the number of bytes of each of the consecutive RLC SDUs with the same number of bytes.

Description

METHOD AND APPARATUS TO AVOID PUTTING LENGTH INDICATOR FOR SAME LENGTH SERVICE DATA UNITS IN RADIO LINK CONTROL PROTOCOL

DATA UNIT

Technical Field

[0001] The present disclosure relates to a radio link control (RLC) protocol data unit (PDU). In particular, the present disclosure relates to an RLC PDU with a header that includes a value indicating a number of consecutive one or more service data units (SDUs) with identical lengths followed by a length indicator (LI) indicating the length of the one or more SDUs with identical length.

Background

[0002] Wireless mobile communication technology uses various standards and protocols to transmit data between a base station and a wireless mobile device. Wireless communication system standards and protocols can include the 3rd

Generation Partnership Project (3GPP) long term evolution (LTE); the Institute of Electrical and Electronics Engineers (IEEE) 802.16 standard, which is commonly known to industry groups as worldwide interoperability for microwave access

(WiMAX); and the IEEE 802.1 1 standard for wireless local area networks (WLAN), which is commonly known to industry groups as Wi-Fi. In 3GPP radio access networks (RANs) in LTE systems, the base station can include a RAN node such as an Evolved Universal Terrestrial Radio Access Network (E-UTRAN) Node B (also commonly denoted as evolved Node B, enhanced Node B, eNodeB, or eNB) and/or Radio Network Controller (RNC) in an E-UTRAN, which communicate with a wireless communication device, known as user equipment (UE).

[0003] RANs use a radio access technology (RAT) to communicate between the RAN node and UE. RANs can include global system for mobile communications (GSM), enhanced data rates for GSM evolution (EDGE) RAN (GERAN), Universal Terrestrial Radio Access Network (UTRAN), and/or E-UTRAN, which provide access to communication services through a core network. Each of the RANs operates according to a specific 3GPP RAT. For example, the GERAN implements GSM and/or EDGE RAT, the UTRAN implements universal mobile telecommunication system (UMTS) RAT or other 3GPP RAT, and the E-UTRAN implements LTE RAT.

[0004] A core network can be connected to the UE through the RAN node. The core network can include a serving gateway (SGW), a packet data network (PDN) gateway (PGW), an access network detection and selection function (ANDSF) server, an enhanced packet data gateway (ePDG) and/or a mobility management entity (MME).

Brief Description of the Drawings

[0005] FIG. 1 is a block diagram illustrating an RLC sublayer configured according to certain embodiments.

[0006] FIG. 2 is a block diagram illustrating a conventional RLC PDU header.

[0007] FIG. 3 is a block diagram illustrating an RLC PDU header according to one embodiment.

[0008] FIG. 4 is a block diagram illustrating another RLC PDU header according to one embodiment.

[0009] FIG. 5 is a block diagram illustrating electronic device circuitry that may be eNodeB circuitry, user equipment (UE) circuitry, network node circuitry, or some other type of circuitry according to one embodiment.

[0010] FIG. 6 is a flow chart illustrating a method according to some

embodiments.

[0011] FIG. 7 is a flow chart illustrating a method according to some

embodiments.

[0012] FIG. 8 is a block diagram illustrating components according to some embodiments.

Detailed Description of Preferred Embodiments

[0013] A detailed description of systems and methods consistent with

embodiments of the present disclosure is provided below. While several

embodiments are described, it should be understood that the disclosure is not limited to any one embodiment, but instead encompasses numerous alternatives, modifications, and equivalents. In addition, while numerous specific details are set forth in the following description to provide a thorough understanding of the embodiments disclosed herein, some embodiments can be practiced without some or all of these details. Moreover, for the purpose of clarity, certain technical material that is known in the related art has not been described in detail to avoid

unnecessarily obscuring the disclosure.

[0014] Techniques, apparatus and methods are disclosed that enable a header of an RLC PDU to include a number field and LI field set to indicate the number of SDUs with identical lengths and the length of those SDUs. [0015] A common goal in cellular wireless networks (such as 3GPP networks) includes efficient use of licensed bandwidth. The 3GPP standard includes a radio interface protocol stack that includes three layers. The second communication protocol layer of the stack is divided into four main communication protocol sublayers; namely, Broadcast Multicast Control (BMC), Packet Data Convergence Protocol (PDCP), Radio Link Control (RLC), and Medium Access Control (MAC). A primary function of the RLC sublayer is to segment and / or concatenate RLC Service Data Units (SDUs) originating in the upper layers into RLC Protocol Data Units (PDUs) for delivery to the MAC sublayer. The RLC sublayer also reassembles RLC PDUs from the MAC sublayer into RLC SDUs for delivery to the upper layers.

[0016] FIG. 1 illustrates an RLC sublayer configured according to certain embodiments described herein. The RLC sublayer includes an RLC entity 102 including buffers 104 and processing circuitry 106. The RLC entity 102 segments RLC SDUs originating in an upper layer 108 into fixed length RLC PDUs to send to a lower layer 1 10. The RLC entity 102 also reassembles received RLC PDUs from the lower layer 1 10 for delivery to the upper layer 108. The RLC entity 102 can be configured at the UE or the RAN node. For an RLC entity configured at the RAN node, for example, there is a peer RLC entity configured at the UE and vice versa. As another example, for an RLC entity configured at a transmitting UE for sidelink communication, there is a peer RLC entity configured at one or more receiving UE. If the RLC entity 102 receives RLC SDUs from the upper layer 108, the RLC entity 102 receives the RLC SDUs through a service access point (SAP) between the RLC entity 102 and the upper layer 108. After forming the RLC PDUs, the RLC entity 102 delivers the RLC PDUs to the lower layer 1 10 through a single logical channel. If the RLC entity 102 receives RLC PDUs from the lower layer 1 10 through the single logical channel, the RLC entity 102 delivers the RLC PDUs to the upper layer 108 through the SAP.

[0017] The RLC sublayer includes three operational modes; namely, the

Transparent Mode (TM), the Unacknowledged Mode (UM), and the Acknowledged Mode (AM). In TM, ERLC does not segment or concatenate RLC SDUs. In UM, the functions of in-sequence delivery and missing RLC PDU detection are added to the base functions. AM, which is the most sophisticated mode, additionally implements an Automated Repeat Request (ARQ) mechanism to support retransmissions of lost or erroneous RLC PDUs. A TM RLC entity may be configured as a transmitting TM RLC entity or a receiving TM RLC entity. A UM RLC entity may also be configured as a transmitting UM RLC entity or a receiving UM RLC entity. An AM RLC entity, however, consists of a transmitting side and a receiving side.

[0018] A TM RLC PDU does not include a header. Conventional UM or AM RLC PDUs 200 include a header. Header 202 is an example AM RLC PDU consisting of a fixed part and an extension part, as shown in FIG. 2. For illustrative purposes, octets (eight bits or one byte) are shown as Oct 1 , Oct 2, ... , Oct X. The fixed part of the header 202 is byte aligned and includes a data/control (D/C) field 204, a re- segmentation flag (RF) field 206, a polling (P) field 208, a frame indicator (Fl) field 210, an extension (E) field 212, and a sequence number (SN) field 214. In a conventional UM RLC PDU header, data/control (D/C) field 204, a re-segmentation flag (RF) field 206, a polling (P) field 208 are not applicable and are reserved. The extension part of the header 202 is also byte aligned and includes a plurality of E fields 216 and length indicator (LI) fields 218. The extension part of the header 202 is included when more than one SDU is present in the RLC PDU 200. An E field 216 and an LI field 218 are provided for each SDU.

[0019] Each LI field 218 indicates the number of bytes of each SDU following the header 202. Each E field 216 leading the LI field 218 is a single bit and indicates whether another set of the E field 216 and the LI field 218 will follow or whether a data field 220 will follow an octet following the LI field 218 following the current E field 216. For example, if the E field 216 has a value of 0, then a data field 220 will follow the octet after the LI field 218 following the E field 216 with the value of 0. Padding 222 may be used if the E field 216 and the LI field 218 do not fill the octet. If the E field 216 has a value of 1 , then another set of the E field 216 and the LI field 218 will follow the LI field 218 following the E field 216 with a value of 1.

[0020] In FIG. 2, an E field 216 and an LI field 218 are provided for every SDU in the data field 220 of the RLC PDU 200. This results in a large number of bytes of the RLC PDU 200 being used to indicate the length of each SDU in the data field 220. In FIG. 2, a K number of SDUs are provided in the RLC PDU 200, so a K number of E field 216 and LI field 218 sets are also provided.

[0021] Often, the SDUs of the RLC PDU 200 remain the same size for most applications. When most of the SDUs are the same size, sending an LI in the LI field 218 for each SDU unnecessarily increases the size of the RLC PDU 200. Avoiding sending each of the LI fields 218 for each of the SDUs with the same size will save a significant number of bytes and ensure more efficient usage of bandwidth and reduced processing.

[0022] FIG. 3 illustrates a header 302 of an RLC PDU 300 according to

embodiments of the disclosed technology. The header 302 also includes the D/C field 204, the RF field 206, the P field 208, the Fl field 210, the E field 212, and the SN field 214 in the first and second octet. Rather than having the sets of E fields 216 followed by LI fields 218, the header 302 includes at least one number (N) field 304 followed by an LI field 306. The N field 304 corresponds to the number of sequential or consecutive SDUs present in the RLC PDU 300 with the same length. The length of these SDUs is indicated by a single LI field 306 following the N field 304. A final N field 308 with a value of zero follows the last LI field 306 to indicate that the data field 220 with the SDUs follows from the octet following the N field 308. The N field 308 is followed by the padding 222, if needed, and the data field 220 begins in the next octet.

[0023] The N fields 304, 308 may be, for example, 3 bits. This allows the N field 304 to indicate up to 7 consecutive SDUs with the same length. However, the N fields 304, 308 are not limited to 3 bits and may be more or less bits.

[0024] FIG. 4 shows an example header 402 for an RLC PDU 400 that is transmitting eleven SDUs having the following lengths: 1500, 1500, 1500, 1500, 1500, 1500, 51 , 42, 70, 75, and 77. Similar to FIGS. 2 and 3, the header 402 includes the D/C field 204, the RF field 206, the P field 208, the Fl field 210, the E field 212, and the SN field 214 in the first and second octets. An N field 404 includes 3 bits indicating a value of six because there are six consecutive SDUs each having 1500 bytes. An LI field 406 following the N field 404 indicates a length of 1500 bytes. Since none of the remaining SDUs have the same length, the remaining N values for each LI field will be set to 1 . For example, a next N field 408 has a value of 1 and is followed by an LI field 410 indicating 51 bytes for the next SDU. These N field and LI field sets continue until an LI has been provided for the remaining four SDUs. Following a last LI field 412 is another N field 414 with a value of 0 to indicate that the SDUs will follow in the data field 220 in the next octet. As with FIGS. 1 and 2, the padding 222 may be provided, if needed, in the octet before the data field 220.

[0025] Suppose in the example of FIG. 4 that the data rate is 300 Mbps and the maximum transmission unit (MTU) is 1500 bytes per SDU. Then the number of bits saved per millisecond is 220 resulting in a higher data rate with more efficient usage of available bandwidth.

[0026] FIG. 5 is a block diagram illustrating components, according to some example embodiments, able to read instructions from a machine-readable or computer-readable medium (e.g., a machine-readable storage medium) and perform any one or more of the methodologies discussed herein. Specifically, FIG. 5 shows a diagrammatic representation of hardware resources 500 including one or more processors (or processor cores) 510, one or more memory/storage devices 520, and one or more communication resources 530, all of which are communicatively coupled via a bus 540.

[0027] The processors 510 (e.g., a central processing unit (CPU), a reduced instruction set computing (RISC) processor, a complex instruction set computing (CISC) processor, a graphics processing unit (GPU), a digital signal processor (DSP) such as a baseband processor, an application specific integrated circuit (ASIC), a radio-frequency integrated circuit (RFIC), another processor, or any suitable combination thereof) may include, for example, a processor 512 and a processor 514. The memory/storage devices 520 may include main memory, disk storage, or any suitable combination thereof.

[0028] The communication resources 530 may include interconnection and/or network interface components or other suitable devices to communicate with one or more peripheral devices 504 and/or one or more databases 506 via a network 508. For example, the communication resources 530 may include wired communication components (e.g., for coupling via a Universal Serial Bus (USB)), cellular

communication components, Near Field Communication (NFC) components,

Bluetooth® components (e.g., Bluetooth® Low Energy), Wi-Fi® components, and other communication components.

[0029] Instructions 550 may comprise software, a program, an application, an applet, an app, or other executable code for causing at least any of the processors 510 to perform any one or more of the methodologies discussed herein. The instructions 550 may reside, completely or partially, within at least one of the processors 510 (e.g., within the processor's cache memory), the memory/storage devices 520, or any suitable combination thereof. Furthermore, any portion of the instructions 550 may be transferred to the hardware resources 500 from any combination of the peripheral devices 504 and/or the databases 506. Accordingly, the memory of the processors 510, the memory/storage devices 520, the peripheral devices 504, and the databases 506 are examples of computer-readable and machine-readable media.

[0030] Returning to FIG. 1 , the RLC entity 102 may be, or may be incorporated into or otherwise a part of, an eNB, a UE, a network node, or some other type of electronic device. In some embodiments, the buffers 104 store the plurality of RLC SDUs. The processing circuitry 106 encodes the RLC PDU including a data field and a header. To encode the RLC PDU, the processing circuitry 106 maps the plurality of RLC SDUs to the data field. For each group of one or more consecutive RLC SDUs mapped to the data field having a same number of bytes, the processing circuitry 106 formats the PDU header to include a number field followed by an LI field. As discussed in detail above, the number field indicates the number of consecutive RLC SDUs with the same number of bytes, and the LI field indicates the number of bytes of each of the consecutive RLC SDUs with the same number of bytes.

[0031] In some embodiments, the processing circuitry 106 decodes a header of an RLC PDU to obtain the N fields and LI fields, and decodes the data field based on the N fields and the LI fields in the header to obtain RLC SDUs. The buffers 104 may store the decoded RLC SDUs to deliver to the upper layer 108 of a

communication protocol.

[0032] In certain embodiments, the RLC entity is operable to perform one or more methods, such as the methods shown in FIGS. 6 and 7 or any of the other embodiments disclosed herein. FIG. 6 is a flowchart of a method 600 for encoding an RLC PDU with a data field and a header using the N field and LI field sets for the SDUs. The method 600 may be performed by the RLC entity 102 in a UE or a RAN node. The method 600 includes storing 610 a plurality of RLC SDUs in the buffers 104. The method also includes mapping 612 the plurality of RLC SDUs to the data field of the RLC PDU. The method further includes determining 614 the length of the RLC SDUs and formatting 616 a header to include an N field followed by an LI field for each of one or more consecutive RLC SDUs with the same number of bytes.

[0033] FIG. 7 is a flowchart of a method 700 of decoding a received RLC PDU with a data field and a header. The method 700 includes decoding 710 a header of an RLC PDU to obtain one or more sets of data comprising an N field and an LI field. The method further includes decoding 712 the data field of the RLC PDU based on the one or more sets of data comprising the N field and the LI field to obtain decoded RLC SDUs and storing 714 the plurality of RLC SDUs for delivery to the upper layer 108.

[0034] As used herein, the term "circuitry" may refer to, be part of, or include an Application Specific Integrated Circuit (ASIC), an electronic circuit, a processor (shared, dedicated, or group), and/or memory (shared, dedicated, or group) that execute one or more software or firmware programs, a combinational logic circuit, and/or other suitable hardware components that provide the described functionality. In some embodiments, the circuitry may be implemented in, or functions associated with the circuitry may be implemented by, one or more software or firmware modules. In some embodiments, circuitry may include logic, at least partially operable in hardware.

[0035] Embodiments described herein may be implemented into a system using any suitably configured hardware and/or software. FIG. 8 is a block diagram illustrating, for one embodiment, example components of a user equipment (UE) or RAN node device 800. In some embodiments, the device 800 may include application circuitry 802, baseband circuitry 804, radio frequency (RF) circuitry 806, front-end module (FEM) circuitry 808, and one or more antennas 810, coupled together at least as shown in FIG. 8.

[0036] The application circuitry 802 may include one or more application processors. By way of non-limiting example, the application circuitry 802 may include one or more single-core or multi-core processors. The processor(s) may include any combination of general-purpose processors and dedicated processors (e.g., graphics processors, application processors, etc.). The processor(s) may be operably coupled and/or include memory/storage, and may be configured to execute instructions stored in the memory/storage to enable various applications

and/or operating systems to run on the system.

[0037] By way of non-limiting example, the baseband circuitry 804 may include one or more single-core or multi-core processors. The baseband circuitry 804 may include one or more baseband processors and/or control logic. The baseband circuitry 804 may be configured to process baseband signals received from a receive signal path of the RF circuitry 806. The baseband circuitry 804 may also be configured to generate baseband signals for a transmit signal path of the RF circuitry 806. The baseband circuitry 804 may interface with the application circuitry 802 for generation and processing of the baseband signals, and for controlling operations of the RF circuitry 806.

[0038] By way of non-limiting example, the baseband circuitry 804 may include at least one of a second generation (2G) baseband processor 804A, a third generation (3G) baseband processor 804B, a fourth generation (4G) baseband processor 804C, a fifth generation (5G) baseband processor 804D, and other baseband processor(s) 804E for other existing generations, and generations in development or to be developed in the future (e.g., sixth generation (6G), etc.). The baseband circuitry 804 (e.g., at least one of the baseband processors 804A-804E) may handle various radio control functions that enable communication with one or more radio networks via the RF circuitry 806. By way of non-limiting example, the radio control

functions may include signal modulation/demodulation, encoding/decoding, radio frequency shifting, other functions, and combinations thereof. In some

embodiments, modulation/demodulation circuitry of the baseband circuitry 804 may be programmed to perform Fast-Fourier Transform (FFT), precoding, constellation mapping/demapping functions, other functions, and combinations thereof. In some embodiments, encoding/decoding circuitry of the baseband circuitry 804 may be programmed to perform convolutions, tail-biting convolutions, turbo, Viterbi, Low Density Parity Check (LDPC) encoder/decoder functions, other functions, and combinations thereof. Embodiments of modulation/demodulation and

encoder/decoder functions are not limited to these examples, and may include other suitable functions.

[0039] In some embodiments, the baseband circuitry 804 may include elements of a protocol stack. By way of non-limiting example, elements of an evolved universal terrestrial radio access network (EUTRAN) protocol may include, for example, physical (PHY), media access control (MAC), radio link control (RLC), packet data convergence protocol (PDCP), and/or radio resource control (RRC) elements. A central processing unit (CPU) 804F of the baseband circuitry 804 may be programmed to run elements of the protocol stack for signaling of the PHY, MAC, RLC, PDCP and/or RRC layers. In some embodiments, the baseband circuitry 804 may include one or more audio digital signal processor(s) (DSP) 804G. The audio DSP(s) 804G may include elements for compression/decompression and echo cancellation. The audio DSP(s) 804G may also include other suitable processing elements. [0040] The baseband circuitry 804 may further include memory/storage 804H. The memory/storage 804H may include data and/or instructions for operations performed by the processors of the baseband circuitry 804 stored thereon. In some embodiments, the memory/storage 804H may include any combination of suitable volatile memory and/or non-volatile memory. The memory/storage 804H may also include any combination of various levels of memory/storage including, but not limited to, read-only memory (ROM) having embedded software instructions (e.g., firmware), random access memory (e.g., dynamic random access memory (DRAM)), cache, buffers, etc. In some embodiments, the memory/storage 804H may be shared among the various processors or dedicated to particular processors.

[0041] Components of the baseband circuitry 804 may be suitably combined in a single chip or a single chipset or disposed on a same circuit board in some embodiments. In some embodiments, some or all of the constituent components of the baseband circuitry 804 and the application circuitry 802 may be

implemented together, such as, for example, on a system on a chip (SOC).

[0042] In some embodiments, the baseband circuitry 804 may provide for communication compatible with one or more radio technologies. For example, in some embodiments, the baseband circuitry 804 may support communication with an evolved universal terrestrial radio access network (EUTRAN) and/or other wireless metropolitan area networks (WMAN), a wireless local area network (WLAN), or a wireless personal area network (WPAN). Embodiments in which the baseband circuitry 804 is configured to support radio communications of more than one wireless protocol may be referred to as multi-mode baseband circuitry.

[0043] The RF circuitry 806 may enable communication with wireless networks using modulated electromagnetic radiation through a non-solid medium. In various embodiments, the RF circuitry 806 may include switches, filters, amplifiers, etc., to facilitate the communication with the wireless network. The RF circuitry 806 may include a receive signal path, which may include circuitry to down-convert RF signals received from the FEM circuitry 808, and provide baseband signals to the baseband circuitry 804. The RF circuitry 806 may also include a transmit signal path, which may include circuitry to up-convert baseband signals provided by the baseband circuitry 804, and provide RF output signals to the FEM circuitry 808 for

transmission. [0044] In some embodiments, the RF circuitry 806 may include a receive signal path and a transmit signal path. The receive signal path of the RF circuitry 806 may include mixer circuitry 806A, amplifier circuitry 806B, and filter circuitry 806C. The transmit signal path of the RF circuitry 806 may include filter circuitry 806C and mixer circuitry 806A. The RF circuitry 806 may further include synthesizer circuitry 806D configured to synthesize a frequency for use by the mixer circuitry 806A of the receive signal path and the transmit signal path. In some embodiments, the mixer circuitry 806A of the receive signal path may be configured to down-convert RF signals received from the FEM circuitry 808 based on the synthesized frequency provided by the synthesizer circuitry 806D. The amplifier circuitry 806B may be configured to amplify the down-converted signals.

[0045] The filter circuitry 806C may include a low-pass filter (LPF) or band-pass filter (BPF) configured to remove unwanted signals from the down-converted signals to generate output baseband signals. Output baseband signals may be provided to the baseband circuitry 804 for further processing. In some embodiments, the output baseband signals may include zero-frequency baseband signals, although this is not a requirement. In some embodiments, the mixer circuitry 806A of the receive signal path may comprise passive mixers, although the scope of the embodiments is not limited in this respect.

[0046] In some embodiments, the mixer circuitry 806A of the transmit signal path may be configured to up-convert input baseband signals based on the synthesized frequency provided by the synthesizer circuitry 806D to generate RF output signals for the FEM circuitry 808. The baseband signals may be provided by the baseband circuitry 804 and may be filtered by the filter circuitry 806C. The filter circuitry 806C may include a low-pass filter (LPF), although the scope of the embodiments is not limited in this respect.

[0047] In some embodiments, the mixer circuitry 806A of the receive signal path and the mixer circuitry 806A of the transmit signal path may include two or more mixers, and may be arranged for quadrature downconversion and/or upconversion, respectively. In some embodiments, the mixer circuitry 806A of the receive signal path and the mixer circuitry 806A of the transmit signal path may include two or more mixers and may be arranged for image rejection (e.g., Hartley image rejection). In some embodiments, the mixer circuitry 806A of the receive signal path and the mixer circuitry 806A of the transmit signal path may be arranged for direct downconversion and/or direct upconversion, respectively. In some embodiments, the mixer circuitry 806A of the receive signal path and the mixer circuitry 806A of the transmit signal path may be configured for super-heterodyne operation.

[0048] In some embodiments, the output baseband signals and the input baseband signals may be analog baseband signals, although the scope of the embodiments is not limited in this respect. In some alternative embodiments, the output baseband signals and the input baseband signals may be digital baseband signals. In such embodiments, the RF circuitry 806 may include analog-to-digital converter (ADC) and digital-to-analog converter (DAC) circuitry, and the baseband circuitry 804 may include a digital baseband interface to communicate with the RF circuitry 806.

[0049] In some dual-mode embodiments, separate radio IC circuitry may be provided for processing signals for each spectrum, although the scope of the embodiments is not limited in this respect.

[0050] In some embodiments, the synthesizer circuitry 806D may include one or more of a fractional-N synthesizer and a fractional N/N+1 synthesizer, although the scope of the embodiments is not limited in this respect as other types of frequency synthesizers may be suitable. For example, the synthesizer circuitry 806D may include a delta-sigma synthesizer, a frequency multiplier, a synthesizer comprising a phase-locked loop with a frequency divider, other synthesizers and combinations thereof.

[0051] The synthesizer circuitry 806D may be configured to synthesize an output frequency for use by the mixer circuitry 806A of the RF circuitry 806 based on a frequency input and a divider control input. In some embodiments, the synthesizer circuitry 806D may be a fractional N/N+1 synthesizer.

[0052] In some embodiments, frequency input may be provided by a voltage controlled oscillator (VCO), although that is not a requirement. Divider control input may be provided by either the baseband circuitry 804 or the applications circuitry 802 depending on the desired output frequency. In some embodiments, a divider control input (e.g., N) may be determined from a look-up table based on a channel indicated by the applications circuitry 802.

[0053] The synthesizer circuitry 806D of the RF circuitry 806 may include a divider, a delay-locked loop (DLL), a multiplexer and a phase accumulator. In some embodiments, the divider may include a dual modulus divider (DMD), and the phase accumulator may include a digital phase accumulator (DPA). In some embodiments, the DMD may be configured to divide the input signal by either N or N+1 (e.g., based on a carry out) to provide a fractional division ratio. In some example embodiments, the DLL may include a set of cascaded, tunable, delay elements, a phase detector, a charge pump and a D-type flip-flop. In such embodiments, the delay elements may be configured to break a VCO period up into Nd equal packets of phase, where Nd is the number of delay elements in the delay line. In this way, the DLL may provide negative feedback to help ensure that the total delay through the delay line is one VCO cycle.

[0054] In some embodiments, the synthesizer circuitry 806D may be configured to generate a carrier frequency as the output frequency. In some embodiments, the output frequency may be a multiple of the carrier frequency (e.g., twice the carrier frequency, four times the carrier frequency, etc.) and used in conjunction with a quadrature generator and divider circuitry to generate multiple signals at the carrier frequency with multiple different phases with respect to each other. In some embodiments, the output frequency may be a LO frequency (fLO). In some embodiments, the RF circuitry 806 may include an IQ/polar converter.

[0055] The FEM circuitry 808 may include a receive signal path which may include circuitry configured to operate on RF signals received from one or more antennas 810, amplify the received signals, and provide the amplified versions of the received signals to the RF circuitry 806 for further processing. The FEM circuitry 808 may also include a transmit signal path which may include circuitry configured to amplify signals for transmission provided by the RF circuitry 806 for transmission by at least one of the one or more antennas 810.

[0056] In some embodiments, the FEM circuitry 808 may include a TX/RX switch configured to switch between a transmit mode and a receive mode operation. The FEM circuitry 808 may include a receive signal path and a transmit signal path. The receive signal path of the FEM circuitry 808 may include a low-noise amplifier (LNA) to amplify received RF signals and provide the amplified received RF signals as an output (e.g., to the RF circuitry 806). The transmit signal path of the FEM circuitry 808 may include a power amplifier (PA) configured to amplify input RF signals (e.g., provided by RF circuitry 806), and one or more filters configured to generate RF signals for subsequent transmission (e.g., by one or more of the one or more antennas 810). [0057] In some embodiments, the device 800 may include additional elements such as, for example, memory/storage, a display, a camera, one of more sensors, an input/output (I/O) interface, other elements, and combinations thereof.

[0058] In some embodiments, the device 800 may be configured to perform one or more processes, techniques, and/or methods as described herein, or portions thereof.

Example Embodiments

[0059] Example 1 is an apparatus for a wireless communication device. The apparatus includes a memory device to store a variety of radio link control (RLC) service data units (SDUs). The apparatus also includes one or more baseband processors to encode an RLC protocol data unit (PDU) including a data field and a PDU header, where to encode the RLC PDU the one or more baseband processors are designed to: map the variety of RLC SDUs to the data field. The one or more baseband processors are also designed for each group of one or more consecutive RLC SDUs mapped to the data field having a same number of bytes, format the RLC PDU header to include a number (N) field followed by a length indicator (LI) field, where the number (N) field indicates the number of consecutive RLC SDUs with the same number of bytes and the LI field indicates the number of bytes of each of the consecutive RLC SDUs with the same number of bytes.

[0060] Example 2 is the apparatus of Example 1 , further including circuitry to provide the RLC PDU through a logical channel to a lower layer of a communication protocol.

[0061] Example 3 is the apparatus of Example 1 , further including circuitry to receive the RLC SDUs through a service access point (SAP) from an upper layer of a communication protocol.

[0062] Example 4 is the apparatus of Example 1 , where the one or more baseband processors are further designed to provide the RLC PDU to radio frequency (RF) circuitry.

[0063] Example 5 is the apparatus of Example 1 , where the variety of RLC SDUs includes user data received from application circuitry.

[0064] Example 6 is the apparatus of any of Examples 1 -5, where to encode the RLC PDU the one or more baseband processors are further designed to include a final number field in the header with a value of 0 following a final LI field to indicate the variety of RLC SDUs follows the final number field. [0065] Example 7 is the apparatus of any of Examples 1 -5, where the wireless communication device includes at least part of a user equipment (UE).

[0066] Example 8 is the apparatus of any of Examples 1 -5, where the wireless communication device includes at least part of a radio access network (RAN) node.

[0067] Example 9 is the apparatus of any of Examples 1 -5, where the number field is 3 bits.

[0068] Example 10 is a computer-readable storage medium. The storage meduim includes computer-readable instructions stored thereon. The computer- readable instructions are designed to instruct at least one processor to decode a header of a radio link control (RLC) protocol data unit (PDU) to obtain one or more sets of data including a number field and a length field, where the number field indicates a number of consecutive RLC service data units (SDUs) of a same length in a data field of the RLC PDU, and where the length field indicates a length of each of the consecutive RLC SDUs corresponding to the number field. The computer- readable instructions are also designed to instruct at least one processor to decode the data field of the RLC PDU based on the number field and the length field in each of the one or more sets of data to obtain a variety of decoded RLC SDUs, and store the variety of decoded RLC SDUs to deliver to an upper layer of a communication protocol.

[0069] Example 1 1 is the computer-readable storage medium of Example 10, further including circuitry to send the variety of decoded RLC SDUs through a service access point (SAP) to the upper layer of the communication protocol.

[0070] Example 12 is the computer-readable storage medium of Example 10, further including circuitry to receive the RLC PDU through a logical channel from a lower layer of the communication protocol.

[0071] Example 13 is the computer-readable storage medium of any of Examples 10-12, where a final number field in the header with a value of 0 following a final length field is included to indicate a variety of RLC SDUs follows the final number field.

[0072] Example 14 is the computer-readable storage medium of any of Examples 10-12, where the at least one processor is included in a user equipment (UE).

[0073] Example 15 is the computer-readable storage medium of any of Examples 10-12, where the at least one processor is included in a radio access network (RAN) node. [0074] Example 16 is a radio link control (RLC) entity for a wireless communication protocol. The (RLC) entity includes one or more buffers to store service data units (SDUs) of variable sizes received from or to deliver to an upper layer of the wireless communication protocol, and to store protocol data units (PDUs) received from or to send to a lower layer of the wireless communication protocol. The (RLC) entity also includes processing circuitry to encode or decode the PDUs based on one or more groups of consecutive SDUs of a same length, where each PDU includes a number (N) field and a corresponding length indicator (LI) field for each of the one or more groups.

[0075] Example 17 is the RLC entity of Example 16, further including circuitry to send the variety of RLC SDUs through a service access point (SAP) to the upper layer of the wireless communication protocol.

[0076] Example 18 is the RLC entity of Example 17, further including circuitry to receive the RLC PDU through a logical channel from the lower layer of the wireless communication protocol.

[0077] Example 19 is the RLC entity of any of Examples 16-18, where the LI field indicates the length in bytes of each of the consecutive SDUs in a corresponding group.

[0078] Example 20 is the RLC entity of any of Examples 16-18, where the RLC entity includes at least part of a user equipment (UE).

[0079] Example 21 is the RLC entity of any of Examples 16-18, where the RLC entity includes at least part of a radio access network (RAN) node.

[0080] Example 22 is a method of encoding a radio link control (RLC) protocol data unit (PDU). The method includes mapping a variety of RLC service data units (SDUs) to a data field of the RLC PDU. The method also includes determining a length of each of the RLC SDUs, and formatting a header of the RLC PDU to includes a number field followed by a length indicator (LI) field for each group of one or more consecutive RLC SDUs with the same number of bytes, where the number field indicates the number of consecutive RLC SDUs with the same number of bytes and the LI field indicates the number of bytes of each of the consecutive RLC SDUs with the same number of bytes.

[0081] Example 23 is the method of Example 22, further including receiving the variety of RLC SDUs through a service access point (SAP) from an upper layer of a communication protocol. [0082] Example 24 is the method of Example 22, further including sending the RLC PDU through a logical channel to a lower layer of a communication protocol.

[0083] Example 25 is the method of Example 22, further including providing the RLC PDU to radio frequency (RF) circuitry.

[0084] Example 26 is the method of Example 22, where the variety of RLC SDUs includes user data received from application circuitry.

[0085] Example 27 is the method of any of Examples 22-26, where formatting the header further includes including a final number field in the header with a value of 0 following a final LI field to indicate the variety of RLC SDUs follows the final number field.

[0086] Example 28 is the method of any of Examples 22-26, where the wireless communication device includes at least part of a user equipment (UE).

[0087] Example 29 is the method of any of Examples 22-26, where the wireless communication device includes at least part of a radio access network (RAN) node.

[0088] Example 30 is the method of any of Examples 22-26, where the number field is 3 bits.

[0089] Example 31 is a computer-readable storage medium including computer- readable instructions stored thereon, the computer-readable instructions designed to instruct at least one processor to perform the method of any of Examples 21 -26.

[0090] Example 32 is an apparatus for a wireless communication device. The apparatus includes a method for storing a variety of radio link control (RLC) service data units (SDUs). The apparatus includes a method for encoding an RLC protocol data unit (PDU) including a data field and a PDU header, where the method for encoding includes a method for mapping the variety of RLC SDUs to the data field. The method for encoding includes a method for each group of one or more consecutive RLC SDUs mapped to the data field having a same number of bytes, methods for formatting the RLC PDU header to include a number (N) field followed by a length indicator (LI) field, where the number (N) field indicates the number of consecutive RLC SDUs with the same number of bytes and the LI field indicates the number of bytes of each of the consecutive RLC SDUs with the same number of bytes.

[0091] Example 33 is the apparatus of Example 32, further including methods for providing the RLC PDU through a logical channel to a lower layer of a

communication protocol. [0092] Example 34 is the apparatus of Example 32, further including methods for receiving the RLC SDUs through a service access point (SAP) from an upper layer of a communication protocol.

[0093] Example 35 is the apparatus of Example 32, where the one or more baseband processors are further designed to provide the RLC PDU to radio frequency (RF) circuitry.

[0094] Example 36 is the apparatus of Example 32, where the variety of RLC SDUs includes user data received from application circuitry.

[0095] Example 37 is the apparatus of any of Examples 32-36, where to encode the RLC PDU the methods for encoding are further designed to include a final number field in the header with a value of 0 following a final LI field to indicate the variety of RLC SDUs follows the final number field.

[0096] Example 38 is the apparatus of any of Examples 32-36, where the wireless communication device includes at least part of a user equipment (UE).

[0097] Example 39 is the apparatus of any of Examples 32-36, where the wireless communication device includes at least part of a radio access network (RAN) node.

[0098] Example 40 is the apparatus of any of Examples 32-36, where the number field is 3 bits.

[0099] Example 41 is an apparatus for a wireless communication device. The apparatus includes methods decoding a header of a radio link control (RLC) protocol data unit (PDU) to obtain one or more sets of data including a number field and a length field, where the number field indicates a number of consecutive RLC service data units (SDUs) of a same length in a data field of the RLC PDU, and where the length field indicates a length of each of the consecutive RLC SDUs corresponding to the number field. The apparatus includes methods for decoding the data field of the RLC PDU based on the number field and the length field in each of the one or more sets of data to obtain a variety of decoded RLC SDUs. The apparatus further includes methods for storing the variety of decoded RLC SDUs to deliver to an upper layer of a communication protocol.

[0100] Example 42 is the apparatus of Example 41 , further including methods for sending the variety of decoded RLC SDUs through a service access point (SAP) to the upper layer of the communication protocol. [0101] Example 43 is the apparatus of Example 41 , further including methods for receiving the RLC PDU through a logical channel from a lower layer of the communication protocol.

[0102] Example 44 is the apparatus of any of Examples 41 -43, where a final number field in the header with a value of 0 following a final length field is included to indicate a variety of RLC SDUs follows the final number field.

[0103] Example 45 is the apparatus of any of Examples 41 -43, where the apparatus is included in a user equipment (UE).

[0104] Example 46 is the apparatus of any of Examples 41 -43, where the apparatus is included in a radio access network (RAN) node.

[0105] Example 47 is a method of decoding a radio link control (RLC) protocol data unit (PDU) in a wireless communication device. The method includes decoding a header of a radio link control (RLC) protocol data unit (PDU) to obtain one or more sets of data including a number field and a length field, where the number field indicates a number of consecutive RLC service data units (SDUs) of a same length in a data field of the RLC PDU, and where the length field indicates a length of each of the consecutive RLC SDUs corresponding to the number field. The method includes decoding the data field of the RLC PDU based on the number field and the length field in each of the one or more sets of data to obtain a variety of decoded RLC SDUs. The method further includes storing the variety of decoded RLC SDUs to deliver to an upper layer of a communication protocol.

[0106] Example 48 is the method of Example 47, further including sending the variety of decoded RLC SDUs through a service access point (SAP) to the upper layer of the communication protocol.

[0107] Example 49 is the method of Example 47, further including receiving the RLC PDU through a logical channel from a lower layer of the communication protocol.

[0108] Example 50 is the method of any of Examples 47-49, where a final number field in the header with a value of 0 following a final length field is included to indicate a variety of RLC SDUs follows the final number field.

[0109] Example 51 is the method of any of Examples 47-49, where the wireless communication device is included in a user equipment (UE).

[0110] Example 52 is the method of any of Examples 47-49, where the wireless communication device is included in a radio access network (RAN) node. [0111] Example 53 is an apparatus for a wireless communication device. The apparatus includes one or more baseband processors to decode an RLC protocol data unit (PDU) including a data field and a PDU header, where to decode the RLC PDU the one or more baseband processors are designed to decode a header of a radio link control (RLC) protocol data unit (PDU) to obtain one or more sets of data including a number field and a length field, where the number field indicates a number of consecutive RLC service data units (SDUs) of a same length in a data field of the RLC PDU, and where the length field indicates a length of each of the consecutive RLC SDUs corresponding to the number field. The one or more baseband processors are also designed to decode the data field of the RLC PDU based on the number field and the length field in each of the one or more sets of data to obtain a variety of decoded RLC SDUs, and a memory device to store the variety of decoded RLC SDUs to deliver to an upper layer of a communication protocol.

[0112] Example 54 is the apparatus of Example 53, further including circuitry to send the variety of decoded RLC SDUs through a service access point (SAP) to the upper layer of the communication protocol.

[0113] Example 55 is the apparatus of Example 53, further including circuitry to receive the RLC PDU through a logical channel from a lower layer of the communication protocol.

[0114] Example 56 is the apparatus of any of Examples 53-55, where a final number field in the header with a value of 0 following a final length field is included to indicate a variety of RLC SDUs follows the final number field.

[0115] Example 57 is the apparatus of any of Examples 53-55, where the apparatus is included in a user equipment (UE).

[0116] Example 58 is the apparatus of any of Examples 53-55, where the apparatus is included in a radio access network (RAN) node.

[0117] Example 59 is a radio link control (RLC) entity for a wireless communication protocol. The RLC includes methods for storing service data units (SDUs) of variable sizes received from or to deliver to an upper layer of the wireless communication protocol, and to store protocol data units (PDUs) received from or to send to a lower layer of the wireless communication protocol. The RLC also includes methods for encoding or decoding the PDUs based on one or more groups of consecutive SDUs of a same length, where each PDU includes a number (N) field and a corresponding length indicator (LI) field for each of the one or more groups.

[0118] Example 60 is the RLC entity of Example 59, further including methods for sending the variety of RLC SDUs through a service access point (SAP) to the upper layer of the wireless communication protocol.

[0119] Example 61 is the RLC entity of Example 59, further including methods for receiving the RLC PDU through a logical channel from the lower layer of the wireless communication protocol.

[0120] Example 62 is the RLC entity of any of Examples 59-61 , where the LI field indicates the length in bytes of each of the consecutive SDUs in a corresponding group.

[0121] Example 63 is the RLC entity of any of Examples 59-61 , where the RLC entity includes at least part of a user equipment (UE).

[0122] Example 64 is the RLC entity of any of Examples 59-61 , where the RLC entity includes at least part of a radio access network (RAN) node.

[0123] Example 65 is a method for a wireless communication protocol. The method includes storing service data units (SDUs) of variable sizes received from or to deliver to an upper layer of the wireless communication protocol, and to store protocol data units (PDUs) received from or to send to a lower layer of the wireless communication protocol. The method includes processing the PDUs to encode or decode based on one or more groups of consecutive SDUs of a same length, where each PDU includes a number (N) field and a corresponding length indicator (LI) field for each of the one or more groups.

[0124] Example 66 is the method of Example 65, further including sending the variety of RLC SDUs through a service access point (SAP) to the upper layer of the wireless communication protocol.

[0125] Example 67 is the method of Example 65, further including circuitry receiving the RLC PDU through a logical channel from the lower layer of the wireless communication protocol.

[0126] Example 68 is the method of any of Examples 65-67, where the LI field indicates the length in bytes of each of the consecutive SDUs in a corresponding group.

[0127] Example 69 is the method of any of Examples 65-67, where the RLC entity includes at least part of a user equipment (UE). [0128] Example 70 is the method of any of Examples 65-67, where the RLC entity includes at least part of a radio access network (RAN) node.

[0129] Example 71 is a radio link control (RLC) entity for a wireless communication protocol. The RLC includes methods for storing service data units (SDUs) of variable sizes received from or to deliver to an upper layer of the wireless communication protocol, and to store protocol data units (PDUs) received from or to send to a lower layer of the wireless communication protocol. The RLC includes methods for encoding or decoding the PDUs based on one or more groups of consecutive SDUs of a same length, where each PDU includes a number (N) field and a corresponding length indicator (LI) field for each of the one or more groups.

[0130] Example 72 is the RLC entity of Example 71 , further including methods for sending the variety of RLC SDUs through a service access point (SAP) to the upper layer of the wireless communication protocol.

[0131] Example 73 is the RLC entity of Example 71 , further including methods for receiving the RLC PDU through a logical channel from the lower layer of the wireless communication protocol.

[0132] Example 74 is the RLC entity of any of Examples 71 -73, where the LI field indicates the length in bytes of each of the consecutive SDUs in a corresponding group.

[0133] Example 75 is the RLC entity of any of Examples 71 -73, where the RLC entity includes at least part of a user equipment (UE).

[0134] Example 76 is the The RLC entity of any of Examples 71 -73, where the RLC entity includes at least part of a radio access network (RAN) node.

[0135] Some of the infrastructure that can be used with embodiments disclosed herein is already available, such as general-purpose computers, mobile phones, computer programming tools and techniques, digital storage media, and communications networks. A computing device may include a processor such as a microprocessor, microcontroller, logic circuitry, or the like. The computing device may include a computer-readable storage device such as non-volatile memory, static random access memory (RAM), dynamic RAM, read-only memory (ROM), disk, tape, magnetic, optical, flash memory, or other computer-readable storage medium.

[0136] Various aspects of certain embodiments may be implemented using hardware, software, firmware, or a combination thereof. A component or module may refer to, be part of, or include an application specific integrated circuit (ASIC), an electronic circuit, a processor (shared, dedicated, or group), and/or memory (shared, dedicated or group) that execute one or more software or firmware programs, a combinational logic circuit, and/or other suitable components that provide the described functionality. As used herein, a software module or component may include any type of computer instruction or computer executable code located within or on a non-transitory computer-readable storage medium. A software module or component may, for instance, comprise one or more physical or logical blocks of computer instructions, which may be organized as a routine, program, object, component, data structure, etc., which performs one or more tasks or implements particular abstract data types.

[0137] In certain embodiments, a particular software module or component may comprise disparate instructions stored in different locations of a computer-readable storage medium, which together implement the described functionality of the module or component. Indeed, a module or component may comprise a single instruction or many instructions, and may be distributed over several different code segments, among different programs, and across several computer-readable storage media. Some embodiments may be practiced in a distributed computing environment where tasks are performed by a remote processing device linked through a communications network.

[0138] Although the foregoing has been described in some detail for purposes of clarity, it will be apparent that certain changes and modifications may be made without departing from the principles thereof. It should be noted that there are many alternative ways of implementing both the processes and apparatuses described herein. Accordingly, the present embodiments are to be considered illustrative and not restrictive, and the disclosure is not to be limited to the details given herein, but may be modified within the scope and equivalents of the appended claims.

[0139] Those having skill in the art will appreciate that many changes may be made to the details of the above-described embodiments without departing from the underlying principles of the disclosure. The scope of the present disclosure should, therefore, be determined only by the following claims.

Claims

1 . An apparatus for a wireless communication device, comprising:

a memory device to store a plurality of radio link control (RLC) service data units (SDUs); and

one or more baseband processors to encode an RLC protocol data unit (PDU) including a data field and a PDU header, wherein to encode the RLC PDU the one or more baseband processors are configured to:

map the plurality of RLC SDUs to the data field; and

for each group of one or more consecutive RLC SDUs mapped to the data field having a same number of bytes, format the RLC PDU header to include a number (N) field followed by a length indicator (LI) field, wherein the number (N) field indicates the number of consecutive RLC SDUs with the same number of bytes and the LI field indicates the number of bytes of each of the consecutive RLC SDUs with the same number of bytes.

2. The apparatus of claim 1 , further comprising circuitry to provide the RLC PDU through a logical channel to a lower layer of a communication protocol.

3. The apparatus of claim 1 , further comprising circuitry to receive the RLC SDUs through a service access point (SAP) from an upper layer of a

communication protocol.

4. The apparatus of claim 1 , wherein the one or more baseband processors are further configured to provide the RLC PDU to radio frequency (RF) circuitry.

5. The apparatus of claim 1 , wherein the plurality of RLC SDUs comprises user data received from application circuitry.

6. The apparatus of any of claims 1 -5, wherein to encode the RLC PDU the one or more baseband processors are further configured to include a final number field in the header with a value of 0 following a final LI field to indicate the plurality of RLC SDUs follows the final number field.

7. The apparatus of any of claims 1 -5, wherein the wireless

communication device comprises at least part of a user equipment (UE).

8. The apparatus of any of claims 1 -5, wherein the wireless

communication device comprises at least part of a radio access network (RAN) node.

9. The apparatus of any of claims 1 -5, wherein the number field is 3 bits.

10. A computer-readable storage medium including computer-readable instructions stored thereon, the computer-readable instructions configured to instruct at least one processor to:

decode a header of a radio link control (RLC) protocol data unit (PDU) to obtain one or more sets of data comprising a number field and a length field, wherein the number field indicates a number of consecutive RLC service data units (SDUs) of a same length in a data field of the RLC PDU, and wherein the length field indicates a length of each of the consecutive RLC SDUs corresponding to the number field; decode the data field of the RLC PDU based on the number field and the length field in each of the one or more sets of data to obtain a plurality of decoded RLC SDUs; and

store the plurality of decoded RLC SDUs to deliver to an upper layer of a communication protocol.

1 1 . The computer-readable storage medium of claim 10, further comprising circuitry to send the plurality of decoded RLC SDUs through a service access point (SAP) to the upper layer of the communication protocol.

12. The computer-readable storage medium of claim 10, further comprising circuitry to receive the RLC PDU through a logical channel from a lower layer of the communication protocol.

13. The computer-readable storage medium of any of claims 10-12, wherein a final number field in the header with a value of 0 following a final length field is included to indicate a plurality of RLC SDUs follows the final number field.

14. The computer-readable storage medium of any of claims 10-12, wherein the at least one processor is included in a user equipment (UE).

15. The computer-readable storage medium of any of claims 10-12, wherein the at least one processor is included in a radio access network (RAN) node.

16. A radio link control (RLC) entity for a wireless communication protocol, comprising:

one or more buffers to store service data units (SDUs) of variable sizes received from or to deliver to an upper layer of the wireless communication protocol, and to store protocol data units (PDUs) received from or to send to a lower layer of the wireless communication protocol; and processing circuitry to encode or decode the PDUs based on one or more groups of consecutive SDUs of a same length, wherein each PDU includes a number (N) field and a corresponding length indicator (LI) field for each of the one or more groups.

17. The RLC entity of claim 16, further comprising circuitry to send the plurality of RLC SDUs through a service access point (SAP) to the upper layer of the wireless communication protocol.

18. The RLC entity of claim 17, further comprising circuitry to receive the RLC PDU through a logical channel from the lower layer of the wireless

communication protocol.

19. The RLC entity of any of claims 16-18, wherein the LI field indicates the length in bytes of each of the consecutive SDUs in a corresponding group.

20. The RLC entity of any of claims 16-18, wherein the RLC entity comprises at least part of a user equipment (UE).

21 . The RLC entity of any of claims 16-18, wherein the RLC entity comprises at least part of a radio access network (RAN) node.

22. A method of encoding a radio link control (RLC) protocol data unit (PDU), comprising:

mapping a plurality of RLC service data units (SDUs) to a data field of the RLC PDU;

determining a length of each of the RLC SDUs; and

formatting a header of the RLC PDU to includes a number field followed by a length indicator (LI) field for each group of one or more consecutive RLC SDUs with the same number of bytes, wherein the number field indicates the number of consecutive RLC SDUs with the same number of bytes and the LI field indicates the number of bytes of each of the consecutive RLC SDUs with the same number of bytes.

23. The method of claim 22, further comprising receiving the plurality of RLC SDUs through a service access point (SAP) from an upper layer of a

communication protocol.

24. The method of claim 22, further comprising sending the RLC PDU through a logical channel to a lower layer of a communication protocol.

25. A computer-readable storage medium including computer-readable instructions stored thereon, the computer-readable instructions configured to instruct at least one processor to perform the method of any of claims 21 -24.