WO2018018424A1 - Temperature control method and system based on chip - Google Patents

Temperature control method and system based on chip Download PDF

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Publication number
WO2018018424A1
WO2018018424A1 PCT/CN2016/091785 CN2016091785W WO2018018424A1 WO 2018018424 A1 WO2018018424 A1 WO 2018018424A1 CN 2016091785 W CN2016091785 W CN 2016091785W WO 2018018424 A1 WO2018018424 A1 WO 2018018424A1
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WO
WIPO (PCT)
Prior art keywords
number
threads
chip
according
core
Prior art date
Application number
PCT/CN2016/091785
Other languages
French (fr)
Chinese (zh)
Inventor
张升泽
Original Assignee
张升泽
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 张升泽 filed Critical 张升泽
Priority to PCT/CN2016/091785 priority Critical patent/WO2018018424A1/en
Publication of WO2018018424A1 publication Critical patent/WO2018018424A1/en

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring

Abstract

Disclosed are a temperature control method and system based on a chip. The method comprises the following steps: obtaining total threads of a multi-kernel chip (S101); in accordance with an allocation strategy, learning a thread quantity of each kernel (S102); and in accordance with the thread quantity, calculating the temperature of each kernel (S103). The technical solution has the advantage of temperature control and management.

Description

 Chip-based temperature control method and system Technical field

The present invention relates to the field of electronic chips, and in particular, to a chip-based temperature control method and system.

Background technique

The chip also has its own unique place. In a broad sense, as long as it is a semiconductor wafer manufactured by microfabrication, it can be called a chip, and there is no circuit inside. For example, a semiconductor light source chip; for example, a mechanical chip such as a MEMS gyroscope; or a biochip such as a DNA chip. In communication and information technology, when the range is limited to silicon integrated circuits, the intersection of the chip and the integrated circuit is on the "circuit on the silicon wafer." The chipset is a series of interrelated chipsets that are interdependent and can play a bigger role, such as the processor inside the computer and the North-South Bridge chipset, the RF, baseband and power management chipset in the phone. .

Existing chips cannot achieve temperature calculation and management.

technical problem

A chip-based temperature control method is provided, which solves the shortcomings of the prior art that temperature calculation and management cannot be realized.

Technical solution

In one aspect, a chip-based temperature control method is provided, the method comprising the steps of:

Obtain the total thread of the multi-core chip;

Know the number of threads per core according to the allocation strategy;

The temperature of each core is calculated based on the number of threads for temperature control.

Optionally, the obtaining, according to the allocation policy, the number of threads of each kernel is specific, including:

The number of threads per core is allocated according to the load balancing allocation policy.

Optionally, the obtaining, according to the allocation policy, the number of threads of each kernel is specific, including:

The number of threads per core is allocated based on the number-averaged allocation policy.

In a second aspect, a chip-based temperature control system is provided, the system comprising:

The obtaining unit is configured to acquire a total thread of the multi-core chip;

An allocation unit for knowing the number of threads of each kernel according to an allocation policy;

A calculation unit for calculating the temperature of each core according to the number of threads for temperature control.

Optionally, the allocating unit is specifically configured to allocate a number of threads of each core according to a load balancing allocation policy.

Optionally, the allocating unit is specifically configured to allocate a number of threads of each core according to a quantity-averaged allocation policy.

Beneficial effect

The technical solution provided by the specific embodiment of the present invention acquires the total thread of the multi-core chip, learns the number of threads of each core according to the allocation strategy, calculates the temperature of each core according to the number of threads, and therefore has the function of implementing chip-based temperature control and management. advantage.

DRAWINGS

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the description of the prior art will be briefly described below. Obviously, the drawings in the following description are only It is a certain embodiment of the present invention, and other drawings can be obtained from those skilled in the art without any creative work.

1 is a flow chart of a chip-based temperature control method provided by the present invention;

2 is a structural diagram of a chip-based temperature control system provided by the present invention.

Embodiments of the invention

The technical solutions in the embodiments of the present invention are clearly and completely described in the following with reference to the accompanying drawings in the embodiments of the present invention. It is obvious that the described embodiments are only a part of the embodiments of the present invention, but not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative efforts are within the scope of the present invention.

Referring to FIG. 1 , FIG. 1 is a flowchart of a chip-based temperature control method according to a first preferred embodiment of the present invention. The method is implemented by an electronic chip. The method is as shown in FIG. 1 and includes the following steps:

Step S101: Acquire a total thread of the multi-core chip;

Step S102: Obtain a number of threads of each kernel according to an allocation policy.

Step S103: Calculate the temperature of each core according to the number of threads to perform temperature control.

The technical solution provided by the specific embodiment of the present invention acquires the total thread of the multi-core chip, learns the number of threads of each core according to the allocation strategy, calculates the temperature of each core according to the number of threads, and therefore has the function of implementing chip-based temperature control and management. advantage.

Optionally, the implementation method of the foregoing step S102 may be specifically:

The number of threads per core is allocated according to the load balancing allocation policy.

Optionally, the implementation method of the foregoing step S103 may be specifically:

The number of threads per core is allocated based on the number-averaged allocation policy.

Referring to FIG. 2, FIG. 2 is a chip-based temperature control system according to a second preferred embodiment of the present invention. The system includes:

The obtaining unit 201 is configured to acquire a total thread of the multi-core chip;

The allocating unit 202 is configured to learn the number of threads of each kernel according to the allocation policy;

The calculation control unit 203 is configured to calculate the temperature of each core according to the number of threads for temperature control.

The technical solution provided by the specific embodiment of the present invention acquires the total thread of the multi-core chip, learns the number of threads of each core according to the allocation strategy, calculates the temperature of each core according to the number of threads, and therefore has the function of implementing chip-based temperature control and management. advantage.

Optionally, the foregoing allocating unit 202 is specifically configured to allocate a number of threads of each core according to a load balancing allocation policy.

Optionally, the foregoing allocating unit 202 is specifically configured to allocate, according to the number-averaged allocation policy, the number of threads of each core.

It should be noted that, for the foregoing method embodiments or embodiments, for the sake of simple description, they are all expressed as a series of action combinations, but those skilled in the art should know that the present invention is not subject to the described action sequence. Limitations, as certain steps may be performed in other sequences or concurrently in accordance with the present invention. In the following, those skilled in the art should also understand that the embodiments or examples described in the specification are preferred embodiments, and the actions and units involved are not necessarily required by the present invention.

In the above embodiments, the descriptions of the various embodiments are different, and the details that are not detailed in a certain embodiment can be referred to the related descriptions of other embodiments.

The steps in the method of the embodiment of the present invention may be sequentially adjusted, merged, and deleted according to actual needs.

The units in the apparatus of the embodiment of the present invention may be combined, divided, and deleted according to actual needs. Those skilled in the art can combine or combine the different embodiments described in the specification and the features of the different embodiments.

Through the description of the above embodiments, those skilled in the art can clearly understand that the present invention can be implemented in hardware, firmware implementation, or a combination thereof. When implemented in software, the functions described above may be stored in or transmitted as one or more instructions or code on a computer readable medium. Computer readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one location to another. A storage medium may be any available media that can be accessed by a computer. Taking this as an example, but not limited to: the computer readable medium may include random access memory (Random) Access Memory, RAM), Read-Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (Electrically Erasable Programmable Read-Only Memory, EEPROM), Compact Disc Read-Only Memory, CD-ROM, or other optical disc storage, magnetic storage medium or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer. Also. Any connection may suitably be a computer readable medium. For example, if the software is using coaxial cable, fiber optic cable, twisted pair, digital subscriber line (Digital Subscriber Line, DSL) or wireless technology such as infrared, radio and microwave transmission from a website, server or other remote source, then coaxial cable, fiber optic cable, twisted pair, DSL or such as infrared, wireless and microwave Wireless technology is included in the fixing of the associated medium. As used in the present invention, a disk and a disc include a compact disc (CD), a laser disc, a compact disc, a digital versatile disc (DVD), a floppy disk, and a Blu-ray disc, wherein the disc is usually magnetically copied, and the disc is The laser is used to optically replicate the data. Combinations of the above should also be included within the scope of the computer readable media.

In summary, the above description is only a preferred embodiment of the technical solution of the present invention, and is not intended to limit the scope of the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and scope of the present invention are intended to be included within the scope of the present invention.

Claims (6)

  1.  A chip-based temperature control method, characterized in that the method comprises the following steps:
    Obtain the total thread of the multi-core chip;
    Know the number of threads per core according to the allocation strategy;
    The temperature of each core is calculated based on the number of threads for temperature control.
  2. The method according to claim 1, wherein the determining the number of threads of each kernel according to the allocation policy comprises:
    The number of threads per core is allocated according to the load balancing allocation policy.
  3. The method according to claim 1, wherein the determining the number of threads of each kernel according to the allocation policy comprises:
    The number of threads per core is allocated based on the number-averaged allocation policy.
  4. A chip-based temperature control system, the system comprising:
    The obtaining unit is configured to acquire a total thread of the multi-core chip;
    An allocation unit for knowing the number of threads of each kernel according to an allocation policy;
    A calculation unit for calculating the temperature of each core according to the number of threads for temperature control.
  5. The system according to claim 4, wherein the allocating unit is specifically configured to allocate the number of threads of each core according to a load balancing allocation policy.
  6. The system according to claim 4, wherein the allocating unit is specifically configured to allocate the number of threads of each core according to the number-averaged allocation policy.
PCT/CN2016/091785 2016-07-26 2016-07-26 Temperature control method and system based on chip WO2018018424A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/CN2016/091785 WO2018018424A1 (en) 2016-07-26 2016-07-26 Temperature control method and system based on chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2016/091785 WO2018018424A1 (en) 2016-07-26 2016-07-26 Temperature control method and system based on chip

Publications (1)

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040128663A1 (en) * 2002-12-31 2004-07-01 Efraim Rotem Method and apparatus for thermally managed resource allocation
CN1894668A (en) * 2004-03-29 2007-01-10 索尼计算机娱乐公司 Processor, multiprocessor system, processor system, information processing device, and temperature control method
CN101076770A (en) * 2004-09-28 2007-11-21 英特尔公司 Method and apparatus for varying energy per instruction according to the amount of available parallelism
CN101256515A (en) * 2008-03-11 2008-09-03 浙江大学 Method for implementing load equalization of multicore processor operating system
CN101916209A (en) * 2010-08-06 2010-12-15 华东交通大学 Cluster task resource allocation method for multi-core processor
CN106294063A (en) * 2016-07-26 2017-01-04 张升泽 Temperature control method and system based on chips

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040128663A1 (en) * 2002-12-31 2004-07-01 Efraim Rotem Method and apparatus for thermally managed resource allocation
CN1894668A (en) * 2004-03-29 2007-01-10 索尼计算机娱乐公司 Processor, multiprocessor system, processor system, information processing device, and temperature control method
CN101076770A (en) * 2004-09-28 2007-11-21 英特尔公司 Method and apparatus for varying energy per instruction according to the amount of available parallelism
CN101256515A (en) * 2008-03-11 2008-09-03 浙江大学 Method for implementing load equalization of multicore processor operating system
CN101916209A (en) * 2010-08-06 2010-12-15 华东交通大学 Cluster task resource allocation method for multi-core processor
CN106294063A (en) * 2016-07-26 2017-01-04 张升泽 Temperature control method and system based on chips

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