WO2017158843A1 - Display panel and method for manufacturing display panel - Google Patents

Display panel and method for manufacturing display panel Download PDF

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Publication number
WO2017158843A1
WO2017158843A1 PCT/JP2016/058826 JP2016058826W WO2017158843A1 WO 2017158843 A1 WO2017158843 A1 WO 2017158843A1 JP 2016058826 W JP2016058826 W JP 2016058826W WO 2017158843 A1 WO2017158843 A1 WO 2017158843A1
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oxide semiconductor
thin film
semiconductor film
formed
display panel
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PCT/JP2016/058826
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French (fr)
Japanese (ja)
Inventor
覚 宇津木
悟志 道中
伸武 野寺
隆夫 松本
小林 和樹
大亥 桶谷
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堺ディスプレイプロダクト株式会社
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Priority to PCT/JP2016/058826 priority Critical patent/WO2017158843A1/en
Publication of WO2017158843A1 publication Critical patent/WO2017158843A1/en

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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film

Abstract

Provided are: a display panel equipped with an oxide semiconductor TFT wherein a channel region is selectively crystallized; and a method for manufacturing the display panel. A display panel of the present invention is equipped with: a plurality of driving thin film transistors for flowing currents for changing luminances of respective pixels; and a plurality of selection thin film transistors for selecting the pixels. In each of the driving thin film transistors, a channel region is formed of an amorphous oxide semiconductor film, and in each of the selection thin film transistors, the whole or a part of a channel region is formed of a crystalline oxide semiconductor film.

Description

Display panel and method of manufacturing display panel

The present invention relates to a display panel including a thin film transistor and a method for manufacturing the display panel.

A TFT (thin film transistor) type liquid crystal display (display panel) has a required gap between a TFT substrate and a color filter substrate having colors of R (red), G (green), and B (blue). The image can be displayed by bonding, injecting liquid crystal between the TFT substrate and the color filter substrate, and controlling the light transmittance of the liquid crystal molecules for each pixel.

On the TFT substrate, data lines and scanning lines are arranged in a grid pattern in the vertical and horizontal directions, and pixels in which TFTs are arranged at respective locations where the data lines and the scanning lines intersect are formed. In addition, a driving circuit for driving the data lines and the scanning lines is formed around a display area including a plurality of pixels.

As the TFT, amorphous silicon (amorphous, a-Si) TFT using a silicon semiconductor, low-temperature polysilicon TFT using a semiconductor layer of polysilicon (polycrystalline, p-Si), and the like are being developed. On the other hand, in recent years, research on TFTs using oxide semiconductors (also referred to as oxide semiconductor TFTs) has been actively conducted. Oxide semiconductor TFTs have the advantages of higher electron mobility than amorphous silicon TFTs and less leakage current than silicon semiconductors.

In the method of manufacturing an oxide semiconductor TFT, when a crystalline oxide semiconductor film portion and an amorphous oxide semiconductor film portion are separately formed within the plane of one substrate, for example, an amorphous oxide film is formed on the substrate. Crystallization of the entire amorphous oxide semiconductor film by thermal annealing or laser annealing using an excimer laser after the formation of the physical semiconductor film, and the crystalline oxide semiconductor at the required location by photo and etching processes After the film is left, an amorphous oxide semiconductor film is formed again, and photo and etching processes are performed.

In addition, the conventional oxide semiconductor TFT is configured so that the gate electrode film region and the source / drain electrode film region do not overlap in the vertical direction of the TFT, and is a self-aligned type that improves characteristics such as reducing parasitic capacitance. (Self-alignment) is attracting attention. For example, in a bottom gate type oxide semiconductor TFT in which a gate electrode film is disposed in the lowermost layer, a region of the oxide semiconductor layer (source / drain region) that does not overlap with the gate electrode film when irradiated with predetermined light from the back side of the substrate An oxide semiconductor TFT is disclosed in which the resistance is reduced to improve the characteristics (see Patent Document 1).

JP 2014-140005 A

However, in the conventional manufacturing method of an oxide semiconductor TFT, when a crystalline oxide semiconductor film portion and an amorphous oxide semiconductor film portion are separately formed within the surface of one substrate, film formation, photo and etching are performed. The process needs to be performed twice. In the conventional self-aligned oxide semiconductor TFT, the region overlapping the region of the gate electrode film remains amorphous, and the channel region cannot be crystallized.

The present invention has been made in view of such circumstances, and an object thereof is to provide a display panel including an oxide semiconductor TFT in which a channel region is selectively crystallized, and a method for manufacturing the display panel.

In a display panel according to an embodiment of the present invention, a plurality of thin film transistors each including an oxide semiconductor film are formed over a substrate. In a display panel including a plurality of pixels arranged in a matrix, the luminance of each pixel is increased. A plurality of driving thin film transistors for supplying a current to be changed; and a plurality of selection thin film transistors for selecting each pixel. The driving thin film transistor includes an amorphous oxide semiconductor film in a channel region. The selective thin film transistor is characterized in that a channel region is entirely or partially formed of a crystalline oxide semiconductor film.

A method for manufacturing a display panel according to an embodiment of the present invention is a method for manufacturing a display panel having a plurality of pixels arranged in a matrix, wherein a gate electrode film is formed on a surface of a substrate, and an upper side of the gate electrode film. And forming an amorphous oxide semiconductor film by irradiating an energy beam to a region corresponding to all or part of the channel region of the amorphous oxide semiconductor film. Forming a plurality of thin film transistors for selection for selecting each pixel, forming a channel region with an amorphous oxide semiconductor film not irradiated with the energy beam, and supplying a current for changing luminance of each pixel. A plurality of driving thin film transistors for flowing are formed.

According to the present invention, an oxide semiconductor TFT having a channel region selectively crystallized can be provided.

It is a schematic diagram which shows an example of the principal part structure of the display panel of 1st Embodiment. It is a principal part plane schematic diagram which shows an example of the structure of the thin-film transistor for a drive of 1st Embodiment. FIG. 3 is a schematic cross-sectional view of a main part viewed from line III-III in FIG. 2. It is a principal part plane schematic diagram which shows the 1st Example of the structure of the thin-film transistor for selection of 1st Embodiment. FIG. 5 is a schematic cross-sectional view of a main part viewed from the line VV in FIG. 4. It is a manufacturing process figure which shows an example of the manufacturing method of the display panel of 1st Embodiment. It is a schematic diagram which shows an example of a structure of a partial irradiation type laser. It is a principal part top schematic diagram which shows the 2nd Example of the structure of the thin-film transistor for selection of 1st Embodiment. FIG. 9 is a schematic cross-sectional view of a main part viewed from the line IX-IX in FIG. It is a schematic diagram which shows an example of the characteristic fluctuation | variation of the thin-film transistor for selection of 1st Embodiment. It is a schematic diagram which shows an example of the circuit pattern of a GOA circuit. It is a principal part top schematic diagram which shows the 3rd Example of the structure of the thin-film transistor for selection in a GOA circuit. It is a principal part top schematic diagram which shows the 4th Example of the structure of the thin-film transistor for selection in a GOA circuit. It is a principal part top schematic diagram which shows the 5th Example of the structure of the thin-film transistor for selection in a GOA circuit. It is a principal part plane schematic diagram which shows an example of the structure of the thin-film transistor for a drive of 2nd Embodiment. FIG. 16 is a schematic cross-sectional view of a relevant part when viewed from line XVI-XVI in FIG. 15. It is a principal part plane schematic diagram which shows the 1st Example of the structure of the thin-film transistor for selection of 2nd Embodiment. It is a principal part top schematic diagram which shows the 2nd Example of the structure of the thin-film transistor for selection of 2nd Embodiment. It is explanatory drawing which shows an example of the equivalent circuit of 1 pixel of the display panel of 3rd Embodiment.

(First embodiment)
Hereinafter, the present invention will be described with reference to the drawings illustrating embodiments thereof. FIG. 1 is a schematic diagram illustrating an example of a main configuration of a display panel 100 according to the first embodiment. The display panel 100 includes a pixel unit 50 in which a plurality of pixels are arranged in a matrix, a gate circuit unit 60 and a source circuit unit 70 arranged around the pixel unit 50, and the like. The pixel unit 50 and the gate circuit unit 60 are formed on a thin film transistor (TFT) substrate (also referred to as a TFT substrate). In this embodiment, a liquid crystal display panel will be described as an example of the display panel 100, but the display panel 100 is not limited to the liquid crystal display panel.

The pixel unit 50 is provided with one thin film transistor (also referred to as TFT) corresponding to each pixel. The thin film transistor of the pixel unit 50 is a transistor (also referred to as a driving thin film transistor) for supplying a current that changes the luminance of each pixel. Note that changing the luminance of each pixel is synonymous with changing the transmittance of each pixel.

The gate circuit unit 60 controls switching (on / off control) of the thin film transistor (driving thin film transistor) of the pixel unit 50, and selects a thin film transistor, that is, each pixel for selecting which pixel luminance is changed. A thin film transistor (also referred to as a thin film transistor for selection). In addition, the source circuit unit 70 selectively controls a driving voltage (also referred to as a signal voltage) supplied to the thin film transistor (driving thin film transistor) of the pixel unit 50 for each driving thin film transistor, and sets the driving voltage to be supplied. Accordingly, a thin film transistor (also referred to as a selection thin film transistor) that changes the light transmittance of each pixel is provided. For example, the source circuit unit 70 may be configured to supply a signal output from an external source IC (not shown) connected to the display panel 100 to the thin film transistor of the pixel unit 50.

That is, the driving thin film transistor of the pixel unit 50 corresponds to each pixel and operates as a switching element for writing the voltage of the data line to the pixel electrode. The thin film transistor for selection in the gate circuit section 60 operates as a switching element that supplies a gate voltage for turning on and off the driving thin film transistor.

Next, the structure of the thin film transistor will be described. In the following example, a bottom gate type structure in which the gate electrode film is disposed in the lowermost layer will be described. However, the structure is not limited to this, and the top gate type structure in which the gate electrode film is disposed on the upper side of the semiconductor film is described. The present embodiment can also be applied to the structure. First, the structure of the channel etch method will be described.

FIG. 2 is a schematic plan view of the main part showing an example of the structure of the driving thin film transistor 51 of the first embodiment, and FIG. 3 is a schematic cross-sectional view of the main part taken along line III-III in FIG. As shown in FIGS. 2 and 3, the driving thin film transistor 51 of the pixel unit 50 has a gate electrode film 2 formed on the surface of a glass substrate 1 (also referred to as a substrate) and covers the gate electrode film 2 to form a gate. An insulating film 3 (for example, a SiO 2 film) is formed.

An amorphous oxide semiconductor film 4 is formed on the surface of the gate insulating film 3 and above the gate electrode film 2. The amorphous oxide semiconductor film 4 is an amorphous (amorphous) oxide semiconductor film. The amorphous oxide semiconductor film 4 is, for example, an oxide of three elements of indium (In), gallium (Ga), and zinc (Zn), but is not limited to this, and indium, gallium, An oxide containing at least one element from elements such as zinc, tin, aluminum, silicon, germanium, titanium, molybdenum, boron, and manganese can also be used.

A source electrode film 7 and a drain electrode film 8 are formed at required locations on the amorphous oxide semiconductor film 4. A passivation film 9 is formed so as to cover the source electrode film 7 and the drain electrode film 8, and an organic film 10 is formed on the surface of the passivation film 9 to flatten the surface. Through holes are formed at required positions of the passivation film 9 and the organic film 10 so that the transparent conductive film (for example, ITO) 11 and the drain electrode film 8 are electrically connected through the through holes. A pixel electrode (not shown) is connected to the transparent conductive film 11.

FIG. 2 schematically shows a projected state in which the gate electrode film 2, the amorphous oxide semiconductor film 4, the source electrode film 7 and the drain electrode film 8 are projected onto the surface of the substrate 1. As shown in FIGS. 2 and 3, the channel region of the driving thin film transistor 51 is formed of an amorphous oxide semiconductor film 4.

By using the driving thin film transistor 51 in which the channel region is formed of the amorphous oxide semiconductor film 4 as a thin film transistor of the pixel portion 50, the electron mobility can be increased, and the size of the thin film transistor constituting the pixel can be reduced. Can be small. In the case of a TFT substrate for a liquid crystal, a pixel design with a high transmission aperture ratio can be performed, and the luminance can be increased and the power consumption of the backlight can be reduced.

Next, a thin film transistor for selection in the gate circuit unit 60 will be described. FIG. 4 is a schematic plan view of an essential part showing a first example of the structure of the thin film transistor 61 for selection according to the first embodiment, and FIG. 5 is a schematic cross-sectional view of the relevant part viewed from line VV in FIG. . The thin film transistor 61 for selection in the gate circuit unit 60 is, for example, a transistor that outputs a gate driving pulse. As shown in FIGS. 4 and 5, the thin film transistor 61 for selection in the gate circuit section 60 has a gate electrode film 2 formed on the surface of a glass substrate 1 (also referred to as a substrate) and covers the gate electrode film 2. A gate insulating film 3 (for example, a SiO 2 film) is formed.

An amorphous oxide semiconductor film 4 is formed on the surface of the gate insulating film 3 and above the gate electrode film 2. The amorphous oxide semiconductor film 4 is an amorphous (amorphous) oxide semiconductor film. The amorphous oxide semiconductor film 4 is, for example, an oxide of three elements of indium (In), gallium (Ga), and zinc (Zn), but is not limited to this, and indium, gallium, An oxide containing at least one element from elements such as zinc, tin, aluminum, silicon, germanium, titanium, molybdenum, boron, and manganese can also be used.

A crystalline oxide semiconductor film 5 is formed on the upper side of the gate electrode film 2 so as to be surrounded by the amorphous oxide semiconductor film 4. The crystalline oxide semiconductor film 5 is a crystallized oxide semiconductor film, for example, an oxide semiconductor film that includes crystals and has crystallinity. The crystalline state of the crystalline oxide semiconductor film 5 may be a state in which the direction of the crystal axis is disordered or a state having a certain orientation.

A source electrode film 7 and a drain electrode film 8 are formed at required locations on the crystalline oxide semiconductor film 5. A passivation film 9 is formed so as to cover the source electrode film 7 and the drain electrode film 8, and an organic film 10 is formed on the surface of the passivation film 9 to flatten the surface.

FIG. 4 schematically shows a projected state in which the gate electrode film 2, the amorphous oxide semiconductor film 4, the crystalline oxide semiconductor film 5, the source electrode film 7 and the drain electrode film 8 are projected onto the surface of the substrate 1. Show. As shown in FIGS. 4 and 5, part of the channel region of the thin film transistor 61 for selection is formed of the crystalline oxide semiconductor film 5.

FIG. 6 is a manufacturing process diagram showing an example of a method for manufacturing the display panel 100 of the first embodiment. Hereinafter, the manufacturing process of the display panel 100 of this Embodiment is demonstrated. Hereinafter, a method for manufacturing a thin film transistor of the display panel 100 will be mainly described. As shown in FIG. 6, an aluminum (Al) film is formed on a substrate (glass substrate) 1 in a room temperature environment using a sputtering method, and the aluminum (Al) film is patterned using a photolithography method and an etching method. Then, the gate electrode film 2 having a required width is formed (S11). The material used for the gate electrode film 2 is not limited to aluminum, and for example, elemental elements such as copper, titanium, tungsten, gold, platinum, molybdenum, or nickel, or alloys thereof may be used.

Next, the gate insulating film 3 is formed on the substrate 1 using the plasma CVD method so as to cover the gate electrode film 2 (S12).

Next, an oxide semiconductor film is formed on the gate insulating film 3 using a sputtering method in a room temperature environment or a high temperature environment that does not cause crystallization (S13). This oxide semiconductor film is an amorphous oxide semiconductor film 4.

Next, partial laser annealing is performed by irradiating an energy beam to a required portion of the amorphous oxide semiconductor film 4 (S14). In the partial laser annealing, a required portion (for example, a portion indicated by reference numeral 5 in FIGS. 4 and 5) of the amorphous oxide semiconductor film 4 is changed to the crystalline oxide semiconductor film 5. The required portion is, for example, a channel region of a thin film transistor for selection of the gate circuit unit 60 among the thin film transistors included in the display panel 100. Further, since the portions other than the required portions are not irradiated with the energy beam, the amorphous oxide semiconductor film 4 remains without being crystallized.

Next, exposure processing and development processing are performed (S15), and a required pattern is formed on the amorphous oxide semiconductor film 4 and the crystalline oxide semiconductor film 5. The required pattern can be appropriately determined according to the arrangement or structure of the source electrode film 7, the drain electrode film 8, and the semiconductor layer.

Next, required portions such as the amorphous oxide semiconductor film 4 and the crystalline oxide semiconductor film 5 are etched (S16), and the amorphous oxide semiconductor film 4 and the crystalline oxide semiconductor film 5 after etching are etched. A source electrode film 7 and a drain electrode film 8 are formed thereon (S17). The source electrode film 7 and the drain electrode film 8 are often formed at the same time.

FIG. 7 is a schematic diagram showing an example of the configuration of a partial irradiation type laser. As shown in FIG. 7, the substrate 1 on which the amorphous oxide semiconductor film 4 is formed is placed on a mounting table (not shown) so as to translate in the direction of the arrow in FIG. 7 at a required speed. It is. Above the substrate 1, a multi-lens array is arranged in which individual lenses are arranged at an appropriate distance along a direction intersecting the moving direction of the substrate 1. By making a laser beam from a laser light source (not shown) enter the multi-lens array, the laser beam is partially irradiated to a plurality of required locations separated via different optical paths for each lens. That is, partial laser annealing can be performed. Thereby, only a required region of the amorphous oxide semiconductor film 4 can be selectively changed to the crystalline oxide semiconductor film 5. Although not shown in FIG. 7, a laser mask (light-shielding member) is disposed between the laser light source and the multi-lens array or between the multi-lens array and the substrate 1. The beam shape of the laser beam can be shaped into, for example, a rectangular shape or a required size by the mask.

FIG. 8 is a schematic plan view of an essential part showing a second example of the structure of the thin film transistor 62 for selection of the first embodiment, and FIG. 9 is a schematic sectional view of the relevant part as seen from the line IX-IX in FIG. . The difference from the selective thin film transistor 61 of the first embodiment illustrated in FIGS. 4 and 5 is that there is no amorphous oxide semiconductor film 4 on the upper side of the gate electrode film 2, and a crystalline oxide semiconductor film. 5 is formed. That is, in the thin film transistor 62 for selection in the second embodiment, the entire channel region is formed of the crystalline oxide semiconductor film 5. Other configurations are the same as those in the first embodiment, and thus the description thereof is omitted.

FIG. 10 is a schematic diagram showing an example of characteristic variation of the selection thin film transistors 61 and 62 according to the first embodiment. In FIG. 10, the horizontal axis represents the gate voltage, and the vertical axis represents the drain current in logarithm. In addition, the arrows in the figure indicate the passage of time in a state where a positive or negative voltage starts to be applied under the light irradiation environment (also referred to as an optical bias stress state).

In general, a thin film transistor having a channel region formed of an amorphous oxide semiconductor film 4 has a relatively large shift in the threshold voltage of the gate voltage in an optical bias stress state. Characteristics vary. This is considered to be caused by oxygen vacancies generated at the channel-gate insulating film interface.

However, as shown in FIG. 10, the initial drain current-gate voltage characteristics of the selection thin film transistors 61 and 62 according to the present embodiment are as shown by the graph indicated by the symbol A, and the time elapses in the optical bias stress state. At the same time, as indicated by reference numerals B and C, the amount of variation in the drain current-gate voltage characteristics of the thin film transistors 61 and 62 is smaller than that of the thin film transistor in which the channel region is formed of only the amorphous oxide semiconductor film 4. This is presumably because the generation of oxygen vacancies can be suppressed by incorporating oxygen atoms into the crystal structure of the channel region.

The thin film transistors 61 and 62 for selection, in which all or part of the channel region is formed of the crystalline oxide semiconductor film 5, have a small characteristic change in which, for example, the threshold voltage of the gate voltage shifts in the light irradiation state. The characteristics can be stabilized.

As described above, as a thin film transistor used in the display panel 100, a thin film transistor in which the channel region is entirely or partially formed of the crystalline oxide semiconductor film 5 and a channel region is formed of the amorphous oxide semiconductor film 4. A thin film transistor can be mixed appropriately, and an oxide semiconductor TFT in which a channel region is selectively crystallized can be provided.

Further, as described above, an energy beam (for example, laser light) may be irradiated locally (or partially) to a required portion of the amorphous oxide semiconductor film 4 formed on the upper side of the gate electrode film 2. Therefore, a thin film transistor (selection thin film transistors 61 and 62) in which all or part of the channel region is formed of the crystalline oxide semiconductor film 5 without increasing the number of film formation, photo and etching steps, and the channel region. Can be mixed on one substrate with a thin film transistor (driving thin film transistor 51) formed of an amorphous oxide semiconductor film 4.

Next, a GOA (Gate Driver On Array) circuit will be described as an example of the gate circuit unit 60. FIG. 11 is a schematic diagram showing an example of a circuit pattern of the GOA circuit. In FIG. 11, a region surrounded by TFT represents one thin film transistor for selection in the GOA circuit. Reference numeral 70 schematically illustrates a voltage supply unit that supplies a voltage to the gate of each thin film transistor. The voltage supply unit 70 can be disposed at an appropriate location of the gate circuit unit 60.

FIG. 12 is a schematic plan view showing the main part of a third embodiment of the structure of the thin film transistor 63 for selection in the GOA circuit, and FIG. 13 shows the fourth embodiment of the structure of the thin film transistor 64 for selection in the GOA circuit. FIG. 14 is a schematic plan view of the relevant part showing a fifth embodiment of the structure of the thin film transistor 65 for selection in the GOA circuit. The thin film transistors 63, 64, 65 for selection in the GOA circuit have a gate electrode film 2 having a rectangular shape in plan view provided on the substrate, and a long source electrode film 7 in a region corresponding to the gate electrode film 2. The drain electrode films 8 are alternately arranged.

In the thin film transistor 63 for selection shown in FIG. 12, the entire channel region is formed of the crystalline oxide semiconductor film 5. In addition, in the thin film transistor 64 for selection shown in FIG. 13, a part of the channel region is formed of the crystalline oxide semiconductor film 5. As illustrated in FIGS. 4, 5, and 7, the crystalline oxide semiconductor film 5 illustrated in FIG. 13 is subjected to partial laser annealing by irradiating a required portion of the amorphous oxide semiconductor film 4 with an energy beam. Can be formed. In the thin film transistor 63 for selection shown in FIG. 14, the entire channel region is formed of the amorphous oxide semiconductor film 4. That is, the thin film transistor 63 for selection does not exclude a thin film transistor in which the entire channel region is formed of the amorphous oxide semiconductor film 4.

In the GOA circuit, the voltage supply unit 70 can supply gate voltages having different voltage values to a plurality of thin film transistors for selection. In the thin film transistor for selection whose gate voltage to be supplied is equal to or higher than a predetermined voltage value (for example, 30 V or the like), all or part of the channel region is formed of the crystalline oxide semiconductor film 5. In other words, the thin film transistors 63 and 64 having a gate voltage equal to or higher than a predetermined voltage value are formed using a crystalline oxide semiconductor film in whole or part of the channel region.

In other words, the channel region of the thin film transistor 65 having a gate voltage lower than a predetermined voltage value can be formed of the amorphous oxide semiconductor film 4. The predetermined voltage value is not limited to 30V.

As described above, in the thin film transistors 63 and 64 to which a relatively large gate voltage (a predetermined voltage or higher) is applied, all or part of the channel region is formed of the crystalline oxide semiconductor film 5, and thus the light irradiation state In FIG. 2, the change in characteristics due to application of a large bias stress can be suppressed, and the characteristics of the circuit can be stabilized.

The voltage supply unit 70 can intermittently supply a gate voltage to a plurality of thin film transistors for selection. The selection thin film transistors 63 and 64 in which the ratio of the gate voltage supply time to the predetermined time (for example, duty ratio) is equal to or higher than a predetermined value (for example, 30%) is a crystalline oxide semiconductor. The film 5 is formed. That is, in the thin film transistors 63 and 64 having a relatively long on-time, all or part of the channel region is formed of the crystalline oxide semiconductor film 5.

In other words, the thin film transistor 65 for selection in which the ratio of the gate voltage supply time to the predetermined time (for example, the duty ratio) is less than a predetermined value (for example, 30%) has a channel region in the amorphous oxide semiconductor. The film 4 can be formed. Note that the predetermined value is not limited to 30%.

As described above, since the thin film transistors 63 and 64 that are turned on for a relatively long time are formed of the crystalline oxide semiconductor film 5 in all or part of the channel region, a long time bias stress is applied in the optical bias stress state. A change in characteristics due to application can be suppressed, and the characteristics of the circuit can be stabilized.

(Second Embodiment)
Next, the structure of the etch stopper method will be described. FIG. 15 is a schematic plan view of the main part showing an example of the structure of the driving thin film transistor 52 of the second embodiment, and FIG. 16 is a schematic cross-sectional view of the main part seen from the XVI-XVI line of FIG. The difference from the channel etch method shown in FIGS. 2 and 3 is that the upper portion of the channel is covered with the etching stopper film 12. For example, a silicon oxide film can be used as the etching stopper film 12. By providing the etching stopper film 12, it serves as a stopper film during etching of the source electrode film 7 and the drain electrode film 8, and protects the oxide semiconductor film in the channel region from various process atmospheres after the channel region is formed. Have a role. Since other structures are the same as those in FIGS. 2 and 3, the description thereof is omitted.

FIG. 17 is a schematic plan view showing a main part of a first example of the structure of the thin film transistor 66 for selection according to the second embodiment. FIG. 18 shows a second example of the structure of the thin film transistor 67 for selection according to the second embodiment. It is a principal part schematic diagram which shows these. The difference between FIG. 17 and FIG. 5 is that the upper portion of the channel is covered with the etching stopper film 12 in FIG. Further, the difference between FIG. 18 and FIG. 9 is that the upper portion of the channel is covered with the etching stopper film 12 in FIG. Other structures are the same as those in FIG. 5 or FIG.

(Third embodiment)
In the first and second embodiments described above, the liquid crystal display panel has been described as an example of the display panel 100, but the display panel is not limited to the liquid crystal display panel. In the third embodiment, an organic EL (OLED: Organic Light Emitting Diode) display will be described as a display panel.

FIG. 19 is an explanatory diagram showing an example of an equivalent circuit of one pixel of the display panel according to the third embodiment. An organic EL display (display panel) has two thin film transistors: a driving thin film transistor (drive TFT) 53 and a selection thin film transistor (switching TFT) 68 for one pixel. The selection thin film transistor 68 is a thin film transistor for selecting a pixel to emit light. For example, as illustrated in FIG. 5 or FIG. 9, all or part of the channel region is formed of the crystalline oxide semiconductor film 5. It is. The driving thin film transistor 53 is a thin film transistor for supplying a current necessary for light emission of the organic EL, and the channel region is formed of the amorphous oxide semiconductor film 4.

The thin film transistor 68 for selection that plays a role of switching suppresses a shift of the threshold voltage of the gate voltage, for example, by irradiating a required portion of the amorphous oxide semiconductor film 4 with an energy beam and performing partial laser annealing. Circuit characteristics can be stabilized. In the thin film transistor 53 for driving, a large current for causing the organic EL to emit light can flow by forming the channel region with the amorphous oxide semiconductor film 4 and increasing the electron mobility.

As described above, in each embodiment, in order to suppress the characteristic variation and increase the reliability, and to increase the electron mobility, the characteristics of the characteristics that meet the respective requirements on one display panel according to different requirements. Thin film transistors can be made separately. Hereinafter, all or a part from the first embodiment to the third embodiment will be referred to as this embodiment.

In the display panel of this embodiment, a plurality of thin film transistors each including an oxide semiconductor film are formed over a substrate, and a display panel including a plurality of pixels arranged in a matrix has a current that changes the luminance of each pixel. And a plurality of selection thin film transistors for selecting each pixel, the driving thin film transistor having a channel region formed of an amorphous oxide semiconductor film. In the thin film transistor for selection, all or part of the channel region is formed of a crystalline oxide semiconductor film.

The display panel of this embodiment includes a plurality of driving thin film transistors for supplying a current that changes the luminance of each pixel and a plurality of selection thin film transistors for selecting each pixel. In the case of a liquid crystal display panel, a driving thin film transistor corresponds to each pixel and operates as a switching element for writing the voltage of the data line to the pixel electrode. In the case of organic EL, the driving thin film transistor is a transistor for passing a current necessary for light emission of the organic EL. The thin film transistor for selection operates as a switching element that supplies a gate voltage for turning on and off the thin film transistor for driving.

The driving thin film transistor has a channel region formed of an amorphous oxide semiconductor film, and the selective thin film transistor has a channel region formed entirely or partially of a crystalline oxide semiconductor film. A thin film transistor (a driving thin film transistor) in which a channel region is formed using an amorphous oxide semiconductor film has high electron mobility; therefore, the size of the thin film transistor included in the pixel can be reduced. In particular, in the case of a TFT substrate for liquid crystal, it is possible to design a pixel with a high transmission aperture ratio, increase the luminance, and reduce the power consumption of the backlight. In addition, a thin film transistor (a thin film transistor for selection) in which a channel region is entirely or partially formed of a crystalline oxide semiconductor film (selection thin film transistor) has a small characteristic change in which, for example, a threshold voltage of a gate voltage shifts in a light irradiation state. Circuit characteristics can be stabilized.

As described above, as a thin film transistor used for a display panel, a thin film transistor in which all or part of a channel region is formed using a crystalline oxide semiconductor film, and a thin film transistor in which a channel region is formed using an amorphous oxide semiconductor film. An oxide semiconductor TFT which can be mixed properly and has a channel region selectively crystallized can be provided.

In the display panel of this embodiment, the selection thin film transistor includes a gate electrode film formed over a surface of the substrate and an amorphous oxide semiconductor film formed over the gate electrode film. And a crystalline oxide semiconductor film formed by irradiating the region of the amorphous oxide semiconductor film corresponding to all or a part of the region with an energy beam.

In the display panel of this embodiment mode, the thin film transistor for selection includes a channel of the gate electrode film formed on the surface of the substrate and the amorphous oxide semiconductor film formed above the gate electrode film. And a crystalline oxide semiconductor film formed by irradiating the region of the amorphous oxide semiconductor film corresponding to all or part of the region with an energy beam.

Since an energy beam (for example, laser light) can be irradiated locally (or partially) to a required portion of the amorphous oxide semiconductor film formed on the upper side of the gate electrode film, film formation, photo and etching are performed. Without increasing the number of steps, a thin film transistor (selection thin film transistor) in which all or part of a channel region is formed using a crystalline oxide semiconductor film, and a thin film transistor in which a channel region is formed using an amorphous oxide semiconductor film ( Driving thin film transistors) can be mixed on one substrate.

The display panel according to the present embodiment includes a voltage supply unit that supplies gate voltages having different voltage values to the plurality of selection thin film transistors, and the selection thin film transistors having a supplied gate voltage equal to or higher than a predetermined voltage value. Is characterized in that all or part of the channel region is formed of a crystalline oxide semiconductor film.

The display panel of this embodiment includes a voltage supply unit that supplies gate voltages having different voltage values to a plurality of thin film transistors for selection. The plurality of selection thin film transistors are, for example, selection thin film transistors in the GOA circuit. In the thin film transistor for selection whose supplied gate voltage is equal to or higher than a predetermined voltage value, all or part of the channel region is formed of a crystalline oxide semiconductor film. That is, in the thin film transistor whose gate voltage is equal to or higher than a predetermined voltage value, all or part of the channel region is formed using a crystalline oxide semiconductor film.

Thus, in a thin film transistor to which a relatively large gate voltage (a predetermined voltage or higher) is applied, all or part of the channel region is formed of a crystalline oxide semiconductor film. It is possible to suppress changes in characteristics due to application of, and to stabilize circuit characteristics.

The display panel of the present embodiment includes a voltage supply unit that intermittently supplies a gate voltage to the plurality of selection thin film transistors, and the ratio of the gate voltage supply time to the predetermined time is equal to or greater than a predetermined value. The thin film transistor is characterized in that the whole or part of the channel region is formed of a crystalline oxide semiconductor film.

The display panel according to this embodiment includes a voltage supply unit that intermittently supplies a gate voltage to a plurality of thin film transistors for selection. The plurality of selection thin film transistors are, for example, selection thin film transistors in the GOA circuit. In the thin film transistor for selection in which the ratio of the gate voltage supply time to the predetermined time (for example, the duty ratio) is equal to or higher than a predetermined value, the channel region is entirely or partially formed of a crystalline oxide semiconductor film. That is, in a thin film transistor with a relatively long on-time, the whole or part of the channel region is formed using a crystalline oxide semiconductor film.

As a result, the thin film transistor that is turned on for a relatively long time is formed of a crystalline oxide semiconductor film in all or part of the channel region. The change can be suppressed and the characteristics of the circuit can be stabilized.

The method for manufacturing a display panel according to the present embodiment is a method for manufacturing a display panel having a plurality of pixels arranged in a matrix. A gate electrode film is formed on the surface of a substrate, and an amorphous film is formed above the gate electrode film. A crystalline oxide semiconductor film is formed by irradiating an energy beam to a region corresponding to all or part of the channel region of the amorphous oxide semiconductor film. A plurality of thin film transistors for selection for selecting a pixel are formed, a channel region is formed of an amorphous oxide semiconductor film that is not irradiated with the energy beam, and a current for changing the luminance of each pixel is supplied. A plurality of driving thin film transistors are formed.

In the display panel manufacturing method of this embodiment, a gate electrode film is formed on the surface of the substrate, and an amorphous oxide semiconductor film is formed above the gate electrode film. Of the formed amorphous oxide semiconductor film, a region corresponding to all or part of the channel region is irradiated with an energy beam to form a crystalline oxide semiconductor film, and a plurality of pixels for selecting each pixel A thin film transistor for selection is formed. Then, the channel region is formed using an amorphous oxide semiconductor film that is not irradiated with an energy beam, and a plurality of driving thin film transistors for supplying a current that changes the luminance of each pixel are formed.

Since a thin film transistor (a driving thin film transistor) in which a channel region is formed using an amorphous oxide semiconductor film has a high electron mobility, the size of the thin film transistor included in the pixel can be reduced. In particular, in the case of a TFT substrate for liquid crystal, it is possible to design a pixel with a high transmission aperture ratio, increase the luminance, and reduce the power consumption of the backlight. In addition, a thin film transistor (selection thin film transistor) in which all or part of a channel region is formed using a crystalline oxide semiconductor film has less characteristic change in which, for example, the threshold voltage of the gate voltage shifts in an optical bias stress state. The circuit characteristics can be stabilized.

In addition, an energy beam (for example, laser light) can be irradiated locally (or partially) to a required portion of the amorphous oxide semiconductor film formed over the gate electrode film. Without increasing the number of etching steps, a thin film transistor (a thin film transistor for selection) in which all or part of the channel region is formed using a crystalline oxide semiconductor film and a channel region is formed using an amorphous oxide semiconductor film. Thin film transistors (driving thin film transistors) can be mixed on one substrate.

1 Glass substrate (substrate)
2 Gate electrode film 3 Gate insulating film 4 Amorphous oxide semiconductor film 5 Crystalline oxide semiconductor film 7 Source electrode film 8 Drain electrode film 50 Pixel portion 51, 52, 53 Driving thin film transistor 60 Gate circuit portion 61, 62 , 63, 64, 65, 66, 67 Thin film transistor for selection 70 Source circuit section

Claims (5)

  1. In a display panel having a plurality of thin film transistors each having an oxide semiconductor film over a substrate and having a plurality of pixels arranged in a matrix,
    A plurality of driving thin film transistors for passing a current that changes the luminance of each pixel;
    A plurality of thin film transistors for selection for selecting each pixel, and
    The driving thin film transistor is:
    The channel region is formed of an amorphous oxide semiconductor film,
    The thin film transistor for selection is
    A display panel, wherein a channel region is entirely or partially formed of a crystalline oxide semiconductor film.
  2. The thin film transistor for selection is
    A gate electrode film formed on the surface of the substrate;
    Of the amorphous oxide semiconductor film formed on the upper side of the gate electrode film, the amorphous oxide semiconductor film region corresponding to all or part of the channel region is formed by irradiation with an energy beam. The display panel according to claim 1, further comprising: a crystalline oxide semiconductor film.
  3. A voltage supply unit that supplies gate voltages having different voltage values to the plurality of thin film transistors for selection;
    3. The thin film transistor for selection whose gate voltage supplied is equal to or higher than a predetermined voltage value, wherein all or part of a channel region is formed of a crystalline oxide semiconductor film. Display panel as described.
  4. A voltage supply unit that intermittently supplies a gate voltage to the plurality of thin film transistors for selection;
    2. The selection thin film transistor in which a ratio of a gate voltage supply time to a predetermined time is a predetermined value or more, the channel region is entirely or partially formed of a crystalline oxide semiconductor film. Item 4. The display panel according to any one of Items 1 to 3.
  5. In a method for manufacturing a display panel having a plurality of pixels arranged in a matrix,
    Forming a gate electrode film on the surface of the substrate;
    Forming an amorphous oxide semiconductor film on the gate electrode film;
    A plurality of selections for selecting each pixel by irradiating an energy beam to a region corresponding to all or part of the channel region of the amorphous oxide semiconductor film to form a crystalline oxide semiconductor film Forming a thin film transistor for
    A display panel comprising: a channel region formed of an amorphous oxide semiconductor film not irradiated with the energy beam; and a plurality of driving thin film transistors for supplying a current for changing luminance of each pixel. Manufacturing method.
PCT/JP2016/058826 2016-03-18 2016-03-18 Display panel and method for manufacturing display panel WO2017158843A1 (en)

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Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04195123A (en) * 1990-11-28 1992-07-15 Sharp Corp Active matrix liquid crystal display device
JPH0563172A (en) * 1991-09-02 1993-03-12 Hitachi Ltd Semiconductor device and its manufacture
JP2000306834A (en) * 1999-02-12 2000-11-02 Semiconductor Energy Lab Co Ltd Device and method for laser irradiation and semiconductor device
JP2005129919A (en) * 2003-10-02 2005-05-19 Semiconductor Energy Lab Co Ltd Manufacturing method for semiconductor elememts
JP2011205089A (en) * 2010-03-05 2011-10-13 Semiconductor Energy Lab Co Ltd Method of manufacturing oxide semiconductor film, and method of manufacturing transistor
JP2012256034A (en) * 2011-05-13 2012-12-27 Semiconductor Energy Lab Co Ltd El display device and electronic apparatus
WO2015052991A1 (en) * 2013-10-09 2015-04-16 シャープ株式会社 Semiconductor device and method for manufacturing same
JP2015188063A (en) * 2014-02-07 2015-10-29 株式会社半導体エネルギー研究所 semiconductor device

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04195123A (en) * 1990-11-28 1992-07-15 Sharp Corp Active matrix liquid crystal display device
JPH0563172A (en) * 1991-09-02 1993-03-12 Hitachi Ltd Semiconductor device and its manufacture
JP2000306834A (en) * 1999-02-12 2000-11-02 Semiconductor Energy Lab Co Ltd Device and method for laser irradiation and semiconductor device
JP2005129919A (en) * 2003-10-02 2005-05-19 Semiconductor Energy Lab Co Ltd Manufacturing method for semiconductor elememts
JP2011205089A (en) * 2010-03-05 2011-10-13 Semiconductor Energy Lab Co Ltd Method of manufacturing oxide semiconductor film, and method of manufacturing transistor
JP2012256034A (en) * 2011-05-13 2012-12-27 Semiconductor Energy Lab Co Ltd El display device and electronic apparatus
WO2015052991A1 (en) * 2013-10-09 2015-04-16 シャープ株式会社 Semiconductor device and method for manufacturing same
JP2015188063A (en) * 2014-02-07 2015-10-29 株式会社半導体エネルギー研究所 semiconductor device

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