WO2017106825A1

WO2017106825A1 - Semiconductor package having a leadframe with multi-level assembly pads

Info

Publication number: WO2017106825A1
Application number: PCT/US2016/067487
Authority: WO
Inventors: Chia-Yu Chang; Chih-Chien Ho; Steven Su
Original assignee: Texas Instruments Japan Ltd; Texas Instruments Inc
Current assignee: Texas Instruments Japan Ltd; Texas Instruments Inc
Priority date: 2015-12-18
Filing date: 2016-12-19
Publication date: 2017-06-22
Anticipated expiration: 2018-06-18
Also published as: US10211132B2; US20170179007A1; US20180211905A1; US9922908B2; CN108292609A; CN108292609B

Abstract

In described examples, a leadframe (100) includes a frame (101) of sheet metal in a first planar level, where the frame (101) has metallic leads (110) and a first metallic pad (120) extending inward from the frame (101), and the first metallic pad (120) is tied to the frame (101) by first metallic straps (120a). The leadframe (100) further has a second metallic pad (130) in a second planar level parallel to and spaced from the first planar level, where the second metallic pad (130) is tied by second metallic straps (132) to the frame (101). Also, the leadframe (100) has a third metallic pad (140) in a third planar level parallel to and spaced from the second planar level and additively from the first planar level, where the third metallic pad (140) is tied by third metallic straps (131) to the second metallic pad (130).

Description

SEMICONDUCTOR PACKAGE HAVING A LEADFRAME WITH

MULTI-LEVEL ASSEMBLY PADS

[0001] This relates generally to semiconductor devices and processes, and more particularly to a structure and fabrication method of leadframes with assembly pads situated at more than one level.

BACKGROUND

[0002] A metallic leadframe for semiconductor devices provides an assembly pad as stable support for firmly positioning the semiconductor chip, and further offers a multitude of leads for bringing electrical conductors into close proximity of the chip. The remaining gaps between the tip of the leads and the chip terminals are typically bridged by thin wires (commonly coper or gold, about 25 μπι diameter).

[0003] For reasons of easy and cost-effective manufacturing, single piece leadframes are commonly manufactured from flat thin sheets of metal, such as copper (typical thickness range 120 to 250 μπι). The desired shape of the leadframe is etched or stamped from the original flat sheet. For most purposes, the length of a typical lead is considerably longer than its width.

[0004] For technical reasons of wire bonding, the chip mount pad is often desirable to position in a horizontal plane about 10 to 20 μπι downset from the starting plane of the leads. In some devices, the height difference may be greater. Consequently, those straps which connect the chip mount pad with the frame have to be bent to overcome the required height difference between the two parallel planes.

[0005] Semiconductor devices which dissipate high power or are used in high frequency telecommunications often need to be packaged so that the package allows the leadframe to expose the chip assembly pad at the bottom surface of the package in order to facilitate direct attachment of the pad to external heat sinks. In these devices, the distance between the horizontal plane of the chip mount pad and the horizontal plane of the leads (measured along a line at right angles with the planes) increases significantly. In packages with a final thickness of about 1.0 mm, the distance may be between 400 and 500 μπι. This challenge can usually be met by elongation while staying within the limits of material characteristics (such as, for copper, less than about 8%), if the distance is bridged by the strap at an inclination angle of 30° or less.

SUMMARY

[0006] In described examples, a leadframe includes a frame and multiple leads in a first horizontal plane, a first chip mount in a second horizontal plane, a second chip mount pad in a third horizontal plane, and multiple straps connecting the chip mount pads and the frame. The straps have a geometry designed so that the straps can accommodate bending and stretching in the forming process beyond the limit of simple elongation based upon inherent material characteristics. At least one of the chip mount pads extends to and through the encapsulating plastic package.

BRIEF DESCRIPTION OF THE DRAWINGS

[0007] FIG. 1 shows a perspective top view of a leadframe according to an embodiment, with semiconductor chips attached to pads at different planar levels.

[0008] FIG. 2 illustrates a perspective bottom view of the leadframe of FIG. 1, with semiconductor chips attached to pads at different planar levels.

[0009] FIG. 3 displays a perspective top view of a leadframe according to another embodiment, with semiconductor chips attached to pads at different planar levels.

[0010] FIG. 4 depicts a perspective bottom view of the leadframe of FIG. 3, with semiconductor chips attached to pads at different planar levels.

DETAILED DESCRIPTION OF EXAMPLE EMB ODFMENT S

[0011] For many device families with chips encapsulated in standard thickness packages (> 1.0 mm), the market in electronics equipment and applications calls for devices, where packages expose the chip assembly pad for effective heat dissipation, even for large chip areas and sometimes multi-chip assembly. Also, the packages should have small footprint. To expose chip mount pads in packages of more than about 1.0 mm thickness, the direct distance between the horizontal plane of the chip mount pad and the horizontal plane of the leads increases up to 260 % over the respective distance in "thin" packages (into the 1100 to 1200 μπι range). As a consequence for standard thickness packages, a copper strap elongation of more than 8 % would be required, which is beyond the elastic limit of copper leadframe materials and would result in segment cracking and breaking.

[0012] Similar difficulties arise in packages when the direct distance between the planes of the chip pad and the leads has to be bridged at angles steeper than 30°, such as 45°. Often, this steep angle is a consequence of the desire to shrink the outline of a package, i.e. the area it consumes when mounted on a printed wiring board, or to accommodate an extra-large chip pad in a fixed package. Here again, a copper strap elongation of more than 8 % would be required, which is beyond the elastic limit of copper leadframe materials.

[0013] To solve the footprint problem, example embodiments use a methodology to distribute the assembly pads over more than one level and thus widen the concept of three-dimensional leadframes.

[0014] FIG. 1 illustrates in top view an example embodiment, a leadframe generally designated 100. The same embodiment is shown in FIG. 2 as bottom view. A leadframe 300 as another example embodiment is illustrated in FIG. 3 in top view and in FIG. 4 in bottom view. Leadframes 100 and 300 serve several needs of semiconductor devices and their operation simultaneously.

[0015] Leadframe 100 comprises several portions; one portion is a frame 101, which is made of flat sheet metal. The planar level, or plane, in which frame 101 is situated, is referred to herein as first planar level; frame 101 operates in two dimensions. Respectively, leadframe 300 comprises several portions; one portion is a frame 301 in a first planar level. For manufacturing leadframes in mass production, the complete pattern of frame, pads, leads and support structures is first stamped or etched out of the original flat thin sheet of metal; example thicknesses are between about 0.25 and 0.15 mm. The first planar level is the plane of the starting sheet of metal. Starting materials include, but are not limited to, copper, copper alloys, aluminum, iron-nickel alloys, and Kovar™.

[0016] Referring to FIGS. 1 and 2, frame 101 has a plurality of leads 110 and a first assembly pad 120 extending inward from the frame; leads 110 and pad 120 are in the same first planar level, or plane, as frame 101. First pad 120 is attached to frame 101 by first strap 120a. Based on the fabrication process, leads 110 and first pad 120 are made of the same metal as frame 101. First pad 120 may be suitable for assembling a semiconductor chip 121 or a passive electronic component. However, other embodiments may have more than one assembly pad. Other devices may have no assembly pad 120 in the first planar level. A function of assembly pads 120 is to provide stable support for firmly positioning one or more semiconductor chips or passive electronic components. Because the leadframe including the pad is made of electrically conducting material, the pad may be biased, when needed, to any electrical potential required by the network involving the semiconductor device, especially the ground potential.

[0017] Referring to FIGS. 3 and 4, frame 301 analogously has a plurality of leads 310 and a first assembly pad 320 extending inward from the frame; leads 310 and pad 320 are in the same first planar level, or plane, as frame 301, and are made of the same metal as frame 301. First pad 320 is attached to frame 301 by first strap 320a. First pad 320 may be operable to assemble and thereafter support a semiconductor chip 321 or a passive electronic component. However, other embodiments may have more than one assembly pad. Other devices may have no assembly pad 320 in the first planar level.

[0018] A function of the plurality conductive leads 110 and 310 is to bring various electrical lines into close proximity of the chip. The remaining gaps between the tip of the leads and the terminals of the chips are usually bridged by thin wires, individually bonded to the chip terminals and the leads 110 and 310. In FIG. 1, a few of the bonding wires are shown as ball and stitch bond connections and are designated 150.

[0019] As FIGS. 1 and 2 indicate, example embodiment 100 further includes a second metallic pad 130 in a second planar level, which is parallel to the first level yet spaced from it by a distance. Similarly in FIGS. 3 and 4, embodiment 300 includes a second metallic pad 330 in a second planar level, which is parallel to the first lever yet spaced from it by a distance. It should be mentioned that herein the distance between the plane of the first level and the plane of the second level is to be considered along an axis vertical to both planes. In FIG. 1, second pad 130 is sized to offer support for a chip 131 and is connected to a lead 111 of leadframe 100 by second strap 132 in order to enable access to a discrete input/output bias for attached chip 131 or passive component, as provided by lead 111. With the help of strap 131, this discrete bias can further be transmitted to third pad 140.

[0020] In contrast, in FIG. 3 second pad 330 is designed solely as a support pad for strap 332 at the second planar level; strap 332 is attached to input/output lead 311. Pad 330 in turn is connected to third pad 340 by strap 331; consequently, third pad 340 can be biased at the potential of lead 311. The advantage of introducing interim support level 330 is that without level 330, strap 332 would have to be designed overly long for connecting third pad 340 to lead 311. Overly long straps are difficult to handle in the manufacturing processes. Alternatively, straps like strap 332 can be designed in a configuration suitable to accommodate bending and stretching beyond the limit of simple elongation based upon inherent material characteristics. Such configurations may be selected from a group including bent geometry, curved geometry, and toroidal geometry.

[0021] As shown by the embodiment in FIGS. 1 and 2, inside frame 101 is a third metallic pad 140 at a third planar level parallel to and spaced from the second level. Because the distances between levels are additive, the third level is even further distant from the first level than the second level. Preferably, third pad 140 is so far removed from the first level of frame 101 that the bottom surface 140a is exposed from a future device package 160 and can thus be used, when having a solderable surface metallurgy, to be solder-attached directly to a board or a heat sink. Third pad 140 may be sized to offer support for one of more semiconductor chips or passive components. In the example embodiment of FIGS. 1 and 2, a vertical stack of two chips 141 and 142 is attached on third pad 140, taking advantage of the deep downset of pad 140 relative to the original first level of the frame.

[0022] Analogously, the embodiment depicted in FIGS. 3 and 4 displays a third metallic pad 340 at a third planar level parallel to and spaced from the second level, which accommodates pad 320. Because the distances between levels are additive, the third level is even further distant from the first level than the second level. Preferably, third pad 340 is so far removed from the first level of frame 301 that the bottom surface 340a is exposed from a future device package and can thus be used, when having a solderable surface metallurgy, to be solder-attached directly to a board or heat sink. Third pad 340 may be sized to offer support for one of more semiconductor chips or passive components. In the example embodiment of FIG. 3, a vertical stack of two chips 341 and 342 is attached on third pad 340, taking advantage of the deep downset of pad 340 relative to the original first level of the frame. Also, pad 340 has an addition 343, which expands the area of the third pad available for assembling a chip or a passive component 344.

[0023] For manufacturing leadframes like 100 and 300 in mass production, the complete pattern of chip pads, leads and support structures is first stamped or etched from the original flat thin sheet of metal. The thicknesses of the starting sheet metal are preferably between about 0.25 and 0.15 mm. Starting materials include, but are not limited to, copper, copper alloys, aluminum, iron-nickel alloys, and Kovar™. In the stamping or etching process, an individual lead and strap of the leadframe takes the form of a thin metallic strip with its particular geometric shape determined by the design. For most purposes, the length of an example lead and strap is considerably longer than its width. [0024] Then, major parts of the leadframe are clamped in one horizontal plane, while an outside force is applied to the chip pads in order to press them into their new horizontal planes. The straps supporting the chip pads have to absorb this force by stretching; they are "pressed" into their final geometrical shape.

[0025] An outside force, applied along the length of the strap, can stretch the strap in the direction of the length, while the dimension of the width is only slightly reduced, so that the new shape appears elongated. For elongations small compared to the length, and up to a limit, called the elastic limit given by the material characteristics, the amount of elongation is linearly proportional to the force. Beyond that elastic limit, the strap suffers irreversible changes to its inner strength.

[0026] As the perspective views in FIGS. 2 and 4 illustrate, the lengths of straps such as 131, 132, and 332 is within the quoted elastic range of elongation (approximately 7 to 8 % of original strap length). If more elongation than this elastic limit is required, the needed elongation may be obtained by linearizing a designed-in bending. The contribution of linearizing can be obtained when a topologically long body is first designed and stamped out so that it contains curves, bendings, meanderings or similar non-linearities. An example are configurations selected from a group including bent geometry, curved geometry, and toroidal geometry. By applying force, at least part of the non-linearity is stretched or straightened so that afterwards the body is elongated.

[0027] An example of the linearizing of designed-in bending is indicated in FIG. 4 by the strap designated 335. Strap 335 originally had a curved shape indicated by the dashed contours 335a.

[0028] Another embodiment is a semiconductor device, such as illustrated in FIGS. 1 and 2. The device includes leadframe 100, semiconductor chips 121, 131, 141, and 142, and a package 160. As discussed above, leadframe 100 comprises a frame 101 of sheet metal in a first planar level, wherein the frame has metallic leads 110 and a first metallic pad 120 extending inward from the frame; the first pad is tied to the frame by first metallic straps 120a. Further, the leadframe includes a second metallic pad 130 in a second planar level parallel to and spaced from the first level; second pad 130 may be tied by second metallic straps to the frame. A third metallic pad 140 is in a third planar level parallel to and spaced from the second level and additively from the first level; third pad 140 tied by third metallic straps 131 to the second pad. Preferably, the third pad surface 140a facing away from the first pad is solderable. For example, when pad 140 is made of copper, surface 140a may include a layer of tin or may have a sequence of thin layers made of nickel, palladium, and - optionally - gold.

[0029] The terminals of the semiconductor chips are connected to respective leads before the assembly is encapsulated in a package 160. For clarity purpose, FIGS. 1 and 2 show the package as being made of transparent material and in dashed outlines. Preferably the package is made of an epoxy-based compound, which is opaque and encapsulates the chips and bonding wires, the leads, the first and second pad, and portions of the third pad, while it leaves the solderable third pad surface (140a) un-encapsulated and thus exposed to the ambient.

[0030] After completing the encapsulation process, the packaged unit undergoes the trimming and forming process steps. In the trimming process, frame 101 is removed so that the individual leads 110 are freed-up. In the forming process, the discrete leads 110 may be bent or otherwise formed to obtain the desired outline so that the completed packaged device can be inserted into or attached to a board.

[0031] Example embodiments apply to products using any type of semiconductor chip, discrete or integrated circuit. The material of the semiconductor chip may comprise silicon, silicon germanium, gallium arsenide, gallium nitride, or any other semiconductor or compound material used in integrated circuit manufacturing.

[0032] As another example, example embodiments apply to devices with one or more semiconductor chips assembled on the leadframe by attachment and electrical connection.

[0033] As yet another example, example embodiments apply to leadframes with pad planar levels used to various degrees for accommodating chips. In some devices, the pads of all levels may populated by chips. In other devices, the pad of only one level (or a few levels) may be so populated. In some devices, a pad may have more than one chip assembled. In other devices, one or more pads may be unpopulated.

[0034] Modifications are possible in the described embodiments, and other embodiments are possible, within the scope of the claims.

Claims

CLAIMS What is claimed is:

1. A leadframe comprising:

a frame of sheet metal in a first planar level, the frame having metallic leads and a first metallic pad extending inward from the frame, the first pad tied to the frame by first metallic straps;

a second metallic pad in a second planar level parallel to and spaced from the first level, the second pad tied by second metallic straps to the frame; and

a third metallic pad in a third planar level parallel to and spaced from the second level and additively from the first level, the third pad tied by third metallic straps to the second pad.

2. The leadframe of Claim 1 wherein the second pad is further tied by second straps to one or more leads.

3. The leadframe of Claim 1 wherein the third pad is further tied by third straps to the frame.

4. The leadframe of Claim 1 wherein the third pad is further tied by third straps to one or more leads.

5. The leadframe of Claim 1 further including configurations of the first and second straps suitable to accommodate bending and stretching beyond the limit of simple elongation based upon inherent metal characteristics.

6. The leadframe of Claim 5 wherein the configurations are selected from a group including bent geometry, curved geometry, and toroidal geometry.

7. The leadframe of Claim 1 wherein one or more pads in the first, second, and third level are suitable to serve as mount pads for semiconductor chips or passive electronic components.

8. The leadframe of Claim 1 wherein the third pad surface facing away from the first pad is solderable.

9. A semiconductor device comprising:

a leadframe including:

a third metallic pad in a third planar level parallel to and spaced from the second level and additively from the first level, the third pad tied by third metallic straps to the second pad, the third pad surface facing away from the first pad being solderable;

at least one semiconductor chip attached to at least one of the pads and connected to adjacent leads; and

a package encapsulating the at least one chip, the leads, the first and second pad, and portions of the third pad, while leaving the solderable third pad surface un-encapsulated and exposed to the ambient.