WO2017012262A1 - 一种基于贪婪算法的电子元件传热优化排布方法 - Google Patents

一种基于贪婪算法的电子元件传热优化排布方法 Download PDF

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WO2017012262A1
WO2017012262A1 PCT/CN2015/098521 CN2015098521W WO2017012262A1 WO 2017012262 A1 WO2017012262 A1 WO 2017012262A1 CN 2015098521 W CN2015098521 W CN 2015098521W WO 2017012262 A1 WO2017012262 A1 WO 2017012262A1
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component
temperature
substrate
area
layout
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陈凯
汪双凤
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South China University of Technology SCUT
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/20—Design optimisation, verification or simulation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2119/00—Details relating to the type or aim of the analysis or the optimisation
    • G06F2119/08—Thermal analysis or thermal optimisation

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  • the invention relates to an optimized arrangement method of electronic components, in particular to a method for optimal heat transfer arrangement of electronic components based on a greedy algorithm.
  • the substrate is filled with a high thermal conductivity material (such as graphite, carbon fiber, etc.) to construct an efficient heat conduction channel to efficiently derive the heat generated by the component.
  • Optimization methods such as configuration theory, bionic method, combined optimization algorithm (genetic algorithm, simulated annealing algorithm) are used to optimize the distribution of high thermal conductivity materials in the substrate, which can optimize the heat transfer process and reduce the temperature of the substrate and electronic components. .
  • the present invention provides a method for optimal heat transfer arrangement of electronic components based on a greedy algorithm.
  • An optimistic arrangement method for heat transfer of electronic components based on greedy algorithm including the following
  • S1-1 divides the substrate on which the electronic component is placed into a plurality of square grids of equal size, each grid being a position at which the electronic component is allowed to be placed;
  • S1-2 equates the electronic component on the substrate into a heat source, takes the substrate region as a calculation domain, and numerically solves the temperature control equation to obtain a temperature distribution of the substrate region;
  • S1-3 analyzes the layout of the existing electronic components, and combines the size of the electronic component to be placed, and determines the area where the component can be placed and the area where the component cannot be placed;
  • S1-5 repeats S1-2 to S1-4 until the number of electronic components to be discharged reaches the specified number, and then goes to S1-6, otherwise returns to step S1-2.
  • S1-6 calculates the temperature distribution of the substrate region at the end of the S1-5, evaluates the target function value of the layout, records the obtained component layout and the objective function value as the optimal layout information, and ends the placement phase;
  • S2-1 sequentially takes out the electronic components according to the order in which the electronic components are placed in the substrate in S1-4, and recalculates the temperature distribution of the substrate every time one electronic component is taken out;
  • S2-2 analyzes the existing electronic component layout on the substrate, and determines the area where the component can be placed in combination with the size of the component to be placed;
  • S2-3 places the removed electronic component in a grid with the lowest temperature in the area where the component can be placed;
  • S2-4 calculates the temperature distribution of the adjusted substrate region, evaluates the objective function value of the layout, compares with the optimal layout information recorded by S1-6, and updates the optimal layout and its objective function value if it is better than;
  • S2-5S2-1 to S2-4 are one-time layout adjustment.
  • the adjustment is stopped, and the optimal component layout is recorded to optimize the final heat transfer of the electronic components.
  • the temperature field is a uniform temperature field, and the position of the first electronic component to be placed needs to be manually determined.
  • the objective function value of the final heat transfer optimization arrangement of the electronic component includes the regional maximum temperature, the regional average temperature or the regional temperature standard deviation
  • T max is the highest temperature of the region
  • T i is the temperature of the i-th position after the region is dispersed
  • N is the number of locations in the region where the temperature is examined.
  • T mean is the average temperature of the area.
  • ⁇ T is the standard deviation of temperature
  • the electronic component on the substrate is equivalent to a heat source having a heat source area and a heat source intensity, wherein the heat source area is equal to an area occupied by the electronic component on the substrate, and the heat source intensity is the electronic component heating power divided by the heat source area.
  • the electronic components placed in the substrate are placed in each of the grids of the substrate. If the components overlap with any of the existing components in the substrate, the grid is determined to be a non-displaceable component grid, otherwise it is determined to be a component network. Grid, when traversing all the grids, each grid is set to put the component grid or the component grid, the component grid can be combined to be called the component area, and the component grid can not be combined. It is called the non-displaceable component area.
  • the optimization process is simple: the proposed algorithm has three key technical steps in the optimization process. First, according to the existing electronic component layout and the size of the component to be placed, the component area can be placed; secondly, the substrate temperature field is calculated according to the position of the electronic component and the boundary condition of the substrate; and the third is to place the component to be placed in the area where the component can be placed. The lowest temperature grid, the entire optimization process is simple to implement, without complicated calculation methods;
  • the optimization criterion of the greedy algorithm is selected as The electronic component is placed at the lowest temperature in the temperature field. This criterion is expected to reduce the maximum temperature of the whole field and reduce the temperature difference of the substrate to improve the temperature uniformity. Since the above optimization criteria are not exactly the same as the optimization goal (the lowest substrate temperature, the lowest average temperature, or the lowest temperature standard deviation), the layout obtained during the component placement phase is not necessarily the global optimal solution, so the algorithm includes In the component adjustment stage, the heat transfer performance of the component layout is further improved by repeatedly adjusting the position of each electronic component. Therefore, the proposed algorithm can be used to obtain a layout of electronic components with good heat transfer performance;
  • the optimization criterion of the present invention only relates to the temperature distribution of the substrate, and is independent of the shape, physical property parameters and heat dissipation conditions of the substrate, and is not affected by the shape and heat generation of the component. Therefore, the algorithm involved Can be extended to solve similar problems, including irregularly shaped substrates, non-uniform thermal conductivity substrates, various complex heat dissipation conditions, electronic components of different shapes and sizes, etc.
  • the present invention studies the problem of optimal heat transfer arrangement of electronic components. Compared with the prior art, the research results of the present invention do not need to introduce additional materials and processing costs, and only need to adjust the layout of electronic components. Strong practicality can be used to guide the layout design of electronic components, improve the heat transfer performance of electronic components without increasing the cost, and achieve the purpose of reducing component temperature and improving temperature uniformity.
  • Figure 1 is a flow chart of the operation of the present invention
  • FIG. 2 is a schematic diagram of a calculation area of a substrate according to an embodiment of the present invention.
  • a method for optimal heat transfer of electronic components based on greedy algorithm comprising a component placement phase and a component adjustment phase, the conditions including substrate shape, material, heat dissipation boundary, shape and number of electronic components, according to given conditions,
  • the heat is generated, and then based on the numerical calculation of the temperature field, the electronic component is added to the lowest temperature one by one to obtain the component layout corresponding to the heat transfer optimization, and the heat transfer performance of the component layout is improved by adjusting the position of the component one by one.
  • the substrate used in this embodiment has an area of 0.1 m ⁇ 0.1 m, a length L of 0.1 m, and a thermal conductivity (k) of 1 W/(m K), as shown in FIG. 2; a width ( ⁇ ) of the lower boundary of the substrate is
  • the thermal layer of 0.001 m has a temperature (T 0 ) of 298 K, and the remaining boundaries are insulated; 20 electronic components of 0.01 m ⁇ 0.01 m are added to the substrate, and the heating power of each component is 1 W.
  • the invention solves the problem of optimal heat transfer arrangement of the electronic component, and the optimization goal is that the maximum temperature of the substrate is minimized, and the number of layout adjustments is adjusted three times for each electronic component, that is, the total adjustment is 60 times.
  • FIG. 1 is a flow chart of the present invention, the specific steps are as follows:
  • S1-1 divides the substrate on which the electronic component is placed into square grids of equal size, each of which is a position at which the electronic component is allowed to be placed.
  • the state of the grid is divided into two types: a dropable component and a non-displaceable component.
  • S1-2 takes the substrate area in the embodiment as a calculation domain, and the existing electronic component on the substrate is equivalent to a heat source, and according to the physical properties of the substrate and the heat dissipation boundary condition, the temperature calculation equation is numerically solved to obtain the temperature distribution of the calculated area of the substrate;
  • the entire field is divided into a playable component area and a non-displaceable component area according to the existing electronic component layout and the size of the component to be placed.
  • the grid is determined to be a non-displaceable component grid, otherwise It is a grid of components.
  • each mesh is defined as a component mesh or a component mesh.
  • the grid of the component elements can be combined to be called the component area, and the grid of the component elements cannot be placed together.
  • an electronic component to be placed is placed in a grid having the lowest temperature in the area where the component can be placed, and the order in which each electronic component is placed in the substrate is marked.
  • the full field temperature is uniform, and the position of the first component needs to be manually determined. Place the first electronic component in the center of the thermal layer where heat dissipation is best.
  • S1-5 repeats S1-2 to S1-4 until the number of electronic components to be discharged reaches the specified number, and then proceeds to S1-6, otherwise returns to step S1-2.
  • the temperature field including the first electronic component to be discharged is recalculated, and the area where the component can be placed and the region where the component cannot be placed are determined, and the next electronic component to be placed is placed. Place the lowest temperature grid in the component area and mark the order in which the electronic components are placed in the substrate. Repeat this step until all the electronic components to be placed are placed.
  • S2-1 sequentially takes out the electronic components according to the order in which the electronic components are placed in the substrate in S1-4, and each time an electronic component is taken out, the numerical method is used to recalculate the temperature distribution of the substrate;
  • S2-3 places the removed electronic component in a grid with the lowest temperature in the area where the component can be placed;
  • S2-4 calculates the temperature distribution of the adjusted substrate region, evaluates the objective function value of the layout, compares with the optimal layout information recorded by S1-6, and updates the optimal layout and its objective function value if it is better than;
  • S2-5S2-1 to S2-4 are one-time layout adjustment.
  • the adjustment is stopped, and the optimal component layout is recorded to optimize the final heat transfer of the electronic components.
  • the number of adjustments of each electronic component specified in this embodiment is three, and after the adjustment phase is over, the optimal layout of the recording is the final optimized arrangement.
  • the objective function may be the highest temperature of the region, the average temperature, or the standard deviation of the temperature, and the calculation formulas of the three are as follows.
  • T max is the highest temperature of the region
  • T i is the temperature of the i-th position after the region is dispersed
  • N is the number of locations in the region where the temperature is examined.
  • T mean is the average temperature of the area.
  • the temperature uniformity of the zone is characterized by the standard deviation of the temperature, calculated as:
  • ⁇ T is the standard deviation of temperature
  • FIG 3 shows the optimized layout of the electronic components optimized by the present invention and the corresponding temperature field.
  • Figure 4 shows the corresponding temperature field when the electronic components are in a uniform layout.
  • the boxes indicate electronic components. It can be seen that the optimized electronic components tend to be concentrated near the hot layer with better heat dissipation conditions. After optimization, the hot spot temperature (the highest temperature) is significantly decreased, and the temperature field uniformity is also significantly improved.
  • the hot spot temperatures of the optimized layout and uniform layout were 329.5K and 337.5K, respectively, and the hot spot temperature decreased by 8.0K after optimization; the temperature standard deviation of the two was 1.3K and 3.3K, respectively, and the standard deviation was reduced by 60.6%.

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Abstract

一种基于贪婪算法的电子元件传热优化排布方法，包括元件放置阶段及元件调整阶段，该方法将基板划分为多个大小相等的正方形网格，以基板区域为计算域，数值求解基板区域的温度分布，分析已有电子元件布局，根据温度分布，将待放电子元件放入可放元件区域中温度最低的网格中，并记录放入的顺序，然后进入元件调整阶段，具体是将电子元件按照放入顺序取出，每取出一个电子元件，均重新计算基板的温度分布，确定可放元件的区域，将取出的电子元件放入温度最低的网格，得到最优布局。该方法具有优化过程简单、优化速度快、性能指标好、扩展性高、实用性强等优点。

Description

一种基于贪婪算法的电子元件传热优化排布方法 技术领域
本发明涉及一种电子元件优化排布方法，特别涉及一种基于贪婪算法的电子元件传热优化排布方法。
背景技术
随着微电子技术的发展，电子器件的体积越来越小，热流密度越来越大，散热问题已经成为电子器件微型化的瓶颈问题之一。电子器件由许多大大小小的电子元件组成，这些电子元件在工作过程中持续产生热量。若这些热量不能被及时带走，将使器件整体温度升高，超过温度阈值将对器件造成破坏，影响仪器设备的正常工作，严重时还会造成安全事故。另一方面，一些元件、仪器、设备，如电子芯片、LED灯等，对温度均匀性有较高的要求，温度不均匀将产生局部高温，破坏器件的一致性，最终导致整体性能的下降。因此，需要采用合适的强化换热技术，高效地带走电子器件在工作过程中产生的热量，使其在合适的温度范围内工作，从而保证电子设备安全正常地运行。目前，对于微型电子器件的散热，主要是在基板上填充高热导率材料(如石墨、碳纤维等)构造高效导热通道将元件产生的热量高效地导出。采用构型理论、仿生方法、组合优化算法(遗传算法、模拟退火算法)等优化方法对高热导率材料在基板中的分布进行优化，可以达到优化热量传递过程，降低基板和电子元件温度的效果。然而，优化得到的高热导率材料分布往往比较复杂，在实际工程应用中，严格按照优化结果加工高热导率材料的分布十分困难，因此通过填充高热导率材料难以达到预期的传热效果。此外，高热导率材料的填充和加工也大大提高了电子器件的成本，在一定程度上影响了器件在实际应用中的经济效益。
发明内容
为了克服现有技术存在的缺点与不足，本发明提供一种基于贪婪算法的电子元件传热优化排布方法。
本发明采用如下技术方案：
一种基于贪婪算法的电子元件传热优化排布方法，包括如下
S1进行元件放置，具体如下：
S1-1将放置电子元件的基板划分为多个大小相等的正方形网格，每个网格为电子元件允许放置的位置；
S1-2将基板上的电子元件等效为热源，以基板区域为计算域，数值求解温度控制方程，得到基板区域的温度分布；
S1-3分析已有电子元件布局，结合待放电子元件的大小，确定可放元件区域及不可放元件区域；
S1-4根据S1-2计算的温度分布，将一个待放电子元件放入可放元件区域中温度最低的网格中，同时标记该电子元件放入基板的顺序；
S1-5重复S1-2～S1-4，直到待放电子元件的数量达到指定数量，然后转到S1-6，否则返回步骤S1-2
S1-6针对S1-5结束时得到的元件布局，计算基板区域的温度分布，评估该布局的目标函数值，将得到的元件布局及目标函数值记录为最佳布局信息，放置阶段结束；
S2进行元件调整阶段，具体如下：
S2-1按照S1-4中电子元件放入基板的顺序依次取出电子元件，每取出一个电子元件，均重新计算基板的温度分布；
S2-2分析基板上已有电子元件布局，结合待放元件的大小，确定可放元件的区域；
S2-3将取出的电子元件放在可放元件区域中温度最低的网格；
S2-4计算调整后基板区域的温度分布，评估布局的目标函数值，与S1-6记录的最佳布局信息进行比较，优于则更新最佳布局及其目标函数值；
S2-5S2-1至S2-4为一次布局调整，当布局调整次数达到指定调整次数时，停止调整，并记录最佳元件布局为最终的电子元件传热优化排布。
S1中的基板不含电子元件时，温度场为均匀温度场，首个待放电子元件放置位置需要人为确定。
所述最终的电子元件传热优化排布的目标函数值包括区域最高温度、区域平均温度或区域温度标准差
区域最高温度的计算公式为：
Figure PCTCN2015098521-appb-000001
其中Tmax为区域的最高温度，Ti为区域离散后中第i个位置的温度，N为区域中考察温度的位置数量。
区域平均温度的计算公式为：
Figure PCTCN2015098521-appb-000002
其中Tmean为区域的平均温度。
区域的温度标准差来表征，计算公式为：
Figure PCTCN2015098521-appb-000003
其中σT为温度的标准差。
所述将基板上的电子元件等效为热源，所述热源具有热源面积和热源强度，其中热源面积等于电子元件在基板上占有的面积，热源强度为电子元件发热功率除以热源面积。
放入基板的电子元件试放在基板的每一个网格中，若该元件与基板中已有的任一元件重叠时，该网格定为不可放元件网格，否则定为可放元件网格，当遍历所有网格时，每个网格都被定为可放元件网格或者不可放元件网格，可放元件网格合起来称为可放元件区域，不可放元件网格合起来称为不可放元件区域。
本发明的有益效果：
(1)优化过程简单：提出的算法在优化过程中，主要有三个关键技术步骤。一是根据已有电子元件布局和待放元件的大小标识可放元件区域；二是根据电子元件的位置及基板的边界条件计算基板温度场；三是将待放元件放置在可放元件区域中的温度最低的网格，整个优化过程实施简单，不含复杂的计算方法；
(2)优化速度快：算法的主要计算量来自基板的温度场计算。温度的控制方程为纯扩散方程，不含对流项，计算速度快。优化过程中温度场的计算次数为元件布局中元件个数的量级，计算次数少，因此在较短的时间内就能得到电子元件的优化布局；
(3)性能指标好：当作为热源的电子元件放置在基板上时，会引起基板全场温度的升高，其中加入的元件所在位置的温升最大，因此，贪婪算法的优化准则选为将电子元件放入温度场中最低温度的位置，采用此准则有望减小全场的最高温度，同时减小基板的温差，达到改善温度均匀性的目的。鉴于上述优化准则与优化目标(基板最高温度最低、平均温度最低或者温度标准差最小)并不完全一致，元件放置阶段得到的布局不一定是全局最优解，因此算法包含 了元件调整阶段，通过反复调整每个电子元件的位置，进一步提高元件布局的传热性能。因此，采用提出的算法可以得到传热性能良好的电子元件布局；
(4)扩展性好：本发明的优化准则仅仅涉及基板的温度分布，与基板的形状、物性参数和散热条件无关，同时也不受元件的形状和发热量的影响，因此，所涉及的算法可扩展至类似问题的求解，包括非规则形状的基板、非均匀热导率的基板、各种复杂的散热条件、不同形状和大小的电子元件等；
(5)实用性强：本发明研究电子元件的传热优化排布问题，与现有技术相比，本发明研究成果不需要引入额外的材料和加工费用，仅需调整电子元件的布局，具有较强的实用性，可用于指导电子元件的布局设计，在不增加成本的基础上改善电子元件的传热性能，达到降低元件温度和提高温度均匀性的目的。
附图说明
图1是本发明的工作流程图；
图2是本发明实施例的基板计算区域示意图；
图3是本发明实施例中得到的电子元件优化布局
图4是本发明实施例中的电子元件的均匀布局。
具体实施方式
下面结合实施例及附图，对本发明作进一步地详细说明，但本发明的实施方式不限于此。
实施例
一种基于贪婪算法的电子元件传热优化排布方法，包括元件放置阶段及元件调整阶段，根据给定的条件，所述条件包括基板形状、材料、散热边界、电子元件的形状、个数、发热量等，然后基于温度场数值计算，通过电子元件逐个加入温度最低的位置，得到传热优化对应的元件布局，并采用逐个调整元件位置的方式，提高元件布局的传热性能。
本实施例采用的基板面积为0.1m×0.1m，长L为0.1m，热导率(k)为1W/(m K)，如图2所示；基板下方边界有一个宽度(δ)为0.001m的热层，温度(T0)为298K，其余边界绝热；在基板中加入20个0.01m×0.01m的电子元件，每个元件的发热功率均为1W。采用本发明求解这个电子元件传热优化排布问题，优化目标为基板最高温度最小化，布局调整次数为每个电子元件调整3次，即总共调整60次。
如图1本发明的流程图，具体步骤如下：
S1进行元件放置，具体步骤如下
S1-1将放置电子元件的基板划分为大小相等的正方形网格，每个网格为电子元件允许放置的位置。网格的状态分为可放元件和不可放元件两种。
S1-2以实施例中的基板区域为计算域，将基板上已有电子元件等效为热源，根据基板的物性和散热边界条件，采用数值求解温度控制方程得到基板计算区域的温度分布；
S1-3为了保证电子元件相互之间不重叠，根据已有电子元件布局和待放元件的大小，将全场划分为可放元件区域和不可放元件区域。将下一步放入基板的待放电子元件试放在基板的每一个网格中，若该元件与基板中已有的任一元件重叠时，该网格定为不可放元件网格，否则定为可放元件网格。当遍历所有网格时，每个网格都被定为可放元件网格或者不可放元件网格。其中可放元件网格合起来称为可放元件区域，不可放元件网格合起来称为不可放元件区域。确定了可放元件区域后，执行步骤1-4。
S1-4根据S1-2计算得到的温度分布，将一个待放电子元件放入可放元件区域中温度最低的网格中，同时标记每个电子元件放入基板的顺序。当基板中不含电子元件时，全场温度均匀，此时需要人工确定首个元件的位置。将首个电子元件放在热层中心，此处散热条件最好。
S1-5重复S1-2～S1-4，直到待放电子元件的数量达到指定数量，然后转到S1-6，否则返回步骤S1-2。
具体为，当放完第一个待放电子元件后，重新计算包含第一个待放电子元件的温度场，确定可放元件区域及不可放元件区域，将下一个待放电子元件放入可放元件区域中温度最低的网格，同时标记该电子元件放入基板的顺序，重复此步骤，直到所有待放电子元件放置完毕。
S1-6，针对S1-5结束时得到的元件布局，计算基板区域的温度分布，评估该布局的目标函数值，将得到的元件布局及目标函数值记录为最佳布局信息，放置阶段结束；
S2进行元件调整阶段，具体如下：
S2-1按照S1-4中电子元件放入基板的顺序依次取出电子元件，每取出一个电子元件，均采用数值方法，重新计算基板的温度分布；
S2-2与S1-3步骤相同的方法，分析基板上已有电子元件布局，结合待放元件的大小，确定可放元件的区域；
S2-3将取出的电子元件放在可放元件区域中温度最低的网格；
S2-4计算调整后基板区域的温度分布，评估布局的目标函数值，与S1-6记录的最佳布局信息进行比较，优于则更新最佳布局及其目标函数值；
S2-5S2-1至S2-4为一次布局调整，当布局调整次数达到指定调整次数时，停止调整，并记录最佳元件布局为最终的电子元件传热优化排布。
本实施例指定的每个电子元件的调整次数为3次，调整阶段结束后，记录的最佳布局为最终的优化排布。
所述的目标函数可以是区域的最高温度、平均温度或者温度的标准差，三者的计算公式如下。
区域最高温度的计算公式为：
Figure PCTCN2015098521-appb-000004
其中Tmax为区域的最高温度，Ti为区域离散后中第i个位置的温度，N为区域中考察温度的位置数量。
区域平均温度的计算公式为：
Figure PCTCN2015098521-appb-000005
其中Tmean为区域的平均温度。
区域的温度均匀性用温度的标准差来表征，计算公式为：
Figure PCTCN2015098521-appb-000006
其中σT为温度的标准差。
图3显示了本发明优化得到的电子元件优化布局及对应的温度场。图4为电子元件为均匀布局时对应的温度场。图中，方框表示电子元件。可以看到，优化后电子元件倾向于集中在散热条件较好的热层附近，优化后热点温度(最高温度)显著下降,温度场均匀性也得到明显改善。优化布局和均匀布局的热点温度分别为329.5K和337.5K，优化后热点温度下降了8.0K；二者的温度标准差分别为1.3K和3.3K，标准差减少了60.6％。此外，优化过程仅需进行大约20+60×2＝140次温度场计算，在个人计算机上的计算耗时约为10分钟。由此可见，该算法能在较短的时间内得到电子元件的优化布局。该实例验证了本发明对于电子元件传热优化排布的有效性。
上述实施例为本发明较佳的实施方式，但本发明的实施方式并不受所述实施例的限制，其他的任何未背离本发明的精神实质与原理下所作的改变、修饰、 替代、组合、简化，均应为等效的置换方式，都包含在本发明的保护范围之内。

Claims (5)

  1. 一种基于贪婪算法的电子元件传热优化排布方法，其特征在于，包括如下
    S1进行元件放置，具体如下：
    S1-1将放置电子元件的基板划分为多个大小相等的正方形网格，每个网格为电子元件允许放置的位置；
    S1-2将基板上的电子元件等效为热源，以基板区域为计算域，数值求解温度控制方程，得到基板区域的温度分布；
    S1-3分析已有电子元件布局，结合待放电子元件的大小，确定可放元件区域及不可放元件区域；
    S1-4根据S1-2计算的温度分布，将一个待放电子元件放入可放元件区域中温度最低的网格中，同时标记该电子元件放入基板的顺序；
    S1-5重复S1-2～S1-4，直到待放电子元件的数量达到指定数量，然后转到S1-6，否则返回步骤S1-2；
    S1-6针对S1-5结束时得到的元件布局，计算基板区域的温度分布，评估该布局的目标函数值，将得到的元件布局及目标函数值记录为最佳布局信息，放置阶段结束；
    S2进行元件调整阶段，具体如下：
    S2-1按照S1-4中电子元件放入基板的顺序依次取出电子元件，每取出一个电子元件，均重新计算基板的温度分布；
    S2-2分析基板上已有电子元件布局，结合待放元件的大小，确定可放元件的区域；
    S2-3将取出的电子元件放在可放元件区域中温度最低的网格；
    S2-4计算调整后基板区域的温度分布，评估布局的目标函数值，与S1-6记录的最佳布局信息进行比较，优于则更新最佳布局及其目标函数值；
    S2-5S2-1至S2-4为一次布局调整，当布局调整次数达到指定调整次数时，停止调整，并记录最佳元件布局为最终的电子元件传热优化排布。
  2. 根据权利要求1所述的方法，其特征在于，S1中的基板不含电子元件时，温度场为均匀温度场，首个待放电子元件放置位置需要人为确定。
  3. 根据权利要求1所述的方法，其特征在于，所述最终的电子元件传热优化排布的目标函数值包括区域最高温度、区域平均温度或区域温度标准差
    区域最高温度的计算公式为：
    Figure PCTCN2015098521-appb-100001
    其中Tmax为区域的最高温度，Ti为区域离散后中第i个位置的温度，N为区域中考察温度的位置数量。
    区域平均温度的计算公式为：
    Figure PCTCN2015098521-appb-100002
    其中Tmean为区域的平均温度。
    区域的温度标准差来表征，计算公式为：
    Figure PCTCN2015098521-appb-100003
    其中σT为温度的标准差。
  4. 根据权利要求1所述的方法，其特征在于，所述将基板上的电子元件等效为热源，所述热源具有热源面积和热源强度，其中热源面积等于电子元件在基板上占有的面积，热源强度为电子元件发热功率除以热源面积。
  5. 根据权利要求1所述的方法，其特征在于，放入基板的电子元件试放在基板的每一个网格中，若该元件与基板中已有的任一元件重叠时，该网格定为不可放元件网格，否则定为可放元件网格，当遍历所有网格时，每个网格都被定为可放元件网格或者不可放元件网格，可放元件网格合起来称为可放元件区域，不可放元件网格合起来称为不可放元件区域。
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112257321A (zh) * 2020-10-27 2021-01-22 中国人民解放军军事科学院国防科技创新研究院 基于无监督学习的卫星组件温度场确定方法
CN113569520A (zh) * 2021-07-26 2021-10-29 中山市德马汽车零部件有限公司 Pcb板电子元器件热布局的优化对比方法
CN115460895A (zh) * 2022-11-10 2022-12-09 武汉至驱动力科技有限责任公司 基于温度场图像信息的电子水泵控制器散热方法
CN118296970A (zh) * 2024-06-04 2024-07-05 中国人民解放军海军工程大学 一种电子芯片嵌入式液冷热沉的腔体结构优化方法及系统

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105138728B (zh) * 2015-07-23 2018-06-22 华南理工大学 一种基于贪婪算法的电子元件传热优化排布方法
CN107832500B (zh) * 2017-10-20 2020-01-14 华南理工大学 一种用于确定动力电池风冷系统出口位置的优化方法
CN112584665B (zh) * 2019-09-27 2022-02-15 杭州海康威视数字技术股份有限公司 一种电子设备的散热结构及其构造方法
CN114417499B (zh) * 2021-12-27 2023-02-28 中国人民解放军军事科学院国防科技创新研究院 基于神经网络代理模型的组件热布局优化设计方法
CN115081388B (zh) * 2022-06-01 2024-03-22 华南理工大学 一种电子元件发热强度分配优化方法
CN120834014B (zh) * 2025-09-18 2025-12-09 北京七星华创微电子有限责任公司 基于温度检测的芯片底部填充优化方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080168406A1 (en) * 2005-01-11 2008-07-10 Khalid Rahmat Methods and apparatuses for thermal analysis based circuit design
CN104461732A (zh) * 2014-11-04 2015-03-25 上海盈方微电子有限公司 一种应用于二维网格结构片上网络芯片的温度优化方法
CN105138728A (zh) * 2015-07-23 2015-12-09 华南理工大学 一种基于贪婪算法的电子元件传热优化排布方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8650521B1 (en) * 2011-12-01 2014-02-11 The Florida State University Research Foundation, Inc. Dendritic cooling layer generator and method of fabrication
CN103286187B (zh) * 2012-02-22 2015-11-18 上海微电子装备有限公司 一种板材落料和排版的方法及装置
US9323870B2 (en) * 2012-05-01 2016-04-26 Advanced Micro Devices, Inc. Method and apparatus for improved integrated circuit temperature evaluation and IC design

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080168406A1 (en) * 2005-01-11 2008-07-10 Khalid Rahmat Methods and apparatuses for thermal analysis based circuit design
CN104461732A (zh) * 2014-11-04 2015-03-25 上海盈方微电子有限公司 一种应用于二维网格结构片上网络芯片的温度优化方法
CN105138728A (zh) * 2015-07-23 2015-12-09 华南理工大学 一种基于贪婪算法的电子元件传热优化排布方法

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
KRAUSE, A. ET AL.: "Near-Optimal Sensor Placements in Gaussian Processes: Theory, Efficient Algorithms and Empirical Studies", JOURNAL OF MACHINE LEARNING RESEARCH, vol. 9, 29 February 2008 (2008-02-29), pages 235 - 284, XP058246451, ISSN: 1532-4435 *
WANG, NAILONG ET AL.: "VLSI Thermal Placement Optimization Using Simulated Annealing", CHINESE JOURNAL OF SEMICONDUCTORS, vol. 24, 30 April 2003 (2003-04-30), pages 427 - 432 *
ZHU, GUOXI ET AL.: "Placement Optimization of Electronic Components Based on Genetic Algorithm", COMPUTER ENGINEERING AND APPLICATIONS, vol. 43, no. 17, 15 September 2007 (2007-09-15), pages 100 - 103, ISSN: 1002-8331 *

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112257321A (zh) * 2020-10-27 2021-01-22 中国人民解放军军事科学院国防科技创新研究院 基于无监督学习的卫星组件温度场确定方法
CN113569520A (zh) * 2021-07-26 2021-10-29 中山市德马汽车零部件有限公司 Pcb板电子元器件热布局的优化对比方法
CN115460895A (zh) * 2022-11-10 2022-12-09 武汉至驱动力科技有限责任公司 基于温度场图像信息的电子水泵控制器散热方法
CN115460895B (zh) * 2022-11-10 2023-02-17 武汉至驱动力科技有限责任公司 基于温度场图像信息的电子水泵控制器散热方法
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