WO2017008002A1 - Method for synthesis of two-dimensional dichalcogenide semiconductors - Google Patents

Method for synthesis of two-dimensional dichalcogenide semiconductors Download PDF

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WO2017008002A1
WO2017008002A1 PCT/US2016/041479 US2016041479W WO2017008002A1 WO 2017008002 A1 WO2017008002 A1 WO 2017008002A1 US 2016041479 W US2016041479 W US 2016041479W WO 2017008002 A1 WO2017008002 A1 WO 2017008002A1
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transition metal
chalcogen
metal layer
epitaxial
layer
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Rachel Cannara
Emma Rae Mullen
Fred Sharifi
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Elwha LLC
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Elwha LLC
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3436—Deposited materials, e.g. layers characterised by the chemical composition being chalcogenide semiconductor materials not being oxides, e.g. ternary compounds
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B7/00—Measuring arrangements characterised by the use of electric or magnetic techniques
    • G01B7/02—Measuring arrangements characterised by the use of electric or magnetic techniques for measuring length, width or thickness
    • G01B7/06—Measuring arrangements characterised by the use of electric or magnetic techniques for measuring length, width or thickness for measuring thickness
    • G01B7/063—Measuring arrangements characterised by the use of electric or magnetic techniques for measuring length, width or thickness for measuring thickness using piezoelectric resonators
    • G01B7/066—Measuring arrangements characterised by the use of electric or magnetic techniques for measuring length, width or thickness for measuring thickness using piezoelectric resonators for measuring thickness of coating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/203—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using transformation of metal, e.g. oxidation or nitridation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2902—Materials being Group IVA materials
    • H10P14/2905—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2926—Crystal orientations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2907—Materials being Group IIIA-VA materials
    • H10P14/2908—Nitrides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2907—Materials being Group IIIA-VA materials
    • H10P14/2911—Arsenides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2918—Materials being semiconductor metal oxides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/20—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by the properties tested or measured, e.g. structural or electrical properties
    • H10P74/203—Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/23—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes
    • H10P74/238—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes comprising acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection or in-situ thickness measurement

Definitions

  • the present disclosure relates to methods for making transition metal dichalcogenide semiconductor structures.
  • the present disclosure relates to methods of making transition metal dichalcogenide semiconductor structures, such as molybdenum disulfide and tungsten diselenide.
  • the methods employ vapor phase deposition techniques to deposit a transition metal (e.g., molybdenum, tungsten, etc.) onto a substrate having a crystalline layer to form an epitaxial transition metal layer.
  • the methods can further employ chemical vapor deposition techniques to deposit a chalcogen (e.g., sulfur, selenium, etc.) onto the epitaxial transition metal layer.
  • the chalcogen can be reacted with the epitaxial transition metal layer to form a transition metal dichalcogenide (e.g., MoS 2 , WSe 2 , etc.).
  • a transition metal dichalcogenide e.g., MoS 2 , WSe 2 , etc.
  • the chalcogen is reacted with the epitaxial transition metal layer at a temperature of between about 300 °C and 600 °C, between about 300 °C and 550 °C, between about 300 °C and 500 °C, between about 300 °C and 450 °C, or between about 300 °C and 400 °C.
  • the chalcogen is reacted with the epitaxial transition metal layer at a temperature of less than about 600 °C, less than about 550 °C, less than about 500 °C, less than about 450 °C, less than about 400 °C, or less than about 350 °C.
  • FIG. 1 is a schematic illustration of a method of depositing a transition metal onto a substrate in accordance with an embodiment of the present disclosure.
  • FIG. 2 is a schematic illustration of a method of depositing a chalcogen onto an epitaxial transition metal layer in accordance with an embodiment of the present disclosure.
  • FIG. 3 is a schematic illustration of a transition metal dichalcogenide formed in accordance with an embodiment of the present disclosure.
  • FIG. 4 is a schematic illustration of a system for making a transition metal dichalcogenide in accordance with an embodiment of the present disclosure.
  • FIG. 5 is a graph of the temperature profile of an illustrative method of making a transition metal dichalcogenide in accordance with an embodiment of the present disclosure.
  • FIG. 6 is a plan view of a schematic illustration of a transition metal dichalcogenide made in accordance with the present disclosure.
  • FIG. 7 is a graph of the Raman spectroscopy of the transition metal dichalcogenide depicted in FIG. 6.
  • TMDs transition metal dichalcogenides
  • transition metal dichalcogenides which can also be referred to as transition metal dichalcogenide semiconductors or two- dimensional transition metal dichalcogenide structures, can be used in various technologies, including, but not limited to, microelectronics, optoelectronics, and bio/chemical sensing (e.g., bio-sensing, chemical sensing, gas sensing, etc.).
  • bio/chemical sensing e.g., bio-sensing, chemical sensing, gas sensing, etc.
  • the methods disclosed herein can be advantageous in many ways, and can be used to overcome and/or alleviate many problems associated with prior known manufacturing techniques, which can be difficult, inefficient, and/or unreliable.
  • FIGS. 1-3 depict an illustrative method of making or manufacturing a transition metal dichalcogenide 140 in accordance with an embodiment of the present disclosure.
  • FIG. 1 depicts a schematic view of a step of depositing a transition metal 122 onto a substrate 110
  • FIG. 2 depicts a schematic view of a step of depositing a chalcogen 130 onto an epitaxial transition metal layer 120
  • FIG. 3 depicts a schematic view of a transition metal dichalcogenide 140 formed after reacting the chalcogen 130 with the epitaxial transition metal layer 120 in accordance with the methods disclosed herein.
  • FIGS. 1-3 are schematic illustrations only and are not intended to be limiting in any way.
  • the methods of making a transition metal dichalcogenide disclosed herein can comprise a step of depositing a transition metal 122 onto a substrate 110 to form a layer 120 of transition metal.
  • this transition metal layer 120 can be arranged in an ordered or substantially ordered manner and can be referred to as an epitaxial transition metal layer 120 (or an epitaxial layer), as detailed below.
  • the terms manufacturing, fabricating, forming, etc. can also be used to describe the process (or a step thereof) of making the transition metal dichalcogenide.
  • vapor phase deposition (which can also be referred to as physical vapor deposition) can be used to describe deposition methods that employ physical processes (e.g., heating and/or sputtering) to produce a vapor of material (such as the transition metal material 122 depicted in FIG. 1), which can then be deposited or otherwise coated onto a substrate (such as the substrate 110 depicted in FIG. 1).
  • chemical vapor deposition can be used to describe deposition methods in which the substrate material (e.g., such as layer 120 depicted in FIG.
  • a precursor material such as the chalcogen material 130 depicted in FIG. 2
  • the vapor phase and/or chemical vapor deposition techniques occur under vacuum conditions. Other known deposition techniques can also be used.
  • Electron beam physical vapor deposition techniques a type of vapor phase deposition, can also be used.
  • the step of depositing a transition metal 122 onto a substrate 110 can comprise electron beam physical vapor deposition.
  • the transition metal 122 or other material can be targeted with an electron beam, causing atoms from the metal or material to transform into the gaseous phase.
  • the gaseous phase atoms can then precipitate into solid form and coat the substrate (e.g., as illustrated in FIG. 1, where the gaseous phase transition metal atoms 122 are coated onto the substrate 110).
  • the step of depositing a transition metal 122 onto a substrate 110 comprises a vapor phase deposition technique.
  • the step of depositing the chalcogen 130 onto the epitaxial transition metal layer 120 (detailed below) comprises a chemical vapor deposition technique.
  • the step of depositing a transition metal 122 onto a substrate 110 comprises a vapor phase deposition technique
  • the step of depositing the chalcogen 130 onto the epitaxial transition metal layer 120 comprises a chemical vapor deposition technique.
  • the method further comprises a step of obtaining a substrate 110 upon which a transition metal 122 can be deposited.
  • a substrate can refer to any substance or layer upon which another substance is deposited.
  • Illustrative materials that can be included in the substrate 110 include, but are not limited to, aluminum nitride (A1N), gallium nitride (GaN), gallium arsenide (GaAs), titanium dioxide (Ti0 2 ), Si (silicon), and aluminum oxide (A1 2 0 3 ). Other materials can also be used.
  • the substrate 1 10 can include a first layer and a second layer.
  • the first layer comprises a base layer 1 12, and the second layer comprises a crystalline layer 1 14.
  • the thicknesses of the layers 1 12, 1 14 can be different, or the thicknesses of the layers 1 12, 1 14 can be the same, depending on the substrate 1 10 that is used.
  • the base layer 1 12 of the substrate 1 10 can comprise various materials, including, but not limited to, silicon and/or aluminum oxide (A1 2 0 3 ).
  • the material of the base layer 1 12 can also be arranged in an ordered or substantially ordered manner, pattern, crystalline, or lattice structure, such as silicon having an orientation or Miller index of (1 1 1) (i.e., Si(l l l)), or c-plane sapphire aluminum oxide (A1 2 0 3 ). Other materials and arrangements can also be used.
  • the crystalline layer 1 14 can also comprise various materials, including, but not limited to, aluminum nitride (A1N), gallium nitride (GaN), gallium arsenide (GaAs), titanium dioxide (Ti0 2 ) and aluminum oxide A1 2 0 3 . Further, in some embodiments, the crystalline layer 1 14 comprises materials that are arranged in an ordered or substantially ordered manner. For example, the crystalline layer 1 14 can comprise a selected pattern, crystalline, or lattice structure. In various embodiments, the crystalline layer 1 14 comprises a material having an orientation or Miller index of (100) or (1 10), including, but not limited to A1N(100), GaN(100), GaAs(100), and/or TiO 2 (1 10). In other of such embodiments, the substrate 1 10, and/or the crystalline layer 1 14, comprises c-plane sapphire aluminum oxide (A1 2 0 3 ).
  • a crystalline layer 1 14 in the substrate 1 10 can be advantageous in many ways.
  • a crystalline layer 1 14 having a particular crystalline structure can help facilitate deposition or growth of the transition metal 122 in a desired or selected arrangement and/or lattice structure.
  • the deposition or growth of the transition metal 122 upon the substrate 1 10 can be dependent upon the crystalline structure of the crystalline layer 1 14.
  • the surface of the crystalline layer 1 14 can act as a template for the deposition or growth of the transition metal 122.
  • the crystalline layer 1 14 can cause the transition metal 122 deposited thereon to grow (or otherwise be deposited) in an arranged manner or pattern, resulting in an epitaxial transition metal layer 120 having a particular crystalline or lattice structure.
  • the crystalline structure or arrangement of the epitaxial transition metal layer 120 can be predetermined and selected depending on the structure (which can be known) of the underlying crystalline layer 114 of the substrate 110.
  • the epitaxial transition metal layer 120 can also be referred to as an epitaxial layer or epitaxial overlay er 120, and the deposition process can be referred to as an epitaxial growth process.
  • the ordered or substantially ordered arrangement of the transition metal atoms 122 in the epitaxial transition metal layer 120 can be advantageous and/or optimized for further processing steps.
  • the reaction temperatures for further processing steps e.g., steps of reacting a chalcogen with the epitaxial transition metal layer
  • a transition metal 122 can be deposited thereon.
  • Various types of transition metals 122 can be used, including, but not limited to, molybdenum, tungsten, and tantalum. Other transition metals can also be used.
  • the transition metal 122 is deposited onto the substrate 110 to form an epitaxial transition metal layer 120 using vapor phase deposition techniques (e.g., electron beam physical vapor deposition).
  • the epitaxial transition metal layer 120 comprises a selected arrangement, crystalline and/or lattice structure.
  • the epitaxial transition metal layer 120 comprises a hexagonal crystalline and/or lattice structure (e.g., a two-dimensional or 2D hexagonal crystalline and/or lattice structure).
  • the epitaxial transition metal layer 120 comprises an orientation or Miller index of (111).
  • the epitaxial transition metal layer 120 comprises molybdenum (111).
  • the transition metal 122 can be deposited to form a single monolayer, or several monolayers, which can be referred to as a single epitaxial monolayer or an epitaxial layer with several monolayers, respectively.
  • the epitaxial layer comprises between about 1 and 5 monolayers, 1 and 4 monolayers, 1 and 3 monolayers, or 1 and 2 monolayers.
  • the thickness of each monolayer can be between about 1 and 5 angstroms (with a 5 monolayer structure being between about 5 and 25 angstroms). Structures having greater thicknesses (or lesser thicknesses) can also be made.
  • a step of depositing a chalcogen 130 onto the epitaxial transition metal layer 120 can be performed, as shown in FIG. 2.
  • Illustrative chalcogens 130 that can be used include, but are not limited to, sulfur (S or S 2 ) and selenium (Se). Other chalcogens 130 can also be used.
  • the chalcogen 130 is deposited onto the epitaxial transition metal layer 120 using chemical vapor deposition techniques. Further, in particular embodiments, a portion of the chalcogens 130 diffuse or otherwise move through the epitaxial transition metal layer 120. As part of the chemical vapor deposition process (or independent thereof), the chalcogens 130 can also react, be reacted with, or otherwise interact with the epitaxial transition metal layer 120 to form one or more transition metal dichalcogenide monolayers.
  • reacting the chalcogens 130 with the epitaxial transition metal layer 120 is performed at elevated temperatures.
  • the reaction temperature can be between about 300 °C and 600 °C, between about 300 °C and 550 °C, between about 300 °C and 500 °C, between about 300 °C and 450 °C, or between about 300 °C and 400 °C.
  • the reaction temperature is less than about 600 °C, less than about 550 °C, less than about 500 °C, less than about 450 °C, less than about 400 °C, or less than about 350 °C.
  • the resulting transition metal dichalcogenide monolayer can then be cooled, and in some instances, removed from the substrate 110 and used in various ways.
  • Exemplary uses include use in microelectronics, optoelectronics, and bio/chemical sensing (e.g., bio-sensing, chemical sensing, gas sensing, etc.).
  • FIG. 3 An exemplary transition metal dichalcogenide 140 formed in accordance with the methods disclosed herein is depicted in FIG. 3. As shown therein, a portion of the chalcogens 130 have diffused through the previously prepared epitaxial transition metal layer 120, and the resulting transition metal dichalcogenide 140 monolayer comprises a single layer of transition metal 122 sandwiched between two layers of chalcogen 130. Such a transition metal dichalcogenide 140 can be referred to as a monolayer or two- dimensional transition metal dichalcogenide 140.
  • multiple monolayers of transition metal dichalcogenide 140 can be formed (e.g., such as when multiple layers of transition metals are disposed on the substrate), each of which can comprise a single layer of transition metal 122 sandwiched between two layers of chalcogen 130.
  • the transition metal dichalcogenide 140 can comprise between about 1 and 5 monolayers, 1 and 4 monolayers, 1 and 3 monolayers, or 1 and 2 monolayers.
  • the thickness of each transition metal dichalcogenide monolayer 140 can be between about 0.1 and 1.5 nm.
  • transition metal dichalcogenides 140 can be formed in accordance with the methods disclosed herein.
  • Illustrative transition metal dichalcogenides include, but are not limited to, molybdenum disulfide (MoS 2 ) and tungsten diselenide (WSe 2 ).
  • MoS 2 molybdenum disulfide
  • WSe 2 tungsten diselenide
  • the transition metal dichalcogenides formed in accordance with the methods disclosed herein can also comprise a two-dimensional or 2D hexagonal structure, which can have a relatively broad electronic bandgap and can be useful in a variety of technologies.
  • the methods further comprise a step of heating the chalcogen 130.
  • the chalcogen 130 can be heated prior to being deposited onto the epitaxial transition metal layer 120.
  • the chalcogen 130 can be heated to a temperature of at least about 100 °C, 150 °C, or 200 °C, or more.
  • the heated chalcogen 130 can then be delivered to and deposited onto the epitaxial transition metal layer 120.
  • heating the chalcogen 130 can aid in providing a chalcogen 130 vapor that is deposited onto and/or reacted with the epitaxial transition metal layer 120.
  • one or more carrier gases can also be used to aid in delivering the chalcogen 130 to the epitaxial transition metal layer 120.
  • an inert gas is used to deliver the chalcogen 130 to the epitaxial transition metal layer 120.
  • Exemplary carrier gases that can be used include, but are not limited to, argon and other inert gases.
  • lithographic patterning and/or etching arts can also be used.
  • a portion of the substrate 110 can be masked or otherwise processed to control the spatial placement and registry of the transition metal 122 on the substrate 110.
  • the growth or deposition of the transition metal 122 on the substrate 110 can also be monitored.
  • the growth of the epitaxial transition metal layer 120 can be monitored with an oscillator, or a microbalance oscillator, which can measure the thickness of the growth layer. Monitoring such thicknesses can aid in making an epitaxial transition metal layer 120 having a desired number of monolayers (e.g., between 1 and 5, 1 and 4, 1 and 3, or 1 and 2).
  • Other known manufacturing techniques e.g., semiconductor manufacturing techniques
  • steps can also be used.
  • FIG. 4 depicts an illustrative system 150 for making a transition metal dichalcogenide semiconductor structure in accordance with the embodiments of the present disclosure.
  • a carrier gas 152 can be delivered into the reaction system 150, as indicated by the reference arrow.
  • the carrier gas 152 is delivered into a first chamber or furnace 154 comprising a chalcogen 151.
  • the first chamber 154 is maintained at a temperature of at least about 100 °C, 150 °C, or 200 °C, which can be sufficient to heat the chalcogen 151 and produce a vapor for reacting with the epitaxial transition metal layer.
  • the carrier gas 152 and heated chalcogen 151 can then be delivered into a second chamber or furnace 156 containing one or more processed substrates 153 that have been coated with an epitaxial transition metal layer, as described herein.
  • the second chamber or furnace 156 can also be referred to as a reaction chamber.
  • the temperature of the second chamber 156 can be between about 300 °C and 600 °C, between about 300 °C and 550 °C, between about 300 °C and 500 °C, between about 300 °C and 450 °C, or between about 300 °C and 400 °C.
  • the temperature of the second chamber 156 is less than about 600 °C, less than about 550 °C, less than about 500 °C, less than about 450 °C, less than about 400 °C, or less than about 350 °C.
  • a chalcogen trap (e.g., a sulfur trap) 155 can also be used to capture excess chalcogen flowing through the second chamber 156.
  • the temperatures of the first and second chambers 154, 156 can be controlled independently.
  • the process can be terminated, the chambers 154 and/or 156 cooled, and/or the resulting transition metal dichalcogenide can be removed from the system 150.
  • the transition metal dichalcogenides can then be further processed (e.g., removed from the substrate 153) or otherwise used as desired.
  • a substrate was obtained having a c-axis oriented aluminum nitride (A1N(100)) crystalline layer and a silicon (Si(l l l)) base layer.
  • the thickness of the A1N(100) crystalline layer was about 200 nm.
  • Molybdenum was then deposited on the crystalline layer of the substrate by electron beam physical vapor deposition techniques under vacuum conditions to form an epitaxial molybdenum layer of Mo(l l l).
  • the processed substrate, including the epitaxial molybdenum layer was then placed in a reaction chamber for further processing.
  • the reaction chamber was heated and maintained at a temperature of between about 300 °C and 400 °C throughout the reaction process.
  • Sulfur heated to a temperature of between about 200 °C and 250 °C, was then continuously delivered to the reaction chamber using an argon carrier gas for a period of about 30 minutes while the sulfur reacted with the epitaxial molybdenum layer of Mo(l l l) to form a molybdenum disulfide transition metal dichalcogenide.
  • the process was then terminated, and the reaction chamber was allowed to cool.
  • a graph of the reaction temperature and sulfur temperature versus the reaction time is shown in FIG. 5, where the temperature of the reaction chamber is depicted by the line 156, and the temperature of the sulfur source is depicted by the line 154.
  • a molybdenum disulfide transition metal dichalcogenide made in accordance with the methods disclosed herein was prepared using a method similar to that disclosed in Example 1. Molybdenum was used as the transition metal, and sulfur was used as the chalcogen. The reaction temperature for reacting the sulfur and the epitaxial molybdenum layer was about 400 °C. Further, as a control, a portion of the substrate was masked and covered prior to depositing the molybdenum onto the substrate. A schematic plan view depicting the resulting molybdenum disulfide is depicted in FIG. 6, where section A represents the masked surface, and sections B and C represent the unmasked surfaces that resulted in molybdenum disulfide.
  • the method resulted in the successful formation of a molybdenum disulfide monolayer at a reaction temperature of between about 300 °C and 600 °C.
  • a method of making a transition metal dichalcogenide comprising:
  • the substrate comprises at least one of aluminum oxide (A1 2 0 3 ), aluminum nitride (A1N), gallium nitride (GaN), gallium arsenide (GaAs), or titanium dioxide (Ti0 2 ).
  • the crystalline substrate comprises at least one of AIN(IOO), GaN(100), GaAs(100), or TiO 2 (110).
  • the substrate further comprises a base layer, wherein the crystalline layer is disposed on the base layer.
  • the base layer comprises at least one of silicon or aluminum oxide (A1 2 0 3 ).
  • transition metal comprises at least one of molybdenum, tungsten, or tantalum.
  • transition metal dichalcogenide comprises molybdenum disulfide or tungsten diselenide.
  • the epitaxial transition metal layer comprises a monolayer.
  • a method of making a transition metal dichalcogenide comprising:
  • the substrate comprises at least one of aluminum oxide (A1 2 0 3 ), aluminum nitride (A1N), gallium nitride (GaN), gallium arsenide (GaAs), or titanium dioxide (Ti0 2 ).
  • the crystalline substrate comprises at least one of AIN(IOO), GaN(100), GaAs(100), or TiO 2 (110).
  • the substrate further comprises a base layer, wherein the crystalline layer is disposed on the base layer.
  • the base layer comprises at least one of silicon or aluminum oxide (A1 2 0 3 ).
  • transition metal comprises at least one of molybdenum, tungsten, or tantalum.
  • transition metal dichalcogenide comprises molybdenum disulfide or tungsten diselenide.
  • the epitaxial transition metal layer comprises a monolayer.
  • a method of making a transition metal dichalcogenide comprising:
  • the substrate comprises at least one of aluminum oxide (A1 2 0 3 ), aluminum nitride (A1N), gallium nitride (GaN), gallium arsenide (GaAs), or titanium dioxide (T1O 2 ).
  • the crystalline substrate comprises at least one of AIN(IOO), GaN(100), GaAs(100), or TiO 2 (110).
  • the substrate further comprises a base layer, wherein the crystalline layer is disposed on the base layer.
  • the base layer comprises at least one of silicon or aluminum oxide (A1 2 0 3 ).
  • transition metal dichalcogenide comprises molybdenum disulfide or tungsten diselenide.

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Abstract

The present disclosure relates to methods of making a transition metal dichalcogenide. The methods can include a step of depositing a transition metal onto a substrate to form an epitaxial transition metal layer. The methods can also include a step of depositing a chalcogen onto the epitaxial transition metal layer, and a step of reacting the chalcogen with the epitaxial transition metal layer to form a transition metal dichalcogenide. In some instances, the chalcogen is reacted with the epitaxial transition metal layer at a temperature of between about 300 C and 600 C, between about 300 C and 550 C, between about 300 C and 500 C, between about 300 C and 450 C, or between about 300 C and 400 C.

Description

METHOD FOR SYNTHESIS OF TWO- DIMENSIONAL DICHALCOGENIDE SEMICONDUCTORS
[0001] All subject matter of the Priority Application(s) is incorporated herein by reference to the extent such subject matter is not inconsistent herewith.
TECHNICAL FIELD
[0002] The present disclosure relates to methods for making transition metal dichalcogenide semiconductor structures.
SUMMARY
[0003] The present disclosure relates to methods of making transition metal dichalcogenide semiconductor structures, such as molybdenum disulfide and tungsten diselenide. In some embodiments, the methods employ vapor phase deposition techniques to deposit a transition metal (e.g., molybdenum, tungsten, etc.) onto a substrate having a crystalline layer to form an epitaxial transition metal layer. The methods can further employ chemical vapor deposition techniques to deposit a chalcogen (e.g., sulfur, selenium, etc.) onto the epitaxial transition metal layer.
[0004] The chalcogen can be reacted with the epitaxial transition metal layer to form a transition metal dichalcogenide (e.g., MoS2, WSe2, etc.). In some embodiments, the chalcogen is reacted with the epitaxial transition metal layer at a temperature of between about 300 °C and 600 °C, between about 300 °C and 550 °C, between about 300 °C and 500 °C, between about 300 °C and 450 °C, or between about 300 °C and 400 °C. In other embodiments, the chalcogen is reacted with the epitaxial transition metal layer at a temperature of less than about 600 °C, less than about 550 °C, less than about 500 °C, less than about 450 °C, less than about 400 °C, or less than about 350 °C.
[0005] The foregoing summary is illustrative only and is not intended to be in any way limiting. In addition to the illustrative aspects, embodiments, and features described above, further aspects, embodiments, and features will become apparent by reference to the drawings and the following detailed description. BRIEF DESCRIPTION OF THE FIGURES
[0006] The written disclosure herein describes illustrative embodiments that are non- limiting and non-exhaustive. Reference is made to certain of such illustrative embodiments that are depicted in the figures, in which:
[0007] FIG. 1 is a schematic illustration of a method of depositing a transition metal onto a substrate in accordance with an embodiment of the present disclosure.
[0008] FIG. 2 is a schematic illustration of a method of depositing a chalcogen onto an epitaxial transition metal layer in accordance with an embodiment of the present disclosure.
[0009] FIG. 3 is a schematic illustration of a transition metal dichalcogenide formed in accordance with an embodiment of the present disclosure.
[0010] FIG. 4 is a schematic illustration of a system for making a transition metal dichalcogenide in accordance with an embodiment of the present disclosure.
[0011] FIG. 5 is a graph of the temperature profile of an illustrative method of making a transition metal dichalcogenide in accordance with an embodiment of the present disclosure.
[0012] FIG. 6 is a plan view of a schematic illustration of a transition metal dichalcogenide made in accordance with the present disclosure.
[0013] FIG. 7 is a graph of the Raman spectroscopy of the transition metal dichalcogenide depicted in FIG. 6.
DETAILED DESCRIPTION
[0014] In the following detailed description, reference is made to the accompanying drawings, which form a part hereof. The illustrative embodiments described in the detailed description, drawings, and claims are not meant to be limiting. Other embodiments may be utilized, and other changes may be made, without departing from the spirit or scope of the subject matter presented here.
[0015] Thus, the following detailed description of the embodiments of the methods of the disclosure is not intended to limit the scope of the disclosure, as claimed, but is merely representative of possible embodiments. In addition, the steps of a method do not necessarily need to be executed in any specific order, or even sequentially, nor do the steps need to be executed only once. [0016] The present disclosure relates to methods for making or manufacturing transition metal dichalcogenides (TMDs). The transition metal dichalcogenides, which can also be referred to as transition metal dichalcogenide semiconductors or two- dimensional transition metal dichalcogenide structures, can be used in various technologies, including, but not limited to, microelectronics, optoelectronics, and bio/chemical sensing (e.g., bio-sensing, chemical sensing, gas sensing, etc.). The methods disclosed herein can be advantageous in many ways, and can be used to overcome and/or alleviate many problems associated with prior known manufacturing techniques, which can be difficult, inefficient, and/or unreliable.
[0017] FIGS. 1-3 depict an illustrative method of making or manufacturing a transition metal dichalcogenide 140 in accordance with an embodiment of the present disclosure. In particular, FIG. 1 depicts a schematic view of a step of depositing a transition metal 122 onto a substrate 110, FIG. 2 depicts a schematic view of a step of depositing a chalcogen 130 onto an epitaxial transition metal layer 120, and FIG. 3 depicts a schematic view of a transition metal dichalcogenide 140 formed after reacting the chalcogen 130 with the epitaxial transition metal layer 120 in accordance with the methods disclosed herein. It will be appreciated that FIGS. 1-3 are schematic illustrations only and are not intended to be limiting in any way.
[0018] As shown in FIG. 1, the methods of making a transition metal dichalcogenide disclosed herein can comprise a step of depositing a transition metal 122 onto a substrate 110 to form a layer 120 of transition metal. In some embodiments, this transition metal layer 120 can be arranged in an ordered or substantially ordered manner and can be referred to as an epitaxial transition metal layer 120 (or an epitaxial layer), as detailed below. As can be appreciated, the terms manufacturing, fabricating, forming, etc. can also be used to describe the process (or a step thereof) of making the transition metal dichalcogenide.
[0019] Various deposition techniques and/or processes can be used for the depositing steps disclosed herein, including vapor phase deposition techniques and chemical vapor deposition techniques. Without limitation, vapor phase deposition (which can also be referred to as physical vapor deposition) can be used to describe deposition methods that employ physical processes (e.g., heating and/or sputtering) to produce a vapor of material (such as the transition metal material 122 depicted in FIG. 1), which can then be deposited or otherwise coated onto a substrate (such as the substrate 110 depicted in FIG. 1). Without limitation, chemical vapor deposition can be used to describe deposition methods in which the substrate material (e.g., such as layer 120 depicted in FIG. 2) is exposed to a precursor material (such as the chalcogen material 130 depicted in FIG. 2), which reacts with and/or decomposes on the substrate to produce the desired deposit or coating (such as the layer 140 depicted in FIG. 3). In some instances, the vapor phase and/or chemical vapor deposition techniques occur under vacuum conditions. Other known deposition techniques can also be used.
[0020] Electron beam physical vapor deposition techniques, a type of vapor phase deposition, can also be used. For example, the step of depositing a transition metal 122 onto a substrate 110 can comprise electron beam physical vapor deposition. In such embodiments, the transition metal 122 or other material can be targeted with an electron beam, causing atoms from the metal or material to transform into the gaseous phase. The gaseous phase atoms can then precipitate into solid form and coat the substrate (e.g., as illustrated in FIG. 1, where the gaseous phase transition metal atoms 122 are coated onto the substrate 110).
[0021] In certain embodiments disclosed herein, the step of depositing a transition metal 122 onto a substrate 110 comprises a vapor phase deposition technique. In particular embodiments, the step of depositing the chalcogen 130 onto the epitaxial transition metal layer 120 (detailed below) comprises a chemical vapor deposition technique. And in more particular embodiments, the step of depositing a transition metal 122 onto a substrate 110 comprises a vapor phase deposition technique, and the step of depositing the chalcogen 130 onto the epitaxial transition metal layer 120 comprises a chemical vapor deposition technique.
[0022] With continued reference to FIG. 1, various types of substrates 110 can be used in accordance with the methods disclosed herein. Moreover, in some embodiments, the method further comprises a step of obtaining a substrate 110 upon which a transition metal 122 can be deposited. Without limitation, a substrate can refer to any substance or layer upon which another substance is deposited. Illustrative materials that can be included in the substrate 110 include, but are not limited to, aluminum nitride (A1N), gallium nitride (GaN), gallium arsenide (GaAs), titanium dioxide (Ti02), Si (silicon), and aluminum oxide (A1203). Other materials can also be used. [0023] Single layer substrates 1 10 or multi-layer substrates 1 10 can be used. For example, as shown in the illustrated embodiment of FIG. 1, the substrate 1 10 can include a first layer and a second layer. In certain embodiments, the first layer comprises a base layer 1 12, and the second layer comprises a crystalline layer 1 14. The thicknesses of the layers 1 12, 1 14 can be different, or the thicknesses of the layers 1 12, 1 14 can be the same, depending on the substrate 1 10 that is used.
[0024] The base layer 1 12 of the substrate 1 10 can comprise various materials, including, but not limited to, silicon and/or aluminum oxide (A1203). The material of the base layer 1 12 can also be arranged in an ordered or substantially ordered manner, pattern, crystalline, or lattice structure, such as silicon having an orientation or Miller index of (1 1 1) (i.e., Si(l l l)), or c-plane sapphire aluminum oxide (A1203). Other materials and arrangements can also be used.
[0025] The crystalline layer 1 14 can also comprise various materials, including, but not limited to, aluminum nitride (A1N), gallium nitride (GaN), gallium arsenide (GaAs), titanium dioxide (Ti02) and aluminum oxide A1203. Further, in some embodiments, the crystalline layer 1 14 comprises materials that are arranged in an ordered or substantially ordered manner. For example, the crystalline layer 1 14 can comprise a selected pattern, crystalline, or lattice structure. In various embodiments, the crystalline layer 1 14 comprises a material having an orientation or Miller index of (100) or (1 10), including, but not limited to A1N(100), GaN(100), GaAs(100), and/or TiO2(1 10). In other of such embodiments, the substrate 1 10, and/or the crystalline layer 1 14, comprises c-plane sapphire aluminum oxide (A1203).
[0026] The use of a crystalline layer 1 14 in the substrate 1 10 can be advantageous in many ways. For example, a crystalline layer 1 14 having a particular crystalline structure can help facilitate deposition or growth of the transition metal 122 in a desired or selected arrangement and/or lattice structure. In such embodiments, the deposition or growth of the transition metal 122 upon the substrate 1 10 can be dependent upon the crystalline structure of the crystalline layer 1 14. As shown in FIG. 1, for example, the surface of the crystalline layer 1 14 can act as a template for the deposition or growth of the transition metal 122. In other words, the crystalline layer 1 14 can cause the transition metal 122 deposited thereon to grow (or otherwise be deposited) in an arranged manner or pattern, resulting in an epitaxial transition metal layer 120 having a particular crystalline or lattice structure. Further, the crystalline structure or arrangement of the epitaxial transition metal layer 120 can be predetermined and selected depending on the structure (which can be known) of the underlying crystalline layer 114 of the substrate 110.
[0027] The epitaxial transition metal layer 120 can also be referred to as an epitaxial layer or epitaxial overlay er 120, and the deposition process can be referred to as an epitaxial growth process. As detailed below, the ordered or substantially ordered arrangement of the transition metal atoms 122 in the epitaxial transition metal layer 120 can be advantageous and/or optimized for further processing steps. For example, the reaction temperatures for further processing steps (e.g., steps of reacting a chalcogen with the epitaxial transition metal layer) can be relatively lower (e.g., lower than previously known manufacturing methods) when an epitaxial transition metal layer 120 comprises a specific epitaxy or ordered arrangement.
[0028] After a substrate 110 has been obtained, selected, and/or produced, a transition metal 122 can be deposited thereon. Various types of transition metals 122 can be used, including, but not limited to, molybdenum, tungsten, and tantalum. Other transition metals can also be used. As previously discussed, in some embodiments, the transition metal 122 is deposited onto the substrate 110 to form an epitaxial transition metal layer 120 using vapor phase deposition techniques (e.g., electron beam physical vapor deposition).
[0029] In some embodiments, the epitaxial transition metal layer 120 comprises a selected arrangement, crystalline and/or lattice structure. For example, in some embodiments, the epitaxial transition metal layer 120 comprises a hexagonal crystalline and/or lattice structure (e.g., a two-dimensional or 2D hexagonal crystalline and/or lattice structure). In certain embodiments, the epitaxial transition metal layer 120 comprises an orientation or Miller index of (111). And in particular embodiments, the epitaxial transition metal layer 120 comprises molybdenum (111).
[0030] The transition metal 122 can be deposited to form a single monolayer, or several monolayers, which can be referred to as a single epitaxial monolayer or an epitaxial layer with several monolayers, respectively. In particular embodiments, the epitaxial layer comprises between about 1 and 5 monolayers, 1 and 4 monolayers, 1 and 3 monolayers, or 1 and 2 monolayers. In certain embodiments, the thickness of each monolayer can be between about 1 and 5 angstroms (with a 5 monolayer structure being between about 5 and 25 angstroms). Structures having greater thicknesses (or lesser thicknesses) can also be made.
[0031] After a sufficient amount of transition metal 122 has been deposited on the substrate 110 to form an epitaxial transition metal layer 120, a step of depositing a chalcogen 130 onto the epitaxial transition metal layer 120 can be performed, as shown in FIG. 2. Illustrative chalcogens 130 that can be used include, but are not limited to, sulfur (S or S2) and selenium (Se). Other chalcogens 130 can also be used.
[0032] As discussed above, in some embodiments, the chalcogen 130 is deposited onto the epitaxial transition metal layer 120 using chemical vapor deposition techniques. Further, in particular embodiments, a portion of the chalcogens 130 diffuse or otherwise move through the epitaxial transition metal layer 120. As part of the chemical vapor deposition process (or independent thereof), the chalcogens 130 can also react, be reacted with, or otherwise interact with the epitaxial transition metal layer 120 to form one or more transition metal dichalcogenide monolayers.
[0033] In some embodiments, reacting the chalcogens 130 with the epitaxial transition metal layer 120 is performed at elevated temperatures. For example, the reaction temperature can be between about 300 °C and 600 °C, between about 300 °C and 550 °C, between about 300 °C and 500 °C, between about 300 °C and 450 °C, or between about 300 °C and 400 °C. Further, in some embodiments, the reaction temperature is less than about 600 °C, less than about 550 °C, less than about 500 °C, less than about 450 °C, less than about 400 °C, or less than about 350 °C. The resulting transition metal dichalcogenide monolayer can then be cooled, and in some instances, removed from the substrate 110 and used in various ways. Exemplary uses include use in microelectronics, optoelectronics, and bio/chemical sensing (e.g., bio-sensing, chemical sensing, gas sensing, etc.).
[0034] An exemplary transition metal dichalcogenide 140 formed in accordance with the methods disclosed herein is depicted in FIG. 3. As shown therein, a portion of the chalcogens 130 have diffused through the previously prepared epitaxial transition metal layer 120, and the resulting transition metal dichalcogenide 140 monolayer comprises a single layer of transition metal 122 sandwiched between two layers of chalcogen 130. Such a transition metal dichalcogenide 140 can be referred to as a monolayer or two- dimensional transition metal dichalcogenide 140. In further embodiments, multiple monolayers of transition metal dichalcogenide 140 can be formed (e.g., such as when multiple layers of transition metals are disposed on the substrate), each of which can comprise a single layer of transition metal 122 sandwiched between two layers of chalcogen 130. For example, the transition metal dichalcogenide 140 can comprise between about 1 and 5 monolayers, 1 and 4 monolayers, 1 and 3 monolayers, or 1 and 2 monolayers. In certain embodiments, the thickness of each transition metal dichalcogenide monolayer 140 can be between about 0.1 and 1.5 nm.
[0035] Various types of transition metal dichalcogenides 140 can be formed in accordance with the methods disclosed herein. Illustrative transition metal dichalcogenides include, but are not limited to, molybdenum disulfide (MoS2) and tungsten diselenide (WSe2). The transition metal dichalcogenides formed in accordance with the methods disclosed herein can also comprise a two-dimensional or 2D hexagonal structure, which can have a relatively broad electronic bandgap and can be useful in a variety of technologies.
[0036] As can be appreciated, one or more additional manufacturing steps and/or processes can also be employed with the methods disclosed herein. For example, in certain embodiments, the methods further comprise a step of heating the chalcogen 130. For example, the chalcogen 130 can be heated prior to being deposited onto the epitaxial transition metal layer 120. In some of such embodiments, the chalcogen 130 can be heated to a temperature of at least about 100 °C, 150 °C, or 200 °C, or more. The heated chalcogen 130 can then be delivered to and deposited onto the epitaxial transition metal layer 120. In some embodiments, heating the chalcogen 130 can aid in providing a chalcogen 130 vapor that is deposited onto and/or reacted with the epitaxial transition metal layer 120.
[0037] In further embodiments, one or more carrier gases can also be used to aid in delivering the chalcogen 130 to the epitaxial transition metal layer 120. For example, in some embodiments, an inert gas is used to deliver the chalcogen 130 to the epitaxial transition metal layer 120. Exemplary carrier gases that can be used include, but are not limited to, argon and other inert gases.
[0038] Additional steps and/or processes employed in the lithographic patterning and/or etching arts can also be used. For example, in some embodiments a portion of the substrate 110 can be masked or otherwise processed to control the spatial placement and registry of the transition metal 122 on the substrate 110.
[0039] The growth or deposition of the transition metal 122 on the substrate 110 can also be monitored. For example, in certain embodiments, the growth of the epitaxial transition metal layer 120 can be monitored with an oscillator, or a microbalance oscillator, which can measure the thickness of the growth layer. Monitoring such thicknesses can aid in making an epitaxial transition metal layer 120 having a desired number of monolayers (e.g., between 1 and 5, 1 and 4, 1 and 3, or 1 and 2). Other known manufacturing techniques (e.g., semiconductor manufacturing techniques) and steps can also be used.
[0040] FIG. 4 depicts an illustrative system 150 for making a transition metal dichalcogenide semiconductor structure in accordance with the embodiments of the present disclosure. As shown in FIG. 4, a carrier gas 152 can be delivered into the reaction system 150, as indicated by the reference arrow. In some embodiments, the carrier gas 152 is delivered into a first chamber or furnace 154 comprising a chalcogen 151. In some of such embodiments, the first chamber 154 is maintained at a temperature of at least about 100 °C, 150 °C, or 200 °C, which can be sufficient to heat the chalcogen 151 and produce a vapor for reacting with the epitaxial transition metal layer.
[0041] The carrier gas 152 and heated chalcogen 151 can then be delivered into a second chamber or furnace 156 containing one or more processed substrates 153 that have been coated with an epitaxial transition metal layer, as described herein. The second chamber or furnace 156 can also be referred to as a reaction chamber. In certain embodiments, the temperature of the second chamber 156 can be between about 300 °C and 600 °C, between about 300 °C and 550 °C, between about 300 °C and 500 °C, between about 300 °C and 450 °C, or between about 300 °C and 400 °C. In other embodiments, the temperature of the second chamber 156 is less than about 600 °C, less than about 550 °C, less than about 500 °C, less than about 450 °C, less than about 400 °C, or less than about 350 °C. A chalcogen trap (e.g., a sulfur trap) 155 can also be used to capture excess chalcogen flowing through the second chamber 156. As also shown in FIG. 4, the temperatures of the first and second chambers 154, 156 can be controlled independently. [0042] After a period of time (e.g., 10 minutes, 20 minutes, 30 minutes, etc.), the length of which can be dependent upon various reaction factors (e.g., the concentration of the chalcogen 151, the number of monolayers in the epitaxial transition metal layer, the surface area of the epitaxial transition metal layer, etc.), the process can be terminated, the chambers 154 and/or 156 cooled, and/or the resulting transition metal dichalcogenide can be removed from the system 150. The transition metal dichalcogenides can then be further processed (e.g., removed from the substrate 153) or otherwise used as desired.
EXAMPLES
[0043] The following examples are illustrative of embodiments of the present disclosure, as described above, and are not meant to be limiting in any way.
[0044] Example 1 :
[0045] A substrate was obtained having a c-axis oriented aluminum nitride (A1N(100)) crystalline layer and a silicon (Si(l l l)) base layer. The thickness of the A1N(100) crystalline layer was about 200 nm. Molybdenum was then deposited on the crystalline layer of the substrate by electron beam physical vapor deposition techniques under vacuum conditions to form an epitaxial molybdenum layer of Mo(l l l). The processed substrate, including the epitaxial molybdenum layer, was then placed in a reaction chamber for further processing.
[0046] The reaction chamber was heated and maintained at a temperature of between about 300 °C and 400 °C throughout the reaction process. Sulfur, heated to a temperature of between about 200 °C and 250 °C, was then continuously delivered to the reaction chamber using an argon carrier gas for a period of about 30 minutes while the sulfur reacted with the epitaxial molybdenum layer of Mo(l l l) to form a molybdenum disulfide transition metal dichalcogenide. The process was then terminated, and the reaction chamber was allowed to cool. A graph of the reaction temperature and sulfur temperature versus the reaction time is shown in FIG. 5, where the temperature of the reaction chamber is depicted by the line 156, and the temperature of the sulfur source is depicted by the line 154.
[0047] Example 2:
[0048] A molybdenum disulfide transition metal dichalcogenide made in accordance with the methods disclosed herein was prepared using a method similar to that disclosed in Example 1. Molybdenum was used as the transition metal, and sulfur was used as the chalcogen. The reaction temperature for reacting the sulfur and the epitaxial molybdenum layer was about 400 °C. Further, as a control, a portion of the substrate was masked and covered prior to depositing the molybdenum onto the substrate. A schematic plan view depicting the resulting molybdenum disulfide is depicted in FIG. 6, where section A represents the masked surface, and sections B and C represent the unmasked surfaces that resulted in molybdenum disulfide.
[0049] Raman spectroscopy was used to analyze the resulting molybdenum disulfide structure, a graph of which is depicted in FIG. 7. As shown in FIG. 7, it was observed that the molybdenum throughout the non-masked portions (regions B and C) had reacted with the sulfur and converted to molybdenum disulfide (MoS2). This was evident by the peaks in the Raman spectra located around 385 cm"1 and 410 cm"1, which are associated with the molybdenum disulfide (MoS2) from the B and C regions (note that the intensity of the Raman measurement for B was enhanced, as compared to C, for clarity purposes). In contrast, no such peaks were exhibited in the Raman spectra of the masked region A. The masked versus unmasked portions were also visible on the substrate. Accordingly, the method resulted in the successful formation of a molybdenum disulfide monolayer at a reaction temperature of between about 300 °C and 600 °C.
[0050] Reference throughout this specification to "an embodiment" or "the embodiment" means that a particular feature, structure, or characteristic described in connection with that embodiment is included in at least one embodiment. Thus, the quoted phrases, or variations thereof, as recited throughout this specification are not necessarily all referring to the same embodiment. Additionally, references to ranges include both endpoints.
[0051] Similarly, it should be appreciated that in the above description of embodiments, various features are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure. This method of disclosure, however, is not to be interpreted as reflecting an intention that any claim require more features than those expressly recited in that claim. Rather, as the following claims reflect, inventive aspects lie in a combination of fewer than all features of any single foregoing disclosed embodiment. [0052] Aspects of the subject matter described herein are set out in the following numbered clauses:
1. A method of making a transition metal dichalcogenide, comprising:
depositing a transition metal onto a substrate to form an epitaxial transition metal layer;
depositing a chalcogen onto the epitaxial transition metal layer; and
reacting the chalcogen with the epitaxial transition metal layer to form a transition metal dichalcogenide.
2. The method of clause 1, wherein the step of depositing a transition metal onto a substrate comprises vapor phase deposition.
3. The method of clause 1, wherein the step of depositing the chalcogen onto the epitaxial transition metal layer comprises chemical vapor deposition.
4. The method of clause 1, wherein the substrate comprises at least one of aluminum oxide (A1203), aluminum nitride (A1N), gallium nitride (GaN), gallium arsenide (GaAs), or titanium dioxide (Ti02).
5. The method of clause 1, wherein the substrate comprises a crystalline layer.
6. The method of clause 5, wherein the crystalline layer comprises a material having a Miller index of (100) or (110).
7. The method of clause 5, wherein the crystalline substrate comprises at least one of AIN(IOO), GaN(100), GaAs(100), or TiO2(110).
8. The method of clause 5, wherein the substrate further comprises a base layer, wherein the crystalline layer is disposed on the base layer.
9. The method of clause 8, wherein the base layer comprises at least one of silicon or aluminum oxide (A1203).
10. The method of clause 9, wherein the silicon has a Miller index of (111).
11. The method of clause 1, wherein the transition metal comprises at least one of molybdenum, tungsten, or tantalum.
12. The method of clause 1, wherein the chalcogen comprises at least one of sulfur or selenium.
13. The method of clause 1, wherein the transition metal dichalcogenide comprises molybdenum disulfide or tungsten diselenide. 14. The method of clause 1, wherein the epitaxial transition metal layer comprises a monolayer.
15. The method of clause 1, wherein the epitaxial transition metal layer comprises between 1 and 5 monolayers.
16. The method of clause 1, wherein the transition metal dichalcogenide comprises between 1 and 5 monolayers.
17. The method of clause 1, wherein the step of reacting the chalcogen with the epitaxial transition metal layer is performed at a temperature of between about 300 °C and 600 °C, between about 300 °C and 550 °C, between about 300 °C and 500 °C, between about 300 °C and 450 °C, or between about 300 °C and 400 °C.
18. The method of clause 1, wherein the step of reacting the chalcogen with the epitaxial transition metal layer is performed at a temperature that is less than about 600 °C, less than about 550 °C, less than about 500 °C, less than about 450 °C, less than about 400 °C, or less than about 350 °C.
19. The method of clause 1, further comprising:
heating the chalcogen, wherein the step of heating the chalcogen is performed before the step of depositing the chalcogen onto the epitaxial transition metal layer.
20. The method of clause 19, wherein the chalcogen is heated to a temperature of at least about 100 °C, 150 °C, or 200 °C.
21. The method of clause 1, wherein a carrier gas is used to deliver the chalcogen to the epitaxial transition metal layer.
22. The method of clause 21, wherein the carrier gas comprises an inert gas.
23. The method of clause 21, wherein the carrier gas comprises argon.
24. The method of clause 1, further comprising:
monitoring growth of the epitaxial transition metal layer.
25. The method of clause 24, wherein the step of monitoring growth of the epitaxial transition metal layer comprises measuring the thickness of the epitaxial transition metal layer with an oscillator.
26. A method of making a transition metal dichalcogenide, comprising:
depositing a transition metal onto a substrate to form an epitaxial transition metal layer; delivering a chalcogen into a reaction chamber containing the epitaxial transition metal layer;
depositing the chalcogen onto the epitaxial transition metal layer; and
reacting the chalcogen with the epitaxial transition metal layer, wherein the chalcogen is reacted with the epitaxial transition metal layer at a temperature sufficient to cause the formation of a transition metal dichalcogenide, wherein the temperature is less than about 600 °C.
27. The method of clause 26, wherein the step of depositing a transition metal onto a substrate comprises vapor phase deposition.
28. The method of clause 26, wherein the step of depositing the chalcogen onto the epitaxial transition metal layer comprises chemical vapor deposition.
29. The method of clause 26, wherein the substrate comprises at least one of aluminum oxide (A1203), aluminum nitride (A1N), gallium nitride (GaN), gallium arsenide (GaAs), or titanium dioxide (Ti02).
30. The method of clause 26, wherein the substrate comprises a crystalline layer.
31. The method of clause 30, wherein the crystalline layer comprises a material having a Miller index of (100) or (110).
32. The method of clause 30, wherein the crystalline substrate comprises at least one of AIN(IOO), GaN(100), GaAs(100), or TiO2(110).
33. The method of clause 30, wherein the substrate further comprises a base layer, wherein the crystalline layer is disposed on the base layer.
34. The method of clause 33, wherein the base layer comprises at least one of silicon or aluminum oxide (A1203).
35. The method of clause 34, wherein the silicon has a Miller index of (111).
36. The method of clause 26, wherein the transition metal comprises at least one of molybdenum, tungsten, or tantalum.
37. The method of clause 26, wherein the chalcogen comprises at least one of sulfur or selenium.
38. The method of clause 26, wherein the transition metal dichalcogenide comprises molybdenum disulfide or tungsten diselenide. 39. The method of clause 26, wherein the epitaxial transition metal layer comprises a monolayer.
40. The method of clause 26, wherein the epitaxial transition metal layer comprises between 1 and 5 monolayers.
41. The method of clause 26, wherein the transition metal dichalcogenide comprises between 1 and 5 monolayers.
42. The method of clause 26, wherein the step of reacting the chalcogen with the epitaxial transition metal layer is performed at a temperature of between about 300 °C and 600 °C, between about 300 °C and 550 °C, between about 300 °C and 500 °C, between about 300 °C and 450 °C, or between about 300 °C and 400 °C.
43. The method of clause 26, wherein the step of reacting the chalcogen with the epitaxial transition metal layer is performed at a temperature that is less than about 550 °C, less than about 500 °C, less than about 450 °C, less than about 400 °C, or less than about 350 °C.
44. The method of clause 26, further comprising:
heating the chalcogen, where the step of heating the chalcogen is performed before the step of delivering the chalcogen into the reaction chamber.
45. The method of clause 44, wherein the chalcogen is heated to a temperature of at least about 100 °C, 150 °C, or 200 °C.
46. The method of clause 26, wherein a carrier gas is used to deliver the chalcogen into the reaction chamber.
47. The method of clause 46, wherein the carrier gas comprises an inert gas.
48. The method of clause 46, wherein the carrier gas comprises argon.
49. The method of clause 26, further comprising:
monitoring growth of the epitaxial transition metal layer.
50. The method of clause 49, wherein the step of monitoring growth of the epitaxial transition metal layer comprises measuring the thickness of the epitaxial transition metal layer with an oscillator.
51. A method of making a transition metal dichalcogenide, comprising:
depositing at least one of molybdenum, tungsten, or tantalum onto a substrate to form an epitaxial transition metal layer, wherein the substrate comprises a crystalline layer; heating a chalcogen, wherein the chalcogen comprises at least one of sulfur or selenium;
depositing the chalcogen onto the epitaxial transition metal layer; and
reacting the chalcogen with the epitaxial transition metal layer at a temperature of between about 300 °C and 600 °C to form a transition metal dichalcogenide.
52. The method of clause 51, wherein the step of depositing a transition metal onto a substrate comprises vapor phase deposition.
53. The method of clause 51, wherein the step of depositing the chalcogen onto the epitaxial transition metal layer comprises chemical vapor deposition.
54. The method of clause 51, wherein the substrate comprises at least one of aluminum oxide (A1203), aluminum nitride (A1N), gallium nitride (GaN), gallium arsenide (GaAs), or titanium dioxide (T1O2).
55. The method of clause 51, wherein the crystalline layer comprises a material having a Miller index of (100) or (110).
56. The method of clause 51, wherein the crystalline substrate comprises at least one of AIN(IOO), GaN(100), GaAs(100), or TiO2(110).
57. The method of clause 51, wherein the substrate further comprises a base layer, wherein the crystalline layer is disposed on the base layer.
58. The method of clause 57, wherein the base layer comprises at least one of silicon or aluminum oxide (A1203).
59. The method of clause 58, wherein the silicon has a Miller index of (111).
60. The method of clause 51, wherein the transition metal dichalcogenide comprises molybdenum disulfide or tungsten diselenide.
61. The method of clause 51, wherein the epitaxial transition metal layer comprises a monolayer.
62. The method of clause 51, wherein the epitaxial transition metal layer comprises between 1 and 5 monolayers.
63. The method of clause 51, wherein the transition metal dichalcogenide comprises between 1 and 5 monolayers.
64. The method of clause 51, wherein the step of reacting the chalcogen with the epitaxial transition metal layer is performed at a temperature of between about 300 C and 550 °C, between about 300 °C and 500 °C, between about 300 °C and 450 C, or between about 300 °C and 400 °C.
65. The method of clause 51, wherein the step of reacting the chalcogen with the epitaxial transition metal layer is performed at a temperature that is less than about 550 °C, less than about 500 °C, less than about 450 °C, less than about 400 °C, or less than about 350 °C.
66. The method of clause 51, wherein the chalcogen is heated to a temperature of at least about 100 °C, 150 °C, or 200 °C.
67. The method of clause 51, wherein a carrier gas is used to deliver the chalcogen to the epitaxial transition metal layer.
68. The method of clause 67, wherein the carrier gas comprises an inert gas.
69. The method of clause 67, wherein the carrier gas comprises argon.
70. The method of clause 51, further comprising:
monitoring growth of the epitaxial transition metal layer.
71. The method of clause 70, wherein the step of monitoring growth of the epitaxial transition metal layer comprises measuring the thickness of the epitaxial transition metal layer with an oscillator.
[0053] The claims following this written disclosure are hereby expressly incorporated into the present written disclosure, with each claim standing on its own as a separate embodiment. This disclosure includes all permutations of the independent claims with their dependent claims. Moreover, additional embodiments capable of derivation from the independent and dependent claims that follow are also expressly incorporated into the present written description.
[0054] While various aspects and embodiments have been disclosed herein, other aspects and embodiments will be apparent to those skilled in the art. The various aspects and embodiments disclosed herein are for purposes of illustration and are not intended to be limiting, with the true scope and spirit being indicated by the following claims.

Claims

1. A method of making a transition metal dichalcogenide, comprising:
depositing a transition metal onto a substrate to form an epitaxial transition metal layer;
depositing a chalcogen onto the epitaxial transition metal layer; and
reacting the chalcogen with the epitaxial transition metal layer to form a transition metal dichalcogenide.
2. The method of claim 1, wherein the step of depositing a transition metal onto a substrate comprises vapor phase deposition.
3. The method of claim 1, wherein the step of depositing the chalcogen onto the epitaxial transition metal layer comprises chemical vapor deposition.
4. The method of claim 1, wherein the substrate comprises at least one of aluminum oxide (A1203), aluminum nitride (A1N), gallium nitride (GaN), gallium arsenide (GaAs), or titanium dioxide (T1O2).
5. The method of claim 1, wherein the substrate comprises a crystalline layer.
6. The method of claim 5, wherein the crystalline layer comprises a material having a Miller index of (100) or (110).
7. The method of claim 5, wherein the crystalline substrate comprises at least one of AIN(IOO), GaN(100), GaAs(100), or TiO2(110).
8. The method of claim 5, wherein the substrate further comprises a base layer, wherein the crystalline layer is disposed on the base layer.
9. The method of claim 8, wherein the base layer comprises at least one of silicon or aluminum oxide (A1203).
10. The method of claim 9, wherein the silicon has a Miller index of (111).
11. The method of claim 1, wherein the transition metal comprises at least one of molybdenum, tungsten, or tantalum.
12. The method of claim 1, wherein the chalcogen comprises at least one of sulfur or selenium.
13. The method of claim 1, wherein the transition metal dichalcogenide comprises molybdenum disulfide or tungsten diselenide.
14. The method of claim 1, wherein the epitaxial transition metal layer comprises a monolayer.
15. The method of claim 1, wherein the epitaxial transition metal layer comprises between 1 and 5 monolayers.
16. The method of claim 1, wherein the transition metal dichalcogenide comprises between 1 and 5 monolayers.
17. The method of claim 1, wherein the step of reacting the chalcogen with the epitaxial transition metal layer is performed at a temperature of between about 300 °C and 600 °C, between about 300 °C and 550 °C, between about 300 °C and 500 °C, between about 300 °C and 450 °C, or between about 300 °C and 400 °C.
18. The method of claim 1, wherein the step of reacting the chalcogen with the epitaxial transition metal layer is performed at a temperature that is less than about 600 °C, less than about 550 °C, less than about 500 °C, less than about 450 °C, less than about 400 °C, or less than about 350 °C.
19. The method of claim 1, further comprising:
heating the chalcogen, wherein the step of heating the chalcogen is performed before the step of depositing the chalcogen onto the epitaxial transition metal layer.
20. The method of claim 19, wherein the chalcogen is heated to a temperature of at least about 100 °C, 150 °C, or 200 °C.
21. The method of claim 1, wherein a carrier gas is used to deliver the chalcogen to the epitaxial transition metal layer.
22. The method of claim 21, wherein the carrier gas comprises an inert gas.
23. The method of claim 21, wherein the carrier gas comprises argon.
24. The method of claim 1, further comprising:
monitoring growth of the epitaxial transition metal layer.
25. The method of claim 24, wherein the step of monitoring growth of the epitaxial transition metal layer comprises measuring the thickness of the epitaxial transition metal layer with an oscillator.
26. A method of making a transition metal dichalcogenide, comprising:
depositing a transition metal onto a substrate to form an epitaxial transition metal layer;
delivering a chalcogen into a reaction chamber containing the epitaxial transition metal layer;
depositing the chalcogen onto the epitaxial transition metal layer; and reacting the chalcogen with the epitaxial transition metal layer, wherein the chalcogen is reacted with the epitaxial transition metal layer at a temperature sufficient to cause the formation of a transition metal dichalcogenide, wherein the temperature is less than about 600 °C.
27. The method of claim 26, wherein the step of depositing a transition metal onto a substrate comprises vapor phase deposition.
28. The method of claim 26, wherein the step of depositing the chalcogen onto the epitaxial transition metal layer comprises chemical vapor deposition.
29. The method of claim 26, wherein the substrate comprises at least one of aluminum oxide (A1203), aluminum nitride (A1N), gallium nitride (GaN), gallium arsenide (GaAs), or titanium dioxide (Ti02).
30. The method of claim 26, wherein the substrate comprises a crystalline layer.
31. The method of claim 30, wherein the crystalline layer comprises a material having a Miller index of (100) or (110).
32. The method of claim 30, wherein the crystalline substrate comprises at least one of AIN(IOO), GaN(100), GaAs(100), or TiO2(110).
33. The method of claim 30, wherein the substrate further comprises a base layer, wherein the crystalline layer is disposed on the base layer.
34. The method of claim 33, wherein the base layer comprises at least one of silicon or aluminum oxide (A1203).
35. The method of claim 34, wherein the silicon has a Miller index of (111).
36. The method of claim 26, wherein the transition metal comprises at least one of molybdenum, tungsten, or tantalum.
37. The method of claim 26, wherein the chalcogen comprises at least one of sulfur or selenium.
38. The method of claim 26, wherein the transition metal dichalcogenide comprises molybdenum disulfide or tungsten diselenide.
39. The method of claim 26, wherein the epitaxial transition metal layer comprises a monolayer.
40. The method of claim 26, wherein the epitaxial transition metal layer comprises between 1 and 5 monolayers.
41. The method of claim 26, wherein the transition metal dichalcogenide comprises between 1 and 5 monolayers.
42. The method of claim 26, wherein the step of reacting the chalcogen with the epitaxial transition metal layer is performed at a temperature of between about 300 °C and 600 °C, between about 300 °C and 550 °C, between about 300 °C and 500 °C, between about 300 °C and 450 °C, or between about 300 °C and 400 °C.
43. The method of claim 26, wherein the step of reacting the chalcogen with the epitaxial transition metal layer is performed at a temperature that is less than about 550 °C, less than about 500 °C, less than about 450 °C, less than about 400 °C, or less than about 350 °C.
44. The method of claim 26, further comprising:
heating the chalcogen, where the step of heating the chalcogen is performed before the step of delivering the chalcogen into the reaction chamber.
45. The method of claim 44, wherein the chalcogen is heated to a temperature of at least about 100 °C, 150 °C, or 200 °C.
46. The method of claim 26, wherein a carrier gas is used to deliver the chalcogen into the reaction chamber.
47. The method of claim 46, wherein the carrier gas comprises an inert gas.
48. The method of claim 46, wherein the carrier gas comprises argon.
49. The method of claim 26, further comprising:
monitoring growth of the epitaxial transition metal layer.
50. The method of claim 49, wherein the step of monitoring growth of the epitaxial transition metal layer comprises measuring the thickness of the epitaxial transition metal layer with an oscillator.
51. A method of making a transition metal dichalcogenide, comprising:
depositing at least one of molybdenum, tungsten, or tantalum onto a substrate to form an epitaxial transition metal layer, wherein the substrate comprises a crystalline layer;
heating a chalcogen, wherein the chalcogen comprises at least one of sulfur or selenium;
depositing the chalcogen onto the epitaxial transition metal layer; and
reacting the chalcogen with the epitaxial transition metal layer at a temperature of between about 300 °C and 600 °C to form a transition metal dichalcogenide.
52. The method of claim 51, wherein the step of depositing a transition metal onto a substrate comprises vapor phase deposition.
53. The method of claim 51, wherein the step of depositing the chalcogen onto the epitaxial transition metal layer comprises chemical vapor deposition.
54. The method of claim 51, wherein the substrate comprises at least one of aluminum oxide (A1203), aluminum nitride (A1N), gallium nitride (GaN), gallium arsenide (GaAs), or titanium dioxide (Ti02).
55. The method of claim 51, wherein the crystalline layer comprises a material having a Miller index of (100) or (110).
56. The method of claim 51, wherein the crystalline substrate comprises at least one of AIN(IOO), GaN(100), GaAs(100), or TiO2(110).
57. The method of claim 51, wherein the substrate further comprises a base layer, wherein the crystalline layer is disposed on the base layer.
58. The method of claim 57, wherein the base layer comprises at least one of silicon or aluminum oxide (A1203).
59. The method of claim 58, wherein the silicon has a Miller index of (111).
60. The method of claim 51, wherein the transition metal dichalcogenide comprises molybdenum disulfide or tungsten diselenide.
61. The method of claim 51, wherein the epitaxial transition metal layer comprises a monolayer.
62. The method of claim 51, wherein the epitaxial transition metal layer comprises between 1 and 5 monolayers.
63. The method of claim 51, wherein the transition metal dichalcogenide comprises between 1 and 5 monolayers.
64. The method of claim 51, wherein the step of reacting the chalcogen with the epitaxial transition metal layer is performed at a temperature of between about 300 °C and 550 °C, between about 300 °C and 500 °C, between about 300 °C and 450 °C, or between about 300 °C and 400 °C.
65. The method of claim 51, wherein the step of reacting the chalcogen with the epitaxial transition metal layer is performed at a temperature that is less than about 550 °C, less than about 500 °C, less than about 450 °C, less than about 400 °C, or less than about 350 °C.
66. The method of claim 51, wherein the chalcogen is heated to a temperature of at least about 100 °C, 150 °C, or 200 °C.
67. The method of claim 51, wherein a carrier gas is used to deliver the chalcogen to the epitaxial transition metal layer.
68. The method of claim 67, wherein the carrier gas comprises an inert gas.
69. The method of claim 67, wherein the carrier gas comprises argon.
70. The method of claim 51, further comprising:
monitoring growth of the epitaxial transition metal layer.
71. The method of claim 70, wherein the step of monitoring growth of the epitaxial transition metal layer comprises measuring the thickness of the epitaxial transition metal layer with an oscillator.
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3707292A1 (en) * 2017-11-07 2020-09-16 King Abdullah University Of Science And Technology Method for growing a transition metal dichalcogenide layer, transition metal dichalcogenide growth device, and method for forming a semiconductor device
US11393681B2 (en) * 2018-03-07 2022-07-19 Uchicago Argonne, Llc Methods to deposit and etch controlled thin layers of transition metal dichalcogenides
US11447862B2 (en) 2018-03-07 2022-09-20 Uchicago Argonne, Llc Methods to deposit controlled thin layers of transition metal dichalcogenides
US11276644B2 (en) * 2018-12-17 2022-03-15 Intel Corporation Integrated circuits and methods for forming thin film crystal layers
US11142824B2 (en) 2019-04-23 2021-10-12 Uchicago Argonne, Llc Method of producing thin layer of large area transition metal dichalcogenides MoS2 and others
KR102349459B1 (en) * 2020-01-20 2022-01-10 성균관대학교산학협력단 Single crystal transition metal dichalcogenide thin film and method for synthesizing thereof
US20230420250A1 (en) * 2022-06-27 2023-12-28 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method for manufacturing the same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150064471A1 (en) * 2013-08-28 2015-03-05 Massachusetts Institute Of Technology Seed for Metal Dichalcogenide Growth by Chemical Vapor Deposition
WO2015091781A2 (en) * 2013-12-18 2015-06-25 Imec Vzw Method of producing transition metal dichalcogenide layer

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012093360A1 (en) * 2011-01-04 2012-07-12 Ecole Polytechnique Federale De Lausanne (Epfl) Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150064471A1 (en) * 2013-08-28 2015-03-05 Massachusetts Institute Of Technology Seed for Metal Dichalcogenide Growth by Chemical Vapor Deposition
WO2015091781A2 (en) * 2013-12-18 2015-06-25 Imec Vzw Method of producing transition metal dichalcogenide layer

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
E. XENOGIANNOPOULOU ET AL.: "High-quality, large-area MoSe2 and MoSe2/Bi2Se3 heterostructures on AlN(0001)/Si(111) substrates by molecular beam epitaxy''.", NANOSCALE, vol. 7, 24 March 2015 (2015-03-24), pages 7896 - 7905, XP055346503 *
QINGQING JI ET AL.: "Chemical vapour deposition of group-VIB metal dichalcogenide monolayers: engineered substrates from amorphous to single crystalline''.", CHEMICAL SOCIETY REVIEWS, vol. 44, 26 September 2014 (2014-09-26), pages 2587 - 2602, XP055346501 *
RILEY GATENSBY ET AL.: "Controlled synthesis of transition metal dichalcogenide thin films for electronic applications''.", APPLIED SURFACE SCIENCE, vol. 297, 27 January 2014 (2014-01-27), pages 139 - 146, XP028661371 *

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