WO2016176412A1

WO2016176412A1 - System and method for providing a lightweight and high voltage actuator

Info

Publication number: WO2016176412A1
Application number: PCT/US2016/029709
Authority: WO
Inventors: Gu-Yeon Wei; Mario LOK; David Brooks
Original assignee: Harvard University
Current assignee: Harvard University
Priority date: 2015-04-29
Filing date: 2016-04-28
Publication date: 2016-11-03
Anticipated expiration: 2017-10-29

Abstract

A high voltage capacitive load driver circuit includes a supply voltage, a first capacitor connected across a first node and a common node, a second capacitor connected across a second node and the common node, two drivers each having a gate driver, a high switch and a low switch, and a feedback block comprising feedback paths from the two drivers. The feedback block is configured to send trigger pulses to the first gate driver and the second gate driver. The timing of the trigger pulses is determined in part from the first feedback paths, the voltage across the capacitors are sinusoidal waveforms substantially out of phase.

Description

System and Method for Providing a Lightweight and High Voltage

Actuator

GOVERNMENT LICENSE RIGHTS

Lhis invention was made with government support under NSF grant IIS-0926148, NSF grant CCF-1218298, and DARPA grant HR0011-13-C-0022. Lhe government has certain rights in the invention.

CROSS-REFERENCE LP RELALED APPLICALIONS This application claims the benefit of U.S. Provisional Patent Application serial number 62/154,301, filed April 29, 2015, entitled "System and Method for Providing a Lightweight and High Voltage Actuator," which is incorporated by reference herein in its entirety.

FIELD OF THE INVENTION

The present invention relates to electronics, and more particularly, is related to a high voltage actuator.

BACKGROUND OF THE INVENTION

Piezoelectric actuators are electrically capacitive. They dissipate little energy but require high voltage swing excitation. The bandwidth of the excitation signal is also low. A challenge for such a circuit is to drive several capacitors with slowly evolving high voltage signals. Similar challenges are pertinent in the design of electric-static and electric-elastomer actuator drivers.

Piezoelectric actuators and other high voltage actuators are very attractive in micro- robotic applications because they can be fabricated to achieve higher power density than magnetic motors in small scale. However, this also requires drivers with high power densities so that the overall power density is not jeopardized. The power density of the driver is also important because micro-robots generally have a payload combined weight limit for the battery and the actuator driver. A lighter driver allows a larger battery, and helps extend the battery lifetime. Moreover, as the actuator dissipates little mechanical power, the actuator driver power will dominate the total power consumption of a micro-robot. Hence, reducing the power consumption of the driver may also directly improve the battery lifetime of the micro-robot.

One example of an actuator application is a bimorph piezoelectric actuator 100, as shown by FIG. 1. By definition, bimorph indicates of a top piezoelectric (PZT) layer 121 and a bottom piezoelectric layer 122, in this case sandwiching a carbon fiber composite layer 110. A top electrode 131 connects to the top piezoelectric layer 121, a middle electrode 130 connects to the carbon fiber composite layer 110, and a bottom electrode 132 connects to the bottom piezoelectric layer 122. The actuator 100 has a fixed end 150 and a deflecting end 140.

A first electric signal VJQP between the top electrode 131 and the middle electrode 130 excites the top PZT layer 121, while a second electric signal VpQTTOM between the middle electrode 130 and the bottom electrode 132 excites the bottom PZT layer 122. The deflecting end 140 of the actuator 100 deflects in proportion with a differential signal V Q

-^BOTTOM) wherein the two signals VpQP, ^BOTTOM ^are 180 degrees out of phase. The deflection of the actuator 140 may translate to, for example, wing stroke amplitude for a flying robot, which determines the thrust force produced by flapping wings. An exemplary drive signal is a 200-300V sinusoidal voltage that oscillates at the mechanical resonant frequency of the robot (approximately 80-120Hz).

Depending on the polarization direction of the PZT layers 121,122, a power electronics circuit can interface with the actuator 100 via a simultaneous drive 200, as shown by FIG. 2A or an alternating drive topology 250, as shown by FIG. 2B.

Both topologies 200, 250 may rely on a step-up converter to generate a high voltage supply VDDH from, for example, a 3.7V battery. For the simultaneous drive topology 200, VDDH provides a constant high voltage (¾¾#) across the two PZT layers 121, 122 and a sinusoidal signal is applied to the middle layer 110. In contrast, the alternating drive topology 250 grounds the middle layer 110 and applies out-of-phase sinusoids across the top PZT layer 121 and the bottom PZT layer 122 through a pair of driver channels.

Using the simultaneous drive topology 200 as an example, FIG. 3A further illustrates that each piezoelectric layer in the actuator 300 may be modeled as a capacitor. The common symbol for a top piezoelectric layer CTOP and a bottom piezoelectric layer CBOTTOM, as shown by FIG. 3B, will be used hereafter.

It is desirable that a driver for the actuator 100 deliver energy to the capacitive structure of the actuator 100 and extract energy from the capacitive structure of the actuator 100. A first previous driver solution, as shown by FIG. 4A, is a linear push-pull driver using the simultaneous drive topology 200 (FIG. 2A). The first previous solution charges a voltage node Vsw by turning on a high-side switch Mffg and discharges the voltage node Υ$ψ by tuming on a low-side switch M^g. A second previous driver solution, shown by FIG. 4B, is a switching amplifier using the simultaneous drive topology 200 (FIG. 2A). The switching amplifier uses an additional inductor per actuator, and the inductor allows energy delivered more efficiently to the actuator and also allows energy recovery from the actuator.

However, linear drivers are not energy-efficient. While switching amplifiers are more efficient, they use one inductor per actuator, which is not desirable in a weight-constrained application (like the example of the flying robot) because an inductor takes up a significant percentage of the overall weight. Therefore there is a need in the industry to address one or more of these shortcomings SUMMARY OF THE INVENTION

Embodiments of the present invention provide a system and method for providing a lightweight and high voltage actuator. Briefly described, the present invention is directed to a high voltage capacitive load driver circuit including a supply voltage, a first capacitor connected across a first node and a common node, a second capacitor connected across a second node and the common node, two drivers each having a gate driver, a high switch and a low switch, and a feedback block comprising feedback paths from the two drivers. The feedback block is configured to send trigger pulses to the first gate driver and the second gate driver. The timing of the trigger pulses is determined in part from the first feedback paths, the voltage across the capacitors are sinusoidal waveforms substantially out of phase.

Other systems, methods and features of the present invention will be or become apparent to one having ordinary skill in the art upon examining the following drawings and detailed description. It is intended that all such additional systems, methods, and features be included in this description, be within the scope of the present invention and protected by the accompanying claims.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The components in the drawings are not necessarily to scale, emphasis instead being placed upon clearly illustrating the principles of the present invention. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.

FIG. 1 is a schematic diagram of an exemplary prior art actuator.

FIG. 2A shows a prior art power electronics simultaneous drive circuit and signal diagram for the actuator of FIG. 1. FIG. 2B shows a prior art power electronics alternating drive circuit and signal diagram for the actuator of FIG. 1.

FIG. 3 A is a circuit diagram modeling the actuator of FIG. 1 as a pair of capacitors.

FIG. 3B shows the circuit diagram of FIG. 3 A where the common symbol for a piezoelectric layer is used in place of each of the capacitor symbols.

FIG. 4A is a circuit diagram of a first previous actuator driver solution.

FIG. 4B is a circuit diagram of a second previous actuator driver solution.

FIG. 5 is a schematic diagram of a first embodiment of a push-pull linear driver system.

FIG. 6 is a schematic diagram of the first embodiment of a push-pull linear driver system of FIG. 5 using envelope tracking, and a corresponding voltage plot.

FIG. 7 is a schematic diagram of a second embodiment of a push-pull linear driver system.

FIG. 8A is a schematic diagram of a third embodiment of a driver circuit providing charge sharing via a floating switch.

FIG. 8B is a plot of exemplary voltages and charging periods for the third embodiment.

FIG. 9 is a diagram depicting an exemplary implementation of charge sharing on an integrated circuit according to the third embodiment.

FIG. 10A is s schematic diagram of a switch implemented with a p-type device.

FIG. 10B is s schematic diagram of a switch implemented with an n-type device.

FIG. 11 is a schematic diagram of an NDMOS high side switch.

FIG. 12 is a schematic diagram of an integrated regulator that generates voltage to power buffers that drive a high side switch.

FIG. 13 is a detail of the current subtractor of FIG. 12. FIG. 14 is a schematic diagram of a circuit to sense current passing through the high side device of FIG. 12.

FIG. 15 is a plot of a typical waveform representing an actuator demonstrating an exemplary oscillatory behavior.

FIG. 16 is a plot of a typical waveform representing an actuator demonstrating an exemplary oscillatory behavior with common mode adjustment.

DETAILED DESCRIPTION

Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and the description to refer to the same or like parts.

The present disclosure describes exemplary embodiments for a lightweight piezoelectric actuator driver that may be used for, among other uses, a battery powered flying robot. While specific embodiments and applications are disclosed herein, the techniques described in this document are applicable to other circuit embodiments and applications as well.

FIG.5 shows an exemplary first embodiment of a push-pull linear actuator driver system 500 having a feedback block 510 that controls a high side switch Mff$ and a low side switch MLS of a switching block 536 of a driver 530, and samples a voltage divided version of VDDH and Vsw through an analog-to-digital converter (ADC) 512. Sampled feedback signals 560 are compared digitally by a digital comparator 514 with a computed waveform computed by a signal compute block 516 of a sine wave having a frequency co, to determine whether pulses are needed to be generated by a pulse generator 515 to drive the switches Mffs mdM^s in the switch module 536 via the gate driver 532, as well as the boost converter 550. A look-up table (LUT) 517 stores a digital copy of a peak-to-peak sinusoid. The signal compute block 516 reads the LUT 517 and calculates a digital reference for the digital comparator 514, based on amplitude and frequency inputs from the external control 522. The boost converter 550 generates the V_DDH voltage output from a battery voltage input.

The equations that are implemented in the signal compute block 516 are

^VDDH - ^VConstant (^Eq- 1)

^VSW = ^VCONSTANT /₂ + VOFFSET + VAMP * sin(a⁾t) (Eq. 2)

These computed signals, shown in the inset block 580, serve as the reference voltage for the digital comparator 514. V_AMP and V_0FFSET are controls input from higher level commands to change the oscillation pattern of the actuator 100 (FIG. 1).

As mentioned in the Background section, linear drivers may not be energy-efficient. While switching amplifiers may be more efficient, they generally may use one inductor per actuator, which is not desirable in a weight-constrained application (such as the example of the flying robot) because an inductor takes up a significant percentage of the overall weight.

Envelope tracking is a power-saving technique that dynamically modulates the a supply voltage of a driver circuit to the minimum required to reliably generate its time- varying output signal. A constant high voltage is needed for the simultaneous drive topology 200 (FIG. 2A), which ensures the voltage signals across the top and bottom PZT layers are always 180-degrees out of phase. In comparison, the alternating drive topology 250 (FIG. 2B) relies on two separate drivers to energize the top and bottom PZT layers independently. Since the two drive signals for the actuator 100 do not require a constant voltage bias, V_DDH may be dynamically reduced while reliably generating the desired output sinusoids across the two PZT layers, as shown by FIG. 6.

Envelope tracking relies on the controller for the boost converter 650 to monitor output waveform requirements and to appropriately set the voltage level VDDH- Envelope tracking reduces power consumption in two ways. First, envelope tracking minimizes the voltage level VDDH from which current is drawn to charge the capacitive actuator loads CTOP and CBOTTOM- Second, the efficiency of the boost converter improves when regulating lower output voltages with smaller step-up ratios.

Envelope tracking may be implemented a second embodiment 700, shown by FIG. 7. The second embodiment 700 is similar to the first embodiment 500 (FIG. 5), with the following differences. While the first embodiment has s single driver 530 and gate driver 532 driving CTOP and CBOTTOM, under the second embodiment a linear driver 730 includes a first gate driver 731 and a first switch block 736 to drive the top piezoelectric layer CTOP and a second gate driver 732 and a second switch block 737 to drive the bottom piezoelectric layer CBOTTOM- The pulse generator 515 in the feedback block 510 provides separate pulse trains for each switch in the switch blocks 736, 737. Each of the switch blocks 736, 737 provides a feedback channel to the ADC 512 in the feedback block 510, as well as to the boost converter 550.

The general architecture of the feedback block 510 is the same as the first embodiment. However, the signal compute block 516 uses a different reference voltage computation,

^V BOTTOM = ^VCONSTANT /₂ + VOFFSET + VAMP * sin(a>t) (Eq. 3) VTOP = ^VCONSTANT /₂ - VOFFSET ^~ V_AMP * sin(wt) (Eq. 4)

^VDDH = ^MAX( ^VTOP> V BOTTOM) (¾· ⁵) In addition to envelope tracking, the alternating drive topology in the second embodiment 700 offers an opportunity to further reduce power consumption by moving charge from one capacitive actuator load (at a higher voltage) to the other capacitive load (at a lower voltage). FIG. 8A shows a third embodiment of a driver circuit providing charge sharing via a floating switch Mcs- Charge sharing may occur, for example, during two- quarter cycles of the sinusoid, as illustrated by FIG. 8B. Once VJQP and ^BOTTOM ^{are at} their respective maximum and minimum values within a cycle, enabling Mcs discharges CJOP while CpOTTOM charges up. This charge sharing occurs because the sinusoidal waveforms across the two PZT layers are 180 degrees out of phase.

An exemplary implementation of charge sharing on an integrated circuit under the third embodiment is shown in FIG. 9. This implementation adds a pair of charge sharing switches M_H3 and M_H4 to the switch block of the driver 730 (FIG 7). To keep the gate drive logic simple, the charge sharing switches may be driven with the same control signals that drive Mm and Mm- For instance, when charging up CpOTTOM transistors Mm and M both turn on. If pQp is at a higher voltage potential than CpQppQj^, then CpoppQM receives the majority of charge from pQp through the body diode ofMff^ and transistor Mff^. Otherwise, CpQppQj^ charges up through Μρρ .

While the above embodiments illustrate how to improve efficiency of energy delivery and recovery for a multi-layer piezo-actuator, these techniques are applicable to any high voltage capacitive load driver that operates with multiple capacitive loads. Moreover, this is the first application of envelope tracking and charge sharing to a high voltage driver.

Additional details of the gate drive circuitry not shown in the previous embodiments may be important to the energy efficiency and density of a high voltage driver. In particular, the high-side switches, for example, Mm, Mm, Mm, Mm, may be implemented as high voltage transistors using special gate drivers. These high voltage transistors may operate in a similar fashion to low voltage CMOS devices. As shown in FIG. 10A, a switch implemented with a p-type device (PDMOS) may be turned on if the gate voltage is 4V below the source voltage. For example, the source terminal (labeled 'S') is equal to VDDH at 300V. To turn on the high-side switch Mffg the gate terminal (labeled 'G') may be at 296V.

In contrast, As shown in FIG. 10B, a switch implemented using an n-type device (NDMOS) for the high-side switch turns on when the gate voltage is 4V above the source voltage. However, the source terminal (labeled 'S') is equal to VOUT, which changes following a sinusoidal waveform. To turn on the high-side switch Mff$ the gate terminal should be 4V above the time varying voltage VOUT-

Using PDMOS as the high side switch, there are many options regarding generating the gate drive voltage. However, as shown in FIG. 11, using NDMOS as the high side switch, a floating capacitor 1110 may be suitable to generate a voltage VDDF that is always at least 4V above the varying actuator voltage VOUT-

Previously, there was no good way to charge the floating capacitor 1110 and ensuring less than 4V. One common problem with high voltage BCD (Bipolar, CMOS, DMOS) IC technologies is that a P-type DMOS consumes much more area than an N-type DMOS with the same drive strength. For example, a 300V process for an actuator driver, the P-DMOS device may occupy approximately ten times the area of a comparable N-DMOS device.

FIG. 12 shows an integrated regulator 1200 that generates VDDF to power buffers that drive the high side switch M_Hs- A traditional bootstrapped regulator only charges VDDF when Vsw falls close to 0V. Instead, here the linear regulator maintains the voltage across the floating capacitor 1110 CFLOAT above 4V by drawing current from the high supply VDDH-

The regulator 1200 includes a diode clamp 1230, a replica bias 1240, and a current subtracter 1250. A core component of the regulator 1200 is a voltage current converter 1220. The voltage current converter 1220 translates voltage drops on CFLOAT into a current signal via a P-type DMOS M_Pi, operating in the saturation region degenerated by three diode- connected transistors.

V_FS = VDDF - V_sw = 3V_Diode + Vgs_M (Eq. 6)

Because Voiode is relatively constant and does not change with VFS _, lsense =

(Eq. 7)

More generally, the circuit may be configured by selecting the number of diodes to moderate the sensitivity of Is_ENSE to VFS- first advantage of this voltage to current converter over earlier circuits is this circuit has high input impedance, so it does not affect other circuits that are connected to VDDF and SW nodes. Secondly, this voltage to current converter is suitable for high voltage operation because M_Pi is a high voltage DMOS transistor. Third, this voltage to current converter circuit converts VFS to an output current ISENSE independent of the voltage Vsw-

The current mode comparator consists of a reference (bias) current 1240 and a current mode subtractor 1250. The sense current is subtracted from a supply-voltage-tracking reference current. The portion of FIG. 12 representing the reference current and the current subtractor is shown in FIG. 13. The current IREF - ISENSE is copied to charge the floating capacitor CFLOAT off of the high voltage supply VDDH-

While the above embodiments have been described in the context of an actuator driver, other applications are possible. For example, the voltage-to-current may be employed as a circuit to sense the current passing through the high side device. The same design may be used to build the circuit shown by FIG. 14 so that ISENSE is correlated with Isw_.

A variation on the above embodiments further reduces the power consumption of a driver for an actuator 100 (FIG. 1). Because of the piezoelectric effect, each of the top piezoelectric layer 121 (FIG. 1) and the bottom piezoelectric layer 122 (FIG. 1) in the multilayer actuator 100 (FIG. 1) contract proportionally to the applied voltage.

ALTOP = a*Vrop (Eq. 8)

ALBOTTOM = ^Q*VBOTTOM (Eq. 9)

Because the actuator 100 (FIG. 1) is fixed on one end, when the top piezoelectric layer 121 (FIG. 1) and the bottom piezoelectric layer 122 (FIG. 1) contract by different amount, the actuator 100 (FIG. 1) deflects. Because the actual contraction amount on the actuator 100 (FIG. 1) is small compared to the length of the actuator 100 (FIG. 1), the deflection angle of the actuator 100 (FIG. 1) for a first order is proportional to the length difference between the top piezoelectric layer 121 (FIG. 1) and the bottom piezoelectric layer 122 (FIG. 1):

Deflection Angle φ o ( AL_TOp - ALBOTTOM) « (V_TOP - VBOTTOM) (Eq. 10)

■=> φ oc(V_TOp - VBOTTOM) (Eq. 11)

The difference (VTOP - VBOTTOM) is referred to the differential mode signal and (VTOP + VBOTTOM)/2 is referred to as the common mode signal. While the common mode signal (VTOP + VBOTTOM)/2 does not affect the deflection behavior of a multilayer actuator, the drive consumes more power in accord with a higher the common mode voltage. As VBOTTOM and VTOP are both positive voltages, the minimum common mode voltage is when min(VBOTTOM_, VTOP) is 0V.

For example, the left part of FIG. 15 shows a typical waveform that represents an actuator making a certain oscillatory behavior. The right part of FIG. 15 shows a waveform that produces exactly the same actuator behavior, but has a smaller common mode signal VBIAS ⁼ (VTOP + VBOTTOM)-

Furthermore, for practical purposes, the common mode adjustment feature may implemented into the control to allow dynamic change of VBIAS voltage in response to VTOP - VBOTTOM for any specific actuator motion. A sketch of a sample signal is shown in FIG. 16. To implement this on the first embodiment push-pull linear driver, the digital reference equations become:

^VDDH - ^VAMP + 2 I V OFFSET I (Eq. 12)

^VSW = ^~ + ^VOFFSET + VAMP * sin(iot) + \ V_0FFSET \ (Eq. 13)

Combining this with Envelope tracking results in

^V BOTTOM - ~ ^{+ V}OFFSET + ^VAMP * sin (iot) + I VOFFSET I (¾ ¹⁴)

- ^~ VOFFSET ^{~ V} _AMP * sin(wt) + | _0FFSi?T| (Eq. 15)

^VDDH = ^MAX( ^VTOP> VBOTTOM ) ¹⁶>

This relationship minimizes the common mode voltage VTOP - VBOTTOM at any given point of time as a function of the input parameters VOFFSET and VAMP_. It also maintains that VTOP and VBOTTOM are positive voltage at all times.

It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents.

Claims

CLAIMS What is claimed is:

1. A high voltage capacitive load driver circuit, comprising:

an intermediate supply voltage VDDH;

a first capacitor connected across a first node and a common node;

a second capacitor connected across a second node and the common node;

a first driver comprising:

a first gate driver;

a first high switch M_Hsi between VDDH and the first node; and

a first low switch M_Lsi connected between the first node and ground;

a second driver comprising:

a second gate driver;

a second high switch M_HS2 between VDDH and the second node; and a second low switch M_LS2 between the second node and ground; and a feedback block comprising:

a first feedback path from the first driver; and

a second feedback path from the second driver,

wherein the feedback block is configured to send trigger pulses to the first gate driver and the second gate driver, the timing of the trigger pulses is determined in part from the first feedback path and the second feedback path, the switch node is grounded, the voltage across the first capacitor is V_top, the voltage across the second capacitor is Vbottom, and V_top and Vbottom comprise sinusoidal waveforms substantially 180 degrees out of phase.

2. The circuit of claim 1 , further comprising a charge sharing switch Mcs disposed between the second node and the first node.

3. The circuit of claim 2, wherein Mcs further comprises:

a first floating switch M_H3 connected between the first node and a third node;

a second floating switch M_H4 connected between the third node and the second node,

wherein the third node connects the drains of M_H3 and M_H4 or the sources of M_H3 and

M_H4.

4. The circuit of claim 3, wherein each of M_H3 and M_H4 comprises a source-drain body diode.

5. The circuit of claim 3, wherein the first floating switch M_H3 is configured to switch from open to closed during a portion of a cycle of a voltage waveform at the switch node.

6. The circuit of claim 3, wherein the second floating switch M_H4 is configured to switch from open to closed during a portion of a cycle of a voltage waveform at the switch node.

7. The actuator of any of claims 3 to 5, further comprising a high side switch driver for any of the group consisting of MHSI, MHSI, MHSI, and M_Hs4, the driver comprising: a level converter connected to the high side switch gate; a floating capacitor connected between the high side switch source and the high side switch gate;

wherein the high side switch source is connected to one of the first node or the second node; and the level converter is configured to maintain at least a minimum voltage drop VDDF across the high side switch source and the high side switch gate.

8. The actuator of claim 7 further comprising a voltage to current converter comprising:

a P-type DMOS switch M_Pi comprising a gate connected to the Vsw side of the

floating capacitor; and

a plurality of diodes connected between an M_Pi source and VDDF-

9. The circuit of claim 1 , wherein the common mode of the first node voltage and the second node voltage are dynamically adjusted according to the amplitude and offset setting:

highnode ⁼ V_amp/2 + V₀ff_set + V_amp * sin (cot) + |V₀ffset| ;

iownode = V_amp/2 - V_offset - V_amp * sin (cot) + I offsetl ; and

VCM = (Vbottom + Vtop )/2 = V_amp/2+ |V₀ffset|

where t is time, ω is a frequency of V_top and Vbottom, V_constant is a constant, and V_amp and Voffset are controls input from higher level commands to change the oscillation pattern of the actuator.

10. The circuit of claim 1 , wherein the capacitive load comprises a piezoelectric actuator comprising: a first layer of a piezoelectric material;

a second layer of the piezoelectric material;

a carbon fiber composite layer disposed between the first and second layers of the piezoelectric material;

a first electrode in electrical contact with the first layer of the piezoelectric material; a second electrode in electrical contact with the second layer of the piezoelectric material; and

a third electrode in electrical contact with the carbon fiber composite layer, wherein the first capacitor comprises the first layer of the piezoelectric material and the carbon fiber composite layer, the second capacitor comprises the second layer of the piezoelectric material and the carbon fiber composite layer, and the switch node comprises the switch node.

1 1. A method for envelope tracking the actuator of claim 1, comprising the steps monitoring output wave voltage at the switch node; and

modulating VDDH to minimize a voltage level from which a current is drawn to chargi a capacitive actuator load.

12. The method of claim 11 , wherein modulating VDDH further comprises:

Vhighnode = V_COnstant/2 + V₀ffset + V_amp * Sin (cot);

Viownode = V_constant/2 - V_off_set - V_amp * sin (cot); and

VDDH = max(V_top, Vbottom), where t is time, ω is excitation frequency of V_top and Vbottom, V_constant is a constant, and Vamp and Voffset are controls input from higher level commands to change the oscillation pattern of the actuator.