WO2016076414A1 - Semiconductor chip mounting method and semiconductor chip mounting-use protective sheet - Google Patents

Semiconductor chip mounting method and semiconductor chip mounting-use protective sheet Download PDF

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Publication number
WO2016076414A1
WO2016076414A1 PCT/JP2015/081958 JP2015081958W WO2016076414A1 WO 2016076414 A1 WO2016076414 A1 WO 2016076414A1 JP 2015081958 W JP2015081958 W JP 2015081958W WO 2016076414 A1 WO2016076414 A1 WO 2016076414A1
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WO
WIPO (PCT)
Prior art keywords
semiconductor chip
protective sheet
bumps
mounting
base material
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PCT/JP2015/081958
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French (fr)
Japanese (ja)
Inventor
義生 野上
潤 稲垣
上原　秀雄
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東レエンジニアリング株式会社
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Publication of WO2016076414A1 publication Critical patent/WO2016076414A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • the present invention relates to a protective sheet for protecting bumps provided on an interposer or a semiconductor chip used in three-dimensional mounting, and a three-dimensional mounting method using the protective sheet.
  • Three-dimensional mounting is known as a mounting method for realizing high-density mounting of semiconductor components (for example, Patent Document 1).
  • the three-dimensional mounting method is a mounting method in which semiconductor chips cut into pieces are stacked and mounted three-dimensionally.
  • the stacked semiconductor chips are connected by through-silicon vias (TSV).
  • TSV through-silicon vias
  • Micro bumps are formed on the lower surface of the lowermost semiconductor chip, and are mounted on an interposer and packaged.
  • the interposer has a semiconductor chip mounted on the upper surface and is provided with ball bumps so as to surround the stacked semiconductor chips.
  • the interposer 50, the ball bump 51, and the semiconductor chip 55 are arranged as shown in FIG. It becomes.
  • the ball bumps are arranged on the upper surface of the interposer, a footprint is required and there is a problem that there is a limit to miniaturization of the whole package.
  • the laminated semiconductor chip and the interposer are often joined by reflow heating.
  • a load due to the pressure is applied to the lower surface of the interposer.
  • the ball bumps may be deformed and contact between the ball bumps due to the deformation, that is, a short circuit may occur.
  • the positional relationship among the interposer 50, the ball bump 51, the semiconductor chip 55, the bonding tool 43 and the bonding stage 41 is as shown in FIG. 19, and the ball bump 51 supports the load from the bonding tool 43. I understand that.
  • the ball bump on the lower surface of the interposer is not subjected to a load that exceeds the weight of the interposer and the semiconductor chip. Therefore, if the ball bump is made of a material having a relatively high heat resistance such as copper or a copper alloy, problems such as the above-described deformation are unlikely to occur.
  • the ball bumps are solder bumps
  • the solder bumps are softened due to refree heating, and the solder bumps are deformed or stuck to the bonding stage even under the load of the interposer and the semiconductor chip. Another problem may occur.
  • a three-dimensional mounting method that can reduce the package size and has high production efficiency.
  • a semiconductor chip is mounted by pressing and / or heating with a bonding tool or reflow heating in a state where bumps are provided on the lower surface of the interposer or the semiconductor chip.
  • a protective sheet that can withstand pressure and / or heating by a bonding tool or reflow heating is required.
  • the problem to be solved by the present invention is to provide a protective sheet for protecting bumps provided on an interposer or a semiconductor chip used for three-dimensional mounting, and a three-dimensional mounting method using the protective sheet.
  • the bumps referred to herein are called ball bumps, stud bumps, pillar bumps, micro bumps or the like, and are contact terminals protruding in a convex shape from the surface of the interposer or semiconductor chip.
  • the substrate having a plurality of bumps and the semiconductor chip placed on the substrate are sandwiched by the pressing and / or heating means.
  • a protective sheet that substantially contacts only the surface of the base of the bump part is interposed between the pressure and / or heating means and the base,
  • a semiconductor chip mounting method characterized by pressurizing and / or heating.
  • a plurality of base materials having a plurality of bumps and a semiconductor chip stacked between the plurality of base materials are sandwiched by pressing and / or heating means.
  • a semiconductor chip mounting method for mounting the semiconductor chip between the plurality of substrates by applying pressure and / or heating while the plurality of bumps of the substrate by the pressing and / or heating means In the case of sandwiching a portion (bump portion) where there is a gap, a protective sheet that substantially contacts only the surface of the substrate at the bump portion is interposed between the pressing and / or heating means and the substrate.
  • a semiconductor chip mounting method characterized by pressurizing and / or heating.
  • the surface of the protective sheet facing the bump part faces each of the plurality of bumps.
  • a semiconductor chip mounting method characterized in that a recess is provided at a position and substantially contacts only the substrate surface between the plurality of bumps.
  • invention of Claim 4 It is a semiconductor chip mounting method of Claim 3, Comprising: At least one part of the formation process of the said bump to the said base material is made
  • a featured semiconductor chip mounting method is provided.
  • the invention according to claim 5 is the semiconductor chip mounting method according to claim 3 or 4, wherein the protective sheet is made of a polyimide film, and the concave portion is formed by polyimide etching.
  • a featured semiconductor chip mounting method is provided.
  • the invention according to claim 6 is a protective sheet for mounting a semiconductor chip used in mounting a semiconductor chip by mounting the semiconductor chip on a substrate having a plurality of bumps by pressing and / or heating means
  • a protective sheet for mounting a semiconductor chip is used by interposing between a part (bump part) where the plurality of bumps of the substrate are present and the pressurizing and / or heating means, and facing each of the plurality of bumps
  • a protective sheet for mounting a semiconductor chip characterized in that a recess is provided at a position to make contact with only the surface of the base material between the plurality of bumps.
  • the invention according to claim 7 is characterized in that the semiconductor chip protection sheet is mainly made of a polyimide film, and the recesses are formed by polyimide etching. A protective sheet is provided.
  • the protective sheet for mounting a semiconductor chip is made of a polyimide film having a metal layer on at least one surface thereof, the polyimide etching is by wet etching, and the metal layer is the 8.
  • the invention according to claim 9 is characterized in that at least a part of the metal layer is formed by plating, and the thickness is different on both sides of the polyimide film.
  • a protective sheet for mounting a semiconductor chip is provided.
  • the plurality of bumps are regularly arranged on the substrate at a pitch P in the arrangement direction, each having a height H and an arrangement direction width D
  • the semiconductor chip protective sheet is made of a polyimide film having a thickness h2 having a metal layer having a thickness h1 on the surface of at least the following small diameter d1, and the cross section of the metal layer in the recess in the cross section in the arrangement direction is a rectangular shape having a width d1.
  • the cross section of the polyimide film is an isosceles trapezoidal shape with a large diameter d2 and a small diameter d1 with the metal layer side narrowed, h1 + h2> H D ⁇ d2 ⁇ P Pd2 ⁇ 10 ⁇ m
  • the protective sheet for mounting a semiconductor chip according to any one of claims 6 to 9, wherein the relationship is satisfied.
  • the plurality of bumps are regularly arranged on the substrate at a pitch P in the arrangement direction, each having a height H and an arrangement direction width D
  • the semiconductor chip protection sheet is made of a polyimide film with a thickness h2 having a metal layer with a thickness h1 on at least one side thereof, and the cross section of the metal layer in the recess in the arrangement direction cross section has a rectangular shape with a width d2.
  • the cross section of the polyimide film has a drum shape with a central portion in the thickness direction narrowed to a diameter d1, h1 + h2> H D ⁇ d2 ⁇ P Pd2 ⁇ 10 ⁇ m
  • the protective sheet for mounting a semiconductor chip according to any one of claims 6 to 9, wherein the relationship is satisfied.
  • the invention according to claim 12 provides the protective sheet for mounting a semiconductor chip according to claim 10 or 11, characterized in that Pd2 ⁇ 20 ⁇ m.
  • the protective sheet for mounting a semiconductor chip has an alignment mark for confirming a relative position between the semiconductor chip protective sheet and the base material on the surface of the base material, and the concave portion.
  • a protective sheet for mounting a semiconductor chip according to any one of claims 6 to 12 is provided.
  • the protective sheet for mounting a semiconductor chip has a plurality of the recesses on the substrate side surface, and the array pattern itself of the plurality of recesses is used as an alignment mark.
  • a protective sheet for mounting a semiconductor chip according to any one of claims 6 to 12 is provided.
  • the protective sheet is in contact with only the surface between the bumps of the bump portion of the base material, so that the load by the pressurization and / or heating means does not act on the bump, and the bump
  • the semiconductor chip can be three-dimensionally mounted on the interposer without deforming.
  • the protective sheet is in contact with only the surface between the bumps of the bump portion of the base material.
  • the semiconductor chip can be three-dimensionally mounted on the interposer without applying a load by the pressurization and / or heating means to the bumps and without deforming the bumps.
  • the protective sheet is provided with a recess at a position facing each of the bumps of the base material, and the protective sheet substantially contacts only the surface of the base material between the plurality of bumps. Therefore, the load by the pressurization and / or heating means does not act on the bumps, so that the semiconductor chip can be three-dimensionally mounted on the interposer without deforming the bumps.
  • the protective sheet is made of a polyimide film, and a protective sheet excellent in mechanical strength, heat resistance, and chemical resistance can be provided.
  • the concave portion is provided at a position facing the bump, and the bump is deformed by the pressurization and / or heating by the heating means when mounting the semiconductor chip.
  • the protective sheet which can prevent this can be provided.
  • FIG. 1 It is a schematic sectional drawing which shows the state which etched the copper film of the polyimide film with a copper which has a copper film on both surfaces, and formed the opening in both surfaces. It is a schematic sectional drawing which shows the state which performed thin film nickel plating on the copper film of the single side
  • the material properties required for a protective sheet for mounting a semiconductor chip include heat resistance, mechanical strength, dimensional stability, etc. Can be mentioned. Therefore, various metal materials, inorganic materials such as ceramics, organic materials called so-called engineering plastics, and the like having relatively high heat resistance are candidates.
  • the height of the bump provided on the interposer or the like is about 100 ⁇ m at most, and the thickness of the protective sheet is basically about 100 ⁇ m + ⁇ . Of course, even if it is thick, it functions as a protective sheet. Moreover, since the heating of the chip at the time of mounting is due to heat conduction from the heating and / or pressurizing means, it is often preferable that the thickness is as thin as possible. Considering a thickness of about 100 ⁇ m + ⁇ , plastic deformation such as warpage, wrinkle, and distortion may occur in a metal material, and cracks and chips caused by the brittleness may be a problem in an inorganic material such as ceramic.
  • the bumps provided on the interposer have a diameter of about 20 to 100 ⁇ m and are regularly arranged at a pitch of about 1 to several times the diameter, as will be described later in the embodiment. It is customary. Also, the number of chips per chip is about tens of thousands. That is, the protective sheet is required to have the same size and number of concave portions, and the processing method of the concave portions is also a restriction on material selection.
  • Laser processing is also possible in principle as a processing method for recesses and small holes, but laser processing may cause material alteration, melting, scorching, deformation, etc. due to local heating of the processing part. In many cases, the shape accuracy, position accuracy, surface roughness, and the like of the small holes deteriorate.
  • the thickness of the protective sheet is about 100 ⁇ m + ⁇
  • plastic deformation such as warpage, wrinkles and distortion is less likely to occur compared to metal materials, and compared to inorganic materials such as ceramics.
  • heat-resistant engineering plastics that are less prone to cracking and chipping due to brittleness are often suitable.
  • the heat-resistant engineering plastic that can withstand this temperature is polyimide, polyetheretherketone (PEEK), polyphenylene sulfide (PPS).
  • PEEK polyetheretherketone
  • PPS polyphenylene sulfide
  • polyimide having a film thickness of about 10 to 100 ⁇ m is easily available for flexible substrates and the like, and an etching processing solution for flexible substrates is also commercially available. Is preferred.
  • a polyimide film 10 is prepared.
  • the polyimide film 10 is, for example, a sheet having a thickness of, for example, 25 or 50 ⁇ m.
  • a copper film 11 is formed on one side of the polyimide film 10.
  • the copper film 11 is first formed by electroplating on the nichrome layer 12 formed by this sputtering method after first forming a very thin nichrome layer 12 having a thickness of about 10 nm on the polyimide film 10 by sputtering. It is a thing.
  • a photosensitive resist layer 8 is formed on the copper film 11.
  • the resist layer 8 may be formed by applying and solidifying a solution type resist solution by a known coating method such as spin coating, or by attaching a film type resist material.
  • the resist layer 8 is exposed and developed using the photomask 18 (photomask for forming recesses) having the same arrangement pattern as the arrangement position of the ball bumps 51 provided on the interposer 50 (FIG. 2), and the interposer 50 is exposed.
  • An opening 9 is provided in the resist layer 8 at a position corresponding to the ball bump 51 provided on the substrate. This state is shown in FIG.
  • the photomask used in the process of forming the ball bumps 50 of the interposer 51 is used in the production of the photomask 18 for forming the recesses, or the photomask used in the process of forming the ball bumps 50 of the interposer 51.
  • This CAD data is preferably used because the positions of the ball bumps 51 and the openings 9 on the interposer 50 can be easily matched.
  • the CAD data of the photomask used in the process of forming the ball bump 50 of the interposer 51 may be appropriately modified and used, for example, by making the size of the opening 9 slightly larger than the size (diameter) of the ball bump 50. It doesn't matter.
  • the opening 9 is used to etch the copper film 11 by a known etching technique such as ammonia etching, so that the opening 15 is provided in the copper film 11. If necessary, the nichrome layer 12 remaining in the ultrathin layer is removed by etching. Thereafter, the resist layer 8 is removed by a remover. This state is shown in FIG.
  • the polyimide film 10 is etched with a polyimide etchant using the copper film 11 with the openings 15 as a mask.
  • the recess 13 is formed at a position corresponding to the opening 15 provided in the copper film 11, that is, a position corresponding to the ball bump 51 on the interposer 50.
  • the recess 13 may reach the back surface, or may stop in the middle of the polyimide film 10 (so-called blind hole).
  • the recess 13 is formed in the polyimide film 10 at a position facing the ball bump 51 provided on the interposer 50.
  • the concave portion 13 may be a concave portion corresponding to each of the ball bumps 51 as shown in the present embodiment, or a groove-like shape containing a plurality of ball bumps 51 arranged in a row. Further, it may have a considerable area including all of the plurality of ball bumps 51 adjacent to each other.
  • the copper film 11 is left as it is after the formation of the recess 13, but the copper film 11 may be removed by etching to form a protective sheet made of only the polyimide film 10. (See FIG. 10) For example, in the case where contamination of the Cu component of the copper film 11 will be a problem later, or when the ball bump 51 is easy to adhere to Cu, such as a solder bump, the copper film 11 is removed. In some cases, it is preferable to keep it.
  • the prepared protective sheet 1 is sucked and held on the bonding stage 41 of the bonding apparatus 40.
  • the bonding stage 41 corresponds to one of the pressing / heating means referred to in this specification.
  • the interposer 50 is placed on the protective sheet 1 by aligning the ball bumps 51 of the interposer 50 at the position of the recess 13 of the protective sheet 1.
  • the ball bump 51 is enclosed in the recess 13, and the protective sheet 1 is substantially in contact with only the surface of the interposer 50 between the ball bumps 51.
  • the stacked semiconductor chips 55 are mounted at predetermined positions of the interposer 50 by the bonding tool 43.
  • the bonding stool 43 corresponds to the other of the pressurizing / heating means referred to in this specification. Mounting is performed by applying a predetermined pressure and a predetermined heating.
  • the ball bump 51 is included in the recess 13, and the protective sheet 1 is substantially in contact only with the surface of the interposer 50 between the ball bumps 51. Even when the pressure is applied, the protective sheet 1 supports the load due to the pressure, and the load does not act on the ball bump 51.
  • the protective sheet 1 is composed of the polyimide film 10 having excellent heat resistance and high strength, deformation due to pressurization and / or heating does not occur.
  • the protective sheet 1 substantially contacts only the surface of the interposer 50 between the ball bumps 51” will be described.
  • FIG. 9A consider a case where the ball bump 51 is in contact with the side surface of the recess 13 at only one point in the cross-sectional view. In this case, even if the bonding tool 43 is overloaded, the load of the bonding tool 43 does not act on the ball bump 51 if a slight elastic deformation of the protective sheet is ignored. Further, as shown in FIG.
  • the bonding tool 43 is raised and the interposer 50 is removed from the protective sheet 1.
  • the protective sheet 1 is used for mounting the stacked semiconductor chips 55 on the next interposer 50.
  • the protective sheet 1 may be replaced for each mounting process or may be used continuously for a plurality of mounting processes.
  • the sheet protection sheet 1 may be replaced each time, or the protection sheet 1 is continuously formed in a reel or tape shape, and the winding state is set as an appropriate winding form.
  • the protective sheets 1 may be sequentially sent out and replaced.
  • the recess 13 is processed by etching from one side of the polyimide film 10 by polyimide etching, the side surface of the recess 13 is not perpendicular to the surface. . In many cases, the inclined surface is at most 45 degrees. In other words, it is usual that the tapered hole is not a cylindrical straight hole but is opened on the copper film 11 side.
  • the width of the narrow portion is preferably 10 ⁇ m or more, and more preferably 20 ⁇ m or more.
  • the pitch of the ball bumps 51 is smaller than the diameter of the ball bumps 51, if a protective sheet 35 according to a development mode in which polyimide etching described below is performed from both sides is applied, a narrow portion is not formed. This is preferable because the interval between adjacent concave portions can be narrowed.
  • the cross-sectional shape of the recess has a drum shape with a small diameter at the center when viewed in the thickness direction of the polyimide film.
  • a polyimide film 20 with copper having copper films 22 and 23 on both sides is prepared.
  • the polyimide film 20 with copper is formed by forming copper films 22 and 23 on both sides of a polyimide film 21 having a thickness of 25 and 50 ⁇ m.
  • the copper films 22 and 23 are first formed on the polyimide film 21 by sputtering to form the ultrathin nichrome layers 24 and 25 having a thickness of about 10 nm, and then the electric power is applied to the nichrome layers 24 and 25 formed by this sputtering method. It is formed by plating.
  • photosensitive resist layers 28 and 29 are formed on the copper films 22 and 23 on both sides.
  • a solution type resist solution may be applied and solidified by a known coating method such as spin coating, or a film type resist material may be applied.
  • resist layers 28 and 29 on both sides are exposed and developed using a photomask having a pattern of the positions of the ball bumps 51 provided on the interposer 50 (recess forming photomask), and the balls provided on the interposer 50 are exposed. Resist layers 28 and 29 openings 30 and 31 corresponding to the bumps 51 are provided. This state is shown in FIG.
  • the openings 30 and 31 are used to etch the copper films 22 and 23 from both sides by a known etching technique such as ammonia etching, so that the openings 32 and 33 are provided in the copper films 22 and 23. If necessary, the nichrome layers 24 and 25 remaining in the ultrathin layer at the bottoms of the openings 32 and 33 are removed by etching. Thereafter, the resist layers 28 and 29 are removed by a remover. This state is shown in FIG.
  • a nickel layer 34 having a thickness of about 1 ⁇ m is formed only on the copper film 23 on one side.
  • a mask film (not shown) may be applied to the entire surface of the copper film 22 side of the polyimide film 20 with copper and electroplated with nickel.
  • the role of the nickel layer 34 is a function as a protective film at the time of removal of the copper film 22 described later by etching.
  • the polyimide film 21 is etched with a polyimide etching solution from both sides using the copper films 22 and 23 provided with the openings 32 and 33 as masks.
  • the recesses 35 are formed at positions corresponding to the openings 32 and 33, that is, positions corresponding to the ball bumps 51 on the interposer 50.
  • the recessed part 35 becomes a through-hole penetrating the polyimide film 21 front and back as shown in FIG.
  • the recess 35 is formed in the polyimide film 21 at a position facing the ball bump 51 provided on the interposer 50.
  • a commercially available polyimide film with copper has only a so-called thickness of 25, 50 ⁇ m, etc., and depending on the height of the ball bump 51, the overall thickness as a protective sheet may be insufficient. In such a case, if the overall thickness of the protective sheet is adjusted by the pressure film nickel layer 36 as shown in the developed form, it is preferable that the concave portions 35 corresponding to the height and pitch of the ball bumps can be formed.
  • the nickel layer 34 and the thick nickel layer 36 are provided on the interposer side, but it is of course possible to form them on the stage side.
  • the protective sheet according to the basic form and the developed form of the present invention described above may be used for stacking semiconductor chips having micro bumps.
  • the recess 13 is formed using a polyimide film having a thickness of 5 ⁇ m to 10 ⁇ m in the steps shown in FIGS.
  • the protective sheet 1 having the recesses 13 can deform the microbumps when the stacked semiconductor chips are pressed and / or heated. It can protect and perform good lamination.
  • FIG. 20 shows another embodiment of the present invention.
  • This is a diagram showing a state in which a plurality of stacked semiconductor chips 55 are three-dimensionally mounted between a plurality (two) of interposers 50. Even in such a configuration in which a semiconductor chip is sandwiched between two interposers, the semiconductor chip mounting method and the semiconductor chip mounting protection sheet of the present invention are applicable.
  • FIG. 21A shows the size and positional relationship between the protective sheet 60 and the substrate 61
  • FIG. 21B shows the size of the bump 66 and the positional relationship between the protective sheet 60
  • the base material 61 has a size of 25 mm ⁇ 25 mm
  • a cylindrical bump 66 having a substantially spherical top portion of the size shown in FIG.
  • the size of the protective sheet 60 is 50 ⁇ 50 mm, and the base material 61 is disposed at the center thereof.
  • alignment patterns 62a to 62d for relative alignment of the protective sheet 60 and the substrate 61 are formed outside the substrate 61 position.
  • a resist film RY3325 manufactured by Hitachi Chemical Co., Ltd. is attached to both surfaces, and a pattern corresponding to the cylindrical bump 66 is exposed by contact exposure, and then developed and dried with a developer (1% aqueous solution of sodium carbonate) to obtain a resist film. At this time, the patterns corresponding to the alignment marks 62a to 62d are simultaneously exposed.
  • a copper mask is formed by simultaneously etching the copper films on both sides by ammonia etching. At this time, the alignment marks 62a to 62d are simultaneously formed on the copper film.
  • a nickel layer is plated by 1 ⁇ m on the other copper mask by electrolytic nickel plating.
  • polyimide etching was performed from both sides using a polyimide etching solution TPE-3000 manufactured by Toray Engineering Co., Ltd. under conditions of 50 ° C. for 4 minutes to form a recess 67 (through hole) in the polyimide film 63.
  • portions in the vicinity of the alignment marks 62a to 62d were newly masked with a masking film to protect the copper film in the portions, and then the copper film in the central portion was removed by etching.
  • the nickel layer 64 having a thickness h1 of 15 ⁇ m was formed by further plating on the previously formed nickel layer of 1 ⁇ m by electrolytic nickel plating.
  • a protective sheet 60 having a total thickness of 65 ⁇ m was formed.
  • the cross-sectional shape of the concave portion 67 (through hole) was a drum shape with the central portion having a diameter (d1) of about 80 to 90 ⁇ m as shown in FIG. Since the diameter D of the cylindrical bump 67 is 75 microns, the concave portion 67 of the protective sheet 60 does not contact the cylindrical bump 66, and the protective sheet 60 substantially contacts only the surface of the base member 61, and the semiconductor according to the present invention. It was confirmed that it functions as a protective sheet for chip mounting.

Abstract

Provided are the following: an interposer used in three-dimensional mounting, or a protective sheet for protecting bumps provided to a semiconductor chip; and a three-dimensional mounting method that uses the protective sheet. More specifically, provided is a semiconductor chip mounting method in which, using a pressurizing and/or heating means, a substrate which has a plurality of bumps and a semiconductor chip which is placed on the substrate are pressurized and/or heated while being sandwiched and held, and as a result thereof, the semiconductor chip is mounted on the substrate. The semiconductor chip mounting method is characterized in that, if a site (bump site) where the plurality of bumps of the substrate are present is sandwiched and held by the pressurizing and/or heating means, pressurizing and/or heating is carried out with a protective sheet interposed between the pressurizing and/or heating means and the substrate, the protective sheet effectively only coming into contact with a substrate surface of the bump site.

Description

半導体チップ実装方法および半導体チップ実装用保護シートSemiconductor chip mounting method and protective sheet for semiconductor chip mounting
　本発明は、３次元実装において用いられるインターポーザもしくは半導体チップに設けられたバンプを保護する保護シートおよび該保護シートを用いた３次元実装方法に関する。 The present invention relates to a protective sheet for protecting bumps provided on an interposer or a semiconductor chip used in three-dimensional mounting, and a three-dimensional mounting method using the protective sheet.
　半導体部品の高密度実装を実現する実装方法として３次元実装が知られている（例えば、特許文献１）。３次元実装方法は、個片に裁断された半導体チップを積み重ねて立体的に実装する実装方法である。積層された半導体チップは、シリコン貫通電極（Through-silicon　via：ＴＳＶ）によって接続されている。最下層の半導体チップの下面にはマイクロバンプが形成され、インターポーザに実装されてパッケージ化される。インターポーザは、上面に半導体チップを搭載し、積層された半導体チップを囲むようにボールバンプを備えている場合が多く、例えば、インターポーザ５０、ボールバンプ５１、半導体チップ５５は図１８に示す様な配置となる。このため、積層による小型化のメリットがあるにもかかわらず、ボールバンプがインターポーザ上面に配置されるためフットプリントを要し、パッケージ全体の小型化に限界があるという問題があることが多い。 Three-dimensional mounting is known as a mounting method for realizing high-density mounting of semiconductor components (for example, Patent Document 1). The three-dimensional mounting method is a mounting method in which semiconductor chips cut into pieces are stacked and mounted three-dimensionally. The stacked semiconductor chips are connected by through-silicon vias (TSV). Micro bumps are formed on the lower surface of the lowermost semiconductor chip, and are mounted on an interposer and packaged. In many cases, the interposer has a semiconductor chip mounted on the upper surface and is provided with ball bumps so as to surround the stacked semiconductor chips. For example, the interposer 50, the ball bump 51, and the semiconductor chip 55 are arranged as shown in FIG. It becomes. For this reason, although there is a merit of miniaturization by stacking, since the ball bumps are arranged on the upper surface of the interposer, a footprint is required and there is a problem that there is a limit to miniaturization of the whole package.
　一方、インターポーザの下面にボールバンプを設ける場合は、積層された半導体チップとインターポーザとの接合はリフロー加熱によって行われる場合が多い。これは、例えばボンディングツールとボンディングステージ間に、積層された半導体チップとこれらを載持するインターポーザーを挟持し、加圧及び／又は加熱して接合しようとすると、加圧による荷重が、インターポーザ下面のボールバンプに作用してしまい、ボールバンプの変形や該変形によるボールバンプ同士の接触すなわち短絡を起こしてしまうことがあるからである。 On the other hand, when a ball bump is provided on the lower surface of the interposer, the laminated semiconductor chip and the interposer are often joined by reflow heating. This is because, for example, when a laminated semiconductor chip and an interposer that holds these semiconductor chips are sandwiched between a bonding tool and a bonding stage, and a pressure and / or heating is performed, a load due to the pressure is applied to the lower surface of the interposer. This is because the ball bumps may be deformed and contact between the ball bumps due to the deformation, that is, a short circuit may occur.
　すなわち、インターポーザ５０、ボールバンプ５１、半導体チップ５５とボンディングツール４３およびボンディングステージ４１の相互の位置関係は図１９に示す様なものとなり、ボンディングツール４３による荷重をボールバンプ５１が支える形となってしまうことがわかる。 That is, the positional relationship among the interposer 50, the ball bump 51, the semiconductor chip 55, the bonding tool 43 and the bonding stage 41 is as shown in FIG. 19, and the ball bump 51 supports the load from the bonding tool 43. I understand that.
　上述の通り、インターポーザの下面にボールバンプを設ける場合は、積層された半導体チップとインターポーザとの接合に、生産性に劣るリフロー加熱をとらざるを得ない場合もあるという問題がある。 As described above, when the ball bump is provided on the lower surface of the interposer, there is a problem in that reflow heating, which is inferior in productivity, may be required for joining the stacked semiconductor chip and the interposer.
　リフロー加熱ではインターポーザ下面のボールバンプには、インターポーザ及び半導体チップの自重以上の荷重は作用しない。従ってボールバンプが銅又は銅合金など比較的耐熱性の高い材料からなるものであれば、前述の変形等の問題が発生することは少ない。 In reflow heating, the ball bump on the lower surface of the interposer is not subjected to a load that exceeds the weight of the interposer and the semiconductor chip. Therefore, if the ball bump is made of a material having a relatively high heat resistance such as copper or a copper alloy, problems such as the above-described deformation are unlikely to occur.
　しながら、ボールバンプがはんだバンプである場合には、リフリー加熱にともなうはんだバンプの軟化で、インターポーザ及び半導体チップの自重程度の荷重でも該はんだバンプが変形したり、ボンディングステージに固着してしまう等の別の問題が発生することもある。 However, when the ball bumps are solder bumps, the solder bumps are softened due to refree heating, and the solder bumps are deformed or stuck to the bonding stage even under the load of the interposer and the semiconductor chip. Another problem may occur.
特開２００９－１１０９９５号公報JP 2009-110995 A
　そこで、パッケージが小型化でき、生産効率の高い３次元実装方法が求められる。具体的には、インターポーザもしくは半導体チップの下面にバンプを設けた状態で、半導体チップをボンディングツールやリフロー加熱で、加圧及び／又は加熱して実装する３次元実装方法が求められている。そのためには、ボンディングツールやリフロー加熱による加圧及び／又は加熱に耐えられる保護シートが求められる。 Therefore, there is a need for a three-dimensional mounting method that can reduce the package size and has high production efficiency. Specifically, there is a demand for a three-dimensional mounting method in which a semiconductor chip is mounted by pressing and / or heating with a bonding tool or reflow heating in a state where bumps are provided on the lower surface of the interposer or the semiconductor chip. For this purpose, a protective sheet that can withstand pressure and / or heating by a bonding tool or reflow heating is required.
　本発明の解決すべき課題は、３次元実装に用いられるインターポーザもしくは半導体チップに設けられたバンプを保護する保護シートおよび該保護シートを用いた３次元実装方法を提供することを課題とする。なおここでいうバンプとは、ボールバンプやスタッドバンプ、ピラーバンプ、マイクロバンプなどと称され、インターポーザもしくは半導体チップの表面から凸状に突き出した接触端子をいう。 The problem to be solved by the present invention is to provide a protective sheet for protecting bumps provided on an interposer or a semiconductor chip used for three-dimensional mounting, and a three-dimensional mounting method using the protective sheet. The bumps referred to herein are called ball bumps, stud bumps, pillar bumps, micro bumps or the like, and are contact terminals protruding in a convex shape from the surface of the interposer or semiconductor chip.
　上記課題を解決するために、請求項１に記載の発明においては、加圧及び／又は加熱手段によって、複数個のバンプを有する基材と該基材上に載置された半導体チップを挟持しつつ加圧及び／又は加熱することによって前記基材上に前記半導体チップを実装する半導体チップ実装方法であって、前記加圧及び／又は加熱手段によって前記基材の前記複数個のバンプの存在する部位（バンプ部位）を挟持する場合において、前記加圧及び／又は加熱手段と前記基材との間に、実質的に前記バンプ部位の前記基材表面にのみ接触する保護シートを介在させて、加圧及び／又は加熱することを特徴とする半導体チップ実装方法が提供される。 In order to solve the above-mentioned problem, in the invention described in claim 1, the substrate having a plurality of bumps and the semiconductor chip placed on the substrate are sandwiched by the pressing and / or heating means. A semiconductor chip mounting method for mounting the semiconductor chip on the base material by applying pressure and / or heating while the plurality of bumps of the base material are present by the pressurization and / or heating means. When sandwiching a part (bump part), a protective sheet that substantially contacts only the surface of the base of the bump part is interposed between the pressure and / or heating means and the base, There is provided a semiconductor chip mounting method characterized by pressurizing and / or heating.
　さらに、請求項２に記載の発明においては、加圧及び／又は加熱手段によって、複数個のバンプを有する複数枚の基材と該複数枚の基材間に積層載置された半導体チップを挟持しつつ加圧及び／又は加熱することによって前記複数枚の基材間に前記半導体チップを実装する半導体チップ実装方法であって、前記加圧及び／又は加熱手段によって前記基材の前記複数のバンプの存在する部位（バンプ部位）を挟持する場合において、前記加圧及び／又は加熱手段と前記基材との間に、実質的に前記バンプ部位の前記基材表面にのみ接触する保護シートを介在させて、加圧及び／又は加熱することを特徴とする半導体チップ実装方法が提供される。 Furthermore, in the invention described in claim 2, a plurality of base materials having a plurality of bumps and a semiconductor chip stacked between the plurality of base materials are sandwiched by pressing and / or heating means. A semiconductor chip mounting method for mounting the semiconductor chip between the plurality of substrates by applying pressure and / or heating while the plurality of bumps of the substrate by the pressing and / or heating means In the case of sandwiching a portion (bump portion) where there is a gap, a protective sheet that substantially contacts only the surface of the substrate at the bump portion is interposed between the pressing and / or heating means and the substrate. Thus, there is provided a semiconductor chip mounting method characterized by pressurizing and / or heating.
　請求項３に記載の発明においては、請求項１または２に記載の半導体チップ実装方法であって、前記保護シートの前記バンプ部位と対向する側の面には、前記複数のバンプ各々に対向する位置に凹部が設けられてなり、実質的に前記複数のバンプ間の前記基材表面にのみ接触するものであることを特徴とする半導体チップ実装方法が提供される。 According to a third aspect of the present invention, in the semiconductor chip mounting method according to the first or second aspect, the surface of the protective sheet facing the bump part faces each of the plurality of bumps. There is provided a semiconductor chip mounting method characterized in that a recess is provided at a position and substantially contacts only the substrate surface between the plurality of bumps.
　請求項４に記載の発明においては、請求項３に記載の半導体チップ実装方法であって、前記基材への前記バンプの形成工程の少なくとも一部はフォトリソグラフィーによってなされるものであり、かつ、前記保護シートの前記凹部の形成工程の少なくとも一部もフォトリソグラフィー工程によってなされるものであり、これら両フォトリソグラフィー工程に用いられるフォトマスク及び／又は該フォトマスク形成データが同一のものであることを特徴とする半導体チップ実装方法が提供される。 In invention of Claim 4, It is a semiconductor chip mounting method of Claim 3, Comprising: At least one part of the formation process of the said bump to the said base material is made | formed by photolithography, and That at least a part of the step of forming the concave portion of the protective sheet is also performed by a photolithography step, and that the photomask used in both the photolithography steps and / or the photomask formation data are the same. A featured semiconductor chip mounting method is provided.
　請求項５に記載の発明においては、請求項３または４に記載の半導体チップ実装方法であって、前記保護シートは、ポリイミドフィルムよりなり、前記凹部がポリイミドエッチングによって形成されたものであることを特徴とする半導体チップ実装方法が提供される。 The invention according to claim 5 is the semiconductor chip mounting method according to claim 3 or 4, wherein the protective sheet is made of a polyimide film, and the concave portion is formed by polyimide etching. A featured semiconductor chip mounting method is provided.
　請求項６に記載の発明においては、複数のバンプを有する基材上に、加圧及び／又は加熱手段によって半導体チップを実装する半導体チップ実装において用いられる半導体チップ実装用保護シートであって、該半導体チップ実装用保護シートは、前記基材の前記複数のバンプが存在する部位（バンプ部位）と前記加圧及び／又は加熱手段との間に介在させて用いられ、前記複数のバンプ各々に対向する位置に凹部が設けられてなり、実質的に前記複数のバンプ間の前記基材表面にのみ接触するものであることを特徴とする、半導体チップ実装用保護シートが提供される。 The invention according to claim 6 is a protective sheet for mounting a semiconductor chip used in mounting a semiconductor chip by mounting the semiconductor chip on a substrate having a plurality of bumps by pressing and / or heating means, A protective sheet for mounting a semiconductor chip is used by interposing between a part (bump part) where the plurality of bumps of the substrate are present and the pressurizing and / or heating means, and facing each of the plurality of bumps There is provided a protective sheet for mounting a semiconductor chip, characterized in that a recess is provided at a position to make contact with only the surface of the base material between the plurality of bumps.
　請求項７に記載の発明においては、　前記半導体チップ保護シートは、主としてポリイミドフィルムよりなり、前記凹部がポリイミドエッチングによって形成されたものであることを特徴とする請求項６に記載の半導体チップ実装用保護シートが提供される。 The invention according to claim 7 is characterized in that the semiconductor chip protection sheet is mainly made of a polyimide film, and the recesses are formed by polyimide etching. A protective sheet is provided.
　請求項８に記載の発明においては、前記半導体チップ実装用保護シートは、少なくともその片面に金属層を有するポリイミドフィルムよりなり、前記ポリイミドエッチングがウエットエッチングによるものであり、かつ、前記金属層が前記凹部を形成するウエットエッチング時のマスク層としても機能することを特徴とする請求項7に記載の半導体チップ実装用保護シートが提供される。 In the invention according to claim 8, the protective sheet for mounting a semiconductor chip is made of a polyimide film having a metal layer on at least one surface thereof, the polyimide etching is by wet etching, and the metal layer is the 8. The semiconductor chip mounting protective sheet according to claim 7, which also functions as a mask layer during wet etching for forming a recess.
　請求項９に記載の発明においては、前記金属層の少なくとも一部はめっきにより形成されるものであり、かつ、前記ポリイミドフィルムの両側においてその厚さが異なることを特徴とする請求項８に記載の半導体チップ実装用保護シートが提供される。 The invention according to claim 9 is characterized in that at least a part of the metal layer is formed by plating, and the thickness is different on both sides of the polyimide film. A protective sheet for mounting a semiconductor chip is provided.
　請求項１０記載の発明においては、前記複数のバンプは、配列方向にピッチPで規則的に前記基材上に配列され、各々が高さH、配列方向幅Dを有するものであり、さらに、前記半導体チップ保護シートは、少なくとも下記小径ｄ１側表面に厚さｈ１の金属層を有する厚さｈ２のポリイミドフィルムよりなり、前記配列方向断面において前記凹部の前記金属層の断面は幅ｄ１の長方形形状をなし、前記ポリイミドフィルムの断面は前記金属層側が狭まった大径ｄ２、小径ｄ１の等脚台形形状であり、
　ｈ１＋ｈ２＞H　
D＜ｄ２＜P
P－ｄ２≧１０μm
の関係を満たすことを特徴とする、請求項６乃至９のいずれかに記載の半導体チップ実装用保護シートが提供される。 In the invention of claim 10, the plurality of bumps are regularly arranged on the substrate at a pitch P in the arrangement direction, each having a height H and an arrangement direction width D, and The semiconductor chip protective sheet is made of a polyimide film having a thickness h2 having a metal layer having a thickness h1 on the surface of at least the following small diameter d1, and the cross section of the metal layer in the recess in the cross section in the arrangement direction is a rectangular shape having a width d1. The cross section of the polyimide film is an isosceles trapezoidal shape with a large diameter d2 and a small diameter d1 with the metal layer side narrowed,
h1 + h2> H
D <d2 <P
Pd2 ≧ 10μm
The protective sheet for mounting a semiconductor chip according to any one of claims 6 to 9, wherein the relationship is satisfied.
　請求項１１に記載の発明においては、前記複数のバンプは、配列方向にピッチPで規則的に前記基材上に配列され、各々が高さH、配列方向幅Dを有するものであり、さらに、前記半導体チップ保護シートは、少なくともその片側に厚さｈ１の金属層を有する厚さｈ２のポリイミドフィルムよりなり、前記配列方向断面において前記凹部の前記金属層の断面は幅ｄ２の長方形形状をなし、前記ポリイミドフィルムの断面は厚さ方向中央部が直径ｄ１に狭まった鼓型形状であり、
　ｈ１＋ｈ２＞H　
D＜ｄ２＜P
P－ｄ２≧１０μm
の関係を満たすことを特徴とする、請求項６乃至９のいずれかに記載の半導体チップ実装用保護シートが提供される。 In the invention of claim 11, the plurality of bumps are regularly arranged on the substrate at a pitch P in the arrangement direction, each having a height H and an arrangement direction width D, and The semiconductor chip protection sheet is made of a polyimide film with a thickness h2 having a metal layer with a thickness h1 on at least one side thereof, and the cross section of the metal layer in the recess in the arrangement direction cross section has a rectangular shape with a width d2. The cross section of the polyimide film has a drum shape with a central portion in the thickness direction narrowed to a diameter d1,
h1 + h2> H
D <d2 <P
Pd2 ≧ 10μm
The protective sheet for mounting a semiconductor chip according to any one of claims 6 to 9, wherein the relationship is satisfied.
　請求項１２に記載の発明においては、P－ｄ２≧２０μmであることを特徴とする請求項１０又は１１に記載の半導体チップ実装用保護シートが提供される。 The invention according to claim 12 provides the protective sheet for mounting a semiconductor chip according to claim 10 or 11, characterized in that Pd2 ≧ 20 μm.
　請求項１３に記載の発明においては、前記半導体チップ実装用保護シートは、その前記基材側表面に、前記半導体チップ保護シートと前記基材との相対位置確認の為のアライメントマークを、前記凹部とは別に有することを特徴とする請求項６乃至１２のいずれかに記載の半導体チップ実装用保護シートが提供される。 In the invention according to claim 13, the protective sheet for mounting a semiconductor chip has an alignment mark for confirming a relative position between the semiconductor chip protective sheet and the base material on the surface of the base material, and the concave portion. A protective sheet for mounting a semiconductor chip according to any one of claims 6 to 12 is provided.
　請求項１４に記載の発明においては、前記半導体チップ実装用保護シートは、その前記基材側表面に前記凹部のみを複数有するものであり、該複数の凹部の配列パターンそのものをアライメントマークとして用いることを特徴とする請求項６乃至１２のいずれかに記載の半導体チップ実装用保護シートが提供される。 In the invention described in claim 14, the protective sheet for mounting a semiconductor chip has a plurality of the recesses on the substrate side surface, and the array pattern itself of the plurality of recesses is used as an alignment mark. A protective sheet for mounting a semiconductor chip according to any one of claims 6 to 12 is provided.
　請求項１に記載の発明によれば、保護シートが、基材のバンプ部位のバンプ間表面にのみ接触することで、加圧及び／又は加熱手段による荷重がバンプには作用させず、該バンプを変形させること無く半導体チップをインターポーザ上に３次元実装することが出来る。 According to the first aspect of the present invention, the protective sheet is in contact with only the surface between the bumps of the bump portion of the base material, so that the load by the pressurization and / or heating means does not act on the bump, and the bump The semiconductor chip can be three-dimensionally mounted on the interposer without deforming.
　請求項２に記載の発明によれば、複数枚の基材間に複数枚の半導体チップを３次元実装する場合においても、保護シートが、基材のバンプ部位のバンプ間表面にのみ接触することで、加圧及び／又は加熱手段による荷重をバンプには作用させず、バンプを変形させること無く半導体チップをインターポーザに３次元実装することが出来る。 According to the invention described in claim 2, even when a plurality of semiconductor chips are three-dimensionally mounted between a plurality of base materials, the protective sheet is in contact with only the surface between the bumps of the bump portion of the base material. Thus, the semiconductor chip can be three-dimensionally mounted on the interposer without applying a load by the pressurization and / or heating means to the bumps and without deforming the bumps.
　請求項３に記載の発明によれば、保護シートには、基材のバンプ各々と対向する位置に凹部が設けられており、実質的に保護シートを複数のバンプ間の基材表面にのみ接触させることが可能となり、加圧及び／又は加熱手段による荷重がバンプには作用せず、よってバンプを変形させること無く半導体チップをインターポーザに３次元実装することが出来る。 According to the third aspect of the present invention, the protective sheet is provided with a recess at a position facing each of the bumps of the base material, and the protective sheet substantially contacts only the surface of the base material between the plurality of bumps. Therefore, the load by the pressurization and / or heating means does not act on the bumps, so that the semiconductor chip can be three-dimensionally mounted on the interposer without deforming the bumps.
　請求項４に記載の発明によれば、前記バンプの形成工程と、保護シートの前記凹部の形成に同一のフォトマスク及び／又は該フォトマスク形成データを使用することで、前記複数のバンプと前記凹部との相対位置を容易に一致させることが可能となる。 According to the invention described in claim 4, by using the same photomask and / or the photomask formation data for forming the bumps and forming the recesses of the protective sheet, the plurality of bumps and the It is possible to easily match the relative position with the recess.
　請求項５に記載の発明によれば、前記保護シートがポリイミドフィルムによりなるものであり、機械的強度、耐熱性、耐薬品性に優れる保護シートを提供することが出来る。 According to the invention described in claim 5, the protective sheet is made of a polyimide film, and a protective sheet excellent in mechanical strength, heat resistance, and chemical resistance can be provided.
　請求項６から請求項１４に記載の発明によれば、バンプと対向する位置に凹部が設けられ、半導体チップ実装時の加圧および／又は加熱手段による加圧及び／又は加熱によってバンプが変形することを防止することが出来る保護シートを提供することができる。 According to the invention described in claims 6 to 14, the concave portion is provided at a position facing the bump, and the bump is deformed by the pressurization and / or heating by the heating means when mounting the semiconductor chip. The protective sheet which can prevent this can be provided.
片面に銅膜を有する銅付きポリイミドフィルムを説明する概略断面図である。It is a schematic sectional drawing explaining the polyimide film with a copper which has a copper film on one side. ポリイミドフィルム上のレジスト層を露光している状態を示す概略断面図である。It is a schematic sectional drawing which shows the state which has exposed the resist layer on a polyimide film. ポリイミドフィルム上のレジスト層を現像し開口を形成した状態を説明する概略断面図である。It is a schematic sectional drawing explaining the state which developed the resist layer on a polyimide film and formed opening. ポリイミドフィルム上の銅膜をエッチングし開口を形成した状態を説明する概略断面図である。It is a schematic sectional drawing explaining the state which etched the copper film on a polyimide film and formed the opening. ポリイミドフィルムをエッチングし凹部を設けた状態を示す概略断面図である。It is a schematic sectional drawing which shows the state which etched the polyimide film and provided the recessed part. ボンディングステージに半導体チップ実装用保護シートを吸着保持した状態を説明する概略断面図である。It is a schematic sectional drawing explaining the state which attracted and held the protection sheet for semiconductor chip mounting on the bonding stage. 半導体チップ実装用保護シート上にインターポーザを載置した状態を説明する概略側面図である。It is a schematic side view explaining the state which mounted the interposer on the protection sheet for semiconductor chip mounting. インターポーザに半導体チップを積層実装する状態を説明する概略側面図である。It is a schematic side view explaining the state which laminates and mounts a semiconductor chip on an interposer. ボールバンプと凹部の相対位置関係を表す図である。It is a figure showing the relative positional relationship of a ball bump and a recessed part. 別の態様による、半導体チップ実装用保護シート上にインターポーザを載置した状態を示す概略側面図である。It is a schematic side view which shows the state which mounted the interposer on the protection sheet for semiconductor chip mounting by another aspect. 両面に銅膜を有する銅付きポリイミドフィルムの概略断面図である。It is a schematic sectional drawing of the polyimide film with a copper which has a copper film on both surfaces. 両面に銅膜を有する銅付きポリイミドフィルム上のレジスト層を現像し両面に開口を形成した状態を示す概略断面図である。It is a schematic sectional drawing which shows the state which developed the resist layer on the polyimide film with a copper which has a copper film on both surfaces, and formed opening on both surfaces. 両面に銅膜を有する銅付きポリイミドフィルムの銅膜をエッチングし両面に開口を形成した状態を示す概略断面図である。It is a schematic sectional drawing which shows the state which etched the copper film of the polyimide film with a copper which has a copper film on both surfaces, and formed the opening in both surfaces. 両面に銅膜を有する銅付きポリイミドフィルムの片面の銅膜上に薄膜ニッケルめっきをおこなった状態を示す概略断面図である。It is a schematic sectional drawing which shows the state which performed thin film nickel plating on the copper film of the single side | surface of the polyimide film with a copper which has a copper film on both surfaces. 両面に銅膜を有する銅付きポリイミドフィルムのポリイミドをエッチングし凹部を設けた状態を示す概略断面図である。。It is a schematic sectional drawing which shows the state which etched the polyimide of the polyimide film with a copper which has a copper film on both surfaces, and provided the recessed part. . 薄膜ニッケルめっき上にさらにめっきを行い圧膜ニッケルめっき層を形成した状態を示す概略断面図である。略断面図である。It is a schematic sectional drawing which shows the state which plated further on thin film nickel plating, and formed the pressure film nickel plating layer. FIG. 半導体チップ実装用保護シートを用いて、インターポーザに半導体チップを積層実装する状態を説明する概略側面図である。It is a schematic side view explaining the state which laminates and mounts a semiconductor chip on an interposer using a protection sheet for mounting a semiconductor chip. インターポーザの上面にボールバンプと積層されたチップが存在する状態を説明する従来技術に関わる概略断面図である。It is a schematic sectional drawing in connection with the prior art explaining the state where the chip | tip laminated | stacked with the ball bump exists on the upper surface of an interposer. 従来技術によって、インターポーザに半導体チップを積層実装する状態を説明する概略側面図である。It is a schematic side view explaining the state which laminates and mounts a semiconductor chip on an interposer by a prior art. 別の態様による、半導体チップ実装用保護シートを用いて、インターポーザに半導体チップを積層実装する状態を説明する概略側面図である。It is a schematic side view explaining the state which laminates and mounts a semiconductor chip on an interposer using the protection sheet for semiconductor chip mounting by another mode. 実施例の半導体チップ実装用保護シートと基材バンプを示す図である。It is a figure which shows the protective sheet for semiconductor chip mounting of an Example, and a base-material bump.
　前述した課題を解決する半導体チップ実装用保護シート（以下保護シートと略すことあり）に求められる材料的特性としては、実装時の加熱加圧に耐える耐熱性、機械的強度、寸法安定性などが挙げられる。したがって、各種金属材、セラミック等の無機材料、いわゆるエンジニアリングプラスチックと呼ばれる有機材料のうち比較的耐熱性高いものなどがその候補となる。 The material properties required for a protective sheet for mounting a semiconductor chip (hereinafter sometimes abbreviated as a protective sheet) that solve the above-mentioned problems include heat resistance, mechanical strength, dimensional stability, etc. Can be mentioned. Therefore, various metal materials, inorganic materials such as ceramics, organic materials called so-called engineering plastics, and the like having relatively high heat resistance are candidates.
　さて、インターポーザー等に設けられているバンプの高さは高くても１００μｍ程度である場合が多く、保護シートの厚みも基本的には１００μｍ程度＋αで十分である。もちろん厚くても保護シートとしては機能するが、必要以上に厚いと後述の凹部の加工方法がより問題となる場合がある。また、実装時のチップの加熱は、加熱及び／又は加圧手段からの熱伝導によるものであるから、厚みは極力薄いほうが好ましい場合が多い。
１００μｍ＋α程度の厚みを考慮すると、金属材料では反り、しわ、ゆがみなどの塑性変形が発生する場合があり、セラミック等の無機材料ではその脆性に起因する割れ、欠けが問題となる場合が考えられる。 In many cases, the height of the bump provided on the interposer or the like is about 100 μm at most, and the thickness of the protective sheet is basically about 100 μm + α. Of course, even if it is thick, it functions as a protective sheet. Moreover, since the heating of the chip at the time of mounting is due to heat conduction from the heating and / or pressurizing means, it is often preferable that the thickness is as thin as possible.
Considering a thickness of about 100 μm + α, plastic deformation such as warpage, wrinkle, and distortion may occur in a metal material, and cracks and chips caused by the brittleness may be a problem in an inorganic material such as ceramic.
　また、インターポーザーに設けられているバンプは、後述の実施態様にも示すように、直径が２０～１００μｍ程度で、それらがほぼその直径の１～数倍程度のピッチで規則的に配列しているのが通例である。又、その個数も１チップあたり多いものでは数万程度になる。即ち、保護シートにもこれと同程度の大きさ、個数の凹部が必要となり、凹部の加工方法が材料選択上の制約ともなる。 The bumps provided on the interposer have a diameter of about 20 to 100 μm and are regularly arranged at a pitch of about 1 to several times the diameter, as will be described later in the embodiment. It is customary. Also, the number of chips per chip is about tens of thousands. That is, the protective sheet is required to have the same size and number of concave portions, and the processing method of the concave portions is also a restriction on material selection.
　小さくは２０μｍ程度の凹部や小孔を機械加工で行うことは一般には困難であり、仮に可能であったとしても、それを数万個も加工することは、加工時間の観点からも得策でない場合が多い。金属材料やセラミック等の無機材料ではこの傾向が大きく、特にセラミック材料ではさらに顕著である。 In general, it is difficult to machine recesses and small holes of about 20 μm by machining, and even if possible, it is not a good idea to machine tens of thousands of them from the viewpoint of machining time. There are many. This tendency is large in the case of inorganic materials such as metal materials and ceramics, and more particularly in the case of ceramic materials.
　凹部や小孔の加工方法としてはレーザー加工でも原理的には可能であるが、レーザー加工では、加工部の局所的加熱による材料の変質、溶融、焦げ、変形等が発生する場合があり、凹部や小孔の形状精度、位置精度、表面粗さ等が劣化する場合が多い。 Laser processing is also possible in principle as a processing method for recesses and small holes, but laser processing may cause material alteration, melting, scorching, deformation, etc. due to local heating of the processing part. In many cases, the shape accuracy, position accuracy, surface roughness, and the like of the small holes deteriorate.
　さらに、数万個もの凹部や小孔を加工するとレーザーによる熱が蓄積して保護シート自体が過剰に加熱され、保護シート全体に反り、しわ、ゆがみなどが発生する場合もある。 Furthermore, when tens of thousands of recesses and small holes are processed, heat from the laser accumulates and the protective sheet itself is excessively heated, and the entire protective sheet may be warped, wrinkled or distorted.
　以上より、凹部や小孔の加工には、加工時のストレスの小さく、複数の凹部や小孔を同時に加工できる、エッチング等のケミカル加工が適している場合が多い。 From the above, chemical processing such as etching, which can process a plurality of recesses and small holes at the same time, is often suitable for processing the recesses and small holes.
　以上を考慮すれば、保護シートの材質としては、１００μｍ＋α程度の厚さでも、金属材料と比して反り、しわ、ゆがみなどの塑性変形が発生しにくく、また、セラミック等の無機材料と比して脆性に起因する割れ、欠け等が発生しにくい、耐熱性エンジニアリングプラスチックが適している場合が多いこととなる。 Considering the above, even when the thickness of the protective sheet is about 100 μm + α, plastic deformation such as warpage, wrinkles and distortion is less likely to occur compared to metal materials, and compared to inorganic materials such as ceramics. In other words, heat-resistant engineering plastics that are less prone to cracking and chipping due to brittleness are often suitable.
　実装時の加熱及び／又は加圧手段の温度は200℃程度は十分もありうるため、この温度に耐える耐熱性エンジニアリングプラスチックとしては、ポリイミド、ポリエーテルエーテルケトン（ＰＥＥＫ）、ポリフェニレンスルファイド（ＰＰＳ）などが一般的に入手可能なものである。この中でも、ポリイミドはフレキシブル基板用などとして１０～１００μｍ程度の膜厚のものが容易に入手可能で、さらに、フレキシブル基盤用のエッチング加工液も市販されていることから、本発明による保護シート材料として好適である。 Since the temperature of the heating and / or pressurizing means at the time of mounting may be about 200 ° C., the heat-resistant engineering plastic that can withstand this temperature is polyimide, polyetheretherketone (PEEK), polyphenylene sulfide (PPS). Are generally available. Among these, polyimide having a film thickness of about 10 to 100 μm is easily available for flexible substrates and the like, and an etching processing solution for flexible substrates is also commercially available. Is preferred.
　以下、本発明の実施の形態について図面を参照して説明する。
まず、本発明に関わる最も基本的な保護シート１の実施形態（基本形態）の作成工程について図１～図５を用いて説明する。 Hereinafter, embodiments of the present invention will be described with reference to the drawings.
First, a process of creating the most basic embodiment (basic form) of the protective sheet 1 according to the present invention will be described with reference to FIGS.
　図１に示すように、ポリイミドフィルム１０を準備する。ポリイミドフィルム１０は、例えば、厚みがたとえば２５、５０μｍのシート状のものである。ポリイミドフィルム１０の片側には、銅膜１１が形成されている。銅膜１１は、まずスパッタ法によりポリイミドフィルム１０上に厚さが１０ｎｍ程度と極薄層のニクロム層１２を形成した後、更に、このスパッタ法で形成されたニクロム層１２上に電気めっきによって形成したものである。 As shown in FIG. 1, a polyimide film 10 is prepared. The polyimide film 10 is, for example, a sheet having a thickness of, for example, 25 or 50 μm. A copper film 11 is formed on one side of the polyimide film 10. The copper film 11 is first formed by electroplating on the nichrome layer 12 formed by this sputtering method after first forming a very thin nichrome layer 12 having a thickness of about 10 nm on the polyimide film 10 by sputtering. It is a thing.
　次に、銅膜１１上に感光性のレジスト層８を形成する。レジスト層８の形成には溶液タイプのレジスト液をスピンコート等公知のコート法で塗布、固化させてもよいし、フィルムタイプのレジスト材を張付る方法でも構わない。
次に、インターポーザ５０に設けられたボールバンプ５１の配列位置のと同じ配列パターンを有するフォトマスク１８（凹部形成用フォトマスク）を用いてレジスト層８を露光・現像し（図２）、インターポーザ５０に設けられたボールバンプ５１に相当する位置のレジスト層８に開口９を設ける。この状態を図３に示す。 Next, a photosensitive resist layer 8 is formed on the copper film 11. The resist layer 8 may be formed by applying and solidifying a solution type resist solution by a known coating method such as spin coating, or by attaching a film type resist material.
Next, the resist layer 8 is exposed and developed using the photomask 18 (photomask for forming recesses) having the same arrangement pattern as the arrangement position of the ball bumps 51 provided on the interposer 50 (FIG. 2), and the interposer 50 is exposed. An opening 9 is provided in the resist layer 8 at a position corresponding to the ball bump 51 provided on the substrate. This state is shown in FIG.
　このとき、この凹部形成用フォトマスク１８の作成に当たり、インターポーザ５１のボールバンプ５０の形成工程において用いられるフォトマスクそのものを流用したり、あるいは、インターポーザ５１のボールバンプ５０の形成工程において用いられるフォトマスクのＣＡＤデータを流用すれば、インターポーザ５０上の各々のボールバンプ５１と開口９の位置を容易に一致させることが可能となり好適である。また、開口９の大きさをボールバンプ５０の大きさ（直径）よりも若干大きくする等、インターポーザ５１のボールバンプ５０の形成工程において用いられるフォトマスクのＣＡＤデータを適宜修正して流用してもかまわない。 At this time, the photomask used in the process of forming the ball bumps 50 of the interposer 51 is used in the production of the photomask 18 for forming the recesses, or the photomask used in the process of forming the ball bumps 50 of the interposer 51. This CAD data is preferably used because the positions of the ball bumps 51 and the openings 9 on the interposer 50 can be easily matched. Further, the CAD data of the photomask used in the process of forming the ball bump 50 of the interposer 51 may be appropriately modified and used, for example, by making the size of the opening 9 slightly larger than the size (diameter) of the ball bump 50. It doesn't matter.
　ついで開口９を利用して銅膜１１をアンモニアエッチング等の公知のエッチング技術よってエッチングを行い、銅膜１１に開口１５を設ける。必要であれば、極薄層に残っているニクロム層１２をエッチングにより除去する。その後、リムーバによりレジスト層８を除去する。この状態を図４に示す。 Next, the opening 9 is used to etch the copper film 11 by a known etching technique such as ammonia etching, so that the opening 15 is provided in the copper film 11. If necessary, the nichrome layer 12 remaining in the ultrathin layer is removed by etching. Thereafter, the resist layer 8 is removed by a remover. This state is shown in FIG.
　次に、図５に示すように、開口１５が作製された銅膜１１をマスクとしてポリイミドフィルム１０をポリイミドエッチング液でエッチングする。これにより、銅膜１１に設けられらた開口１５に相当する位置、すなわちインターポーザ５０上のボールバンプ５１に相当する位置に凹部１３が形成される。凹部１３は、この図５に示すように裏面に達するものであってもかまわないし、ポリイミドフィルム１０の中途で止まるもの（いわゆる止まり穴）であってもかまわない。以上の工程で、ポリイミドフィルム１０に、インターポーザ５０に設けられたボールバンプ５１と対向する位置に凹部１３が形成される。 Next, as shown in FIG. 5, the polyimide film 10 is etched with a polyimide etchant using the copper film 11 with the openings 15 as a mask. Thereby, the recess 13 is formed at a position corresponding to the opening 15 provided in the copper film 11, that is, a position corresponding to the ball bump 51 on the interposer 50. As shown in FIG. 5, the recess 13 may reach the back surface, or may stop in the middle of the polyimide film 10 (so-called blind hole). Through the above steps, the recess 13 is formed in the polyimide film 10 at a position facing the ball bump 51 provided on the interposer 50.
　尚凹部１３は、本実施態様に示すように、ボールバンプ５１各々と１対１に対応する凹部であってもかまわないし、あるいは１列に並んだ複数のボールバンプ５１を内包する溝状のもの、さらには、互いに隣接する複数のボールバンプ５１をすべて内包する相当量の面積を有するものであっても構わない。
また、本実施態様では、凹部１３の形成後、銅膜１１はそのまま残存させているが、銅膜１１をエッチングにより除去して、ポリイミドフィルム１０のみからなる保護シートとしても構わない。（図１０参照）たとえば、銅膜１１のＣｕ成分のコンタミ等が後々の問題となる、ボールバンプ５１がはんだバンプ等、Ｃｕと接着しやすいものである場合などにおいては、銅膜１１を除去しておくの方が好適の場合もある。 The concave portion 13 may be a concave portion corresponding to each of the ball bumps 51 as shown in the present embodiment, or a groove-like shape containing a plurality of ball bumps 51 arranged in a row. Further, it may have a considerable area including all of the plurality of ball bumps 51 adjacent to each other.
In this embodiment, the copper film 11 is left as it is after the formation of the recess 13, but the copper film 11 may be removed by etching to form a protective sheet made of only the polyimide film 10. (See FIG. 10) For example, in the case where contamination of the Cu component of the copper film 11 will be a problem later, or when the ball bump 51 is easy to adhere to Cu, such as a solder bump, the copper film 11 is removed. In some cases, it is preferable to keep it.
　次に、上記の作成工程によって作成された保護シート１を用いてインターポーザ５０上に半導体チップ５５を実装する工程について説明する。 Next, the process of mounting the semiconductor chip 55 on the interposer 50 using the protective sheet 1 created by the above creation process will be described.
　まず、図６に示すように、作成された保護シート１をボンディング装置４０のボンディングステージ４１に吸着保持する。ボンディングステージ４１は本明細書に言う加圧／及び又は加熱手段の一方に相当する。 First, as shown in FIG. 6, the prepared protective sheet 1 is sucked and held on the bonding stage 41 of the bonding apparatus 40. The bonding stage 41 corresponds to one of the pressing / heating means referred to in this specification.
　次に、図７又は図１０に示すように、インターポーザ５０を保護シート１の凹部１３の位置にインターポーザ５０のボールバンプ５１を位置合わせして保護シート１上に載置する。ボールバンプ５１は凹部１３内に内包される形となり、保護シート１は実質的にボールバンプ５１間のインターポーザ５０の表面とのみ接触する状態となる。 Next, as shown in FIG. 7 or FIG. 10, the interposer 50 is placed on the protective sheet 1 by aligning the ball bumps 51 of the interposer 50 at the position of the recess 13 of the protective sheet 1. The ball bump 51 is enclosed in the recess 13, and the protective sheet 1 is substantially in contact with only the surface of the interposer 50 between the ball bumps 51.
　次に、図８に示すように、積層された半導体チップ５５をボンディングツール４３でインターポーザ５０の所定位置に実装する。なお、ボンディングスツール４３は本明細書に言う加圧／及び又は加熱手段のもう一方に相当する。実装は、所定の加圧力と所定の加熱の付加により行われる。前述の通り、ボールバンプ５１は凹部１３内に内包される形となっており、保護シート１は実質的にボールバンプ５１間のインターポーザ５０の表面とのみ接触しているため、ボンディングツール４３で所定の加圧があっても、その加圧による荷重は保護シート１が支えており、ボールバンプ５１にその荷重が作用することはない。また保護シート１は、耐熱性に優れ高強度のポリイミドフィルム１０で構成されているため、加圧及び／又は加熱による変形が発生することはない。 Next, as shown in FIG. 8, the stacked semiconductor chips 55 are mounted at predetermined positions of the interposer 50 by the bonding tool 43. The bonding stool 43 corresponds to the other of the pressurizing / heating means referred to in this specification. Mounting is performed by applying a predetermined pressure and a predetermined heating. As described above, the ball bump 51 is included in the recess 13, and the protective sheet 1 is substantially in contact only with the surface of the interposer 50 between the ball bumps 51. Even when the pressure is applied, the protective sheet 1 supports the load due to the pressure, and the load does not act on the ball bump 51. Moreover, since the protective sheet 1 is composed of the polyimide film 10 having excellent heat resistance and high strength, deformation due to pressurization and / or heating does not occur.
　ここで、本明細書に言う、「保護シート１が実質的にボールバンプ５１間のインターポーザ５０の表面とのみ接触する」の「実質的に」の意味について説明する。例えば図９（ａ）に示すように、断面図においてボールバンプ５１が凹部１３の側面と一点のみで接触している場合を考える。この場合、ボンディングツール４３の過重が加わっても、保護シートの若干の弾性変形を無視するとすれば、ボールバンプ５１にはボンディングツール４３の荷重は作用しない。さらに図９（ｂ）に示すように、たとえば凹部１３の側面が直立する場合においては、保護シートの若干の弾性変形を考慮しても、ボールバンプ５１と凹部１３の側面に若干のすべりが発生するのみで、ボールバンプ５１にはボンディングツール４３の荷重は作用しない。すなわち、本明細書に言う「実質的に」の意味は、幾何学的にボールバンプ５１と凹部１３の側面が接触しているか否かに拘わらず、ボンディング時の荷重が凹部１３の側面を介してボールバンプ５１に作用しないことを意味するものである。 Here, the meaning of “substantially” in this specification, “the protective sheet 1 substantially contacts only the surface of the interposer 50 between the ball bumps 51” will be described. For example, as shown in FIG. 9A, consider a case where the ball bump 51 is in contact with the side surface of the recess 13 at only one point in the cross-sectional view. In this case, even if the bonding tool 43 is overloaded, the load of the bonding tool 43 does not act on the ball bump 51 if a slight elastic deformation of the protective sheet is ignored. Further, as shown in FIG. 9B, for example, when the side surface of the recess 13 stands upright, a slight slip occurs on the side surface of the ball bump 51 and the recess 13 even if some elastic deformation of the protective sheet is considered. Only the load of the bonding tool 43 does not act on the ball bump 51. That is, the meaning of “substantially” in the present specification means that the load during bonding passes through the side surface of the recess 13 regardless of whether the ball bump 51 and the side surface of the recess 13 are geometrically in contact with each other. This means that it does not act on the ball bump 51.
　次に、所定時間の加圧及び加熱が終了すると、ボンディングツール４３が上昇し、保護シート１からインターポーザ５０が取り外される。そして、次のインターポーザ５０への積層された半導体チップ５５の実装に、保護シート１が使用される。 Next, when pressurization and heating for a predetermined time are completed, the bonding tool 43 is raised and the interposer 50 is removed from the protective sheet 1. The protective sheet 1 is used for mounting the stacked semiconductor chips 55 on the next interposer 50.
　保護シート１は、１回の実装工程ごとに交換してもかまわないし、複数回の実装工程に連続して用いてもかまわない。保護シート１の交換にあたっては、枚葉の保護シート１をその都度交換しても良いし、保護シート１をリール、テープ状に連続して形成し、適当な巻装形態として、該巻装状態の保護シート１を順次送り出して交換するようにしても良い
さて、ポリイミドエッチングによりポリイミドフィルム１０の片側からエッチングにより凹部１３の加工を行う場合、凹部１３の側面は表面に対して直角とはならず。最大で４５度程度の傾斜面となることが多い。即ち円筒形状の直孔ではなく銅膜１１側が開いたテーパ孔となるのが通例である。 The protective sheet 1 may be replaced for each mounting process or may be used continuously for a plurality of mounting processes. When replacing the protection sheet 1, the sheet protection sheet 1 may be replaced each time, or the protection sheet 1 is continuously formed in a reel or tape shape, and the winding state is set as an appropriate winding form. The protective sheets 1 may be sequentially sent out and replaced. When the recess 13 is processed by etching from one side of the polyimide film 10 by polyimide etching, the side surface of the recess 13 is not perpendicular to the surface. . In many cases, the inclined surface is at most 45 degrees. In other words, it is usual that the tapered hole is not a cylindrical straight hole but is opened on the copper film 11 side.
　従って、ボールバンプ５１のピッチがその直径に比して小さくなると、隣接する凹部１３同士が干渉してしまうという問題が発生する。 Therefore, when the pitch of the ball bumps 51 becomes smaller than its diameter, there arises a problem that the adjacent recesses 13 interfere with each other.
　また、干渉にまでは至らなくても、隣接する凹部の間隔が極端に狭くなって銅膜１１に狭隘部が形成されるとなると、各工程途中において、当該狭隘部の銅膜１１が剥離、脱落してポリイミドエッチング時のマスクとして機能しなくなるという問題が発生する。狭隘部の幅は１０μｍ以上が好ましく、２０μｍ以上であればさらに好ましい。 Further, even if interference does not occur, when the interval between adjacent concave portions becomes extremely narrow and a narrow portion is formed in the copper film 11, the copper film 11 in the narrow portion is peeled off during each step. There arises a problem that it falls off and does not function as a mask during polyimide etching. The width of the narrow portion is preferably 10 μm or more, and more preferably 20 μm or more.
　このように、ボールバンプ５１のピッチがその直径に比して小さい場合には、以下に述べる、ポリイミドのエッチングを両側から行う発展形態による保護シート３５を適用すれば、狭隘部を形成することなく隣接する凹部間隔を狭めることが出来好適である。ポリイミドを両側からエッチングする場合、凹部の断面形状はポリイミドフィルムの厚み方向に見て中央部が小径となった鼓型となる。 As described above, when the pitch of the ball bumps 51 is smaller than the diameter of the ball bumps 51, if a protective sheet 35 according to a development mode in which polyimide etching described below is performed from both sides is applied, a narrow portion is not formed. This is preferable because the interval between adjacent concave portions can be narrowed. When polyimide is etched from both sides, the cross-sectional shape of the recess has a drum shape with a small diameter at the center when viewed in the thickness direction of the polyimide film.
　本発明に関わるさらに発展的な保護シート３５の実施形態（発展形態）の作成工程について図１１～図１６を用いて説明する。 A process for creating an embodiment (development form) of a further development of the protective sheet 35 relating to the present invention will be described with reference to FIGS.
　図１１に示すように、両面に銅膜２２、２３を有する銅付きポリイミドフィルム２０を準備する。銅付きポリイミドフィルム２０は、例えば、厚みが２５、５０μｍポリイミドフィルム２１の両側には、銅膜２２、２３を形成したものである。銅膜２２、２３は、まずスパッタ法によりポリイミドフィルム２１上に厚さが１０ｎｍ程度と極薄層のニクロム層２４，２５形成した後、このスパッタ法で形成されたニクロム層２４、２５上に電気めっきによって形成されたものである。 As shown in FIG. 11, a polyimide film 20 with copper having copper films 22 and 23 on both sides is prepared. For example, the polyimide film 20 with copper is formed by forming copper films 22 and 23 on both sides of a polyimide film 21 having a thickness of 25 and 50 μm. The copper films 22 and 23 are first formed on the polyimide film 21 by sputtering to form the ultrathin nichrome layers 24 and 25 having a thickness of about 10 nm, and then the electric power is applied to the nichrome layers 24 and 25 formed by this sputtering method. It is formed by plating.
　まず、両側の銅膜２２、２３上に感光性レジスト層２８、２９を形成する。レジスト層２８、２９の形成には溶液タイプのレジスト液をスピンコート等公知のコート法で塗布ご固化させてもよいし、フィルムタイプのレジスト材を張付る方法でも構わない。 First, photosensitive resist layers 28 and 29 are formed on the copper films 22 and 23 on both sides. For the formation of the resist layers 28 and 29, a solution type resist solution may be applied and solidified by a known coating method such as spin coating, or a film type resist material may be applied.
　次に、インターポーザ５０に設けられたボールバンプ５１の位置のパターンを有するフォトマスク（凹部形成用フォトマスク）を用いて両側のレジスト層２８、２９を感光・現像し、インターポーザ５０に設けられたボールバンプ５１に相当する位置のレジスト層２８、２９開口３０，３１を設ける。この状態を図１２に示す。 Next, the resist layers 28 and 29 on both sides are exposed and developed using a photomask having a pattern of the positions of the ball bumps 51 provided on the interposer 50 (recess forming photomask), and the balls provided on the interposer 50 are exposed. Resist layers 28 and 29 openings 30 and 31 corresponding to the bumps 51 are provided. This state is shown in FIG.
　ついで開口３０、３１を利用して銅膜２２、２３をアンモニアエッチング等の公知のエッチング技術よって両側からエッチングを行い、銅膜２２、２３に開口３２、３３を設ける。必要であれば、開口３２、３３の底に極薄層に残っているニクロム層２４、２５をエッチングにより除去する。その後、リムーバによりレジスト層２８、２９を除去する。この状態を図１３に示す。 Then, the openings 30 and 31 are used to etch the copper films 22 and 23 from both sides by a known etching technique such as ammonia etching, so that the openings 32 and 33 are provided in the copper films 22 and 23. If necessary, the nichrome layers 24 and 25 remaining in the ultrathin layer at the bottoms of the openings 32 and 33 are removed by etching. Thereafter, the resist layers 28 and 29 are removed by a remover. This state is shown in FIG.
　次に、図１４に示すように、片側の銅膜２３上にのみ、その表面に１μｍ程度のニッケル層３４を形成する。ニッケル層３４の形成には、銅付きポリイミドフィルム２０の銅膜２２側全面にマスクフィルム（図示せず）を貼付して電界ニッケルめっきを施せばよい。このニッケル層３４の役割は後述する銅膜２２のエッチングによる除去時の保護膜としての機能である。 Next, as shown in FIG. 14, a nickel layer 34 having a thickness of about 1 μm is formed only on the copper film 23 on one side. For the formation of the nickel layer 34, a mask film (not shown) may be applied to the entire surface of the copper film 22 side of the polyimide film 20 with copper and electroplated with nickel. The role of the nickel layer 34 is a function as a protective film at the time of removal of the copper film 22 described later by etching.
　該マスクフィルムを剥離後、図１５に示すように、開口３２、３３が設けられた銅膜２２、２３をマスクとしてポリイミドフィルム２１を両側からポリイミドエッチング液でエッチングする。これにより、開口３２、３３に相当する位置、すなわちインターポーザ５０上のボールバンプ５１に相当する位置に凹部３５が形成される。凹部３５は、図１５に示すようにポリイミドフィルム２１表裏を貫通する貫通孔となる。以上の工程で、ポリイミドフィルム２１に、インターポーザ５０に設けられたボールバンプ５１と対向する位置に凹部３５が形成される。 After the mask film is peeled off, as shown in FIG. 15, the polyimide film 21 is etched with a polyimide etching solution from both sides using the copper films 22 and 23 provided with the openings 32 and 33 as masks. As a result, the recesses 35 are formed at positions corresponding to the openings 32 and 33, that is, positions corresponding to the ball bumps 51 on the interposer 50. The recessed part 35 becomes a through-hole penetrating the polyimide film 21 front and back as shown in FIG. Through the above steps, the recess 35 is formed in the polyimide film 21 at a position facing the ball bump 51 provided on the interposer 50.
　次に、銅膜２２のみをエッチングにより除去する。このとき銅膜２３はニッケル層３４で覆われているため、エッチングされずに残存する。必要であればニクロム層も除去する。 Next, only the copper film 22 is removed by etching. At this time, since the copper film 23 is covered with the nickel layer 34, it remains without being etched. Remove the nichrome layer if necessary.
　この状態でも本発明に関わる保護シートとしても機能するが、さらに、銅膜２３側のニッケル層３４にさらに電界ニッケルめっきを施し所望の厚さの厚膜ニッケル層３６とすることで、保護シートとしての全体厚みを調整することが可能となる（図１６）。 Even in this state, it functions as a protective sheet according to the present invention, but further, by subjecting the nickel layer 34 on the copper film 23 side to electro nickel plating to obtain a thick nickel layer 36 having a desired thickness, It is possible to adjust the overall thickness of the film (FIG. 16).
　市販の銅付きポリイミドフィルムは２５、５０μｍなどいわゆるキリ厚しかなく、ボールバンプ５１の高さによっては保護シートとしての全体厚が不足することもあり得る。このような場合、発展形態に示すように圧膜ニッケル層３６で保護シートの全体厚を調整すれば、ボールバンプの高さ、ピッチに応じた凹部３５が形成でき好適である。 A commercially available polyimide film with copper has only a so-called thickness of 25, 50 μm, etc., and depending on the height of the ball bump 51, the overall thickness as a protective sheet may be insufficient. In such a case, if the overall thickness of the protective sheet is adjusted by the pressure film nickel layer 36 as shown in the developed form, it is preferable that the concave portions 35 corresponding to the height and pitch of the ball bumps can be formed.
　尚ニッケル層３４、厚膜ニッケル層３６はインターポーザー側に設けているが、ステージ側に形成することももちろん可能である。 The nickel layer 34 and the thick nickel layer 36 are provided on the interposer side, but it is of course possible to form them on the stage side.
　以上述べた、本発明の基本形態、発展形態による保護シートをマイクロバンプを有した半導体チップの積層に用いても良い。具体的には、図１から図５に示した工程で、厚さ５μｍ～１０μｍのポリイミドフィルムを用いて凹部１３を形成する。凹部１３が形成された保護シート１を半導体チップの最下層のマイクロバンプに位置合わせして用いることにより、順次積層される半導体チップの加圧及び／又は加熱に際し、凹部１３がマイクロバンプの変形を保護し良好な積層を行うことが出来る。 The protective sheet according to the basic form and the developed form of the present invention described above may be used for stacking semiconductor chips having micro bumps. Specifically, the recess 13 is formed using a polyimide film having a thickness of 5 μm to 10 μm in the steps shown in FIGS. By using the protective sheet 1 having the recesses 13 in alignment with the lowermost microbumps of the semiconductor chip, the recesses 13 can deform the microbumps when the stacked semiconductor chips are pressed and / or heated. It can protect and perform good lamination.
　さらに、図２０には、本発明の別の実施態様を示す。これは複数（２枚）のインターポーザ５０間に、積層された複数の半導体チップ５５を３次元実装している状態を示す図である。このような２枚のインターポーザに半導体チップが挟まれた構成においても本発明の半導体チップ実装方法、および半導体チップ実装様保護シートは適用可能である。 Furthermore, FIG. 20 shows another embodiment of the present invention. This is a diagram showing a state in which a plurality of stacked semiconductor chips 55 are three-dimensionally mounted between a plurality (two) of interposers 50. Even in such a configuration in which a semiconductor chip is sandwiched between two interposers, the semiconductor chip mounting method and the semiconductor chip mounting protection sheet of the present invention are applicable.
　（実施例）
　以下に上記の発展形態にもとづく保護シート６０の実施例を図２１に記す。 (Example)
An example of the protective sheet 60 based on the above-described development is shown in FIG.
　図２１（ａ）に保護シート６０と基材６１の大きさ、位置関係、図２１（ｂ）にバンプ６６の大きさと保護シート６０の位置関係を合わせて示す。
基材６１は２５ｍｍ×２５ｍｍの大きさで、基材６１の片面には図２１（ｂ）に示す大きさの頭頂部が略球面となった円筒バンプ６６が存在する。円筒バンプ６６は直径Ｄが７５μｍ、高さＨが４５μｍで、これが２５×２５ｍｍの基材６１上にピッチＰ＝１５０μｍ間隔で１６１列縦横に配列している。即ち円筒バンプ６６は総数１６１×１６１＝２５９２１個である。 FIG. 21A shows the size and positional relationship between the protective sheet 60 and the substrate 61, and FIG. 21B shows the size of the bump 66 and the positional relationship between the protective sheet 60.
The base material 61 has a size of 25 mm × 25 mm, and a cylindrical bump 66 having a substantially spherical top portion of the size shown in FIG. The cylindrical bumps 66 have a diameter D of 75 μm and a height H of 45 μm, which are arranged in 161 rows vertically and horizontally at a pitch P of 150 μm on a 25 × 25 mm base material 61. That is, the total number of cylindrical bumps is 161 × 161 = 25921.
　保護シート６０の大きさは５０×５０ｍｍで、基材６１はその中央に配置される。又、該基材６１位置の外側に、保護シート６０と基材６１の相対位置あわせの為のアライメントパターン６２ａ～６２ｄが形成される。 The size of the protective sheet 60 is 50 × 50 mm, and the base material 61 is disposed at the center thereof. In addition, alignment patterns 62a to 62d for relative alignment of the protective sheet 60 and the substrate 61 are formed outside the substrate 61 position.
　東レ・デュポン株式会社製カプトン（登録商標）ＥＮ５０μm厚（すなわちｈ２=５０μｍ）の両面に４μｍ厚の銅膜を形成した銅付きポリイミドフィルム（住友金属株式会社製エスパーフレックス（登録商標）)を用いた。日立化成製レジストフィルムＲＹ３３２５を両面に張付し、密着露光で円筒バンプ６６に対応したパターンを露光後、現像液（炭酸ナトリウム１%水溶液）にて現像、乾燥しレジスト膜を得る。このとき、上記のアライメントマーク６２ａ～６２ｄに対応するパターンも同時に露光する。アンモニアエッチングにより両面の銅膜を同時にエッチングし銅マスクを形成する。このとき、アライメントマーク６２ａ～６２ｄも同時に銅膜に形成される。円筒バンプ６６に対応する凹部の銅マスク開口直径は１００μｍ（即ち大径ｄ２＝１００μｍである）とした。リムーバ（ＮａＯＨ水溶液）にて残存レジストを除去、水洗、乾燥した後に、次いで、メック株式会社ＥＭ－１９２４とＣＨ－１９２５Ｂ処理を併用してニクロムスパッタ層を除去した。 Toray DuPont Kapton (registered trademark) EN 50 μm thick (that is, h2 = 50 μm) was used a polyimide film with copper (Esperflex (registered trademark) manufactured by Sumitomo Metals Co., Ltd.) with a 4 μm thick copper film formed on both sides. . A resist film RY3325 manufactured by Hitachi Chemical Co., Ltd. is attached to both surfaces, and a pattern corresponding to the cylindrical bump 66 is exposed by contact exposure, and then developed and dried with a developer (1% aqueous solution of sodium carbonate) to obtain a resist film. At this time, the patterns corresponding to the alignment marks 62a to 62d are simultaneously exposed. A copper mask is formed by simultaneously etching the copper films on both sides by ammonia etching. At this time, the alignment marks 62a to 62d are simultaneously formed on the copper film. The copper mask opening diameter of the concave portion corresponding to the cylindrical bump 66 was 100 μm (that is, the large diameter d2 = 100 μm). After removing the remaining resist with a remover (NaOH aqueous solution), washing with water, and drying, the Nichrome sputter layer was then removed using EM-1924 and CH-1925B treatment in combination.
　片側全面をマスキングフィルムにてマスクした後に、他方の銅マスク上に電界ニッケルめっきにてニッケル層を１μｍめっきする。マスキングフィルム剥離後、東レエンジニアリング株式会社製ポリイミドエッチング液ＴＰＥ－３０００を用い、５０℃４分の条件で両面からポリイミドエッチングを行いポリイミドフィルム６３に凹部６７（貫通孔）を形成した。次に、アライメントマーク６２ａ～６２ｄ近傍箇所を新たにマスキングフィルムでマスクし、当該箇所の銅膜を保護した後に、中央部の銅膜をエッチングで除去した。マスキングフィルム剥離後、電界ニッケルめっきにて、先に形成した１μｍのニッケル層上にさらにめっきを行い厚さｈ１が１５μｍのニッケル層６４を形成した。 After masking the entire surface of one side with a masking film, a nickel layer is plated by 1 μm on the other copper mask by electrolytic nickel plating. After the masking film was peeled off, polyimide etching was performed from both sides using a polyimide etching solution TPE-3000 manufactured by Toray Engineering Co., Ltd. under conditions of 50 ° C. for 4 minutes to form a recess 67 (through hole) in the polyimide film 63. Next, portions in the vicinity of the alignment marks 62a to 62d were newly masked with a masking film to protect the copper film in the portions, and then the copper film in the central portion was removed by etching. After peeling off the masking film, the nickel layer 64 having a thickness h1 of 15 μm was formed by further plating on the previously formed nickel layer of 1 μm by electrolytic nickel plating.
　以上の工程により、総厚６５μｍの保護シート６０を形成した。凹部６７（貫通孔）の断面形状は図２１（ｂ）に示すごとく中央部の直径（ｄ１）が８０～９０μｍ程度の鼓型形状となっていた。円筒バンプ６７の直径Ｄが７５ミクロンであるので、保護シート６０の凹部６７は円筒バンプ６６と接触することは無く、保護シート６０は実質的に基材６１表面にのみ接触し、本発明による半導体チップ実装用保護シートとして機能することが確認できた。 Through the above steps, a protective sheet 60 having a total thickness of 65 μm was formed. The cross-sectional shape of the concave portion 67 (through hole) was a drum shape with the central portion having a diameter (d1) of about 80 to 90 μm as shown in FIG. Since the diameter D of the cylindrical bump 67 is 75 microns, the concave portion 67 of the protective sheet 60 does not contact the cylindrical bump 66, and the protective sheet 60 substantially contacts only the surface of the base member 61, and the semiconductor according to the present invention. It was confirmed that it functions as a protective sheet for chip mounting.
　１　　半導体チップ実装用保護シート
　８　　感光性レジスト層
　９　　開口
　１０　　ポリイミドフィルム
　１１　　銅膜
　１２　　ニクロム層
　１３　　凹部
　１５　　開口
　１８　　フォトマスク
　２０　　銅付きポリイミドフィルム
　２１　　ポリイミドフィルム
　２２、２３　　銅膜
　２４、２５　ニクロム層
　２８、２９　感光性レジスト層
　３０、３１、３２、３３　　開口
　３４　　ニッケル層
　３５　　凹部（貫通孔）
　３６　　厚膜ニッケル層
　４０　　ボンディング装置
　４１　　ボンディングステージ
　４３　　ボンディングツール
　５０　　インターポーザ
　５１　　ボールバンプ
　５５　　積層された半導体チップ
　６０　　半導体チップ実装用保護シート
　６１　　基材
　６２ａ～６２ｄ　　アライメントマーク
　６３　　ポリイミドフィルム
　６４　　ニッケル層
　６６　　円筒バンプ
　６７　　凹部（貫通孔）
　 DESCRIPTION OF SYMBOLS 1 Protective sheet for semiconductor chip mounting 8 Photosensitive resist layer 9 Opening 10 Polyimide film 11 Copper film 12 Nichrome layer 13 Recessed part 15 Opening 18 Photomask 20 Polyimide film with copper 21 Polyimide film 22, 23 Copper film 24, 25 Nichrome layer 28, 29 Photosensitive resist layer 30, 31, 32, 33 Opening 34 Nickel layer 35 Recess (through hole)
36 thick film nickel layer 40 bonding apparatus 41 bonding stage 43 bonding tool 50 interposer 51 ball bump 55 stacked semiconductor chip 60 protective sheet for mounting semiconductor chip 61 base material 62a to 62d alignment mark 63 polyimide film 64 nickel layer 66 cylindrical bump 67 Recess (through hole)

Claims (14)

  1. 　加圧及び／又は加熱手段によって、複数個のバンプを有する基材と該基材上に載置された半導体チップを挟持しつつ加圧及び／又は加熱することによって前記基材上に前記半導体チップを実装する半導体チップ実装方法であって、前記加圧及び／又は加熱手段によって前記基材の前記複数個のバンプの存在する部位（バンプ部位）を挟持する場合において、前記加圧及び／又は加熱手段と前記基材との間に、実質的に前記バンプ部位の前記基材表面にのみ接触する保護シートを介在させて、加圧及び／又は加熱することを特徴とする半導体チップ実装方法。 The semiconductor chip is formed on the substrate by pressing and / or heating the substrate having a plurality of bumps and the semiconductor chip placed on the substrate by pressing and / or heating means. A method of mounting a semiconductor chip, wherein the pressurization and / or heating is performed in the case where a part (bump part) where the plurality of bumps of the substrate are present is sandwiched by the pressurization and / or heating means. A method of mounting a semiconductor chip, wherein a protective sheet that substantially contacts only the surface of the base material at the bump site is interposed between the means and the base material, and pressurization and / or heating is performed.
  2. 　加圧及び／又は加熱手段によって、複数個のバンプを有する複数枚の基材と該複数枚の基材間に積層載置された半導体チップを挟持しつつ加圧及び／又は加熱することによって前記複数枚の基材間に前記半導体チップを実装する半導体チップ実装方法であって、前記加圧及び／又は加熱手段によって前記基材の前記複数のバンプの存在する部位（バンプ部位）を挟持する場合において、前記加圧及び／又は加熱手段と前記基材との間に、実質的に前記バンプ部位の前記基材表面にのみ接触する保護シートを介在させて、加圧及び／又は加熱することを特徴とする半導体チップ実装方法。 The pressurization and / or heating means pressurizes and / or heats while sandwiching a plurality of substrates having a plurality of bumps and a semiconductor chip stacked between the plurality of substrates. A semiconductor chip mounting method in which the semiconductor chip is mounted between a plurality of base materials, and a portion (bump portion) where the plurality of bumps of the base material are sandwiched by the pressurizing and / or heating means. The pressure and / or heating means and the base material are interposed between a protective sheet that substantially contacts only the surface of the base material at the bump site, and pressurizing and / or heating. A semiconductor chip mounting method.
  3. 　前記保護シートの前記バンプ部位と対向する側の面には、前記複数のバンプ各々に対向する位置に凹部が設けられてなり、実質的に前記複数のバンプ間の前記基材表面にのみ接触するものであることを特徴とする請求項１又は２に記載の半導体チップ実装方法。 On the surface of the protective sheet facing the bump part, a recess is provided at a position facing each of the plurality of bumps, and substantially contacts only the surface of the base material between the plurality of bumps. The semiconductor chip mounting method according to claim 1, wherein the method is a semiconductor chip mounting method.
  4. 　前記基材への前記バンプの形成工程の少なくとも一部はフォトリソグラフィーによってなされるものであり、かつ、前記保護シートの前記凹部の形成工程の少なくとも一部もフォトリソグラフィー工程によってなされるものであり、これら両フォトリソグラフィー工程に用いられるフォトマスク及び／又は該フォトマスク形成データが同一のものであることを特徴とする請求項３に記載の半導体チップ実装方法。 At least a part of the bump forming step on the base material is performed by photolithography, and at least a part of the concave sheet forming step of the protective sheet is also performed by a photolithography step. 4. The semiconductor chip mounting method according to claim 3, wherein the photomask used in both the photolithography processes and / or the photomask formation data are the same.
  5. 　前記保護シートは、ポリイミドフィルムよりなり、前記凹部がポリイミドエッチングによって形成されたものであることを特徴とする請求項３又は４に記載の半導体チップ実装方法。 5. The semiconductor chip mounting method according to claim 3, wherein the protective sheet is made of a polyimide film, and the recesses are formed by polyimide etching.
  6. 　複数のバンプを有する基材上に、加圧及び／又は加熱手段によって半導体チップを実装する半導体チップ実装において用いられる半導体チップ実装用保護シートであって、該半導体チップ実装用保護シートは、前記基材の前記複数のバンプが存在する部位（バンプ部位）と前記加圧及び／又は加熱手段との間に介在させて用いられ、前記複数のバンプ各々に対向する位置に凹部が設けられてなり、実質的に前記複数のバンプ間の前記基材表面にのみ接触するものであることを特徴とする、半導体チップ実装用保護シート。 A semiconductor chip mounting protective sheet for use in semiconductor chip mounting in which a semiconductor chip is mounted on a base material having a plurality of bumps by pressing and / or heating means, the semiconductor chip mounting protective sheet comprising the base The material is used by being interposed between a portion where the plurality of bumps exist (bump portion) and the pressing and / or heating means, and a recess is provided at a position facing each of the plurality of bumps. A protective sheet for mounting a semiconductor chip, which substantially contacts only the surface of the base material between the plurality of bumps.
  7. 　前記半導体チップ保護シートは、主としてポリイミドフィルムよりなり、前記凹部がポリイミドエッチングによって形成されたものであることを特徴とする請求項６に記載の半導体チップ実装用保護シート。 The semiconductor chip protection sheet according to claim 6, wherein the semiconductor chip protection sheet is mainly made of a polyimide film, and the recesses are formed by polyimide etching.
  8. 　前記半導体チップ実装用保護シートは、少なくともその片面に金属層を有するポリイミドフィルムよりなり、前記ポリイミドエッチングがウエットエッチングによるものであり、かつ、前記金属層が前記凹部を形成するウエットエッチング時のマスク層としても機能することを特徴とする請求項7に記載の半導体チップ実装用保護シート。 The protective sheet for mounting a semiconductor chip is made of a polyimide film having a metal layer on at least one surface thereof, the polyimide etching is performed by wet etching, and the metal layer forms a mask in the wet etching. 8. The protective sheet for mounting a semiconductor chip according to claim 7, wherein
  9. 　前記金属層の少なくとも一部はめっきにより形成されるものであり、かつ、前記ポリイミドフィルムの両側においてその厚さが異なることを特徴とする請求項８に記載の半導体チップ実装用保護シート。 9. The protective sheet for mounting a semiconductor chip according to claim 8, wherein at least a part of the metal layer is formed by plating, and the thickness is different on both sides of the polyimide film.
  10. 　前記複数のバンプは、配列方向にピッチPで規則的に前記基材上に配列され、各々が高さH、配列方向幅Dを有するものであり、さらに、前記半導体チップ保護シートは、少なくとも下記小径ｄ１側表面に厚さｈ１の金属層を有する厚さｈ２のポリイミドフィルムよりなり、前記配列方向断面において前記凹部の前記金属層の断面は幅ｄ１の長方形形状をなし、前記ポリイミドフィルムの断面は前記金属層側が狭まった大径ｄ２、小径ｄ１の等脚台形形状であり、
    　ｈ１＋ｈ２＞H　
    D＜ｄ２＜P
    P－ｄ２≧１０μm
    の関係を満たすことを特徴とする、請求項６乃至９のいずれかに記載の半導体チップ実装用保護シート。     The plurality of bumps are regularly arranged on the substrate at a pitch P in the arrangement direction, each having a height H and an arrangement direction width D, and the semiconductor chip protection sheet is at least the following: It consists of a polyimide film of thickness h2 having a metal layer of thickness h1 on the surface of the small diameter d1 side, the section of the metal layer of the recess in the section in the arrangement direction has a rectangular shape of width d1, the section of the polyimide film is The metal layer side has an isosceles trapezoidal shape with a large diameter d2 and a small diameter d1 narrowed;
    h1 + h2> H
    D <d2 <P
    Pd2 ≧ 10μm
    The semiconductor chip mounting protection sheet according to claim 6, wherein the relationship is satisfied.
  11. 　前記複数のバンプは、配列方向にピッチPで規則的に前記基材上に配列され、各々が高さH、配列方向幅Dを有するものであり、さらに、前記半導体チップ保護シートは、少なくともその片側に厚さｈ１の金属層を有する厚さｈ２のポリイミドフィルムよりなり、前記配列方向断面において前記凹部の前記金属層の断面は幅ｄ２の長方形形状をなし、前記ポリイミドフィルムの断面は厚さ方向中央部が直径ｄ１に狭まった鼓型形状であり、
    　ｈ１＋ｈ２＞H　
    D＜ｄ２＜P
    P－ｄ２≧１０μm
    の関係を満たすことを特徴とする、請求項６乃至９のいずれかに記載の半導体チップ実装用保護シート。     The plurality of bumps are regularly arranged on the base material at a pitch P in the arrangement direction, each having a height H and an arrangement direction width D, and the semiconductor chip protection sheet is at least its It consists of a polyimide film with a thickness h2 having a metal layer with a thickness h1 on one side, and the cross section of the metal layer in the concave portion has a rectangular shape with a width d2 in the cross section in the arrangement direction, and the cross section of the polyimide film has a thickness direction It has a drum shape with a central portion narrowed to a diameter d1,
    h1 + h2> H
    D <d2 <P
    Pd2 ≧ 10μm
    The semiconductor chip mounting protection sheet according to claim 6, wherein the relationship is satisfied.
  12. P－ｄ２≧２０μmであることを特徴とする請求項１０又は１１に記載の半導体チップ実装用保護シート。 12. The protective sheet for mounting a semiconductor chip according to claim 10, wherein Pd2 ≧ 20 μm.
  13. 　前記半導体チップ実装用保護シートは、その前記基材側表面に、前記半導体チップ保護シートと前記基材との相対位置確認の為のアライメントマークを、前記凹部とは別に有することを特徴とする請求項６乃至１２のいずれかに記載の半導体チップ実装用保護シート。 The semiconductor chip mounting protective sheet has an alignment mark for confirming a relative position between the semiconductor chip protective sheet and the base material, on the base material side surface thereof, separately from the concave portion. Item 13. A protective sheet for mounting a semiconductor chip according to any one of Items 6 to 12.
  14. 前記半導体チップ実装用保護シートは、その前記基材側表面に前記凹部のみを複数有するものであり、該複数の凹部の配列パターンそのものをアライメントマークとして用いることを特徴とする請求項６乃至１２のいずれかに記載の半導体チップ実装用保護シート。 The protective sheet for mounting a semiconductor chip has only a plurality of the recesses on the substrate-side surface thereof, and the array pattern itself of the plurality of recesses is used as an alignment mark. The protective sheet for semiconductor chip mounting in any one.
PCT/JP2015/081958 2014-11-14 2015-11-13 Semiconductor chip mounting method and semiconductor chip mounting-use protective sheet WO2016076414A1 (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10173088A (en) * 1996-12-10 1998-06-26 Sony Corp Apparatus and method for manufacture of semiconductor device
JP2005123382A (en) * 2003-10-16 2005-05-12 Lintec Corp Surface protection sheet and method for grinding semiconductor wafer
JP2011054630A (en) * 2009-08-31 2011-03-17 Toray Eng Co Ltd Inspection probe and method of manufacturing the same

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10173088A (en) * 1996-12-10 1998-06-26 Sony Corp Apparatus and method for manufacture of semiconductor device
JP2005123382A (en) * 2003-10-16 2005-05-12 Lintec Corp Surface protection sheet and method for grinding semiconductor wafer
JP2011054630A (en) * 2009-08-31 2011-03-17 Toray Eng Co Ltd Inspection probe and method of manufacturing the same

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