WO2016070382A1 - 一种安全信息配制方法、安全验证方法以及相关芯片 - Google Patents

一种安全信息配制方法、安全验证方法以及相关芯片 Download PDF

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Publication number
WO2016070382A1
WO2016070382A1 PCT/CN2014/090480 CN2014090480W WO2016070382A1 WO 2016070382 A1 WO2016070382 A1 WO 2016070382A1 CN 2014090480 W CN2014090480 W CN 2014090480W WO 2016070382 A1 WO2016070382 A1 WO 2016070382A1
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Prior art keywords
soc
information
key
public key
security
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PCT/CN2014/090480
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English (en)
French (fr)
Inventor
何贵洲
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华为技术有限公司
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Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to EP14905535.2A priority Critical patent/EP3197089B1/en
Priority to PCT/CN2014/090480 priority patent/WO2016070382A1/zh
Priority to CN201480027481.3A priority patent/CN105765897B/zh
Publication of WO2016070382A1 publication Critical patent/WO2016070382A1/zh
Priority to US15/587,746 priority patent/US10419217B2/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
    • H04L9/0894—Escrow, recovery or storing of secret information, e.g. secret key escrow or cryptographic key storage
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09C—CIPHERING OR DECIPHERING APPARATUS FOR CRYPTOGRAPHIC OR OTHER PURPOSES INVOLVING THE NEED FOR SECRECY
    • G09C1/00—Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1408—Protection against unauthorised use of memory or access to memory by using cryptography
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
    • H04L9/0816—Key establishment, i.e. cryptographic processes or cryptographic protocols whereby a shared secret becomes available to two or more parties, for subsequent use
    • H04L9/0819—Key transport or distribution, i.e. key establishment techniques where one party creates or otherwise obtains a secret value, and securely transfers it to the other(s)
    • H04L9/0822—Key transport or distribution, i.e. key establishment techniques where one party creates or otherwise obtains a secret value, and securely transfers it to the other(s) using key encryption key
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
    • H04L9/0861—Generation of secret information including derivation or calculation of cryptographic keys or passwords
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
    • H04L9/0894—Escrow, recovery or storing of secret information, e.g. secret key escrow or cryptographic key storage
    • H04L9/0897—Escrow, recovery or storing of secret information, e.g. secret key escrow or cryptographic key storage involving additional devices, e.g. trusted platform module [TPM], smartcard or USB
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/14—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols using a plurality of keys or algorithms
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/30—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/32—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials
    • H04L9/3247—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials involving digital signatures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1052—Security improvement
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/20—Employing a main memory using a specific memory technology
    • G06F2212/202—Non-volatile memory
    • G06F2212/2022—Flash memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/40—Specific encoding of data in memory or cache
    • G06F2212/402—Encrypted data

Definitions

  • the present invention relates to the field of information security, and in particular, to a security information preparation method, a security verification method, and related chips.
  • the security chip has functions such as reliability authentication, user identity authentication, and digital signature, which can be used to prevent unauthorized software modification.
  • the security chip is the lowest level of credibility of the information system. The intruder can only break the protection of the information system only by breaking the security chip. Therefore, the security chip provides a credible foundation for the entire information system.
  • the security management tasks of the existing information systems are all implemented by the security chip. Therefore, the security information of the information system must be configured after the security chip is purchased, and the purchased security chip increases the cost of the information system. Moreover, since the three hardwares of the flash, the security chip, and the processor need to be configured during the security information configuration, the process of configuring the security information is complicated. At the same time, because the external security chip and the processor are interconnected through the Ethernet, there may be a security hole in the connection between the security chip and the processor, and the information system may still be attacked by the intruder.
  • the embodiment of the invention provides a security information configuration method, which can improve the security of the information system and reduce the possibility that the information system is attacked by the intruder.
  • a first aspect of the embodiments of the present invention provides a security information configuration method, including:
  • the system-on-chip SoC generates an asymmetric key pair, the asymmetric key pair including a public key and a private key;
  • the SoC writes the private key into an electrically programmable fuse eFuse of the SoC
  • the SoC encrypts the public key
  • the SoC writes the encrypted public key to a flash memory for storage
  • the SoC acquires target software information in the flash, and generates first summary information according to the target software information, where the target software information is used to start target software;
  • the SoC uses the public key or the private key to sign the first summary information to obtain signature information;
  • the SoC writes the signature information to the flash.
  • the using, by the SoC, the first summary information by using the public key or the private key includes:
  • the SoC uses the public key to sign the first summary information
  • the SoC signs the first summary information using the private key.
  • the eFuse includes a security identifier, where the security identifier has two states: security and non-security. Identifying a startup mode for controlling the target software, if the security identifier is a non-secure state, the startup mode of the target software is: directly starting; if the security identifier is a security state, the target software is The startup mode is: after the security verification of the SoC, it is started;
  • the method After the method writes the signature information to the flash, the method further includes:
  • the SoC switches the security identity of the eFuse from a non-secure state to a secure state.
  • the Encryption includes:
  • the SoC determines a symmetry key from the private key and encrypts the public key by the symmetry key.
  • the determining, by the SoC, the symmetry key according to the private key includes:
  • the SoC intercepts a preset bit field of the private key as the symmetry key.
  • a second aspect of the embodiments of the present invention provides a security verification method, applicable to a system-on-chip SoC, wherein the SoC includes an electrically programmable fuse eFuse written with a private key of an asymmetric key pair,
  • the security verification methods include:
  • the SoC decrypts the signature information by using a public key of the asymmetric key pair or the private key to obtain first summary information
  • the SoC confirms that the target software passes the security verification.
  • the decrypting, by the SoC, the signature information includes:
  • the SoC decrypts the signature information using the private key
  • the SoC decrypts the encrypted public key to obtain the public key
  • the SoC decrypts the signature information using the public key.
  • the SoC decrypts the encrypted public key to obtain the public
  • the keys include:
  • the SoC determines a symmetry key according to the private key, and decrypts the encrypted public key by using the symmetry key.
  • the determining, by the SoC, the symmetry key according to the private key includes:
  • the SoC intercepts a preset field of the private key as the symmetry key.
  • a third aspect of the embodiments of the present invention provides a system-on-a-chip SoC, including:
  • a key generation module configured to generate an asymmetric key pair, where the asymmetric key pair includes a public key and a private key;
  • a private key saving module configured to write the private key into the electrically programmable fuse eFuse of the SoC
  • a public key encryption module configured to encrypt the public key
  • a public key saving module configured to write the encrypted public key to a flash memory for saving
  • a first digest generating module configured to acquire target software information in the flash, and generate first digest information according to the target software information, where the target software information is used to start target software;
  • a first digest signature module configured to sign the first digest information by using the public key or the private key to obtain signature information
  • a signature saving module configured to write the signature information into the flash.
  • the first summary signature module is specifically configured to:
  • the first summary information is signed using the private key.
  • the eFuse includes a security identifier, where the security identifier has security and non-security.
  • the security identifier is used to control the startup mode of the target software. If the security identifier is in a non-secure state, the startup mode of the target software is: direct startup; if the security identifier is a security state, Then, the startup mode of the target software is: after the security verification of the SoC is started;
  • the SoC also includes:
  • the state switching module is configured to switch the security identifier of the eFuse from a non-secure state to a secure state.
  • the public key encryption module is specifically used. to:
  • a symmetric key is determined based on the private key, and the public key is encrypted by the symmetric key.
  • the determining the symmetry key according to the private key includes:
  • the preset bit field of the private key is intercepted as the symmetry key.
  • a fourth aspect of the embodiments of the present invention provides an SoC, wherein the SoC includes an electrically programmable fuse eFuse written with a private key of an asymmetric key pair, the SoC including:
  • a signature obtaining module configured to acquire signature information of the target software information from the flash
  • a signature decryption module configured to decrypt the signature information by using a public key or the private key of the asymmetric key pair to obtain first summary information
  • a second digest generating module configured to acquire the target software information in the flash, and generate second digest information according to the target software information
  • a security determining module configured to confirm that the target software passes the security verification when the first summary information is the same as the second summary information.
  • the signature decryption module is specifically configured to:
  • the signature information is decrypted using the public key.
  • the decrypting the encrypted public key to obtain the public key include:
  • the determining the symmetry key according to the private key includes:
  • the preset bit field of the private key is intercepted as the symmetry key.
  • a fifth aspect of the embodiments of the present invention provides an SoC, including an input device, an output device, a processor, and a memory, wherein the processor is configured to perform the following steps by calling an operation instruction stored in a memory:
  • the signature information is written to the flash.
  • the processor is further configured to:
  • the first summary information is signed using the private key.
  • the eFuse includes a security identifier, where the security identifier has security and non-security.
  • the security identifier is used to control the startup mode of the target software. If the security identifier is in a non-secure state, the startup mode of the target software is: direct startup; if the security identifier is a security state, Then, the startup mode of the target software is: after the security verification of the SoC is started;
  • the processor is further configured to:
  • the security identity of the eFuse is switched from a non-secure state to a secure state.
  • the processor is further configured to:
  • a symmetric key is determined based on the private key, and the public key is encrypted by the symmetric key.
  • the processor is further configured to:
  • the preset bit field of the private key is intercepted as the symmetry key.
  • a sixth aspect of an embodiment of the present invention provides an SoC, including an input device, an output device, and an A processor, a memory, and an electrically programmable fuse eFuse that writes a private key having an asymmetric key pair, wherein the processor is configured to perform the following steps by invoking an operation instruction stored in the memory:
  • first summary information is the same as the second summary information, confirm that the target software passes the security verification.
  • the processor is further configured to:
  • the signature information is decrypted using the public key.
  • the processor is further configured to:
  • the processor is further configured to:
  • the preset bit field of the private key is intercepted as the symmetry key.
  • a system-on-chip generates an asymmetric key pair; the private key is written into the SoC's electrically programmable fuse (eFuse); the public key is encrypted; The public key is written in the flash to be saved; the first summary information is generated according to the target software information; the first summary information is signed to obtain the signature information; and the signature information is written into the flash.
  • the security chip is not included in the embodiment of the present invention, and the security information configuration of the information system is completed by the SoC inherent in the processor. Since the security chip is not needed in the embodiment of the present invention, the saving is The cost of outsourcing security chips.
  • FIG. 2 is a flowchart of an embodiment of a method for configuring security information according to an embodiment of the present invention
  • FIG. 3 is a flowchart of an embodiment of a method for configuring security information according to an embodiment of the present invention
  • FIG. 4 is a flowchart of an embodiment of a security verification method according to an embodiment of the present invention.
  • FIG. 5 is a structural diagram of an embodiment of an SoC according to an embodiment of the present invention.
  • FIG. 6 is a structural diagram of an embodiment of an SoC according to an embodiment of the present invention.
  • FIG. 7 is a structural diagram of an embodiment of an SoC according to an embodiment of the present invention.
  • FIG. 8 is a structural diagram of an embodiment of an SoC according to an embodiment of the present invention.
  • the embodiment of the invention provides a security information configuration method, which can improve the security of the information system.
  • the present invention also proposes a security verification method and related apparatus, which will be separately described below.
  • FIG. 2 For the basic process of the security information configuration method provided by the embodiment of the present invention, refer to FIG. 2, including:
  • the SoC generates an asymmetric key pair.
  • SoC is a converged product for the current state of industrial automation.
  • the technology it uses is a mature technology that is being used in large quantities on the industrial site, but it is not a simple stacking of the prior art. It is a new integrated controller that encapsulates, interfaces and integrates many practical technologies.
  • the SoC is typically located in the processor or in place of the processor for data processing of the information system.
  • the SoC When performing security information configuration of the target software, the SoC generates an asymmetric key pair for securely managing the target software information.
  • the asymmetric key pair includes a public key and a private key.
  • the SoC can use the RSA authentication algorithm to generate the public key and the private key, and the public key and the private key can be generated by other algorithms, which is not limited in this embodiment.
  • the SoC Preferably, for the target software, the SoC generates a unique asymmetric key, which is only used for security management of the target software information. This ensures the uniqueness of the public key private key and ensures that the public key private key is not easily known by malware, which improves the security of the information system.
  • the SoC writes the private key into the eFuse of the SoC.
  • eFuse is an electrically programmable fuse that is small in size, low in cost, compact in size, and can be configured after packaging.
  • the eFuse is configured in the SoC, and the SoC writes the private key into the eFuse, ensuring that the private key cannot be known outside the SoC.
  • the SoC encrypts the public key.
  • the SoC needs to write the public key into the flash.
  • the public key may be known outside the SoC.
  • the SoC needs to encrypt the public key before writing the public key to the flash.
  • the SoC writes the encrypted public key to the flash for storage.
  • the SoC After the SoC encrypts the public key, it writes the encrypted public key to the flash and saves it. In this way, even if the encrypted public key in the flash is obtained outside the SoC, it needs to be cracked to obtain the public key, so that the security of the information system is high.
  • the SoC obtains target software information in the flash, and generates first summary information according to the target software information.
  • the target software information is saved in flash and used to launch the target software.
  • the SoC performs the security information configuration of the target software, and the essence is to ensure that the target software can be determined that its information has not been tampered with when it is started.
  • the message digest method is used to ensure that the target software information is not tampered with.
  • the basic principle of the information digest method is as follows:
  • a single hash (Hash) encryption function or other algorithm acts on a piece of information to obtain a summary corresponding to the information.
  • the summary is unique, that is, the digests corresponding to the same message must be consistent, and the digests corresponding to different messages must be different. Therefore, in this embodiment, the first digest is generated according to the target software information when the security information is configured, and then the second digest is generated according to the target software information when the target software is to be started, by comparing whether the first digest and the second digest are the same, It can be known whether the target software information has been tampered with during the period before the security information is configured and before the target software is started.
  • the SoC obtains the target software information in the flash, and generates the first summary information according to the target software information.
  • the SoC can temporarily save the target software information, so that the SoC can process the target software information.
  • the SoC may temporarily load the target software information into a static random access memory (SRAM) in the SoC, or load the target software information into a double rate synchronous dynamic random access memory (DDR).
  • SRAM static random access memory
  • DDR double rate synchronous dynamic random access memory
  • the step 205 may be preceded by any of the steps 201 to 204, which is not limited in this embodiment.
  • the SoC uses the public key or the private key to sign the first summary information to obtain signature information.
  • the SoC needs to sign the first summary information to obtain signature information.
  • the SoC generates an asymmetric key pair in step 201, and the SoC can sign the first summary information using the public key or the private key in the asymmetric key pair.
  • the SoC can be configured to use the public key or the private key to sign the first summary information.
  • the specific method is not limited in this embodiment.
  • the SoC signs the first summary information and obtains the signature information, if the intruder outside the SoC cannot crack the signature information, the first summary information cannot be falsified, and the security of the information system is high.
  • the SoC writes the signature information into the flash.
  • the SoC signs the first summary information, and after obtaining the signature information, writes the signature information to the flash. Used to confirm that the target software information has not been tampered with when the target software starts.
  • the embodiment provides a security information configuration method, including: generating an asymmetric key pair; writing the private key to the eFuse of the SoC; encrypting the public key; and writing the encrypted public key to the flash for saving; Generating first summary information according to the target software information; signing the first summary information to obtain signature information; and writing the signature information into the flash.
  • the SoC responsible for security management since the SoC responsible for security management is located inside the processor, the external information of the private key in the SoC is not known to the outside of the processor. Therefore, the embodiment of the present invention has higher security and lower security than the external security chip in the prior art. The information system was attacked by intruders to break the line of defense.
  • FIG. 2 shows the basic flow of the security information preparation method provided by the embodiment of the present invention.
  • the following embodiment will provide a more detailed security information configuration method.
  • FIG. 3 For the basic steps, refer to FIG. 3 . ,mainly includes:
  • the SoC generates an asymmetric key pair.
  • the SoC writes the private key into the eFuse of the SoC.
  • Steps 301 and 302 are basically the same as steps 201 and 202, and are not described in detail in this embodiment.
  • the SoC encrypts the public key.
  • the SoC needs to write the public key into the flash.
  • the public key may be known outside the SoC.
  • the SoC needs to encrypt the public key before writing the public key to the flash. If the SoC needs to use the public key in the subsequent security configuration or security verification process, the SoC can perform a corresponding decryption operation on the encrypted public key to obtain a public key.
  • the SoC may determine the symmetry key according to the private key and encrypt the public key by the symmetry key. Since the private key cannot be known outside the SoC, the symmetric key generated according to the private key can only be learned by the SoC, and the SoC cannot be cracked externally. This improves the security of the public key.
  • the SoC can directly intercept the preset bit field of the private key as a symmetric key, such as intercepting the private key.
  • the preset low-order bit or the preset high-order bit, etc. the SoC can also intercept the preset bit field of the private key by other methods, which is not limited herein.
  • the SoC can also generate the symmetry key according to the private key by using an XOR algorithm or other algorithms, which is not limited in this embodiment.
  • the SoC may perform the operations of determining the symmetry key, encrypting the public key, and the like in the step by using the security engine (SEC, Security Engine), and may perform the operations in this step by using other components, which is not limited herein.
  • SEC Security Engine
  • the SoC writes the encrypted public key to the flash for storage.
  • the SoC obtains the target software information in the flash, and generates the first information according to the target software information. Summary information;
  • Steps 304 and 305 are basically the same as steps 204 and 205, and are not limited in this embodiment.
  • the step 305 may be located before any of the steps 301 to 304, which is not limited in this embodiment.
  • the SoC uses the public key or the private key to sign the first summary information to obtain signature information.
  • the SoC needs to sign the first summary information to obtain signature information.
  • the SoC generates an asymmetric key pair in step 301, and the SoC can sign the first summary information using the public key or the private key in the asymmetric key pair.
  • the SoC can be configured to use the public key or the private key to sign the first summary information, which is not limited in this embodiment.
  • the public key is encrypted and stored in the flash. Therefore, if the SoC uses the public key to sign the first summary information, the encrypted public key in the flash needs to be obtained. The encrypted public key is decrypted to obtain the public key. The first summary information is then signed using the public key.
  • the SoC can directly sign the first summary information using the private key.
  • the SoC signs the first summary information and obtains the signature information, if the intruder outside the SoC cannot crack the signature information, the first summary information cannot be falsified, and the security of the information system is high.
  • the SoC writes the signature information to the flash.
  • the SoC signs the first summary information, and after obtaining the signature information, writes the signature information to the flash. Used to confirm that the target software information has not been tampered with when the target software starts.
  • the SoC switches the eFuse security identifier from an unsecured state to a secure state.
  • the eFuse includes a security identifier, which has two states: security or non-security, and the security identifier is used to control the startup mode of the target software. If the security identifier is in a non-secure state, the target software starts directly at startup, and does not need to pass the security verification of the SoC. This startup method does not ensure that the target software information has not been tampered with, and the security is not good. If the security identifier is in a secure state, the target software can be started after being authenticated by the SoC. This startup mode can ensure that the target software information has not been tampered with and the security is good.
  • the security identifier may be a bit in the eFuse, and the bit may be 1 Used to indicate the security status. When this bit is 0, it can be used to indicate the non-secure state.
  • eFuse can also use other forms of security identifiers to indicate two states, such as two preset integers or other forms, which are not limited in this embodiment.
  • the SoC After the SoC writes the signature information into the flash, the SoC completes the security information configuration, and can perform security verification when the target software is started. Therefore, the SoC switches the eFuse security identity from the non-secure state to the security state, so that the target software can only be started after the security verification of the SoC, thereby ensuring the security of the information system.
  • the method for performing security verification by the SoC will be described in detail in the following embodiments, which is not limited in this embodiment.
  • the SoC can implement security information configuration of the multi-level target software according to the method provided in this embodiment. For example, if the user wants to open the "cut fruit" game on the terminal, the terminal first needs to start the first level target software, that is, the underlying system of the terminal; then, the second level target software, that is, the Android operating system is started through the underlying system of the terminal; Launch the third-level target software through the Android operating system, the “cut fruit” game. Therefore, when performing security information configuration, the SoC may generate first summary information and signature information of each level of the target software in the three-level target software, and save the signature information of the target software information of each level in the flash.
  • the SoC can use the first summary information of the target software of each level to perform security verification.
  • the target software information of each level can be prevented from being arbitrarily modified, and the security of the information system can be improved.
  • the embodiment provides a security information configuration method, including: generating an asymmetric key pair; writing the private key to the eFuse of the SoC; encrypting the public key; and writing the encrypted public key to the flash for saving; Generating first summary information according to the target software information; signing the first summary information to obtain signature information; writing the signature information to the flash; and switching the eFuse security identifier from the non-secure state to the secure state.
  • the SoC in the processor is connected to the flash outside the processor for security configuration. First, the SoC generates a pair of unique public and private keys and writes the private key to eFuse.
  • the SoC intercepts the lowest 32 bits of the private key as a symmetric key, encrypts the public key, and writes the encrypted public key to the flash for storage.
  • the SoC obtains the target software information in the flash, and processes the target software information through a single Hash function to obtain the first summary information.
  • the SoC uses the private key to sign the first summary information, obtains the signature information, and writes the signature information to the flash.
  • the SoC includes a security identification bit, and the SoC rewrites the security identification bit from 0 to 1, after which the target software can only be booted from the SoC after being authenticated by the SoC.
  • the foregoing embodiment provides a basic method for configuring security information provided by the present invention. After the SoC completes the configuration of the security information according to the foregoing method, the security verification can be performed when the target software is started. To this end, the embodiment of the present invention further provides a related security verification method for securely starting the target software.
  • the basic process includes:
  • the SoC obtains signature information of the target software from the flash.
  • This embodiment uses the information digest method to ensure that the target software information is not tampered with.
  • the basic principles of the information digest method are as follows:
  • a single Hash encryption function or other algorithm acts on a piece of information to obtain a summary corresponding to the information.
  • the summary is unique, that is, the digests corresponding to the same message must be consistent, and the digests corresponding to different messages must be different. Therefore, in this embodiment, the signature information of the target software is obtained from the flash, the first summary information is obtained according to the signature information, and then the second summary is generated according to the target software information, and by comparing whether the first summary and the second summary are the same, It can be known whether the target software information has been tampered with during the period before the security information is configured and before the target software is started.
  • the SoC obtains the signature information of the target software from the flash.
  • the SoC decrypts the signature information by using a public key or a private key of the asymmetric key pair to obtain the first summary information.
  • the SoC After acquiring the signature information of the target software, the SoC decrypts the signature information to obtain a first summary information, which is a summary generated by the SoC according to the target software information when the security information is configured.
  • the SoC includes an eFuse written with a private key having an asymmetric key pair, and the SoC decrypts the signature information using a public key or a private key of the asymmetric key pair.
  • the SoC to decrypt the signature information by using the public key or the private key of the asymmetric key pair, which mainly needs to correspond to the method of encrypting the first summary information when configuring the security information, which will be later
  • the details in the embodiment are not limited in this embodiment.
  • the first summary information may be temporarily saved, so that the SoC processes the first summary information.
  • the SoC may temporarily save the first summary information to the SRAM in the SoC, or temporarily load the first summary information into the DDR, which is not limited in this embodiment.
  • the SoC acquires target software information in the flash, and generates second summary information according to the target software information.
  • the SoC obtains the target software information in the flash and generates a second digest according to the target software information. It can be understood that the algorithm for generating the second digest should be the same as the algorithm for generating the first digest when the security information is configured to ensure that the same digest can be generated according to the same message.
  • the SoC may temporarily save the target software information, so that the SoC processes the target software information.
  • the SoC may temporarily save the target software information to the SRAM in the SoC, or temporarily load the target software information into the double rate synchronous dynamic random access memory (DDR), which is not limited in this embodiment.
  • DDR double rate synchronous dynamic random access memory
  • the step 403 is also located before the step 401 or 402, which is not limited in this embodiment.
  • the SoC confirms that the target software passes the security verification.
  • the first summary information is the same as the second summary information, it indicates that the target software information has not been tampered with during the period after the security information is configured until the target software is started, and the SoC confirms that the target software passes the security verification, and the target software can be started.
  • the SoC obtains the signature information of the target software from the flash; decrypts the signature information to obtain the first summary information; acquires the target software information in the flash, and according to the target software information
  • the second summary information is generated; if the first summary information is the same as the second summary information, the target software is confirmed to pass the security verification.
  • the SoC responsible for security management is located inside the processor, the external information of the private key in the SoC cannot be known by the processor, and the signature information cannot be falsified. Therefore, the embodiment of the present invention is compared with the external security chip in the prior art. It has higher security in security verification, which reduces the possibility that the information system will be attacked by intruders.
  • step 402 when the SoC decrypts the signature information, the decryption method needs to correspond to the method of encrypting the first digest information when performing security information configuration. For example, if the SoC uses the public key to sign the first digest information when performing the security information configuration, in step 402, the SoC decrypts the signature information using the private key; if the security information is configured, the SoC uses the private key pair. The first summary information is signed. In step 402, the SoC obtains the encrypted public key in the flash, decrypts the encrypted public key to obtain a public key, and then decrypts the signature information using the public key.
  • the decryption of the signature information by the SoC may also be other methods, which is not limited in this application.
  • the SoC needs to decrypt the encrypted public key, preferably, the public key obtained by the SoC can be decrypted and written into the SRAM in the SoC or temporarily saved in the DDR, so that the SoC can use the public key.
  • the SoC may determine a symmetric key according to the private key, and encrypt the public key by using the symmetric key; and perform the encrypted public key.
  • the symmetry key can be used for decryption. Since the private key cannot be known outside the SoC, the symmetric key generated according to the private key can only be learned by the SoC, and the SoC cannot be cracked externally. This improves the security of the public key.
  • the SoC can directly intercept the preset bit field of the private key as a symmetric key, such as intercepting.
  • the preset low-order bit of the private key or the preset high-order bit, etc. is used to intercept the preset bit field of the private key by other methods, which is not limited herein.
  • the SoC can also generate the symmetry key according to the private key by using an XOR algorithm or other algorithms, which is not limited in this application.
  • step 404 it indicates that the target software information is tampered with after the security information is configured and before the target software is started, SoC is indeed The target software does not pass security verification.
  • SoC chips often have two modes: Secure World and Normal World. SoC chips have high security privileges when they are in the safe world mode, and the outside world does not have the right to run programs in the security world. modify. Preferably, the SoC switches the system to the security world before performing security verification to ensure that the information is not tampered with by an attacker outside the SoC during the security verification process. When the SoC determines that the target software has passed the security verification, preferably, the SoC can switch from the secure world to the ordinary world and run the target software in the normal world.
  • the SoC can implement security verification of the multi-level target software according to the method provided in this embodiment. For example, if the user wants to open the "cut fruit" game on the terminal, the terminal first needs to start the first level target software, that is, the underlying system of the terminal; then, the second level target software, that is, the Android operating system is started through the underlying system of the terminal; Launch the third-level target software through the Android operating system, the “cut fruit” game. Therefore, when the security verification is performed, the SoC of the terminal first obtains the first summary information and the second summary information of the underlying system of the terminal, and compares whether the comparison is the same.
  • SoC starts the underlying system of the terminal from the diskless boot ROM interface (BootRom), and performs security verification of the Android operating system, and so on. Only when the first summary information and the second summary information of the target software of each level are the same, the SoC finally determines the security verification through the highest level target software; as long as there is any level of the target software in the verification process Different from the second summary information, the summary information does not need to perform the next level of security verification, and directly determines that the security verification fails. In this way, the target software information can be prevented from being arbitrarily modified, and the security of the information system can be improved.
  • the SoC in the processor is connected to the flash outside the processor and is configured securely. At some point, the SoC switches to the Safe World mode to securely authenticate the target software.
  • the signature information of the target software is obtained from the flash, and the signature information is obtained by the first summary information being signed by the SoC private key.
  • the public key corresponding to the private key is stored in the flash by the lower bit of the private key, the SoC obtains the encrypted public key in the flash, and intercepts the lowest 32 bits of the private key as the symmetric key, and the encrypted public key. Decrypt to get the public key. The SoC decrypts the signature information using the public key to obtain the first summary information.
  • the SoC obtains the target software information in the flash, and processes the target software information through a single Hash function to obtain the second summary information.
  • the first summary information is the same as the second summary information, it indicates that the target software information has not been tampered with during the period after the security information is configured until the target software is started, and the SoC confirms that the target software passes the security verification.
  • the embodiment of the present invention further provides a related system-level chip SoC, which is used to implement the security information configuration method in the embodiment shown in FIG. 2 or FIG. 3.
  • SoC system-level chip SoC
  • the key generation module 501 is configured to generate an asymmetric key pair, where the asymmetric key pair includes a public key and a private key;
  • a private key saving module 502 configured to write the private key into the electrically programmable fuse eFuse of the SoC;
  • a public key encryption module 503, configured to encrypt the public key
  • the public key saving module 504 is configured to write the encrypted public key to the flash memory for storage
  • the first digest generating module 505 is configured to obtain target software information in the flash, and generate first digest information according to the target software information, where the target software information is used to start the target software;
  • the first digest signature module 506 is configured to use the public key or the private key to sign the first digest information to obtain signature information.
  • the signature saving module 507 is configured to write signature information into the flash.
  • This embodiment provides an SoC, in which the key generation module 501 generates an asymmetric key pair; the private key saving module 502 writes the private key into the eFuse of the SoC; and the public key encryption module 503 encrypts the public key;
  • the public key saving module 504 writes the encrypted public key to the flash for saving;
  • the first digest generating module 505 generates the first digest information according to the target software information;
  • the first digest signature module 506 signs the first digest information to obtain the signature information.
  • the signature saving module 507 writes the signature information to the flash.
  • the SoC provided by the present application is configured for security, only the flash and the SoC are configured, which simplifies the process of security configuration.
  • the SoC provided by the embodiment of the present invention has higher security than the external security chip in the prior art, because the SoC responsible for security management is located inside the processor, and the external information of the private key in the SoC is not known to the processor. Sex can reduce the possibility of information systems being attacked by intruders.
  • the first digest signature module 506 can be associated with the private key storage module 502, and/or with the public key, because the first digest signature module 506 signs the first digest information using the public key or the private key to obtain the signature information.
  • the save module 504 is connected.
  • FIG. 5 shows the basic structure of the SoC provided by the embodiment of the present invention.
  • the following embodiment will provide a more detailed SoC.
  • the basic structure of the system is shown in FIG.
  • the key generation module 601 is configured to generate an asymmetric key pair, where the asymmetric key pair includes a public key and a private key;
  • a private key saving module 602 configured to write the private key into the electrically programmable fuse eFuse of the SoC;
  • the public key encryption module is specifically configured to: determine a symmetric key according to the private key, and encrypt the public key by using a symmetric key.
  • the public key encryption module can intercept the preset bit field of the private key as a symmetric key to encrypt the public key.
  • the public key saving module 604 is configured to save the encrypted public key to the flash memory for saving
  • the first digest generating module 605 is configured to obtain target software information in the flash, and generate first digest information according to the target software information, where the target software information is used to start the target software;
  • the first digest signature module 606 is configured to sign the first digest information by using a public key or a private key to obtain signature information.
  • the first digest signature module is configured to: obtain an encrypted public key in the flash; decrypt the encrypted public key to obtain a public key; and use the public key to sign the first digest information;
  • the first digest signature module is configured to: sign the first digest information by using a private key.
  • a signature saving module 607 configured to write signature information into the flash
  • the eFuse includes a security identifier, and the security identifier has two states: a security and a non-security state, and is used to control the startup mode of the target software. If the security identifier is in a non-secure state, the startup mode of the target software is: direct startup; When the identifier is in a secure state, the target software is started by: after the security verification of the SoC.
  • the SoC in this embodiment further includes:
  • the state switching module 608 is configured to switch the eFuse security identifier from the non-secure state to the security state. state.
  • This embodiment provides a SoC, in which the key generation module 601 generates an asymmetric key pair; the private key saving module 602 writes the private key into the eFuse of the SoC; and the public key encryption module 603 encrypts the public key;
  • the public key saving module 604 writes the encrypted public key to the flash for saving;
  • the first digest generating module 605 generates the first digest information according to the target software information;
  • the first digest signature module 606 signs the first digest information to obtain the signature information.
  • the signature saving module 607 writes the signature information to the flash.
  • the SoC provided by the present application is configured for security, only the flash and the SoC are configured, which simplifies the process of security configuration. And because the SoC responsible for security management is located inside the processor, the processor outside world cannot know the security information such as the private key in the SoC. After the security configuration is completed, the state switching module 608 switches the security identifier of the eFuse from the non-secure state to the security state, and the target software can be started only after the security verification by the SoC. Therefore, the SoC provided by the embodiment of the present invention is externally connected to the prior art. Compared with the security chip, it has higher security and can reduce the possibility that the information system is attacked by the intruder.
  • the SoC in the processor is connected to the flash outside the processor for security configuration.
  • the key generation module 601 generates a pair of unique public and private keys
  • the private key saving module 602 writes the private key into the eFuse.
  • the public key encryption module 603 intercepts the lowest 32-bit bit of the private key as a symmetric key, encrypts the public key, and the public key saving module 604 writes the encrypted public key to the flash for storage.
  • the first digest generating module 605 obtains the target software information in the flash, and processes the target software information by using a single Hash function to obtain the first digest information.
  • the first digest signature module 606 signs the first digest information using the private key to obtain signature information, and the signature saving module 607 writes the signature information into the flash.
  • the SoC includes a security identification bit, and the state switching module 608 rewrites the security identification bit from 0 to 1, after which the target software can only be booted from the SoC after the security verification by the SoC.
  • the SoC in the embodiment of the present invention is described above from the perspective of a unitized functional entity.
  • the SoC in the embodiment of the present invention is described from the perspective of hardware processing. Referring to FIG. 7, the present invention is described.
  • Another embodiment of the SoC 700 in the embodiment includes:
  • the input device 701, the output device 702, the processor 703, and the memory 704 (wherein the number of processors 703 in the SoC 700 may be one or more, and one processor 703 is taken as an example in FIG. 7).
  • the input device 701, the output device 702, the processor 703, and the memory 704 may be connected by a bus or other means, wherein the bus connection is taken as an example in FIG.
  • the processor 703 is configured to perform the following steps by calling an operation instruction stored in the memory 704:
  • the processor 703 is further configured to: obtain the encrypted public key in the flash; decrypt the encrypted public key to obtain the public key; The public key signs the first summary information; or, the first summary information is signed by using the private key.
  • the processor 703 is further configured to perform the step of: switching the security identifier of the eFuse from a non-secure state to a secure state.
  • the processor 703 is further configured to perform the steps of: determining a symmetry key according to the private key, and encrypting the public key by using the symmetry key.
  • the processor 703 is further configured to perform the step of: the public key encryption module intercepting a preset bit field of the private key as the symmetric key.
  • the embodiment of the present invention further provides an associated system-on-chip SoC, which includes an eFuse for writing a private key of an asymmetric key pair, for implementing the security verification method in the embodiment shown in FIG.
  • SoC system-on-chip SoC
  • Figure 8 for the basic structure, including:
  • a signature obtaining module 801 configured to acquire signature information of the target software information from the flash
  • the signature decryption module 802 is configured to decrypt the signature information by using a public key or a private key of the asymmetric key pair to obtain the first summary information.
  • a second digest generating module 803 configured to acquire target software information in the flash, and generate second digest information according to the target software information
  • the security determining module 804 is configured to confirm that the target software passes the security verification when the first summary information is the same as the second summary information.
  • the signature acquisition module 801 obtains the signature information of the target software from the flash; the signature decryption module 802 decrypts the signature information to obtain the first summary information; and the second digest generation module 803 acquires the target software information in the flash, and The second summary information is generated according to the target software information; if the first summary information is the same as the second summary information, the security determining module 804 confirms that the target software passes the security verification. It can be seen from the above process that the SoC provided in this embodiment can perform security verification without using an additional security chip, thereby saving the cost of the purchased security chip and simplifying the process of security verification.
  • the SoC is located inside the processor, the external information of the private key in the SoC is not known to the processor, and the signature information cannot be falsified. Therefore, the SoC provided by the embodiment of the present invention is compared with the external security chip in the prior art. Security verification has higher security and reliability, which reduces the possibility of information systems being attacked by intruders.
  • the signature decryption module 802 is specifically configured to: decrypt the signature information by using a private key; or obtain a public key of the encrypted asymmetric key pair in the flash; and decrypt the encrypted public key to obtain Public key; decrypts the signature information using the public key.
  • the signature decryption module 802 is specifically configured to: determine a symmetric key according to the private key, and decrypt the encrypted public key by using the symmetric key.
  • the signature decryption module 802 can specifically intercept the preset bit field of the private key as a symmetric key.
  • the SoC in the processor is connected to the flash outside the processor and is configured securely. At some point, the SoC switches to the Safe World mode to securely authenticate the target software.
  • the signature obtaining module 801 obtains signature information of the target software from the flash, and the signature information is obtained by the first summary information being signed by the private key of the SoC.
  • the public key corresponding to the private key is stored in the flash by the lower bit of the private key, and the signature decryption module 802 obtains the encrypted public key in the flash and intercepts the lowest 32 bits of the private key as the symmetric key.
  • the encrypted public key is decrypted to obtain the public key.
  • the SoC decrypts the signature information using the public key to obtain the first summary information.
  • the second digest generating module 803 obtains the target software information in the flash, and processes the target software information by using a single Hash function to obtain the second digest information.
  • the security determination module 804 confirms that the target software passes the security verification.
  • the SoC in the embodiment of the present invention is described above from the perspective of a unitized functional entity.
  • the SoC in the embodiment of the present invention is described from the perspective of hardware processing. Please refer to FIG. 7 again, and the SoC 700 in the embodiment of the present invention is further described.
  • An embodiment includes:
  • the input device 701, the output device 702, the processor 703, and the memory 704 (wherein the number of processors 703 in the SoC 700 may be one or more, and one processor 703 is taken as an example in FIG. 7).
  • the input device 701, the output device 702, the processor 703, and the memory 704 may be connected by a bus or other means, wherein the bus connection is taken as an example in FIG.
  • the processor 703 is configured to perform the following steps by calling an operation instruction stored in the memory 704:
  • Acquiring signature information of the target software information from the flash decrypting the signature information to obtain first summary information; acquiring the target software information in the flash, and generating a second abstract according to the target software information Information; when the first summary information is the same as the second summary information, confirm that the target software passes the security verification.
  • the processor 703 is further configured to: decrypt the signature information by using the private key; or obtain the encrypted asymmetric key pair in the flash. a key; decrypting the encrypted public key to obtain the public key; and decrypting the signature information using the public key.
  • the processor 703 is further configured to: determine a symmetry key according to the private key, and decrypt the encrypted public key by using the symmetry key.
  • the processor 703 is further configured to perform the step of: intercepting a preset bit field of the private key as the symmetry key.
  • the disclosed systems and methods can be implemented in other ways.
  • the system embodiment described above is merely illustrative.
  • the division of the unit is only a logical function division, and the actual implementation may have another division manner, for example, multiple units or components may be combined or Can be integrated into another system, or some features can be ignored or not executed.
  • the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, module or unit, and may be electrical, mechanical or otherwise.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of the embodiment.
  • each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.
  • the above integrated unit can be implemented in the form of hardware or in the form of a software functional unit.
  • the integrated unit if implemented in the form of a software functional unit and sold or used as a standalone product, may be stored in a computer readable storage medium.
  • the technical solution of the present invention which is essential or contributes to the prior art, or all or part of the technical solution, may be embodied in the form of a software product stored in a storage medium.
  • a number of instructions are included to cause a computer device (which may be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present invention.
  • the foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, and the like. .

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Abstract

本发明实施例提供了一种安全信息配置方法，用于节约成本，简化安全信息配置的流程，提高安全信息配置的安全性与可靠性。本发明实施例提供的安全信息配置方法包括：SoC生成非对称性密钥对；将私钥写入SoC的eFuse中；对公钥进行加密；将加密后的公钥写入flash中保存；根据目标软件信息生成第一摘要信息；对第一摘要信息进行签名，得到签名信息；将签名信息写入flash。本发明实施例还提供了相关的安全验证方法以及相关芯片。

Description

一种安全信息配制方法、安全验证方法以及相关芯片 技术领域
本发明涉及信息安全领域，尤其涉及一种安全信息配制方法、安全验证方法以及相关芯片。
背景技术
随着信息技术的发展，信息安全的重要性引来了越来越多的关注。在传统信息系统中，密钥与授权消息等信息都被存储于磁盘中，而磁盘很容易被破坏，导致这种方法安全性不高。因此现有的信息系统中在闪存(flash)、处理器之外添加了安全芯片，用于保护系统的安全性，请参阅图1。
安全芯片具有可靠性认证、用户身份认证、数字签名等功能，可以用于防止未经授权的软件修改。安全芯片是信息系统可信的最低层次，入侵者只有攻破安全芯片才能有可能攻破信息系统的防护，因此，安全芯片提供了整个信息系统的可信的基础。
但是现有的信息系统的安全性管理任务全部由安全芯片实现，因此必须外购了安全芯片后，才能实现信息系统的安全信息配置，而外购安全芯片会增加信息系统的成本。且由于在进行安全信息配置时需要对flash、安全芯片、处理器三个硬件均进行配置，会使得安全信息配置的流程较为复杂。同时由于外置的安全芯片与处理器通过以太网互联，安全芯片与处理器的连接上可能存在安全漏洞，信息系统仍有被入侵者攻破防线的可能。
发明内容
本发明实施例提供了一种安全信息配置方法，可以提高信息系统的安全性，降低信息系统被入侵者攻破防线的可能。
本发明实施例第一方面提供了一种安全信息配置方法，包括：
系统级芯片SoC生成非对称性密钥对，所述非对称性密钥对包括公钥与私钥；
所述SoC将所述私钥写入所述SoC的电可编程熔丝eFuse中；
所述SoC对所述公钥进行加密；
所述SoC将加密后的所述公钥写入闪存flash中保存；
所述SoC获取所述flash中的目标软件信息，并根据所述目标软件信息生成第一摘要信息，所述目标软件信息用于启动目标软件；
所述SoC使用所述公钥或所述私钥对所述第一摘要信息进行签名，得到签名信息；
所述SoC将所述签名信息写入所述flash。
结合本发明实施例的第一方面，本发明实施例的第一方面的第一种实现方式中，所述SoC使用所述公钥或所述私钥对所述第一摘要信息进行签名包括：
所述SoC获取flash中的加密后的所述公钥；
所述SoC对所述加密后的所述公钥进行解密，得到所述公钥；
所述SoC使用所述公钥对所述第一摘要信息进行签名；
或，
所述SoC使用所述私钥对所述第一摘要信息进行签名。
结合本发明实施例的第一方面，本发明实施例的第一方面的第二种实现方式中，所述eFuse中包括安全标识，所述安全标识具有安全、非安全两种状态，所述安全标识用于控制所述目标软件的启动方式，若所述安全标识为非安全状态，则所述目标软件的启动方式为：直接启动；若所述安全标识为安全状态，则所述目标软件的启动方式为：经过SoC的安全验证后启动；
所述方法在所述SoC将所述签名信息写入所述flash之后还包括：
所述SoC将所述eFuse的所述安全标识由非安全状态切换到安全状态。
结合本发明实施例的第一方面、第一方面的第一种实现方式和第二种实现方式，本发明实施例的第二方面的第三种实现方式中，所述SoC对所述公钥进行加密包括：
所述SoC根据所述私钥确定对称性密钥，并通过所述对称性密钥加密所述公钥。
结合本发明实施例的第一方面的第三种实现方式，本发明实施例的第一方面的第四种实现方式中，所述SoC根据所述私钥确定对称性密钥包括：
所述SoC截取所述私钥的预置位域，作为所述对称性密钥。
本发明实施例的第二方面提供了一种安全验证方法，适用于系统级芯片SoC，其中，所述SoC包括写入有非对称性密钥对的私钥的电可编程熔丝eFuse，所述安全验证方法包括：
所述SoC从所述flash中获取目标软件信息的签名信息；
所述SoC使用所述非对称性密钥对的公钥或所述私钥，对所述签名信息进行解密，得到第一摘要信息；
所述SoC获取所述flash中的所述目标软件信息，并根据所述目标软件信息生成第二摘要信息；
若所述第一摘要信息与所述第二摘要信息相同，则所述SoC确认所述目标软件通过安全验证。
结合本发明实施例的第二方面，本发明实施例的第二方面的第一种实现方式中，所述SoC对所述签名信息进行解密包括：
所述SoC使用所述私钥对所述签名信息进行解密；
或，
所述SoC获取flash中的加密后的所述非对称性密钥对的公钥；
所述SoC对所述加密后的公钥进行解密，得到所述公钥；
所述SoC使用所述公钥对所述签名信息进行解密。
结合本发明实施例的第二方面的第一种实现方式，本发明实施例的第二方面的第二种实现方式中，所述SoC对所述加密后的公钥进行解密，得到所述公钥包括：
所述SoC根据所述私钥确定对称性密钥，并通过所述对称性密钥对所述加密后的公钥进行解密。
结合本发明实施例的第二方面的第二种实现方式，本发明实施例的第二方面的第三种实现方式中，所述SoC根据所述私钥确定对称性密钥包括：
所述SoC截取所述私钥的预置字段，作为所述对称性密钥。
本发明实施例的第三方面提供了一种系统级芯片SoC，包括：
密钥生成模块，用于生成非对称性密钥对，所述非对称性密钥对包括公钥与私钥；
私钥保存模块，用于将所述私钥写入所述SoC的电可编程熔丝eFuse中；
公钥加密模块，用于对所述公钥进行加密；
公钥保存模块，用于将加密后的所述公钥写入闪存flash中保存；
第一摘要生成模块，用于获取所述flash中的目标软件信息，并根据所述目标软件信息生成第一摘要信息，所述目标软件信息用于启动目标软件；
第一摘要签名模块，用于使用所述公钥或所述私钥对所述第一摘要信息进行签名，得到签名信息；
签名保存模块，用于将所述签名信息写入所述flash。
结合本发明实施例的第三方面，本发明实施例的第三方面的第一种实现方式中，所述第一摘要签名模块具体用于：
获取flash中的加密后的所述公钥；
对所述加密后的所述公钥进行解密，得到所述公钥；
使用所述公钥对所述第一摘要信息进行签名；
或，
使用所述私钥对所述第一摘要信息进行签名。
结合本发明实施例的第三方面的第一种实现方式，本发明实施例的第三方面的第二种实现方式中，所述eFuse中包括安全标识，所述安全标识具有安全、非安全两种状态，所述安全标识用于控制所述目标软件的启动方式，若所述安全标识为非安全状态，则所述目标软件的启动方式为：直接启动；若所述安全标识为安全状态，则所述目标软件的启动方式为：经过SoC的安全验证后启动；
所述SoC还包括：
状态切换模块，用于将所述eFuse的所述安全标识由非安全状态切换到安全状态。
结合本发明实施例的第三方面、第三方面的第一种实现方式与第二种实现方式，本发明实施例的第三方面的第三种实现方式中，所述公钥加密模块具体用于：
根据所述私钥确定对称性密钥，并通过所述对称性密钥加密所述公钥。
结合本发明实施例的第三方面的第三种实现方式，本发明实施例的第三方面的第四种实现方式中，所述根据所述私钥确定对称性密钥包括：
截取所述私钥的预置位域，作为所述对称性密钥。
本发明实施例的第四方面提供了一种SoC，其中，所述SoC包括写入有非对称性密钥对的私钥的电可编程熔丝eFuse，所述SoC包括：
签名获取模块，用于从所述flash中获取目标软件信息的签名信息；
签名解密模块，用于使用所述非对称性密钥对的公钥或所述私钥，对所述签名信息进行解密，得到第一摘要信息；
第二摘要生成模块，用于获取所述flash中的所述目标软件信息，并根据所述目标软件信息生成第二摘要信息；
安全确定模块，用于在所述第一摘要信息与所述第二摘要信息相同时，确认所述目标软件通过安全验证。
结合本发明实施例的第四方面，本发明实施例的第四方面的第一种实现方式中，所述签名解密模块具体用于：
使用所述私钥对所述签名信息进行解密；
或，
获取flash中的加密后的所述非对称性密钥对的公钥；
对所述加密后的公钥进行解密，得到所述公钥；
使用所述公钥对所述签名信息进行解密。
结合本发明实施例的第四方面的第一种实现方式，本发明实施例的第四方面的第二种实现方式中，所述对所述加密后的公钥进行解密，得到所述公钥包括：
根据所述私钥确定对称性密钥，并通过所述对称性密钥对所述加密后的公钥进行解密。
结合本发明实施例的第四方面的第二种实现方式，本发明实施例的第四方面的第三种实现方式中，所述根据所述私钥确定对称性密钥包括：
截取所述私钥的预置位域，作为所述对称性密钥。
本发明实施例的第五方面提供了一种SoC，包括输入装置、输出装置、处理器和存储器，其特征在于，通过调用存储器存储的操作指令，所述处理器用于执行如下步骤：
生成非对称性密钥对，所述非对称性密钥对包括公钥与私钥；
将所述私钥写入所述SoC的电可编程熔丝eFuse中；
对所述公钥进行加密；
将加密后的所述公钥写入闪存flash中保存；
获取所述flash中的目标软件信息，并根据所述目标软件信息生成第一摘要信息，所述目标软件信息用于启动目标软件；
使用所述公钥或所述私钥对所述第一摘要信息进行签名，得到签名信息；
将所述签名信息写入所述flash。
结合本发明实施例的第五方面，本发明实施例的第五方面的第一种实现方式中，所述处理器还用于：
获取flash中的加密后的所述公钥；
对所述加密后的所述公钥进行解密，得到所述公钥；
使用所述公钥对所述第一摘要信息进行签名；
或，
使用所述私钥对所述第一摘要信息进行签名。
结合本发明实施例的第五方面的第一种实现方式，本发明实施例的第五方面的第二种实现方式中，所述eFuse中包括安全标识，所述安全标识具有安全、非安全两种状态，所述安全标识用于控制所述目标软件的启动方式，若所述安全标识为非安全状态，则所述目标软件的启动方式为：直接启动；若所述安全标识为安全状态，则所述目标软件的启动方式为：经过SoC的安全验证后启动；
所述处理器还用于：
将所述eFuse的所述安全标识由非安全状态切换到安全状态。
结合本发明实施例的第五方面、第五方面的第一种实现方式与第二种实现方式，本发明实施例的第五方面的第三种实现方式中，所述处理器还用于：
根据所述私钥确定对称性密钥，并通过所述对称性密钥加密所述公钥。
结合本发明实施例的第五方面的第三种实现方式，本发明实施例的第五方面的第四种实现方式中，所述处理器还用于：
截取所述私钥的预置位域，作为所述对称性密钥。
本发明实施例的第六方面提供了一种SoC，包括输入装置、输出装置、处 理器、存储器和写入有非对称性密钥对的私钥的电可编程熔丝eFuse，其特征在于，通过调用存储器存储的操作指令，所述处理器用于执行如下步骤：
从所述flash中获取目标软件信息的签名信息；
使用所述非对称性密钥对的公钥或所述私钥，对所述签名信息进行解密，得到第一摘要信息；
获取所述flash中的所述目标软件信息，并根据所述目标软件信息生成第二摘要信息；
若所述第一摘要信息与所述第二摘要信息相同，则确认所述目标软件通过安全验证。
结合本发明实施例的第六方面，本发明实施例的第六方面的第一种实现方式中，所述处理器还用于：
使用所述私钥对所述签名信息进行解密；
或，
获取flash中的加密后的所述非对称性密钥对的公钥；
对所述加密后的公钥进行解密，得到所述公钥；
使用所述公钥对所述签名信息进行解密。
结合本发明实施例的第六方面的第一种实现方式，本发明实施例的第六方面的第二种实现方式中，所述处理器还用于：
根据所述私钥确定对称性密钥，并通过所述对称性密钥对所述加密后的公钥进行解密。
结合本发明实施例的第六方面的第二种实现方式，本发明实施例的第六方面的第三种实现方式中，所述处理器还用于：
截取所述私钥的预置位域，作为所述对称性密钥。
本发明实施例中，系统级芯片(SoC，System on Chip)生成非对称性密钥对；将私钥写入SoC的电可编程熔丝(eFuse)中；对公钥进行加密；将加密后的公钥写入flash中保存；根据目标软件信息生成第一摘要信息；对第一摘要信息进行签名，得到签名信息；将签名信息写入flash。通过上述流程可以看出，本发明实施例中不包括安全芯片，信息系统的安全信息配置由处理器中固有的SoC来完成。由于本发明实施例中无需使用安全芯片，因而就节约了 外购安全芯片的成本。且在进行安全性配置的时候，仅仅需要对flash与SoC进行配置，简化了安全配置的流程。且由于负责安全管理的SoC位于处理器内部，处理器外界无法获知SoC中的私钥等安全信息，因此本发明实施例与现有技术中外置安全芯片相比，有着更高的安全性，降低了信息系统被入侵者攻破防线的可能。
附图说明
图1为现有技术中信息系统的一个结构图；
图2为本发明实施例中安全信息配置方法一个实施例流程图；
图3为本发明实施例中安全信息配置方法一个实施例流程图；
图4为本发明实施例中安全验证方法一个实施例流程图；
图5为本发明实施例中SoC一个实施例结构图；
图6为本发明实施例中SoC一个实施例结构图；
图7为本发明实施例中SoC一个实施例结构图；
图8为本发明实施例中SoC一个实施例结构图。
具体实施方式
本发明实施例提供了一种安全信息配置方法，可以提高信息系统的安全性。本发明还提出了一种安全验证方法以及相关装置，以下将分别进行说明。
本发明实施例提供的安全信息配置方法的基本流程请参阅图2，包括：
201、SoC生成非对称性密钥对；
SoC是针对工业自动化现状而出现的一种融合性产品。它采用的技术是正在工业现场大量使用的成熟技术，但又不是对现有技术的简单堆砌，是对众多实用技术进行封装、接口、集成，形成全新的一体化的控制器。SoC一般位于处理器中，或替代处理器对信息系统进行数据处理。
在进行目标软件的安全信息配置时，SoC生成非对称性密钥对，用于对该目标软件信息进行安全管理。该非对称性密钥对包括公钥与私钥。
优选的，SoC可以使用RSA认证算法生成该公钥与私钥，也可以通过其他算法来生成该公钥与私钥，本实施例中不做限定。
优选的，针对目标软件，SoC生成唯一的非对称性密钥，仅用于对该目标软件信息进行安全管理。这样可以保证公钥私钥的唯一性，确保公钥私钥不会轻易地被恶意软件获知，提高了信息系统的安全性。
202、SoC将私钥写入SoC的eFuse中；
eFuse是一种电可编程熔丝，具有体积小、成本低廉、可缩小性强、可以在封装之后再进行配置等特点。本实施例中SoC内配置有eFuse，SoC将私钥写入该eFuse中，确保了SoC外部无法获知该私钥。
203、SoC对公钥进行加密；
本实施例中，SoC需要将公钥写入flash中，当公钥写入flash后，SoC外部就有可能获知该公钥。为了保证该公钥的安全性，SoC将公钥写入flash中前，需要对该公钥进行加密。
SoC对公钥加密的方法有很多，将在后面的实施例中进行详述，本实施例中不做限定。
204、SoC将加密后的公钥写入flash中保存；
SoC对公钥进行加密后，将加密后的公钥写入flash中保存。这样SoC外部即便获取了flash中加密后的公钥，也需要经过破解才能获得公钥，使得信息系统的安全性较高。
205、SoC获取flash中的目标软件信息，并根据该目标软件信息生成第一摘要信息；
目标软件信息保存在flash中，用于启动目标软件。SoC进行目标软件的安全信息配置，其实质是为了确保目标软件在启动时，能够认定其信息没有被篡改。为此本实施例采用信息摘要(Message Digest)方法来确保目标软件信息不被篡改，信息摘要方法的基本原理如下：
通过单项散列(Hash)加密函数或其它算法对一个信息进行作用，可以得到该信息对应的摘要。摘要具有唯一性，即：相同的消息对应的摘要必定一致，不同的消息对应的摘要必定不同。因此，本实施例中根据安全信息配置时的目标软件信息生成第一摘要，然后根据目标软件待启动时的目标软件信息生成第二摘要，通过比对第一摘要与第二摘要是否相同，就可以获知目标软件信息在安全信息配置后到目标软件启动前的时间段内，该目标软件信息是否被篡改。
因此，本步骤中，SoC获取flash中的目标软件信息，并根据该目标软件信息生成第一摘要信息。
其中，SoC获取目标软件信息后，可以临时保存该目标软件信息，以便于SoC对目标软件信息进行处理。具体的，SoC可以将该目标软件信息加载到SoC中的静态随机存储器(SRAM，Static RAM)中临时保存，或将该目标软件信息加载到双倍速率同步动态随机存储器(DDR，Double Data Rate)中临时保存，本实施例中不做限定。
其中，步骤205也可以位于步骤201至204中任意步骤之前，本实施例中不做限定。
206、SoC使用公钥或私钥对第一摘要信息进行签名，得到签名信息；
若第一摘要信息直接写入flash，则SoC外部的入侵者就有可能获知并篡改该第一摘要信息。为了保证该第一摘要信息的安全性与信息摘要方法的可靠性，SoC需要对第一摘要信息进行签名，得到签名信息。
SoC在步骤201中生成了非对称性密钥对，SoC可以使用该非对称性密钥对中的公钥或私钥对该第一摘要信息进行签名。其中，SoC无论是使用公钥还是使用私钥都可以实现对第一摘要信息进行签名，其具体方法将在后面的实施例中详述，本实施例中不做限定。
SoC对第一摘要信息进行签名，得到签名信息后，SoC外部的入侵者若不能破解签名信息，就无法篡改第一摘要信息，信息系统的安全性较高。
207、SoC将签名信息写入flash。
SoC对第一摘要信息进行签名，得到签名信息后，将签名信息写入flash。用于在目标软件启动时，确认目标软件信息没有被篡改。
本实施例提供了一种安全信息配置方法，包括：生成非对称性密钥对；将私钥写入SoC的eFuse中；对公钥进行加密；将加密后的公钥写入flash中保存；根据目标软件信息生成第一摘要信息；对第一摘要信息进行签名，得到签名信息；将签名信息写入flash。通过上述流程可以看出，本发明实施例中不包括安全芯片，信息系统的安全信息配置由处理器中固有的SoC来完成。由于本实施例中无需使用安全芯片，因而就节约了外购安全芯片的成本。且在进行安全性配置的时候，仅仅需要对flash与SoC进行配置，简化了安全配置的 流程。且由于负责安全管理的SoC位于处理器内部，处理器外界无法获知SoC中的私钥等安全信息，因此本发明实施例与现有技术中外置安全芯片相比，有着更高的安全性，降低了信息系统被入侵者攻破防线的可能。
图2所示的实施例给出了本发明实施例提供的安全信息配制方法的基本流程，下面的实施例将给出一种更为细化的安全信息配置方法，其基本步骤请参阅图3，主要包括：
301、SoC生成非对称性密钥对；
302、SoC将私钥写入SoC的eFuse中；
步骤301、302与步骤201、202基本相同，本实施例中不再赘述。
303、SoC对公钥进行加密；
本实施例中，SoC需要将公钥写入flash中，当公钥写入flash后，SoC外部就有可能获知该公钥。为了保证该公钥的安全性，SoC将公钥写入flash中前，需要对该公钥进行加密。SoC在后续的安全配置或安全验证过程中若需要使用该公钥，能够对加密后的公钥进行相应的解密操作得到公钥。
SoC对公钥加密的方法有很多，本实施例中不做限定。优选的，SoC可以根据私钥确定对称性密钥，并通过该对称性密钥对公钥进行加密。由于SoC外部无法获知私钥，因此根据私钥生成的对称性密钥仅有SoC可以获知，SoC外部无法破解。这样就提高了公钥的安全性。
更为优选的，由于私钥的二进制位数很长，为了简化对公钥加密的操作，减轻SoC的负担，SoC可以直接截取私钥的预置位域作为对称性密钥，如截取私钥的预置的低位比特或预置的高位比特等，SoC也可以通过其他方法来截取私钥的预置位域，此处不做限定。
当然，SoC也可以通过异或算法或其他算法根据私钥来生成该对称性密钥，本实施例中不做限定。
优选的，SoC可以通过安全引擎(SEC，Security Engine)来执行本步骤中确定对称性密钥、加密公钥等操作，也可以通过其他部件来执行本步骤中的操作，此处不做限定。
304、SoC将加密后的公钥写入flash中保存；
305、SoC获取flash中的目标软件信息，并根据该目标软件信息生成第一 摘要信息；
步骤304、305与步骤204、205基本相同，本实施例中不做限定。
其中，步骤305也可以位于步骤301至304中任意步骤之前，本实施例中不做限定。
306、SoC使用公钥或私钥对第一摘要信息进行签名，得到签名信息；
若第一摘要信息直接写入flash，则SoC外部的入侵者就有可能获知并篡改该第一摘要信息。为了保证该第一摘要信息的安全性与信息摘要方法的可靠性，SoC需要对第一摘要信息进行签名，得到签名信息。
SoC在步骤301中生成了非对称性密钥对，SoC可以使用该非对称性密钥对中的公钥或私钥对该第一摘要信息进行签名。其中，SoC无论是使用公钥还是使用私钥都可以实现对第一摘要信息进行签名，本实施例中不做限定。
其中，由于公钥经过加密保存在flash中，因此若SoC使用公钥对第一摘要信息进行签名，则需要获取flash中的加密后的公钥；对加密后的公钥进行解密，得到公钥；然后使用公钥对第一摘要信息进行签名。
其中，由于私钥被写入了SoC中的eFuse中，因此SoC可以直接使用私钥对第一摘要信息进行签名。
SoC对第一摘要信息进行签名，得到签名信息后，SoC外部的入侵者若不能破解签名信息，就无法篡改第一摘要信息，信息系统的安全性较高。
307、SoC将签名信息写入flash。
SoC对第一摘要信息进行签名，得到签名信息后，将签名信息写入flash。用于在目标软件启动时，确认目标软件信息没有被篡改。
308、SoC将eFuse的安全标识由非安全状态切换到安全状态。
本实施例中，eFuse中包括安全标识，该安全标识具有安全、或非安全两种状态，该安全标识用于控制目标软件的启动方式。其中，若安全标识为非安全状态，则目标软件在启动时直接启动，无需经过SoC的安全验证，这种启动方式由于没有经过安全验证，因此不能保证目标软件信息没有被篡改，安全性不好；若安全标识为安全状态，则该目标软件经过了SoC的安全验证后才能启动，这种启动方式能够保证目标软件信息没有被篡改，安全性较好。
优选的，该安全标识可以为eFuse中的一个比特位，该比特位为1时可以 用于表示安全状态，该比特位为0时可以用于表示非安全状态。当然，eFuse也可以用其他形式的安全标识表示安全、非安全两个状态，如两个预置的整数或其它形式，本实施例中不做限定。
本实施例中，当SoC将签名信息写入flash中后，SoC就完成了安全信息配置，可以在目标软件启动时进行安全验证。于是，SoC将eFuse的安全标识由非安全状态切换到安全状态，这样目标软件就只能在经过了SoC的安全验证后才能启动，保证了信息系统的安全性。其中，SoC进行安全验证的方法将在后面的实施例中详述，本实施例中不做限定。
实际应用中，用户很可能需要启动多级的目标软件来获取服务。优选的，SoC可以根据本实施例提供的方法实现多级目标软件的安全信息配置。例如：用户想要在终端上打开“切水果”游戏，则该终端首先需要启动第一级目标软件，即终端底层系统；然后通过终端底层系统启动第二级目标软件，即安卓操作系统；最后通过安卓操作系统启动第三级目标软件，即“切水果”游戏。因此在进行安全信息配置时，SoC可以生成该三级目标软件中每一级目标软件的第一摘要信息与签名信息，并将该每一级的目标软件信息的签名信息保存在flash中。这样在进行安全验证的时候，SoC就可以使用每一级的目标软件的第一摘要信息来进行安全验证。通过多级安全配置，可以防止每一级的目标软件信息被任意修改，提高信息系统的安全性。
本实施例提供了一种安全信息配置方法，包括：生成非对称性密钥对；将私钥写入SoC的eFuse中；对公钥进行加密；将加密后的公钥写入flash中保存；根据目标软件信息生成第一摘要信息；对第一摘要信息进行签名，得到签名信息；将签名信息写入flash；将eFuse的安全标识由非安全状态切换到安全状态。通过上述流程可以看出，本发明实施例中不包括安全芯片，信息系统的安全信息配置由处理器中固有的SoC来完成。由于本实施例中无需使用安全芯片，因而就节约了外购安全芯片的成本。且在进行安全性配置的时候，仅仅需要对flash与SoC进行配置，简化了安全配置的流程。且由于负责安全管理的SoC位于处理器内部，处理器外界无法获知SoC中的私钥等安全信息。安全配置完成后，目标软件只能在经过SoC的安全验证后启动，因此本发明实施例与现有技术中外置安全芯片相比，有着更高的安全性，降低了信息系统被 入侵者攻破防线的可能。
为了便于理解上述实施例，下面将以上述实施例的一个具体应用场景为例进行描述。
处理器中的SoC与处理器外部的flash相连，进行安全配置。首先，SoC生成一对唯一的公钥与私钥，并将私钥写入eFuse中。
SoC截取私钥的最低32位比特作为对称性密钥，对公钥进行加密，并将加密后的公钥写入flash中保存。
SoC获取flash中的目标软件信息，并通过单项Hash函数对该目标软件信息进行处理，得到第一摘要信息。
SoC使用私钥对第一摘要信息进行签名，得到签名信息，并将签名信息写入flash。
SoC中包括有安全标识比特位，SoC将该安全标识比特位由0改写为1，之后目标软件只能在经过SoC的安全验证后从SoC中启动。
上述实施例给出了本发明提供的安全信息配置的基本方法，SoC根据上述方法完成安全信息配置后，就可以在目标软件启动时进行安全验证。为此，本发明实施例还提供了相关的安全验证方法，用于安全启动目标软件，请参阅图4，其基本流程包括：
401、SoC从flash中获取目标软件的签名信息；
本实施例采用信息摘要方法来确保目标软件信息不被篡改，信息摘要方法的基本原理如下：
通过单项Hash加密函数或其它算法对一个信息进行作用，可以得到该信息对应的摘要。摘要具有唯一性，即：相同的消息对应的摘要必定一致，不同的消息对应的摘要必定不同。因此，本实施例中从flash中目获取标软件的签名信息，根据签名信息得到第一摘要信息，然后根据目标软件信息生成第二摘要，通过比对第一摘要与第二摘要是否相同，就可以获知目标软件信息在安全信息配置后到目标软件启动前的时间段内，该目标软件信息是否被篡改。
因此，本步骤中，SoC从flash中获取目标软件的签名信息。
402、SoC使用非对称密钥对的公钥或私钥，对签名信息进行解密，得到第一摘要信息；
SoC获取了目标软件的签名信息后，对签名信息进行解密，得到第一摘要信息，该第一摘要信息为SoC在进行安全信息配置时，根据目标软件信息生成的摘要。
其中，SoC包括写入有非对称性密钥对的私钥的eFuse，SoC使用非对称密钥对的公钥或私钥对签名信息进行解密。
其中，SoC使用非对称密钥对的公钥或私钥对签名信息进行解密的方法有很多，主要需要和进行安全信息配置时对第一摘要信息的加密的方法相对应，具体将在后面的实施例中详述，本实施例中不做限定。
其中，SoC对签名信息进行解密后，可以临时保存该第一摘要信息，以便于SoC对第一摘要信息进行处理。具体的，SoC可以将该第一摘要信息加载到SoC中的SRAM中临时保存，或将该第一摘要信息加载到DDR中临时保存，本实施例中不做限定。
403、SoC获取flash中的目标软件信息，并根据目标软件信息生成第二摘要信息；
SoC获取flash中的目标软件信息，并根据目标软件信息生成第二摘要。可以理解的，生成第二摘要的算法，应该与在安全信息配置时生成第一摘要的算法相同，以保证根据相同的消息能生成相同的摘要。
优选的，SoC获取了flash中的目标软件信息后，可以临时保存该目标软件信息，以便于SoC对目标软件信息进行处理。具体的，SoC可以将该目标软件信息加载到SoC中的SRAM中临时保存，或将该目标软件信息加载到双倍速率同步动态随机存储器DDR中临时保存，本实施例中不做限定。其中，步骤403也可以位于步骤401或402之前，本实施例中不做限定。
404、若第一摘要信息与第二摘要信息相同，则SoC确认目标软件通过安全验证。
若第一摘要信息与第二摘要信息相同，则说明目标软件信息在安全信息配置后到目标软件启动前的时间段内没有被篡改，SoC确认目标软件通过安全验证，该目标软件可以被启动。
本实施例中，SoC从flash中获取目标软件的签名信息；对签名信息进行解密，得到第一摘要信息；获取flash中的目标软件信息，并根据目标软件信 息生成第二摘要信息；若第一摘要信息与第二摘要信息相同，则确认目标软件通过安全验证。通过上述流程可以看出，本实施例中不包括安全芯片，目标软件信息的安全验证由处理器中固有的SoC来完成。由于本发明实施例中无需使用安全芯片，因而就节约了外购安全芯片的成本，简化了安全验证的流程。且由于负责安全管理的SoC位于处理器内部，处理器外界无法获知SoC中的私钥等安全信息，进而无法对签名信息进行篡改，因此本发明实施例与现有技术中外置安全芯片相比，在安全验证时有着更高的安全性，降低了信息系统被入侵者攻破防线的可能。
其中，步骤402中，SoC对签名信息进行解密时，解密方法需要和进行安全信息配置时对第一摘要信息的加密的方法相对应。例如，若在进行安全信息配置时SoC使用公钥对第一摘要信息进行签名，则步骤402中，SoC使用私钥对签名信息进行解密即可；若在进行安全信息配置时SoC使用私钥对第一摘要信息进行签名，则步骤402中，SoC获取flash中的加密后的公钥、对加密后的公钥进行解密得到公钥、然后使用公钥对签名信息进行解密。SoC对签名信息进行解密也可以为其它方法，本申请中不做限定。
若SoC需要对加密后的公钥进行解密，优选的，SoC可以解密后得到的公钥写入SoC中的SRAM中或DDR中临时保存，以便于SoC使用该公钥。
优选的，为了提升信息系统的安全性，在进行安全信息配置时，SoC可以根据私钥确定对称性密钥，并通过该对称性密钥对公钥进行加密；在对加密后的公钥进行解密时，使用该对称性密钥进行解密即可。由于SoC外部无法获知私钥，因此根据私钥生成的对称性密钥仅有SoC可以获知，SoC外部无法破解。这样就提高了公钥的安全性。更为优选的，由于私钥的二进制位数很长，为了简化对公钥加密与解密的操作，减轻SoC的负担，SoC可以直接截取私钥的预置位域作为对称性密钥，如截取私钥的预置的低位比特或预置的高位比特等，通过其他方法来截取私钥的预置位域，此处不做限定。当然，SoC也可以通过异或算法或其他算法根据私钥来生成该对称性密钥，本申请中不做限定。
可以理解的，若步骤404中第一摘要信息与第二摘要信息不同同，则说明目标软件信息在安全信息配置后到目标软件启动前的时间段内被篡改，SoC确 认目标软件不通过安全验证。
现有的SoC芯片往往具有安全世界(Secure World)、普通世界(Normal World)两种模式，SoC芯片在处于安全世界模式时具有很高的安全特权，外界无权对安全世界中运行的程序进行修改。优选的，SoC在进行安全验证之前，将系统切换到安全世界，以保证在进行安全验证过程中信息不会被SoC外部的攻击者篡改。当SoC确定目标软件通过了安全验证后，优选的，SoC可以从安全世界切换到普通世界，在普通世界运行目标软件。
实际应用中，用户很可能需要启动多级的目标软件来获取服务。优选的，SoC可以根据本实施例提供的方法实现该多级目标软件的安全验证。例如：用户想要在终端上打开“切水果”游戏，则该终端首先需要启动第一级目标软件，即终端底层系统；然后通过终端底层系统启动第二级目标软件，即安卓操作系统；最后通过安卓操作系统启动第三级目标软件，即“切水果”游戏。因此在进行安全验证时，终端的SoC首先获取终端底层系统的第一摘要信息与第二摘要信息并比对是否相同，若不同则确认不通过安全验证，若相同则确认终端底层系统通过安全验证，SoC从无盘启动ROM接口(BootRom)中启动终端底层系统，并进行安卓操作系统的安全验证，以此类推。只有在每一级的目标软件的第一摘要信息与第二摘要信息都相同时，SoC才最终确定通过最高级的目标软件安全验证；只要在验证过程中有任何一级的目标软件的第一摘要信息与第二摘要信息不同，就无需进行下一级的安全验证，直接确定安全验证不通过。这样就可以防止目标软件信息被任意修改，提高信息系统的安全性。
为了便于理解上述实施例，下面将以上述实施例的一个具体应用场景为例进行描述。
处理器中的SoC与处理器外部的flash相连，并完成了安全配置。某时刻，SoC切换到安全世界模式，以对目标软件进行安全验证。
SoC在启动后，从flash中获取目标软件的签名信息，该签名信息由第一摘要信息经过SoC的私钥签名后得到。
私钥对应的公钥由私钥的低位比特后保存在flash中，SoC获取flash中的加密后的公钥，并截取私钥的最低32位比特作为对称性密钥，对加密后的公钥进行解密得到公钥。SoC使用公钥对签名信息进行解密，得到第一摘要信息。
SoC获取flash中的目标软件信息，并通过单项Hash函数对该目标软件信息进行处理，得到第二摘要信息。
由于第一摘要信息与第二摘要信息相同，则说明目标软件信息在安全信息配置后到目标软件启动前的时间段内没有被篡改，SoC确认目标软件通过安全验证。
本发明实施例还提供了相关的系统级芯片SoC，用于实现图2或图3所示的实施例中的安全信息配置方法，其基本结构请参阅图5，主要包括：
密钥生成模块501，用于生成非对称性密钥对，该非对称性密钥对包括公钥与私钥；
私钥保存模块502，用于将私钥写入SoC的电可编程熔丝eFuse中；
公钥加密模块503，用于对公钥进行加密；
公钥保存模块504，用于将加密后的公钥写入闪存flash中保存；
第一摘要生成模块505，用于获取flash中的目标软件信息，并根据目标软件信息生成第一摘要信息，目标软件信息用于启动目标软件；
第一摘要签名模块506，用于使用公钥或私钥对第一摘要信息进行签名，得到签名信息；
签名保存模块507，用于将签名信息写入所述flash。
本实施例提供了一种SoC，其中，密钥生成模块501生成非对称性密钥对；私钥保存模块502将私钥写入SoC的eFuse中；公钥加密模块503对公钥进行加密；公钥保存模块504将加密后的公钥写入flash中保存；第一摘要生成模块505根据目标软件信息生成第一摘要信息；第一摘要签名模块506对第一摘要信息进行签名，得到签名信息；签名保存模块507将签名信息写入flash。通过上述流程可以看出，本发明实施例提供的SoC就能够完成安全信息配置，无需采用额外的安全芯片，进而就节约了外购安全芯片的成本。且本申请提供的SoC在进行安全性配置的时候，仅仅对flash与SoC进行配置，简化了安全配置的流程。且由于负责安全管理的SoC位于处理器内部，处理器外界无法获知SoC中的私钥等安全信息，因此本发明实施例提供的SoC与现有技术中外置安全芯片相比，有着更高的安全性，能够降低信息系统被入侵者攻破防线的可能。
其中，由于第一摘要签名模块506使用公钥或私钥对第一摘要信息进行签名，得到签名信息，因此第一摘要签名模块506可以与私钥保存模块502相连，和/或，与公钥保存模块504相连。
图5所示的实施例给出了本发明实施例提供的SoC的基本结构，下面的实施例将给出一种更为细化的SoC，其基本结构请参阅图6，主要包括：
密钥生成模块601，用于生成非对称性密钥对，该非对称性密钥对包括公钥与私钥；
私钥保存模块602，用于将私钥写入SoC的电可编程熔丝eFuse中；
公钥加密模块603，用于对公钥进行加密；
优选的，该公钥加密模块具体可以用于：根据私钥确定对称性密钥，并通过对称性密钥加密公钥。
更为优选的，该公钥加密模块可以截取私钥的预置位域，作为对称性密钥，来对公钥进行加密。
公钥保存模块604，用于将加密后的公钥写入闪存flash中保存；
第一摘要生成模块605，用于获取flash中的目标软件信息，并根据目标软件信息生成第一摘要信息，目标软件信息用于启动目标软件；
第一摘要签名模块606，用于使用公钥或私钥对第一摘要信息进行签名，得到签名信息；
优选的，该第一摘要签名模块可以用于：获取flash中的加密后的公钥；对加密后的公钥进行解密，得到公钥；使用公钥对第一摘要信息进行签名；
或，
优选的，该第一摘要签名模块可以用于：使用私钥对第一摘要信息进行签名。
签名保存模块607，用于将签名信息写入所述flash；
其中，eFuse中包括安全标识，该安全标识具有安全、非安全两种状态，用于控制目标软件的启动方式，若安全标识为非安全状态，则目标软件的启动方式为：直接启动；若安全标识为安全状态，则目标软件的启动方式为：经过SoC的安全验证后启动。本实施例中的SoC还包括：
状态切换模块608，用于将eFuse的安全标识由非安全状态切换到安全状 态。
本实施例提供了一种SoC，其中，密钥生成模块601生成非对称性密钥对；私钥保存模块602将私钥写入SoC的eFuse中；公钥加密模块603对公钥进行加密；公钥保存模块604将加密后的公钥写入flash中保存；第一摘要生成模块605根据目标软件信息生成第一摘要信息；第一摘要签名模块606对第一摘要信息进行签名，得到签名信息；签名保存模块607将签名信息写入flash。通过上述流程可以看出，本发明实施例提供的SoC就能够完成安全信息配置，无需采用额外的安全芯片，进而就节约了外购安全芯片的成本。且本申请提供的SoC在进行安全性配置的时候，仅仅对flash与SoC进行配置，简化了安全配置的流程。且由于负责安全管理的SoC位于处理器内部，处理器外界无法获知SoC中的私钥等安全信息。安全配置完成后，状态切换模块608将eFuse的安全标识由非安全状态切换到安全状态，目标软件只能在经过SoC的安全验证后启动，因此本发明实施例提供的SoC与现有技术中外置安全芯片相比，有着更高的安全性，能够降低信息系统被入侵者攻破防线的可能。
为了便于理解上述实施例，下面将以上述实施例的一个具体应用场景为例进行描述。
处理器中的SoC与处理器外部的flash相连，进行安全配置。首先，密钥生成模块601生成一对唯一的公钥与私钥，私钥保存模块602将私钥写入eFuse中。
公钥加密模块603截取私钥的最低32位比特作为对称性密钥，对公钥进行加密，公钥保存模块604将加密后的公钥写入flash中保存。
第一摘要生成模块605获取flash中的目标软件信息，并通过单项Hash函数对该目标软件信息进行处理，得到第一摘要信息。
第一摘要签名模块606使用私钥对第一摘要信息进行签名，得到签名信息，签名保存模块607将签名信息写入flash。
SoC中包括有安全标识比特位，状态切换模块608将该安全标识比特位由0改写为1，之后目标软件只能在经过SoC的安全验证后从SoC中启动。
上面从单元化功能实体的角度对本发明实施例中的SoC进行了描述，下面从硬件处理的角度对本发明实施例中的SoC进行描述，请参阅图7，本发明 实施例中的SoC 700另一实施例包括：
输入装置701、输出装置702、处理器703和存储器704(其中SoC 700中的处理器703的数量可以一个或多个，图7中以一个处理器703为例)。在本发明的一些实施例中，输入装置701、输出装置702、处理器703和存储器704可通过总线或其它方式连接，其中，图7中以通过总线连接为例。
其中，通过调用存储器704存储的操作指令，处理器703用于执行如下步骤：
生成非对称性密钥对，所述非对称性密钥对包括公钥与私钥；将所述私钥写入所述SoC的电可编程熔丝eFuse中；对所述公钥进行加密；将加密后的所述公钥写入闪存flash中保存；获取所述flash中的目标软件信息，并根据所述目标软件信息生成第一摘要信息，所述目标软件信息用于启动目标软件；使用所述公钥或所述私钥对所述第一摘要信息进行签名，得到签名信息；将所述签名信息写入所述flash。
本发明的一些实施例中，处理器703还用于执行如下步骤：获取flash中的加密后的所述公钥；对所述加密后的所述公钥进行解密，得到所述公钥；使用所述公钥对所述第一摘要信息进行签名；或，使用所述私钥对所述第一摘要信息进行签名。
本发明的一些实施例中，处理器703还用于执行如下步骤：将所述eFuse的所述安全标识由非安全状态切换到安全状态。
本发明的一些实施例中，处理器703还用于执行如下步骤：根据所述私钥确定对称性密钥，并通过所述对称性密钥加密所述公钥。
本发明的一些实施例中，处理器703还用于执行如下步骤：所述公钥加密模块截取所述私钥的预置位域，作为所述对称性密钥。
本发明实施例还提供了相关的系统级芯片SoC，该SoC中包括有写入非对称性密钥对的私钥的eFuse，用于实现图4所示的实施例中的安全验证方法，其基本结构请参阅图8，主要包括：
签名获取模块801，用于从flash中获取目标软件信息的签名信息；
签名解密模块802，用于使用非对称性密钥对的公钥或私钥，对签名信息进行解密，得到第一摘要信息；
第二摘要生成模块803，用于获取flash中的目标软件信息，并根据目标软件信息生成第二摘要信息；
安全确定模块804，用于在第一摘要信息与第二摘要信息相同时，确认目标软件通过安全验证。
本实施例中，签名获取模块801从flash中获取目标软件的签名信息；签名解密模块802对签名信息进行解密，得到第一摘要信息；第二摘要生成模块803获取flash中的目标软件信息，并根据目标软件信息生成第二摘要信息；若第一摘要信息与第二摘要信息相同，则安全确定模块804确认目标软件通过安全验证。通过上述流程可以看出，本实施例提供的SoC能够完成安全验证，无需使用额外的安全芯片，进而就节约了外购安全芯片的成本，简化了安全验证的流程。且由于SoC位于处理器内部，处理器外界无法获知SoC中的私钥等安全信息，进而无法对签名信息进行篡改，因此本发明实施例提供的SoC与现有技术中外置安全芯片相比，在安全验证时有着更高的安全性与可靠性，降低了信息系统被入侵者攻破防线的可能。
优选的，签名解密模块802具体可以用于：使用私钥对签名信息进行解密；或，获取flash中的加密后的非对称性密钥对的公钥；对加密后的公钥进行解密，得到公钥；使用公钥对签名信息进行解密。
优选的，签名解密模块802具体可以用于：根据私钥确定对称性密钥，并通过对称性密钥对加密后的公钥进行解密。
更为优选的，签名解密模块802具体可以截取私钥的预置位域，作为对称性密钥。
为了便于理解上述实施例，下面将以上述实施例的一个具体应用场景为例进行描述。
处理器中的SoC与处理器外部的flash相连，并完成了安全配置。某时刻，SoC切换到安全世界模式，以对目标软件进行安全验证。
在SoC启动后，签名获取模块801从flash中获取目标软件的签名信息，该签名信息由第一摘要信息经过SoC的私钥签名后得到。
私钥对应的公钥由私钥的低位比特后保存在flash中，签名解密模块802获取flash中的加密后的公钥，并截取私钥的最低32位比特作为对称性密钥， 对加密后的公钥进行解密得到公钥。SoC使用公钥对签名信息进行解密，得到第一摘要信息。
第二摘要生成模块803获取flash中的目标软件信息，并通过单项Hash函数对该目标软件信息进行处理，得到第二摘要信息。
由于第一摘要信息与第二摘要信息相同，则说明目标软件信息在安全信息配置后到目标软件启动前的时间段内没有被篡改，安全确定模块804确认目标软件通过安全验证。
上面从单元化功能实体的角度对本发明实施例中的SoC进行了描述，下面从硬件处理的角度对本发明实施例中的SoC进行描述，请仍参阅图7，本发明实施例中的SoC 700另一实施例包括：
输入装置701、输出装置702、处理器703和存储器704(其中SoC 700中的处理器703的数量可以一个或多个，图7中以一个处理器703为例)。在本发明的一些实施例中，输入装置701、输出装置702、处理器703和存储器704可通过总线或其它方式连接，其中，图7中以通过总线连接为例。
其中，通过调用存储器704存储的操作指令，处理器703用于执行如下步骤：
从所述flash中获取目标软件信息的签名信息；对所述签名信息进行解密，得到第一摘要信息；获取所述flash中的所述目标软件信息，并根据所述目标软件信息生成第二摘要信息；在所述第一摘要信息与所述第二摘要信息相同时，确认所述目标软件通过安全验证。
本发明的一些实施例中，处理器703还用于执行如下步骤：使用所述私钥对所述签名信息进行解密；或，获取flash中的加密后的所述非对称性密钥对的公钥；对所述加密后的公钥进行解密，得到所述公钥；使用所述公钥对所述签名信息进行解密。
本发明的一些实施例中，处理器703还用于执行如下步骤：根据所述私钥确定对称性密钥，并通过所述对称性密钥对所述加密后的公钥进行解密。
本发明的一些实施例中，处理器703还用于执行如下步骤：截取所述私钥的预置位域，作为所述对称性密钥。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述 的系统，模块和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
在本申请所提供的几个实施例中，应该理解到，所揭露的系统和方法，可以通过其它的方式实现。例如，以上所描述的系统实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，模块或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本发明各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现，也可以采用软件功能单元的形式实现。
所述集成的单元如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本发明的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的全部或部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本发明各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(ROM，Read-Only Memory)、随机存取存储器(RAM，Random Access Memory)、磁碟或者光盘等各种可以存储程序代码的介质。

Claims (27)

  1. 一种安全信息配置方法，其特征在于，包括：
    系统级芯片SoC生成非对称性密钥对，所述非对称性密钥对包括公钥与私钥；
    所述SoC将所述私钥写入所述SoC的电可编程熔丝eFuse中；
    所述SoC对所述公钥进行加密；
    所述SoC将加密后的所述公钥写入闪存flash中保存；
    所述SoC获取所述flash中的目标软件信息，并根据所述目标软件信息生成第一摘要信息，所述目标软件信息用于启动目标软件；
    所述SoC使用所述公钥或所述私钥对所述第一摘要信息进行签名，得到签名信息；
    所述SoC将所述签名信息写入所述flash。
  2. 根据权利要求1所述的安全信息配置方法，其特征在于，所述SoC使用所述公钥或所述私钥对所述第一摘要信息进行签名包括：
    所述SoC获取flash中的加密后的所述公钥；
    所述SoC对所述加密后的所述公钥进行解密，得到所述公钥；
    所述SoC使用所述公钥对所述第一摘要信息进行签名；
    或，
    所述SoC使用所述私钥对所述第一摘要信息进行签名。
  3. 根据权利要求1所述的安全信息配置方法，其特征在于，所述eFuse中包括安全标识，所述安全标识具有安全、非安全两种状态，所述安全标识用于控制所述目标软件的启动方式，若所述安全标识为非安全状态，则所述目标软件的启动方式为：直接启动；若所述安全标识为安全状态，则所述目标软件的启动方式为：经过SoC的安全验证后启动；
    所述方法在所述SoC将所述签名信息写入所述flash之后还包括：
    所述SoC将所述eFuse的所述安全标识由非安全状态切换到安全状态。
  4. 根据权利要求1至3中任一项所述的安全信息配制方法，其特征在于，所述SoC对所述公钥进行加密包括：
    所述SoC根据所述私钥确定对称性密钥，并通过所述对称性密钥加密所 述公钥。
  5. 根据权利要求4所述的安全信息配制方法，其特征在于，所述SoC根据所述私钥确定对称性密钥包括：
    所述SoC截取所述私钥的预置位域，作为所述对称性密钥。
  6. 一种安全验证方法，适用于系统级芯片SoC，其特征在于，所述SoC包括写入有非对称性密钥对的私钥的电可编程熔丝eFuse，所述安全验证方法包括：
    所述SoC从所述flash中获取目标软件信息的签名信息；
    所述SoC使用所述非对称性密钥对的公钥或所述私钥，对所述签名信息进行解密，得到第一摘要信息；
    所述SoC获取所述flash中的所述目标软件信息，并根据所述目标软件信息生成第二摘要信息；
    若所述第一摘要信息与所述第二摘要信息相同，则所述SoC确认所述目标软件通过安全验证。
  7. 根据权利要求6所述的安全验证方法，其特征在于，所述SoC对所述签名信息进行解密包括：
    所述SoC使用所述私钥对所述签名信息进行解密；
    或，
    所述SoC获取flash中的加密后的所述非对称性密钥对的公钥；
    所述SoC对所述加密后的公钥进行解密，得到所述公钥；
    所述SoC使用所述公钥对所述签名信息进行解密。
  8. 根据权利要求7所述的安全验证方法，其特征在于，所述SoC对所述加密后的公钥进行解密，得到所述公钥包括：
    所述SoC根据所述私钥确定对称性密钥，并通过所述对称性密钥对所述加密后的公钥进行解密。
  9. 根据权利要求8所述的安全验证方法，其特征在于，所述SoC根据所述私钥确定对称性密钥包括：
    所述SoC截取所述私钥的预置字段，作为所述对称性密钥。
  10. 一种系统级芯片SoC，其特征在于，包括：
    密钥生成模块，用于生成非对称性密钥对，所述非对称性密钥对包括公钥与私钥；
    私钥保存模块，用于将所述私钥写入所述SoC的电可编程熔丝eFuse中；
    公钥加密模块，用于对所述公钥进行加密；
    公钥保存模块，用于将加密后的所述公钥写入闪存flash中保存；
    第一摘要生成模块，用于获取所述flash中的目标软件信息，并根据所述目标软件信息生成第一摘要信息，所述目标软件信息用于启动目标软件；
    第一摘要签名模块，用于使用所述公钥或所述私钥对所述第一摘要信息进行签名，得到签名信息；
    签名保存模块，用于将所述签名信息写入所述flash。
  11. 根据权利要求10所述的SoC，其特征在于，所述第一摘要签名模块具体用于：
    获取flash中的加密后的所述公钥；
    对所述加密后的所述公钥进行解密，得到所述公钥；
    使用所述公钥对所述第一摘要信息进行签名；
    或，
    使用所述私钥对所述第一摘要信息进行签名。
  12. 根据权利要求10所述的SoC，其特征在于，所述eFuse中包括安全标识，所述安全标识具有安全、非安全两种状态，所述安全标识用于控制所述目标软件的启动方式，若所述安全标识为非安全状态，则所述目标软件的启动方式为：直接启动；若所述安全标识为安全状态，则所述目标软件的启动方式为：经过SoC的安全验证后启动；
    所述SoC还包括：
    状态切换模块，用于将所述eFuse的所述安全标识由非安全状态切换到安全状态。
  13. 根据权利要求10至12中任一项所述的SoC，其特征在于，所述公钥加密模块具体用于：
    根据所述私钥确定对称性密钥，并通过所述对称性密钥加密所述公钥。
  14. 根据权利要求13所述的SoC，其特征在于，所述根据所述私钥确定 对称性密钥包括：
    截取所述私钥的预置位域，作为所述对称性密钥。
  15. 一种SoC，其特征在于，所述SoC包括写入有非对称性密钥对的私钥的电可编程熔丝eFuse，所述SoC包括：
    签名获取模块，用于从所述flash中获取目标软件信息的签名信息；
    签名解密模块，用于使用所述非对称性密钥对的公钥或所述私钥，对所述签名信息进行解密，得到第一摘要信息；
    第二摘要生成模块，用于获取所述flash中的所述目标软件信息，并根据所述目标软件信息生成第二摘要信息；
    安全确定模块，用于在所述第一摘要信息与所述第二摘要信息相同时，确认所述目标软件通过安全验证。
  16. 根据权利要求15所述的SoC，其特征在于，所述签名解密模块具体用于：
    使用所述私钥对所述签名信息进行解密；
    或，
    获取flash中的加密后的所述非对称性密钥对的公钥；
    对所述加密后的公钥进行解密，得到所述公钥；
    使用所述公钥对所述签名信息进行解密。
  17. 根据权利要求16所述的SoC，其特征在于，所述对所述加密后的公钥进行解密，得到所述公钥包括：
    根据所述私钥确定对称性密钥，并通过所述对称性密钥对所述加密后的公钥进行解密。
  18. 根据权利要求17所述的安全验证方法，其特征在于，所述根据所述私钥确定对称性密钥包括：
    截取所述私钥的预置位域，作为所述对称性密钥。
  19. 一种SoC，包括输入装置、输出装置、处理器和存储器，其特征在于，通过调用存储器存储的操作指令，所述处理器用于执行如下步骤：
    生成非对称性密钥对，所述非对称性密钥对包括公钥与私钥；
    将所述私钥写入所述SoC的电可编程熔丝eFuse中；
    对所述公钥进行加密；
    将加密后的所述公钥写入闪存flash中保存；
    获取所述flash中的目标软件信息，并根据所述目标软件信息生成第一摘要信息，所述目标软件信息用于启动目标软件；
    使用所述公钥或所述私钥对所述第一摘要信息进行签名，得到签名信息；
    将所述签名信息写入所述flash。
  20. 根据权利要求19所述的SoC，其特征在于，所述处理器还用于：
    获取flash中的加密后的所述公钥；
    对所述加密后的所述公钥进行解密，得到所述公钥；
    使用所述公钥对所述第一摘要信息进行签名；
    或，
    使用所述私钥对所述第一摘要信息进行签名。
  21. 根据权利要求19所述的SoC，其特征在于，所述eFuse中包括安全标识，所述安全标识具有安全、非安全两种状态，所述安全标识用于控制所述目标软件的启动方式，若所述安全标识为非安全状态，则所述目标软件的启动方式为：直接启动；若所述安全标识为安全状态，则所述目标软件的启动方式为：经过SoC的安全验证后启动；
    所述处理器还用于：
    将所述eFuse的所述安全标识由非安全状态切换到安全状态。
  22. 根据权利要求19至21中任一项所述的SoC，其特征在于，所述处理器还用于：
    根据所述私钥确定对称性密钥，并通过所述对称性密钥加密所述公钥。
  23. 根据权利要求22所述的SoC，其特征在于，所述处理器还用于：
    截取所述私钥的预置位域，作为所述对称性密钥。
  24. 一种SoC，包括输入装置、输出装置、处理器、存储器和写入有非对称性密钥对的私钥的电可编程熔丝eFuse，其特征在于，通过调用存储器存储的操作指令，所述处理器用于执行如下步骤：
    从所述flash中获取目标软件信息的签名信息；
    使用所述非对称性密钥对的公钥或所述私钥，对所述签名信息进行解密， 得到第一摘要信息；
    获取所述flash中的所述目标软件信息，并根据所述目标软件信息生成第二摘要信息；
    若所述第一摘要信息与所述第二摘要信息相同，则确认所述目标软件通过安全验证。
  25. 根据权利要求24所述的SoC，其特征在于，所述处理器还用于：
    使用所述私钥对所述签名信息进行解密；
    或，
    获取flash中的加密后的所述非对称性密钥对的公钥；
    对所述加密后的公钥进行解密，得到所述公钥；
    使用所述公钥对所述签名信息进行解密。
  26. 根据权利要求25所述的SoC，其特征在于，所述处理器还用于：
    根据所述私钥确定对称性密钥，并通过所述对称性密钥对所述加密后的公钥进行解密。
  27. 根据权利要求26所述的SoC，其特征在于，所述处理器还用于：
    截取所述私钥的预置位域，作为所述对称性密钥。
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