WO2016007733A1 - Gas phase oxide removal and passivation of germainium-containing semiconductors and compound semiconductors - Google Patents

Gas phase oxide removal and passivation of germainium-containing semiconductors and compound semiconductors Download PDF

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Publication number
WO2016007733A1
WO2016007733A1 PCT/US2015/039726 US2015039726W WO2016007733A1 WO 2016007733 A1 WO2016007733 A1 WO 2016007733A1 US 2015039726 W US2015039726 W US 2015039726W WO 2016007733 A1 WO2016007733 A1 WO 2016007733A1
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semiconductor
substrate
gas
germanium
compound semiconductor
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French (fr)
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Richard H. Gaylord
Joel Barnett
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Tokyo Electron Ltd
Tokyo Electron US Holdings Inc
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Tokyo Electron Ltd
Tokyo Electron US Holdings Inc
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Priority to KR1020177003519A priority Critical patent/KR102389744B1/en
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/68Organic materials, e.g. photoresists
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34Deposited materials, e.g. layers
    • H10P14/3402Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411Silicon, silicon germanium or germanium
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H10P14/6529Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour
    • H10P14/6532Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour by exposure to a plasma
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H10P14/6536Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to radiation, e.g. visible light
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00Cleaning of wafers, substrates or parts of devices
    • H10P70/10Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H10P70/12Cleaning before device manufacture, i.e. Begin-Of-Line process by dry cleaning only
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90Thermal treatments, e.g. annealing or sintering

Definitions

  • the present invention generally relates to a method of manufacturing a semiconductor device, and more particularly to a method of passivating surfaces of germanium-containing semiconductors and compound semiconductors during semiconductor device manufacturing.
  • III-V materials such as GaAs, InGaAs, etc.
  • processing steps in semiconductor device manufacturing require that oxides that grow or are deposited on III-V materials be removed.
  • oxide-free III-V surfaces there is a need for the clean, oxide-free III-V surfaces to be passivated so that a reasonable amount of time can pass between removing the oxide and further processing, without significant oxide regrowth on the surfaces.
  • a method for gas phase oxide removal and passivation of germanium-containing semiconductors and compound semiconductors are disclosed in various embodiments.
  • a method for processing a semiconductor substrate.
  • the method includes providing a substrate containing a germanium-containing semiconductor or a compound semiconductor, and exposing the substrate to a process gas containing a sulfur-containing gas and a nitrogen-containing gas to passivate a surface of the germanium-containing semiconductor or the compound semiconductor with sulfur.
  • the germanium-containing semiconductor or the compound semiconductor has an oxidized layer thereon and the exposing to the process gas removes the oxidized layer from the substrate and passivates a surface of the germanium-containing semiconductor or the compound semiconductor with sulfur.
  • the method includes providing a substrate containing a germanium-containing semiconductor or a compound semiconductor, where the germanium-containing semiconductor or the compound semiconductor has an oxidized layer thereon, and treating the substrate with hydrogen fluoride (HF) gas and ammonia (NH 3 ) gas to remove the oxidized layer from the substrate.
  • the method further includes exposing the substrate to a process gas containing a sulfur-containing gas and a nitrogen-containing gas to passivate a surface of the germanium-containing semiconductor or compound semiconductor with sulfur.
  • FIGs. 1A-1C schematically show a process flow for processing a semiconductor substrate according to an embodiment of the invention
  • FIGs. 2A-2C schematically show a process flow for processing a semiconductor substrate according to another embodiment of the invention.
  • FIGs. 3A-3E schematically show a process flow for processing a semiconductor substrate according to yet another embodiment of the invention.
  • a method for processing a semiconductor substrate.
  • the method includes providing a substrate containing a germanium-containing semiconductor or a compound semiconductor, and exposing the substrate to a process gas containing a sulfur-containing gas and a nitrogen-containing gas to passivate a surface of the germanium-containing semiconductor or the compound semiconductor with sulfur.
  • the germanium-containing semiconductor or the compound semiconductor has an oxidized layer thereon and the exposing to the process gas removes the oxidized layer from the substrate and passivates a surface of the germanium-containing semiconductor or the compound semiconductor with sulfur.
  • Liquid ammonium sulfide, (NFL ⁇ S) is an etchant for native oxide on GaAs, and treatment of a GaAs surface by liquid ammonium sulfide passivates a bare (oxide free) GaAs surface. Removal of surface oxidation and subsequent surface passivation can be been done using a sulfur-containing solution (e.g., liquid (NFL ⁇ S), or a multistep combination of another liquid chemical (e.g., HC1) and a sulfur containing chemical.
  • a sulfur-containing solution e.g., liquid (NFL ⁇ S)
  • HC1 another liquid chemical
  • the inventors have realized that gas exposure methods with no liquid present are required to achieve oxide removal and/or passivation of semiconductor surfaces. This is in part due to increasingly more demanding requirements for good process control as critical dimensions (CDs) of device features become smaller and smaller.
  • FIGs. 1A- 1 C schematically show a process flow for processing a semiconductor substrate according to an embodiment of the invention.
  • FIG. 1A shows a substrate 100 that can contain a germanium-containing semiconductor or a compound semiconductor.
  • the substrate 100 can contain or consist of germanium (Ge).
  • the substrate 100 may contain Si x Gei_ x compounds, where x is the atomic fraction of Si, 1 -x is the atomic fraction of Ge, and 0 ⁇ x ⁇ 1.
  • Exemplary Si x Gei_ x compounds include Sio.iGeo.9, Sio.2Ge 0 .8, Si 0 .3Ge 0 .7, Si 0 .4Ge 0 .6, Si 0 .5Ge 0 .5, Si 0 .6Ge 0 .4, Si 0 .7Ge 0 .3, Si 0 .8Ge 0 .2, and Si 0 .9Ge 0 .i.
  • the substrate 100 can include a compressive-strained Ge layer or a tensile- strained Si x Gei_x (x>0.5) deposited on a relaxed Sio.sGeo.s buffer layer.
  • the substrate 100 can include a compound semiconductor that contains or consists of a III-V semiconductor, a II-IV semiconductor, or a II-VI semiconductor, or a combination thereof.
  • a compound semiconductor that contains or consists of a III-V semiconductor, a II-IV semiconductor, or a II-VI semiconductor, or a combination thereof. Examples include GaAs, InGaAs, and AlGalnP.
  • a surface 101 of the substrate 100 is exposed to a process gas containing a sulfur-containing gas 103 (e.g., H2S) and a nitrogen-containing gas 102 (e.g., NH 3 ).
  • a sulfur-containing gas 103 e.g., H2S
  • a nitrogen-containing gas 102 e.g., NH 3
  • the sulfur-containing gas can include i1 ⁇ 4S, SO 3 , or SF 6 , or a combination thereof.
  • the nitrogen-containing gas can include NH 3 , N 2 , or N2H4, or a combination thereof.
  • the exposing to the process gas can include a non-plasma process.
  • the exposing to the process gas can include a light activated process (e.g., UV light), a plasma activated process, or a process that creates chemically reactive free radicals.
  • the method can further include heat-treating the substrate 100 during or following the exposing to sublime one or more by-product materials formed on a surface of the germanium-containing semiconductor or the compound semiconductor.
  • Exemplary processing conditions for exposing the substrate 100 to the process gas include a substrate temperature between 20°C and 150°C, a partial pressure between lmTorr and 3000mTorr for the sulfur-containing gas, a partial pressure between lmTorr and 3000mTorr for the nitrogen-containing gas, and a total gas pressure between 20mTorr and 5000mTorr for the process gas.
  • the process gas can include a diluent gas (e.g., Ar), where a dilution ratio for diluent gas/sulfur-containing gas can be between 0 and 1000.
  • the exposure to the process gas passivates the surface 101 of the germanium-containing semiconductor or the compound semiconductor with sulfur 104.
  • This surface passivation hinders subsequent oxidation of the surface 101 by the sulfur 104 occupying adsorption sites on the surface 101.
  • the sulfur 104 may be removed from the surface 101 prior to performing additional device processing, for example by heat-treating the substrate 100 to desorb the sulfur 104. Additionally, or alternatively, the substrate 100 may be subjected to a plasma treatment to remove the sulfur 104 from the surface 101.
  • the method includes providing a substrate containing a germanium-containing semiconductor or a compound semiconductor, where the germanium-containing semiconductor or compound semiconductor has an oxidized layer thereon.
  • the method further includes treating the substrate with hydrogen fluoride gas and ammonia gas to remove the oxidized layer from the substrate, and thereafter, exposing the substrate to a process gas containing a sulfur-containing gas and a nitrogen-containing gas that passivates a surface of the germanium-containing semiconductor or the compound semiconductor with sulfur.
  • FIGs. 2A-2C schematically show a process flow for processing a semiconductor substrate according to another embodiment of the invention.
  • the embodiment described in FIGs. 2A-2C is similar to the embodiment described in FIGs. 1A-1C but, as depicted in FIG. 2A, the substrate 200 further contains an oxidized layer 205 formed on a surface 201.
  • the oxidized layer 205 can include an oxidized form of the substrate 200 (e.g., SiGeO x ) or a material deposited on the substrate 200.
  • the oxidized layer 205 is exposed to a process gas containing a sulfur- containing gas 203 (e.g., H2S) and a nitrogen-containing gas 202 (e.g., NH 3 ).
  • a sulfur- containing gas 203 e.g., H2S
  • a nitrogen-containing gas 202 e.g., NH 3
  • the exposure of the process gas removes the oxidized layer 205 and passivates the surface 201 of the germanium-containing semiconductor or the compound semiconductor with sulfur 204.
  • FIGs. 3A-3E schematically show a process flow for processing a semiconductor substrate according to yet another embodiment of the invention.
  • the embodiment described in FIGs. 3A-3E is similar to the embodiment described in FIGs. 2A-2C and, as depicted in FIG. 3A, the substrate 300 contains an oxidized layer 305 formed on a surface 301.
  • the oxidized layer 305 can include an oxidized form of the substrate 300 (e.g., SiGeO x ) or a material deposited on the substrate 300.
  • the oxidized layer 305 is treated with hydrogen fluoride (HF) gas 307 and ammonia (NH 3 ) 306 gas to remove the oxidized layer 305 from the substrate 300.
  • HF hydrogen fluoride
  • NH 3 ammonia
  • Exemplary processing conditions can include a substrate temperature between 20°C and 150°C, a partial pressure between lmTorr and 3000mTorr for the HF gas, a partial pressure between lmTorr and 3000mTorr for the N3 ⁇ 4 gas, and a total gas pressure between 20mTorr and 5000mTorr for the process gas.
  • the process gas can include a diluent gas (e.g., Ar), where a dilution ratio of diluent gas/HF gas can be between 0 and 1000.
  • a diluent gas e.g., Ar
  • the substrate 300 may be heat-treated during or following the treating with the HF gas 307 and N3 ⁇ 4 gas 306 to sublime one or more by-product materials formed on the surface 301.
  • the surface 301 is exposed to a process gas containing a sulfur-containing gas 303 (e.g., 3 ⁇ 4S) and a nitrogen-containing gas 302 (e.g., NH3).
  • a sulfur-containing gas 303 e.g., 3 ⁇ 4S
  • a nitrogen-containing gas 302 e.g., NH3
  • CertasTM and Certas WINGTM tools include chemical oxide removal (COR) units.
  • COR units may be used in a process that uses N3 ⁇ 4 and HF or NH3 and H2S as a process gas to strip a native oxide from a GaAs surface and passivate the stripped surface with sulfur.
  • a post-COR type process may be applied and may comprise a post heat treatment (PHT) to sublime by-products formed on the substrate during the COR type process.
  • the PHT system may be carried out over a range of temperatures, for example, from about 100°C to about 300°C, and at a process pressure between about lmTorr to about 1 Torr.

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Abstract

A method for gas phase oxide removal and passivation of germanium-containing semiconductors and compound semiconductors are disclosed in various embodiments. According to one embodiment of the invention, a method is provided for processing a semiconductor substrate. The method includes providing a substrate containing a germanium-containing semiconductor or a compound semiconductor, and exposing the substrate to a process gas containing a sulfur-containing gas and a nitrogen-containing gas that passivates a surface of the germanium-containing semiconductor or the compound semiconductor with sulfur. According to another embodiment, the germanium-containing semiconductor or the compound semiconductor has an oxidized layer thereon and the exposing to the process gas removes the oxidized layer from the substrate. According to another embodiment, the substrate may be treated with hydrogen fluoride (HF) gas and ammonia (NH3) gas to remove the oxidized layer from the substrate before passivating the germanium-containing semiconductor or compound semiconductor with sulfur.

Description

GAS PHASE OXIDE REMOVAL AND PASSIVATION OF GERMAINIUM- CONTAINING SEMICONDUCTORS AND COMPOUND SEMICONDUCTORS
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application is related to and claims priority to United States Provisional Patent Application serial no. 62/022,827 filed on July 10, 2014, the entire contents of which are herein incorporated by reference.
FIELD OF THE INVENTION
[0002] The present invention generally relates to a method of manufacturing a semiconductor device, and more particularly to a method of passivating surfaces of germanium-containing semiconductors and compound semiconductors during semiconductor device manufacturing.
BACKGROUND OF THE INVENTION
[0003] Semiconductor devices with a high-mobility channel, such as Ge and III-V semiconductors, offer the possibility of increased device performance beyond traditional Si- based devices. In particular, III-V materials such as GaAs, InGaAs, etc., are attractive candidates due to their lower effective mass and higher mobility for charge carriers compared to Si. Various processing steps in semiconductor device manufacturing require that oxides that grow or are deposited on III-V materials be removed. Also, there is a need for the clean, oxide-free III-V surfaces to be passivated so that a reasonable amount of time can pass between removing the oxide and further processing, without significant oxide regrowth on the surfaces.
SUMMARY OF THE INVENTION
[0004] A method for gas phase oxide removal and passivation of germanium-containing semiconductors and compound semiconductors are disclosed in various embodiments.
[0005] According to one embodiment of the invention, a method is provided for processing a semiconductor substrate. The method includes providing a substrate containing a germanium-containing semiconductor or a compound semiconductor, and exposing the substrate to a process gas containing a sulfur-containing gas and a nitrogen-containing gas to passivate a surface of the germanium-containing semiconductor or the compound semiconductor with sulfur. According to one embodiment, the germanium-containing semiconductor or the compound semiconductor has an oxidized layer thereon and the exposing to the process gas removes the oxidized layer from the substrate and passivates a surface of the germanium-containing semiconductor or the compound semiconductor with sulfur.
[0006] According to another embodiment, the method includes providing a substrate containing a germanium-containing semiconductor or a compound semiconductor, where the germanium-containing semiconductor or the compound semiconductor has an oxidized layer thereon, and treating the substrate with hydrogen fluoride (HF) gas and ammonia (NH3) gas to remove the oxidized layer from the substrate. The method further includes exposing the substrate to a process gas containing a sulfur-containing gas and a nitrogen-containing gas to passivate a surface of the germanium-containing semiconductor or compound semiconductor with sulfur.
BRIEF DESCRIPTION OF THE DRAWINGS
[0007] A more complete appreciation of the invention and many of the attendant advantages thereof will be readily obtained as the same becomes better understood by reference to the following detailed description when considered in connection with the accompanying drawings, wherein:
[0008] FIGs. 1A-1C schematically show a process flow for processing a semiconductor substrate according to an embodiment of the invention;
[0009] FIGs. 2A-2C schematically show a process flow for processing a semiconductor substrate according to another embodiment of the invention; and
[0010] FIGs. 3A-3E schematically show a process flow for processing a semiconductor substrate according to yet another embodiment of the invention.
DETAILED DESCRIPTION OF SEVERAL EMBODIMENTS
[0011] According to one embodiment of the invention, a method is provided for processing a semiconductor substrate. The method includes providing a substrate containing a germanium-containing semiconductor or a compound semiconductor, and exposing the substrate to a process gas containing a sulfur-containing gas and a nitrogen-containing gas to passivate a surface of the germanium-containing semiconductor or the compound semiconductor with sulfur. According to one embodiment, the germanium-containing semiconductor or the compound semiconductor has an oxidized layer thereon and the exposing to the process gas removes the oxidized layer from the substrate and passivates a surface of the germanium-containing semiconductor or the compound semiconductor with sulfur.
[0012] Liquid ammonium sulfide, (NFL^S, is an etchant for native oxide on GaAs, and treatment of a GaAs surface by liquid ammonium sulfide passivates a bare (oxide free) GaAs surface. Removal of surface oxidation and subsequent surface passivation can be been done using a sulfur-containing solution (e.g., liquid (NFL^S), or a multistep combination of another liquid chemical (e.g., HC1) and a sulfur containing chemical. The inventors have realized that gas exposure methods with no liquid present are required to achieve oxide removal and/or passivation of semiconductor surfaces. This is in part due to increasingly more demanding requirements for good process control as critical dimensions (CDs) of device features become smaller and smaller.
[0013] FIGs. 1A- 1 C schematically show a process flow for processing a semiconductor substrate according to an embodiment of the invention. FIG. 1A shows a substrate 100 that can contain a germanium-containing semiconductor or a compound semiconductor. The substrate 100 can contain or consist of germanium (Ge). According to one embodiment, the substrate 100 may contain SixGei_x compounds, where x is the atomic fraction of Si, 1 -x is the atomic fraction of Ge, and 0 < x < 1. Exemplary SixGei_x compounds include Sio.iGeo.9, Sio.2Ge0.8, Si0.3Ge0.7, Si0.4Ge0.6, Si0.5Ge0.5, Si0.6Ge0.4, Si0.7Ge0.3, Si0.8Ge0.2, and Si0.9Ge0.i. In one example, the substrate 100 can include a compressive-strained Ge layer or a tensile- strained SixGei_x (x>0.5) deposited on a relaxed Sio.sGeo.s buffer layer.
[0014] According to one embodiment, the substrate 100 can include a compound semiconductor that contains or consists of a III-V semiconductor, a II-IV semiconductor, or a II-VI semiconductor, or a combination thereof. Examples include GaAs, InGaAs, and AlGalnP.
[0015] In FIG. IB, a surface 101 of the substrate 100 is exposed to a process gas containing a sulfur-containing gas 103 (e.g., H2S) and a nitrogen-containing gas 102 (e.g., NH3).
According to one embodiment, the sulfur-containing gas can include i¼S, SO3, or SF6, or a combination thereof. According to one embodiment, the nitrogen-containing gas can include NH3, N2, or N2H4, or a combination thereof. According to one embodiment, the exposing to the process gas can include a non-plasma process. According to another embodiment, the exposing to the process gas can include a light activated process (e.g., UV light), a plasma activated process, or a process that creates chemically reactive free radicals. The method can further include heat-treating the substrate 100 during or following the exposing to sublime one or more by-product materials formed on a surface of the germanium-containing semiconductor or the compound semiconductor.
[0016] Exemplary processing conditions for exposing the substrate 100 to the process gas include a substrate temperature between 20°C and 150°C, a partial pressure between lmTorr and 3000mTorr for the sulfur-containing gas, a partial pressure between lmTorr and 3000mTorr for the nitrogen-containing gas, and a total gas pressure between 20mTorr and 5000mTorr for the process gas. The process gas can include a diluent gas (e.g., Ar), where a dilution ratio for diluent gas/sulfur-containing gas can be between 0 and 1000.
[0017] As depicted in FIG. 1C, the exposure to the process gas passivates the surface 101 of the germanium-containing semiconductor or the compound semiconductor with sulfur 104. This surface passivation hinders subsequent oxidation of the surface 101 by the sulfur 104 occupying adsorption sites on the surface 101. This results in slowed oxidation of the surface 101, which allows for increased time to elapse before significant oxide growth occurs on the surface 101. The sulfur 104 may be removed from the surface 101 prior to performing additional device processing, for example by heat-treating the substrate 100 to desorb the sulfur 104. Additionally, or alternatively, the substrate 100 may be subjected to a plasma treatment to remove the sulfur 104 from the surface 101.
[0018] According to another embodiment of the invention, the method includes providing a substrate containing a germanium-containing semiconductor or a compound semiconductor, where the germanium-containing semiconductor or compound semiconductor has an oxidized layer thereon. The method further includes treating the substrate with hydrogen fluoride gas and ammonia gas to remove the oxidized layer from the substrate, and thereafter, exposing the substrate to a process gas containing a sulfur-containing gas and a nitrogen-containing gas that passivates a surface of the germanium-containing semiconductor or the compound semiconductor with sulfur.
[0019] FIGs. 2A-2C schematically show a process flow for processing a semiconductor substrate according to another embodiment of the invention. The embodiment described in FIGs. 2A-2C is similar to the embodiment described in FIGs. 1A-1C but, as depicted in FIG. 2A, the substrate 200 further contains an oxidized layer 205 formed on a surface 201. The oxidized layer 205 can include an oxidized form of the substrate 200 (e.g., SiGeOx) or a material deposited on the substrate 200.
[0020] In FIG. 2B, the oxidized layer 205 is exposed to a process gas containing a sulfur- containing gas 203 (e.g., H2S) and a nitrogen-containing gas 202 (e.g., NH3). As depicted in FIG. 2C, the exposure of the process gas removes the oxidized layer 205 and passivates the surface 201 of the germanium-containing semiconductor or the compound semiconductor with sulfur 204.
[0021] FIGs. 3A-3E schematically show a process flow for processing a semiconductor substrate according to yet another embodiment of the invention. The embodiment described in FIGs. 3A-3E is similar to the embodiment described in FIGs. 2A-2C and, as depicted in FIG. 3A, the substrate 300 contains an oxidized layer 305 formed on a surface 301. The oxidized layer 305 can include an oxidized form of the substrate 300 (e.g., SiGeOx) or a material deposited on the substrate 300.
[0022] In FIG. 3B, the oxidized layer 305 is treated with hydrogen fluoride (HF) gas 307 and ammonia (NH3) 306 gas to remove the oxidized layer 305 from the substrate 300. Exemplary processing conditions can include a substrate temperature between 20°C and 150°C, a partial pressure between lmTorr and 3000mTorr for the HF gas, a partial pressure between lmTorr and 3000mTorr for the N¾ gas, and a total gas pressure between 20mTorr and 5000mTorr for the process gas. The process gas can include a diluent gas (e.g., Ar), where a dilution ratio of diluent gas/HF gas can be between 0 and 1000. In one example, the substrate 300 may be heat-treated during or following the treating with the HF gas 307 and N¾ gas 306 to sublime one or more by-product materials formed on the surface 301.
[0023] As depicted in FIG. 3C, the exposure of the removes the oxidized layer 305 from the surface 301.
[0024] Thereafter, as shown in FIG. 3D, the surface 301 is exposed to a process gas containing a sulfur-containing gas 303 (e.g., ¾S) and a nitrogen-containing gas 302 (e.g., NH3). As depicted in FIG. 3E, the exposure to the process gas passivates the surface 301 with sulfur 304.
[0025] Semiconductor manufacturing equipment such as the Certas™ and Certas WING™ available from Tokyo Electron Limited, Akasaka, Japan, may be used for performing the gas exposure processes described in embodiments of the invention. These manufacturing equipment are single wafer processing tools, however it is also possible to perform the gas exposure processes in a batch configuration where multiple substrates are simultaneously processed.
[0026] Certas™ and Certas WING™ tools include chemical oxide removal (COR) units. COR units may be used in a process that uses N¾ and HF or NH3 and H2S as a process gas to strip a native oxide from a GaAs surface and passivate the stripped surface with sulfur. A post-COR type process may be applied and may comprise a post heat treatment (PHT) to sublime by-products formed on the substrate during the COR type process. The PHT system may be carried out over a range of temperatures, for example, from about 100°C to about 300°C, and at a process pressure between about lmTorr to about 1 Torr.
[0027] A plurality of embodiments for gas phase oxide removal and passivation of germanium-containing semiconductors and compound semiconductors have been disclosed in various embodiments. The foregoing description of the embodiments of the invention has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise forms disclosed. This description and the claims following include terms that are used for descriptive purposes only and are not to be construed as limiting.
[0028] Persons skilled in the relevant art can appreciate that many modifications and variations are possible in light of the above teaching. Persons skilled in the art will recognize various equivalent combinations and substitutions for various components shown in the
Figures. It is therefore intended that the scope of the invention be limited not by this detailed description, but rather by the claims appended hereto.

Claims

What is claimed is:
1. A method for forming a semiconductor device, the method comprising:
providing a substrate containing a germanium-containing semiconductor or a compound semiconductor; and
exposing the substrate to a process gas containing a sulfur-containing gas and a nitrogen-containing gas to passivate a surface of the germanium-containing
semiconductor or the compound semiconductor with sulfur.
2. The method of claim 1, wherein the germanium-containing semiconductor or the compound semiconductor has an oxidized layer thereon and the exposing removes the oxidized layer from the substrate.
3. The method of claim 2, wherein the oxidized layer includes an oxidized form of the germanium-containing semiconductor or the compound semiconductor, or a material deposited on the substrate.
4. The method of claim 1, wherein the sulfur-containing gas includes ¾S, SO3, or SF6, or a combination thereof.
5. The method of claim 1, wherein the nitrogen-containing gas includes NH3, N2, N2H4, or a combination thereof.
6. The method of claim 1, wherein the exposing includes a non-plasma process.
7. The method of claim 1, wherein the exposing includes a light activated process or a plasma activated process.
8. The method of claim 1, wherein the germanium-containing semiconductor is selected from the group consisting of Ge and SixGei_x compounds.
9. The method of claim 1, wherein the compound semiconductor is selected from the group consisting of a III-V semiconductor, a II-IV semiconductor, and a II- VI semiconductor.
10. The method of claim 1, wherein the compound semiconductor is selected from the group consisting of GaAs, InGaAs, and AlGalnP.
1 1. The method of claim 1 , wherein the germanium-containing semiconductor or the compound semiconductor has an oxidized layer thereon, the method further comprising treating the substrate with hydrogen fluoride gas and ammonia gas to remove the oxidized layer from the substrate.
12. The method of claim 1 1, further comprising
heat-treating the substrate during or following the treating.
13. The method of claim 1, further comprising
heat-treating the substrate during or following the exposing to sublime one or more by-product materials formed on a surface of the germanium-containing semiconductor or the compound semiconductor.
14. A method for forming a semiconductor device, the method comprising:
providing a substrate containing a germanium-containing semiconductor or a compound semiconductor, wherein the germanium-containing semiconductor or compound semiconductor has an oxidized layer thereon;
treating the substrate with hydrogen fluoride gas and ammonia gas to remove the oxidized layer from the substrate; and
thereafter, exposing the substrate to a process gas containing a sulfur-containing gas and a nitrogen-containing gas that passivates a surface of the germanium-containing semiconductor or the compound semiconductor with sulfur.
15. The method of claim 14, wherein the oxidized layer includes an oxidized form of the germanium-containing semiconductor or the compound semiconductor, or a material deposited on the substrate.
16. The method of claim 14, wherein the sulfur-containing gas includes ¾S, SO3, or SF6, or a combination thereof.
17. The method of claim 14, wherein the nitrogen-containing gas includes NH3, N2, N2H4, or a combination thereof.
18. The method of claim 14, wherein the germanium-containing semiconductor is selected from the group consisting of Ge and SixGei_x compounds.
19. The method of claim 14, wherein the compound semiconductor is selected from the group consisting of a III-V semiconductor, a II-IV semiconductor, and a II- VI semiconductor.
20. The method of claim 14, wherein the compound semiconductor is selected from the group consisting of GaAs, InGaAs, and AlGalnP.
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