WO2016004806A1 - 基于程序约束构建的多线程程序输出唯一性检测与证据生成方法 - Google Patents

基于程序约束构建的多线程程序输出唯一性检测与证据生成方法 Download PDF

Info

Publication number
WO2016004806A1
WO2016004806A1 PCT/CN2015/081055 CN2015081055W WO2016004806A1 WO 2016004806 A1 WO2016004806 A1 WO 2016004806A1 CN 2015081055 W CN2015081055 W CN 2015081055W WO 2016004806 A1 WO2016004806 A1 WO 2016004806A1
Authority
WO
WIPO (PCT)
Prior art keywords
constraint
program
thread
event
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2015/081055
Other languages
English (en)
French (fr)
Inventor
刘烃
张晓东
刘沛
俞乐晨
郑庆华
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xian Jiaotong University
Original Assignee
Xian Jiaotong University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xian Jiaotong University filed Critical Xian Jiaotong University
Publication of WO2016004806A1 publication Critical patent/WO2016004806A1/zh
Priority to US15/270,266 priority Critical patent/US20170010957A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Prevention of errors by analysis, debugging or testing of software
    • G06F11/3668Testing of software
    • G06F11/3672Test management
    • G06F11/3688Test management for test execution, e.g. scheduling of test suites
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Prevention of errors by analysis, debugging or testing of software
    • G06F11/3604Analysis of software for verifying properties of programs
    • G06F11/3608Analysis of software for verifying properties of programs using formal methods, e.g. model checking, abstract interpretation
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Prevention of errors by analysis, debugging or testing of software
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Prevention of errors by analysis, debugging or testing of software
    • G06F11/3668Testing of software
    • G06F11/3672Test management
    • G06F11/3692Test management for test results analysis

Definitions

  • the invention relates to the field of trusted software and software testing, in particular to a multi-threaded program output uniqueness detection and evidence generation method based on program constraint construction.
  • model checking finds the error state in the program by symbolizing the program state and traversing the entire state space.
  • the object of the present invention is to provide a method for generating uniqueness detection and evidence generation of a multi-threaded program based on program constraints, constructing a constraint expression according to multi-threaded program semantics, and verifying output uniqueness.
  • the problem translates into a constraint solving problem, using a constraint solver to detect the presence of different outputs and generating a counterexample execution path that illustrates the different outputs.
  • a multi-threaded program output uniqueness detection and evidence generation method based on program constraint construction comprising the following steps:
  • a further improvement of the present invention is that the stepping work in the step S1) is not performed on the source code or the binary level, but is performed on the bytecode level.
  • the specific implementation method is as follows: firstly, the multi-threaded program source code to be tested is to be tested. Converted to intermediate bytecode format, ie LLVM bytecode; then the statement with the monitoring function is implanted into the program under test; finally, the bytecode of the implanted monitoring code is linked into an executable program.
  • step S3) includes extracting shared variables to identify access points of public variables in the execution path and slices to remove execution statements unrelated to the verification attributes.
  • a further improvement of the invention consists in that the output variable is automatically identified in the step S4) and an output uniqueness verification condition ⁇ is constructed for it.
  • a further improvement of the present invention is that the multi-threaded program execution path constraint model F in the step S5) implies all possible interleaving sequences of the execution path, including five constraints: path expression, memory model constraint, read-write relationship constraint, and partial bias.
  • Order constraints and synchronous semantic constraints are defined as follows:
  • path expression describes the definition inside the thread - use the chain, and control the internal state transition of the thread
  • Memory model constraint indicates the relationship between statements and variables in the program, using the semantics of order consistency, and the order consistency specifies that the CPU executes the program according to the order of the statements in the code;
  • read-write relationship constraints define the definition between threads - use the chain, specify the value read by the shared variable, must come from the initial value and the most recent written value;
  • Partial order constraint define the timing relationship between the thread creation thread and the termination thread operation statement between the operated thread statements;
  • Synchronous semantic constraints define the timing relationship between synchronous control operation statements between threads;
  • the definition-use chain is: convert each thread sequence into SSA format. For each execution sequence of SSA format, removing the shared access point is a complete definition-use chain.
  • a further improvement of the present invention is that the method for constructing the multi-threaded program execution path constraint model F in the step S5) comprises the following operations:
  • e r is a read event
  • e w and e x are write events
  • v r and v w are variables operated by events e r and e w .
  • Meaning expressed in formula is, if the event e r v r v w values derived from the event e w, the first to meet the following e r e w, i.e. O (e w) ⁇ O ( e r); Then satisfy all writes either before e w or after e r ;
  • the calculation method of the synchronous semantic constraint includes two operations: lock/unlock and wait/signal:
  • lock/unlock operation is to construct a lock synchronization semantic constraint, requiring that in the lock/unlock set L of the same mutex, for any two lock/unlock event pairs: l i /u i and l k /u k Must meet the formula:
  • the lock pair l i /u i occurs either before the lock pair l k /u k or after it;
  • each wait operation must correspond to a signal operation, and a signal operation wakes up at most one
  • the wait operation makes the WT a set of all wait operations on the cond, so that the SG is a set of all signal operations on the cond.
  • the following formula must be used:
  • SG wt represents a set of signal operations that e wt can match, and e sg is any signal operation event in SG wt , using variables Whether it is equal to 1 to indicate whether e sg matches e wt .
  • Sub formula Indicates that for each wait operation e wt must have a signal operation to match it;
  • first(e c ) is the order of the first event of the thread created by e c
  • e j is the thread termination event
  • last(e j ) is the sequence of the end event of the thread ending with e j ;
  • a further improvement of the present invention is that in the step S6), the constraint model and the output uniqueness attribute condition are used, and the constraint solver is used to solve the attribute condition; if there are different outputs, a counterexample is generated to illustrate the triggering process of the different output.
  • a multi-threaded program constraint construction model is proposed to transform the output uniqueness verification problem of multi-threaded programs into a constraint solving problem.
  • This model is constructed constrained by program semantics.
  • the constructed expression contains all possible interleaving sequences, and the constraint solver is used to check whether all interleaving will produce different outputs.
  • Figure 1 is a general flow chart of the method of the present invention.
  • FIG. 2 is a flow chart of a multi-threaded program path constraint construction method.
  • an output uniqueness verification method based on multi-threaded program constraints includes the following steps:
  • Step S1 The monitoring code is implanted into the program to be tested to record the execution process of the program.
  • the code presented after the completion of the instrumentation is as follows;
  • the function clap_inst_pre is the inserted monitoring statement, and the next line of the statement is monitored. During the execution, the thread ID, the instruction ID, the status value, and the return value of the next line are output.
  • Step S3) Preprocessing the path to facilitate the constraint construction of S4), extracting global variable access points, including rows: 5, 6, 8, 9, 12, 13; converting the path into the SSA format. Thread 0 is converted to track 0, thread 1 is converted to track 1, and thread 2 is converted to track 2, as shown below:
  • the lower corners of the global variables x and y indicate read (r) or write (w), the upper corner distinguishes between different read or write operations, and the upper corner is marked as 0 to indicate initial assignment.
  • Step S5) Converting the state transition and the thread interleaving relationship in the execution path into a first-order logical expression of the infinite word according to the program execution semantics, and constructing the constraint model F of the execution path ⁇ , including the path expression, the memory model constraint, and the read-write relationship constraint. , partial order constraints, synchronous semantic constraints. Entire constraint model F Contains all possible interleaving sequences for the execution path. Specifically, as shown in FIG. 2, the corresponding logical expression is generated according to the following steps:
  • o(e i ) represents the permutation sequence number in the interleaved sequence of the i-th row.
  • e r is a read event
  • e w and e x are write events
  • v r and v w are variables operated by events e r and e w . Meaning expressed in formula is, if the event e r v r v w values derived from the event e w, the first to meet the following e r e w, i.e. O (e w) ⁇ O ( e r); Then all the writes must be met either before e w or after e r .
  • the reading and writing of the variable x may be listed.
  • the reading of the 5th line x is from the writing of the 0th line x, it should be satisfied: the 0th line is before the 5th line, and the 12th line is written to the x. Can't happen between the two.
  • the case of the y variable is similar to x.
  • the lock pair l i /u i either occurs before the lock pair l k /u k or occurs after it.
  • condition variable cond each wait operation must correspond to a signal operation, and a signal operation wakes up at most one wait operation.
  • WT be the set of all wait operations on cond
  • SG be the set of all signal operations on cond.
  • SG wt represents a set of signal operations that e wt can match, and e sg is any signal operation event in SG wt .
  • Sub formula Indicates that for each wait operation e wt must have a signal operation to match.
  • the constraint expression indicates that either thread 1 first acquires the lock: o 6 ⁇ o 7 , or thread 2 acquires the lock first: o 10 ⁇ o 3 .
  • first(e c ) is the order of the first event of the thread created by e c ;
  • e j is the thread termination event;
  • last(e j ) is the order of the end event of the thread waiting for e j .
  • the thread creation statement is O 2 , O 3 , and its partial order relationship is constrained as follows:
  • the constraint o(e 1 ) ⁇ o(e 5 ) indicates that the thread creation statement e 1 is executed before the first event e 5 of the created thread 1
  • the constraint o(e 10 ) ⁇ o(e 3 ) indicates that the thread waits Statement e 3 is executed after event e 10 at the end of thread 1.
  • Step S7) outputs the verification result and the reverse sequence.

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Debugging And Monitoring (AREA)
  • Devices For Executing Special Programs (AREA)

Abstract

一种基于程序约束构建的多线程程序输出唯一性检测与证据生成方法,根据多线程程序语义构建约束表达式,将输出唯一性验证问题转化为约束求解问题,采用约束求解器检测是否存在不同的输出,并生成说明不同输出的反例执行路径,首先,插桩被检测程序,执行此程序并得到执行路径;其次,根据多线程程序执行语义,将执行路径转化为无量词一阶逻辑表达式,此约束表达式涵盖所有可行的线程交织;然后,针对一次运行的输出结果,构建唯一性验证条件;最后,利用约束求解器验证是否存在一条路径使得输出值与运行结果不一致,本方法可以检测出在给定输入下,多线程程序的输出是否唯一;如果存在输出不唯一的情况,则展示出反例序列以说明其触发过程。

Description

基于程序约束构建的多线程程序输出唯一性检测与证据生成方法 技术领域
本发明涉及可信软件及软件测试领域,特别涉及一种基于程序约束构建的多线程程序输出唯一性检测与证据生成方法。
背景技术
随着多核处理器被普遍应用,编写性能与结构良好的多线程程序成为释放多核处理器潜能的重要途径。调试多线程程序中的隐晦错误成为当务之急。对于串行程序,同一输入,多次执行下输出必定唯一。但是同一输入下对,于多线程程序的多次执行,未必就能产生唯一的输出。因为多线程程序在每次执行过程中都可能会产生不同的线程交织,对程序的执行结果也会有不同的影响。所以,如何验证多线程程序的输出唯一性,是一个亟待解决的问题。
然而,验证多线程程序存在一定的难度,难以重现并行错误。多线程程序具有以下几个特征:1)用户难以控制所有线程之间的执行顺序;2)在调试器中使用插装技术或者断点调试方法会产生副作用,导致某些错误消失;3)由于操作系统与运行时环境的原因,导致错误发生的序列很少再次发生;4)线程交织导致的空间状态爆炸,例如,对于有n个线程,每个线程执行k指令的程序,其交织序列数量可达(nk)!/(k!)n>=(n!)k。即使在可控制线程调度的假设下,程序员也无法用穷举所有线程交织。
目前,对于多线程程序的测试与验证已有大量工作,其中包括不确定性测试与模型检验等。基于覆盖标准指导的不确定测试方法,通过检查每次执行中的覆盖标准集合以确定尚未覆盖的元素,向程序中插入随机延迟以增大下次执行中覆盖其他元素的可能性。此外,模型检验通过符号化程序状态以及遍历整个状态空间,以查找程序中的错误状态。虽然模型检验在一定程度解决了多线程程序的验证问题,但其具有状态空间爆炸问题,导致难以扩展 应用到大型复杂软件系统。
发明内容
为了克服上述现有技术的缺点,本发明的目的在于提供一种基于程序约束构建的多线程程序输出唯一性检测与证据生成方法,根据多线程程序语义构建约束表达式,将输出唯一性的验证问题转化为约束求解问题,采用约束求解器检测是否存在不同的输出,并生成说明不同输出的反例执行路径。
为了实现上述目的,本发明采用的技术方案是:
一种基于程序约束构建的多线程程序输出唯一性检测与证据生成方法,包括如下步骤:
S1)将监控代码植入待测程序,以记录程序的执行过程;
S2)在给定输入下,执行已插桩程序,生成路径记录文件;
S3)预处理执行路径以便于约束构建;
S4)在程序运行结尾处自动添加属性条件,针对多线程程序的运行输出,将输出唯一性条件ρ以assert的格式插入程序;
S5)根据程序执行语义将执行路径中状态转移、线程交织关系转化为无量词一阶逻辑表达式,构建蕴含了所有可能的交织序列的多线程程序执行路径约束模型F;
S6)针对唯一性条件ρ,利用约束求解器验证
Figure PCTCN2015081055-appb-000001
是否有解。
S7)如果有解,则表示存在多种不同的输出,并生成证据序列;如果无解,则表示此输出在此输入下唯一。
本发明进一步的改进在于:所述步骤S1)中插桩工作并非在源码或者二进制的层面上进行,而是在字节码的层面上完成,具体实施方法为:首先将待测多线程程序源码转化为中间字节码格式,即LLVM字节码;然后将具有监控功能的语句植入待测程序;最后将植入监控代码的字节码链接成可执行程序。
本发明进一步的改进在于:所述步骤S3)中预处理包括提取共享变量以识别出执行路径中公有变量的访问点以及切片以去除与验证属性无关的执行语句。
本发明进一步的改进在于:所述步骤S4)中自动识别出输出变量且对其构建输出唯一性验证条件ρ。
本发明进一步的改进在于:所述步骤S5)中多线程程序执行路径约束模型F蕴含了执行路径所有可能的交织序列,包括五种约束:路径表达式、内存模型约束、读写关系约束、偏序约束以及同步语义约束,定义分别如下:
1)路径表达式:描述线程内部的定义-使用链,以及控制线程内部状态转换;
2)内存模型约束:表示程序中语句、变量之间的关系,采用顺序一致性的语义,顺序一致性规定CPU按照代码中语句的顺序来执行程序;
3)读写关系约束:定义线程间的定义-使用链,规定共享变量所读取到的值,必须来自初始值以及最近的写值;
4)偏序约束:定义线程之间创建线程与终止线程操作语句于被操作线程语句之间的时序关系;
5)同步语义约束:定义线程之间同步控制操作语句之间的时序关系;
其中,定义-使用链为:将每一个线程序列转化为SSA格式,对于每一个SSA格式的执行序列,除去共享访问点都是一个完整的定义-使用链。
本发明进一步的改进在于:所述步骤S5)中多线程程序执行路径约束模型F的构建方法包括以下操作:
1)计算路径表达式,以控制线程内部状态转移;
2)计算内存模型约束,以线程内限制语句之间的关系;
3)计算读写关系约束,以建立线程间的定义-使用链;
4)计算同步语义约束,以定义线程间同步关系;
5)计算偏序约束,以描述线程创建与终止的语义;
最后,结合以上五种约束,构成约束模型F。
本发明进一步的改进在于:定义执行路径事件集合
Figure PCTCN2015081055-appb-000002
其中k为线程数量,Ti={e1,e2,…,en}作为线程i的执行序列,en表示Ti的第n个事件,O(en)表示事件en的顺序,n表示Ti的事件数量,则:
所述路径表达式的计算方法:
将每一个线程序列转化为SSA格式,类似于路径条件(Path Condition)的收集,直接将SSA格式序列转化为路径表达式;
所述内存模型约束的计算方法:
采用顺序一致性模型,所有操作完全按程序的顺序执行,线程内的事件顺序符合约束:
Figure PCTCN2015081055-appb-000003
其中ei与ei+1表示同一线程内连续的两个事件,τ表示所有线程序列;
所述读写关系约束的计算方法:
使共享变量的读来自于最近的写,对于同一共享变量v,令R作为所有对其进行读操作的事件集合,令W作为所有对其进行写操作的事件集合,给出以下公式:
Figure PCTCN2015081055-appb-000004
其中,er为读事件,ew与ex为写事件,vr和vw为事件er与ew所操作的变量。公式所表达的意思是,如果事件er中的vr取值来自于事件ew中的vw,首先要满足er在ew之后,即O(ew)<O(er);然后要满足所有的写要么在ew之前,要么在er之后;
所述同步语义约束的计算方法包括lock/unlock与wait/signal两类操作:
1)lock/unlock操作的目的为构建锁同步语义约束,要求在同一互斥锁的lock/unlock集合L中,对于任意两个lock/unlock事件对:li/ui与lk/uk,须满足公式:
Figure PCTCN2015081055-appb-000005
其中,锁对li/ui要么发生在锁对lk/uk之前,要么发生在其后;
2)wait/signal操作的目的是构建条件变量同步语义约束,要满足条件:每一个wait操作必须对应一个signal操作,而一个signal操作至多唤醒一个 wait操作,对于同一条件变量cond,令WT作为在cond上所有wait操作的集合,令SG作为在cond上所有signal操作的集合,如要满足之上的条件,须有以下公式:
Figure PCTCN2015081055-appb-000006
其中,ewt为WT中的一个元素,SGwt表示ewt可以匹配的signal操作的集合,esg为SGwt中任一signal操作事件,利用变量
Figure PCTCN2015081055-appb-000007
是否等于1来表示esg是否与ewt相匹配。子公式
Figure PCTCN2015081055-appb-000008
表示,对于每一个wait操作ewt必须有一个signal操作与之匹配;
所述偏序约束的计算方法:
首先规定:如果事件创建一个线程,那么被创建线程的所有事件都要在此事件之后执行;如果事件执行线程终止操作,那么被终止线程的所有事件都要在此事件之前;令C为create/fork操作的事件集合,令J作为join操作的事件集合;给定约束:
Figure PCTCN2015081055-appb-000009
其中,ec为线程创建事件,first(ec)为ec所创建的线程首个事件的顺序;ej为线程终止事件;last(ej)为ej所结束的线程末尾事件的顺序;
最终将以上五种约束相与构成约束模型F。
本发明进一步的改进在于:所述步骤S6)中给定约束模型与输出唯一性属性条件,利用约束求解器求解属性条件;如果存在不同的输出,则生成反例以说明此不同输出的触发过程。
与现有技术相比,本发明的有益效果是:
(1)提出一种多线程程序约束构建模型,将多线程程序的输出唯一性验证问题转化为约束求解问题。此模型按照程序语义进行约束构建,所构建的表达式包含了所有可能的交织序列,利用约束求解器检查所有交织是否会产生不同的输出。
(2)如果存在不同的输出时,产生一个证据序列,以给用户展示此不同的结果是如何被生成的。
(3)对执行序列进行事后分析,不存在on-the-fly技术所产生的巨大运行时开销。
附图说明
图1为本发明方法整体流程图。
图2为多线程程序路径约束构建方法流程图。
具体实施方式
以下结合附图和实例详细说明本发明的实施方式。待测程序如下所示,x与y为共享变量,线程0在第1行与第2行创建了线程1与线程2。
0:x=3,y=1
Figure PCTCN2015081055-appb-000010
如图1所示,一种基于多线程程序约束构建的输出唯一性验证方法,包括如下步骤:
步骤S1):将监控代码植入被测程序,以对程序的执行过程进行记录。在LLVM字节码的层面上,插装完成之后所呈现的代码样式如下;
......
call void(i32,...)*@clap_inst_pre(i32 2,i32 5,i32 0)
%inc=add nsw i32%tmp,1,!dbg!58,!clap!60
call void(i32,...)*@clap_inst_pre(i32 2,i32 6,i32 0)
store i32%inc,i32*@a,align 4,!dbg!58,!clap!61
.....
其中,函数clap_inst_pre为被插入的监控语句,监控其后的一行语句,执行过程中会输出后一行的线程ID、指令ID、状态值以及返回值。
步骤S2):给定输入下,执行示例程序,记录下路径=[1,2,3,4,5,6,7,8,9,10,11,12,13,14];
步骤S3):预处理路径以便于S4)的约束构建,提取全局变量访问点,包括行:5,6,8,9,12,13;将路径转化为SSA格式。线程0转化为轨迹0,线程1转化为轨迹1,线程2转化为轨迹2,如下所示:
Figure PCTCN2015081055-appb-000011
Figure PCTCN2015081055-appb-000012
其中,对于全局变量x与y的下角标表示读(r)或写(w),上角标区分不同的读或写操作,上角标为0表示为初始赋值。
步骤S4):在此,针对全局变量x与y,预期结果分别为6与5,在末尾处插入断言x=6与y=5。同时,令x=6与y=5作为输出唯一性验证条件,如下所示,
Figure PCTCN2015081055-appb-000013
Figure PCTCN2015081055-appb-000014
Figure PCTCN2015081055-appb-000015
步骤S5):根据程序执行语义将执行路径中状态转移、线程交织关系转化为无量词一阶逻辑表达式,构建执行路径π的约束模型F,包括路径表达式、内存模型约束、读写关系约束、偏序约束、同步语义约束。整个约束模型F 蕴含了执行路径所有可能的交织序列。具体地,如图2所示,按照以下步骤生成对应的逻辑表达式:
S501)根据路径的SSA格式,直接计算出路径的路径表达式,如下公式:
Figure PCTCN2015081055-appb-000016
Figure PCTCN2015081055-appb-000017
Figure PCTCN2015081055-appb-000018
S502)构建内存模型约束,采用顺序一致性模型,规定所有操作按程序的顺序执行。按照公式:
Figure PCTCN2015081055-appb-000019
计算出路径π的内存模型约束,如以下公式:
o(e1)<o(e2)<o(e3)<o(e4)∧
o(e5)<o(e6)<o(e7)<o(e8)<o(e9)<o(e10)∧
o(e11)<o(e12)<o(e13)<o(e14)
其中,o(ei)表示第i行语句交织序列中的排列序号。
S503)计算读写顺序约束,使共享变量的读来自于最近的写。对于同一共享变量,令R作为所有对其进行读操作的事件集合,令W作为所有对其进行写操作的事件集合。给出以下公式:
Figure PCTCN2015081055-appb-000020
其中,er为读事件,ew与ex为写事件,vr和vw为事件er与ew所操作的变量。公式所表达的意思是,如果事件er中的vr取值来自于事件ew中的vw,首先要满足er在ew之后,即O(ew)<O(er);然后要满足所有的写要么在ew之前,要么在er之后。
在路径中,对于全局变量x,R={e5,e12},W={e0,e8,e12},其读写关系表达式如下公式:
Figure PCTCN2015081055-appb-000021
Figure PCTCN2015081055-appb-000022
其中,对变量x的读写可能进行了罗列,当第5行x的读来自于第0行x的写时,应该满足:第0行在第5行之前,且第12行对x的写不能发生在两者之间。y变量的情况类似于x。
S504)计算同步语义约束,包括lock/unlock与wait/signal两类操作:
1)构建锁同步语义约束(lock/unlock操作)时,要求在同一互斥锁的lock/unlock集合中,对于任意两个lock/unlock事件对:li/ui与lk/uk,须满足公式:
Figure PCTCN2015081055-appb-000023
其中,锁对li/ui要么发生在锁对lk/uk之前,要么发生在其后。
2)构建条件变量同步语义约束(wait/signal)时,要满足条件:每一个wait操作必须对应一个signal操作,而一个signal操作至多唤醒一个wait操作。对于同一条件变量cond,令WT作为在cond上所有wait操作的集合,令SG作为在cond上所有signal操作的集合。如要满足之上的条件,须有以下公式:
Figure PCTCN2015081055-appb-000024
其中,令ewt为WT中的一个元素,SGwt表示ewt可以匹配的signal操作的集合,,esg为SGwt中任一signal操作事件。利用变量
Figure PCTCN2015081055-appb-000025
是否等于1来表示esg是否与ewt相匹配。子公式
Figure PCTCN2015081055-appb-000026
表示,对于每一个wait操作ewt必须有一个signal操作与之匹配。
在路径中,只有锁m,同步语义约束公式如下:
o(e10)<o(e11)∨o(e14)<o(e7)
其中,约束表达式表示要么线程1先获取锁:o6<o7,要么线程2先获取锁:o10<o3
S505)计算偏序约束,其规定:如果事件创建一个线程,那么被创建线程的所有事件都要在此事件之后执行。如果事件执行线程终止操作,那么被 终止线程的所有事件都要在此事件之前。令C为create/fork操作的事件集合,令J作为join操作的事件集合。给定约束:
Figure PCTCN2015081055-appb-000027
其中,ec为线程创建事件,first(ec)为ec所创建的线程首个事件的顺序;ej为线程终止事件;last(ej)为ej所等待的线程末尾事件的顺序。
在路径中,线程创建语句为O2,O3,其偏序关系约束如下公式:
o(e1)<o(e5)∧o(e2)<o(e11)∧
o(e10)<o(e3)∧o(e14)<o(e2)
其中,约束o(e1)<o(e5)表示线程创建语句e1在其被创建线程1的首个事件e5前执行,约束o(e10)<o(e3)表示线程等待语句e3在线程1的末尾事件e10后执行。
S506)将以上五种约束进行相与,得到约束模型F。
步骤S6)在本示例中,输出唯一性验证条件分别为ρ1:x=6、ρ2:y=5,利用约束求解器求解
Figure PCTCN2015081055-appb-000028
Figure PCTCN2015081055-appb-000029
两者皆有解;ρ1的反例为{1,2,5,11,12,13,14,6,7,8,9,10},ρ2的反例为{1,2,5,6,11,12,13,14,7,8,9,10}。
步骤S7)输出验证结果以及反例序列。

Claims (5)

  1. 一种基于程序约束构建的多线程程序输出唯一性检测与证据生成方法,其特征在于,包括如下步骤:
    S1)将监控代码植入待测程序,以记录程序的执行过程;
    S2)在给定输入下,执行已插桩程序,生成路径记录文件;
    S3)预处理执行路径以便于约束构建;
    S4)在程序运行结尾处自动添加属性条件,针对多线程程序的运行输出,将输出唯一性条件ρ以assert的格式插入程序;
    S5)根据程序执行语义将执行路径中状态转移、线程交织关系转化为无量词一阶逻辑表达式,构建蕴含了所有可能的交织序列的多线程程序执行路径约束模型F;
    S6)针对唯一性条件ρ,利用约束求解器验证
    Figure PCTCN2015081055-appb-100001
    是否有解;
    S7)如果有解,则表示存在多种不同的输出,并生成证据序列;如果无解,则表示此输出在此输入下唯一;
    其中:
    所述步骤S5)中多线程程序执行路径约束模型F蕴含了执行路径所有可能的交织序列,包括五种约束:路径表达式、内存模型约束、读写关系约束、偏序约束以及同步语义约束,定义分别如下:
    1)路径表达式:描述线程内部的定义-使用链,以及控制线程内部状态转换;
    2)内存模型约束:表示程序中语句、变量之间的关系,采用顺序一致性的语义,顺序一致性规定CPU按照代码中语句的顺序来执行程序;
    3)读写关系约束:定义线程间的定义-使用链,规定共享变量所读取到的值,必须来自初始值以及最近的写值;
    4)偏序约束:定义线程之间创建线程与终止线程操作语句于被操作线程语句之间的时序关系;
    5)同步语义约束:定义线程之间同步控制操作语句之间的时序关系;
    其中,定义-使用链为:将每一个线程序列转化为SSA格式,对于每一个SSA格式的执行序列,除去共享访问点都是一个完整的定义-使用链;
    所述步骤S5)中多线程程序执行路径约束模型F的构建方法包括以下操作:
    1)计算路径表达式,以控制线程内部状态转移;
    2)计算内存模型约束,以线程内限制语句之间的关系;
    3)计算读写关系约束,以建立线程间的定义-使用链;
    4)计算同步语义约束,以定义线程间同步关系;
    5)计算偏序约束,以描述线程创建与终止的语义;
    最后,结合以上五种约束,构成约束模型F;
    定义执行路径事件集合
    Figure PCTCN2015081055-appb-100002
    其中k为线程数量,Ti={e1,e2,…,en}作为线程i的执行序列,en表示Ti的第n个事件,O(en)表示事件en的顺序,n表示Ti的事件数量,则:
    所述路径表达式的计算方法:
    将每一个线程序列转化为SSA格式,直接将SSA格式序列转化为路径表达式;
    所述内存模型约束的计算方法:
    采用顺序一致性模型,所有操作完全按程序的顺序执行,线程内的事件顺序符合约束:
    Figure PCTCN2015081055-appb-100003
    其中ei与ei+1表示同一线程内连续的两个事件,τ表示所有线程序列;
    所述读写关系约束的计算方法:
    使共享变量的读来自于最近的写,对于同一共享变量v,令R作为所有对其进行读操作的事件集合,令W作为所有对其进行写操作的事件集合,给出以下公式:
    Figure PCTCN2015081055-appb-100004
    其中,er为读事件,ew与ex为写事件,vr和vw为事件er与ew所操作的变量,公式所表达的意思是,如果事件er中的vr取值来自于事件ew中的vw,首先要满足er在ew之后,即O(ew)<O(er);然后要满足所有的写要么在ew之前,要么在er之后;
    所述同步语义约束的计算方法包括lock/unlock与wait/signal两类操作:
    1)lock/unlock操作的目的为构建锁同步语义约束,要求在同一互斥锁的lock/unlock集合L中,对于任意两个lock/unlock事件对:li/ui与lk/uk,须满足公式:
    Figure PCTCN2015081055-appb-100005
    其中,锁对li/ui要么发生在锁对lk/uk之前,要么发生在其后;
    2)wait/signal操作的目的是构建条件变量同步语义约束,要满足条件:每一个wait操作必须对应一个signal操作,而一个signal操作至多唤醒一个wait操作,对于同一条件变量cond,令WT作为在cond上所有wait操作的集合,令SG作为在cond上所有signal操作的集合,如要满足之上的条件,须有以下公式:
    Figure PCTCN2015081055-appb-100006
    其中,ewt为WT中的任一元素,SGwt表示ewt可以匹配的signal操作的集合,esg为SGwt中任一signal操作事件,利用变量
    Figure PCTCN2015081055-appb-100007
    是否等于1来表示esg是否与ewt相匹配;子公式
    Figure PCTCN2015081055-appb-100008
    表示,对于每一个wait操作ewt必须有一个signal操作与之匹配;
    所述偏序约束的计算方法:
    首先规定:如果事件创建一个线程,那么被创建线程的所有事件都要在此事件之后执行;如果事件执行线程终止操作,那么被终止线程的所有事件都要在此事件之前;令C为create/fork操作的事件集合,令J作为join操作的 事件集合;给定约束:
    Figure PCTCN2015081055-appb-100009
    其中,ec为线程创建事件,first(ec)为ec所创建的线程首个事件的顺序;ej为线程终止事件;last(ej)为ej所结束的线程末尾事件的顺序;
    最终将以上五种约束相与构成约束模型F。
  2. 根据权利要求1所述基于程序约束构建的多线程程序输出唯一性检测与证据生成方法,其特征在于,所述步骤S1)中插桩工作并非在源码或者二进制的层面上进行,而是在字节码的层面上完成,具体实施方法为:首先将待测多线程程序源码转化为中间字节码格式,即LLVM字节码;然后将具有监控功能的语句植入待测程序;最后将植入监控代码的字节码链接成可执行程序。
  3. 根据权利要求1所述基于程序约束构建的多线程程序输出唯一性检测与证据生成方法,其特征在于,所述步骤S3)中预处理包括提取共享变量以识别出执行路径中公有变量的访问点以及切片以去除与验证属性无关的执行语句。
  4. 根据权利要求1所述基于程序约束构建的多线程程序输出唯一性检测与证据生成方法,其特征在于,所述步骤S4)中自动识别出输出变量且对其构建输出唯一性验证条件ρ。
  5. 根据权利要求1所述基于程序约束构建的多线程程序输出唯一性检测与证据生成方法,其特征在于,所述步骤S6)中给定约束模型与输出唯一性属性条件,利用约束求解器求解属性条件;如果存在不同的输出,则生成反例以说明此不同输出的触发过程。
PCT/CN2015/081055 2014-07-07 2015-06-09 基于程序约束构建的多线程程序输出唯一性检测与证据生成方法 Ceased WO2016004806A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US15/270,266 US20170010957A1 (en) 2014-07-07 2016-09-20 Method for Multithreaded Program Output Uniqueness Testing and Proof-Generation, Based on Program Constraint Construction

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201410320129.0 2014-07-07
CN201410320129.0A CN104077226B (zh) 2014-07-07 2014-07-07 基于程序约束构建的多线程程序输出唯一性检测与证据生成方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US15/270,266 Continuation US20170010957A1 (en) 2014-07-07 2016-09-20 Method for Multithreaded Program Output Uniqueness Testing and Proof-Generation, Based on Program Constraint Construction

Publications (1)

Publication Number Publication Date
WO2016004806A1 true WO2016004806A1 (zh) 2016-01-14

Family

ID=51598494

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2015/081055 Ceased WO2016004806A1 (zh) 2014-07-07 2015-06-09 基于程序约束构建的多线程程序输出唯一性检测与证据生成方法

Country Status (3)

Country Link
US (1) US20170010957A1 (zh)
CN (1) CN104077226B (zh)
WO (1) WO2016004806A1 (zh)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105930242A (zh) * 2016-05-06 2016-09-07 中国科学院计算技术研究所 一种支持精确访存检测的多核处理器随机验证方法及装置
CN112214401A (zh) * 2020-09-23 2021-01-12 华东师范大学 一种基于模型检测的标准模型分析方法
CN116383070A (zh) * 2023-04-07 2023-07-04 南京航空航天大学 一种面向高mc/dc的符号执行方法

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104077226B (zh) * 2014-07-07 2015-05-13 西安交通大学 基于程序约束构建的多线程程序输出唯一性检测与证据生成方法
CN104462943B (zh) * 2014-11-21 2017-12-01 用友网络科技股份有限公司 业务系统中非侵入式性能监控装置和方法
CN105183655B (zh) * 2015-09-25 2017-12-12 南京大学 基于预测性分析的安卓应用程序数据竞争检测
CN105955877B (zh) * 2016-04-19 2017-03-29 西安交通大学 一种基于符号计算的动态并行程序污点分析方法
CN106951303B (zh) * 2017-02-20 2020-09-22 南京邮电大学 一种基于信息流分析的llvm中间表示程序切片方法
CN110851353B (zh) * 2019-10-22 2023-03-31 天津大学 一种基于Delta Debugging与约束求解的并发程序缺陷定位方法
CN111431737B (zh) * 2020-03-02 2022-07-12 苏州市职业大学 一种检测软件定义网络中数据竞争的预测性方法
CN112131583B (zh) * 2020-09-02 2023-12-15 上海科技大学 一种基于gpu的模型计数及其约束的求解方法
CN114936109A (zh) * 2022-05-25 2022-08-23 南通大学 一种基于模型检测的反例故障定位方法
CN119938486B (zh) * 2024-12-30 2026-01-09 杭州高新区(滨江)区块链与数据安全研究院 程序的验证方法、装置、设备及计算机可读存储介质

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102063328A (zh) * 2010-12-17 2011-05-18 北京控制工程研究所 一种用于检测中断驱动型程序数据竞争的系统
CN102799529A (zh) * 2012-07-13 2012-11-28 北京航空航天大学 一种动态的二进制代码测试用例生成方法
CN104077226A (zh) * 2014-07-07 2014-10-01 西安交通大学 基于程序约束构建的多线程程序输出唯一性检测与证据生成方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7117488B1 (en) * 2001-10-31 2006-10-03 The Regents Of The University Of California Safe computer code formats and methods for generating safe computer code
US20120084758A1 (en) * 2010-10-05 2012-04-05 International Business Machines Corporation Collaborative Software Debugging In A Distributed System With Client-Specific Variable Evaluation
WO2012143760A1 (en) * 2011-04-20 2012-10-26 Freescale Semiconductor, Inc. Method and apparatus for generating resource efficient computer program code

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102063328A (zh) * 2010-12-17 2011-05-18 北京控制工程研究所 一种用于检测中断驱动型程序数据竞争的系统
CN102799529A (zh) * 2012-07-13 2012-11-28 北京航空航天大学 一种动态的二进制代码测试用例生成方法
CN104077226A (zh) * 2014-07-07 2014-10-01 西安交通大学 基于程序约束构建的多线程程序输出唯一性检测与证据生成方法

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105930242A (zh) * 2016-05-06 2016-09-07 中国科学院计算技术研究所 一种支持精确访存检测的多核处理器随机验证方法及装置
CN112214401A (zh) * 2020-09-23 2021-01-12 华东师范大学 一种基于模型检测的标准模型分析方法
CN112214401B (zh) * 2020-09-23 2023-05-09 华东师范大学 一种基于模型检测的标准模型分析方法
CN116383070A (zh) * 2023-04-07 2023-07-04 南京航空航天大学 一种面向高mc/dc的符号执行方法
CN116383070B (zh) * 2023-04-07 2023-12-05 南京航空航天大学 一种面向高mc/dc的符号执行方法

Also Published As

Publication number Publication date
CN104077226B (zh) 2015-05-13
CN104077226A (zh) 2014-10-01
US20170010957A1 (en) 2017-01-12

Similar Documents

Publication Publication Date Title
WO2016004806A1 (zh) 基于程序约束构建的多线程程序输出唯一性检测与证据生成方法
WO2016004808A1 (zh) 基于多线程程序约束构建的数据竞争检测与证据生成方法
Netzer et al. Improving the accuracy of data race detection
Huang et al. Clap: Recording local executions to reproduce concurrency failures
CN103559122B (zh) 基于程序行为切片的测试案例约减方法
Burckhardt et al. Effective program verification for relaxed memory models
JP5337454B2 (ja) 並行バグ用のエラートレースを生成するシステムおよび方法
CN103365776B (zh) 基于确定性重放的并行系统弱一致性的验证方法和系统
CN105955877B (zh) 一种基于符号计算的动态并行程序污点分析方法
Huang et al. Lean: Simplifying concurrency bug reproduction via replay-supported execution reduction
Helmstetter et al. Automatic generation of schedulings for improving the test coverage of systems-on-a-chip
US8141082B2 (en) Node-based representation of multi-threaded computing environment tasks, and node-based data race evaluation
CN110851353B (zh) 一种基于Delta Debugging与约束求解的并发程序缺陷定位方法
Mansky et al. Verifying dynamic race detection
Zhang et al. Round-Up: Runtime checking quasi linearizability of concurrent data structures
CN112364600B (zh) 一种处理器微架构设计验证方法
Sun et al. A hierarchical CPN model automatically generating method aiming at multithreading program algorithm error detection
Anand et al. Automatic synchronization for GPU kernels
Ledent et al. Improving PSS Test Generation Using Model Checking and Conformance Testing
Zhao et al. Formal Verification of Preemptive Interrupt-Driven Programs Based on Partial Order Modeling
Al Maghayreh Block-based atomicity to simplify the verification of distributed applications
Cao et al. Concurrent program semantic mutation testing based on abstract memory model
Desai et al. Iterative cycle detection via delaying explorers
Nataf et al. Brief Announcement: Time, Fences and the Ordering of Events in TSO
Navabpour et al. Optimal instrumentation of data-flow in concurrent data structures

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 15818416

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 15818416

Country of ref document: EP

Kind code of ref document: A1