WO2016000224A1

WO2016000224A1 - Computer system

Info

Publication number: WO2016000224A1
Application number: PCT/CN2014/081491
Authority: WO
Inventors: 肖世海; 杨伟; 赵俊峰; 陈少杰
Original assignee: 华为技术有限公司
Priority date: 2014-07-02
Filing date: 2014-07-02
Publication date: 2016-01-07
Also published as: CN105393504A; CN105393504B

Abstract

Provided is a computer system. The computer system comprises a physical resource, multiple networks-on-chip, and a configurable interconnection module. The configurable interconnection module is used for connecting the physical resource to the multiple networks-on-chip, and for configuring a connection relationship between the physical resource and the multiple networks-on-chip. Each network-on-chip and the physical resource connected to the network-on-chip form a physical partition. By adding the configurable interconnection module between the physical resource and the networks-on-chip, the connection relationship between the physical resource and the multiple networks-on-chip can be flexibly configured by means of the configurable interconnection module, resources of the computer system are properly used, and the resource utilization rate of the whole computer system is improved.

Description

computer system

Technical field

Embodiments of the present invention relate to computer technology, and in particular, to a computer system. Background technique

In a conventional multi-core computer system, multiple processor cores share resources such as a cache, a network-on-chip (NoC), and a memory. As the number of processor cores increases, the scale of the on-chip network increases dramatically, and the coherent protocol overhead, power consumption overhead, and latency overhead become larger, which affects the development of multi-core computer systems toward more processor cores. . Therefore, the industry has proposed a new multi-core processor architecture, which is mainly to divide a multi-core processor into multiple physically separate physical partitions, each of which can independently run its own operating system or virtualization management software. .

FIG. 1 is a schematic diagram of an architecture of an existing multi-core processor. As shown in FIG. 1, a multi-core processor is divided into two physical partitions: physical partition 1 and physical partition 2, and physical partitions of physical partition 1 and physical partition 2 are partitioned. The partitioning has been fixed. Physical resources include: kernel, cache, memory, I/O resources, and so on. The two physical partitions are independent. Each physical partition has a separate on-chip network. As shown in Figure 1, physical partition 1 and physical partition 2 share only memory and I/O, and do not share the kernel and the last level of cache ( Last Level Cache (LLC) means that the processor core and LLC of the two physical partitions are independent. In the figure, C represents the processor core. 2 is a schematic structural diagram of a conventional on-chip network. As shown in FIG. 2, R is an exchange unit of an on-chip network, and each switching unit is connected and communicated with an adjacent switching unit through an I/O channel, and each exchange is performed. The unit is connected to the physical resource through the mi interface, and the connection between the physical resource and the switching unit in the existing multi-core processor is fixed, that is, the physical resources of each physical partition are fixed.

In the existing multi-core processor architecture, the size of the on-chip network of each physical partition is reduced, and the consistency protocol overhead is also small. When the chip needs to integrate more processors, a physical partition can be directly added, thereby The scalability of multi-core processors has also been greatly improved. However, the existing multi-core processor architecture also has the following problems: The physical resources of each physical partition of the multi-core processor are fixed, because the hardware resources required for different applications running on each physical partition are different, some physical The partition may face waste of resources, and other physical partitions may face insufficient resources. In the prior art, the resources of each physical partition are fixed, and cannot be adjusted according to resources required by the application, so that the physical resource utilization rate of the chip is low. SUMMARY OF THE INVENTION Embodiments of the present invention provide a computer system capable of dynamically configuring physical resources of physical partitions of a computer system, thereby improving utilization of physical resources.

A first aspect of the present invention provides a computer system, including: a physical resource, a plurality of on-chip networks, and a configurable interconnection module;

The configurable interconnection module is configured to connect the physical resource and the plurality of on-chip networks, and configure a connection relationship between the physical resource and the plurality of on-chip networks, where each on-chip network and the on-chip network The connected physical resources make up a physical partition.

With reference to the first aspect of the present invention, in a first possible implementation manner of the first aspect of the present disclosure, each of the on-chip networks includes multiple switching units, where the configurable interconnection module includes: multiple resource connection lines, multiple Each of the resource connection lines is connected to the physical resource, and each of the exchange unit connection lines is respectively connected to one switching unit of the on-chip network, and the plurality of resource connections are connected. The line and the plurality of switching unit connecting lines are connected to each other in a crisscross manner, and each cross point is provided with a first switch, and the resource management unit controls the opening and closing of the first switch to control the The physical resources connected to the resource connection line at the cross point are connected and disconnected from the exchange unit connected to the exchange unit connection line at the cross point.

With reference to the first possible implementation manner of the first aspect of the present invention, in a second possible implementation manner of the first aspect of the present invention, the configurable interconnection module further includes: a plurality of communication connection lines and a communication management unit, The plurality of communication connecting lines and the plurality of resource connecting lines are connected to each other in a crisscross manner, and each cross point is provided with a second switch, and the communication management unit controls on and off of the second switch The second switch is configured to control communication and disconnection between the exchange unit connected to the corresponding switching unit connection at the cross point and the other switching unit,

With reference to the first aspect of the present invention and the first and second possible implementation manners of the first aspect of the present invention, in a third possible implementation manner of the first aspect of the present invention, the physical resource includes Any one or combination of resources: multiple processor cores, cache, memory, external memory, input/output I/O, acceleration unit.

With reference to the first aspect of the present invention and the first and second possible implementation manners of the first aspect of the present invention, in a fourth possible implementation manner of the first aspect of the present invention, the resource connection line, the exchange The unit connection line and the communication connection line are optical waveguides, and the first switch and the second switch are optical switches.

With reference to the first aspect of the present invention and the first to fourth possible implementation manners of the first aspect of the present invention, in a fifth possible implementation manner of the first aspect of the present disclosure, the physical resource is divided into configurable a resource and a fixed resource, where the switching unit of each of the on-chip networks is divided into a configurable switching unit and a fixed switching unit, where the configurable resource is connected to the configurable switching unit of the on-chip network through the configurable interconnection module. The fixed resource is connected to a fixed switching unit of the on-chip network, and a connection relationship between the fixed resource and a fixed switching unit of the on-chip network is fixed.

With reference to the first aspect of the present invention and the first to fifth possible implementation manners of the first aspect of the present invention, in a sixth possible implementation manner of the first aspect, the configurable interconnection module further includes:

An obtaining unit, configured to obtain a performance analysis result of each physical partition, where the performance analysis result includes usage of physical resources of each partition;

And an adjusting unit, configured to adjust physical resources of the physical partitions according to performance analysis results of the physical partitions.

With reference to the sixth possible implementation manner of the first aspect of the present invention, in a seventh possible implementation manner of the first aspect of the present disclosure, the adjusting unit is specifically configured to: use, according to physical resources of each physical partition In the case, the physical resources of the physical partition with low resource utilization are released, and the physical resources of the physical partition with the shortage of physical resources are increased.

The computer system of the embodiment of the present invention, by adding a configurable interconnection module between the physical resource and the on-chip network, the configurable interconnection module is configured to connect the physical resource and the plurality of on-chip networks, and the flexible configuration through the configurable interconnection module The connection relationship between the physical resources and the plurality of on-chip networks enables the resources of the computer system to be utilized reasonably, and the resource utilization of the entire computer system is improved.

DRAWINGS In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, a brief description of the drawings used in the embodiments or the prior art description will be briefly described below. Obviously, the drawings in the following description It is a certain embodiment of the present invention, and other drawings can be obtained from those skilled in the art without any inventive labor.

1 is a schematic diagram of an architecture of an existing multi-core processor;

2 is a schematic structural diagram of a conventional on-chip network;

3 is a schematic structural diagram of a computer system according to Embodiment 1 of the present invention;

4 is a schematic structural diagram of a computer system according to Embodiment 2 of the present invention;

FIG. 5 is a schematic structural diagram of a computer system according to Embodiment 3 of the present invention; FIG.

FIG. 6 is a schematic structural diagram of a computer system according to Embodiment 4 of the present invention. The technical solutions in the embodiments of the present invention are clearly and completely described in the following with reference to the accompanying drawings in the embodiments of the present invention. The embodiments are a part of the embodiments of the invention, and not all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments of the present invention without creative efforts are within the scope of the present invention.

3 is a schematic structural diagram of a computer system according to Embodiment 1 of the present invention. As shown in FIG. 3, the computer system of this embodiment includes: a physical resource, a plurality of on-chip networks, and a configurable interconnection module, and the configurable interconnection module is used for connecting. And the physical resources and the plurality of on-chip networks, and the connection relationship between the physical resources and the plurality of on-chip networks, wherein each of the on-chip network and the physical resources connected to the on-chip network form a physical partition.

The physical resource may include any one or a combination of the following resources: multiple processor cores, caches, memory, external memory, input/output (I/O), acceleration Units, physical resources can also include other resources, not listed here, the processor core can have its own private cache, the private cache of each processor core can not be shared.

Each on-chip network includes a plurality of switching units, and the switching units have switching and routing functions. The topology of each on-chip network may be the same or different, and each on-chip network may have an independent consistency protocol. As shown in Figure 3, each switching unit of the network on the chip passes through a configurable interconnect module. Physical resources are connected. Each switching unit has different physical resources. Some switching units are connected to the processor core. Some switching units are connected to the cache. Some switching units are connected to the memory. Each on-chip network and its connected physical resources form a physical partition. The physical partitions are independent. Therefore, different physical resources can be configured for each physical partition according to actual needs.

In the computer system of this embodiment, the connection relationship between the physical resource and the on-chip network is not fixed, that is, the size and connection relationship of each physical partition are not fixed, and the connection relationship between the physical resource and the on-chip network can be flexibly configured through the configurable interconnection module. . For example, when the physical resources of a physical partition are idle and the physical resources of other physical partitions are tight, the configurable interconnect module can adjust the physical resources of the two physical partitions to allocate physical resources to physical physical resources. Partition use makes the resources of the computer system be used reasonably and improves the resource utilization of the entire computer system.

In the computer system of this embodiment, by adding a configurable interconnection module between the physical resource and the on-chip network, the configurable interconnection module is configured to connect the physical resource and the plurality of on-chip networks, and the flexible configuration through the configurable interconnection module The connection relationship between the physical resources and the plurality of on-chip networks enables the resources of the computer system to be reasonably utilized, thereby improving resource utilization of the entire computer system.

4 is a schematic structural diagram of a computer system according to Embodiment 2 of the present invention. As shown in FIG. 4, in the computer system of this embodiment, the configurable interconnection module includes: multiple resource connection lines, multiple exchange unit connection lines, and resources. a management unit, each of the resource connection lines is respectively connected to the physical resource, and each of the exchange unit connection lines is respectively connected to one switching unit of the on-chip network, and the plurality of resource connection lines are exchanged with the plurality of resources The unit connection lines are connected to each other in a crisscross manner, and each cross point is provided with a first switch, and the resource management unit controls the resource connection at the cross point by controlling the on and off of the first switch. The physical resources connected to the line are connected and disconnected from the switching unit to which the switching unit connection line at the cross point is connected.

As shown in FIG. 4, physical resources such as a processor core, a cache, a memory, and an I/O are respectively connected to a resource connection line, and each switching unit of the on-chip network is connected to a switching unit connection line, and when the resource connection line and the exchange unit are connected. When the first switch on the line intersection is turned on, it indicates that the physical resource connected to the resource connection line is in communication with the exchange unit connected to the exchange unit connection line. When the first switch is disconnected, it indicates that the resource connection line is connected. The physical resource is disconnected from the switching unit connected to the switching unit connection line, and the on/off of the first switch is controlled by the resource management unit, and the resource management unit controls each first open Turn off the switch to achieve flexible configuration of physical resources.

In this embodiment, the optical waveguide and the switching unit connection line can all adopt optical waveguides. The optical waveguide can meet the requirements of the communication delay within the computer system because of the large bandwidth and high transmission rate. Of course, other transmission lines may be used for the resource connection line and the switching unit, which is not limited by the embodiment of the present invention. The first switch can be implemented by using an optical switch, such as a micro-ring optical switch, and the micro-ring optical switch can control the optical coupling capability through a voltage. When a specific voltage is applied to the micro-ring optical switch, the micro-ring optical switch takes the optical signal from the optical signal. One optical waveguide is coupled to the other optical waveguide, while the micro-ring optical switch does not have optical coupling capability at other voltages.

The optical waveguide has a wavelength division multiplexing characteristic, that is, one optical waveguide can transmit signals of multiple wavelengths. Therefore, in this embodiment, multiple resource connection lines can use one optical waveguide, and multiple switching unit connection lines can also use one optical path. waveguide. When one optical waveguide can only transmit one wavelength signal, then each resource connection line corresponds to one optical waveguide, and each switching unit connection line corresponds to one optical waveguide. In practical applications, optical switches can use wide-spectrum optical switches, and wide-spectrum optical switches can couple optical signals of multiple wavelengths at once.

FIG. 5 is a schematic structural diagram of a computer system according to Embodiment 3 of the present invention. As shown in FIG. 5, the computer system of this embodiment is further based on the computer system shown in FIG. 4, and the configurable interconnection module further includes: Multiple communication cables and communication management units. The plurality of communication connection lines and the plurality of resource connection lines are connected to each other in a crisscross manner, and each cross point is provided with a second switch, and the second switch is used to control the cross point The corresponding switching unit is connected to the connection and disconnection between the connected switching unit and the other switching unit, and the communication management unit is configured to control the switching of the second switch.

In the prior art, each switching unit on the network on the chip can only communicate directly with the adjacent switching unit. If a switching unit needs to communicate with a switching unit that is not adjacent to it, the forwarding needs to be performed through the forwarding of the intermediate switching unit. And in the prior art, the switching units of the two on-chip networks are not able to communicate. The solution of the embodiment of the present invention can directly interconnect two switching units that are not directly connected by using a communication connection line. The two switching units that are not directly connected here may be two switching units on the same on-chip network, or may be located at Two switching units of different on-chip networks. The configurable interconnection module interconnects two switching units that are not directly interconnected on the same on-chip network, enabling direct communication between any two switching units on the same on-chip network, reducing the delay of data packet transmission in the on-chip network. . Configurable interconnect modules configure two exchange orders on different on-chip networks Meta-interconnection allows direct communication between different physical partitions.

In this embodiment, the optical waveguide, the switching unit connection line, and the communication connection line may each adopt an optical waveguide, and the first switch and the second switch may both adopt a micro-ring optical switch.

FIG. 6 is a schematic structural diagram of a computer system according to Embodiment 4 of the present invention. The difference between the embodiment and the embodiment shown in FIG. 4 and FIG. 5 is that the connection relationship between the physical resource and the on-chip network is only partially configurable, and part of the physical resources and The connection relationship between the switching units of the on-chip network is fixed. Specifically, the physical resource is divided into a configurable resource and a fixed resource, and the switching unit of each of the on-chip networks is divided into a configurable switching unit and a fixed switching unit, and the configurable resource passes the configurable interconnecting module. Connected to the configurable switching unit of the on-chip network, the fixed resource is connected to the fixed switching unit of the on-chip network, and the connection relationship between the fixed resource and the fixed switching unit of the on-chip network is fixed.

In this embodiment, only the connection relationship between the configurable resource and the configurable switching unit is not fixed, and the configurable interconnection module can be flexibly configured, and the connection relationship between the fixed resource and the fixed switching unit is fixed. For example, for a physical partition, the computing power required for the physical partition is basically stable, and the storage resources required for the physical partition are highly volatile, so the processor core can be used as a fixed resource, and the cache, A storage resource such as a memory is a configurable resource, and the processor core is directly connected to a fixed switching unit of the on-chip network, and the cache and the memory are connected to the configurable switching unit of the on-chip network through the configurable interconnection module.

On the basis of the foregoing Embodiment 1 to Embodiment 4, in the fifth embodiment of the present invention, the configurable interconnection module further includes: an obtaining unit, configured to obtain performance analysis results of the physical partitions, where the performance analysis result includes the The usage of the physical resources of each partition; the adjusting unit, configured to adjust physical resources of the physical partitions according to performance analysis results of the physical partitions.

Each physical partition can run a separate operating system or virtualization management software. The performance of the respective physical partitions may be analyzed by the operating system or the virtualization management software, and the obtaining unit may receive performance analysis results of the physical partitions sent by the operating system or the virtualization management software. The performance analysis results mainly include the usage of physical resources of each physical partition, such as the usage rate of the processor core, the utilization of the cache and the memory, the usage of the 10, and the traffic of the network on the chip. The adjustment unit is connected to the resource management unit and the communication management unit, and the adjustment unit may notify the resource management unit and the communication management unit to reconfigure the physical resources of each physical partition. When a physical partition has excess physical resources or insufficient physical resources, the adjustment unit notifies the resource management unit and the communication management unit The physical resources of the physical partition and the connection relationship of the switching unit are changed, and the physical resources of the physical partition are dynamically adjusted.

Specifically, the adjusting unit determines whether each physical partition has a low physical resource utilization rate or a shortage of physical resources according to the usage of physical resources of each physical partition. When physical resource utilization or physical resource shortage occurs, the adjusting unit Consider the configuration of each physical partition and decide whether to adjust the configuration. The factors considered by the adjustment unit mainly include: Which physical resources should be released for physical partitions with low resource utilization, or if the physical partition is in response to an unexpected situation, consider maintaining the status quo and not adjusting the physical resources of the physical partition. For a physical partition with a shortage of physical resources, it is necessary to consider whether there is an idle switching unit of the physical partition of the physical partition, and whether the computer system currently has enough free resources, and when the idle resources are insufficient, whether to notify other physical partitions to release physical resources. Whether the physical resource connected to a switching unit of the physical partition can be switched from one resource to another, for example, switching from memory to the processor core, and whether the physical partition maintains the status quo without physical resource adjustment. The adjustment unit should consider the physical resource configuration of all physical partitions of the computer system and decide whether to adjust the configuration of physical resources.

When the adjustment unit decides to reallocate physical resources, it needs to perform a reallocation handshake with the operating system or virtualization management software of each physical partition. After the reassignment handshake is completed, the operating system or the virtualization management software prepares for the switching of the physical resources, and the adjustment unit notifies the resource management unit and the communication management unit to perform physical resource reallocation.

Specifically, the adjusting unit notifies the operating system or the virtualization management software of each physical partition, which physical resources of the physical partition need to be reallocated, and when the operating system or the virtualization management software receives the physical resource reallocation notification of the adjusting unit, if necessary Switching the processor core from the current physical partition to another physical partition, the operating system or virtualization management software migrates all data on the processor core to other processor cores of the current physical partition; if the cache needs to be moved from the current physical partition To switch to another physical partition, you need to write the dirty data in the cache back to the memory. If you need to switch the memory from the current physical partition to another physical partition, you need to migrate the valid data in the memory.

A person skilled in the art can understand that all or part of the steps of implementing the above method embodiments may be implemented by hardware related to program instructions, and the foregoing program may be stored in a computer readable storage medium, when executed, The foregoing steps include the steps of the foregoing method embodiments; and the foregoing storage medium includes: a ROM, a RAM, a magnetic disk, or an optical disk, and the like, which can store various program codes. Quality.

Finally, it should be noted that the above embodiments are only for explaining the technical solutions of the present invention, and are not intended to be limiting thereof; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art will understand that The technical solutions described in the foregoing embodiments may be modified, or some or all of the technical features may be equivalently replaced; and the modifications or substitutions do not deviate from the technical solutions of the embodiments of the present invention. range.

Claims

Claim

A computer system, comprising: a physical resource, a plurality of on-chip networks, and a configurable interconnection module;

2. The computer system according to claim 1, wherein the configurable interconnection module comprises: a plurality of resource connection lines, a plurality of switching unit connection lines, and a resource management unit, wherein each of the resource connection lines respectively The physical resource is connected, and each of the switching unit connection lines is respectively connected to one switching unit of the on-chip network, and the plurality of resource connection lines and the plurality of switching unit connection lines are connected to each other in a crisscross manner. a first switch is disposed on the cross point, and the resource management unit controls the physical resource connected to the resource connection line at the cross point and the cross point by controlling the on and off of the first switch The switching unit connected to the upper switching unit is connected and disconnected.

The computer system according to claim 2, wherein the configurable interconnection module further comprises: a plurality of communication connection lines and a communication management unit, the plurality of communication connection lines and the plurality of resource connection lines Connected to each other in a crisscross manner, each cross point is provided with a second switch, the communication management unit controls the opening and closing of the second switch, and the second switch is used to control the cross point The corresponding switching unit is connected to disconnect and disconnect between the connected switching unit and other switching units.

The computer system according to any one of claims 1 to 3, wherein the physical resource comprises any one or a combination of the following resources: a plurality of processor cores, a cache, a memory, an external memory, Input/output I/O, acceleration unit.

The computer system according to any one of claims 1 to 3, wherein the resource connection line, the exchange unit connection line, and the communication connection line are optical waveguides, and the first switch And the second switch is an optical switch.

The computer system according to any one of claims 1 to 5, wherein the physical resource is divided into a configurable resource and a fixed resource, and the switching unit of each of the on-chip networks is divided into configurable a switching unit and a fixed switching unit, where the configurable resource is connected to the configurable switching unit of the network on chip by the configurable interconnection module, the fixed resource and the slice The fixed switching unit of the upper network is connected, and the connection relationship between the fixed resource and the fixed switching unit of the on-chip network is fixed.

The computer system according to any one of claims 1 to 6, wherein the configurable interconnection module further comprises:

The computer system according to claim 7, wherein the adjusting unit is specifically configured to: release physical resources of a physical partition with low resource utilization rate according to usage of the physical resources of the physical partitions, and increase Physical resources of physical partitions where physical resources are scarce.