WO2015158235A1 - Hot restart - Google Patents

Hot restart Download PDF

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Publication number
WO2015158235A1
WO2015158235A1 PCT/CN2015/076478 CN2015076478W WO2015158235A1 WO 2015158235 A1 WO2015158235 A1 WO 2015158235A1 CN 2015076478 W CN2015076478 W CN 2015076478W WO 2015158235 A1 WO2015158235 A1 WO 2015158235A1
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Prior art keywords
resetting
data
plane
control plane
data plane
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French (fr)
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Ruichang GAO
Cong Wang
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Hangzhou H3C Technologies Co Ltd
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Hangzhou H3C Technologies Co Ltd
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/24Resetting means
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/4401Bootstrapping

Definitions

  • FIG. 1 is a diagram illustrating hot restart operating mechanism from dimension of time according to an example of the present disclosure
  • FIG. 2 is a flowchart illustrating procedures of a hot restart method according to an example of the present disclosure
  • FIG. 3A is an architecture diagram of control plane and data plane according to an example of the present disclosure
  • FIG. 3B is an architecture diagram of control plane and data plane according to another example of the present disclosure.
  • FIG. 4 is a flowchart illustrating procedures of a method for resetting control plane and data plane according to an example of the present disclosure
  • FIG. 5 is a hardware architecture diagram of a device running a hot restart logic according to an example of the present disclosure.
  • FIG. 6 is a block diagram of the hot restart logic according to an example of the present disclosure.
  • a new hot restart solution is provided in the present disclosure, wherein the control plane and the data plane are not reset synchronously.
  • the reset timing of the data plane is delayed, so that services of forwarding data (such as data packets) can still work normally during the process for resetting the control plane. This approach may reduce packet loss.
  • FIG. 1 is a diagram illustrating hot restart operating mechanism from dimension of time according to an example of the present disclosure.
  • FIG. 1 shows an example in which a control plane and a data plane are reset synchronously when a hot restart of the data plane is required.
  • a longer time period (such as, T1 shown in FIG. 1) is required to reset the control plane and a shorter time period (such as, T2 shown in FIG. 1) is required to reset the data plane. Therefore, this may result in that resetting the data plane is completed quickly, and the data plane cannot normally perform data-forwarding services during the remaining (T1-T2) period of time because resetting the control plane is not completed yet and the data plane lacks data forwarding guidance of the control plane. As a result, packet loss may occur during the entire period of time T1.
  • the control plane is hot restarted first.
  • T1 the control plane is reset; and at this time, the data plane continues to forward data.
  • T2 the time period for resetting and initialization of the data plane. Since T2 is much smaller than T1, packet loss phenomenon can be reduced.
  • the hot restart method may include the following steps.
  • a network device resets a control plane according to a received hot restart command, and maintains a data plane in a data forwarding mode until the control plane is completely reset.
  • the control plane may be a central processing unit (CPU) of a data board in the network device, and the data plane may be a forwarding chip of the data board.
  • the forwarding chip may for example be an application specific integrated circuit (ASIC) , field programmable gate array (FPGA) etc.
  • ASIC application specific integrated circuit
  • FPGA field programmable gate array
  • control plane and the data plane can be distributed on different boards of a network device.
  • a CPU acting as the control plane can be located on a main control board
  • a forwarding chip acting as the data plane can be located on a line card board (a line card is an example of a data board) .
  • a line card is an example of a data board
  • the main control board and the other line card boards are required to be hot restarted simultaneously, resetting the CPU of the main control board will be performed first.
  • the forwarding chip of the line card board continues to perform data-forwarding services.
  • the examples of the hot restart method of the present disclosure can be applied to either of the abovementioned two architectures.
  • the hot restart method of the present disclosure may include the following steps.
  • a boot package is pre-decompressed and stored in advance.
  • the abovementioned system is an embedded operating system of the network device, such as Linux.
  • the boot package can be pre-decompressed to a high end memory of the board, wherein the high end memory is dedicated for storing the pre-decompressed boot package and its memory address won’t be occupied by other data. That is to say, this memory zone usually won’t be allocated to other software of the network device.
  • the control plane such as the CPU of the board
  • the boot package can be a first segment of code executed during resetting and initialization of the system, wherein the boot package is generally used to complete hardware initialization for basic operations, such as, clock setting, address space mapping, and stack pointer, etc.
  • the boot package may provide the minimum software guarantee for switching on sub-modules such as kernel and board support package (BSP) .
  • BSP kernel and board support package
  • control plane and the data plane can make use of the pre-decompressed boot package through the above pre-decompression operation in order to save decompression time and speed up the execution of the hot restart.
  • pre-decompression is not carried out.
  • the implementation of the block 404 does not rely on assistance of other external devices. As it does not rely on assistance of other external devices, this can improve the reliability of a hot restart.
  • the forwarding chip acting as the data plane is not usually reset.
  • the control plane may record software entries corresponding to hardware entries of the forwarding chip which acts as data plane. Afterwards, after the reboot is completed, the software entries are restored. If any problem occurs in the software entries read from the stored files or the sequence of the restored software entries is different from the sequence of the original software entries, the software entries will be inconsistent with the hardware entries, which will leave residual entries (such as, forwarding entries) in the forwarding chip.
  • the block 404 is not related to data storing and restoring actions mentioned in the conventional scheme, the abovementioned problems won’t exist.
  • the pre-decompressed boot package is moved to a pre-determined start position and executed, and then jump to an initial address of the system kernel initialization to execute the system kernel initialization.
  • the system package may include system programs, applications, data files, etc., for controlling the operation system of the control plane.
  • the hot restart process needs to start boot-loader in order to achieve a simple system initialization, and the boot-loader then downloads the boot package and the system package.
  • the boot package and the system package are downloaded from mass memory, such as hard disk, to the main memory (RAM) .
  • RAM main memory
  • the start of the boot-loader and downloading of the boot package can be saved in order to quickly load the boot package and the system package, which can further shorten the hot restart time of the scheme of the present disclosure to improve the efficiency of hot restart.
  • the action of determining whether loading the system package is completed can be implemented by determining whether the start code of the boot package is executed to the appropriate code position.
  • the initialization process of resetting the control plane is actually completed, and the data plane still executes the data-forwarding services during this process.
  • the forwarding chip of the line card board acting as the data plane still forwards data packets.
  • the data plane mainly includes the forwarding chip of the line card board, and the resetting operation is resetting the write logic of the forwarding chip.
  • the control plane detects whether resetting the data plane is completed or not. After resetting the data plane is completed, an initialization upon the data-forwarding operation of the data plane is performed.
  • the control plane re-builds a communication with the data plane.
  • the CPU acting as the control plane may use the PCI-express port to scan, detect, and set registers, thereby ensuring the PCI-express communication between the CPU (acting as the control plane) and forwarding chip (acting as the data plane) .
  • a hot restart logic 50 is provided in the present disclosure.
  • the hardware architecture of the device 2 running the hot restart logic may include a CPU 51, a storage 52, an interface 53, and an internal bus 54.
  • the hot restart logic 50 may further include a control plane resetting unit 502 and a data plane resetting unit 504.
  • the control plane resetting unit 502 is used for resetting the control plane according to a hot restart command.
  • the data plane resetting unit 504 is used for keeping the data plane to continue to forward data before the control plane is completely reset, and for resetting the data plane after the control plane is completely reset.
  • the action, executed by the control plane resetting unit 502, for resetting the control plane includes:
  • control plane resetting unit 502 is further used for:
  • control plane After the control plane completes the system package, jump to a start address for resetting the data plane, and notify the data plane resetting unit 504 to reset the data plane.
  • control plane resetting unit 502 is further used for:
  • the data plane resetting unit 504 During the period that the data plane resetting unit 504 is resetting the data plane, detecting whether resetting the data plane is completed or not; and after resetting the data plane is completed, performing an initialization upon the data plane.
  • the hot restart logic may further include a pre-decompressing unit 506 for pre-decompressing the boot package to high end memory of the hot restart logic’s device.
  • the control plane resetting unit 502 is further used for:
  • the hot restart logic 50 of the present disclosure should be understood as computer readable instructions stored in the storage.
  • the hot restart logic’s device is running the hot restart logic 50, its CPU may read and execute the computer readable instructions corresponding to the hot restart logic 50 stored in the storage so as to implement the following actions.
  • the CPU could read related instructions corresponding to the hot restart logic to execute the process of resetting the control plane, the process may include:
  • the CPU may read and execute the computer readable instructions corresponding to the hot restart logic 50 stored in the storage so as to implement the following actions.
  • the CPU may read and execute the computer readable instructions corresponding to the hot restart logic 50 stored in the storage so as to implement the following actions.
  • the CPU may read and execute the computer readable instructions corresponding to the hot restart logic 50 stored in the storage so as to implement the following actions.
  • Pre-decompressing the boot package to a high end memory of the hot restart logic After receiving the hot restart command, moving the pre-decompressed boot package to a pre-determined start position and jumping to an initial address of the system kernel initialization to execute the system kernel initialization.
  • the data plane by delaying the timing for resetting the data plane, the data plane is still able to maintain data-forwarding services based on its own stored entries during the process of resetting the control plane, and resetting the data plane is started after resetting the control plane is completed. Since a shorter time period is required for resetting and initialization of the data plane, and the data plane is able to immediately recover data-forwarding service based on the control plane, which can reduce packet loss.
  • the action for storing and restoring data is not required, which is suitable for various types of abnormal hot restart processes and active hot restart processes.
  • the figures are illustrations of an example, wherein the units or procedure shown in the figures are not necessarily essential for implementing the disclosure.
  • the units in the device in the example can be arranged in the device in the examples as described, or can be alternatively located in one or more devices different from that in the examples.
  • the units in the examples described can be combined into one module or further divided into a plurality of sub-units.

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
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  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Stored Programmes (AREA)

Abstract

A network device resets a control plane according to a received hot restart command, and the network device keeps a data plane to continue to forward data before the control plane is completely reset. After the control plane is completely reset, the network device resets the data plane.

Description

HOT RESTART Background
When one or more boards in a network device are performing a hot restart process, hardware such as its central processing unit (CPU) on a control plane and its forwarding chips on a data plane may be reset simultaneously. During the reset process, operations for storing data and restoring data may be involved to implement the hot restart process of the boards on the network device more smoothly.
Brief Description of Drawings
Features of the present disclosure are illustrated by way of an example and not limited in the following figure (s) , in which like numerals indicate like elements, in which:
FIG. 1 is a diagram illustrating hot restart operating mechanism from dimension of time according to an example of the present disclosure;
FIG. 2 is a flowchart illustrating procedures of a hot restart method according to an example of the present disclosure;
FIG. 3A is an architecture diagram of control plane and data plane according to an example of the present disclosure;
FIG. 3B is an architecture diagram of control plane and data plane according to another example of the present disclosure;
FIG. 4 is a flowchart illustrating procedures of a method for resetting control plane and data plane according to an example of the present disclosure;
FIG. 5 is a hardware architecture diagram of a device running a hot restart logic according to an example of the present disclosure; and
FIG. 6 is a block diagram of the hot restart logic according to an example of the present disclosure.
Detailed Description
For simplicity and illustrative purposes, a disclosure is described by referring mainly to an example thereof. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the disclosure. It will be readily apparent however, that the disclosure may be practiced without limitation to these specific details. In other instances, some methods and structures have not been described in detail so as not to unnecessarily obscure the disclosure. As used herein, the terms “a” and “an” are intended to denote at least one of a particular element, the term “includes” means includes but not limited to, the term “including” means including but not limited to, and the term “based on” means based at least in part on.
A new hot restart solution is provided in the present disclosure, wherein the control plane and the data plane are not reset synchronously. The reset timing of the data plane is delayed, so that services of forwarding data (such as data packets) can still work normally during the process for resetting the control plane. This approach may reduce packet loss.
Please refer to FIG. 1. FIG. 1 is a diagram illustrating hot restart operating mechanism from dimension of time according to an example of the present disclosure. Please refer to the top half of FIG. 1, which shows an example in which a control plane and a data plane are reset synchronously when a hot restart of the data plane is required. A longer time period (such as, T1 shown in FIG. 1) is required to reset the control plane and a shorter time period (such as, T2 shown in FIG. 1) is required to reset the data plane. Therefore, this may result in that resetting the data plane is completed quickly, and the data plane cannot normally perform data-forwarding services during the remaining (T1-T2) period of time because resetting the control plane is not completed yet and the data plane lacks data forwarding guidance of the control plane. As a result, packet loss may occur during the entire period of time T1.
Please refer to the lower half diagram of FIG. 1. In an example, the control plane is hot restarted first. During the period of time T1, the control plane is reset; and at this time, the data plane continues to forward data. After resetting and initialization of the control plane is completed, resetting and initialization of the data plane is began. In theory, the time period of packet loss will be shortened to T2, which is the time period for resetting and initialization of the data plane. Since T2 is much smaller than T1, packet loss phenomenon can be reduced.
Please refer to FIG. 2. In an example, a hot restart method is provided in the present disclosure. The hot restart method may include the following steps.
At block 202, a network device resets a control plane according to a received hot restart command, and maintains a data plane in a data forwarding mode until the control plane is completely reset.
At block 204, after the control plane is completely reset, the data plane is reset.
Please refer to FIG. 3A. In an example, the control plane may be a central processing unit (CPU) of a data board in the network device, and the data plane may be a forwarding chip of the data board. The forwarding chip may for example be an application specific integrated circuit (ASIC) , field programmable gate array (FPGA) etc. When the data board is hot restarted, resetting the forwarding chip (acting as the data plane) is delayed. As a result, during the time period for resetting the CPU (acting as the control plane) , the forwarding chip (acting as the data plane) is maintained a data forwarding mode, which means the data plane can still perform data-forwarding services normally based on its own stored entries. Such arrangement can avoid occurrence of packet loss as much as possible during this time period.
Please refer to FIG. 3B. In another example, the control plane and the data plane can be distributed on different boards of a network device. For example, a CPU acting as the control plane can be located on a main control board, and a forwarding chip acting as the data plane can be located on a line card board (a line  card is an example of a data board) . When the main control board and the other line card boards are required to be hot restarted simultaneously, resetting the CPU of the main control board will be performed first. At the same time, the forwarding chip of the line card board continues to perform data-forwarding services. The examples of the hot restart method of the present disclosure can be applied to either of the abovementioned two architectures.
Please refer to FIG. 4. In a more detailed example, the hot restart method of the present disclosure may include the following steps.
At block 402, a boot package is pre-decompressed and stored in advance.
In this example, the abovementioned system is an embedded operating system of the network device, such as Linux. When the network device works normally, the boot package can be pre-decompressed to a high end memory of the board, wherein the high end memory is dedicated for storing the pre-decompressed boot package and its memory address won’t be occupied by other data. That is to say, this memory zone usually won’t be allocated to other software of the network device. For example, after a boot or a hot restart is completed, the control plane (such as the CPU of the board) may pre-decompress and store the boot package to the high end memory of the board.
The boot package can be a first segment of code executed during resetting and initialization of the system, wherein the boot package is generally used to complete hardware initialization for basic operations, such as, clock setting, address space mapping, and stack pointer, etc. The boot package may provide the minimum software guarantee for switching on sub-modules such as kernel and board support package (BSP) . After the boot package is loaded, the boot process will jump to the entrance of OS’s kernel for guiding the loading and operation of the OS.
Because a lot of data within the boot package is compressed, the control plane and the data plane can make use of the pre-decompressed boot package through the above pre-decompression operation in order to save decompression time and  speed up the execution of the hot restart. In other examples the pre-decompression is not carried out.
At block 404, after receiving the hot restart command, all processes, interrupts, and direct memory accesses (DMA) of the control plane are stopped.
Note that, the implementation of the block 404 does not rely on assistance of other external devices. As it does not rely on assistance of other external devices, this can improve the reliability of a hot restart.
In the conventional scheme, the forwarding chip acting as the data plane is not usually reset. Before hot restarting, the control plane may record software entries corresponding to hardware entries of the forwarding chip which acts as data plane. Afterwards, after the reboot is completed, the software entries are restored. If any problem occurs in the software entries read from the stored files or the sequence of the restored software entries is different from the sequence of the original software entries, the software entries will be inconsistent with the hardware entries, which will leave residual entries (such as, forwarding entries) in the forwarding chip. On the other hand, since the block 404 is not related to data storing and restoring actions mentioned in the conventional scheme, the abovementioned problems won’t exist.
At block 406, the pre-decompressed boot package is moved to a pre-determined start position and executed, and then jump to an initial address of the system kernel initialization to execute the system kernel initialization.
At block 408, after the system kernel initialization is completed, the system package is loaded.
The system package may include system programs, applications, data files, etc., for controlling the operation system of the control plane.
In the related art, the hot restart process needs to start boot-loader in order to achieve a simple system initialization, and the boot-loader then downloads the boot package and the system package. Usually, the boot package and the system  package are downloaded from mass memory, such as hard disk, to the main memory (RAM) . By loading the boot package for initiating the kennel and the system package, restart of the operating system can be realized. In the example of the present disclosure above, since the boot package is already stored in the high end memory in advance, the start of the boot-loader and downloading of the boot package can be saved in order to quickly load the boot package and the system package, which can further shorten the hot restart time of the scheme of the present disclosure to improve the efficiency of hot restart.
At block 410, determining whether loading the system package is completed. If yes, go to block 412; otherwise, return to block 408.
In an example, the action of determining whether loading the system package is completed can be implemented by determining whether the start code of the boot package is executed to the appropriate code position. Furthermore, at blocks 402-410, the initialization process of resetting the control plane is actually completed, and the data plane still executes the data-forwarding services during this process. In an example, the forwarding chip of the line card board acting as the data plane still forwards data packets. After the resetting and initialization of the control plane is completed, the following blocks are performed to complete the resetting and initialization of the data plane.
At block 412, after the system package is loaded, jump to the start address for resetting the data plane, and then starting resetting the data plane.
The data plane mainly includes the forwarding chip of the line card board, and the resetting operation is resetting the write logic of the forwarding chip.
At block 414, during resetting the data plane, the control plane detects whether resetting the data plane is completed or not. After resetting the data plane is completed, an initialization upon the data-forwarding operation of the data plane is performed.
In an example, after resetting the data plane is completed, the control plane re-builds a communication with the data plane. The CPU acting as the control plane may use the PCI-express port to scan, detect, and set registers, thereby ensuring the PCI-express communication between the CPU (acting as the control plane) and forwarding chip (acting as the data plane) .
In response to the abovementioned method, a hot restart logic 50 is provided in the present disclosure. As shown in FIG. 5, the hardware architecture of the device 2 running the hot restart logic may include a CPU 51, a storage 52, an interface 53, and an internal bus 54. As shown in FIG. 6, the hot restart logic 50 may further include a control plane resetting unit 502 and a data plane resetting unit 504.
The control plane resetting unit 502 is used for resetting the control plane according to a hot restart command.
The data plane resetting unit 504 is used for keeping the data plane to continue to forward data before the control plane is completely reset, and for resetting the data plane after the control plane is completely reset.
The action, executed by the control plane resetting unit 502, for resetting the control plane includes:
Stopping all processes, interrupts, and DMA of the control plane, and performing system kernel initialization; and after the system kernel initialization is completed, loading a system package. Since no assistance of other device is required during this process, the action for storing and restoring data is not required, which can simplify the implementing mechanism of the present disclosure to improve reliability.
In an example, the control plane resetting unit 502 is further used for:
After the control plane completes the system package, jump to a start address for resetting the data plane, and notify the data plane resetting unit 504 to reset the data plane.
In an example, the control plane resetting unit 502 is further used for:
During the period that the data plane resetting unit 504 is resetting the data plane, detecting whether resetting the data plane is completed or not; and after resetting the data plane is completed, performing an initialization upon the data plane.
In an example the hot restart logic may further include a pre-decompressing unit 506 for pre-decompressing the boot package to high end memory of the hot restart logic’s device.
The control plane resetting unit 502 is further used for:
Under a condition that the hot restart command is received and it’s necessary to perform system kernel initialization, moving the pre-decompressed boot package to a pre-determined start position and jump to an initial address for performing system kernel initialization.
The following example is implemented by software, which further describes how the hot restart logic’s device runs the hot restart logic. In this example, the hot restart logic 50 of the present disclosure should be understood as computer readable instructions stored in the storage. When the hot restart logic’s device is running the hot restart logic 50, its CPU may read and execute the computer readable instructions corresponding to the hot restart logic 50 stored in the storage so as to implement the following actions.
Resetting the control plane according to a received hot restart command.
Keeping the data plane to continue to forward data before the control plane is completely reset.
After the control plane is completely reset, resetting the data plane.
In an example, the CPU could read related instructions corresponding to the hot restart logic to execute the process of resetting the control plane, the process may include:
Stopping all processes, interrupts, and DMA of the data board (acting as the control plane) , and performing system kernel initialization; and
after the system kernel initialization is completed, loading a system package.
In an example, the CPU may read and execute the computer readable instructions corresponding to the hot restart logic 50 stored in the storage so as to implement the following actions.
After loading of the system package is completed, jump to a start address for resetting the data plane so as to reset the data plane.
In an example, the CPU may read and execute the computer readable instructions corresponding to the hot restart logic 50 stored in the storage so as to implement the following actions.
During the period of resetting the data plane, detecting whether resetting the data plane is completed or not; after resetting the data plane is completed, performing an initialization upon the data plane.
In an example the CPU may read and execute the computer readable instructions corresponding to the hot restart logic 50 stored in the storage so as to implement the following actions.
Pre-decompressing the boot package to a high end memory of the hot restart logic’s device. After receiving the hot restart command, moving the pre-decompressed boot package to a pre-determined start position and jumping to an initial address of the system kernel initialization to execute the system kernel initialization.
In the scenario of the present disclosure, by delaying the timing for resetting the data plane, the data plane is still able to maintain data-forwarding services based on its own stored entries during the process of resetting the control plane, and resetting the data plane is started after resetting the control plane is completed. Since a shorter time period is required for resetting and initialization of the data plane, and the data plane is able to immediately recover data-forwarding service based on the control plane, which can reduce packet loss. The action for storing and restoring data is not required, which is suitable for various types of abnormal hot restart processes and active hot restart processes.
The figures are illustrations of an example, wherein the units or procedure shown in the figures are not necessarily essential for implementing the disclosure. The units in the device in the example can be arranged in the device in the examples as described, or can be alternatively located in one or more devices different from that in the examples. The units in the examples described can be combined into one module or further divided into a plurality of sub-units.
Although the flowcharts described show a specific order of execution, the order of execution may differ from that which is depicted. For example, the order of execution of two or more blocks may be changed relative to the order shown. Also, two or more blocks shown in succession may be executed concurrently or with partial concurrence. All such variations are within the scope of the disclosure.
Throughout the disclosure, the word "comprise" , or variations such as "comprises" or "comprising" , will be understood to imply the inclusion of a stated element, integer, block, or group of elements, integers, block, but not the exclusion of any other element, integer or block, or group of elements, integers or blocks.
Numerous variations and/or modifications may be made to the above-described examples, without departing from the broad general scope of the disclosure. The examples are, therefore, to be considered in all respects as illustrative and not restrictive.

Claims (10)

  1. A hot restart method, comprising:
    a network device resetting a control plane according to a received hot restart command, and maintaining a data plane in a data forwarding mode until the control plane is completely reset; and
    after the control plane is completely reset, resetting the data plane.
  2. The method of claim 1, wherein resetting the control plane comprises:
    stopping all processes, interrupts, and direct memory access (DMA) of the control plane, and performing system kernel initialization; and
    after the system kernel initialization is completed, loading a system package.
  3. The method of claim 2, further comprising:
    before hot restarting, pre-decompressing a boot package to a high end memory in advance;
    after receiving the hot restart command, moving the pre-decompressed boot package to a predetermined start position and executing the pre-decompressed boot package, and then jumping to an initial address of the system kernel initialization to execute the system kernel initialization.
  4. The method of claim 2, further comprising:
    after the control plane completes loading the system package, jumping to a start address for resetting the data plane, and then start to reset the data plane.
  5. The method of claim 4, further comprising:
    during resetting the data plane, the control plane detecting whether resetting of the data plane is completed or not;
    after resetting of the data plane is completed, performing an initialization upon the data forwarding operation of the data plane.
  6. A network device having a CPU and a storage for storing a hot restart logic, wherein the CPU executes machine readable instructions corresponding to the hot restart logic to cause the CPU to:
    reset a control plane according to a received hot restart command;
    maintain a data plane in a data forwarding mode until the control plane is completely reset; and
    after the control plane is completely reset, reset the data plane.
  7. The network device of claim 6, wherein the CPU executes machine readable instructions corresponding to the hot restart logic to cause the CPU to reset the control plane comprises:
    stopping all processes, interrupts, and DMA of the control plane, and performing system kernel initialization; and
    after the system kernel initialization is completed, loading a system package.
  8. The network device of claim 7, wherein the CPU further executes machine readable instructions corresponding to the hot restart logic to cause the CPU to:
    after the control plane completes loading the system package, jump to a start address for resetting the data plane, and then start resetting the data plane.
  9. The network device of claim 7, wherein the CPU further executes machine readable instructions corresponding to the hot restart logic to cause the CPU to:
    during resetting of the data plane, detect whether resetting the data plane is completed or not;
    after resetting of the data plane is completed, performing an initialization upon the data forwarding operation of the data plane.
  10. The network device of claim 9, wherein the CPU further executes machine readable instructions corresponding to the hot restart logic to cause the CPU to:
    pre-decompress a boot package to a high end memory of the hot restart logic;
    after receiving the hot restart command, move the pre-decompressed boot package to a predetermined start position, and then jump to an initial address of the system kernel initialization to execute the system kernel initialization.
PCT/CN2015/076478 2014-04-14 2015-04-13 Hot restart Ceased WO2015158235A1 (en)

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CN117792904A (en) * 2022-09-28 2024-03-29 华为技术有限公司 A software upgrade method, related equipment and network
CN119473709A (en) * 2024-10-12 2025-02-18 苏州元脑智能科技有限公司 Device restart method, device, equipment and medium

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