WO2015056321A1 - ノイズフィルタ - Google Patents
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- WO2015056321A1 WO2015056321A1 PCT/JP2013/078154 JP2013078154W WO2015056321A1 WO 2015056321 A1 WO2015056321 A1 WO 2015056321A1 JP 2013078154 W JP2013078154 W JP 2013078154W WO 2015056321 A1 WO2015056321 A1 WO 2015056321A1
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- 239000000758 substrate Substances 0.000 claims abstract description 294
- 239000003990 capacitor Substances 0.000 claims abstract description 162
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- 238000000926 separation method Methods 0.000 abstract 1
- 101100489717 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) GND2 gene Proteins 0.000 description 45
- 101100489713 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) GND1 gene Proteins 0.000 description 43
- 230000000052 comparative effect Effects 0.000 description 24
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- 238000010586 diagram Methods 0.000 description 16
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- 230000001629 suppression Effects 0.000 description 8
- 239000004020 conductor Substances 0.000 description 5
- 238000000034 method Methods 0.000 description 4
- 238000007667 floating Methods 0.000 description 3
- 239000002344 surface layer Substances 0.000 description 3
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H1/00—Constructional details of impedance networks whose electrical mode of operation is not specified or applicable to more than one type of network
- H03H1/0007—Constructional details of impedance networks whose electrical mode of operation is not specified or applicable to more than one type of network of radio frequency interference filters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/12—Arrangements for reducing harmonics from ac input or output
- H02M1/126—Arrangements for reducing harmonics from ac input or output using passive filters
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H1/00—Constructional details of impedance networks whose electrical mode of operation is not specified or applicable to more than one type of network
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
- H03H7/01—Frequency selective two-port networks
- H03H7/0115—Frequency selective two-port networks comprising only inductors and capacitors
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
- H03H7/01—Frequency selective two-port networks
- H03H7/09—Filters comprising mutual inductance
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
- H03H7/42—Networks for transforming balanced signals into unbalanced signals and vice versa, e.g. baluns
- H03H7/425—Balance-balance networks
- H03H7/427—Common-mode filters
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H1/00—Constructional details of impedance networks whose electrical mode of operation is not specified or applicable to more than one type of network
- H03H2001/0021—Constructional details
- H03H2001/0035—Wound magnetic core
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H1/00—Constructional details of impedance networks whose electrical mode of operation is not specified or applicable to more than one type of network
- H03H2001/0021—Constructional details
- H03H2001/0085—Multilayer, e.g. LTCC, HTCC, green sheets
Definitions
- the present invention relates to a noise filter that is inserted into an AC power supply line or an input current smoothed DC line of an electric device such as an AC / DC converter or an inverter.
- Patent Document 1 a technique for improving the noise attenuation characteristics of such a noise filter.
- the technique disclosed in Patent Document 1 is a noise filter composed of a common mode choke coil, a capacitor, and the like, in which a structure is maintained between the two common mode chokes at a ground potential such as a vehicle chassis or a casing. It has been proposed to insert a conductor connected to an object.
- the above-described conventional noise filter has the following problems. That is, as described above, the noise filter according to the prior art uses the stray capacitance generated between the common mode choke coil and the conductor as a line bypass capacitor. In between, a capacitor is connected in parallel. As a result, the cut-off frequency moves to the low frequency side, so the noise attenuation characteristics of the noise filter improve in the low frequency band, but the impedance of the capacitor component (1 / j ⁇ C) in the high frequency band. Therefore, there is a route in which the noise current that has flowed to the ground potential portion due to a certain capacitor returns from the ground potential portion to the main circuit pattern via the other capacitors. The attenuation characteristic will be deteriorated.
- the noise targeted by the above-described conventional noise filter is conduction noise, and the influence of radiation noise is not considered.
- the noise filter when there is a noise source near the noise filter, radiation noise from the noise source is mixed into the main circuit pattern. Therefore, even if the conventional noise filter can attenuate the conduction noise, radiation noise from the outside is mixed into the main circuit pattern after passing through the filter, and the EMC performance is deteriorated.
- the noise attenuation characteristics of noise filters have not been analyzed in detail, and since they have been dealt with mainly by cut-and-try, it was not possible to determine what caused the deterioration of the noise attenuation characteristics.
- the cause of the deterioration of the noise attenuation characteristic of the conventional noise filter could be determined as described above.
- the present invention has been made to solve the above-described problems in the conventional noise filter, and considers not only conduction noise but also radiation noise without using a special circuit.
- An object of the present invention is to provide a noise filter capable of improving noise attenuation characteristics.
- the noise filter according to the present invention is: A board, a coil mounted on the board, a board ground pattern formed on the board, and a capacitor mounted on the board and connected between the coil and the board ground pattern to attenuate noise
- a noise filter inserted between a power supply side and a load side of a main circuit to be caused to attenuate the noise of the main circuit by a filter circuit constituted by the coil and the capacitor,
- the substrate ground pattern is separated into a plurality of substrate ground patterns,
- the plurality of separated substrate ground patterns are respectively connected to a common ground member existing outside the substrate, Further, the plurality of substrate ground patterns are configured by a solid pattern, and are arranged such that intervals between adjacent substrate ground patterns are not more than a predetermined distance.
- the substrate ground pattern is separated into a plurality of substrate ground patterns, and the plurality of separated substrate ground patterns are connected to a common ground member existing outside the substrate, respectively,
- the substrate ground pattern is configured by a solid pattern and is arranged so that the distance between adjacent substrate ground patterns is equal to or less than a predetermined distance, so that noise attenuation can be achieved without using a special circuit. Characteristics can be improved.
- FIG. 6 is an equivalent circuit for explaining the operation of the noise filter according to Comparative Example 1.
- the noise filter by the comparative example 1 it is explanatory drawing which showed the electric current path
- the noise filter by the comparative example 1 it is explanatory drawing which showed the current path
- the noise filter by Embodiment 1 of this invention it is explanatory drawing which shows the current pathway of a noise current.
- FIG. 12 is an equivalent circuit for explaining the operation of the noise filter according to Comparative Example 2.
- the noise filter by Embodiment 2 of this invention it is the figure explaining the current pathway of the noise current.
- the noise filter by Embodiment 2 of this invention it is the figure explaining the current pathway of the noise current.
- the noise filter by Embodiment 3 of this invention it is the figure explaining the current pathway of the noise current.
- the noise filter by Embodiment 3 of this invention it is the figure explaining the current pathway of the noise current.
- FIG. 1 is a perspective view schematically showing a noise filter according to Embodiment 1 of the present invention.
- the noise filter NF1 includes a first common mode choke coil L1 and a second common mode choke coil L2 as coils mounted on the surface of a filter substrate P as a substrate.
- the noise filter NF1 includes a first line bypass capacitor C1, a second line bypass capacitor C2, a third line bypass capacitor C3, and a fourth line bypass capacitor as capacitors mounted on the surface of the filter substrate P.
- first substrate ground pattern GND1, a second substrate ground pattern GND2, and a third substrate ground pattern GND3 as substrate ground patterns.
- Each of these substrate ground patterns GND1, GND2, GND3 is connected to a ground plane G which is a structure maintained at a ground potential such as a chassis of a vehicle, but is electrically connected to the surface of the filter substrate P. Have been separated.
- the substrate ground patterns GND1, GND2, and GND3 are solid patterns, and the distance between adjacent substrate ground patterns (GND1 and GND2, GND2 and GND3) is equal to or less than a predetermined distance so as not to be more than a half wave of a predetermined electromagnetic wave. It is arranged to become.
- the first substrate ground pattern GND1, the second substrate ground pattern GND2, and the third substrate ground pattern GND3 can be configured by printing a conductor on the surface of the filter substrate P.
- the filter substrate P is a multilayer substrate, and has a pattern structure in which the substrate ground pattern is an outer layer and the main circuit pattern is an inner layer.
- the first common mode choke coil L1 is placed on the first substrate ground pattern GND1 and the second substrate ground pattern GND2, and the second common mode choke coil L2 is connected to the second substrate ground pattern GND1.
- the substrate grounding pattern GND2 and the third substrate grounding pattern GND3 are straddled over them.
- the first line bypass capacitor C1 and the second line bypass capacitor C2 are disposed on the first substrate ground pattern GND1, and the third line bypass capacitor C3 and the fourth line bypass capacitor C4 are the second line bypass capacitor C4.
- the fifth line bypass capacitor C5 and the sixth line bypass capacitor C6 are disposed on the substrate ground pattern GND3.
- the fifth line bypass capacitor C5 and the sixth line bypass capacitor C6 are disposed on the third substrate ground pattern GND3.
- a noise filter NF1 shown in FIG. 1 is connected to an input side main circuit pattern which is an input side and a power supply side on the lower left side of FIG. 1, and a load side main circuit which is a load side and an electric equipment side on the upper right side. Connected to the pattern.
- FIG. 2 is an equivalent circuit diagram for explaining the operation of the noise filter according to the first embodiment of the present invention.
- the noise filter NF1 according to the first embodiment of the present invention has an input side connected to the input side main circuit patterns LI and NI, and a load side connected to the load side main circuit patterns LL and NL.
- the first common mode choke coil L1 and the second common mode choke coil L2 are connected in series between the input side and the load side of the noise filter NF1.
- the first line bypass capacitor C1 is connected between the input side main circuit pattern NI and the first substrate ground pattern GND1.
- the second line bypass capacitor C2 is connected between the input side main circuit pattern LI and the first substrate ground pattern GND1.
- the third line bypass capacitor C3 is connected between one interconnection part NC of the first and second common mode choke coils L1 and L2 and the second substrate ground pattern GND2.
- the fourth line bypass capacitor C4 is connected between the other interconnect LC of the first and second common mode choke coils L1 and L2 and the second substrate ground pattern GND2.
- the fifth line bypass capacitor C5 is connected between the load-side main circuit pattern NL and the third substrate ground pattern GND3.
- the sixth line bypass capacitor C6 is connected between the load side main circuit pattern LL and the third substrate ground pattern GND3.
- the first substrate ground pattern GND1 is connected to the ground plane G by a first connecting member SC1 such as a screw.
- the second substrate ground pattern GND2 is connected to the ground plane G by a second connecting member SC2 such as a screw.
- the third substrate ground pattern GND3 is connected to the ground plane G by a third connection member SC3 such as a screw.
- the ground plane G is connected to a structure maintained at a ground potential such as a vehicle chassis or a casing.
- the substrate ground pattern provided on the outer layer of the filter substrate P is divided into the first to third substrate ground patterns GND1, which are electrically separated from each other.
- the first and second line bypass capacitors C1 and C2 are connected between the front (input side) of the first common mode choke coil L1 and the first substrate ground pattern GND1.
- Third and fourth line bypass capacitors C3 and C4 are connected between the interconnections NC and NL of the first and second common mode choke coils L1 and L2 and the second substrate ground pattern GND2.
- the fifth and sixth line bypass capacitors C are located behind the common mode choke coil L2 (load side) and the third substrate ground pattern GND3.
- C6, and the first to third substrate ground patterns GND1, GND2, GND3 electrically separated from each other are solid patterns, and the distance between adjacent substrate ground patterns, that is, the first substrate ground pattern
- the distance between the pattern GND1 and the second substrate ground pattern GND2 and the distance between the second substrate ground pattern GND2 and the third substrate ground pattern GND3 are arranged to be equal to or less than a predetermined distance, respectively. It is characterized by that.
- FIG. 3 is a perspective view schematically showing the noise filter NFC1 according to Comparative Example 1
- FIG. 4 is an equivalent circuit for explaining the operation of the noise filter according to Comparative Example 1, which is shown in FIGS.
- the same or corresponding parts as those of the noise filter according to the first embodiment are denoted by the same reference numerals.
- FIG. 3 is a perspective view schematically showing the noise filter NFC1 according to Comparative Example 1
- FIG. 4 is an equivalent circuit for explaining the operation of the noise filter according to Comparative Example 1, which is shown in FIGS.
- the same or corresponding parts as those of the noise filter according to the first embodiment are denoted by the same reference numerals.
- the noise filter NFC1 according to the comparative example 1 includes a single substrate common ground pattern GND4 continuous on the filter substrate P, and includes first and second common mode choke coils L1 and L2,
- the first to sixth line bypass capacitors C1 to C6 are mounted on a common substrate ground pattern GND4, and are connected to the substrate common ground pattern GND4 via first to third connection members SC1 to SC3 such as screws. It is connected to the ground plane G.
- FIG. 4 it is assumed that there is a noise source V1 on the load side LL and NL side.
- R1 is a noise source resistance.
- Other configurations are the same as those in the first embodiment.
- FIG. 5 is an explanatory diagram showing an ideal current path of the noise current in the noise filter according to the comparative example 1.
- the value of the noise current generated from the noise source V1 is determined by the impedance ratio between the common mode choke coil and the line bypass capacitor.
- the wiring impedance on the load side of the noise filter NFC1, that is, the impedance ZL of the second common mode choke coil L2, is expressed by the following equation (1), and the impedances ZC of the fifth and sixth line bypass capacitors C5 and C6 are Is represented by the following formula (2).
- ZL ZC
- part of the noise current generated from the noise source V1 flows through the first noise current path I1 and is returned to the noise source V1.
- the impedance ZC of the third and fourth line bypass capacitors C3 and C4 is expressed by the above-described equation (2).
- ZL the impedance of the third and fourth line bypass capacitors C3 and C4
- the noise current generated from the noise source V1 flows via the third noise current path I3 and is returned to the noise source V1.
- the noise current flowing through the third noise current path I3 is the wiring impedance on the input side of the noise filter NFC1, that is, the impedance ZL of the first common mode choke coil L1, and the first and second line bypass capacitors C1.
- C2 is determined by the impedance ratio with the impedance ZC.
- the impedance ZL of the first common mode choke coil L1 is expressed in the same manner as the above-described equation (1)
- the impedance ZC of the first and second line bypass capacitors C1 and C2 is expressed by the above-described equation (2).
- the ideal current path of the noise current in the noise filter according to Comparative Example 1 is as shown in FIG. 5 as described above.
- a connection member such as a screw
- a specific impedance exists between the board common ground pattern GND4 and the ground plane G. Therefore, the noise current is a path shown in FIG. Will flow through a different noise current path.
- FIG. 6 is an explanatory diagram showing a current path of an actual noise current in the noise filter according to the first comparative example.
- the substrate ground pattern on the filter substrate P is set to one substrate common ground pattern GND4 as described above, for example, the third to sixth line bypass capacitors C3, C4, C5, Part of the noise current flowing through the common substrate ground pattern GND4 through C6 is caused by the impedance of the first to third connecting members SC1, SC2, SC3 formed of screws or the like via the common substrate ground pattern GND4.
- the first and second line bypass capacitors C1 and C2 having a small impedance pass through the fifth noise current path I5 and the sixth noise current path I6 flowing to the input side of the filter substrate P, and the noise filter NFC1 To the input side of the main circuit, that is, the power supply side of the main circuit.
- the common mode choke has a floating electrostatic capacitance.
- part of the noise current flowing through the fifth and sixth line bypass capacitors C5 and C6 is passed through the substrate common ground pattern GND4, and the third and fourth line bypass capacitors C3, C4, and The fourth noise current path I4 that flows through the stray capacitance of the first common mode choke coil L1 to the input side of the noise filter NFV1 flows.
- the fourth to sixth noise current paths I4, I5, and I6 are used.
- a noise current flows from the input side of the noise filter NFC1 to the power supply side of the main circuit, and this noise current causes the noise attenuation characteristics of the noise filter to deteriorate in the high frequency band.
- FIG. 7 is an explanatory diagram showing a current path of a noise current in the noise filter according to the first embodiment of the present invention.
- the substrate ground patterns provided on the filter substrate P as described above are divided into the first to third substrate ground patterns that are not electrically connected to each other on the filter substrate P. It is composed of GND1, GND2, and GND3.
- the fourth to sixth noise current paths I4, I5, I6 as in the case of the noise filter NFC1 according to the comparative example 1 are not formed, and the first to the first noise current paths shown in FIG. 3 noise current paths I1, I2, and I3 are formed, and the noise current generated in the noise source V1 is returned from the first to third connection members SC1, SC2, and SC3 to the noise source V1 via the ground plane G.
- the surface layer pattern is the first to third substrate ground patterns GND1, GND2, GND3 as the substrate ground pattern, and each substrate ground pattern is a solid pattern, so that the radiation noise is the first to third of the surface layer. Since it falls to the ground plane G via the substrate ground patterns GND1, GND2, and GND3, it is possible to prevent noise from entering the main circuit pattern.
- first and second substrate ground patterns GND1 and GND2 and the distance between the second and third substrate ground patterns GND2 and GND3 are separated, half of a predetermined electromagnetic wave is generated. Since the electromagnetic wave passes above the wavelength, in order to prevent this, the interval between the first substrate ground pattern GND1 and the second substrate ground pattern GND2 adjacent to each other, and the second substrate ground pattern GND2 and the third substrate.
- An interval between the ground pattern GND3 and the ground pattern GND3 is arranged to be equal to or smaller than a predetermined distance, and radiation noise having a frequency lower than a predetermined frequency is prevented from being mixed into the main circuit pattern.
- the noise filter NF1 uses the first to third substrate ground patterns GND1 that are electrically separated from the substrate ground pattern provided on the outer layer of the filter substrate P.
- GND2 and GND3 and the first and second line bypass capacitors C1 and C2 are connected between the front (input side) of the first common mode choke coil L1 and the first substrate ground pattern GND1.
- the third and fourth line bypass capacitors C3 and C4 are connected between the interconnections NC and NL of the first and second common mode choke coils L1 and L2 and the second substrate ground pattern GND2. Between the second common mode choke coil L2 (load side) and the third substrate ground pattern GND3.
- the first to third substrate ground patterns GND1, GND2, and GND3 that are electrically separated from each other are solid patterns, and between the adjacent first substrate ground pattern GND1 and second substrate ground pattern GND2.
- the distance and the distance between the second substrate ground pattern GND2 and the third substrate ground pattern GND3 are arranged to be equal to or less than a predetermined distance.
- the noise attenuation characteristic of the noise filter NF1 with respect to radiation noise does not deteriorate.
- FIG. FIG. 8 is a perspective view schematically showing a noise filter according to Embodiment 2 of the present invention.
- the filter substrate P includes first and second choke coils L1, L2, first to fourth line bypass capacitors C1, C2, C3, C4, and first substrate ground patterns.
- second substrate ground patterns GND1 and GND2 are provided.
- the filter circuit F1 including the first choke coil L1 and the first and second line bypass capacitors C1 and C2 is used as the first filter circuit, and the first choke coil L2 and the third and fourth lines.
- the filter circuit F2 including the bypass capacitors C3 and C4 is referred to as a second filter circuit.
- the first substrate ground pattern GND1 and the second substrate ground pattern GND2 are separated for each of the first and second filter circuits F1 and F2, and are not electrically connected to each other on the filter substrate P. .
- the first substrate ground pattern GND1 is connected to the ground plane G by a first connection member SC1 configured with screws or the like
- the second substrate ground pattern GND2 is a second connection member SC2 configured with screws or the like.
- the first substrate ground pattern GND1 and the second substrate ground pattern GND2 are electrically connected to each other via the first and second connection members SC1, SC2 and the ground plane G.
- the ground plane G is connected to a structure maintained at a ground potential such as a vehicle chassis or a casing.
- the first and second substrate ground patterns GND1 and GND2 are solid patterns, and the distance between the adjacent first and second substrate ground patterns GND1 and GND2 is as follows.
- the filter substrate P is a multi-layer substrate, the first and second substrate ground patterns are outer layers, and the main circuit pattern is an inner layer. Pattern structure.
- the first common mode choke coil L1 is placed on the first substrate ground pattern GND1, and the second common mode choke coil L2 is placed on the second substrate ground pattern GND2.
- the first line bypass capacitor C1 and the second line bypass capacitor C2 are disposed on the first substrate ground pattern GND1, and the third line bypass capacitor C3 and the fourth line bypass capacitor C4 are the second line bypass capacitor C4. Arranged on the substrate ground pattern GND2.
- the noise filter NF1 shown in FIG. 8 is connected to the input side main circuit pattern which is the input side and the power supply side on the lower left side of FIG. 8, and the load side main circuit which is the load side and the electric equipment side on the upper right side. Connected to the pattern.
- FIG. 9 is an equivalent circuit diagram for explaining the operation of the noise filter according to the second embodiment of the present invention.
- the noise filter NF2 according to the second embodiment of the present invention has an input side connected to the input side main circuit patterns LI and NI, and a load side connected to the load side main circuit patterns LL and NL.
- the first common mode choke coil L1 and the second common mode choke coil L2 are connected in series between the input side and the load side of the noise filter NF2.
- the input side main circuit pattern LI and the load side main circuit pattern LL are connected via the first and second common mode choke coils L1 and L2, and the input side main circuit pattern NI and the load side main circuit pattern NL are The first and second common mode choke coils L1 and L2 are connected to each other.
- the first line bypass capacitor C1 is connected between one interconnection part NC of the first and second common mode choke coils L1 and L2 and the first substrate ground pattern GND1.
- the second line bypass capacitor C2 is connected between the other interconnect LC of the first and second common mode choke coils L1 and L2 and the first substrate ground pattern GND1.
- the third line bypass capacitor C3 is connected between the load side main circuit pattern NL and the second substrate ground pattern GND2.
- the fourth line bypass capacitor C4 is connected between the load side main circuit pattern LL and the second substrate ground pattern GND2.
- the first and second line bypass capacitors C1 and C2 in the first filter circuit F1 are disposed on the load side of the first common mode choke coil L1, and are connected to the second filter circuit F2.
- the third and fourth line bypass capacitors C3 and C4 are arranged on the load side of the second common mode choke coil L2, assuming that the noise source is on the load side of the main circuit. If the noise source is assumed to be on the input side of the main circuit, the first and second line bypass capacitors C1 and C2 in the first filter circuit F1 are connected to the first common mode.
- the third and fourth line bypass capacitors C3 and C4 arranged on the input side of the choke coil L1 in the second filter circuit F2 are the second common mode choke coil. It would be located in the second input.
- FIG. 10 is a perspective view schematically showing a noise filter according to the second comparative example.
- the noise filter NFC2 of Comparative Example 2 shown in FIG. 10 has the same filter configuration as the noise filter NF2 of Embodiment 2 shown in FIG. 8 described above, but the substrate ground pattern on the filter substrate P is common to one substrate. It is different from the noise filter NF2 of the second embodiment in that it is configured by the ground pattern GND3.
- FIG. 11 is an equivalent circuit for explaining the operation of the noise filter NFC2 according to the second comparative example.
- the noise filter NFC2 since the impedance of a connection member such as a screw exists, a specific impedance exists between the substrate common ground pattern GND3 and the ground plane G.
- the first common mode choke coil L1 has a floating electrostatic capacitance of the winding. For this reason, when the substrate ground pattern is composed of one substrate common ground pattern GND3 as in the noise filter NFC2 according to the comparative example 2, the noise current generated in the noise source V1 as shown by the dashed arrow in FIG.
- a part of the first filter circuit F1 includes the second common mode choke coil L2, the third and fourth line bypass capacitors C3 and C4, and the substrate common ground pattern GND3.
- FIG. 12 is a diagram for explaining the current path of the noise current in the noise filter according to the second embodiment of the present invention.
- the substrate ground pattern provided on the filter substrate P as described above is divided into the first and second substrate ground patterns which are not mutually connected on the filter substrate P. It is comprised by GND1 and GND2. Accordingly, the seventh noise current path I7 as in the case of the noise filter NFC2 according to the comparative example 2 is not formed, and the eighth and ninth noise current paths I8 and I9 are formed, and the noise current generated in the noise source V1. Are returned from the first and second connecting members SC1, SC2 via the ground plane G to the noise source V1.
- the eighth noise current path I8 includes the first common mode choke coil L1, the first and second line bypass capacitors C1, C2, the first substrate ground pattern GND1, the first connection member SC1, and
- the ninth noise current path I9 is a path to the noise source V1 through the ground plane G
- the ninth noise current path I9 is the second common mode choke coil L2, the third and fourth line bypass capacitors C3 and C4, and the second substrate. This is a path that reaches the noise source V1 via the ground pattern GND2, the second connection member SC2, and the ground plane G.
- an interval between the first substrate ground pattern GND1 and the second substrate ground pattern GND2 adjacent to each other is arranged to be a predetermined distance or less, and radiation noise of a predetermined frequency or less is the main circuit pattern. It is suppressed that it mixes in.
- the substrate ground pattern provided on the outer layer of the filter substrate P is divided into the first and second substrate ground patterns GND1 that are electrically separated from each other. , GND2, and the first and second line bypass capacitors C1, C2 between the interconnections NC, NL of the first and second common mode choke coils L1, L2 and the first substrate ground pattern GND1. And the third and fourth line bypass capacitors C3 and C4 are connected between the rear side (load side) of the second common mode choke coil L2 and the second substrate ground pattern GND2. A noise current path from the input side of the filter NF2 to the power supply side of the main circuit is not formed. Therefore, the noise current generated in the noise source V1 is the eighth.
- the first and second substrate ground patterns GND1 and GND2 that are electrically separated from each other are solid patterns, and the distance between the adjacent first substrate ground pattern GND1 and second substrate ground pattern GND2 Is arranged so as to be equal to or less than a predetermined distance, so that radiation noise is prevented from being mixed into the main circuit pattern, so that the noise attenuation characteristic of the noise filter NF2 against radiation noise is not deteriorated.
- FIG. 13 is a characteristic diagram showing the noise attenuation characteristics of the noise filter.
- the horizontal axis indicates frequency [Hz]
- the vertical axis indicates Gain (noise attenuation amount) [dB]
- the gain is smaller as the value is smaller.
- Noise attenuation is large.
- a characteristic X1 represents a noise attenuation characteristic in a conventional noise filter having a common substrate common ground pattern on the substrate
- a characteristic X2 represents the noise filter according to the second embodiment of the present invention.
- the noise attenuation characteristics when used are shown.
- FIG. 13 it can be seen that the noise filter attenuation characteristic is improved by adopting the configuration of the noise filter according to the second embodiment of the present invention. The same applies to the noise filter according to the first embodiment of the present invention described above.
- the filter circuit constituted by the coil and the capacitor has the two-stage configuration.
- the present invention is not limited to this, and the filter circuit has three or more stages. Is equally effective.
- FIG. 14 is a perspective view schematically showing a noise filter according to Embodiment 3 of the present invention.
- the filter substrate P includes first and second common mode choke coils L1, L2, first to fourth line bypass capacitors C1, C2, C3, C4, first and second. Board ground patterns GND4 and GND5, and third and fourth board ground patterns GND6 and GND7 are provided.
- the first choke coil L1 is disposed over the first and second substrate ground patterns GND4 and GND5
- the second choke coil L2 includes the third and fourth substrate ground patterns GND6, It is arranged over GND7.
- the first to fourth substrate ground patterns GND4, GND5, GND6, and GND7 are divided from each other and are not electrically connected to each other on the filter substrate P.
- the first substrate ground pattern GND4 is connected to the ground plane G by a first connection member SC1 configured with screws or the like
- the second substrate ground pattern GND5 is a second connection member SC2 configured with screws or the like.
- the third substrate ground pattern GND6 is connected to the ground plane G by a third connection member SC3 configured with screws or the like
- the fourth substrate ground pattern GND7 is configured with screws or the like.
- the fourth connection member SC4 is connected to the ground plane G.
- the first to fourth substrate ground patterns GND4, GND5, GND6, and GND7 are electrically connected to the first to fourth connection members SC1, SC2, SC3, and SC4 through the ground plane G. Yes.
- the ground plane G is connected to a structure maintained at a ground potential such as a vehicle chassis or a casing.
- the first to fourth substrate ground patterns GND4, GND5, GND6, and GND7 are solid patterns, respectively. Then, an interval between the adjacent first substrate ground pattern GND4 and the second substrate ground pattern GND5, an interval between the adjacent first substrate ground pattern GND4 and the third substrate ground pattern GND6, and the adjacent first substrate ground pattern GND6.
- the distance between the third substrate ground pattern GND6 and the fourth substrate ground pattern GND7 and the distance between the adjacent second substrate ground pattern GND5 and the fourth substrate ground pattern GND7 are half of the predetermined electromagnetic wave. It arrange
- the filter substrate P is a multilayer substrate, and has a pattern structure in which the first to fourth substrate ground patterns GND4, GND5, GND6, and GND7 are outer layers, and the main circuit pattern is an inner layer.
- the first line bypass capacitor C1 is disposed on the first substrate ground pattern GND4, the second line bypass capacitor C2 is disposed on the second substrate ground pattern GND5, and the third line bypass capacitor C3 is Arranged on the third substrate ground pattern GND6, the fourth line bypass capacitor C4 is disposed on the fourth substrate ground pattern GND7.
- the noise filter NF1 shown in FIG. 14 is connected to an input side main circuit pattern which is the input side and the power supply side on the lower left side of FIG. 14, and the load side main circuit which is the load side and the electric equipment side on the upper right side. Connected to the pattern.
- FIG. 15 is an equivalent circuit diagram for explaining the operation of the noise filter according to the third embodiment of the present invention.
- the noise filter NF3 according to Embodiment 3 of the present invention has its input side connected to the input side main circuit patterns LI and NI, and its load side connected to the load side main circuit patterns LL and NL.
- the first common mode choke coil L1 and the second common mode choke coil L2 are connected in series between the input side and the load side of the noise filter NF3.
- the input side main circuit pattern LI and the load side main circuit pattern LL are connected via the first and second common mode choke coils L1 and L2, and the input side main circuit pattern NI and the load side main circuit pattern NL are The first and second common mode choke coils L1 and L2 are connected to each other.
- the first line bypass capacitor C1 is connected between one interconnection part NC of the first and second common mode choke coils L1 and L2 and the first substrate ground pattern GND4.
- the second line bypass capacitor C2 is connected between the other interconnect LC of the first and second common mode choke coils L1, L2 and the second substrate ground pattern GND5.
- the third line bypass capacitor C3 is connected between the load side main circuit pattern NL and the third substrate ground pattern GND6.
- the fourth line bypass capacitor C4 is connected between the load-side main circuit pattern LL and the fourth substrate ground pattern GND7.
- the first and second line bypass capacitors C1 and C2 are arranged on the load side of the first common mode choke coil L1, and the third and fourth line bypass capacitors C3 and C4 are the second common mode choke coil. It is arranged on the load side of L2 because it is assumed that the noise source is on the load side of the main circuit, and when the noise source is assumed to be on the input side of the main circuit,
- the first and second line bypass capacitors C1 and C2 are arranged on the input side of the first common mode choke coil L1, and the third and fourth line bypass capacitors C3 and C4 are connected to the second common mode choke coil L2. Will be placed on the input side.
- the noise filter NF3 according to Embodiment 3 of the present invention has a substrate ground pattern for each of the first to fourth substrates for each of the first to fourth line bypass capacitors C1, C2, C3, C4.
- the ground patterns are separated into GND4, GND5, GND6, and GND7.
- the first to fourth substrate ground patterns GND4, GND5, GND6, and GND7 as the ground substrate pattern are used as the outer layer pattern, and each substrate ground pattern is a solid pattern. Since it falls to the ground plane G via the fourth substrate ground pattern GND4, GND5, GND6, and GND7, it is possible to suppress noise from being mixed into the main circuit pattern. Further, as described above, the distance between adjacent substrate ground patterns is arranged to be equal to or less than a predetermined distance, so that radiation noise having a predetermined frequency or less is prevented from being mixed into the main circuit pattern.
- the noise filter according to the third embodiment of the present invention has been described with respect to the case where the filter circuit constituted by the coil and the capacitor has a two-stage configuration, the present invention is not limited to this, and the filter circuit has a configuration having three or more stages. Is equally effective.
- FIG. 16 is a perspective view schematically showing a noise filter according to Embodiment 4 of the present invention.
- the noise filter according to the fourth embodiment of the present invention includes one common mode choke coil L3 on the filter substrate P and is disposed on the input side of the common mode choke coil L3.
- First and second line bypass capacitors C5 and C6, and third and fourth line bypass capacitors C7 and C8 disposed on the load side of the common mode choke coil L3 are provided.
- a first substrate ground pattern GND8 and a second substrate ground pattern GND9 that are separated from each other are formed on the filter substrate P.
- the common mode choke coil L3 is disposed across the first substrate ground pattern GND8 and the second substrate ground pattern GND9.
- the first and second line bypass capacitors C5 and C6 are disposed on the first substrate ground pattern GND8, and the third and fourth line bypass capacitors C7 and C8 are disposed on the second substrate ground pattern GND9.
- the first and second substrate ground patterns GND8 and GND9 are solid patterns, respectively, and the interval between the adjacent first and second substrate ground patterns GND8 and GND9 is not more than a half wave of a predetermined electromagnetic wave. It arrange
- the filter substrate P is a multilayer substrate, and has a pattern structure in which the substrate ground pattern is an outer layer and the main circuit pattern is an inner layer.
- the noise filter NF4 shown in FIG. 16 is connected to the input side main circuit pattern which is the input side and the power supply side on the lower left side of FIG. 16, and the load side main circuit which is the load side and the electric equipment side on the upper right side. Connected to the pattern.
- FIG. 17 is an equivalent circuit diagram for explaining the operation of the noise filter according to the fourth embodiment of the present invention.
- the noise filter NF4 according to the fourth embodiment of the present invention has an input side connected to the input side main circuit patterns LI and NI, and a load side connected to the load side main circuit patterns LL and NL.
- the input side main circuit pattern LI and the load side main circuit pattern LL are connected via a common mode choke coil L3, and the input side main circuit pattern NI and the load side main circuit pattern NL are connected via a common mode choke coil L3. Connected.
- the first line bypass capacitor C5 is connected between the input side main circuit pattern NI and the first substrate ground pattern GND8 on the input side of the common mode choke coil L3.
- the second line bypass capacitor C6 is connected between the input side main circuit pattern LI and the first substrate ground pattern GND8 on the input side of the common mode choke coil L3.
- the third line bypass capacitor C7 is connected between the load side main circuit pattern NL and the second substrate ground pattern GND9 on the load side of the common mode choke coil L3.
- the fourth line bypass capacitor C8 is connected between the load side main circuit pattern LL and the second substrate ground pattern GND9 on the load side of the common mode choke coil L3.
- the noise filter NF4 includes a substrate ground for each of the first and second line bypass capacitors C5 and C6 and the third and fourth line bypass capacitors C7 and C8.
- the pattern is separated into first and second substrate ground patterns GND8 and GND9.
- the eleventh noise current from the second and third line bypass capacitors C7 and C8 through the substrate ground pattern to the input main circuit pattern through the first and second line bypass capacitors C5 and C6.
- the path I11 is not formed. Therefore, the noise current generated by the noise source V1 does not flow out to the input side main circuit, and the deterioration of the noise attenuation characteristic can be prevented.
- the outer layer pattern is GND as the substrate ground pattern GND8, GND9, and each substrate ground pattern is a solid pattern, so that the radiation noise passes through the first and second substrate ground patterns GND8, GND9 on the surface layer. Then, since it falls on the ground plane G, it is possible to prevent noise from entering the main circuit pattern.
- the distance between the adjacent first and second substrate ground patterns is arranged to be equal to or less than a predetermined distance, so that radiation noise with a predetermined frequency or less is prevented from being mixed into the main circuit pattern. is doing.
- FIG. 18 is a perspective view schematically showing a noise filter according to Embodiment 5 of the present invention.
- the filter substrate P includes first and second common mode choke coils L5 and L6, and first to fourth line bypass capacitors. C9, C10, C11, C12, and first and second substrate ground patterns GND10, GND10 are provided.
- the filter circuit F1 including the first choke coil L5 and the first and second line bypass capacitors C9 and C10 is replaced by the first filter circuit F1, the first choke coil L6, and the third and fourth filter circuits F1.
- a filter circuit composed of the line bypass capacitors C11 and C12 is referred to as a second filter circuit F2.
- Line bypass capacitors C9, C10, C11, and C12 of the filter circuits F1 and F2 are connected to the load side of the common mode choke coils L5 and L6, respectively.
- the first substrate ground pattern GND10 and the second substrate ground pattern GND11 are separated for each of the first and second filter circuits F1 and F2, and are not electrically connected to each other on the filter substrate P. .
- the first substrate ground pattern GND10 is connected to the ground plane G by a first connection member SC1 configured with screws or the like
- the second substrate ground pattern GND11 is a second connection member SC2 configured with screws or the like.
- the first substrate ground pattern GND10 and the second substrate ground pattern GND11 are electrically connected to each other via the first and second connection members SC1, SC2 and the ground plane G.
- the ground plane G is connected to a structure maintained at a ground potential such as a vehicle chassis or a casing.
- the first and second substrate ground patterns GND10 and GND11 are solid patterns, respectively.
- the distance between the first and second substrate ground patterns GND10 and GND11 adjacent to each other is arranged to be equal to or less than a predetermined distance so as not to be equal to or greater than a half wave of a predetermined electromagnetic wave.
- the filter substrate P is a multilayer substrate, and has a pattern structure in which the substrate ground pattern is an outer layer and the main circuit pattern is an inner layer.
- the filter substrate P is provided with a region Z where no substrate ground pattern is arranged. It can be said that the region Z in which the substrate ground pattern is not disposed is formed by missing a part of the first substrate ground pattern GND10.
- the first common mode choke coil L5 is disposed across the first substrate ground pattern GND10 and the region Z where the substrate ground pattern is not disposed.
- Main circuit patterns L1 and N1 from the input power source side to the first choke coil L5, which will be described later, are arranged in the region Z of the filter substrate P where the substrate ground pattern is not arranged,
- the substrate ground pattern GND10 is arranged so as not to overlap the main circuit patterns LI and NI.
- the noise filter NF5 shown in FIG. 18 is connected to an input side main circuit pattern which is the input side and the power supply side on the lower left side of FIG. 15, and the load side main circuit which is the load side and the electric equipment side on the upper right side. Connected to the pattern.
- FIG. 19 is an equivalent circuit diagram for explaining the operation of the noise filter according to the fifth embodiment of the present invention, and is a diagram explaining the current path of the noise current.
- the noise filter NF5 according to the fifth embodiment of the present invention has its input side connected to the input side main circuit patterns LI and NI, and its load side connected to the load side main circuit patterns LL and NL.
- the input side main circuit pattern LI and the load side main circuit pattern LL are connected via the first and second common mode choke coils L5 and L6, and the input side main circuit pattern NI and the load side main circuit pattern NL are The first and second common mode choke coils L5 and L6 are connected to each other.
- the main circuit patterns L1 and N1 from the input power supply side to the first choke coil L5 are arranged in the region Z on the filter substrate P where the substrate ground pattern is not arranged.
- the first substrate ground pattern GND10 is arranged so as not to overlap the main circuit patterns LI and NI.
- the first line bypass capacitor C9 is connected between one interconnection part NC of the first and second common mode choke coils L5 and L6 and the first substrate ground pattern GND10.
- the second line bypass capacitor C10 is connected between the other interconnect LC of the first and second common mode choke coils L5 and L6 and the first substrate ground pattern GND10.
- the third line bypass capacitor C11 is connected between the load-side main circuit pattern NL and the second substrate ground pattern GND11.
- the fourth line bypass capacitor C12 is connected between the load side main circuit pattern LL and the second substrate ground pattern GND11.
- a part of the noise current generated in the noise source V1 is generated by the second common mode choke L6 of the second filter circuit F2, the first and second line bypasses.
- the current flows out to the power supply side of the main circuit by the twelfth current path I12 that reaches the input side through the capacitors C9, C10, GND10 and the first and second stray capacitances C13, C14. This causes the noise attenuation characteristics of the noise filter to deteriorate in the high frequency band.
- the operation of the noise filter according to the fifth embodiment of the present invention will be described.
- the first substrate ground pattern GND10 is arranged so as not to overlap the main circuit patterns LI and NI from the input power supply side to the first choke coil L5.
- the first and second stray capacitances C13 and C14 do not exist. Therefore, the noise current path I12 described above is not formed, and the noise current generated in the noise source V1 is generated from the first and second connection members SC1 and SC2.
- the signal is returned to the noise source V1 via the ground plane G. Therefore, the noise current generated in the noise source V1 does not flow out to the input side main circuit, and the deterioration of the noise attenuation characteristic can be prevented.
- the line bypass capacitor is composed of capacitor parts.
- the present invention is not limited to this, and the floating between the substrate ground pattern and the common mode choke coil is not limited thereto. It may be a capacitive component.
- the configuration in which the substrate ground pattern is separated for each line bypass capacitor as in the noise filter according to the third embodiment may be applied to other embodiments.
- the present invention can be freely combined with each other or can be appropriately modified or omitted.
- the noise filter according to the present invention described above is characterized by having the following features.
- the substrate ground pattern is separated into a plurality of substrate ground patterns, and the plurality of separated substrate ground patterns are respectively connected to a common ground member existing outside the substrate, and further, the plurality of substrate ground patterns. This is composed of a solid pattern and arranged so that the distance between adjacent substrate ground patterns is equal to or less than a predetermined distance. Noise filter according to claim.
- the capacitor includes a capacitor disposed on the power supply side of the coil and a capacitor disposed on the load side of the coil, and the filter circuit includes the plurality of capacitors and the coil.
- the substrate grounding pattern is separated between a capacitor disposed on the power supply side of the coil and a capacitor disposed on the load side of the coil.
- the coil includes a plurality of coils
- the capacitor includes a capacitor disposed on the power supply side of the coil and a capacitor disposed on the load side of the coil
- the filter circuit includes: The noise filter according to (1), wherein the noise filter includes each of the capacitors and at least one of the coils, and the substrate ground pattern is separated for each capacitor.
- the main circuit includes a positive line and a negative line,
- the capacitor is composed of a capacitor connected to the positive line and a capacitor connected to the negative line,
- the substrate ground pattern is separated between the capacitor connected to the positive line and the capacitor connected to the negative line,
- the noise filter as described in (1) above, wherein
- the capacitor is composed of a capacitor disposed on the power supply side of the coil and a capacitor disposed on the load side of the coil, and the substrate ground pattern is formed on the power supply side of the coil.
- the capacitor separated on the load side and arranged on the power supply side is connected to the separated substrate ground pattern on the power supply side, and the capacitor arranged on the load side is separated on the separated.
- the capacitor of the filter block is disposed on the load side of the coil of the filter block, and the substrate ground pattern overlaps a main circuit from the power supply side to the coil closest to the power supply side.
- the substrate is configured by a multilayer substrate, the substrate ground pattern is disposed on an outer layer of the substrate, and the pattern of the main circuit is disposed on an inner layer of the substrate.
- the noise filter as described in any one of thru
- the present invention can be used in the field of electric devices such as AC / DC converters and inverters, and in the field of vehicles such as automobiles equipped with these electric devices.
- NF, NF2, NF3, NF4, NF5 NFC1 noise filter, P filter substrate, L1 first common mode choke coil, L2 second common mode choke coil, L3 common mode choke coil, L5 first common mode choke coil, L6 second common mode choke coil, C1 to C12 1st to 6th line bypass capacitors, GND1 to GND11 1st to 4th substrate ground patterns, GND4 Common grounding pattern for PCB, NC, LC connection pattern, G ground plane, SC1 to SC4 first to fourth connecting members, LI, NI Input side main circuit pattern, LL, NL Load side main circuit pattern, NC, LC interconnect, I1 to I12, 1st to 11th noise current paths, V1 noise source, R1 noise source resistance.
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Abstract
Description
基板と、前記基板に実装されたコイルと、前記基板に形成された基板接地パターンと、前記基板に実装され前記コイルと前記基板接地パターンとの間に接続されたコンデンサとを備え、ノイズを減衰させるべき主回路の電源側と負荷側との間に挿入され、前記コイルと前記コンデンサにより構成されるフィルタ回路により前記主回路のノイズを減衰させるようにしたノイズフィルタであって、
前記基板接地パターンは、複数の基板接地パターンに分離され、
前記分離された複数の基板接地パターンは、夫々、前記基板の外に存在する共通の接地部材に接続され、
更に、前記複数の基板接地パターンは、ベタパターンにより構成されると共に、隣り合う基板接地パターンとの間の間隔が夫々所定の距離以下となるように配置されている、ことを特徴とする。
以下、この発明の実施の形態1によるノイズフィルタについて説明する。図1は、この発明の実施の形態1によるノイズフィルタを模式的に示す斜視図である。図1に於いて、ノイズフィルタNF1は、基板としてのフィルタ基板Pの表面に実装されたコイルとしての第1のコモンモードチョークコイルL1と、第2のコモンモードチョークコイルL2を備えている。又、ノイズフィルタNF1は、フィルタ基板Pの表面に実装されたコンデンサとしての、第1のラインバイパスコンデンサC1、第2のラインバイパスコンデンサC2、第3のラインバイパスコンデンサC3、第4のラインバイパスコンデンサC4、第5のラインバイパスコンデンサC5、及び第6のラインバイパスコンデンサC6と、基板接地パターンとしての、第1の基板接地パターンGND1、第2の基板接地パターンGND2、第3の基板接地パターンGND3を備えている。これ等の各基板接地パターンGND1、GND2、GND3は、夫々、車両のシャーシ等の接地電位に保たれた構造物である接地プレーンGに接続されているが、フィルタ基板Pの表面では互いに電気的に分離されている。また、基板接地パターンGND1、GND2、GND3はそれぞれベタパターンであり、隣り合う基板接地パターン同士(GND1とGND2、GND2とGND3)の間隔は所定の電磁波の半波以上とならないように所定の距離以下となるように配置されている。尚、第1の基板接地パターンGND1、第2の基板接地パターンGND2、第3の基板接地パターンGND3は、フィルタ基板Pの表面に導電体をプリントして構成され得る。又、フィルタ基板Pは多層基板であり、基板接地パターンは外層、主回路パターンは内層というパターン構造としている。
次に、この発明の実施の形態1によるノイズフィルタの動作を理解するために、比較例1によるノイズフィルタについて説明する。図3は、比較例1によるノイズフィルタNFC1を模式的に示す斜視図、図4は、比較例1によるノイズフィルタの動作を説明するための等価回路であって、図1及び図2に示すこの発明の実施の形態1によるノイズフィルタと同一または相当部分には同一の符号を付してある。図3に於いて、比較例1によるノイズフィルタNFC1は、フィルタ基板P上で連続した1枚の基板共通接地パターンGND4を備えており、第1及び第2のコモンモードチョークコイルL1、L2と、第1~第6のラインバイパスコンデンサC1~C6は、共通の基板接地パターンGND4上に実装されており、基板共通接地パターンGND4からネジ等の第1~第3の接続部材SC1~SC3を介して接地プレーンGに接続されている。又、図4に於いて、負荷側LL、NL側にノイズ源V1があるとする。R1はノイズ源抵抗である。その他の構成は、実施の形態1の場合と同様である。
ここで、ZL≫ZCのとき、ノイズ源V1から発生したノイズ電流の一部は、第1のノイズ電流経路I1を介して流れ、ノイズ源V1にリターンされる。
図8は、この発明の実施の形態2によるノイズフィルタを模式的に示す斜視図である。図8に於いて、フィルタ基板Pには、第1及び第2のチョークコイルL1、L2と、第1~第4のラインバイパスコンデンサC1、C2、C3、C4と、基板接地パターンとしての第1及び第2の基板接地パターンGND1、GND2が設けられている。ここで、第1のチョークコイルL1と第1及び第2のラインバイパスコンデンサC1、C2で構成されるフィルタ回路F1を第1のフィルタ回路、第1のチョークコイルL2と第3及び第4のラインバイパスコンデンサC3、C4で構成されるフィルタ回路F2を第2のフィルタ回路と称する。
次に、この発明の実施の形態2によるノイズフィルタの動作を理解するために、比較例2によるノイズフィルタについて説明する。図10は、比較例2によるノイズフィルタを模式的に示す斜視図である。図10に示す比較例2のノイズフィルタNFC2は、前述の図8の実施の形態2のノイズフィルタNF2と同様のフィルタ構成であるが、フィルタ基板Pの上の基板接地パターンが1枚の基板共通接地パターンGND3により構成されている点が実施の形態2のノイズフィルタNF2とは異なる。図11は、比較例2によるノイズフィルタNFC2の動作を説明するための等価回路である。
図14は、この発明の実施の形態3によるノイズフィルタを模式的に示す斜視図である。図14に於いて、フィルタ基板Pには、第1及び第2のコモンモードチョークコイルL1、L2と、第1~第4のラインバイパスコンデンサC1、C2、C3、C4と、第1及び第2の基板接地パターンGND4、GND5と、第3及び第4の基板接地パターンGND6、GND7が設けられている。ここで、第1のチョークコイルL1は、第1及び第2の基板接地パターンGND4、GND5の上に跨って配置され、第2のチョークコイルL2は、第3及び第4の基板接地パターンGND6、GND7の上に跨って配置されている。
次に、この発明の実施の形態4によるノイズフィルタについて説明する。図16はこの発明の実施の形態4によるノイズフィルタを模式的に示す斜視図である。図16に示すように、この発明の実施の形態4によるノイズフィルタは、フィルタ基板Pの上に1個のコモンモードチョークコイルL3を備えると共に、このコモンモードチョークコイルL3の入力側に配置された第1及び第2のラインバイパスコンデンサC5、C6と、コモンモードチョークコイルL3の負荷側に配置された第3及び第4のラインバイパスコンデンサC7、C8を備えている。
次に、この発明の実施の形態5によるノイズフィルタについて説明する。図18は、この発明の実施の形態5によるノイズフィルタを模式的に示す斜視図である。図18に示すように、この発明の実施の形態5によるノイズフィルタNF5は、フィルタ基板Pには、第1及び第2のコモンモードチョークコイルL5、L6と、第1~第4のラインバイパスコンデンサC9、C10、C11、C12と、第1及び第2の基板接地パターンGND10、GND10が設けられている。ここで、第1のチョークコイルL5と第1及び第2のラインバイパスコンデンサC9、C10で構成されるフィルタ回路F1を第1のフィルタ回路F1、第1のチョークコイルL6と第3及び第4のラインバイパスコンデンサC11、C12で構成されるフィルタ回路を第2のフィルタ回路F2と称する。各フィルタ回路F1、F2のラインバイパスコンデンサC9、C10、C11、C12が各コモンモードチョークコイルL5、L6の負荷側にそれぞれ接続される。
(1)基板と、前記基板に実装されたコイルと、前記基板に形成された基板接地パターンと、前記基板に実装され前記コイルと前記基板接地パターンとの間に接続されたコンデンサとを備え、ノイズを減衰させるべき主回路の電源側と負荷側との間に挿入され、前記コイルと前記コンデンサにより構成されるフィルタ回路により前記主回路のノイズを減衰させるようにしたノイズフィルタであって、前記基板接地パターンは、複数の基板接地パターンに分離され、前記分離された複数の基板接地パターンは、夫々、前記基板の外に存在する共通の接地部材に接続され、更に、前記複数の基板接地パターンは、ベタパターンにより構成されると共に、隣り合う基板接地パターンとの間の間隔が夫々所定の距離以下となるように配置されていることを特徴とするノイズフィルタ。
前記コンデンサは、前記正側のラインに接続されるコンデンサと、前記負側のラインに接続されるコンデンサと、により構成され、
前記基板接地パターンは、前記正側のラインに接続される前記コンデンサと、前記負側のラインに接続されるコンデンサと、の間で分離されている、
ことを特徴とする上記(1)に記載のノイズフィルタ。
P フィルタ基板、L1 第1のコモンモードチョークコイル、
L2 第2のコモンモードチョークコイル、
L3 コモンモードチョークコイル、
L5 第1のコモンモードチョークコイル、
L6 第2のコモンモードチョークコイル、
C1~C12 第1~第6のラインバイパスコンデンサ、
GND1~GND11 第1~4の基板接地パターン、
GND4 基板共通接地パターン、NC、LC 接続パターン、
G 接地プレーン、SC1~SC4 第1~第4の接続部材、
LI、NI 入力側主回路パターン、LL、NL 負荷側主回路パターン、
NC、LC 相互接続部、I1~I12 第1~第11のノイズ電流経路、
V1 ノイズ源、R1 ノイズ源抵抗。
Claims (9)
- 基板と、前記基板に実装されたコイルと、前記基板に形成された基板接地パターンと、前記基板に実装され前記コイルと前記基板接地パターンとの間に接続されたコンデンサとを備え、ノイズを減衰させるべき主回路の電源側と負荷側との間に挿入され、前記コイルと前記コンデンサにより構成されるフィルタ回路により前記主回路のノイズを減衰させるようにしたノイズフィルタであって、
前記基板接地パターンは、複数の基板接地パターンに分離され、
前記分離された複数の基板接地パターンは、夫々、前記基板の外に存在する共通の接地部材に接続され、
更に、前記複数の基板接地パターンは、ベタパターンにより構成されると共に、隣り合う基板接地パターンとの間の間隔が夫々所定の距離以下となるように配置されている、
ことを特徴とするノイズフィルタ。 - 前記コンデンサは、前記コイルの前記電源側に配置されたコンデンサと、前記コイルの前記負荷側に配置されたコンデンサと、により構成され、前記フィルタ回路は、前記複数のコンデンサと、前記コイルと、により構成され、
前記基板接地パターンは、前記コイルの前記電源側に配置されたコンデンサと、前記コイルの前記負荷側に配置されたコンデンサと、の間で分離されている、
ことを特徴とする請求項1に記載のノイズフィルタ。 - 前記コイルは、複数設けられている、
ことを特徴とする請求項1又は2に記載のノイズフィルタ。 - 前記コイルは、複数設けられ、
前記コンデンサは、前記コイルの前記電源側に配置されたコンデンサと、前記コイルの前記負荷側に配置されたコンデンサと、により構成され、
前記フィルタ回路は、前記夫々のコンデンサと、少なくとも一つの前記コイルとで構成され、
前記基板接地パターンは、前記コンデンサ毎に分離されている、
ことを特徴とする請求項1に記載のノイズフィルタ。 - 前記主回路は、正側のラインと負側のラインとを備え、
前記コンデンサは、前記正側のラインに接続されるコンデンサと、前記負側のラインに接続されるコンデンサと、により構成され、
前記基板接地パターンは、前記正側のラインに接続される前記コンデンサと、前記負側のラインに接続されるコンデンサと、の間で分離されている、
ことを特徴とする請求項1に記載のノイズフィルタ。 - 前記フィルタ回路は、前記コイルと前記コンデンサとからなるフィルタブロックを、複数備え、
前記基板接地パターンは、前記フィルタブロック毎に分離されている、
ことを特徴とする請求項1に記載のノイズフィルタ。 - 前記コンデンサは、前記コイルの前記電源側に配置されたコンデンサと、前記コイルの前記負荷側に配置されたコンデンサと、により構成され、
前記基板接地パターンは、前記コイルの前記電源側と前記負荷側とで分離され、
前記電源側に配置された前記コンデンサは、前記分離された前記電源側の基板接地パターンに接続され、
前記負荷側に配置された前記コンデンサは、前記分離された前記負荷側の基板接地パターンに接続されている、
ことを特徴とする請求項1に記載のノイズフィルタ。 - 前記フィルタブロックの前記コンデンサは、前記フィルタブロックの前記コイルの、前記負荷側に配置され、
前記基板接地パターンは、前記電源側から前記電源側に最も近い前記コイルまでの主回路に重ならないように配置されている、
ことを特徴とする請求項6に記載のノイズフィルタ。 - 前記基板は、多層基板により構成され、
前記基板接地パターンは、前記基板の外層に配置され、
前記主回路のパターンは、前記基板の内層に配置されている、
ことを特徴とする請求項1乃至8の何れか一項に記載のノイズフィルタ。
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