WO2015044485A1 - System and method for the calibration of steps of acquisition and conditioning of electrical biopotentials - Google Patents

System and method for the calibration of steps of acquisition and conditioning of electrical biopotentials Download PDF

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Publication number
WO2015044485A1
WO2015044485A1 PCT/ES2014/070712 ES2014070712W WO2015044485A1 WO 2015044485 A1 WO2015044485 A1 WO 2015044485A1 ES 2014070712 W ES2014070712 W ES 2014070712W WO 2015044485 A1 WO2015044485 A1 WO 2015044485A1
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signal
frequency
acquisition
conditioning
digital
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PCT/ES2014/070712
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Spanish (es)
French (fr)
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Manuel DELGADO RESTITUTO
Alberto Rodriguez Perez
Jesus Ruiz Amaya
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Consejo Superior De Investigaciones Cientificas (Csic)
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Publication of WO2015044485A1 publication Critical patent/WO2015044485A1/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45Differential amplifiers
    • H03F3/45071Differential amplifiers with semiconductor devices only
    • H03F3/45076Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45475Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using IC blocks as the active amplifying circuit
    • AHUMAN NECESSITIES
    • A61MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61BDIAGNOSIS; SURGERY; IDENTIFICATION
    • A61B5/00Measuring for diagnostic purposes; Identification of persons
    • A61B5/24Detecting, measuring or recording bioelectric or biomagnetic signals of the body or parts thereof
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/261Amplifier which being suitable for instrumentation applications
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/294Indexing scheme relating to amplifiers the amplifier being a low noise amplifier [LNA]
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/411Indexing scheme relating to amplifiers the output amplifying stage of an amplifier comprising two power stages
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45136One differential amplifier in IC-block form being shown
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66Digital/analogue converters
    • H03M1/74Simultaneous conversion
    • H03M1/78Simultaneous conversion using ladder network
    • H03M1/785Simultaneous conversion using ladder network using resistors, i.e. R-2R ladders

Definitions

  • the present invention describes a system and method for the calibration of stages of acquisition and conditioning of electrical biopotentials.
  • the proposed system comprises means for the definition of the spectral capture band according to the type of biopotential subject to monitoring and means for adjusting the voltage gain levels prior to the digitalization of said biopotential.
  • the present invention describes the procedure associated with the definition of the capture spectral band according to the type of biopotential subject to monitoring and the adjustment of the voltage gain levels prior to the digitalization of said biopotential.
  • the technical field within which the present invention is framed is that of physical technologies, and more specifically, that of information and communications technologies applied to bioengineering.
  • Every monitoring system for electric biopotentials comprises a stage for the acquisition and conditioning of the signals captured by the electrodes; a digital processing section, preceded by an analog-to-digital converter, for the analysis and coding of data, and a communications module for the transfer of information to the user.
  • the present invention focuses on the first of said stages, that is, the signal acquisition and conditioning section and, more specifically, the description of means and calibration procedures for signal conditioning.
  • the means used for its implementation largely determine the accuracy and efficiency of the sensor device as a whole.
  • aspects of efficiency are more related to the means of signal conditioning, whose task is to adjust the operation of the monitoring system to the particular type of biopotential subject to analysis.
  • Essential considerations in the conditioning performed by the acquisition stage are, on the one hand, the definition of the capture spectral band according to the inspected signal and, on the other, the selection of the amplification level necessary for the waveforms received adapt to the dynamic range of the subsequent processing section, and thus avoid a substantial loss of information.
  • the respective stages of signal acquisition and conditioning must operate with the same spectral transfer characteristics at the highest possible resolution, of so that both the selectivity and the specificity of the multi-sensor device are improved.
  • a second possibility, more oriented towards monolithic integration and potentially offering greater flexibility, is to transfer the tasks of adjusting the amplification and filtering characteristics of the monitoring system to the digital processing section after the signal acquisition and conditioning stage.
  • Examples of realization of this strategy are shown in the state of the art documents US 7171 166 B2 with the title “Programmable wireless electrode system for medical monitoring” and US 2008/0140159 A1 with the title “Implantable device for monitoring biological signáis”.
  • the disadvantage of this strategy is that it entails an oversizing of the monitoring system, since digitalization means are required that have to cover voltage and frequency ranges that are much higher than those strictly necessary to monitor the electrical biopotential under observation, which results in high resolutions of digital processing and, consequently, to form factors and high power consumption.
  • a third possibility that tries to combine the advantages of the previous procedures consists in providing the signal conditioning stage with programmability.
  • the selection of the filtering and amplification characteristics is restricted to the conditioning stage and does not imply an increase in resolution in the processing and digitization means of the monitoring system nor increases the production cost of the sensor system.
  • US 2010/0106041 A1 entitled “Systems and methods for multichannel wireless implantable neural recording” means are shown for the continuous programming of the gain of the conditioning stage of 68 at 77dB, analog means for defining the lower limit of the capture spectral band in a range between 0.1 Hz and 1 kHz and digital means for tuning the upper cutoff frequency of said band in the range between 0.7 and 10kHz.
  • the signal acquisition and conditioning stage of a system for monitoring biopotentials comprise a low noise amplifier to amplify the biopotential signal captured from an electrode; a circuit for estimating artifacts, intentional or not, that can potentially contaminate said signal captured by said low noise amplifier; a variable gain amplifier to adjust the voltage levels of the signal provided by said low noise amplifier once the signal generated by said circuit has been subtracted for the estimation of artifacts; an analog-digital converter to digitize the signal produced by said variable gain amplifier; and a calibration system for the conditioning of electric biopotentials, object of the present invention.
  • Said calibration system comprises, in accordance with the present invention, a digital sweep based frequency synthesizer for the generation of sinusoidal waveforms; and a digital processing unit that configures and manages the aforementioned blocks comprised in a signal acquisition and conditioning stage of a biopotential monitoring system based on the calibration procedure contemplated in the present invention.
  • said frequency synthesizer is based on digital scanning and comprises a programmable frequency divider that generates a CLKDIV clock signal from a CLKTC clock signal and an NFREQ frequency data, both provided by said digital processing unit; a phase-amplitude converter that, when timed with said CLKDIV clock signal, generates a sine wave form quantized in discrete time; a digital-analog converter with P-bits of resolution, timed by said CLKDIV signal, which converts said digital waveform to the input into a quantized analog signal; and an adaptation circuit that eliminates the spectral replicas produced by the signal retention inherent in the conversion process carried out in said digital-analog converter.
  • the head of a signal acquisition and conditioning stage of a biopotential monitoring system formed in this example of embodiment of the present invention by said low noise amplifier and said variable gain amplifier, provide a characteristic of bandpass transfer to attenuate all those frequency components that interfere with the reading of the biopotential signal under observation.
  • both the filtering characteristics of said head of a stage acquisition and signal conditioning, and the gain of said variable gain amplifier are programmable in the sense that both the lower and upper cutoff frequencies of The bandpass characteristic such as the maximum voltage levels at the input of the aforementioned analog-to-digital converter can be adjusted independently by means of analog or digital variables.
  • the calibration of a signal conditioning stage consists of four phases sequenced by said digital processing unit.
  • said frequency synthesizer is activated and its output is connected to the input of said low noise amplifier.
  • tuning of the cutoff frequencies that define the through band of said head of a stage acquisition and signal conditioning is carried out.
  • said frequency synthesizer is deactivated and the input of said low noise amplifier is connected to an electrode from which the biopotential signal is captured.
  • the voltage gain of said variable gain amplifier is adjusted and the calibration cycle is completed.
  • the definition of the cut-off frequencies of said head of a stage of signal acquisition and conditioning is carried out in the foreground ("foreground calibration", in English) by means of a closed loop tuning that uses the signal as a reference sinusoidal provided by the aforementioned frequency synthesizer according to the instructions received from said digital processing unit and as a control parameter a digitized version of the maximum amplitude reached at the output of said variable gain amplifier during a multiple time interval of period of said reference sinusoidal signal; said digitized version generated by said analog-digital converter.
  • Said maximum amplitude at the output of said variable gain amplifier whose value depends on the reference frequency and the analog or digital variables that control the through band of said header of a signal acquisition and conditioning stage, provides a representation of the filter transfer function implemented by said header, according to the present invention.
  • said frequency synthesizer is programmed to generate sinusoidal signals at the desired cutoff frequencies (each derived from an aforementioned NFREQ frequency data) , and the control variables of the spectral response of the said head of a stage acquisition and signal conditioning are modified, until a steady state is reached in which the amplitudes at the output of said variable gain amplifier reveal attenuations of the limits of the passing band, typically a few decibels below the mid-band gain.
  • the definition of the gain levels of a variable gain amplifier is performed by means of a background control loop ("background calibration", in English) at the same time as it is acquired. and processes the biopotential signal captured by an electrode.
  • Said control loop uses as an observation variable a digitized version of the maximum voltage reached at the output of said variable gain amplifier for an estimated time interval based on physiological considerations; said digitized version generated by said analog-digital converter.
  • said loop uses as control signals the analog or digital variables that control the gain of said gainable gain amplifier.
  • the said control signals are modified until a steady state is reached in which the peak voltages at the output of said variable gain amplifier are comprised between a fraction of FS and FS at their upper limit and between 0 and a fraction of FS at its lower limit, where FS indicates the full scale of the aforementioned analog-digital converter.
  • EEG electroencephalography
  • ECG electrocardiography
  • EMG electromyography
  • the proposed means for the integrated implementation of a calibration mechanism for the signal conditioning stage of an electrical biopotential monitoring system are of low complexity, so they are capable of integration with reduced area and power consumption. This last aspect is particularly relevant in monitoring systems that do not have batteries but, on the contrary, are powered from resources available in the environment.
  • the proposed means and procedures allow to counteract the statistical variations of the technological process in which the integration takes place; variations that may involve deviations of 30 or 40% with respect to the nominal value in the transfer characteristic and in the gain of a signal conditioning system, in accordance with the present invention. This is possible as long as the ranges of programming of the low noise amplifier and the variable gain amplifier, comprised in a biopotential signal acquisition system according to the present invention, are large enough to cover such deviations.
  • the proposed procedures for the calibration of a biopotential signal conditioning stage are autonomous, offer the possibility of dynamic adaptation against variations in the tissue under observation and are suitable for any type. of patient These advantages are especially relevant in implanted monitoring systems since the possibilities of manipulation once operational are very limited, at the same time that the useful life of the device has to be extended to the maximum.
  • the automation of the procedures for the calibration of a stage of conditioning of bioelectric activity allows to eliminate the intervention of specialized users and / or the use of external equipment, both in the manufacturing phase and in The exploitation phase. This not only reduces production and / or maintenance costs, but also allows ambulatory deployment of monitoring devices in tele-assistance services for patients.
  • the calibration procedure for adjusting the gain of a signal conditioning system operates concurrently with the signal acquisition in order to avoid interruptions in the measurement process.
  • Figure 1 Shows the block diagram of an exemplary embodiment of an electrical biopotential monitoring system next to the electrode with which it is interconnected. In practical embodiments, the physical separation of the components of this system and its functional distribution may not be coincidental.
  • Figure 2. Shows a block diagram of an exemplary embodiment of the system for the calibration of stages of acquisition and conditioning of electric biopotentials object of the present invention.
  • Figure 3. Shows the programming of (3a) the transfer characteristic and (3b) the gain of the head of a stage of acquisition and conditioning of biopotential signals ".
  • Figure 4. Shows the block diagram of an exemplary embodiment of the frequency synthesizer that is integrated into the system object of the present invention.
  • Figure 5. Shows (5a) the block diagram of a phase-amplitude converter comprised in the frequency synthesizer, according to the present invention, as (5b) the flow chart of its operation.
  • Figure 6. Schematically shows an example of the internal circuitry of the digital-analog converter and an adaptation circuit, both included in the frequency synthesizer, in accordance with the present invention.
  • Figure 7. Shows a flow chart of an embodiment of the calibration procedure of a stage of acquisition and conditioning of biopotential signals, in accordance with the present invention.
  • Figure 8. Shows a flow chart of an embodiment of the tuning procedure of the cut-off frequencies of the pass-through band of acquisition and conditioning of bio-potential signals, in accordance with the present invention.
  • Figure 9.- It shows the process of "initialization" of the tuning procedure of the cut-off frequencies of the through band in the stage of acquisition and conditioning of biopotential signals, in accordance with the present invention.
  • Figure 10. Shows a flow chart of the process of adjusting the low frequency cut-off frequency within the tuning procedure of the pass band of the acquisition and conditioning stage of biopotential signals, in accordance with the present invention.
  • Figure 1 1 shows a flow chart of the process of adjusting the high frequency cut-off frequency within the tuning procedure of the pass band of the stage of acquisition and conditioning of biopotential signals, in accordance with the present invention.
  • Figure 12.- A flow chart shows the calibration process of a "gainable amplifier” comprised in the stage of acquisition and conditioning of biopotential signals, in accordance with the present invention. This calibration process is carried out in the "initialization" of the tuning procedure of the cut-off frequencies of the through band of said acquisition and signal conditioning stage.
  • Figure 13 A flow chart shows the calibration process of a "gainable amplifier" comprised in the stage of acquisition and conditioning of biopotential signals, in accordance with the present invention. Said adjustment is carried out in the process of calibrating said acquisition and signal conditioning stage.
  • Figure 14. Shows the validation procedure by an external supervisor of the self-calibration mechanism of the biopotential signal acquisition and conditioning stage, in accordance with the present invention.
  • Figure 15. Shows an example of the process of tuning the cut-off frequencies of the band through the stage of acquisition and conditioning of biopotential signals, in accordance with the present invention.
  • Figure 16. It shows an embodiment of the process of adjusting the gain of a variable gain amplifier comprised in the stage of acquisition and conditioning of biopotential signals, in accordance with the present invention. DESCRIPTION OF AN EXAMPLE OF EMBODIMENT OF THE INVENTION
  • Figure 1 represents the functional diagram of a system for the monitoring of electrical biopotentials 10000, whose purpose is the capture, processing and transmission of representative values of the electrical signal detected by means of an electrode 20000.
  • the system comprises a stage for the acquisition and conditioning of signal 1 1000, a section of digital processing 12000 and a block for the transfer of information to the user 13000.
  • this functional division does not necessarily entail a physical separation of the elements that make up the system for monitoring 10000 electric biopotentials
  • elements of functional block 12000 can be housed on the same substrate as elements of block 1 1000, or it is also possible that blocks 1 1000-13000 together comprise a single inseparable physical entity.
  • the present invention focuses on the first of the sections comprised in a system for the monitoring of electrical biopotentials 10000, that is, the acquisition and conditioning stage of signal 1000 and, more specifically, in the description of means and procedures of Automatic calibration for signal conditioning that will be discussed later.
  • FIG. 2 shows the block diagram of a stage for the acquisition and conditioning of signal 1000 according to the present invention.
  • Said step 1 1000 comprises a low noise amplifier 1 1 100 (called LNA, for its acronym in English, “Low Noise Amplifier”) to amplify the electrical signal captured from a 20000 electrode; a circuit 1 1200 to estimate artifacts due, for example, to alterations in the impedance of the interface between tissue and electrode or to the application of electromodulation therapies, which can potentially contaminate the signal captured by the low noise amplifier 1 1 100; a variable gain amplifier 1 1300 (called PGA, for its acronym in English, “Programmable Gain Amplifier”) to adjust the voltage levels of the signal provided by the low noise amplifier 1 1 100 once the signal generated by the 1 1200 circuit for the estimation of artifacts; an analog-digital converter 1 1400 (called ADC, for its acronym in English, “Analogue-to-Digital Converter”) to digitize the signal provided by the variable gain amplifier 1 1300; and a calibration system for
  • variable gain amplifier 1 1300 includes an offset cancellation loop (called OCL, for its acronym in English, "Offset Cancellation Loop”) to eliminate the DC components at the input of the analog-digital converter 1 1400 caused by the imbalances at the inputs of both the 1 1300 variable gain amplifier and the 1 1 100 low noise amplifier.
  • OCL offset cancellation loop
  • the inputs to the stage for the acquisition and conditioning of the 1000 signal are CLKTC and CONF.
  • the CLKTC signal is a train of periodic pulses with known frequency FTC, which is used for the generation of logic control signals and to sequence the operation of the stage for the acquisition and conditioning of 1 1000 signal.
  • the CONF signal is a sequential input. of data used to program the unit of 1 1500 digital processing of a calibration system, in accordance with the present invention. Said processing unit 1 1500 also uses the digital DATA output generated by analog-digital converter 1 1400 as a control variable.
  • the VBIO and VREF signals constitute inputs that come from two electrodes in contact with the patient under monitoring.
  • the VBIO signal is the electrical response captured by the electrode 20000, which serves as an interface between the tissue whose electrical activity is to be monitored and the monitoring system 10000.
  • the VREF signal is a voltage extracted from another electrode 21000 with low input impedance that It serves as a reference for the operation of the low noise amplifier 1 1 100 and the circuit for the estimation of artifacts 1 1200.
  • the present invention does not impose any limitation either on the geometry of the electrodes 20000 and 21000, nor on the tissue under observation.
  • the header of the 1 1000 signal acquisition and conditioning stage formed by the low-noise amplifier 1 1 100 and the variable gain amplifier 1 1300, must be designed to provide a band pass transfer characteristic in the signal path to, thus, filter all those frequency components that interfere with the reading of the biopotential signal under observation.
  • said filtering operation is carried out in a distributed manner so that the cutoff frequency of the lower limit of the BF passband (for low frequency) is implemented at the input of the low noise amplifier 1 1 100, while the cutoff frequency of the upper limit of the AF pass band (due to high frequency) is implemented at some point prior to scanning by the analog-digital converter 1 1400.
  • the present invention does not imposes no restrictions on this last aspect so that said upper limit AF can be implemented at the output of the low noise amplifier 1 1 100, as in some embodiments of the prior art, or at the output of the gainable amplifier 1 1300, as reported in others.
  • both the BF and AF cutoff frequencies of the header of the signal acquisition and conditioning stage 1 1000, as well as the gain PG of the gainable amplifier 1 1300 are programmable in the sense that they can be adapt by means of analog or digital adjustment parameters included in blocks 1 1 100 and 1 1300. These parameters can be resistors, capacities, transconductances or, in general, any element or set of elements that allows the monotonic variation of BF, AF and PG independently, without mutual influence.
  • the programming of the variables BF, AF and PG can be perform in continuous mode or in discrete mode. The difference is whether an analog adjustment (continuous mode) or digital programming (discrete mode) of the parameter or set of adjustment parameters is performed.
  • Continuous mode techniques essentially based on master-slave architectures, allow a very precise adjustment of these parameters, although they are more complex and require additional mechanisms for the storage and cooling of currents and / or voltages.
  • discrete mode techniques essentially based on the use of binary controlled circuit element arrays, are structurally simple and use simple digital records to store calibration settings, although the accuracy, limited by the quantization imposed by the Digital programming is usually inferior to the analog setting method.
  • the means and procedures proposed in the present invention are equally applicable for both types of programming, analog or digital, and therefore are general purpose and are not linked to any particular embodiment of the low noise amplifier 1 1 100, or any specific implementation of the variable gain amplifier 1 1300. In any case, in applications that require ultra-low energy consumption, for example, in implantable monitoring systems, digital programming techniques that have less demand for electrical power.
  • Figure 3 (a) shows an example in which the BF and AF cutoff frequencies can be digitally controlled via the control words SFC ⁇ 1 : NBF> and ⁇ FC ⁇ 1: NAF>, respectively.
  • the NBF and NAF values represent the number of bits included in said control words. Without loss of generality, the BF and AF cutoff frequencies grow as the values programmed in the corresponding digital control words increase.
  • the total gain of the header of the signal acquisition and conditioning stage 1 1000 which is given by the product of the gain G of the low noise amplifier 1 1 100 and the gain PG of the variable gain amplifier 1 1300, remains unchanged regardless of the digital programming performed.
  • the PG gain grows as the digital control word increases.
  • the BF and AF cutoff frequencies of the transfer characteristic of the stage header of acquisition and conditioning of signal 1 1000 remains unchanged regardless of the digital programming of the word PGC.
  • the purpose of the calibration system for the conditioning of electric biopotentials consisting of blocks 1 1500 and 1 1600, is the automatic programming of the adjustment parameters for the definition of the variables BF, AF and PG so that the pass band of the filter only includes the spectral content of the signal being monitored and that the amplification level provided by the variable gain amplifier 1 1300 is adapted to the full scale of the analog-digital converter 1 1400.
  • the automatic programming of the adjustment parameters for the definition of the variables BF, AF and PG is carried out by means of digital processing techniques (in English "digitally assisted calibration") that take advantage of the presence of a analog-to-digital converter 1 1400 in the acquisition and conditioning stage 1 1000.
  • digital processing techniques in English "digitally assisted calibration"
  • the digital processing block 11500 establishes a closed loop of automatic control which modifies the corresponding adjustment parameters, in accordance with the quantized response of the header of the 1 1000 signal acquisition and conditioning stage against certain stimuli.
  • the closed control loop uses as reference stimuli generated by the 1 1600 digital scan based frequency synthesizer which, in accordance with the present invention , is part of a calibration system of the acquisition and conditioning stage of the 1000 signal.
  • FIG. 4 shows the block diagram of the frequency synthesizer 1 1600 which, according to the present invention, comprises a divider of programmable frequency 1 1610 that generates a CLKDIV clock signal from the CLKTC clock signal and the NFREQ frequency data provided through the CONF serial connection (see figure 2); a phase-amplitude converter 1 1620 which, when timed with the CLKDIV clock signal, generates a sine wave form quantized in discrete time; a digital analog converter 1 1630 (called DAC, for its acronym in English, “Digital-to-Analogue Converter”) with P-bits resolution that converts the digital waveform to the input into a quantized analog signal; an adaptation circuit 1 1640 that conditions the output of the DAC 1 1630 to close the tuning loop according to the input characteristics of the low noise amplifier 1 1 100; a logic counter triggered by flanks 1 1650 that counts the number of half periods of the sine waveform generated by the phase-amplitude converter 1 1620; and a digital comparator 1 1660 that detects when the number of
  • Said NT number is estimated as representative of the stabilization phase of the closed control loop for the adjustment of the BF and AF cutoff frequencies.
  • the CONF series connection also provides activation signals of the blocks included in the frequency synthesizer 1 1600, so that when they are disabled they enter low consumption mode.
  • the programmable frequency divider 1 1610 is implemented by detecting over-shots in a digital accumulator with L-bits resolution, timed by the CLKTC signal, which uses the NFREQ frequency data as the word of step control NFREQ frequency data is loaded synchronously with the FLOAD pulse.
  • the time interval between over-shots corresponds to a period of the CLKDIV signal obtained at the output of the programmable frequency divider 1 1610.
  • the phase-amplitude converter 1 1620 provides 4M contiguous samples quantized per period of sine function. Each sample is given by a digital word of P bits in length, B ⁇ 0, P-1>, where the term S (0) represents the least significant bit and the term B (P-1), the most significant.
  • the output ratio of the phase-amplitude converter 1 1620 is one sample per CLKDIV clock cycle. Therefore, the FDDS frequency of the sine waveform generated by the phase-amplitude converter 1 1620 is
  • Figure 5 (a) shows the functional diagram of a phase-amplitude converter 1 1620 which, according to an embodiment of the present invention, comprises a state machine 1 1621 that controls the operation of the converter; 1 1622 memory with (M + 1) x P elements and reading by rows, which store adjacent samples of an arc of ⁇ / 2 radians of the sine function; and two displacement registers with M positions, one with downward displacement (1 1623) and one with upward displacement (1 1624), whose outputs are connected to the enabling controls of memory rows 1 1622.
  • M + 1 x P elements and reading by rows, which store adjacent samples of an arc of ⁇ / 2 radians of the sine function
  • two displacement registers with M positions, one with downward displacement (1 1623) and one with upward displacement (1 1624), whose outputs are connected to the enabling controls of memory rows 1 1622.
  • memory 1 1622 only stores M +1 samples corresponding to a quarter period of the sine function. This is because the synthesis of the complete waveform is trivial from the ⁇ 12 symmetry of the sine function. In accordance with this data compression strategy, the hardware needed to implement the phase-amplitude converter 1 1620 is greatly simplified.
  • phase-amplitude converter 1 1620 The operation of the phase-amplitude converter 1 1620 is illustrated with the flow chart of Figure 5 (b).
  • the device When the device is inactive all internal variables are set to logical O ', and memory 1 1622 does not release any output.
  • a logic When it receives an activation signal from the CONF serial connection, a logic is loaded synchronously with the CLKDIV signal in the first position of the downward register 1 1623. At each clock cycle, the active bit moves through the register and enables the reading of the corresponding row of memory 1 1622.
  • the upward shift register 1 1624 In response to the active Fd signal, the upward shift register 1 1624 is enabled and a logic is loaded in the first position of said register.
  • Logic counter 1 1650 uses the INV output of the phase-amplitude converter 1 1620 to count the number of half-periods of the sine waveform generated by the phase-amplitude converter 1 1620 from the reset action marked by the trigger of the FLOAD load pulse.
  • the TRAN output signal of digital comparator 1 1650 changes from logical state to logical state ⁇ '.
  • the time interval between changes in the state of the TRAN signal is chosen for each NFREQ frequency data as representative of the time required for the tuning loop formed by the header of the 1 1000 signal acquisition and conditioning stage and the synthesizer of frequency 1 1600 reach the steady state.
  • the length of the digital words stored in a memory 1 1622 comprised in the phase-amplitude converter 1 1620 coincides with the resolution P of the digital-analog converter 1 1630.
  • the present invention does not impose any restrictions on the implementation of the digital-analog converter 1 1630, it will preferably use current mode techniques and will provide two outputs, one complementary to the other.
  • current mode techniques are R-2R architecture-based converters and current-convection-based converters (see chapter 3 of the F-Maloberti “Data Converters” book, published by Springer Publishing in Dordrecht, The Netherlands, in the year 2007). As detailed below, this choice allows you to easily complete the synthesis of the complete sine waveform in the analog domain.
  • digital analog converter 1 1630 uses an R-2R architecture that generates binary heavy current terms from an IREF reference current.
  • the current / + is formed by the superposition of those current terms enabled by the logic contained in the digital input word, S ⁇ 0, P-1>.
  • the current / - is composed by the combination of the current terms enabled by the logical O 'contained in the said digital word; combination to which an additional IREF term is subtracted.
  • a simple array of keys allows the synthesis of the complete sine waveform in the analog domain to be completed using the INV signal provided by the 1620 phase-amplitude converter.
  • the output currents lout + e lout- are formed by alternating the / + e / - signals, according to the transitions of ⁇ radians of the sine function.
  • the lout + and lout- currents constitute the inputs to an adaptation circuit 1 1640, which in this embodiment of the present invention, is formed by a current-to-voltage converter by means of an operational amplifier.
  • the output voltages, VDDS + and VDDS-, of the adaptation circuit 1 1640 are confined between the values -R 2 - IREF and R 2 - IREF.
  • the parameters R 2 and IREF must be chosen so that said limits are within the input range of a low noise amplifier 1 1 100, in accordance with the present invention. Assuming that the digital analog converter 1 1630 is ideal, the spectrum at its output due to signal retention is given by,
  • the attenuation of these images with respect to the fundamental tone due to the effect of the sinc (x) function is given by,
  • the response of the frequency synthesizer 1 1600 also includes other harmonics at frequencies ⁇ ⁇ i - FDIV ⁇ j -FDDS ⁇ , where the indices / ' , j are integers, which are attributable to the finite resolution P of the digital-analog converter 1 1630 and imperfections in its implementation such as device mismatches, establishment errors, glitches, jitter, different delays in digital lines, and so on.
  • the adaptation circuit 1 1640 includes capacitors C 2 in the feedback path of the operational amplifier that give the structure a first-order low-pass characteristic. These capacitors make it possible to eliminate switching glitches and improve the spectral purity of the sinusoidal signal generated by the 1 1600 frequency synthesizer.
  • Figure 7 shows the calibration procedure 30000 for the adjustment of the low noise amplifier 1 1 100 and the variable gain amplifier 1 1300, in accordance with the present invention.
  • Procedure 30000 is enabled once the corresponding instruction is received through the serial communication link CONF.
  • the 30000 calibration method is characterized in that it comprises the following phases:
  • the inputs of the low noise amplifier 1 1 100 are connected to the 20000 and 21000 electrodes, so that the VIN + and VBIO voltages, on the one hand, and the VIN- and VREF voltages, on the other , match.
  • the circuit for the estimation of 1 1200 artifacts is enabled;
  • the procedure 32000 for the adjustment of the BF and AF cutoff frequencies of the headband of the header of the acquisition and signal conditioning stage 1 1000 comprises three steps, as illustrated in Figure 8. Along The entire process, as indicated in Figure 7, the VIN input node of the low noise amplifier 1 1 100 is connected to the VDDS output of the frequency synthesizer 1 1600 and therefore disconnected from the electrodes 20000 and 21000.
  • the phases, sequenced by the 1 1500 calibration circuit, are:
  • the digital word NFREQ is configured through the serial CONF connection so that the frequency synthesizer 1 1600 generates a signal tone that, by design and even with the potential deviations of the frequencies BF and AF, it is placed in the band of the head of the stage of acquisition and conditioning of signal 1 1000.
  • the loading of the frequency data NFREQ is carried out by triggering the FLOAD pulse; secondly (32120), the control words are defined
  • variable gain amplifier is calibrated
  • a digitized version of the maximum amplitude value V a observed at the output of the variable gain amplifier 1 1 120 is stored, as a result of the 32130 calibration process.
  • Said digitized version is obtained by means of the analog converter -digital 1 1400 and is stored in a digital register available in the 1 1500 calibration module.
  • the digital word NFREQ is configured through the CONF serial connection so that the frequency synthesizer 1 1600 generates a signal tone at the desired BF cutoff frequency.
  • NFREQ frequency data is loaded by triggering the FLOAD pulse;
  • a digitized value of the maximum amplitude value V a , BF observed at the output of the variable gain amplifier 1 1300 is detected and stored, using the same means and procedures employed in step 32135, which will be detailed subsequently. Said digitized value is recorded in the calibration module 1 1500;
  • the digitized value of V a , BF is compared with a scaled version of the digital version of the amplitude V a previously stored in step 32140.
  • the scale factor ⁇ is less than unity and is chosen as representative of the attenuation of the transfer characteristic of the header of the 1 1000 signal acquisition and conditioning stage in the high-pass elbow.
  • the scaling and comparison operations are implemented in the 1 1500 calibration module using simple digital circuits;
  • V a: BF ⁇ i-V a step 32250
  • the digital word BFC is decremented by a less significant bit and steps 32230 and 32240 are executed again.
  • V a: BF> ⁇ V a proceed to step 32260;
  • Step 3 or tuning the high frequency cutoff frequency AF (32300), shown in Figure 1 1. It has the following stages: first (32310), the digital word NFREQ is configured through the serial connection CONF so that the frequency synthesizer 1 1600 generates a signal tone at the cut-off frequency AF desired. NFREQ frequency data is loaded by triggering the FLOAD pulse;
  • control word SFC ⁇ 1: NBF> is defined with the value previously obtained in step 32260; thirdly, a transitory time marked by the change of state of the TRAN logic signal from the high level to the low level is expected;
  • a digitized value of the maximum amplitude value V a ⁇ F observed at the output of the variable gain amplifier 1 1300 is detected and stored, using the same means and procedures used in step 32135, which is will detail later. Said digitized value is recorded in the calibration module 1 1500;
  • the digitized value of V a ⁇ A F is compared with a scaled version of the digital version of the amplitude V a previously stored in step 32140.
  • this scale factor ⁇ may differ of the employee in step 32240.
  • the scaling and comparison operations are implemented in the calibration module 1 1500 with the same means used in step 32240;
  • V a: AF ⁇ (step 32350) the digital word AFC is incremented by a less significant bit and steps 32330 and 32340 are executed again.
  • the last value defined for the digital word AFC is stored in the calibration module 1 1500.
  • steps 32100, 32200 and 32300 are mainly determined by the calculations of peak voltages performed in the stages 32130, 32230 and 32330, respectively. The time taken in these stages ultimately depends on the frequency of the tones generated by the synthesizer 1 1600. In the case of steps 32200 and 32300 the duration is also proportional to the number of iterations required for the execution of the loops 32230- 32250 and 32330-32350, respectively.
  • the spectral purity of the tones generated by the 1 1600 frequency synthesizer is favored during the calibration process by the characteristic band pass of the header of the 1 1000 signal acquisition and conditioning stage, given that said characteristic allows an additional attenuation of the images and spurious resulting from the signal retention performed by the digital-analog converter 1 1630.
  • said head together with the adaptation circuit circuit 1 1640 act as a reconstruction filter of the frequency synthesizer 1 1600.
  • the resolution M of the phase-amplitude converter 1 1620 must be chosen in such a way that FDIV-FDDS is greater than AF in all p handles involved in the 32000 procedure.
  • the 32130 calibration procedure of the maximum voltage levels at the output of the gainable amplifier 1 1300, when the VIN input node of the low noise amplifier 1 1 100 is connected to the VDDS output of the frequency synthesizer 1 1600, is carried out by means of the controlled adjustment of some of the circuit parameters included in said gainable amplifier.
  • the procedure 32130, illustrated in Figure 12 comprises six phases. These phases, sequenced by the 1 1500 calibration circuit and based on a binary search algorithm, are:
  • a PGCI digital word of NPG-IPG length is generated with the value of the most significant bit to logical and the remaining bits to logical O ';
  • a digitized value of the maximum amplitude V pk: p G observed at the output of the variable gain amplifier 1 1300 is detected and stored.
  • Said peak value is obtained by retaining the largest of the output words provided by the digital analog converter 1 1400 over a period of time established by the calibration module 1 1500.
  • the conversion rate of the ADC 1 1400 is much higher than the frequency of the input tone in order to reduce the errors of observation of the peak value V pk: p G.
  • the means used for peak detection are a register and a digital comparator available in said module 1 1500.
  • the calculation of the peak voltage is performed after a transient that occupies a finite number of semiperiods of the sinusoidal signal generated by synthesizer 1 1600.
  • the procedure easily reproducible by one skilled in the art, would be similar to that used in the case of modifications in the NFREQ frequency data;
  • V pk: PG the digitized value of V pk: PG is compared with the full scale V F s of the analog-to-digital converter 1 1400.
  • step 32137 PGC is incremented in PGCI and returned to step 32133.
  • V pk: PG V F s (step 32138)
  • the procedure 34000 for adjusting the voltage gain of the programmable amplifier 1 1300 within the 30000 calibration method differs from the procedure 32130 described above.
  • the differences between methods 34000 and 32130 are caused by the fact that, in the first case, the VIN input nodes of the low noise amplifier 1 1 100 are connected to the 20000 and 21000 microelectrodes, while, in the second case , said nodes are connected to the output of the frequency synthesizer 1 1600. Therefore, while in procedure 34000 the programmable amplifier 1 1300 receives electrical biopotentials whose temporal distribution is essentially random, in procedure 32130, the received signal is a sine wave Often known
  • Figure 13 shows the scheme of procedure 34000 for adjusting the voltage gain of the programmable amplifier 1 1300, in accordance with the present invention.
  • the procedure, initiated by the calibration module 1 1500 consists of the following steps: first (34100), the digital word PGC is initialized with all its bits to the logical value, so that the PG gain of the programmable amplifier 1 1300 takes its maximum value;
  • the maximum and minimum signal values V pk: max and V pk , m, respectively, are detected at the output of the programmable amplifier 1 1300 over a period of time defined by an operator external.
  • the duration of said monitoring period depends on the type of biopotential under analysis, for example, in the case of ECG monitoring the duration must be greater than the maximum interval between QRS complexes.
  • Information about the period of Detection is transmitted to the 1 1500 calibration module through the CONF serial channel, coded as the number of cycles of the CLKTC clock. Similar to the procedures described in relation to step 32135, the detection of the amplitude peak is preferably performed in the digital domain from the signal samples converted by the
  • ADC 1 1400 The conversion rate of ADC 1 1400 is much higher than the AF frequency of the band passing through the header of the signal acquisition and conditioning stage 1 1000;
  • the scale factor ⁇ is close to but less than unity, while the lower scale factor, ⁇ , is close to but greater than zero. Both values are chosen as a safeguard against residual effects derived from imperfections in the circuit for the estimation of 1 1200 artifacts, in order to avoid saturation of the 1 1400 converter.
  • Figure 14 shows the scheme of procedure 35000 of a supervision phase by an external operator.
  • the procedure consists of the following stages:
  • the biopotential signal is monitored discretionary digitized by the ADC 1 1400 through the DATA serial output port.
  • the PGC value (step 35200) is adjusted according to the instructions transmitted by the external operator through the serial channel CONF.
  • the 10000 electric biopotential monitoring system is implantable and is used for real-time capture of the action potentials generated in an area of the cerebral cortex.
  • the range of frequencies that these potentials typically occupy is approximately between 200Hz and 7kHz.
  • the voltage levels of these action potentials are in the order of a few millivolts.
  • the low noise amplifier 1 1 100 offers a nominal gain of approximately 47dB and implements at its input the lower cutoff frequency BF of the passing band of the stage header of acquisition and conditioning of signal 1 1000.
  • the frequency of said lower limit is programmable by means of a 3-bit digital word and covers a frequency range between approximately 140 to 210Hz. This configuration should not be considered as limiting the present invention, on the contrary, any programming strategy with coverage over the 200Hz interest rate with sufficient margin against implementation deviations is equally valid.
  • the programmable gain amplifier 1 1300 offers eight levels of amplification, comprised between 0 and 18dB, by means of the configuration of a 3-bit control word.
  • the programmable gain amplifier 1 1300 implements at its input the upper cut-off frequency AF of the headband of the header of the acquisition and signal conditioning stage 1 1000; frequency that can be adjusted within the range between 6.5 and 8kHz, by means of a 2-bit control word.
  • these values are shown exclusively by way of example, without constituting a limitation of the present invention.
  • the FTC frequency of the system clock is 4.0MHz
  • these values are by no means limiting the present invention; they only constitute an example of realization among many other possibilities.
  • the resolution of the analog-digital converter 1 1400 is 8 bits and supports different sampling reasons. Specifically, during steps 1 and 2 of the 32000 calibration process of the band passing through the header of the 1 1000 signal acquisition and conditioning stage, the conversion rate is 30kS / s while for step 3 of said process The rate is 90kS / s. During procedure 34000 for adjusting the gain in 1 1300 programmable gain amplifier voltage, the conversion rate is set at 30kS / s. These values are given for illustrative purposes only; Any other configuration that obtains low observation errors in the calculation of the digitized version of the peak values at the output of the programmable gain amplifier 1 1300 may be appropriate for calibration purposes.
  • Figure 15 illustrates the temporal evolution of the output of the programmable gain amplifier 1 1300, the output of the ADC converter 1 1400, and the digital control codes during the 32000 calibration process and the through band of the header of the stage header.
  • 1 1000 signal acquisition and conditioning The lower boxes show details of the different stages included in said process.
  • Box (a) shows the gain adjustment of the variable gain amplifier 1 1300 during the 32100 initialization phase.
  • Box (b) shows the evolution of the 1 1000 signal acquisition and conditioning stage during step 32200 tuning BF low frequency cutoff frequency.
  • box (c) shows the evolution of the 1 1000 signal acquisition and conditioning stage during step 32300 of tuning the high frequency cutoff frequency AF. Note how, in the last two cases, the amplitude of the sinusoid changes as the corresponding control word varies.
  • Figure 16 (a) illustrates the temporal evolution of the output codes of the analog-digital converter 1 1400 during the 34000 adjustment of the gain level of the PGA amplifier 1 1300, using the VBIO neural activity captured from an electrode as the input signal 20000.
  • the gain of the PGA amplifier 1 1300 is at the maximum possible value.
  • the 34000 process adjusts the amplification level of the PGA 1 1300 so that the base noise of the VBIO neural signal covers the full scale of the converter 1 1400.
  • the PGA amplifier gain 1 1300 se Scale again to prevent the analog-digital converter 1 1400 from saturating.
  • Figure 16 (b) illustrates the same mechanism, in this case, using a sinusoidal signal modulated by a ramp as input to the acquisition and conditioning stage of signal 1000.
  • the autonomy of the calibration allowed by the present invention offers the possibility of dynamic adaptation to variations in the tissue under observation and is suitable for any type of patient. These advantages are especially relevant in implanted monitoring systems since the possibilities of manipulation once operational are very limited.
  • the proposed means for the integrated implementation of a calibration mechanism for the signal conditioning stage of an electrical biopotential monitoring system are of low complexity, so they are capable of integration with reduced area and power consumption.

Abstract

The invention relates to a system and a method for the calibration of steps of acquisition and conditioning of electrical biopotentials. Said system comprises means for the definition of the spectral band for capture according to the type of biopotential to be monitored and means for adjusting the voltage gain levels prior to the digitalisation of said biopotential. The invention also relates to the method associated with the definition of the spectral band for capture according to the type of biopotential to be monitored and the adjustment of the voltage gain levels prior to the digitalisation of said biopotential.

Description

SISTEMA Y PROCEDIMIENTO PARA LA CALIBRACIÓN DE ETAPAS DE ADQUISICIÓN Y ACONDICIONAMIENTO DE BIOPOTENCIALES SYSTEM AND PROCEDURE FOR CALIBRATION OF STAGES OF ACQUISITION AND CONDITIONING OF BIOPOTENTIALS
ELÉCTRICOS ELECTRICAL
OBJETO DE LA INVENCIÓN OBJECT OF THE INVENTION
La presente invención describe un sistema y un procedimiento para la calibración de etapas de adquisición y acondicionamiento de biopotenciales eléctricos. El sistema propuesto comprende medios para la definición de la banda espectral de captura de acuerdo con el tipo de biopotencial objeto de monitorización y medios para el ajuste de los niveles de ganancia en tensión previos a la digitalización de dicho biopotencial. Así mismo, la presente invención describe el procedimiento asociado a la definición de la banda espectral de captura de acuerdo con el tipo de biopotencial objeto de monitorización y al ajuste de los niveles de ganancia en tensión previos a la digitalización de dicho biopotencial. The present invention describes a system and method for the calibration of stages of acquisition and conditioning of electrical biopotentials. The proposed system comprises means for the definition of the spectral capture band according to the type of biopotential subject to monitoring and means for adjusting the voltage gain levels prior to the digitalization of said biopotential. Likewise, the present invention describes the procedure associated with the definition of the capture spectral band according to the type of biopotential subject to monitoring and the adjustment of the voltage gain levels prior to the digitalization of said biopotential.
El campo técnico dentro del que se enmarca la presente invención es el de las tecnologías físicas, y más en concreto, el de las tecnologías de la información y las comunicaciones aplicadas a la bioingeniería. The technical field within which the present invention is framed is that of physical technologies, and more specifically, that of information and communications technologies applied to bioengineering.
ANTECEDENTES DE LA INVENCIÓN BACKGROUND OF THE INVENTION
Todo sistema de monitorización de biopotenciales eléctricos comprende una etapa para la adquisición y acondicionamiento de las señales capturadas por los electrodos; una sección de procesamiento digital, precedida por un convertidor analógico-a-digital, para el análisis y codificación de los datos, y un módulo de comunicaciones para la transferencia de información al usuario. La presente invención se centra en la primera de dichas etapas, esto es, la sección de adquisición y acondicionamiento de señal y, más en concreto, en la descripción de medios y procedimientos de calibración para el acondicionamiento de señal. Every monitoring system for electric biopotentials comprises a stage for the acquisition and conditioning of the signals captured by the electrodes; a digital processing section, preceded by an analog-to-digital converter, for the analysis and coding of data, and a communications module for the transfer of information to the user. The present invention focuses on the first of said stages, that is, the signal acquisition and conditioning section and, more specifically, the description of means and calibration procedures for signal conditioning.
Puesto que la etapa de adquisición y acondicionamiento de señal está en la cabecera de todo sistema de monitorización de biopotenciales eléctricos, los medios empleados para su implementación determinan en gran medida la precisión y la eficiencia del dispositivo sensor en su conjunto. Since the signal acquisition and conditioning stage is at the head of any electrical biopotential monitoring system, the means used for its implementation largely determine the accuracy and efficiency of the sensor device as a whole.
Aspectos de precisión están particularmente vinculados a los medios de adquisición, para los que se han propuesto numerosos aparatos y procedimientos conducentes a contrarrestar potenciales errores en la interfaz entre tejido humano y electrodo. Así, en el documento de estado de la técnica con número de publicación US 201 1 10251817 A1 con título "Method and apparatus to determine impedance variations in a skin/electrode interface" se describe un sistema para corregir tensiones de offset y errores de ganancia originados por variaciones de impedancia en la interfaz. Así mismo, el documento de estado de la técnica con número de publicación EP 2298164 A2 con título "Cardiac monitoring circuit with adaptive sampling" muestra un sistema de adquisición de actividad cardiaca que utiliza un canal secundario para la medida de bioimpedancia con el objetivo de suspender la monitorización ECG en tanto que el valor de impedancia no esté por debajo de un determinado umbral. Aún en otro documento de estado de la técnica con número de publicación US 8174416 B2 con título "Automatic common-mode rejection calibration" se presentan medios y procedimientos para compensar desbalances de tensión y mejorar la razón de rechazo del modo común en una etapa diferencial de adquisición de biopotenciales. En otro caso, el documento de estado de la técnica con número de publicación EP 20861 1 1 B1 con título "Instrumentation amplifier" muestra un amplificador de instrumentación con balance de corriente para eliminar componentes en DC de las señales capturadas por un sistema de adquisición EEG. Precision aspects are particularly linked to the means of acquisition, for which numerous devices and procedures have been proposed leading to counteract potential errors in the interface between human tissue and electrode. Thus, in the state-of-the-art document with publication number US 201 1 10251817 A1 with the title "Method and apparatus to determine impedance variations in a skin / electrode interface" a system for correcting offset stresses and gain errors originated is described by variations of impedance in the interface. Likewise, the state-of-the-art document with publication number EP 2298164 A2 entitled "Cardiac monitoring circuit with adaptive sampling" shows a cardiac activity acquisition system that uses a secondary channel for bioimpedance measurement in order to suspend ECG monitoring as long as the impedance value is not below a certain threshold. Still in another state-of-the-art document with publication number US 8174416 B2 with the title "Automatic common-mode rejection calibration" means and procedures for compensating voltage imbalances and improving the common mode rejection ratio in a differential stage of acquisition of biopotentials. In another case, the prior art document with publication number EP 20861 1 1 B1 entitled "Instrumentation amplifier" shows an instrumentation amplifier with current balance to eliminate DC components of the signals captured by an EEG acquisition system .
Aspectos de eficiencia están más relacionados con los medios de acondicionamiento de señal, cuyo cometido es ajusfar el funcionamiento del sistema de monitorización al tipo particular de biopotencial objeto de análisis. Consideraciones esenciales en el acondicionamiento realizado por la etapa de adquisición son, por un lado, la definición de la banda espectral de captura de acuerdo con la señal inspeccionada y, por otro, la selección del nivel de amplificación necesario para que las formas de onda recibidas se adapten al rango dinámico de la sección de procesado subsiguiente, y así evitar una pérdida sustancial de información. Aspects of efficiency are more related to the means of signal conditioning, whose task is to adjust the operation of the monitoring system to the particular type of biopotential subject to analysis. Essential considerations in the conditioning performed by the acquisition stage are, on the one hand, the definition of the capture spectral band according to the inspected signal and, on the other, the selection of the amplification level necessary for the waveforms received adapt to the dynamic range of the subsequent processing section, and thus avoid a substantial loss of information.
El ajuste de ambos aspectos es particularmente relevante en sistemas multi- sensor, como los empleados en implantes intracraneales para predicción epileptogénica (véase, por ejemplo, el documento de estado de la técnica con número de publicación US 6671555 B2 con título "Closed loop neuromodulation for suppression of epileptic activity") o en interfaces cerebro-máquina destinadas a mejorar la calidad de vida de pacientes con severos problemas de desplazamiento (véase, por ejemplo, el documento de estado de la técnica con número de publicación US 8332024 B2 con título "Low-power analog architecture for brain-machines interfaces"). Dado que las acciones a realizar por estos sistemas se basan en la interpretación de la actividad cerebral medida desde un colectivo de electrodos, las respectivas etapas de adquisición y acondicionamiento de señal deben operar con las mismas características de transferencia espectral a la mayor resolución posible, de forma que se mejoren tanto la selectividad como la especificidad del dispositivo multi-sensor. The adjustment of both aspects is particularly relevant in multi-sensor systems, such as those used in intracranial implants for epileptogenic prediction (see, for example, the prior art document with publication number US 6671555 B2 entitled "Closed loop neuromodulation for suppression of epileptic activity ") or in brain-machine interfaces aimed at improving the quality of life of patients with severe displacement problems (see, for example, the prior art document with publication number US 8332024 B2 with the title" Low -power analog architecture for brain-machines interfaces "). Since the actions to be performed by these systems are based on the interpretation of the brain activity measured from a collective of electrodes, the respective stages of signal acquisition and conditioning must operate with the same spectral transfer characteristics at the highest possible resolution, of so that both the selectivity and the specificity of the multi-sensor device are improved.
Convencionalmente, el ajuste de ambos aspectos, banda espectral y ganancia, se realiza durante el proceso de fabricación de la etapa de adquisición y acondicionamiento de señal e implica el uso de componentes discretos de alta precisión, de técnicas de ajuste de elementos de circuito (trimming) y/o de procedimientos de corrección usando datos de calibración almacenados en memorias locales. Así, por ejemplo, el documento con número de publicación US4237900, con título "Implantable calibration means and calibration method for an implantable body transduce describe un sistema en el que la medida de biopotencial eléctrico se realiza en base a las características en tensión de un condensador incorporado a un circuito resonante LC; características que previamente han sido almacenadas en una memoria ROM durante el proceso de fabricación. Este procedimiento de ajuste, sin embargo, aumenta el coste de producción del sistema de monitorización en su conjunto y adolece de falta de adaptación frente a cambios en las condiciones ambientales. Conventionally, the adjustment of both aspects, spectral band and gain, is carried out during the manufacturing process of the signal acquisition and conditioning stage and involves the use of discrete components of high precision, trimming techniques of circuit elements (trimming ) and / or correction procedures using calibration data stored in local memories. Thus, for example, the document with publication number US4237900, entitled "Implantable calibration means and calibration method for an implantable body transduce describes a system in which the measurement of electrical biopotential is carried out based on the voltage characteristics of a capacitor incorporated into an LC resonant circuit; features that have previously been stored in a ROM memory during the manufacturing process. This adjustment procedure, however, increases the production cost of the monitoring system as a whole and suffers from a lack of adaptation to changes in environmental conditions.
Una segunda posibilidad más orientada a integración monolítica y que potencialmente ofrece mayor flexibilidad consiste en trasladar las tareas de ajuste de las características de amplificación y filtrado del sistema de monitorización a la sección de procesamiento digital posterior a la etapa de adquisición y acondicionamiento de señal. Ejemplos de realización de esta estrategia se muestran en los documentos del estado de la técnica US 7171 166 B2 con título "Programmable wireless electrode system for medical monitoring" y US 2008/0140159 A1 con título "Implantable device for monitoring biological signáis". El inconveniente de esta estrategia es que conlleva un sobredimensionado del sistema de monitorización, dado que se requieren medios de digitalización que han de cubrir rangos de tensión y frecuencia muy superiores a los estrictamente necesarios para monitorizar el biopotencial eléctrico bajo observación, lo que da lugar a altas resoluciones de procesamiento digital y, consecuentemente, a factores de forma y consumos de potencia elevados. A second possibility, more oriented towards monolithic integration and potentially offering greater flexibility, is to transfer the tasks of adjusting the amplification and filtering characteristics of the monitoring system to the digital processing section after the signal acquisition and conditioning stage. Examples of realization of this strategy are shown in the state of the art documents US 7171 166 B2 with the title "Programmable wireless electrode system for medical monitoring" and US 2008/0140159 A1 with the title "Implantable device for monitoring biological signáis". The disadvantage of this strategy is that it entails an oversizing of the monitoring system, since digitalization means are required that have to cover voltage and frequency ranges that are much higher than those strictly necessary to monitor the electrical biopotential under observation, which results in high resolutions of digital processing and, consequently, to form factors and high power consumption.
Una tercera posibilidad que trata de combinar las ventajas de los procedimientos anteriores consiste en dotar de programabilidad a la etapa de acondicionamiento de señal. De acuerdo con esta opción, la selección de las características de filtrado y amplificación se restringe a la etapa de acondicionamiento y no supone un incremento de resolución en los medios de procesamiento y digitalización del sistema de monitorización ni aumenta el coste de producción del sistema sensor. Así, en el documento de estado de la técnica US 2010/0106041 A1 con título "Systems and methods for multichannel wireless implantable neural recording" se muestran medios para la programación continua de la ganancia de la etapa de acondicionamiento de 68 a 77dB, medios analógicos para la definición del límite inferior de la banda espectral de captura en un rango entre 0.1 Hz y 1 kHz y medios digitales para la sintonización de la frecuencia de corte superior de dicha banda en el rango entre 0.7 y 10kHz. En otro ejemplo, reportado en el documento de estado de la técnica EP 2298164 A2 con título "Cardiac monitoring circuit with adaptive sampling", se muestran medios basados en condensadores conmutados para sintonizar el límite superior de la banda espectral de captura entre 1 .87Hz and 3.94Hz y medios para ajusfar digitalmente la ganancia de la etapa de acondicionamiento entre 20 y 83dB. El principal inconveniente de estas implementaciones es que no se proporcionan medios ni procedimientos de ajuste automático de los valores de programación por lo que, en la práctica, la definición de la banda de filtrado y la ganancia de la etapa de acondicionamiento se realiza bajo la inspección de un usuario especializado con el uso de equipamiento externo. En el documento de estado de la técnica EP 2571920 A1 con título "Biomedical acquisition system with motion artifact reduction" sí se emplean procedimientos automáticos de correción en la cabecera de un sistema de adquisición biomédica, sin embargo, dichos procedimientos están orientados a la reducción de los posibles artefactos que pueden contaminar las medidas, no al ajuste de las características de transferencia de dicha cabecera. A third possibility that tries to combine the advantages of the previous procedures consists in providing the signal conditioning stage with programmability. According to this option, the selection of the filtering and amplification characteristics is restricted to the conditioning stage and does not imply an increase in resolution in the processing and digitization means of the monitoring system nor increases the production cost of the sensor system. Thus, in the state of the art document US 2010/0106041 A1 entitled "Systems and methods for multichannel wireless implantable neural recording" means are shown for the continuous programming of the gain of the conditioning stage of 68 at 77dB, analog means for defining the lower limit of the capture spectral band in a range between 0.1 Hz and 1 kHz and digital means for tuning the upper cutoff frequency of said band in the range between 0.7 and 10kHz. In another example, reported in the state of the art document EP 2298164 A2 entitled "Cardiac monitoring circuit with adaptive sampling", means based on switched capacitors are shown to tune the upper limit of the capture spectral band between 1.87Hz and 3.94Hz and means to digitally adjust the gain of the conditioning stage between 20 and 83dB. The main drawback of these implementations is that no means or procedures for automatic adjustment of the programming values are provided so, in practice, the definition of the filter band and the gain of the conditioning stage is carried out under inspection. of a specialized user with the use of external equipment. In the state-of-the-art document EP 2571920 A1 entitled "Biomedical acquisition system with motion artifact reduction", automatic correction procedures are used at the head of a biomedical acquisition system, however, these procedures are aimed at reducing the possible artifacts that can contaminate the measurements, not the adjustment of the transfer characteristics of said header.
DESCRIPCIÓN DE LA INVENCIÓN DESCRIPTION OF THE INVENTION
Analizados los antecedentes de la invención, se plantea como problema técnico a resolver encontrar un sistema de calibración integrado de bajo coste, que no conlleve el sobredimensionado de un sistema de monitorización de biopotenciales y que permita el ajuste de la banda de filtrado y de la ganancia de la etapa de acondicionamiento de señal comprendida en dicho sistema de monitorización, de manera que opere de forma esencialmente autónoma. Analyzed the background of the invention, it is considered as a technical problem to solve finding a low cost integrated calibration system, which does not entail the oversizing of a biopotential monitoring system and that allows the adjustment of the filter band and the gain of the signal conditioning stage included in said monitoring system, so that it operates essentially autonomously.
De acuerdo con la presente invención, la etapa de adquisición y acondicionamiento de señal de un sistema para la monitorización de biopotenciales comprende un amplificador de bajo ruido para amplificar la señal biopotencial capturada desde un electrodo; un circuito para estimar los artefactos, intencionados o no, que potencialmente pueden contaminar dicha señal capturada por dicho amplificador de bajo ruido; un amplificador de ganancia variable para ajusfar los niveles de tensión de la señal proporcionada por dicho amplificador de bajo ruido una vez sustraída la señal generada por dicho circuito para la estimación de artefactos; un convertidor analógico-digital para digitalizar la señal producida por dicho amplificador de ganancia variable; y un sistema de calibración para el acondicionamiento de biopotenciales eléctricos, objeto de la presente invención. In accordance with the present invention, the signal acquisition and conditioning stage of a system for monitoring biopotentials comprise a low noise amplifier to amplify the biopotential signal captured from an electrode; a circuit for estimating artifacts, intentional or not, that can potentially contaminate said signal captured by said low noise amplifier; a variable gain amplifier to adjust the voltage levels of the signal provided by said low noise amplifier once the signal generated by said circuit has been subtracted for the estimation of artifacts; an analog-digital converter to digitize the signal produced by said variable gain amplifier; and a calibration system for the conditioning of electric biopotentials, object of the present invention.
Dicho sistema de calibración comprende, de acuerdo con la presente invención, un sintetizador de frecuencia basado en barrido digital para la generación de formas de onda sinusoidales; y una unidad de procesado digital que configura y gestiona los citados bloques comprendidos en una etapa de adquisición y acondicionamiento de señal de un sistema para la monitorización de biopotenciales en función del procedimiento de calibración contemplado en la presente invención. De acuerdo con una realización de la presente invención, el citado sintetizador de frecuencia está basado en barrido digital y comprende un divisor de frecuencia programable que genera una señal de reloj CLKDIV a partir de una señal de reloj CLKTC y de un dato de frecuencia NFREQ, ambos proporcionados por la citada unidad de procesado digital; un convertidor fase- amplitud que, cuando se temporiza con la citada señal de reloj CLKDIV, genera una forma de onda sinusoidal cuantizada en tiempo-discreto; un convertidor digital-analógico con P-bits de resolución, temporizado por la citada señal CLKDIV, que convierte la citada forma de onda digital a la entrada en una señal analógica cuantizada; y un circuito de adaptación que elimina las réplicas espectrales producidas por la retención de señal inherente al proceso de conversión realizado en el citado convertidor digital-analógico. En otro aspecto, la cabecera de una etapa adquisición y acondicionamiento de señal de un sistema para la monitorización de biopotenciales, conformada en este ejemplo de realización de la presente invención por dicho amplificador de bajo ruido y dicho amplificador de ganancia variable, proporcionan una característica de transferencia paso de banda para atenuar todas aquellas componentes en frecuencia que interfieren en la lectura de la señal biopotencial bajo observación. Said calibration system comprises, in accordance with the present invention, a digital sweep based frequency synthesizer for the generation of sinusoidal waveforms; and a digital processing unit that configures and manages the aforementioned blocks comprised in a signal acquisition and conditioning stage of a biopotential monitoring system based on the calibration procedure contemplated in the present invention. According to an embodiment of the present invention, said frequency synthesizer is based on digital scanning and comprises a programmable frequency divider that generates a CLKDIV clock signal from a CLKTC clock signal and an NFREQ frequency data, both provided by said digital processing unit; a phase-amplitude converter that, when timed with said CLKDIV clock signal, generates a sine wave form quantized in discrete time; a digital-analog converter with P-bits of resolution, timed by said CLKDIV signal, which converts said digital waveform to the input into a quantized analog signal; and an adaptation circuit that eliminates the spectral replicas produced by the signal retention inherent in the conversion process carried out in said digital-analog converter. In another aspect, the head of a signal acquisition and conditioning stage of a biopotential monitoring system, formed in this example of embodiment of the present invention by said low noise amplifier and said variable gain amplifier, provide a characteristic of bandpass transfer to attenuate all those frequency components that interfere with the reading of the biopotential signal under observation.
De acuerdo con la presente invención, tanto las características de filtrado de la citada cabecera de una etapa adquisición y acondicionamiento de señal, como la ganancia del citado amplificador de ganancia variable son programables en el sentido de que tanto las frecuencias de corte inferior y superior de la característica paso de banda como los niveles máximos de tensión a la entrada del citado convertidor analógico-digital se pueden ajusfar de forma independiente por medio de variables analógicas o digitales. In accordance with the present invention, both the filtering characteristics of said head of a stage acquisition and signal conditioning, and the gain of said variable gain amplifier are programmable in the sense that both the lower and upper cutoff frequencies of The bandpass characteristic such as the maximum voltage levels at the input of the aforementioned analog-to-digital converter can be adjusted independently by means of analog or digital variables.
La calibración de una etapa de acondicionamiento de señal, de acuerdo con la presente invención, consta de cuatro fases secuenciadas por la citada unidad de procesado digital. En una primera fase se activa el citado sintetizador de frecuencias y se conecta su salida a la entrada del citado amplificador de bajo ruido. En una segunda fase se procede a la sintonización de las frecuencias de corte que definen la banda pasante de la citada cabecera de una etapa adquisición y acondicionamiento de señal. En una tercera fase se desactiva dicho sintetizador de frecuencias y se conecta la entrada de dicho amplificador de bajo ruido a un electrodo desde donde se captura la señal biopotencial. En una cuarta fase se ajusta la ganancia en tensión del citado amplificador de ganancia variable y se completa el ciclo de calibración. The calibration of a signal conditioning stage, according to the present invention, consists of four phases sequenced by said digital processing unit. In the first phase, said frequency synthesizer is activated and its output is connected to the input of said low noise amplifier. In a second phase, tuning of the cutoff frequencies that define the through band of said head of a stage acquisition and signal conditioning is carried out. In a third phase said frequency synthesizer is deactivated and the input of said low noise amplifier is connected to an electrode from which the biopotential signal is captured. In a fourth phase, the voltage gain of said variable gain amplifier is adjusted and the calibration cycle is completed.
En otro aspecto, la definición de las frecuencias de corte de la citada cabecera de una etapa de adquisición y acondicionamiento de señal, de acuerdo con la presente invención, se realiza en primer plano ("foreground calibration", en inglés) mediante un lazo cerrado de sintonía que usa como referencia la señal sinusoidal proporcionada por el citado sintetizador de frecuencias de acuerdo con las instrucciones recibidas de la citada unidad de procesado digital y como parámetro de control una versión digitalizada de la amplitud máxima alcanzada a la salida del citado amplificador de ganancia variable durante un intervalo de tiempo múltiplo del periodo de dicha señal sinusoidal de referencia; dicha versión digitalizada generada por el citado convertidor analógico-digital. Dicha amplitud máxima a la salida de dicho amplificador de ganancia variable, cuyo valor depende de la frecuencia de referencia y de las variables analógicas o digitales que controlan la banda pasante de dicha cabecera de una etapa adquisición y acondicionamiento de señal, proporciona una representación de la función de transferencia del filtro implementado por dicha cabecera, según la presente invención. De acuerdo con ello, para la calibración de los límites inferior y superior de la banda pasante, el citado sintetizador de frecuencias se programa para generar señales sinusoidales a las frecuencias de corte deseadas (cada una derivada a partir de un citado dato de frecuencia NFREQ), y se modifican las variables de control de la respuesta espectral de la citada cabecera de una etapa adquisición y acondicionamiento de señal, hasta alcanzar un régimen estacionario en el que las amplitudes a la salida del citado amplificador de ganancia variable revelan atenuaciones propias de los límites de la banda pasante, típicamente unos decibelios por debajo de la ganancia a mitad de banda. In another aspect, the definition of the cut-off frequencies of said head of a stage of signal acquisition and conditioning, according to the present invention, is carried out in the foreground ("foreground calibration", in English) by means of a closed loop tuning that uses the signal as a reference sinusoidal provided by the aforementioned frequency synthesizer according to the instructions received from said digital processing unit and as a control parameter a digitized version of the maximum amplitude reached at the output of said variable gain amplifier during a multiple time interval of period of said reference sinusoidal signal; said digitized version generated by said analog-digital converter. Said maximum amplitude at the output of said variable gain amplifier, whose value depends on the reference frequency and the analog or digital variables that control the through band of said header of a signal acquisition and conditioning stage, provides a representation of the filter transfer function implemented by said header, according to the present invention. Accordingly, for the calibration of the lower and upper limits of the bandwidth, said frequency synthesizer is programmed to generate sinusoidal signals at the desired cutoff frequencies (each derived from an aforementioned NFREQ frequency data) , and the control variables of the spectral response of the said head of a stage acquisition and signal conditioning are modified, until a steady state is reached in which the amplitudes at the output of said variable gain amplifier reveal attenuations of the limits of the passing band, typically a few decibels below the mid-band gain.
En otro aspecto, la definición de los niveles de ganancia de un amplificador de ganancia variable, de acuerdo con la presente invención, se realiza mediante un lazo de control en segundo plano ("background calibration", en inglés) al mismo tiempo que se adquiere y procesa la señal biopotencial capturada por un electrodo. Dicho lazo de control usa como variable de observación una versión digitalizada de la tensión máxima alcanzada a la salida del citado amplificador de ganancia variable durante un intervalo de tiempo estimado en función de consideraciones fisiológicas; dicha versión digitalizada generada por el citado convertidor analógico-digital. Además, dicho lazo usa como señales de control las variables analógicas o digitales que controlan la ganancia de dicho amplificador de ganancia vanable. Durante el proceso de calibración se modifican las citadas señales de control hasta que se alcanza un régimen estacionario en el que las tensiones de pico a la salida del citado amplificador de ganancia variable están comprendidas entre una fracción de FS y FS en su límite superior y entre 0 y una fracción de FS en su límite inferior, donde FS indica el fondo de escala del citado convertidor analógico-digital. In another aspect, the definition of the gain levels of a variable gain amplifier, in accordance with the present invention, is performed by means of a background control loop ("background calibration", in English) at the same time as it is acquired. and processes the biopotential signal captured by an electrode. Said control loop uses as an observation variable a digitized version of the maximum voltage reached at the output of said variable gain amplifier for an estimated time interval based on physiological considerations; said digitized version generated by said analog-digital converter. In addition, said loop uses as control signals the analog or digital variables that control the gain of said gainable gain amplifier. During the calibration process the said control signals are modified until a steady state is reached in which the peak voltages at the output of said variable gain amplifier are comprised between a fraction of FS and FS at their upper limit and between 0 and a fraction of FS at its lower limit, where FS indicates the full scale of the aforementioned analog-digital converter.
Tanto el sistema microelectrónico como los métodos reportados en la presente invención comparten las mismas ventajas, que se describen en profundidad en la sección que describe una realización detallada de la invención y que se listan brevemente a continuación. Both the microelectronic system and the methods reported in the present invention share the same advantages, which are described in depth in the section describing a detailed embodiment of the invention and listed briefly below.
Los medios propuestos son apropiados para sistemas de monitorización tanto no-invasivos - del tipo electroencefalografía (EEG), electrocardiografía (ECG) o electromiografía (EMG) - como implantados, para los que la necesaria miniatuhzación limita o, definitivamente, impide el uso de componentes discretos. The proposed means are appropriate for both non-invasive monitoring systems - of the electroencephalography (EEG), electrocardiography (ECG) or electromyography (EMG) type - as implanted, for which the necessary miniatuhzación limits or definitely prevents the use of components discreet
Además, los medios propuestos para la implementación integrada de un mecanismo de calibración para la etapa de acondicionamiento de señal de un sistema de monitorización de biopotenciales eléctricos son de baja complejidad, por lo que son susceptibles de integración con reducidos consumos de área y potencia. Este último aspecto es particularmente relevante en sistemas de monitorización que no disponen de baterías sino que, por el contrario, se alimentan a partir de recursos disponibles en el entorno. In addition, the proposed means for the integrated implementation of a calibration mechanism for the signal conditioning stage of an electrical biopotential monitoring system are of low complexity, so they are capable of integration with reduced area and power consumption. This last aspect is particularly relevant in monitoring systems that do not have batteries but, on the contrary, are powered from resources available in the environment.
En otro aspecto, los medios y procedimientos propuestos permiten contrarrestar las variaciones estadísticas del proceso tecnológico en el que se realiza la integración; variaciones que pueden suponer desviaciones del 30 o 40% con respecto al valor nominal en la característica de transferencia y en la ganancia de un sistema de acondicionamiento de señal, de acuerdo con la presente invención. Esto es posible siempre y cuando los rangos de programación del amplificador de bajo ruido y del amplificador de ganancia variable, comprendidos en un sistema de adquisición de señales biopotenciales de acuerdo con la presente invención, sean lo suficientemente grandes como para cubrir dichas desviaciones. In another aspect, the proposed means and procedures allow to counteract the statistical variations of the technological process in which the integration takes place; variations that may involve deviations of 30 or 40% with respect to the nominal value in the transfer characteristic and in the gain of a signal conditioning system, in accordance with the present invention. This is possible as long as the ranges of programming of the low noise amplifier and the variable gain amplifier, comprised in a biopotential signal acquisition system according to the present invention, are large enough to cover such deviations.
Aún en otro aspecto, los procedimientos propuestos para la calibración de una etapa de acondicionamiento de señal biopotencial, de acuerdo con la presente invención, son autónomos, ofrecen la posibilidad de adaptación dinámica frente a variaciones en el tejido bajo observación y se adecúan a cualquier tipo de paciente. Estas ventajas son especialmente relevantes en sistemas de monitorización implantados dado que las posibilidades de manipulación una vez operativos son muy limitadas, a la vez que se ha de alargar al máximo el tiempo de vida útil del dispositivo. Además, la automatización de los procedimientos para la calibración de una etapa de acondicionamiento de actividad bioeléctrica, de acuerdo con la presente invención, permite eliminar la intervención de usuarios especializados y/o el uso de equipamiento externo, tanto en la fase de fabricación como en la fase de explotación. Esto no sólo reduce los costes de producción y/o mantenimiento, sino que también permiten el despliegue ambulatorio de dispositivos de monitorización en servicios de tele-asistencia de enfermos. In still another aspect, the proposed procedures for the calibration of a biopotential signal conditioning stage, in accordance with the present invention, are autonomous, offer the possibility of dynamic adaptation against variations in the tissue under observation and are suitable for any type. of patient These advantages are especially relevant in implanted monitoring systems since the possibilities of manipulation once operational are very limited, at the same time that the useful life of the device has to be extended to the maximum. In addition, the automation of the procedures for the calibration of a stage of conditioning of bioelectric activity, in accordance with the present invention, allows to eliminate the intervention of specialized users and / or the use of external equipment, both in the manufacturing phase and in The exploitation phase. This not only reduces production and / or maintenance costs, but also allows ambulatory deployment of monitoring devices in tele-assistance services for patients.
En otro aspecto de la presente invención, el procedimiento de calibración para ajusfar la ganancia de un sistema de acondicionamiento de señal opera concurrentemente con la adquisición de señal con el fin de evitar interrupciones en el proceso de medida. In another aspect of the present invention, the calibration procedure for adjusting the gain of a signal conditioning system operates concurrently with the signal acquisition in order to avoid interruptions in the measurement process.
Estos y otros objetivos y características del sistema de calibración descrito en la presente invención serán entendidos en su totalidad a partir de la siguiente descripción detallada que ha de ser leída a la luz de las figuras que se acompañan en donde las referencias numéricas se refieren a partes correspondientes citadas en el texto. Es importante resaltar que los conceptos y especificaciones descritos en la presente invención son generales y no están estrictamente vinculados a ningún tipo de estándar en particular, ni a ninguna arquitectura concreta para los bloques comprendidos en una etapa de adquisición y acondicionamiento de señal de un sistema para la monitorización de biopotenciales eléctricos. These and other objectives and characteristics of the calibration system described in the present invention will be fully understood from the following detailed description to be read in the light of the accompanying figures where the numerical references refer to parts corresponding cited in the text. It is important to note that the concepts and specifications described in the present invention are general and are not strictly linked to any particular standard, nor to any specific architecture for the blocks comprised in a signal acquisition and conditioning stage of a system for the monitoring of electrical biopotentials.
BREVE DESCRIPCIÓN DE LAS FIGURAS. BRIEF DESCRIPTION OF THE FIGURES.
Con el objeto de complementar la descripción de la invención y sus características, se acompaña como parte integrante de dicha descripción las siguientes figuras: In order to complement the description of the invention and its characteristics, the following figures are attached as an integral part of said description:
Figura 1 .- Muestra el diagrama de bloques de un ejemplo de realización de un sistema de monitorización de biopotenciales eléctricos junto al electrodo con el que está interconectado. En realizaciones prácticas, la separación física de los componentes de este sistema y su distribución funcional pueden no ser coincidentes. Figure 1 .- Shows the block diagram of an exemplary embodiment of an electrical biopotential monitoring system next to the electrode with which it is interconnected. In practical embodiments, the physical separation of the components of this system and its functional distribution may not be coincidental.
Figura 2.- Muestra un diagrama de bloques de un ejemplo de realización del sistema para la calibración de etapas de adquisición y acondicionamiento de biopotenciales eléctricos objeto de la presente invención. Figure 2.- Shows a block diagram of an exemplary embodiment of the system for the calibration of stages of acquisition and conditioning of electric biopotentials object of the present invention.
Figura 3.- Muestra la programación de (3a) la característica de transferencia y (3b) la ganancia de la cabecera de una etapa de adquisición y acondicionamiento de señales biopotenciales". Figure 3.- Shows the programming of (3a) the transfer characteristic and (3b) the gain of the head of a stage of acquisition and conditioning of biopotential signals ".
Figura 4.- Muestra el diagrama de bloques de un ejemplo de realización del sintetizador de frecuencias que se integra en el sistema objeto de la presente invención . Figura 5.- Muestra (5a) el diagrama de bloques de un convertidor fase-amplitud comprendido en del sintetizador de frecuencias, de acuerdo con la presente invención, como (5b) el diagrama de flujo de su funcionamiento. Figura 6.- Muestra esquemáticamente un ejemplo de realización de la circuitería interna del convertidor digital-analógico y de un circuito de adaptación, ambos comprendidos en el sintetizador de frecuencias, de acuerdo con la presente invención. Figura 7.- Muestra un diagrama de flujo de un ejemplo de realización del procedimiento de calibración de una etapa de adquisición y acondicionamiento de señales biopotenciales, de acuerdo con la presente invención. Figure 4.- Shows the block diagram of an exemplary embodiment of the frequency synthesizer that is integrated into the system object of the present invention. Figure 5.- Shows (5a) the block diagram of a phase-amplitude converter comprised in the frequency synthesizer, according to the present invention, as (5b) the flow chart of its operation. Figure 6.- Schematically shows an example of the internal circuitry of the digital-analog converter and an adaptation circuit, both included in the frequency synthesizer, in accordance with the present invention. Figure 7.- Shows a flow chart of an embodiment of the calibration procedure of a stage of acquisition and conditioning of biopotential signals, in accordance with the present invention.
Figura 8.- Muestra un diagrama de flujo de un ejemplo de realización del procedimiento de sintonización de las frecuencias de corte de la banda pasante de etapa de adquisición y acondicionamiento de señales biopotenciales, de acuerdo con la presente invención. Figure 8.- Shows a flow chart of an embodiment of the tuning procedure of the cut-off frequencies of the pass-through band of acquisition and conditioning of bio-potential signals, in accordance with the present invention.
Figura 9.- Muestra el proceso de "inicialización" del procedimiento de sintonización de las frecuencias de corte de la banda pasante en la etapa de adquisición y acondicionamiento de señales biopotenciales, de acuerdo con la presente invención. Figure 9.- It shows the process of "initialization" of the tuning procedure of the cut-off frequencies of the through band in the stage of acquisition and conditioning of biopotential signals, in accordance with the present invention.
Figura 10.- Muestra un diagrama de flujo del proceso de ajuste de la frecuencia de corte de baja frecuencia dentro del procedimiento de sintonización de la banda pasante de la etapa de adquisición y acondicionamiento de señales biopotenciales, de acuerdo con la presente invención. Figure 10.- Shows a flow chart of the process of adjusting the low frequency cut-off frequency within the tuning procedure of the pass band of the acquisition and conditioning stage of biopotential signals, in accordance with the present invention.
Figura 1 1 .- Muestra un diagrama de flujo del proceso de ajuste de la frecuencia de corte de alta frecuencia dentro del procedimiento de sintonización de la banda pasante de la etapa de adquisición y acondicionamiento de señales biopotenciales, de acuerdo con la presente invención. Figura 12.- Muestra un diagrama de flujo el proceso de calibración de un "amplificador de ganancia vanable" comprendido en la etapa de adquisición y acondicionamiento de señales biopotenciales, de acuerdo con la presente invención. Este proceso de calibración se lleva a cabo en la "inicialización" del procedimiento de sintonización de las frecuencias de corte de la banda pasante de dicha etapa de adquisición y acondicionamiento de señal. Figure 1 1 .- It shows a flow chart of the process of adjusting the high frequency cut-off frequency within the tuning procedure of the pass band of the stage of acquisition and conditioning of biopotential signals, in accordance with the present invention. Figure 12.- A flow chart shows the calibration process of a "gainable amplifier" comprised in the stage of acquisition and conditioning of biopotential signals, in accordance with the present invention. This calibration process is carried out in the "initialization" of the tuning procedure of the cut-off frequencies of the through band of said acquisition and signal conditioning stage.
Figura 13.- Muestra un diagrama de flujo el proceso de calibración de un "amplificador de ganancia vanable" comprendido en la etapa de adquisición y acondicionamiento de señales biopotenciales, de acuerdo con la presente invención. Dicho ajuste se lleva a cabo en el proceso de calibración de dicha etapa de adquisición y acondicionamiento de señal. Figura 14.- Muestra el procedimiento de validación por un supervisor externo del mecanismo de auto-calibración de la etapa de adquisición y acondicionamiento de señales biopotenciales, de acuerdo con la presente invención. Figura 15.- Muestra un ejemplo de realización del proceso de sintonización de las frecuencias de corte de la banda pasante de la etapa de adquisición y acondicionamiento de señales biopotenciales, de acuerdo con la presente invención. Figura 16.- Muestra un ejemplo de realización del proceso de ajuste de la ganancia de un amplificador de ganancia variable comprendido en la etapa de adquisición y acondicionamiento de señales biopotenciales, de acuerdo con la presente invención. DESCRIPCIÓN DE UN EJEMPLO DE REALIZACIÓN DE LA INVENCIÓN Figure 13.- A flow chart shows the calibration process of a "gainable amplifier" comprised in the stage of acquisition and conditioning of biopotential signals, in accordance with the present invention. Said adjustment is carried out in the process of calibrating said acquisition and signal conditioning stage. Figure 14.- Shows the validation procedure by an external supervisor of the self-calibration mechanism of the biopotential signal acquisition and conditioning stage, in accordance with the present invention. Figure 15.- Shows an example of the process of tuning the cut-off frequencies of the band through the stage of acquisition and conditioning of biopotential signals, in accordance with the present invention. Figure 16.- It shows an embodiment of the process of adjusting the gain of a variable gain amplifier comprised in the stage of acquisition and conditioning of biopotential signals, in accordance with the present invention. DESCRIPTION OF AN EXAMPLE OF EMBODIMENT OF THE INVENTION
Seguidamente se realiza, con carácter ilustrativo y no limitativo, una descripción de un ejemplo de realización de la invención, haciendo referencia a la numeración adoptada en las figuras. Then, a description of an embodiment of the invention is made, by way of illustration and not limitation, with reference to the numbering adopted in the figures.
La figura 1 representa el diagrama funcional de un sistema para la monitorización de biopotenciales eléctricos 10000, cuyo propósito es la captura, procesado y transmisión de valores representativos de la señal eléctrica detectada mediante un electrodo 20000. El sistema comprende una etapa para la adquisición y acondicionamiento de señal 1 1000, una sección de procesamiento digital 12000 y un bloque para la transferencia de información al usuario 13000. Es importante resaltar que esta división funcional no comporta necesariamente una separación física de los elementos que componen el sistema para la monitorización de biopotenciales eléctricos 10000. Así, por ejemplo, elementos del bloque funcional 12000 pueden estar alojados sobre el mismo substrato que elementos del bloque 1 1000, o también es posible que los bloques 1 1000-13000 compongan en conjunto una única entidad física inseparable. Figure 1 represents the functional diagram of a system for the monitoring of electrical biopotentials 10000, whose purpose is the capture, processing and transmission of representative values of the electrical signal detected by means of an electrode 20000. The system comprises a stage for the acquisition and conditioning of signal 1 1000, a section of digital processing 12000 and a block for the transfer of information to the user 13000. It is important to note that this functional division does not necessarily entail a physical separation of the elements that make up the system for monitoring 10000 electric biopotentials Thus, for example, elements of functional block 12000 can be housed on the same substrate as elements of block 1 1000, or it is also possible that blocks 1 1000-13000 together comprise a single inseparable physical entity.
La presente invención se centra en la primera de las secciones comprendidas en un sistema para la monitorización de biopotenciales eléctricos 10000, esto es, la etapa de adquisición y acondicionamiento de señal 1 1000 y, más en concreto, en la descripción de medios y procedimientos de calibración automáticos para el acondicionamiento de señal que se expondrán más adelante. The present invention focuses on the first of the sections comprised in a system for the monitoring of electrical biopotentials 10000, that is, the acquisition and conditioning stage of signal 1000 and, more specifically, in the description of means and procedures of Automatic calibration for signal conditioning that will be discussed later.
La figura 2 muestra el diagrama de bloques de una etapa para la adquisición y acondicionamiento de señal 1 1000, de acuerdo con la presente invención. Dicha etapa 1 1000 comprende un amplificador de bajo ruido 1 1 100 (denominado LNA, por sus siglas en inglés, "Low Noise Amplifier") para amplificar la señal eléctrica capturada desde un electrodo 20000; un circuito 1 1200 para estimar los artefactos debidos, por ejemplo, a alteraciones en la impedancia de la interfaz entre tejido y electrodo o a la aplicación de terapias de electromodulación, que potencialmente pueden contaminar la señal capturada por el amplificador de bajo ruido 1 1 100; un amplificador de ganancia variable 1 1300 (denominado PGA, por sus siglas en inglés, "Programmable Gain Amplifier") para ajusfar los niveles de tensión de la señal proporcionada por el amplificador de bajo ruido 1 1 100 una vez sustraída la señal generada por el circuito 1 1200 para la estimación de artefactos; un convertidor analógico- digital 1 1400 (denominado ADC, por sus siglas en inglés, "Analogue-to-Digital Converter") para digitalizar la señal proporcionada por el amplificador de ganancia variable 1 1300; y un sistema de calibración para el acondicionamiento de biopotenciales eléctricos, objeto de la presente invención, que comprende a su vez una unidad de procesado digital (módulo de calibración) 1 1500 que configura la etapa para la adquisición y acondicionamiento de señal 1 1000 durante los procedimientos de calibración, y un sintetizador de frecuencia basado en barrido digital 1 1600 (denominado DDS, por sus siglas en inglés, "Direct Digital Synthesizer") para la generación de formas de onda sinusoidales de referencia. En el caso más general, el amplificador de ganancia variable 1 1300 incluye un lazo de cancelación de offset (denominado OCL, por sus siglas en inglés, "Offset Cancellation Loop") para eliminar las componentes en DC a la entrada del convertidor analógico-digital 1 1400 originadas por los desbalances a las entradas tanto del amplificador de ganancia variable 1 1300 como del amplificador de bajo ruido 1 1 100. Figure 2 shows the block diagram of a stage for the acquisition and conditioning of signal 1000 according to the present invention. Said step 1 1000 comprises a low noise amplifier 1 1 100 (called LNA, for its acronym in English, "Low Noise Amplifier") to amplify the electrical signal captured from a 20000 electrode; a circuit 1 1200 to estimate artifacts due, for example, to alterations in the impedance of the interface between tissue and electrode or to the application of electromodulation therapies, which can potentially contaminate the signal captured by the low noise amplifier 1 1 100; a variable gain amplifier 1 1300 (called PGA, for its acronym in English, "Programmable Gain Amplifier") to adjust the voltage levels of the signal provided by the low noise amplifier 1 1 100 once the signal generated by the 1 1200 circuit for the estimation of artifacts; an analog-digital converter 1 1400 (called ADC, for its acronym in English, "Analogue-to-Digital Converter") to digitize the signal provided by the variable gain amplifier 1 1300; and a calibration system for the conditioning of electrical biopotentials, object of the present invention, which in turn comprises a digital processing unit (calibration module) 1 1500 that configures the stage for the acquisition and conditioning of signal 1000 during calibration procedures, and a 1 1600 digital scan-based frequency synthesizer (called DDS) for the generation of reference sine waveforms. In the most general case, the variable gain amplifier 1 1300 includes an offset cancellation loop (called OCL, for its acronym in English, "Offset Cancellation Loop") to eliminate the DC components at the input of the analog-digital converter 1 1400 caused by the imbalances at the inputs of both the 1 1300 variable gain amplifier and the 1 1 100 low noise amplifier.
Las entradas a la etapa para la adquisición y acondicionamiento de señal 1 1000 son CLKTC y CONF. La señal CLKTC es un tren de pulsos periódicos con frecuencia conocida FTC, que se utiliza para la generación de señales lógicas de control y para secuenciar el funcionamiento de la etapa para la adquisición y acondicionamiento de señal 1 1000. La señal CONF es una entrada secuencial de datos que se utiliza para programar la unidad de procesado digital 1 1500 de un sistema de calibración, de acuerdo con la presente invención. Dicha unidad de procesado 1 1500 también utiliza la salida digital DATA generada por convertidor analógico-digital 1 1400 como variable de control. The inputs to the stage for the acquisition and conditioning of the 1000 signal are CLKTC and CONF. The CLKTC signal is a train of periodic pulses with known frequency FTC, which is used for the generation of logic control signals and to sequence the operation of the stage for the acquisition and conditioning of 1 1000 signal. The CONF signal is a sequential input. of data used to program the unit of 1 1500 digital processing of a calibration system, in accordance with the present invention. Said processing unit 1 1500 also uses the digital DATA output generated by analog-digital converter 1 1400 as a control variable.
Junto a estas entradas procedentes, en una configuración preferente, de la sección de procesamiento 12000 del sistema de monitorización 10000, las señales VBIO y VREF constituyen entradas que provienen de sendos electrodos en contacto con el paciente bajo monitorización. La señal VBIO es la respuesta eléctrica capturada por el electrodo 20000, que sirve de interfaz entre el tejido cuya actividad eléctrica se desea monitorizar y el sistema de monitorización 10000. La señal VREF es una tensión extraída desde otro electrodo 21000 con baja impedancia de entrada que sirve de referencia para el funcionamiento del amplificador de bajo ruido 1 1 100 y del circuito para la estimación de artefactos 1 1200. La presente invención no impone ninguna limitación ni sobre la geometría de los electrodos 20000 y 21000, ni sobre el tejido bajo observación. Together with these inputs, in a preferred configuration, of the processing section 12000 of the monitoring system 10000, the VBIO and VREF signals constitute inputs that come from two electrodes in contact with the patient under monitoring. The VBIO signal is the electrical response captured by the electrode 20000, which serves as an interface between the tissue whose electrical activity is to be monitored and the monitoring system 10000. The VREF signal is a voltage extracted from another electrode 21000 with low input impedance that It serves as a reference for the operation of the low noise amplifier 1 1 100 and the circuit for the estimation of artifacts 1 1200. The present invention does not impose any limitation either on the geometry of the electrodes 20000 and 21000, nor on the tissue under observation.
Como reconocerá el experto en la técnica, la cabecera de la etapa de adquisición y acondicionamiento de señal 1 1000, formada por el amplificador de bajo ruido 1 1 100 y el amplificador de ganancia variable 1 1300, se ha de diseñar de forma que proporcione una característica de transferencia paso de banda en el camino de señal para, de este modo, filtrar todas aquellas componentes en frecuencia que interfieren en la lectura de la señal biopotencial bajo observación. De acuerdo con la presente invención, y en consonancia con el estado de la técnica, dicha operación de filtrado se realiza de forma distribuida de forma que la frecuencia de corte del límite inferior de la banda pasante BF (por baja frecuencia) se implementa a la entrada del amplificador de bajo ruido 1 1 100, mientras la frecuencia de corte del límite superior de la banda pasante AF (por alta frecuencia) se implementa en algún punto previo a la digitalización por el convertidor analógico-digital 1 1400. La presente invención no impone ninguna restricción sobre este último aspecto de manera que dicho límite superior AF se puede implementar a la salida del amplificador de bajo ruido 1 1 100, como ocurre en algunas realizaciones del estado de la técnica, o bien a la salida del amplificador de ganancia vanable 1 1300, como se reporta en otras. As the person skilled in the art will recognize, the header of the 1 1000 signal acquisition and conditioning stage, formed by the low-noise amplifier 1 1 100 and the variable gain amplifier 1 1300, must be designed to provide a band pass transfer characteristic in the signal path to, thus, filter all those frequency components that interfere with the reading of the biopotential signal under observation. In accordance with the present invention, and in accordance with the state of the art, said filtering operation is carried out in a distributed manner so that the cutoff frequency of the lower limit of the BF passband (for low frequency) is implemented at the input of the low noise amplifier 1 1 100, while the cutoff frequency of the upper limit of the AF pass band (due to high frequency) is implemented at some point prior to scanning by the analog-digital converter 1 1400. The present invention does not imposes no restrictions on this last aspect so that said upper limit AF can be implemented at the output of the low noise amplifier 1 1 100, as in some embodiments of the prior art, or at the output of the gainable amplifier 1 1300, as reported in others.
De acuerdo con la presente invención, tanto las frecuencias de corte BF y AF de la cabecera de la etapa de adquisición y acondicionamiento de señal 1 1000, como la ganancia PG del amplificador de ganancia vanable 1 1300 son programables en el sentido de que se pueden adaptar por medio de parámetros de ajuste analógicos o digitales comprendidos en los bloques 1 1 100 y 1 1300. Dichos parámetros pueden ser resistencias, capacidades, transconductancias o, en general, cualquier elemento o conjunto de elementos que permita la variación monotónica de BF, AF y PG de forma independiente, sin influencia mutua. In accordance with the present invention, both the BF and AF cutoff frequencies of the header of the signal acquisition and conditioning stage 1 1000, as well as the gain PG of the gainable amplifier 1 1300 are programmable in the sense that they can be adapt by means of analog or digital adjustment parameters included in blocks 1 1 100 and 1 1300. These parameters can be resistors, capacities, transconductances or, in general, any element or set of elements that allows the monotonic variation of BF, AF and PG independently, without mutual influence.
Dependiendo de la implementación particular del los bloques de circuito 1 1 100 y 1 1300, aspecto que no forma parte de la presente invención pero para el que existen numerosos ejemplos en la literatura, la programación de las variables BF, AF y PG, se puede realizar en modo continuo o en modo discreto. La diferencia estriba en si se realiza un reglaje analógico (modo continuo) o una programación digital (modo discreto) del parámetro o conjunto de parámetros de ajuste. Las técnicas en modo continuo, esencialmente basadas en arquitecturas maestro-esclavo, permiten un ajuste muy preciso de dichos parámetros, si bien son de mayor complejidad y requieren mecanismos adicionales para el almacenamiento y refresco de corrientes y/o tensiones. Por el contrario, las técnicas en modo discreto, esencialmente basadas en el empleo de matrices de elementos de circuito controlados binariamente, son estructuralmente simples y usan sencillos registros digitales para almacenar las configuraciones de calibración, aunque la precisión, limitada por la cuantización impuesta por la programación digital, es usualmente inferior al método de ajuste analógico. Es importante resaltar que los medios y procedimientos propuestos en la presente invención son igualmente aplicables para ambos tipos de programación, analógico o digital, y, por tanto, son de propósito general y no están ligados a ninguna realización particular del amplificador de bajo ruido 1 1 100, ni a ninguna implementación concreta del amplificador de ganancia variable 1 1300. En todo caso, en aplicaciones que requieren consumos ultra- bajos de energía como, por ejemplo, en sistemas de monitorización implantables, se usarán preferentemente técnicas de programación digital que presentan menor demanda de potencia eléctrica. Depending on the particular implementation of circuit blocks 1 1 100 and 1 1300, an aspect that is not part of the present invention but for which there are numerous examples in the literature, the programming of the variables BF, AF and PG, can be perform in continuous mode or in discrete mode. The difference is whether an analog adjustment (continuous mode) or digital programming (discrete mode) of the parameter or set of adjustment parameters is performed. Continuous mode techniques, essentially based on master-slave architectures, allow a very precise adjustment of these parameters, although they are more complex and require additional mechanisms for the storage and cooling of currents and / or voltages. In contrast, discrete mode techniques, essentially based on the use of binary controlled circuit element arrays, are structurally simple and use simple digital records to store calibration settings, although the accuracy, limited by the quantization imposed by the Digital programming is usually inferior to the analog setting method. It is important to note that the means and procedures proposed in the present invention are equally applicable for both types of programming, analog or digital, and therefore are general purpose and are not linked to any particular embodiment of the low noise amplifier 1 1 100, or any specific implementation of the variable gain amplifier 1 1300. In any case, in applications that require ultra-low energy consumption, for example, in implantable monitoring systems, digital programming techniques that have less demand for electrical power.
A modo de ilustración y sin suponer en ningún caso una limitación de la presente invención, la figura 3(a) muestra un ejemplo en el que las frecuencias de corte BF y AF se pueden controlar digitalmente a través de las palabras de control SFC<1 :NBF> y \FC<1 :NAF>, respectivamente. Los valores NBF y NAF representan el número de bits comprendidos en dichas palabras de control. Sin pérdida de generalidad, las frecuencias de corte BF y AF crecen conforme aumentan los valores programados en las correspondientes palabras digitales de control. La figura 3(a) ¡lustra los rangos de sintonía de las frecuencias de corte BF y AF para el caso NBF = 3 y NAF = 2. Como se observa, la ganancia total de la cabecera de la etapa de adquisición y acondicionamiento de señal 1 1000, que viene dada por el producto de la ganancia G del amplificador de bajo ruido 1 1 100 y la ganancia PG del amplificador de ganancia variable 1 1300, permanece inalterada independientemente de la programación digital efectuada. By way of illustration and without supposing in any case a limitation of the present invention, Figure 3 (a) shows an example in which the BF and AF cutoff frequencies can be digitally controlled via the control words SFC <1 : NBF> and \ FC <1: NAF>, respectively. The NBF and NAF values represent the number of bits included in said control words. Without loss of generality, the BF and AF cutoff frequencies grow as the values programmed in the corresponding digital control words increase. Figure 3 (a) illustrates the tuning ranges of the BF and AF cutoff frequencies for the case NBF = 3 and NAF = 2. As can be seen, the total gain of the header of the signal acquisition and conditioning stage 1 1000, which is given by the product of the gain G of the low noise amplifier 1 1 100 and the gain PG of the variable gain amplifier 1 1300, remains unchanged regardless of the digital programming performed.
De forma similar, la figura 3(b) ¡lustra un ejemplo en el que la ganancia PG del amplificador de ganancia variable 1 1300 se controla mediante una palabra digital PGC< NPG>, donde NPG representa la longitud de dicha palabra (NPG = 3 en la gráfica). Sin pérdida de generalidad, la ganancia PG crece conforme aumenta la palabra digital de control. Como se observa, las frecuencias de corte BF y AF de la característica de transferencia de la cabecera de la etapa de adquisición y acondicionamiento de señal 1 1000, permanece inalterada independientemente de la programación digital de la palabra PGC. Similarly, Figure 3 (b) illustrates an example in which the PG gain of the variable gain amplifier 1 1300 is controlled by a digital word PGC <NPG>, where NPG represents the length of said word (NPG = 3 in the graph). Without loss of generality, the PG gain grows as the digital control word increases. As noted, the BF and AF cutoff frequencies of the transfer characteristic of the stage header of acquisition and conditioning of signal 1 1000, remains unchanged regardless of the digital programming of the word PGC.
De acuerdo con la presente invención, el propósito del sistema de calibración para el acondicionamiento de biopotenciales eléctricos, compuesto por los bloques 1 1500 y 1 1600, es la programación automática de los parámetros de ajuste para la definición de las variables BF, AF y PG de forma que la banda pasante del filtrado sólo incluya el contenido espectral de la señal objeto de monitorización y que el nivel de amplificación proporcionado por el amplificador de ganancia variable 1 1300 se adapte al fondo de escala del convertidor analógico-digital 1 1400. In accordance with the present invention, the purpose of the calibration system for the conditioning of electric biopotentials, consisting of blocks 1 1500 and 1 1600, is the automatic programming of the adjustment parameters for the definition of the variables BF, AF and PG so that the pass band of the filter only includes the spectral content of the signal being monitored and that the amplification level provided by the variable gain amplifier 1 1300 is adapted to the full scale of the analog-digital converter 1 1400.
De acuerdo con la presente invención, la programación automática de los parámetros de ajuste para la definición de las variables BF, AF y PG se realiza mediante técnicas de procesado digital (del inglés "digitally assisted calibration") que sacan partido de la presencia de un convertidor analógico- digital 1 1400 en la etapa de adquisición y acondicionamiento de señal 1 1000. Tanto para las variables de frecuencia BF y AF, como para la variable de ganancia, PG, el bloque de procesado digital 11500 establece un lazo cerrado de control automático que modifica los correspondientes parámetros de ajuste, de acuerdo con la respuesta cuantizada de la cabecera de la etapa de adquisición y acondicionamiento de señal 1 1000 frente a determinados estímulos. En el caso de las frecuencias de corte BF y AF, el lazo cerrado de control, o lazo de sintonía, usa como estímulos los tonos de referencia generados mediante el sintetizador de frecuencia basado en barrido digital 1 1600 que, de acuerdo con la presente invención, forma parte de un sistema de calibración de la etapa de adquisición y acondicionamiento de señal 1 1000. In accordance with the present invention, the automatic programming of the adjustment parameters for the definition of the variables BF, AF and PG is carried out by means of digital processing techniques (in English "digitally assisted calibration") that take advantage of the presence of a analog-to-digital converter 1 1400 in the acquisition and conditioning stage 1 1000. For both the frequency variables BF and AF, as well as for the gain variable, PG, the digital processing block 11500 establishes a closed loop of automatic control which modifies the corresponding adjustment parameters, in accordance with the quantized response of the header of the 1 1000 signal acquisition and conditioning stage against certain stimuli. In the case of the BF and AF cutoff frequencies, the closed control loop, or tuning loop, uses as reference stimuli generated by the 1 1600 digital scan based frequency synthesizer which, in accordance with the present invention , is part of a calibration system of the acquisition and conditioning stage of the 1000 signal.
La figura 4 muestra el diagrama de bloques del sintetizador de frecuencia 1 1600 que, de acuerdo con la presente invención, comprende un divisor de frecuencia programable 1 1610 que genera una señal de reloj CLKDIV a partir de la señal de reloj CLKTC y del dato de frecuencia NFREQ proporcionado a través de la conexión serie CONF (véase figura 2); un convertidor fase-amplitud 1 1620 que, cuando se temporiza con la señal de reloj CLKDIV, genera una forma de onda sinusoidal cuantizada en tiempo-discreto; un convertidor digital- analógico 1 1630 (denominado DAC, por sus siglas en inglés, "Digital-to- Analogue Converter") con P-bits de resolución que convierte la forma de onda digital a la entrada en una señal analógica cuantizada; un circuito de adaptación 1 1640 que acondiciona la salida del DAC 1 1630 para cerrar el lazo de sintonía de acuerdo con las características de entrada del amplificador de bajo ruido 1 1 100; un contador lógico disparado por flancos 1 1650 que contabiliza el número de semiperiodos de la forma de onda sinusoidal generada por el convertidor fase-amplitud 1 1620; y un comparador digital 1 1660 que detecta cuando el número de semiperiodos contabilizados por el contador 1 1650 supera un determinado número NT de semiperiodos. Dicho número NT, definido a través de la conexión serie CONF, se estima como representativo de la fase de estabilización del lazo cerrado de control para el ajuste de las frecuencias de corte BF y AF. La conexión serie CONF también proporciona señales de activación de los bloques comprendidos en el sintetizador de frecuencia 1 1600, de forma que cuando están deshabilitados entran en modo de bajo consumo. Figure 4 shows the block diagram of the frequency synthesizer 1 1600 which, according to the present invention, comprises a divider of programmable frequency 1 1610 that generates a CLKDIV clock signal from the CLKTC clock signal and the NFREQ frequency data provided through the CONF serial connection (see figure 2); a phase-amplitude converter 1 1620 which, when timed with the CLKDIV clock signal, generates a sine wave form quantized in discrete time; a digital analog converter 1 1630 (called DAC, for its acronym in English, "Digital-to-Analogue Converter") with P-bits resolution that converts the digital waveform to the input into a quantized analog signal; an adaptation circuit 1 1640 that conditions the output of the DAC 1 1630 to close the tuning loop according to the input characteristics of the low noise amplifier 1 1 100; a logic counter triggered by flanks 1 1650 that counts the number of half periods of the sine waveform generated by the phase-amplitude converter 1 1620; and a digital comparator 1 1660 that detects when the number of half-periods counted by the counter 1 1650 exceeds a certain number NT of half-periods. Said NT number, defined through the CONF series connection, is estimated as representative of the stabilization phase of the closed control loop for the adjustment of the BF and AF cutoff frequencies. The CONF series connection also provides activation signals of the blocks included in the frequency synthesizer 1 1600, so that when they are disabled they enter low consumption mode.
En una realización preferente de la presente invención, el divisor de frecuencia programable 1 1610 se implementa mediante la detección de sobredisparos en un acumulador digital con L-bits de resolución, temporizado por la señal CLKTC, que usa el dato de frecuencia NFREQ como palabra de control de paso. La carga del dato de frecuencia NFREQ se realiza síncronamente con el pulso FLOAD. El lapso de tiempo entre sobredisparos corresponde a un periodo de la señal CLKDIV obtenida a la salida del divisor de frecuencia programable 1 1610. De acuerdo con esta realización preferente, la frecuencia de FDIV de la señal CLKDIV viene dada por la expresión FDIV = NFREQ-FTCI21, donde FTC representa la frecuencia de la señal CLKTC. En el libro "Digital synthesizers and transmitiere for software radio" de J. Vanka, publicado por la Editorial Springer en Dordrecht, The Netherlands, en el año 2005, se pueden encontrar ejemplos eficientes de implementación de acumuladores digitales. In a preferred embodiment of the present invention, the programmable frequency divider 1 1610 is implemented by detecting over-shots in a digital accumulator with L-bits resolution, timed by the CLKTC signal, which uses the NFREQ frequency data as the word of step control NFREQ frequency data is loaded synchronously with the FLOAD pulse. The time interval between over-shots corresponds to a period of the CLKDIV signal obtained at the output of the programmable frequency divider 1 1610. In accordance with this preferred embodiment, the FDIV frequency of the CLKDIV signal is given by the expression FDIV = NFREQ- FTCI2 1 , where FTC represents the frequency of the CLKTC signal. At J. Vanka's book "Digital synthesizers and transmitiere for software radio", published by Springer Publishing in Dordrecht, The Netherlands, in 2005, you can find efficient examples of implementation of digital accumulators.
De acuerdo con la presente invención, el convertidor fase-amplitud 1 1620 proporciona 4M muestras contiguas cuantizadas por periodo de función seno. Cada muestra viene dada por una palabra digital de P bits de longitud, B<0, P- 1 >, donde el término S(0) representa el bit menos significativo y el término B(P- 1 ), el más significativo. La razón de salida del convertidor de fase-amplitud 1 1620 es una muestra por ciclo de reloj CLKDIV. Por tanto, la frecuencia FDDS de la forma de onda sinusoidal generada por el convertidor fase-amplitud 1 1620 es In accordance with the present invention, the phase-amplitude converter 1 1620 provides 4M contiguous samples quantized per period of sine function. Each sample is given by a digital word of P bits in length, B <0, P-1>, where the term S (0) represents the least significant bit and the term B (P-1), the most significant. The output ratio of the phase-amplitude converter 1 1620 is one sample per CLKDIV clock cycle. Therefore, the FDDS frequency of the sine waveform generated by the phase-amplitude converter 1 1620 is
1 1 FTC 1 1 FTC
FDDS =—— FDIV =——— - NFREQ FDDS = —— FDIV = —— - - NFREQ
4M 4M 2L 4M 4M 2 L
La figura 5(a) muestra el diagrama funcional de un convertidor fase-amplitud 1 1620 que, de acuerdo con una realización de la presente invención, comprende una máquina de estado 1 1621 que controla la operación del convertidor; una memoria 1 1622 con (M +1 ) x P elementos y lectura por filas, las cuales almacenan muestras contiguas de un arco de π/2 radianes de la función seno; y dos registros de desplazamiento con M posiciones, uno con desplazamiento descendente (1 1623) y otro con desplazamiento ascendente (1 1624), cuyas salidas están conectadas a los controles de habilitación de las filas de la memoria 1 1622. El experto en la técnica comprenderá que ambos registros de desplazamiento se podrían unificar en un único registro de desplazamiento bidireccional, sin embargo, para una mejor explicación de los conceptos que continúan se considerarán dos registros diferenciados. Obsérvese que la memoria 1 1622 sólo almacena M +1 muestras correspondientes a un cuarto de periodo de la función seno. Esto es así porque la síntesis de la forma de onda completa es trivial a partir de la simetría π 12 de la función seno. De acuerdo con esta estrategia de compresión de datos, se simplifica notablemente el hardware necesario para implementar el convertidor fase-amplitud 1 1620. Figure 5 (a) shows the functional diagram of a phase-amplitude converter 1 1620 which, according to an embodiment of the present invention, comprises a state machine 1 1621 that controls the operation of the converter; 1 1622 memory with (M + 1) x P elements and reading by rows, which store adjacent samples of an arc of π / 2 radians of the sine function; and two displacement registers with M positions, one with downward displacement (1 1623) and one with upward displacement (1 1624), whose outputs are connected to the enabling controls of memory rows 1 1622. The person skilled in the art You will understand that both displacement records could be unified into a single two-way displacement register, however, for a better explanation of the concepts that follow, two differentiated records will be considered. Note that memory 1 1622 only stores M +1 samples corresponding to a quarter period of the sine function. This is because the synthesis of the complete waveform is trivial from the π 12 symmetry of the sine function. In accordance with this data compression strategy, the hardware needed to implement the phase-amplitude converter 1 1620 is greatly simplified.
La operación del convertidor fase-amplitud 1 1620 se ¡lustra con el diagrama de flujo de la figura 5(b). Cuando el dispositivo está inactivo todas las variables internas están a O' lógico, y la memoria 1 1622 no libera ninguna salida. Cuando recibe una señal de activación desde la conexión serie CONF, se carga síncronamente con la señal CLKDIV un lógico en la primera posición del registro de desplazamiento descendente 1 1623. A cada ciclo de reloj, el bit activo se desplaza por el registro y habilita la lectura de la correspondiente fila de la memoria 1 1622. Cuando se alcanza el final del registro 1 1623, se activa la señal de fin de desplazamiento, Fd = y se deshabilita el bloque. En respuesta a la señal Fd activa, se habilita el registro de desplazamiento ascendente 1 1624 y se carga un lógico en la primera posición de dicho registro. Una vez en funcionamiento el registro 1 1624, la señal Fd vuelve al nivel lógico bajo. Como en el caso anterior, el bit activo se desplaza por el registro 1 1624 y habilita, a cada paso de reloj, la lectura de la correspondiente fila de la memoria 1 1622. Cuando se alcanza el final del registro 1 1624, se activa la señal de fin de desplazamiento, Fu = y se deshabilita el bloque. Al mismo tiempo, la señal lógica INV, que marca las transiciones de π radianes en la función seno, cambia su estado por el complementario. En respuesta a la señal Fu activa, se vuelve a habilitar el registro de desplazamiento descendente 1 1624 y, una vez en funcionamiento, la señal Fu vuelve al nivel lógico bajo. A partir de este punto se repite todo el proceso, salvo que se instruya lo contrario desde la conexión serie CONF. La figura 4 muestra de forma ilustrativa las formas de onda que exhiben las salidas B e INV proporcionadas por el convertidor fase-amplitud 1 1620. The operation of the phase-amplitude converter 1 1620 is illustrated with the flow chart of Figure 5 (b). When the device is inactive all internal variables are set to logical O ', and memory 1 1622 does not release any output. When it receives an activation signal from the CONF serial connection, a logic is loaded synchronously with the CLKDIV signal in the first position of the downward register 1 1623. At each clock cycle, the active bit moves through the register and enables the reading of the corresponding row of memory 1 1622. When the end of register 1 1623 is reached, the end of travel signal, Fd = is activated and the block is disabled. In response to the active Fd signal, the upward shift register 1 1624 is enabled and a logic is loaded in the first position of said register. Once register 1 1624 is in operation, the signal Fd returns to the low logic level. As in the previous case, the active bit moves through register 1 1624 and enables, at each clock step, the reading of the corresponding row of memory 1 1622. When the end of register 1 1624 is reached, the End of travel signal, Fu = and the block is disabled. At the same time, the logical signal INV, which marks the transitions of π radians in the sine function, changes its state to the complementary one. In response to the active Fu signal, the downward shift register 1 1624 is re-enabled and, once in operation, the Fu signal returns to the low logic level. From this point on, the whole process is repeated, unless otherwise instructed from the CONF serial connection. Figure 4 illustratively shows the waveforms exhibiting outputs B and INV provided by the phase-amplitude converter 1 1620.
El contador lógico 1 1650 usa la salida INV del convertidor fase-amplitud 1 1620 para contabilizar el número de semiperiodos de la forma de onda sinusoidal generada por el convertidor fase-amplitud 1 1620 a partir de la acción de reinicio marcada por el disparo del pulso de carga FLOAD. Cuando el recuento del contador lógico 1 1650 supera el valor NT, la señal de salida TRAN del comparador digital 1 1650 pasa de estado lógico a estado lógico Ό'. El intervalo temporal comprendido entre los cambios de estado de la señal TRAN se elige para cada dato de frecuencia NFREQ como representativo del tiempo necesario para que el lazo de sintonía formado por la cabecera de la etapa de adquisición y acondicionamiento de señal 1 1000 y el sintetizador de frecuencia 1 1600 alcance el régimen estacionario. Logic counter 1 1650 uses the INV output of the phase-amplitude converter 1 1620 to count the number of half-periods of the sine waveform generated by the phase-amplitude converter 1 1620 from the reset action marked by the trigger of the FLOAD load pulse. When the count of logic counter 1 1650 exceeds the NT value, the TRAN output signal of digital comparator 1 1650 changes from logical state to logical state Ό '. The time interval between changes in the state of the TRAN signal is chosen for each NFREQ frequency data as representative of the time required for the tuning loop formed by the header of the 1 1000 signal acquisition and conditioning stage and the synthesizer of frequency 1 1600 reach the steady state.
De acuerdo con la presente invención, la longitud de las palabras digitales almacenadas en una memoria 1 1622 comprendida en el convertidor fase- amplitud 1 1620 coincide con la resolución P del convertidor digital-analógico 1 1630. In accordance with the present invention, the length of the digital words stored in a memory 1 1622 comprised in the phase-amplitude converter 1 1620 coincides with the resolution P of the digital-analog converter 1 1630.
Aunque la presente invención no impone ninguna restricción sobre la implementación del convertidor digital-analógico 1 1630, éste usará preferentemente técnicas en modo de corriente y proporcionará dos salidas, una complementaria de la otra. Ejemplos conocidos de estas técnicas son los convertidores basados en arquitecturas R-2R y los convertidores basados en convección de corriente (véase el capítulo 3 del libro "Data Converters" de F- Maloberti, publicado por la Editorial Springer en Dordrecht, The Netherlands, en el año 2007). Como se detalla a continuación, esta elección permite completar fácilmente la síntesis de la forma de onda sinusoidal completa en el dominio analógico. Although the present invention does not impose any restrictions on the implementation of the digital-analog converter 1 1630, it will preferably use current mode techniques and will provide two outputs, one complementary to the other. Known examples of these techniques are R-2R architecture-based converters and current-convection-based converters (see chapter 3 of the F-Maloberti "Data Converters" book, published by Springer Publishing in Dordrecht, The Netherlands, in the year 2007). As detailed below, this choice allows you to easily complete the synthesis of the complete sine waveform in the analog domain.
En un ejemplo de realización de la presente invención, ¡lustrado en la figura 6, el convertidor digital-analógico 1 1630 usa una arquitectura R-2R que genera términos de corriente pesados binariamente a partir de una corriente de referencia IREF. La corriente /+ está formada por la superposición de aquellos términos de corriente habilitados por los lógicos contenidos en la palabra digital de entrada, S<0, P-1 >. Por el contrario, la corriente /- está compuesta por la combinación de los términos de corriente habilitados por los O' lógicos contenidos en la referida palabra digital; combinación a la que se resta un término adicional IREF. A la salida de la arquitectura R-2R, un sencillo arreglo de llaves permite completar la síntesis de la forma de onda sinusoidal completa en el dominio analógico usando la señal INV proporcionada por el convertidor fase-amplitud 1 1620. Así, las corrientes de salida lout+ e lout- se conforman alternando las señales /+ e /-, de acuerdo con las transiciones de π radianes de la función seno. Como se muestra en la figura 6, las corrientes lout+ e lout- constituyen las entradas a un circuito de adaptación 1 1640, que en este ejemplo de realización de la presente invención, está formado por un convertidor corriente a tensión mediante un amplificador operacional. Las tensiones de salida, VDDS+ y VDDS-, del circuito de adaptación 1 1640 están confinadas entre los valores -R2 - IREF y R2 - IREF . De acuerdo con ello, los parámetros R2 e IREF se han de elegir de forma que dichos límites estén comprendidos dentro del rango de entrada de un amplificador de bajo ruido 1 1 100, de acuerdo con la presente invención. Suponiendo que el convertidor digital-analógico 1 1630 es ideal, el espectro a su salida por efecto de la retención de señal viene dado por, In an exemplary embodiment of the present invention, illustrated in Figure 6, digital analog converter 1 1630 uses an R-2R architecture that generates binary heavy current terms from an IREF reference current. The current / + is formed by the superposition of those current terms enabled by the logic contained in the digital input word, S <0, P-1>. On the contrary, the current / - is composed by the combination of the current terms enabled by the logical O 'contained in the said digital word; combination to which an additional IREF term is subtracted. At the output of the R-2R architecture, a simple array of keys allows the synthesis of the complete sine waveform in the analog domain to be completed using the INV signal provided by the 1620 phase-amplitude converter. Thus, the output currents lout + e lout- are formed by alternating the / + e / - signals, according to the transitions of π radians of the sine function. As shown in Figure 6, the lout + and lout- currents constitute the inputs to an adaptation circuit 1 1640, which in this embodiment of the present invention, is formed by a current-to-voltage converter by means of an operational amplifier. The output voltages, VDDS + and VDDS-, of the adaptation circuit 1 1640 are confined between the values -R 2 - IREF and R 2 - IREF. Accordingly, the parameters R 2 and IREF must be chosen so that said limits are within the input range of a low noise amplifier 1 1 100, in accordance with the present invention. Assuming that the digital analog converter 1 1630 is ideal, the spectrum at its output due to signal retention is given by,
H(f) = -∑ sinc(— ) . «5( - m - FDDS) H (f) = -∑ sinc (-). «5 (- m - FDDS)
sin(7rx) without (7rx)
donde sinc(x) , m = 4kM ± 1 , y k es un número entero. where sinc (x), m = 4kM ± 1, and k is an integer.
7ΓΧ  7ΓΧ
Por consiguiente, además del tono fundamental en FDDS, la señal presenta otras imágenes a frecuencias k FDIV ± FDDS = m FDDS que están tanto más alejadas del tono fundamental cuanto mayor sea la resolución del convertidor fase-amplitud 1 1620. La atenuación de dichas imágenes respecto al tono fundamental por efecto de la función sinc(x), viene dada por, Therefore, in addition to the fundamental tone in FDDS, the signal presents other images at frequencies k FDIV ± FDDS = m FDDS that are further away from the fundamental tone the higher the resolution of the converter phase-amplitude 1 1620. The attenuation of these images with respect to the fundamental tone due to the effect of the sinc (x) function is given by,
A(dB) = 20 log(4/c/W ± 1) y, por tanto, es tanto mayor cuanto mayor sea M. Junto a estas imágenes, la respuesta del sintetizador de frecuencia 1 1600 también incluye otros armónicos a frecuencias \±i - FDIV ± j -FDDS\ , donde los índices /', j son números enteros, que son atribuibles a la resolución finita P del convertidor digital-analógico 1 1630 y a imperfecciones en su implementación tales como desapareamientos de dispositivos, errores de establecimiento, glitches, jitter, retrasos diferentes en las líneas digitales, etcétera. A (dB) = 20 log (4 / c / W ± 1) and, therefore, is much higher the larger M. Together with these images, the response of the frequency synthesizer 1 1600 also includes other harmonics at frequencies \ ± i - FDIV ± j -FDDS \, where the indices / ' , j are integers, which are attributable to the finite resolution P of the digital-analog converter 1 1630 and imperfections in its implementation such as device mismatches, establishment errors, glitches, jitter, different delays in digital lines, and so on.
Con vistas a atenuar dichas imágenes y armónicos, el circuito de adaptación 1 1640 incluye condensadores C2 en el camino de realimentación del amplificador operacional que confieren a la estructura una característica paso de baja de primer orden. Estos condensadores permiten eliminar glitches de conmutación y mejorar la pureza espectral de la señal sinusoidal generada por el sintetizador de frecuencia 1 1600. With a view to attenuating said images and harmonics, the adaptation circuit 1 1640 includes capacitors C 2 in the feedback path of the operational amplifier that give the structure a first-order low-pass characteristic. These capacitors make it possible to eliminate switching glitches and improve the spectral purity of the sinusoidal signal generated by the 1 1600 frequency synthesizer.
Haciendo uso de los medios expuestos, la figura 7 muestra el procedimiento de calibración 30000 para el ajuste del amplificador de bajo ruido 1 1 100 y del amplificador de ganancia variable 1 1300, de acuerdo con la presente invención. El procedimiento 30000 se habilita una vez recibida la correspondiente instrucción a través del enlace de comunicación serie CONF. El método de calibración 30000 está caracterizado porque comprende las siguientes fases:Using the exposed means, Figure 7 shows the calibration procedure 30000 for the adjustment of the low noise amplifier 1 1 100 and the variable gain amplifier 1 1300, in accordance with the present invention. Procedure 30000 is enabled once the corresponding instruction is received through the serial communication link CONF. The 30000 calibration method is characterized in that it comprises the following phases:
• en primer lugar (31000), se conectan las entradas del amplificador de bajo ruido 1 1 100 a las salidas del sintetizador de frecuencia 1 1600, de manera que las tensiones VIN y VDDS coinciden. Al mismo tiempo, se deshabilita el circuito para la estimación de artefactos 1 1200; • first (31000), the inputs of the low noise amplifier 1 1 100 are connected to the outputs of the frequency synthesizer 1 1600, so that the voltages VIN and VDDS coincide. At the same time, the circuit for the estimation of artifacts 1 1200 is disabled;
• en segundo lugar (32000), se procede a la sintonización de las frecuencias de corte que definen la banda pasante de la cabecera de la etapa de adquisición y acondicionamiento de señal 1 1000, según un procedimiento que se detallará con posterioridad en relación con la figura 8; • secondly (32000), tuning of the cutoff frequencies that define the through band of the header of the header is carried out 1 1000 signal acquisition and conditioning stage, according to a procedure that will be detailed later in relation to Figure 8;
• en tercer lugar (33000), se conectan las entradas del amplificador de bajo ruido 1 1 100 a los electrodos 20000 y 21000, de manera que las tensiones VIN+ y VBIO, por un lado, y las tensiones VIN- y VREF, por otro, coinciden. Al mismo tiempo, se habilita el circuito para la estimación de artefactos 1 1200;  • Third (33000), the inputs of the low noise amplifier 1 1 100 are connected to the 20000 and 21000 electrodes, so that the VIN + and VBIO voltages, on the one hand, and the VIN- and VREF voltages, on the other , match. At the same time, the circuit for the estimation of 1 1200 artifacts is enabled;
• en cuarto lugar (34000), se procede al ajuste de la ganancia en tensión del amplificador de ganancia variable 1 1 120, según un procedimiento que se detallará con posterioridad en relación con la figura 13.  • Fourth (34000), the voltage gain of the variable gain amplifier 1 1 120 is adjusted, according to a procedure that will be detailed later in relation to Figure 13.
• En quinto lugar (35000), si así se estima oportuno, se procede a la validación de los resultados del método de auto-calibración descrito por medio de un supervisor externo.  • Fifth (35,000), if deemed appropriate, the results of the self-calibration method described by an external supervisor are validated.
El procedimiento 32000 para el ajuste de las frecuencias de corte BF y AF de la banda pasante de la cabecera de la etapa de adquisición y acondicionamiento de señal 1 1000 comprende tres pasos, tal como se ¡lustra en la figura 8. A lo largo de todo el proceso, tal como se indicó en la figura 7, el nudo de entrada VIN del amplificador de bajo ruido 1 1 100 se conecta a la salida VDDS del sintetizador de frecuencia 1 1600 y, por tanto, se desconecta de los electrodos 20000 y 21000. Las fases, secuenciadas por el circuito de calibración 1 1500, son: The procedure 32000 for the adjustment of the BF and AF cutoff frequencies of the headband of the header of the acquisition and signal conditioning stage 1 1000 comprises three steps, as illustrated in Figure 8. Along The entire process, as indicated in Figure 7, the VIN input node of the low noise amplifier 1 1 100 is connected to the VDDS output of the frequency synthesizer 1 1600 and therefore disconnected from the electrodes 20000 and 21000. The phases, sequenced by the 1 1500 calibration circuit, are:
Paso 1 o de inicialización (32100), representado en la figura 9. Cuenta con las siguientes etapas: Step 1 or initialization (32100), represented in Figure 9. It has the following stages:
• en primer lugar (321 10), se configura la palabra digital NFREQ a través de la conexión serie CONF de forma que el sintetizador de frecuencias 1 1600 genere un tono de señal que, por diseño y aun contando con las desviaciones potenciales de las frecuencias de corte BF y AF, se sitúa en la banda pasante de la cabecera de la etapa de adquisición y acondicionamiento de señal 1 1000. La carga del dato de frecuencia NFREQ se realiza mediante el disparo del pulso FLOAD; en segundo lugar (32120), se definen las palabras de control• First (321 10), the digital word NFREQ is configured through the serial CONF connection so that the frequency synthesizer 1 1600 generates a signal tone that, by design and even with the potential deviations of the frequencies BF and AF, it is placed in the band of the head of the stage of acquisition and conditioning of signal 1 1000. The loading of the frequency data NFREQ is carried out by triggering the FLOAD pulse; secondly (32120), the control words are defined
BFC< NBF> y AFC< :NAF> de forma que la característica de transferencia de la cabecera de la etapa de adquisición y acondicionamiento de señal 1 1000 ofrezca el ancho de banda menos restrictivo, lo que implica BFC = "00...0" y AFC = "1 1 ... 1 "; BFC <NBF> and AFC <: NAF> so that the transfer characteristic of the header of the 1 1000 signal acquisition and conditioning stage offers the least restrictive bandwidth, which implies BFC = "00 ... 0 "and AFC =" 1 1 ... 1 ";
en tercer lugar, se espera un tiempo transitorio marcado por el cambio de estado de la señal lógica TRAN del nivel alto al nivel bajo;  thirdly, a transitory time marked by the change of state of the TRAN logic signal from the high level to the low level is expected;
en cuarto lugar (32130), se calibra el amplificador de ganancia variable Fourth (32130), the variable gain amplifier is calibrated
1 1300 de acuerdo con un procedimiento basado en la detección de valores máximos de amplitud que se detallará en relación a la figura1 1300 according to a procedure based on the detection of maximum amplitude values that will be detailed in relation to the figure
12; 12;
en quinto lugar (32140), se almacena una versión digitalizada del valor máximo de amplitud Va observado a la salida del amplificador de ganancia variable 1 1 120, como resultado del proceso de calibración 32130. Dicha versión digitalizada se obtiene por medio del convertidor analógico-digital 1 1400 y se almacena en un registro digital disponible en el módulo de calibración 1 1500. fifth (32140), a digitized version of the maximum amplitude value V a observed at the output of the variable gain amplifier 1 1 120 is stored, as a result of the 32130 calibration process. Said digitized version is obtained by means of the analog converter -digital 1 1400 and is stored in a digital register available in the 1 1500 calibration module.
Paso 2 o de sintonización de la frecuencia de corte de baja frecuencia BF (32200), representado en la figura 10. Cuenta con las siguientes etapas: Step 2 or tuning the low frequency cutoff frequency BF (32200), shown in Figure 10. It has the following steps:
en primer lugar (32210), se configura la palabra digital NFREQ a través de la conexión serie CONF de forma que el sintetizador de frecuencias 1 1600 genere un tono de señal a la frecuencia de corte BF deseada. La carga del dato de frecuencia NFREQ se realiza mediante el disparo del pulso FLOAD;  First (32210), the digital word NFREQ is configured through the CONF serial connection so that the frequency synthesizer 1 1600 generates a signal tone at the desired BF cutoff frequency. NFREQ frequency data is loaded by triggering the FLOAD pulse;
en segundo lugar (32220), se define la palabra de control BFC<'\ .NBF> de forma que el codo paso-alta de la característica de transferencia de la cabecera de la etapa de adquisición y acondicionamiento de señal 1 1000 esté a la mayor frecuencia posible, esto es, BFC = "1 1 ... 1". Así mismo, se define la palabra de control AFC<'\ .NAF> de forma que el codo paso-baja de la característica de transferencia de la cabecera de la etapa de adquisición y acondicionamiento de señal 1 1000 esté a la menor frecuencia posible, esto es, al valor AFC = "00...0"; secondly (32220), the control word BFC <'\ .NBF> is defined so that the high-pass elbow of the transfer characteristic of the header of the signal acquisition and conditioning stage 1 1000 is at as often as possible, that is, BFC = "1 1 ... 1". Likewise, the control word AFC <'\ .NAF> is defined so that the low-elbow of the characteristic of transfer of the header of the 1 1000 signal acquisition and conditioning stage is at the lowest possible frequency, that is, at the AFC value = "00 ... 0";
en tercer lugar, se espera un tiempo transitorio marcado por el cambio de estado de la señal lógica TRAN del nivel alto al nivel bajo;  thirdly, a transitory time marked by the change of state of the TRAN logic signal from the high level to the low level is expected;
en cuarto lugar (32230), se detecta y almacena un valor digitalizado del valor máximo de amplitud Va,BF observado a la salida del amplificador de ganancia variable 1 1300, usando los mismos medios y procedimientos empleados en la etapa 32135, que se detallará con posterioridad. Dicho valor digitalizado se registra en el módulo de calibración 1 1500; fourth (32230), a digitized value of the maximum amplitude value V a , BF observed at the output of the variable gain amplifier 1 1300 is detected and stored, using the same means and procedures employed in step 32135, which will be detailed subsequently. Said digitized value is recorded in the calibration module 1 1500;
en quinto lugar (32240), se compara el valor digitalizado de Va,BF con una versión escalada de la versión digital de la amplitud Va previamente almacenada en la etapa 32140. El factor de escala α es inferior a la unidad y se elige como representativo de la atenuación de la característica de transferencia de la cabecera de la etapa de adquisición y acondicionamiento de señal 1 1000 en el codo paso-alta. Las operaciones de escalado y comparación se implementan en el módulo de calibración 1 1500 mediante sencillos circuitos digitales; fifth (32240), the digitized value of V a , BF is compared with a scaled version of the digital version of the amplitude V a previously stored in step 32140. The scale factor α is less than unity and is chosen as representative of the attenuation of the transfer characteristic of the header of the 1 1000 signal acquisition and conditioning stage in the high-pass elbow. The scaling and comparison operations are implemented in the 1 1500 calibration module using simple digital circuits;
o Si Va:BF < i- Va (etapa 32250) se decrementa en un bit menos significativo la palabra digital BFC y se ejecutan de nuevo las etapas 32230 y 32240. o If V a: BF <i-V a (step 32250) the digital word BFC is decremented by a less significant bit and steps 32230 and 32240 are executed again.
o Si Va:BF > · Va se procede a la etapa 32260; o If V a: BF> · V a proceed to step 32260;
en sexto lugar (32260), se almacena el último valor definido para la palabra digital BFC en el módulo de calibración 1 1500.  sixth (32260), the last value defined for the digital word BFC is stored in the calibration module 1 1500.
Paso 3 o de sintonización de la frecuencia de corte de alta frecuencia AF (32300), representado en la figura 1 1 . Cuenta con las siguientes etapas: en primer lugar (32310), se configura la palabra digital NFREQ a través de la conexión serie CONF de forma que el sintetizador de frecuencias 1 1600 genere un tono de señal a la frecuencia de corte AF deseada. La carga del dato de frecuencia NFREQ se realiza mediante el disparo del pulso FLOAD; Step 3 or tuning the high frequency cutoff frequency AF (32300), shown in Figure 1 1. It has the following stages: first (32310), the digital word NFREQ is configured through the serial connection CONF so that the frequency synthesizer 1 1600 generates a signal tone at the cut-off frequency AF desired. NFREQ frequency data is loaded by triggering the FLOAD pulse;
en segundo lugar (32320), se define la palabra de control AFC< .NAF> de forma que el codo paso-baja de la característica de transferencia de la cabecera de la etapa de adquisición y acondicionamiento de señal 1 1000 esté a la menor frecuencia posible, esto es, AFC = "00...0". Así mismo, se define la palabra de control SFC<1 :NBF> con el valor previamente obtenido en la etapa 32260; en tercer lugar, se espera un tiempo transitorio marcado por el cambio de estado de la señal lógica TRAN del nivel alto al nivel bajo;  secondly (32320), the control word AFC <.NAF> is defined so that the low-pass elbow of the transfer characteristic of the header of the signal acquisition and conditioning stage 1 1000 is at the lowest frequency possible, that is, AFC = "00 ... 0". Likewise, the control word SFC <1: NBF> is defined with the value previously obtained in step 32260; thirdly, a transitory time marked by the change of state of the TRAN logic signal from the high level to the low level is expected;
en cuarto lugar (32330), se detecta y almacena un valor digitalizado del valor máximo de amplitud Va¡AF observado a la salida del amplificador de ganancia variable 1 1300, usando los mismos medios y procedimientos empleados en la etapa 32135, que se detallará con posterioridad. Dicho valor digitalizado se registra en el módulo de calibración 1 1500; fourth (32330), a digitized value of the maximum amplitude value V a¡F observed at the output of the variable gain amplifier 1 1300 is detected and stored, using the same means and procedures used in step 32135, which is will detail later. Said digitized value is recorded in the calibration module 1 1500;
en quinto lugar (32340), se compara el valor digitalizado de Va¡AF con una versión escalada de la versión digital de la amplitud Va previamente almacenada en la etapa 32140. En un caso general, este factor de escala α puede diferir del empleado en la etapa 32240. Las operaciones de escalado y comparación se implementan en el módulo de calibración 1 1500 con los mismos medios usados en la etapa 32240; fifth (32340), the digitized value of V a¡A F is compared with a scaled version of the digital version of the amplitude V a previously stored in step 32140. In a general case, this scale factor α may differ of the employee in step 32240. The scaling and comparison operations are implemented in the calibration module 1 1500 with the same means used in step 32240;
o Si Va:AF < (etapa 32350) se incrementa en un bit menos significativo la palabra digital AFC y se ejecutan de nuevo las etapas 32330 y 32340. o If V a: AF <(step 32350) the digital word AFC is incremented by a less significant bit and steps 32330 and 32340 are executed again.
o Si Va:AF > se procede a la etapa 32360; o If V a: AF> proceed to step 32360;
en sexto lugar (32360), se almacena el último valor definido para la palabra digital AFC en el módulo de calibración 1 1500.  sixth (32360), the last value defined for the digital word AFC is stored in the calibration module 1 1500.
La duración de los pasos 32100, 32200 y 32300 está fundamentalmente determinada por los cálculos de las tensiones de pico realizadas en las etapas 32130, 32230 y 32330, respectivamente. El tiempo empleado en dichas etapas depende en última instancia de la frecuencia de los tonos generados por el sintetizador 1 1600. En el caso de los pasos 32200 y 32300 la duración es también proporcional al número de iteraciones requeridas para la ejecución de los lazos 32230-32250 y 32330-32350, respectivamente. The duration of steps 32100, 32200 and 32300 is mainly determined by the calculations of peak voltages performed in the stages 32130, 32230 and 32330, respectively. The time taken in these stages ultimately depends on the frequency of the tones generated by the synthesizer 1 1600. In the case of steps 32200 and 32300 the duration is also proportional to the number of iterations required for the execution of the loops 32230- 32250 and 32330-32350, respectively.
Es importante resaltar que la pureza espectral de los tonos generados por el sintetizador de frecuencias 1 1600 se ve favorecida durante el proceso de calibración por la propia característica paso de banda de la cabecera de la etapa de adquisición y acondicionamiento de señal 1 1000, dado que dicha característica permite una atenuación adicional de las imágenes y espurios resultantes de la retención de señal realizada por el convertidor digital- analógico 1 1630. En ese sentido, la citada cabecera junto con el circuito de circuito de adaptación 1 1640, actúan como filtro de reconstrucción del sintetizador de frecuencias 1 1600. En todo caso, para evitar que la primera imagen del tono generado por el sintetizador de frecuencias 1 1600 caiga dentro de la banda pasante de la cabecera de la etapa de adquisición y acondicionamiento de señal 1 1000, la resolución M del convertidor fase- amplitud 1 1620 se ha de elegir de tal forma que FDIV-FDDS sea mayor que AF en todos los pasos implicados en el procedimiento 32000. It is important to note that the spectral purity of the tones generated by the 1 1600 frequency synthesizer is favored during the calibration process by the characteristic band pass of the header of the 1 1000 signal acquisition and conditioning stage, given that said characteristic allows an additional attenuation of the images and spurious resulting from the signal retention performed by the digital-analog converter 1 1630. In that sense, said head together with the adaptation circuit circuit 1 1640, act as a reconstruction filter of the frequency synthesizer 1 1600. In any case, to prevent the first image of the tone generated by the frequency synthesizer 1 1600 from falling within the band of the header of the acquisition and signal conditioning stage 1 1000, the resolution M of the phase-amplitude converter 1 1620 must be chosen in such a way that FDIV-FDDS is greater than AF in all p handles involved in the 32000 procedure.
De acuerdo con la presente invención, el procedimiento de calibración 32130 de los niveles máximos de tensión a la salida del amplificador de ganancia vanable 1 1300, cuando el nudo de entrada VIN del amplificador de bajo ruido 1 1 100 se conecta a la salida VDDS del sintetizador de frecuencia 1 1600, se efectúa mediante el ajuste controlado de alguno de los parámetros de circuito comprendidos en dicho amplificador de ganancia vanable. El procedimiento 32130, ¡lustrado en la figura 12, comprende seis fases. Dichas fases, secuenciadas por el circuito de calibración 1 1500 y basadas en un algoritmo de búsqueda binaria, son: In accordance with the present invention, the 32130 calibration procedure of the maximum voltage levels at the output of the gainable amplifier 1 1300, when the VIN input node of the low noise amplifier 1 1 100 is connected to the VDDS output of the frequency synthesizer 1 1600, is carried out by means of the controlled adjustment of some of the circuit parameters included in said gainable amplifier. The procedure 32130, illustrated in Figure 12, comprises six phases. These phases, sequenced by the 1 1500 calibration circuit and based on a binary search algorithm, are:
• en primer lugar (32131 ), se inicializa un índice IPG con valor O' lógico; en segundo lugar (32132), se fija el bit más significativo de la palabra digital PGC al valor lógico , mientras el resto de bits se fija al valor lógico Ό', esto es, PGC ="10...0"; • first (32131), an IPG index with logical value O 'is initialized; secondly (32132), the most significant bit of the digital word PGC is set to the logical value, while the remaining bits are set to the logical value valor ', that is, PGC = "10 ... 0";
en tercer lugar (32133), se incrementa el índice IPG en 1 . Third (32133), the IPG index is increased by 1.
o Si NPG-IPG < 1 , se procede a la fase 32139.  o If NPG-IPG <1, proceed to step 32139.
o Si NPG-IPG > 1 , se procede a la fase 32134;  o If NPG-IPG> 1, proceed to step 32134;
en cuarto lugar (32134), se genera una palabra digital PGCI de longitud NPG-IPG con el valor del bit más significativo a lógico y el resto de bits a O' lógico; fourth (32134), a PGCI digital word of NPG-IPG length is generated with the value of the most significant bit to logical and the remaining bits to logical O ';
en quinto lugar (32135), se detecta y almacena un valor digitalizado del máximo de amplitud Vpk:pG observado a la salida del amplificador de ganancia variable 1 1300. Dicho valor de pico se obtiene reteniendo la mayor de las palabras de salida proporcionadas por el convertidor analógico digital 1 1400 a lo largo de un periodo de tiempo establecido por el módulo de calibración 1 1500. La tasa de conversión del ADC 1 1400 es muy superior a la frecuencia del tono de entrada para de esta forma reducir los errores de observación del valor de pico Vpk:pG. Los medios empleados para la detección de pico son un registro y un comparador digital disponibles en dicho módulo 1 1500. Si la dinámica del lazo de sintonía así lo requiriera, el cálculo de la tensión de pico se realiza tras un transitorio que ocupa un número finito de semiperiodos de la señal sinusoidal generada por el sintetizador 1 1600. El procedimiento, fácilmente reproducible por un experto en la técnica, sería similar al empleado frente a modificaciones en el dato de frecuencia NFREQ; fifth (32135), a digitized value of the maximum amplitude V pk: p G observed at the output of the variable gain amplifier 1 1300 is detected and stored. Said peak value is obtained by retaining the largest of the output words provided by the digital analog converter 1 1400 over a period of time established by the calibration module 1 1500. The conversion rate of the ADC 1 1400 is much higher than the frequency of the input tone in order to reduce the errors of observation of the peak value V pk: p G. The means used for peak detection are a register and a digital comparator available in said module 1 1500. If the dynamics of the tuning loop so require, the calculation of the peak voltage is performed after a transient that occupies a finite number of semiperiods of the sinusoidal signal generated by synthesizer 1 1600. The procedure, easily reproducible by one skilled in the art, would be similar to that used in the case of modifications in the NFREQ frequency data;
en sexto lugar (32136), se compara el valor digitalizado de Vpk:PG con el fondo de escala VFs del convertidor analógico-a-digital 1 1400. sixth (32136), the digitized value of V pk: PG is compared with the full scale V F s of the analog-to-digital converter 1 1400.
o Si VpktPG < VFS (etapa 32137) se incrementa PGC en PGCI y se vuelve a la etapa 32133. o If V pkt PG <V FS (step 32137) PGC is incremented in PGCI and returned to step 32133.
o Si Vpk:PG = VFs (etapa 32138), los niveles de tensión a la salida del amplificador de ganancia variable 1 1300 sobrepasan el fondo de escala del convertidor ADC 1 1400, se decrementa PGC en PGCI, y se vuelve a la etapa 32133; o If V pk: PG = V F s (step 32138), the voltage levels at the output of the variable gain amplifier 1 1300 exceed the full scale ADC 1 1400 converter, PGC is decremented in PGCI, and it returns to step 32133;
• en séptimo lugar (32139), se almacena el último valor definido para la palabra digital PGC.  • in seventh place (32139), the last value defined for the digital word PGC is stored.
De acuerdo con la presente invención, el procedimiento 34000 para el ajuste de la ganancia en tensión del amplificador programable 1 1300 dentro del método de calibración 30000, difiere del procedimiento 32130 descrito con anterioridad. Las diferencias entre los métodos 34000 y 32130 están originadas por el hecho de que, en el primer caso, los nudos de entrada VIN del amplificador de bajo ruido 1 1 100 se conectan a los microelectrodos 20000 y 21000, mientras que, en el segundo caso, dichos nudos se conectan a la salida del sintetizador de frecuencia 1 1600. Por tanto, mientras en el procedimiento 34000 el amplificador programable 1 1300 recibe biopotenciales eléctricos cuya distribución temporal es esencialmente aleatona, en el procedimiento 32130, la señal recibida es una onda sinusoidal con frecuencia conocida. In accordance with the present invention, the procedure 34000 for adjusting the voltage gain of the programmable amplifier 1 1300 within the 30000 calibration method differs from the procedure 32130 described above. The differences between methods 34000 and 32130 are caused by the fact that, in the first case, the VIN input nodes of the low noise amplifier 1 1 100 are connected to the 20000 and 21000 microelectrodes, while, in the second case , said nodes are connected to the output of the frequency synthesizer 1 1600. Therefore, while in procedure 34000 the programmable amplifier 1 1300 receives electrical biopotentials whose temporal distribution is essentially random, in procedure 32130, the received signal is a sine wave Often known
La figura 13 muestra el esquema del procedimiento 34000 para el ajuste de la ganancia en tensión del amplificador programable 1 1300, de acuerdo con la presente invención. El procedimiento, iniciado por el módulo de calibración 1 1500 consta de las siguientes etapas: en primer lugar (34100), se inicializa la palabra digital PGC con todos sus bits al valor lógico , de forma que la ganancia PG del amplificador programable 1 1300 toma su valor máximo; Figure 13 shows the scheme of procedure 34000 for adjusting the voltage gain of the programmable amplifier 1 1300, in accordance with the present invention. The procedure, initiated by the calibration module 1 1500 consists of the following steps: first (34100), the digital word PGC is initialized with all its bits to the logical value, so that the PG gain of the programmable amplifier 1 1300 takes its maximum value;
en segundo lugar (34200), se detectan los valores máximo y mínimo de señal Vpk:max y Vpk,m¡n, respectivamente, a la salida del amplificador programable 1 1300 a lo largo de un periodo de tiempo definido por un operador externo. La duración de dicho periodo de monitorización depende del tipo de biopotencial objeto de análisis, por ejemplo, en el caso de monitorización ECG la duración debe ser superior al intervalo máximo entre complejos QRS. La información sobre el periodo de detección se transmite al módulo de calibración 1 1500 a través del canal serie CONF, codificado como número de ciclos del reloj CLKTC. De forma similar a los procedimientos descritos en relación a la etapa 32135, la detección del pico de amplitud se realiza preferentemente en el dominio digital a partir de las muestras de señal convertidas por elsecondly (34200), the maximum and minimum signal values V pk: max and V pk , m, respectively, are detected at the output of the programmable amplifier 1 1300 over a period of time defined by an operator external. The duration of said monitoring period depends on the type of biopotential under analysis, for example, in the case of ECG monitoring the duration must be greater than the maximum interval between QRS complexes. Information about the period of Detection is transmitted to the 1 1500 calibration module through the CONF serial channel, coded as the number of cycles of the CLKTC clock. Similar to the procedures described in relation to step 32135, the detection of the amplitude peak is preferably performed in the digital domain from the signal samples converted by the
ADC 1 1400. La tasa de conversión del ADC 1 1400 es muy superior a la frecuencia AF de la banda pasante de la cabecera de la etapa de adquisición y acondicionamiento de señal 1 1000; ADC 1 1400. The conversion rate of ADC 1 1400 is much higher than the AF frequency of the band passing through the header of the signal acquisition and conditioning stage 1 1000;
• en tercer lugar, se comparan los valores digitalizados de Vpk:max y Vpk,m¡n con dos valores proporcionales al fondo de escala del ADC• thirdly, the digitized values of V pk: max and Vpk are compared, with two values proportional to the full scale of the ADC
1 1400. El factor de escala β es cercano pero inferior a la unidad, mientras que el factor de escala inferior, γ, es cercano pero superior a cero. Ambos valores se eligen como salvaguarda frente a efectos residuales derivados de imperfecciones en el circuito para la estimación de artefactos 1 1200, con objeto de evitar la saturación del convertidor 1 1400. 1 1400. The scale factor β is close to but less than unity, while the lower scale factor, γ, is close to but greater than zero. Both values are chosen as a safeguard against residual effects derived from imperfections in the circuit for the estimation of 1 1200 artifacts, in order to avoid saturation of the 1 1400 converter.
o Si VPk,max > β· VFs O Vpk,m¡n < y, se disminuye el valor de PGC en un bit menos significativo (34300) y se vuelve al paso 34200. o Si Vpk¡max < β· VFs O Vpk,m¡n > γ, se procede a la fase 34400; o If V P k, max> β · V F s OV pk , m¡n <y, decrease the PGC value by a less significant bit (34300) and return to step 34200. o If V pk¡max < β · V F s O Vpk, m¡n> γ, proceed to phase 34400;
· en cuarto lugar (34400), se indica a través del canal DATA que la fase de auto-calibración, no sólo del procedimiento 34000 sino del método general 30000, se ha completado.  · Fourth (34400), it is indicated through the DATA channel that the self-calibration phase, not only of procedure 34000 but of general method 30000, has been completed.
Con vistas a validar el proceso de auto-calibración, objeto de la presente invención, la figura 14 muestra el esquema del procedimiento 35000 de una fase de supervisión por parte de un operador externo. El procedimiento consta de las siguientes etapas: With a view to validating the self-calibration process, object of the present invention, Figure 14 shows the scheme of procedure 35000 of a supervision phase by an external operator. The procedure consists of the following stages:
• en primer lugar (35100), se mantienen los nudos de entrada VIN del amplificador de bajo ruido 1 1 100 conectado a los microelectrodos• first (35100), the VIN input nodes of the low noise amplifier 1 1 100 connected to the microelectrodes are kept
20000 y 21000 y se monitoriza discrecionalmente la señal biopotencial digitalizada por el ADC 1 1400 a través del puerto de salida serie DATA. 20,000 and 21,000 and the biopotential signal is monitored discretionary digitized by the ADC 1 1400 through the DATA serial output port.
o Si se estima que el valor de la ganancia PG amplificador programable 1 1300 no es adecuado, se ajusta el valor PGC (etapa 35200) de acuerdo con las instrucciones transmitidas por el operador externo a través del canal serie CONF.  o If it is estimated that the value of the programmable amplifier PG gain 1300 is not adequate, the PGC value (step 35200) is adjusted according to the instructions transmitted by the external operator through the serial channel CONF.
o En caso contrario, el operador externo envía una señal de validación a través del canal CONF y se procede a la etapa o Otherwise, the external operator sends a validation signal through the CONF channel and proceeds to the stage
34700. 34700
· en segundo lugar (35300), se almacena el valor definido para la palabra digital PGC.  · Second (35300), the value defined for the PGC digital word is stored.
Implementación de la invención. En un ejemplo de realización de la presente invención, el sistema de monitorización de biopotenciales eléctricos 10000 es implantable y se emplea para la captura en tiempo-real de los potenciales de acción generados en una zona del córtex cerebral. El rango de frecuencias que ocupan típicamente dichos potenciales está comprendido aproximadamente entre 200Hz y 7kHz. Los niveles de tensión de dichos potenciales de acción están en el orden de pocos milivoltios. Implementation of the invention. In an embodiment of the present invention, the 10000 electric biopotential monitoring system is implantable and is used for real-time capture of the action potentials generated in an area of the cerebral cortex. The range of frequencies that these potentials typically occupy is approximately between 200Hz and 7kHz. The voltage levels of these action potentials are in the order of a few millivolts.
En una posible implementación de este ejemplo de realización de la presente invención, el amplificador de bajo ruido 1 1 100 ofrece una ganancia nominal de aproximadamente 47dB e implementa a su entrada la frecuencia de corte inferior BF de la banda pasante de la cabecera de la etapa de adquisición y acondicionamiento de señal 1 1000. Más aún, la frecuencia de dicho límite inferior es programable mediante una palabra digital de 3 bits y cubre un rango de frecuencias comprendido aproximadamente entre 140 a 210Hz. Esta configuración no se debe considerar limitativa de la presente invención, antes al contrario, cualquier estrategia de programación con cubrimiento sobre la frecuencia de interés de 200Hz con suficiente margen frente a desviaciones de implementación es igualmente válida. In a possible implementation of this exemplary embodiment of the present invention, the low noise amplifier 1 1 100 offers a nominal gain of approximately 47dB and implements at its input the lower cutoff frequency BF of the passing band of the stage header of acquisition and conditioning of signal 1 1000. Moreover, the frequency of said lower limit is programmable by means of a 3-bit digital word and covers a frequency range between approximately 140 to 210Hz. This configuration should not be considered as limiting the present invention, on the contrary, any programming strategy with coverage over the 200Hz interest rate with sufficient margin against implementation deviations is equally valid.
Así mismo, también de acuerdo con una posible implementación de este ejemplo de realización, el amplificador de ganancia programable 1 1300 ofrece ocho niveles de amplificación, comprendidos entre 0 y 18dB, por medio de la configuración de una palabra de control de 3 bits. Además, el amplificador de ganancia programable 1 1300 implementa a su entrada la frecuencia de corte superior AF de la banda pasante de la cabecera de la etapa de adquisición y acondicionamiento de señal 1 1000; frecuencia que puede ser ajustada dentro del rango entre 6.5 y 8kHz, por medio de una palabra de control de 2 bits. Al igual que en el caso anterior, estos valores se muestran exclusivamente a título de ejemplo, sin constituir una limitación de la presente invención. En otro aspecto, la frecuencia FTC del reloj del sistema se sitúa a 4.0MHz, la resolución del acumulador digital comprendido en el divisor de frecuencia programable 1 1610 es L = 12, la longitud del convertidor fase-amplitud es M = 8, y las palabras digitales de control NFREQ usadas por el sintetizador de frecuencias 1 1600 para definir los tonos empleados en el proceso de calibración 32000 de la banda pasante de la cabecera de la etapa de adquisición y acondicionamiento de señal 1 1000 son NFREQ = 6 (para la sintonía de la frecuencia BF), NFREQ = 60 (para el tono en la banda pasante) y NFREQ = 220 (para la sintonía de la frecuencia AF). De nuevo, estos valores no son, en modo alguno, limitativos de la presente invención; sólo constituyen un ejemplo de realización entre otras muchas posibilidades. Also, also in accordance with a possible implementation of this exemplary embodiment, the programmable gain amplifier 1 1300 offers eight levels of amplification, comprised between 0 and 18dB, by means of the configuration of a 3-bit control word. In addition, the programmable gain amplifier 1 1300 implements at its input the upper cut-off frequency AF of the headband of the header of the acquisition and signal conditioning stage 1 1000; frequency that can be adjusted within the range between 6.5 and 8kHz, by means of a 2-bit control word. As in the previous case, these values are shown exclusively by way of example, without constituting a limitation of the present invention. In another aspect, the FTC frequency of the system clock is 4.0MHz, the resolution of the digital accumulator included in the programmable frequency divider 1 1610 is L = 12, the length of the phase-amplitude converter is M = 8, and the NFREQ digital control words used by the 1 1600 frequency synthesizer to define the tones used in the 32000 calibration process of the header band of the acquisition stage and signal conditioning 1 1000 are NFREQ = 6 (for tuning of the BF frequency), NFREQ = 60 (for the pitch band tone) and NFREQ = 220 (for the AF frequency tuning). Again, these values are by no means limiting the present invention; they only constitute an example of realization among many other possibilities.
Aún en otro aspecto, la resolución del convertidor analógico-digital 1 1400 es de 8 bits y admite diferentes razones de muestreo. En concreto, durante los pasos 1 y 2 del proceso de calibración 32000 de la banda pasante de la cabecera de la etapa de adquisición y acondicionamiento de señal 1 1000, la tasa de conversión es de 30kS/s mientras para el paso 3 del referido proceso la tasa es de 90kS/s. Durante el procedimiento 34000 para el ajuste de la ganancia en tensión del amplificador de ganancia programable 1 1300, la tasa de conversión se fija a 30kS/s. Estos valores se dan sólo a título ilustrativo; cualquier otra configuración que obtenga bajos errores de observación en el cálculo de la versión digitalizada de los valores de pico a la salida del amplificador de ganancia programable 1 1300, pueden ser apropiados a los propósitos de calibración. Still in another aspect, the resolution of the analog-digital converter 1 1400 is 8 bits and supports different sampling reasons. Specifically, during steps 1 and 2 of the 32000 calibration process of the band passing through the header of the 1 1000 signal acquisition and conditioning stage, the conversion rate is 30kS / s while for step 3 of said process The rate is 90kS / s. During procedure 34000 for adjusting the gain in 1 1300 programmable gain amplifier voltage, the conversion rate is set at 30kS / s. These values are given for illustrative purposes only; Any other configuration that obtains low observation errors in the calculation of the digitized version of the peak values at the output of the programmable gain amplifier 1 1300 may be appropriate for calibration purposes.
La figura 15 ¡lustra la evolución temporal de la salida del amplificador de ganancia programable 1 1300, la salida del convertidor ADC 1 1400, y los códigos de control digital durante el proceso de calibración 32000 e la banda pasante de la cabecera de la etapa de adquisición y acondicionamiento de señal 1 1000. Los recuadros inferiores muestran detalles de las diferentes etapas comprendidas en dicho proceso. El recuadro (a) muestra el ajuste de la ganancia del amplificador de ganancia variable 1 1300 durante la fase de inicialización 32100. El recuadro (b) muestra la evolución de la etapa de adquisición y acondicionamiento de señal 1 1000 durante el paso 32200 de sintonización de la frecuencia de corte de baja frecuencia BF. Por último, el recuadro (c) muestra la evolución de la etapa de adquisición y acondicionamiento de señal 1 1000 durante el paso 32300 de sintonización de la frecuencia de corte de alta frecuencia AF. Obsérvese como, en los dos últimos casos, la amplitud de la sinusoide cambia conforme varía la correspondiente palabra de control. Figure 15 illustrates the temporal evolution of the output of the programmable gain amplifier 1 1300, the output of the ADC converter 1 1400, and the digital control codes during the 32000 calibration process and the through band of the header of the stage header. 1 1000 signal acquisition and conditioning. The lower boxes show details of the different stages included in said process. Box (a) shows the gain adjustment of the variable gain amplifier 1 1300 during the 32100 initialization phase. Box (b) shows the evolution of the 1 1000 signal acquisition and conditioning stage during step 32200 tuning BF low frequency cutoff frequency. Finally, box (c) shows the evolution of the 1 1000 signal acquisition and conditioning stage during step 32300 of tuning the high frequency cutoff frequency AF. Note how, in the last two cases, the amplitude of the sinusoid changes as the corresponding control word varies.
La figura 16(a) ¡lustra la evolución temporal de los códigos de salida del convertidor analógico-digital 1 1400 durante el ajuste 34000 del nivel de ganancia del amplificador PGA 1 1300, usando como señal de entrada la actividad neuronal VBIO capturada desde un electrodo 20000. Al comienzo del ajuste 34000, la ganancia del amplificador PGA 1 1300 está al máximo valor posible. Hasta la aparición del primer potencial de acción, el proceso 34000 ajusta el nivel de amplificación del PGA 1 1300 de forma el ruido de base de la señal neuronal VBIO cubre el fondo de escala del convertidor 1 1400. Cuando aparece un potencial de acción, la ganancia del amplificador PGA 1 1300 se vuelve a escalar para evitar que el convertidor analógico-digital 1 1400 se sature. La figura 16(b) ¡lustra el mismo mecanismo, en este caso, usando una señal sinusoidal modulada por una rampa como entrada a la etapa de adquisición y acondicionamiento de señal 1 1000. Figure 16 (a) illustrates the temporal evolution of the output codes of the analog-digital converter 1 1400 during the 34000 adjustment of the gain level of the PGA amplifier 1 1300, using the VBIO neural activity captured from an electrode as the input signal 20000. At the beginning of the 34000 setting, the gain of the PGA amplifier 1 1300 is at the maximum possible value. Until the appearance of the first action potential, the 34000 process adjusts the amplification level of the PGA 1 1300 so that the base noise of the VBIO neural signal covers the full scale of the converter 1 1400. When an action potential appears, the PGA amplifier gain 1 1300 se Scale again to prevent the analog-digital converter 1 1400 from saturating. Figure 16 (b) illustrates the same mechanism, in this case, using a sinusoidal signal modulated by a ramp as input to the acquisition and conditioning stage of signal 1000.
Los diferentes aspectos mencionados en relación con este ejemplo de realización de la presente invención, conllevan novedades y mejoras frente al ESTADO DE LA TÉCNICA, que conducen a mejorar la automatización de los procedimientos para la calibración de una etapa de acondicionamiento de actividad biopotencial, y eliminar la intervención de usuarios especializados y/o el uso de equipamiento externo, tanto en la fase de fabricación como en la fase de explotación. Esto no sólo reduce los costes de producción y/o mantenimiento, sino que también permiten el despliegue ambulatorio de dispositivos de monitorización en servicios de tele-asistencia de enfermos. The different aspects mentioned in relation to this embodiment of the present invention, entail novelties and improvements compared to the STATE OF THE TECHNIQUE, which lead to improve the automation of the procedures for the calibration of a stage of conditioning of biopotential activity, and eliminate the intervention of specialized users and / or the use of external equipment, both in the manufacturing phase and in the exploitation phase. This not only reduces production and / or maintenance costs, but also allows ambulatory deployment of monitoring devices in tele-assistance services for patients.
Además, la autonomía de la calibración que permite la presente invención ofrece la posibilidad de adaptación dinámica frente a variaciones en el tejido bajo observación y se adecúan a cualquier tipo de paciente. Estas ventajas son especialmente relevantes en sistemas de monitorización implantados dado que las posibilidades de manipulación una vez operativos son muy limitadas. In addition, the autonomy of the calibration allowed by the present invention offers the possibility of dynamic adaptation to variations in the tissue under observation and is suitable for any type of patient. These advantages are especially relevant in implanted monitoring systems since the possibilities of manipulation once operational are very limited.
Adicionalmente, los medios propuestos para la implementación integrada de un mecanismo de calibración para la etapa de acondicionamiento de señal de un sistema de monitorización de biopotenciales eléctricos son de baja complejidad, por lo que son susceptibles de integración con reducidos consumos de área y potencia. Additionally, the proposed means for the integrated implementation of a calibration mechanism for the signal conditioning stage of an electrical biopotential monitoring system are of low complexity, so they are capable of integration with reduced area and power consumption.
En el contexto de la presente invención, los términos "aproximadamente" o "del orden de" deben entenderse como indicando valores muy próximos a los que dicho término acompañe. El experto en la técnica entenderá que una pequeña desviación de los valores indicados, dentro de unos términos razonables, es inevitable debido a imprecisiones de medida, etc. A lo largo de la presente descripción, el término "comprende" y sus derivados no debe interpretarse en un sentido excluyente o limitativo, es decir, no debe interpretarse en el sentido de excluir la posibilidad de que el elemento o concepto al que se refiere incluya elementos o etapas adicionales. In the context of the present invention, the terms "approximately" or "of the order of" should be understood as indicating very close values to which said term accompanies. The person skilled in the art will understand that a small deviation from the indicated values, within reasonable terms, is inevitable due to measurement inaccuracies, etc. Throughout this description, the term "comprises" and its derivatives should not be construed in an exclusive or limiting sense, that is, should not be construed to exclude the possibility that the element or concept to which it refers includes Additional elements or stages.

Claims

REIVINDICACIONES
1 .- Sistema de calibración de etapas de adquisición y acondicionamiento de biopotenciales eléctricos, donde la entrada de la etapa de adquisición y acondicionamiento se conecta a un electrodo que captura una señal bioeléctrica y la salida de la etapa de adquisición y acondicionamiento se conecta a una etapa de procesamiento de señales bioeléctricas, estando la etapa de adquisición y acondicionamiento y la etapa de procesamiento integradas en un sistema de monitorización de biopotenciales eléctricos, donde adicionalmente la entrada de la etapa de adquisición y acondicionamiento comprende: 1 .- Calibration system of acquisition and conditioning stages of electrical biopotentials, where the input of the acquisition and conditioning stage is connected to an electrode that captures a bioelectric signal and the output of the acquisition and conditioning stage is connected to a bioelectric signal processing stage, the acquisition and conditioning stage and the processing stage being integrated in an electrical biopotential monitoring system, where additionally the acquisition and conditioning stage input comprises:
• un amplificador de bajo ruido para amplificar la señal bioeléctrica capturada;  • a low noise amplifier to amplify the captured bioelectric signal;
• un circuito de estimación de artefactos de la señal bioeléctrica cuya entrada se conecta a un electrodo de referencia y cuya salida se conecta a la salida del amplificador de bajo ruido;  • a circuit for estimating artifacts of the bioelectric signal whose input is connected to a reference electrode and whose output is connected to the low noise amplifier output;
• un amplificador de ganancia variable conectado a la salida del amplificador de bajo ruido para ajusfar unos niveles de tensión de la señal bioeléctrica una vez sustraída una señal proveniente de la salida del circuito de estimación de artefactos; y,  • a variable gain amplifier connected to the output of the low noise amplifier to adjust voltage levels of the bioelectric signal once a signal from the output of the artifact estimation circuit is subtracted; Y,
• un convertidor analógico-digital conectado a la salida del amplificador de ganancia variable;  • an analog-digital converter connected to the output of the variable gain amplifier;
caracterizado por que el sistema de calibración comprende, characterized in that the calibration system comprises,
• un modulo de calibración de la señal de salida del convertidor analógico- digital que programa automáticamente unos parámetros de ajuste que definen una frecuencia de corte inferior del amplificador de bajo ruido, una frecuencia de corte superior de del convertidor analógico-digital y una ganancia del amplificador de ganancia variable; y,  • a calibration module of the analog-to-digital converter output signal that automatically programs adjustment parameters that define a lower cutoff frequency of the low noise amplifier, a higher cutoff frequency of the analog-digital converter and a gain of the variable gain amplifier; Y,
• un sintetizador de frecuencia basado en barrido digital para generar formas de onda sinusoidales cuya entrada se conecta a la salida del módulo de calibración y cuya salida se conecta a la entrada del amplificador de bajo ruido y a la entrada del circuito de estimación de artefactos. • a frequency synthesizer based on digital scanning to generate sinusoidal waveforms whose input is connected to the output of the calibration module and whose output is connected to the input of the Low noise amplifier and the input of the artifact estimation circuit.
2. - Sistema de calibración de etapas de adquisición y acondicionamiento de biopotenciales eléctricos, según la reivindicación 1 , caracterizado por que a la entrada del módulo de calibración se introduce: 2. - Calibration system for acquisition and conditioning stages of electric biopotentials, according to claim 1, characterized in that the input of the calibration module is introduced:
- una señal de reloj CLTK correspondiente a un tren de pulsos con frecuencia FTC conocida;  - a CLTK clock signal corresponding to a pulse train with known FTC frequency;
- una señal CONF correspondiente a una entrada secuencial de datos; y, - una señal de control DATA generada por el convertidor analógico- digital.  - a CONF signal corresponding to a sequential data entry; and, - a DATA control signal generated by the analog-digital converter.
3. - Sistema de calibración de etapas de adquisición y acondicionamiento de biopotenciales eléctricos, según la reivindicación 2, caracterizado por que el sintetizador de frecuencia al menos comprende: 3. - System of calibration of stages of acquisition and conditioning of electrical biopotentials according to claim 2, characterized in that the frequency synthesizer at least comprises:
• un divisor de frecuencia programable que genera una señal de reloj CLKDIV a partir de la señal de reloj CLKTC y de una señal de frecuencia NFREQ generadas previamente por la etapa de procesamiento de señales bioeléctricas;  • a programmable frequency divider that generates a CLKDIV clock signal from the CLKTC clock signal and an NFREQ frequency signal previously generated by the bioelectric signal processing stage;
• un convertidor fase-amplitud conectado a la salida del divisor de frecuencia programable que genera una forma de onda sinusoidal cuantizada en tiempo-discreto;  • a phase-amplitude converter connected to the output of the programmable frequency divider that generates a sine waveform quantized in discrete time;
• un convertidor digital-analógico con P-bits de resolución conectado a la salida del convertidor fase-amplitud temporizado por la señal de reloj CLKDIV;  • a digital-analog converter with P-bits resolution connected to the output of the phase-amplitude converter timed by the CLKDIV clock signal;
• un circuito de adaptación que elimina réplicas espectrales generadas por retenciones de una señal generada en el convertidor digital-analógico.  • an adaptation circuit that eliminates spectral replicas generated by retention of a signal generated in the digital-analog converter.
4. - Sistema de calibración de etapas de adquisición y acondicionamiento de biopotenciales eléctricos, según la reivindicación 3, caracterizado por que el divisor de frecuencia programable comprende medios de detección de sobredisparos en un acumulador digital de L-bits de resolución, temporizado por la señal de reloj CLKTC y cuya palabra de control de paso es la señal de frecuencia NFREQ. 4. - Calibration system for the acquisition and conditioning of electrical biopotentials, according to claim 3, characterized in that the programmable frequency divider comprises means for detecting over-shots in a digital, timed resolution L-bit accumulator by the CLKTC clock signal and whose step control word is the NFREQ frequency signal.
5. - Sistema de calibración de etapas de adquisición y acondicionamiento de biopotenciales eléctricos, según la reivindicación 4, caracterizado por que la señal de reloj CLKDIV tiene una frecuencia FDIV=NFREQ/2L, donde FTC es la frecuencia de la señal de reloj CLKTC. 5. - Calibration system for the acquisition and conditioning of electrical biopotentials, according to claim 4, characterized in that the CLKDIV clock signal has a frequency FDIV = NFREQ / 2 L , where FTC is the frequency of the CLKTC clock signal .
6. - Sistema de calibración de etapas de adquisición y acondicionamiento de biopotenciales eléctricos, según la reivindicación 3, caracterizado por que el circuito de adaptación comprende un amplificador operacional para convertir corriente a tensión y condensadores en el camino de realimentación del amplificador operacional. 6. - Calibration system for the acquisition and conditioning of electrical biopotentials, according to claim 3, characterized in that the adaptation circuit comprises an operational amplifier for converting current to voltage and capacitors in the feedback path of the operational amplifier.
7.- Sistema de calibración de etapas de adquisición y acondicionamiento de biopotenciales eléctricos, según la reivindicación 1 , caracterizado por que el amplificar de ganancia variable comprende un lazo de cancelación de offset para eliminar componentes en DC a la entrada del convertidor analógico digital. 7. Calibration system for the acquisition and conditioning of electrical biopotentials, according to claim 1, characterized in that the variable gain amplifier comprises an offset cancellation loop to eliminate DC components at the input of the digital analog converter.
8.- Procedimiento de calibración de etapas de adquisición y acondicionamiento de biopotenciales eléctricos, que hace uso del sistema de calibración descrito en una cualquiera de las reivindicaciones 1 a 8, caracterizado por que comprende las siguientes fases: 8.- Procedure for calibration of stages of acquisition and conditioning of electrical biopotentials, which makes use of the calibration system described in any one of claims 1 to 8, characterized in that it comprises the following phases:
• conectar las entradas del amplificador de bajo ruido a las salidas del sintetizador de frecuencia, y simultáneamente deshabilitar el circuito para la estimación de artefactos;  • connect the inputs of the low noise amplifier to the outputs of the frequency synthesizer, and simultaneously disable the circuit for the estimation of artifacts;
• sintonizar unas frecuencias de corte que definen una banda pasante de la etapa de adquisición y acondicionamiento de biopotenciales eléctricos;  • tune to cut-off frequencies that define a band through the stage of acquisition and conditioning of electrical biopotentials;
· conectar las entradas del amplificador de bajo ruido al electrodo que captura una señal bioeléctrica y al electrodo de referencia y desconectar las entradas del amplificador de bajo ruido de las salidas del sintetizador de frecuencia y simultáneamente habilitar el circuito para la estimación de artefactos ; y, · Connect the inputs of the low noise amplifier to the electrode that captures a bioelectric signal and the reference electrode and disconnect the inputs of the low noise amplifier from the outputs of the synthesizer frequency and simultaneously enable the circuit for the estimation of artifacts; Y,
• ajusfar la ganancia en tensión del amplificador de ganancia variable en el módulo de calibración.  • adjust the voltage gain of the variable gain amplifier in the calibration module.
9. - Procedimiento de calibración de etapas de adquisición y acondicionamiento de biopotenciales eléctricos, según la reivindicación 8, caracterizado por que la fase de sintonización de las frecuencias de corte que definen la banda pasante de la etapa de adquisición y acondicionamiento de biopotenciales eléctricos adicionalmente comprende las siguientes etapas: 9. - Procedure for calibration of stages of acquisition and conditioning of electrical biopotentials, according to claim 8, characterized in that the phase of tuning of the cut-off frequencies that define the passing band of the stage of acquisition and conditioning of electrical bio-potentials additionally comprises The following stages:
• inicializar los elementos que conforman el sistema de calibración de la etapa de adquisición y acondicionamiento de biopotenciales eléctricos; • initialize the elements that make up the calibration system of the stage of acquisition and conditioning of electrical biopotentials;
• sintonizar una frecuencia de corte de baja frecuencia BF; y, • tune a low frequency cutoff frequency BF; Y,
• sintonizar una frecuencia de corte de alta frecuencia AF.  • tune to a high frequency cutoff frequency AF.
10. - Procedimiento de calibración de etapas de adquisición y acondicionamiento de biopotenciales eléctricos, según la reivindicación 9, caracterizado por que la etapa de inicialización de los elementos que conforman el sistema de calibración comprende la siguientes subfases: 10. - Procedure for calibration of stages of acquisition and conditioning of electrical biopotentials, according to claim 9, characterized in that the initialization stage of the elements that make up the calibration system comprises the following subphases:
• configurar la señal de frecuencia digital NFREQ a través de la señal CONF y generar el sintetizador de frecuencias un tono de señal que se sitúa en la banda pasante de la etapa de adquisición y acondicionamiento, realizándose la carga en el sintetizador de frecuencias de la señal de frecuencia digital NFREQ mediante el disparo del pulso FLOAD;  • configure the NFREQ digital frequency signal through the CONF signal and generate the frequency synthesizer a signal tone that is placed in the bandwidth of the acquisition and conditioning stage, loading the frequency synthesizer of the signal NFREQ digital frequency by triggering the FLOAD pulse;
• definir unas palabras binarias de control BFC< NBF> y AFC< NAF> para que la característica de transferencia de la etapa de adquisición y acondicionamiento de biopotenciales eléctricos tenga el ancho de banda menos restrictivo;  • define binary control words BFC <NBF> and AFC <NAF> so that the transfer characteristic of the stage of acquisition and conditioning of electric biopotentials has the least restrictive bandwidth;
• esperar un tiempo transitorio marcado por un cambio de estado de una señal lógica TRAN del nivel alto al nivel bajo, siendo la señal TRAN una señal de salida del sintetizador de frecuencias; • calibrar el amplificador de ganancia variable mediante la obtención de una palabra digital PGC; y, • wait for a transitory time marked by a change of state of a TRAN logic signal from the high level to the low level, the TRAN signal being an output signal from the frequency synthesizer; • calibrate the variable gain amplifier by obtaining a PGC digital word; Y,
• capturar mediante el convertidor analógico-digital, un valor máximo de amplitud Va, obtenido a la salida del amplificador de ganancia variable, y almacenar dicho valor en el módulo de calibración. • capture a maximum amplitude value V a , obtained at the output of the variable gain amplifier, using the analog-digital converter, and store this value in the calibration module.
1 1 .- Procedimiento de calibración de etapas de adquisición y acondicionamiento de biopotenciales eléctricos, según la reivindicación 9, caracterizado por que la etapa de sintonizar la frecuencia de corte de baja frecuencia BF comprende las siguientes subetapas: 1 .- Procedure for calibration of stages of acquisition and conditioning of electric biopotentials, according to claim 9, characterized in that the step of tuning the low frequency cutoff frequency BF comprises the following sub-stages:
i) configurar la señal de frecuencia digital NFREQ a través de la conexión serie CONF de forma que el sintetizador de frecuencias genere un tono de señal a la frecuencia de corte BF deseada, realizándose la carga de la señal de frecuencia digital NFREQ mediante el disparo del pulso FLOAD;  i) configure the NFREQ digital frequency signal through the CONF serial connection so that the frequency synthesizer generates a signal tone at the desired BF cutoff frequency, loading the NFREQ digital frequency signal by triggering the FLOAD pulse;
¡i) definir una palabra de control BFC<'\ .NBF> de forma que un codo paso-alta de la característica de transferencia de la etapa de adquisición y acondicionamiento de señal esté a la mayor frecuencia posible, esto es, BFC = "1 1 ... 1 ";  I) define a control word BFC <'\ .NBF> so that a high-pass elbow of the transfer characteristic of the signal acquisition and conditioning stage is at the highest possible frequency, that is, BFC = " 1 1 ... 1 ";
iii) definir una palabra de control AFC<'\ .NAF> de forma que el codo paso-baja de la característica de transferencia de la cabecera de la etapa de adquisición y acondicionamiento de señal esté a la menor frecuencia posible, esto es, AFC = "00...0";  iii) define an AFC <'\ .NAF> control word so that the low-pass elbow of the transfer characteristic of the header of the signal acquisition and conditioning stage is at the lowest possible frequency, that is, AFC = "00 ... 0";
iv) esperar un tiempo transitorio marcado por el cambio de estado de una señal lógica TRAN del nivel alto al nivel bajo, siendo la señal TRAN una señal de salida del sintetizador de frecuencias;  iv) wait for a transitory time marked by the change of state of a TRAN logic signal from the high level to the low level, the TRAN signal being an output signal of the frequency synthesizer;
v) detectar y almacenar un valor digitalizado del valor máximo de amplitud VaiBF obtenido a la salida del amplificador de ganancia variable, almacenándose el valor digitalizado en el módulo de calibración; y, v) detect and store a digitized value of the maximum amplitude value V aiBF obtained at the output of the variable gain amplifier, the digitized value being stored in the calibration module; Y,
vi) comparar, en el módulo de calibración, el valor digitalizado de VaiBF con una versión escalada de Va, siendo el factor de escala α inferior a la unidad y representativo de una atenuación de la característica de transferencia de la etapa de adquisición y acondicionamiento de señal en el codo paso-alta; vi) compare, in the calibration module, the digitized value of V aiBF with a scaled version of V a , the scale factor α being less than the unit and representative of an attenuation of the transfer characteristic of the acquisition stage and signal conditioning in the high-pass elbow;
o si Va:BF < i- Va se decrementa en un bit menos significativo la palabra digital BFC y se ejecuta de nuevo la subetapa v); or if V a: BF <i-V a decreases the digital word BFC by a less significant bit and sub-stage v) is executed again;
o si Va:BF > i- Va se almacena el último valor definido de BFC en el módulo de calibración siendo este valor BFC el valor que sintoniza la frecuencia de corte de baja frecuencia BF. or if V a: BF> i-V a the last defined value of BFC is stored in the calibration module, this BFC value being the value that tunes the low frequency cutoff frequency BF.
12.- Procedimiento de calibración de etapas de adquisición y acondicionamiento de biopotenciales eléctricos, según la reivindicación 9, caracterizado por que la etapa de sintonización de la frecuencia de corte de baja frecuencia AF comprende las siguientes subetapas: 12. Procedure for calibration of stages of acquisition and conditioning of electric biopotentials, according to claim 9, characterized in that the tuning stage of the low frequency cut-off frequency AF comprises the following sub-stages:
i) configurar la señal de frecuencia digital NFREQ a través de la señal CONF para que el sintetizador de frecuencias genere un tono de señal a la frecuencia de corte AF, realizándose la carga de la señal de frecuencia digital NFREQ en el sintetizador de frecuencias mediante el disparo del pulso FLOAD;  i) configure the NFREQ digital frequency signal through the CONF signal so that the frequency synthesizer generates a signal tone at the cut-off frequency AF, loading the NFREQ digital frequency signal into the frequency synthesizer by means of the FLOAD pulse shot;
¡i) definir una palabra de control AFC< .NAF> para que el codo paso-baja de la característica de transferencia de la etapa de adquisición y acondicionamiento esté a la menor frecuencia posible, AFC = "00...0"; iii) definir una palabra de control BFC< .NBF> con el último valor de la palabra digital BFC previamente almacenado en el módulo de calibración;  I) define a control word AFC <.NAF> so that the low-elbow of the transfer characteristic of the acquisition and conditioning stage is at the lowest possible frequency, AFC = "00 ... 0"; iii) define a control word BFC <.NBF> with the last value of the digital word BFC previously stored in the calibration module;
iv) esperar un tiempo transitorio marcado por el cambio de estado de la señal lógica TRAN del nivel alto al nivel bajo;  iv) wait for a transitory time marked by the change of state of the TRAN logic signal from the high level to the low level;
v) detectar y almacenar un valor digitalizado del valor máximo de amplitud v) detect and store a digitized value of the maximum amplitude value
Va:AF obtenido a la salida del amplificador de ganancia variable almacenándose el valor digitalizado en el módulo de calibración; y, vi) comparar el valor digitalizado de Va¡AF con una versión escalada de la versión digital de la amplitud Va , siendo el valor de escala a; o si Vg:AF < a- Va se incrementa en un bit menos significativo la palabra digital AFC y se ejecuta de nuevo las etapa v); o si Va:AF > i- Vg se almacena el último valor definido para la palabra digital AFC en el módulo de calibración, siendo este valor AFC el valor que sintoniza la frecuencia de corte de alta frecuencia AF. V a: AF obtained at the output of the variable gain amplifier storing the digitized value in the calibration module; and, vi) compare the digitized value of V a¡A F with a scaled version of the digital version of the amplitude V a , the scale value being a; or if Vg : AF <a- Va the digital word AFC is increased by a less significant bit and steps v) are executed again; or if V a: AF> i- Vg the last value defined for the digital word AFC is stored in the calibration module, this AFC value being the value that tunes the high frequency cutoff frequency AF.
13.- Procedimiento de calibración de etapas de adquisición y acondicionamiento de biopotenciales eléctricos, según la reivindicación 10, caracterizado por que la subíase de calibración del amplificador de ganancia variable comprende la siguientes subetapas: 13.- Procedure for calibration of stages of acquisition and conditioning of electric biopotentials, according to claim 10, characterized in that the calibration rise of the variable gain amplifier comprises the following sub-stages:
i) inicializar un índice IPG con valor O' lógico;  i) initialize an IPG index with logical value O ';
¡i) fijar el bit más significativo de una palabra digital PGC al valor lógico y fijar el resto de bits al valor lógico Ό', esto es, PGC - Ί 0...0"; y, iii) incrementar el índice IPG en 1 ,  I) set the most significant bit of a PGC digital word to the logical value and set the rest of the bits to the logical value Ό ', that is, PGC - ... 0 ... 0 "; and, iii) increase the IPG index by one ,
o si NPG-IPG < 1 , se almacena el último valor definido para la palabra digital PGC dándose el amplificador por calibrado; o si NPG-IPG > 1 ,  or if NPG-IPG <1, the last value defined for the PGC digital word is stored with the amplifier being calibrated; or if NPG-IPG> 1,
generar una palabra digital PGCI de longitud NPG-IPG con el valor del bit más significativo a lógico y el resto de bits a O' lógico; generate a PGCI digital word of NPG-IPG length with the value of the most significant bit to logical and the rest of bits to logical O ';
detectar y almacenar un valor digitalizado de un máximo de amplitud Vpk:pG obtenido a la salida del amplificador de ganancia variable; y, detect and store a digitized value of a maximum amplitude V pk: p G obtained at the output of the variable gain amplifier; Y,
■ comparar el valor digitalizado de Vpk:pG con un fondo de escala■ compare the digitized value of V pk: p G with a full scale
VFs del convertidor analógico-digital; V F s of the analog-digital converter;
o si Vpk:PG < VFs se incrementa PGC en PGCI y se vuelve a la subetapa iii); or if V pk: PG <V F s increases PGC in PGCI and returns to sub-stage iii);
o si Vpk:PG = VFs se decrementa PGC en PGCI y se vuelve a la subetapa i¡¡). or if V pk: PG = V F s decrements PGC in PGCI and returns to the sub-stage i¡¡).
14.- Procedimiento de calibración de etapas de adquisición y acondicionamiento de biopotenciales eléctricos, según la reivindicación 8, caracterizado por que la fase de ajuste de la ganancia en tensión del amplificador de ganancia variable comprende las siguientes etapas: 14.- Procedure of calibration of acquisition stages and conditioning of electric biopotentials according to claim 8, characterized in that the phase of adjustment of the voltage gain of the variable gain amplifier comprises the following steps:
i) inicializar una palabra digital PGC con todos sus bits al valor lógico , de forma que la ganancia PG del amplificador de ganancia variable toma su valor máximo;  i) initialize a PGC digital word with all its bits to the logical value, so that the PG gain of the variable gain amplifier takes its maximum value;
¡i) detectar unos valores máximo y mínimo de señal VPK:MAX y Vpk,m¡n, respectivamente, a la salida del amplificador a lo largo de un penodo de tiempo previamente definido; I) detect maximum and minimum values of V PK signal : MAX and V pk , m ¡n, respectively, at the output of the amplifier over a previously defined period of time;
i¡¡) enviar información relativa al penodo de tiempo de detección al módulo de calibración a través de la señal CONF, codificada como número de ciclos de la señal de reloj CLKTC; y,  i¡¡) send information related to the detection time period to the calibration module via the CONF signal, encoded as the number of cycles of the CLKTC clock signal; Y,
iv) comparar los valores digitalizados de VPK:MAX y Vpk,m¡n con dos valores escalados del valor de fondo de escala VFs del convertidor analógico-digital, siendo un primer factor de escala β cercano e inferior a la unidad, y un segundo factor de escala γ cercano y superior a cero, iv) compare the digitized values of V PK: MAX and V pk , m ¡n with two scaled values of the full scale value V F s of the analog-to-digital converter, with a first scale factor β near and below the unit , and a second scale factor γ near and greater than zero,
a. SÍ VPK¡MAX > β· VFS O V k,min < y- VFS, se disminuye el valor de PGC en un bit menos significativo y se vuelve a la etapa ¡i); to. YES V PK¡MAX > β · VFS OV k, min <and- V FS , the PGC value is decreased by a less significant bit and it returns to step ¡i);
b. SÍ VPK¡MAX < β· VFS O V k,min > γ· VFS, se notifica a a través del canal DATA que la fase de auto-calibración se ha realizado. b. YES V PK¡MAX <β · VFS OV k, min> γ · V FS , it is notified through the DATA channel that the self-calibration phase has been performed.
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