WO2014180414A1 - 基于管理数据输入输出多源协议的传输方法及装置 - Google Patents

基于管理数据输入输出多源协议的传输方法及装置 Download PDF

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Publication number
WO2014180414A1
WO2014180414A1 PCT/CN2014/078768 CN2014078768W WO2014180414A1 WO 2014180414 A1 WO2014180414 A1 WO 2014180414A1 CN 2014078768 W CN2014078768 W CN 2014078768W WO 2014180414 A1 WO2014180414 A1 WO 2014180414A1
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Prior art keywords
read
check value
register
data
address
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PCT/CN2014/078768
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English (en)
French (fr)
Inventor
许轶骏
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中兴通讯股份有限公司
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Application filed by 中兴通讯股份有限公司 filed Critical 中兴通讯股份有限公司
Priority to US15/032,580 priority Critical patent/US10014981B2/en
Priority to EP14795226.1A priority patent/EP3065323B1/en
Publication of WO2014180414A1 publication Critical patent/WO2014180414A1/zh

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
    • H04L1/0083—Formatting with frames or packets; Protocol or part of protocol for error control
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/30—Digital stores in which the information is moved stepwise, e.g. shift registers using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
    • H04L1/009—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location arrangements specific to transmitters

Definitions

  • the present invention relates to communication technologies, and in particular, to a transmission method and apparatus based on CFP Management Data Input/Output (MDA) Multi Source Agreement (MSA). Background technique
  • MDA Management Data Input/Output
  • MSA Multi-Source Agreement
  • MDIO communication does not have a handshake verification mechanism, and packet errors often occur, or the text is lost, but the host does not know and cannot correct it in time.
  • FIG. 1 shows the MDIO command frame for MDIO communication.
  • the MDIO command frame structure is briefly described as follows:
  • Each frame has a total length of 64 bits, the first 32 bits are the preamble (Preamble), and the last 32 bits are the address frame or the command frame.
  • the 32-bit preamble is a continuous 32 logical "bits" sent by the host to the optical module.
  • the MDIO frame command body consists of six parts, as follows: —— ST: start bit (2bit);
  • TA turn around code (2bit); For read operation, the host and optical module keep the MDIO data line high in the first bit of the TA, and the second bit of the TA is logically set by the optical module. "0", the host starts data transmission; for the write operation, the host will drive the two bits of the TA to "0bl0" to start the write operation to the optical module;
  • MDIO communication methods are divided into read operation, continuous read operation, and write operation.
  • the embodiment of the present invention is to provide a transmission method and device based on CFP MDIO MSA, and a verification mechanism during communication, which at least solves the problem that a transmission error between the host and the optical module cannot be corrected in time, and improves communication. reliability.
  • Embodiments of the present invention provide a transmission method based on management data input and output multi-source protocol, including:
  • the check value is calculated on the host and the optical module side respectively, and the correctness of the check value is determined according to the result of the check value comparison, and whether the read data needs to be repeated is determined. Operate or continuously read data operations or write data operations. Preferably, in the case of performing the read data operation,
  • the operation code carried by the frame includes the first address code, indicating a first register address of the read operation; when the operation code carried by the frame includes the first read operation code, indicating to read the first register data; Calculating a check value according to the read first register address and the first register data;
  • the optical module When the operation code carried by the frame includes the second address code, indicating a second register address of the read operation, the optical module writes the calculated check value to the second register address; the operation code carried by the frame includes the When the operation code is read twice, the check value in the second register address is instructed to be read; and the check value calculated by the host side is compared with the check value read from the second register address. Yes, if the check values are the same, the current process ends. Otherwise, the transmission is incorrect and the read data operation needs to be repeated.
  • the operation code carried by the frame includes an address code, indicating a register address of a continuous read operation; when the operation code carried by the frame includes a continuous read operation code, indicating that the register data is read, the host directly reads the register data continuously until subsequent frames.
  • the operation code is not the continuous read operation code; the optical module continuously reads the register data while continuously calculating the check value according to the register address and register data read in each frame, and completes reading of one frame each time. Write the calculated check value to the register address where the check value is stored;
  • the register address storing the check value is read, and the check value calculated by the host side is compared with the check value read from the register address storing the check value. If the check value is consistent, the current process is terminated. Otherwise, the transmission is incorrect, and the continuous read data operation needs to be repeated.
  • the operation code carried by the frame includes the first address code, indicating a first register address of the write operation; when the operation code carried by the frame includes the first write operation code, indicating the first register to be written Data; calculating a check value according to the first register address and the first register data on the optical module side;
  • the operation code carried by the frame includes the second address code, indicating a second register address, where the second register address is a register address stored by the host to obtain a check value;
  • the operation code carried by the frame includes a second write operation
  • the host calculates that the check value is written into the second register address; and compares the calculated check value with the check value read from the second register address on the optical module side If the check value is the same, the current process is ended. Otherwise, the transmission is incorrect, and the write data operation needs to be repeated.
  • the embodiment of the invention further provides a transmission device for inputting and outputting a multi-source protocol based on management data, comprising:
  • a transmission module configured to send at least one frame, and the host instructs to perform a read data operation or a continuous read data operation or a write data operation on the optical module according to the operation code carried by the frame;
  • a checksum decision module configured to calculate a check value on the host and the optical module side when the frame is used for verification, and determine whether the check value is correct according to the result of the check value comparison, and determine Whether it is necessary to repeat the read data operation or the continuous read data operation or the write data operation.
  • the transmission module is further configured to: when the operation code carried by the frame includes the first address code, indicating a first register address of the read operation; when the operation code carried by the frame includes the first read operation code, indicating the read a register of data;
  • the checksum decision module is further configured to calculate a check value according to the read first register address and the first register data on the optical module side;
  • the transmission module is further configured to: when the operation code carried by the frame includes the second address code, indicating a second register address of the read operation; when the operation code carried by the frame includes the second read operation code, indicating the read The check value in the two register addresses;
  • the checksum decision module is further configured to indicate a second register address of the read operation, the light
  • the module writes the calculated check value to the second register address; compares the calculated check value with the check value read from the second register address on the host side, if the check The test value is consistent, and the current process is ended. Otherwise, the transfer is incorrect, and the read data operation needs to be repeated.
  • the transmission module is further configured to: when the operation code carried by the frame includes an address code, indicating a register address of the continuous read operation; when the operation code carried by the frame includes a continuous read operation code, indicating to read the register data;
  • the checksum decision module is further configured to: the host directly reads the register data continuously until the operation code of the subsequent frame is not the continuous read operation code; the optical module reads the register data continuously while reading according to each frame.
  • the register address and the register data continuously calculate the check value, and the calculated check value is written into the register address storing the check value every time the reading of one frame is completed; the check and decision module is also configured as a host After the continuous read operation ends, the register address storing the check value is read, and the check value calculated by the host side is compared with the check value read from the register address storing the check value, and the check value is compared. If the check values are consistent, the current process is terminated. Otherwise, the transmission is incorrect, and the continuous read data operation needs to be repeated.
  • the transmission module is further configured to: when the operation code carried by the frame includes the first address code, indicating a first register address of the write operation; when the operation code carried by the frame includes the first write operation code, indicating that the operation code is to be written First register data;
  • the checksum decision module is further configured to indicate first register data to be written; and calculate a check value according to the first register address and the first register data on the optical module side;
  • the transmission module is further configured to: when the operation code carried by the frame includes the second address code, indicating a second register address, where the second register address is a register address stored by the host to obtain a check value; When the operation code includes the second write operation code, it indicates that the host calculates the verification value and writes it into the second register address;
  • the checksum decision module is further configured to compare the calculated check value with the check value read from the second register address on the optical module side, and if the check value is consistent, the process ends. The current process, otherwise, the transmission is incorrect, and the write data operation needs to be repeated.
  • the transmission module, the verification and decision module may perform a processing by using a central processing unit (CPU), a digital signal processor (DSP, a digital Singnal Processor), or a programmable logic array (FPGA, Field - Programmable Gate Array ) implementation.
  • CPU central processing unit
  • DSP digital signal processor
  • FPGA Field - Programmable Gate Array
  • the method of the embodiment of the present invention is to send at least one frame, and the host instructs to perform a read data operation or a continuous read data operation or a write data operation on the optical module according to the operation code carried by the frame;
  • the host and the optical module side respectively calculate a check value, determine whether the check value is correct or not according to the result of the check value comparison, and determine whether it is necessary to repeat the read data operation or the continuous read data operation or the write data operation. .
  • the verification mechanism since the verification mechanism exists, at least the problem that the transmission error between the host and the optical module cannot be corrected in time is solved, and the communication reliability is improved.
  • 1 is a schematic diagram of a frame structure of an existing MDIO frame
  • FIG. 3 is a schematic diagram showing the basic composition of the system of the present invention. detailed description
  • the method of the embodiment of the invention adopts the transmission verification scheme of the CFP MDIO MSA communication protocol, which can improve communication reliability, improve the correctness and reliability of data transmission, and prevent packet loss and error.
  • This embodiment is implemented by a cooperation operation between a host and an optical module.
  • the host acts as a sender, sends a frame and carries control commands (such as control commands implemented by an operation code), and the optical module serves as a connection.
  • the receiver receiving the frame, performs the corresponding operation according to the read control instruction (such as the control instruction implemented by the operation code).
  • the frame includes a check frame, and the checksum calculation performed by the host and the optical module based on the check frame is based on the same data and the check algorithm, so as to perform the comparison of the check values calculated by the host and the optical module respectively. If the verification values are the same, the current verification operation is ended. Otherwise, the verification operation is continued.
  • address and data content verification may be performed for 16-bit addresses and data.
  • full 32-bit frame verification may be performed for 16-bit addresses and data.
  • After completing the standard read, or standard write, or continuous read operation add a check frame, and according to the correctness of the check value, decide whether it is necessary to repeat the previous operation.
  • the flow is shown in Figure 2.
  • the flow chart of the read or write or continuous read operation includes the following steps:
  • Step 101 The host starts to perform a read data operation or a continuous read data operation or a write data operation on the optical module, and sends a corresponding frame to the optical module.
  • Step 102 Receive a corresponding frame, perform a corresponding operation according to a control instruction implemented by the operation code, and perform a verification operation when the frame is used for verification.
  • Step 103 The matching check values respectively calculated on the host side and the optical module side are matched. If the check values are consistent, the check value is correct, and the current check process is ended. Otherwise, the check values are inconsistent, indicating the check value. If it is not correct, go to step 101 to continue the current read data operation or continuous read data operation or write data operation.
  • Application scenario 1 The case of reading data operations.
  • the read operation of the checksum is composed of 4 frames.
  • the check value is calculated by the host and the optical module respectively for verification.
  • the host sends a frame to the optical module first.
  • the first two frames are the same as the standard read operation, that is, the first frame operation code OP is the address (0b00).
  • the first address code data payload.
  • the register address for the read operation for convenience of description and ease of distinction, may also be referred to as the first register address of the read operation;
  • the operation code OP of the second frame is a read operation code (obll).
  • the optical module performs check value calculation on the read 16-bit address and data, and writes the calculated check value into the register 83FFh.
  • the third frame operation code OP is an address ( ObOO ).
  • it may also be referred to as a second address code, and the data payload is a register address 83FFh.
  • a read operation For convenience of description and easy distinction, it may also be referred to as a read operation.
  • the second register address; the operation code OP of the fourth frame is a read operation code (Obll).
  • the data of the register 83FFh is read, that is, calculated by the optical module.
  • the host compares the calculated check value with the check value of the register 83FFh read. If the check values are not equal, the check value is incorrect, the data transfer is incorrect, and correction is required, the host re-reads the data operation.
  • H refers to the host (host) and M refers to the optical module.
  • M refers to the optical module.
  • the sample parameters for the read data operation are: Read the module parameters starting at 9000h, which can be decomposed into the following contents:
  • Application scenario 2 The case of continuous read data operations.
  • Continuous read operation with checksum In the case of continuous read data operations: Continuous read operation with checksum.
  • the frame is at least one, and the frame is used to perform checksum calculation on the host and the optical module respectively for verification.
  • the host first sends a frame to the optical module, the first frame is the same as the standard read operation, the data payload is the register address of the read operation; the operation code of the second frame is the continuous read operation code (0bl0), and the content data of the corresponding register is read, and
  • the optical module internally puts the data at the next register address into the buffer, waiting for the next frame to be read; the third frame reads the register data directly; and so on, until the frame operation code is not a continuous read operation
  • the code (OblO) is up.
  • the optical module continuously calculates the check value while the host is continuously reading the operation. Each time a frame is read, the calculated check is written to 83FFh. After the host continues to read, the register is read (the operation mode is the same as the read operation), and the host compares the calculated check value with the read check value, and if there is an error, reread.
  • H refers to the host (host)
  • M refers to the optical module (optical module)
  • sample parameters of the continuous read data operation are: Reading the module parameters starting at 8000h can be broken down into the following contents:
  • Application scenario 3 The case of writing data operations.
  • the write data operation of the checksum consists of a 4-frame structure.
  • the check value is calculated by the host and the optical module respectively for verification.
  • the host first sends a frame to the optical module, and the OP of the first frame is an address.
  • the OP of the first frame is an address.
  • the data payload field is an optical module register address.
  • It can be called the first register address of the write operation;
  • the OP of the second frame is the write operation (0b01), which can also be called the first write operation code for convenience of description and easy distinction;
  • the data payload field is the register content to be written.
  • the optical module calculates the CRC-16 check value of the two frames; the OP of the third frame is an address, which may also be referred to as a second address code for the convenience of description and easy to distinguish, and the data payload field is a check value.
  • the stored register address 83FEh for convenience of description and easy distinction, may also be referred to as the second register address of the write operation; the OP of the fourth frame is a write operation, which may also be referred to as a second write operation code for convenience of description and ease of distinction.
  • the data payload field is the check value of the CRC-16 of the first 2 frames calculated by the host. After all 4 frames have been sent, the checksum write operation ends.
  • the module compares its calculated check value with the value in 83FEh. If there is an error, set bit 0 of A021h to 1 . This bit will trigger an alarm.
  • the host can re-write according to the alarm information.
  • the optical module can also notify the host in other ways.
  • H refers to the host (host)
  • M refers to the optical module (optical module)
  • sample parameters for writing data operations are:
  • the algorithm of the check value can be in various forms and is not limited by the content of this article.
  • This article uses CRC-16.
  • the register address where the check value is stored is not limited to the register used in this article (register address 83FEh), and can be used depending on the situation.
  • the device of the embodiment of the present invention includes a transmission module and a check and decision module, where the transmission module is mainly used to mutually transmit the frame between the host and the optical module, that is, to send at least one frame, the host Performing a read data operation or a continuous read data operation or a write data operation on the optical module according to the operation code carried by the frame.
  • the checksum decision module is mainly used for performing check and decision on a frame on the host side or on the optical module side, whether to perform a reread data operation, a continuous read data operation, and a write data operation, that is, for the frame.
  • the check value is calculated on the host and the optical module side, and the check value is determined according to the result of the check value comparison to determine whether the check value needs to be repeated.
  • Application Scenario 1 Execute the read data operation.
  • the transmission module is further configured to: when the operation code carried by the frame includes the first address code, indicating a first register address of the read operation; when the operation code carried by the frame includes the first read operation code, indicating the read a register of data;
  • the checksum decision module is further configured to calculate a check value according to the read first register address and the first register data on the optical module side.
  • the transmission module is further configured to: when the operation code carried by the frame includes the second address code, indicating a second register address of the read operation; when the operation code carried by the frame includes the second read operation code, Instructing to read the check value in the second register address;
  • the optical module writes the calculated check value to the second register address;
  • the verification value is compared with the check value read from the second register address, and if the check value is consistent, the current flow is ended. Otherwise, the transmission is incorrect, and the read data operation needs to be repeated.
  • Application Scenario 2 Perform the continuous read data operation.
  • the transmission module is further configured to: when the operation code carried by the frame includes an address code, indicating a register address of the continuous read operation; when the operation code carried by the frame includes a continuous read operation code, indicating to read the register data;
  • the checksum decision module is further configured to: the host directly reads the register data continuously until the operation code of the subsequent frame is not the continuous read operation code; the optical module continuously reads the register data in the host according to each The register address and register data of the frame read continuously calculate the check value, and the calculated check value is written to the register address where the check value is stored each time the reading of one frame is completed.
  • the checksum decision module is further configured to read a register address storing the check value after the host continuous read operation ends, and read the calculated check value on the host side and the register address from the stored check value. The check value is checked for comparison. If the check value is the same, the current process is terminated. Otherwise, the transmission is incorrect, and the continuous read data operation needs to be repeated.
  • Application Scenario 3 Execute the write data operation.
  • the transmission module is further configured to: when the operation code carried by the frame includes the first address code, indicating a first register address of the write operation; when the operation code carried by the frame includes the first write operation code, indicating that the operation code is to be written First register data;
  • the checksum decision module is further configured to indicate first register data to be written; and perform verification on the optical module side according to the first register address and the first register data Value.
  • the transmission module is further configured to: when the operation code carried by the frame includes the second address code, indicating a second register address, where the second register address is a register address stored by the host to obtain a check value; When the operation code includes the second write operation code, it indicates that the host calculates the verification value and writes it into the second register address;
  • the checksum decision module is further configured to compare the calculated check value with the check value read from the second register address on the optical module side, if the check value is Consistently, the current process is terminated. Otherwise, the transmission is incorrect, and the write data operation needs to be repeated.
  • the integrated modules described in the embodiments of the present invention may also be stored in a computer readable storage medium if they are implemented in the form of software functional modules and sold or used as separate products. Based on such understanding, the technical solution of the embodiments of the present invention may be embodied in the form of a software product in essence or in the form of a software product.
  • the computer software product is stored in a storage medium and includes a plurality of instructions.
  • a computer device (which may be a personal computer, server, or network device, etc.) is implemented to perform all or part of the methods described in various embodiments of the present invention.
  • the foregoing storage medium includes: a USB flash drive, a removable hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and the like.
  • the medium of the code includes: a USB flash drive, a removable hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and the like.
  • the medium of the code includes: a USB flash drive, a removable hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and the like.
  • the medium of the code is not limited Made from any specific combination of hardware and software.
  • an embodiment of the present invention further provides a computer storage medium, wherein a computer program is stored, and the computer program is used to execute a transmission method based on a management data input and output multi-source protocol according to an embodiment of the present invention.
  • the method of the embodiment of the present invention is to send at least one frame, and the host instructs to perform a read data operation or a continuous read data operation or a write data operation on the optical module according to the operation code carried by the frame;
  • the host and the optical module side respectively calculate a check value, determine whether the check value is correct or not according to the result of the check value comparison, and determine whether it is necessary to repeat the read data operation or the continuous read data operation or the write data operation. .
  • the verification mechanism since the verification mechanism exists, at least the problem that the transmission error between the host and the optical module cannot be corrected in time is solved, and the communication reliability is improved.

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Abstract

本发明公开了一种基于管理数据输入输出多源协议的传输方法及装置，其中，该方法包括：发送至少一个帧，主机根据所述帧携带的操作码来指示对光模块执行读数据操作或连续读数据操作或写数据操作；所述帧用于校验时在所述主机和所述光模块侧分别计算校验值，根据校验值比对的结果判断校验值的正确与否，决定是否需要进行重复所述读数据操作或连续读数据操作或写数据操作。

Description

基于管理数据输入输出多源协议的传输方法及装置 技术领域
本发明涉及通讯技术， 尤其涉及一种基于 CFP 管理数据输入输出 ( MDIO, Management Data Input/Output ) 多源协议 ( MSA, Multi Source Agreement ) 的传输方法及装置。 背景技术
目前， 在基于通讯协议的数据传输场景下， 例如基于管理数据输入输 出 （MDIO， Management Data Input/Output )多源协议（MSA， Multi Source Agreement )没有对读写操作中传送的数据进行即时校验， 在通讯中， 一旦 发生数据传输错误， 可能会造成无法估计的结果。 例如： 设置通道波长时 发生错误， 当希望将通道波长设置成第 4 波， 由于传输中出现干扰， 有可 能接收成第 6波， 这样合波后第四波没有信号， 第六波是两路叠加的信号， 接收方将无法有效接收。 导致两路信号业务中断。
本申请发明人在实现本申请实施例技术方案的过程中， 至少发现现有 技术中存在如下技术问题：
实际工作中 MDIO通讯由于没有握手校验机制，经常会发生报文错误， 或才艮文丟失， 而主机却不知道， 也无法及时纠正。
如图 1所示为用于 MDIO通讯的 MDIO命令帧， 对 MDIO命令帧结构 进行简单说明如下：
使用 IEEE 802.3定义的数据帧结构进行通讯。 每帧全部长度 64位， 前 32位为前导码（ Preamble )， 后 32位为地址帧或命令帧。 32位前导码为主 机向光模块发送的连续 32个逻辑 "Γ比特。帧和帧之间为空闲状态（Idle )。
MDIO帧命令体由 6部分组成， 具体如下： —— ST: 开始位 (2bit);
—— OP: 操作码 (2bit);
—— PHYAD : 物理端口地址 (5bit)， 其中地址值 "ObOOOOO" 为广播地 址；
—— DEVADD: MDIO器件地址；
—— TA: 状态转换（turn around )码 (2bit); 对于读操作， 主机和光模 块保持 MDIO数据线在 TA的第一个比特为高阻态， TA的第二个比特由光 模块置为逻辑 "0"， 主机开始数据发送； 对于写操作， 主机将驱动 TA的两 个比特为 "0bl0"， 开始对光模块执行写数据操作；
—— 16-bit地址或数据： MDIO帧结构中的数据净荷域。
MDIO的通讯方式分为读操作， 连续读操作， 写操作。
综上所述， 由于在通讯时没有校验机制， 因此导致主机与光模块间出现 传输错误也无法及时纠正的问题， 针对这个问题尚未存在有效的解决方案。 发明内容
有鉴于此， 本发明实施例希望提供一种基于 CFP MDIO MSA的传输方 法及装置， 通讯时有校验机制， 至少解决了主机与光模块间出现传输错误 也无法及时纠正的问题， 提高了通讯可靠性。
本发明实施例的技术方案是这样实现的：
本发明实施例提供了一种基于管理数据输入输出多源协议的传输方 法， 包括：
发送至少一个帧， 主机根据所述帧携带的操作码来指示对光模块执行 读数据操作或连续读数据操作或写数据操作；
所述帧用于校验时在所述主机和所述光模块侧分别计算校验值， 根据 校验值比对的结果判断校验值的正确与否， 决定是否需要进行重复所述读 数据操作或连续读数据操作或写数据操作。 较佳地， 执行所述读数据操作情况下，
所述帧携带的操作码包含第一地址码时， 指示读操作的第一寄存器地 址； 所述帧携带的操作码包含第一读操作码时， 指示读出第一寄存器数据； 在光模块侧根据读取的所述第一寄存器地址和所述第一寄存器数据计算校 验值；
所述帧携带的操作码包含第二地址码时， 指示读操作的第二寄存器地 址， 光模块将计算得到的校验值写入所述第二寄存器地址； 所述帧携带的 操作码包含第二读操作码时， 指示读出第二寄存器地址中的所述校验值； 在主机侧将其计算的校验值与从所述第二寄存器地址读取的校验值进行校 验值比对， 如果校验值一致， 结束当前流程， 否则， 传输有误， 需重复所 述读数据操作。
较佳地， 执行所述连续读数据操作情况下，
所述帧携带的操作码包含地址码时， 指示连续读操作的寄存器地址； 所述帧携带的操作码包含连续读操作码时， 指示读出寄存器数据， 主机直 接连续读取寄存器数据直至后续帧的操作码不为所述连续读操作码为止； 光模块在主机连续读取寄存器数据同时根据每一帧读取的寄存器地址 和寄存器数据连续计算校验值， 每当完成一帧的读取就将计算得到的校验 值写入存放校验值的寄存器地址；
主机连续读操作结束后， 读取存放校验值的寄存器地址， 在主机侧将 其计算的校验值与从所述存放校验值的寄存器地址读取的校验值进行校验 值比对， 如果校验值一致， 结束当前流程， 否则， 传输有误， 需重复所述 连续读数据操作。
较佳地， 执行所述写数据操作情况下，
所述帧携带的操作码包含第一地址码时， 指示写操作的第一寄存器地 址； 所述帧携带的操作码包含第一写操作码时， 指示需写入的第一寄存器 数据； 在光模块侧根据所述第一寄存器地址和所述第一寄存器数据计算校 验值；
所述帧携带的操作码包含第二地址码时， 指示第二寄存器地址， 所述 第二寄存器地址为主机计算得到校验值存放的寄存器地址； 所述帧携带的 操作码包含第二写操作码时， 指示将主机计算得到校验值写入第二寄存器 地址中； 在光模块侧将其计算的校验值与从所述第二寄存器地址读取的校 验值进行校验值比对， 如果校验值一致， 结束当前流程， 否则， 传输有误， 需重复所述写数据操作。
本发明实施例还提供了一种基于管理数据输入输出多源协议的传输装 置， 包括：
传输模块， 配置为发送至少一个帧， 主机根据所述帧携带的操作码来 指示对光模块执行读数据操作或连续读数据操作或写数据操作；
校验及决策模块， 配置为所述帧用于校验时在所述主机和所述光模块 侧分别计算校验值， 根据校验值比对的结果判断校验值的正确与否， 决定 是否需要进行重复所述读数据操作或连续读数据操作或写数据操作。
较佳地， 执行所述读数据操作情况下，
所述传输模块， 还配置为所述帧携带的操作码包含第一地址码时， 指 示读操作的第一寄存器地址； 所述帧携带的操作码包含第一读操作码时， 指示读出第一寄存器数据；
所述校验及决策模块， 还配置为在光模块侧根据读取的所述第一寄存 器地址和所述第一寄存器数据计算校验值；
所述传输模块， 还配置为所述帧携带的操作码包含第二地址码时， 指 示读操作的第二寄存器地址； 所述帧携带的操作码包含第二读操作码时， 指示读出第二寄存器地址中的所述校验值；
所述校验及决策模块， 还配置为指示读操作的第二寄存器地址时， 光 模块将计算得到的校验值写入所述第二寄存器地址； 在主机侧将其计算的 校验值与从所述第二寄存器地址读取的校验值进行校验值比对， 如果校验 值一致， 结束当前流程， 否则， 传输有误， 需重复所述读数据操作。
较佳地， 执行所述连续读数据操作情况下，
所述传输模块， 还配置为所述帧携带的操作码包含地址码时， 指示连 续读操作的寄存器地址； 所述帧携带的操作码包含连续读操作码时， 指示 读出寄存器数据；
所述校验及决策模块， 还配置为主机直接连续读取寄存器数据直至后 续帧的操作码不为所述连续读操作码为止； 光模块在主机连续读取寄存器 数据同时根据每一帧读取的寄存器地址和寄存器数据连续计算校验值， 每 当完成一帧的读取就将计算得到的校验值写入存放校验值的寄存器地址； 所述校验及决策模块， 还配置为主机连续读操作结束后， 读取存放校 验值的寄存器地址， 在主机侧将其计算的校验值与从所述存放校验值的寄 存器地址读取的校验值进行校验值比对， 如果校验值一致， 结束当前流程， 否则， 传输有误， 需重复所述连续读数据操作。
较佳地， 执行所述写数据操作情况下，
所述传输模块， 还配置为所述帧携带的操作码包含第一地址码时， 指 示写操作的第一寄存器地址； 所述帧携带的操作码包含第一写操作码时， 指示需写入的第一寄存器数据；
所述校验及决策模块， 还配置为指示需写入的第一寄存器数据； 在光 模块侧根据所述第一寄存器地址和所述第一寄存器数据计算校验值；
所述传输模块， 还配置为所述帧携带的操作码包含第二地址码时， 指 示第二寄存器地址， 所述第二寄存器地址为主机计算得到校验值存放的寄 存器地址； 所述帧携带的操作码包含第二写操作码时， 指示将主机计算得 到校验值写入第二寄存器地址中； 所述校验及决策模块， 还配置为在光模块侧将其计算的校验值与从所 述第二寄存器地址读取的校验值进行校验值比对， 如果校验值一致， 结束 当前流程， 否则， 传输有误， 需重复所述写数据操作。
所述传输模块、 所述校验及决策模块在执行处理时， 可以釆用中央处 理器（ CPU， Central Processing Unit )、数字信号处理器（ DSP， Digital Singnal Processor )或可编程逻辑阵列 （ FPGA， Field - Programmable Gate Array ) 实现。
本发明实施例的方法是发送至少一个帧， 主机根据所述帧携带的操作 码来指示对光模块执行读数据操作或连续读数据操作或写数据操作； 所述 帧用于校验时在所述主机和所述光模块侧分别计算校验值， 根据校验值比 对的结果判断校验值的正确与否， 决定是否需要进行重复所述读数据操作 或连续读数据操作或写数据操作。 釆用本发明实施例的方法， 由于存在校 验机制， 因此， 至少解决了主机与光模块间出现传输错误也无法及时纠正 的问题， 提高了通讯可靠性。 附图说明
图 1为现有 MDIO帧的帧结构示意图；
图 2为本发明方法原理的流程图；
图 3为本发明系统的基本组成结构示意图。 具体实施方式
下面结合附图对技术方案的实施作进一步的详细描述。
本发明实施例的方法为釆用 CFP MDIO MSA通讯协议的传输校验方 案， 能提高通讯可靠性， 提高了数据传输的正确性和可靠性， 防止报文丟 失和出错。 本实施例是主机和光模块之间配合操作来实现的， 主机作为发 送方， 发送帧并携带控制指令（如操作码实现的控制指令）， 光模块作为接 收方， 接收帧， 根据读取的控制指令（如操作码实现的控制指令）执行对 应的操作。 而且， 帧中包括校验帧， 主机和光模块基于校验帧是基于一样 的数据和校验算法所做的校验计算， 以便进行主机和光模块分别计算得到 的校验值的比对， 如果校验值一致， 则结束当前校验操作， 否则， 继续执 行校验操作。
具体地， 例如可以针对 16-bit地址和数据， 进行地址和数据内容校验、 或仅对数据内容校验、或对完整的 32-bit的帧进行前两种校验。在完成标准 读、 或标准写、 或连续读操作后， 增加一校验帧， 并根据校验值的正确与 否， 决定是否需要进行重复前一操作， 其流程如图 2所示， 加校验的读或 写或连续读操作流程图包括以下步骤：
步骤 101、主机开始对光模块执行读数据操作或连续读数据操作或写数 据操作， 发送对应的帧给光模块。
步骤 102、 接收对应帧， 根据操作码实现的控制指令执行对应的操作， 帧用于校验时进行校验操作。
步骤 103、 比对在主机侧和光模块侧分别计算得到的校验值是否匹配， 如果校验值一致， 说明校验值正确， 结束当前校验流程， 否则， 校验值不 一致， 说明校验值不正确， 转入执行步骤 101， 继续当前读数据操作或连续 读数据操作或写数据操作。
以下分本发明实施例的各个具体应用场景分别阐述如下：
应用场景一： 读数据操作的情况。
读数据操作的情况下： 加校验的读操作是由 4个帧组成， 帧用于校验 时在主机和光模块分别计算校验值以进行校验操作。 主机先发送帧给光模 块， 前 2帧同标准的读操作， 即： 第 1帧操作码 OP为地址（0b00 )， 为了 描述方便及便于区分， 也可以称为第一地址码， 数据净荷为读操作的寄存 器地址， 为了描述方便及便于区分， 也可以称为读操作的第一寄存器地址； 第 2帧的操作码 OP为读操作码（ Obll )， 为了描述方便及便于区分， 也可 以称为第一读操作码， 读出寄存器数据。 光模块通过对读取的 16-bit地址 和数据， 进行校验值计算， 并将计算的校验值写入寄存器 83FFh， 为了描述 方便及便于区分， 也可以称为读操作的第二寄存器地址， 同时， 主机也计 算出校验值。 第 3帧操作码 OP为地址（ ObOO )， 为了描述方便及便于区分， 也可以称为第二地址码，数据净荷为寄存器地址 83FFh， 为了描述方便及便 于区分，也可以称为读操作的第二寄存器地址； 第 4帧的操作码 OP为读操 作码（Obll )， 为了描述方便及便于区分， 也可以称为第二读操作码， 读出 寄存器 83FFh的数据， 即光模块计算得到的且写入寄存器 83FFh的上述校 验值， 主机将其计算出的校验值， 与其所读取的寄存器 83FFh的校验值进 行比较。 如果校验值不相等， 说明校验值错误， 数据传输有误， 需要纠正， 则主机重新进行读数据操作。
在实际应用中， H指代主机 ( host )， M指代光模块（ optical module )， 读数据操作的示例参数为： 读取 9000h起始的模块参数， 可以分解为下列内容：
1、 发送地址帧 9000h
第 1帧
I H->M
I
<Idle><32-bit Preamble ><00><00><AAAAA><00001 ><10><1001 0000
0000 0000><idle>
2、 读地址 9000h寄存器的数据
第 2帧
I H->M I I M->H I
<Idle><32-bit Preamble ><00><11><AAAAA><00001><Z0><DDDD DDDD DDDD DDDD><idle>
3、 发送 83FFh寄存器的地址帧
第 3帧
I H->M I I M->H I
<Idle><32-bit Preamble><00><00><AAAAA><00001 ><10><1011 0110 1111 llll><Idle>
4、 读地址 83FFh寄存器的数据
第 4帧
I H->M I I M->H
I
<Idle><32-bit Preamble ><00><11><AAAAA><00001><Z0><DDDD DDDD DDDD DDDD><idle>
本次操作结束。
应用场景二： 连续读数据操作的情况。
连续读数据操作的情况下： 加校验的连续读操作。 帧为至少一个， 帧 用于校验时在主机和光模块分别计算校验值以进行校验操作。 主机先发送 帧给光模块， 第 1帧同标准读操作， 数据净荷为读操作的寄存器地址； 第 2 帧的操作码为连续读操作码（0bl0 )， 读出对应寄存器的内容数据， 同时光 模块内部将下一个寄存器地址处的数据放到緩冲区中， 等待下一帧来被读 取； 第 3 帧主机直接读取寄存器数据； 以此类推， 直到帧操作码不为连续 读操作码（OblO )为止。 光模块在主机连续读操作的同时连续计算校验值， 每完成一帧读， 就将计算出的校验写入 83FFh。 主机连续读操作结束后， 读 取该寄存器（操作方式与读操作同）， 主机根据算出的校验值和读到的校验 值进行比较， 如果有误进行重读。
在实际应用中， H指代主机 ( host )， M指代光模块（ optical module )， 连续读数据操作的示例参数为： 读取 8000h起始的模块参数， 可以分解为下列内容：
1、 发送地址帧 8000h
第 1帧
I H->M
I
<Idle><32-bit Preamble ><00><00><AAAAA><00001 ><10><1000 0000 0000 0000><idle>
2、 读地址 8000h寄存器的数据
第 2帧
I H->M I I M->H
I
<Idle><32-bit Preamble ><00><10><AAAAA><00001 ><ZO><DDDD DDDD DDDD DDDD><idle>
3、 读地址 8001h寄存器的数据
第 3帧
I H->M I I M->H
I
<Idle><32-bit Preamble ><00><10><AAAAA><00001 ><ZO><DDDD DDDD DDDD DDDD><idle>
4、 读地址 8000h+n寄存器的数据（最后一帧）
第 n+1帧
I H->M I I M->H
I
<Idle><32-bit Preamble ><00><10><AAAAA><00001 ><ZO><DDDD DDDD DDDD DDDD><idle>
5、 发送 83FFh寄存器的地址帧 第 n+2帧
I H->M I I M->H
I
<Idle><32-bit Preamble><00><00><AAAAA><00001 ><10><1011 0110 1111 llll><Idle>
6、 读地址 83FFh寄存器的数据
第 n+3帧
I H->M I I M->H
I
<Idle><32-bit Preamble ><00><11><AAAAA><00001><Z0><DDDD
DDDD DDDD DDDD><idle>
本操作结束。
应用场景三： 写数据操作的情况。
写数据操作的情况下： 加校验的写数据操作由 4 帧的结构组成， 帧用 于校验时在主机和光模块分别计算校验值以进行校验操作。 主机先发送帧 给光模块， 第 1帧的 OP为地址， 为了描述方便及便于区分， 也可以称为第 一地址码， 数据净荷域为光模块寄存器地址， 为了描述方便及便于区分， 也可以称为写操作的第一寄存器地址； 第 2帧的 OP为写操作 （0b01 )， 为 了描述方便及便于区分， 也可以称为第一写操作码； 数据净荷域为要写的 寄存器内容； 同时， 光模块计算出这 2帧的 CRC-16校验值； 第 3帧的 OP 为地址， 为了描述方便及便于区分， 也可以称为第二地址码， 数据净荷域 为校验值存放的寄存器地址 83FEh， 为了描述方便及便于区分， 也可以称 为写操作的第二寄存器地址； 第 4帧的 OP为写操作， 为了描述方便及便于 区分， 也可以称为第二写操作码， 数据净荷域为主机计算出的前 2 帧的 CRC-16的校验值。 4帧都发送完毕后， 加校验写操作结束。 模块将自己计 算的校验值与 83FEh中的值进行比较。 如果有错误， 置位 A021h的 bit 0为 1 。 此位将引发告警产生。 主机根据告警信息， 可重新进行写操作。 对此 光模块也可以用其他方式通知主机。
在实际应用中， H指代主机 ( host )， M指代光模块（ optical module )， 写数据操作的示例参数为：
设置 CFP光模块光发送通道。 向发送通道设置寄存器 B400h写入期望 的波长 0012h(第 18波）。将计算得到的 CRC-16的校验值放入寄存器 83FEh。 可以分解为下列内容：
1、 发送地址帧 B400h
第 1帧
I H->M
I
000000><ldle>
2、 发送数据帧 0012h
第 2帧
I H->M
I
<Idle><32-bitPreamble ><00><01 ><AAAAA><00001 ><10x000000000 0010010><Idle>
3、 发送地址帧 83FEh
第 3帧
I H->M
I
<Idle><32-bit Preamble><00><00><AAAAA><00001 ><10><1011 0110 1111 1110><Idle>
4、 发送数据帧 （前 2帧数据净荷的 CRC-16的校验值 ) 8805h 第 4帧 I H->M
I
<Idle><32-bitPreamble ><00><01 ><AAAAA><00001 ><10><1000 1000 0000 0101><Idle>
本操作结束。
这里需要指出的是， 校验值的算法可以有多种形式， 不受本文内容的 限制， 本文釆用的是 CRC-16。 校验值存放的寄存器地址也不限于本文所用 地址的寄存器 (寄存器地址 83FEh )， 可根据情况选择使用。
本发明实施例的装置如图 3 所述， 包括传输模块和校验及决策模块， 其中传输模块主要用于在主机与光模块之间互传所述帧， 即用于发送至少 一个帧， 主机根据所述帧携带的操作码来指示对光模块执行读数据操作或 连续读数据操作或写数据操作。 所述校验及决策模块主要用于在主机侧或 在光模块侧进行针对帧的校验及决策是否进行重新读数据操作， 连续读数 据操作及写数据操作的处理， 即用于所述帧为至少一个， 所述帧用于校验 时在所述主机和所述光模块侧分别计算校验值， 根据校验值比对的结果判 断校验值的正确与否， 决定是否需要进行重复所述读数据操作或连续读数 据操作或写数据操作。
具体地， 分为以下三个场景分别描述：
应用场景 1 : 执行所述读数据操作情况。
所述传输模块， 还配置为所述帧携带的操作码包含第一地址码时， 指 示读操作的第一寄存器地址； 所述帧携带的操作码包含第一读操作码时， 指示读出第一寄存器数据；
相应地， 所述校验及决策模块， 还配置为在光模块侧根据读取的所述 第一寄存器地址和所述第一寄存器数据计算校验值。 所述传输模块， 还配置为所述帧携带的操作码包含第二地址码时， 指 示读操作的第二寄存器地址； 所述帧携带的操作码包含第二读操作码时， 指示读出第二寄存器地址中的所述校验值；
相应地， 所述校验及决策模块， 还配置为指示读操作的第二寄存器地 址时， 光模块将计算得到的校验值写入所述第二寄存器地址； 在主机侧将 其计算的校验值与从所述第二寄存器地址读取的校验值进行校验值比对， 如果校验值一致， 结束当前流程， 否则， 传输有误， 需重复所述读数据操 作。
应用场景 2: 执行所述连续读数据操作情况。
所述传输模块， 还配置为所述帧携带的操作码包含地址码时， 指示连 续读操作的寄存器地址； 所述帧携带的操作码包含连续读操作码时， 指示 读出寄存器数据；
相应地， 所述校验及决策模块， 还配置为主机直接连续读取寄存器数 据直至后续帧的操作码不为所述连续读操作码为止； 光模块在主机连续读 取寄存器数据同时根据每一帧读取的寄存器地址和寄存器数据连续计算校 验值， 每当完成一帧的读取就将计算得到的校验值写入存放校验值的寄存 器地址。
所述校验及决策模块， 还配置为主机连续读操作结束后， 读取存放校 验值的寄存器地址， 在主机侧将其计算的校验值与从所述存放校验值的寄 存器地址读取的校验值进行校验值比对， 如果校验值一致， 结束当前流程， 否则， 传输有误， 需重复所述连续读数据操作。
应用场景 3 : 执行所述写数据操作情况。
所述传输模块， 还配置为所述帧携带的操作码包含第一地址码时， 指 示写操作的第一寄存器地址； 所述帧携带的操作码包含第一写操作码时， 指示需写入的第一寄存器数据；
相应地， 所述校验及决策模块， 还配置为指示需写入的第一寄存器数 据； 在光模块侧根据所述第一寄存器地址和所述第一寄存器数据计算校验 值。
所述传输模块， 还配置为所述帧携带的操作码包含第二地址码时， 指 示第二寄存器地址， 所述第二寄存器地址为主机计算得到校验值存放的寄 存器地址； 所述帧携带的操作码包含第二写操作码时， 指示将主机计算得 到校验值写入第二寄存器地址中；
相应地， 所述校验及决策模块， 还配置为在光模块侧将其计算的校验 值与从所述第二寄存器地址读取的校验值进行校验值比对， 如果校验值一 致， 结束当前流程， 否则， 传输有误， 需重复所述写数据操作。
综上所述， 釆用上述三个应用场景的具体说明， 从上面的叙述中， 可 以看出本发明的优势在于：
1 )操作简单， 不改变帧的结构， 也不改变主机与光模块间总的处理流 程， 是在完成标准读或标准写或连续读操作后， 增加一校验帧进行传输校 验。
2 )通过主机与光模块间对校验值的比对以及相应的操作， 保证了数据 传送的正确可靠， 及时发现传输内容的缺漏， 以便于及早发现问题， 及早 纠正。
本发明实施例所述集成的模块如果以软件功能模块的形式实现并作为 独立的产品销售或使用时， 也可以存储在一个计算机可读取存储介质中。 基于这样的理解， 本发明实施例的技术方案本质上或者说对现有技术做出 贡献的部分可以以软件产品的形式体现出来， 该计算机软件产品存储在一 个存储介质中， 包括若干指令用以使得一台计算机设备（可以是个人计算 机、 服务器、 或者网络设备等）执行本发明各个实施例所述方法的全部或 部分。 而前述的存储介质包括： U盘、 移动硬盘、 只读存储器 （ROM， Read-Only Memory ), 随机存取存 4诸器 ( RAM, Random Access Memory )、 磁碟或者光盘等各种可以存储程序代码的介质。 这样， 本发明实施例不限 制于任何特定的硬件和软件结合。
相应的， 本发明实施例还提供一种计算机存储介质， 其中存储有计算 机程序， 该计算机程序用于执行本发明实施例的基于管理数据输入输出多 源协议的传输方法。
以上所述， 仅为本发明的较佳实施例而已， 并非用于限定本发明的保 护范围。 工业实用性
本发明实施例的方法是发送至少一个帧， 主机根据所述帧携带的操作 码来指示对光模块执行读数据操作或连续读数据操作或写数据操作； 所述 帧用于校验时在所述主机和所述光模块侧分别计算校验值， 根据校验值比 对的结果判断校验值的正确与否， 决定是否需要进行重复所述读数据操作 或连续读数据操作或写数据操作。 釆用本发明实施例的方法， 由于存在校 验机制， 因此， 至少解决了主机与光模块间出现传输错误也无法及时纠正 的问题， 提高了通讯可靠性。

Claims

权利要求书
1、 一种基于管理数据输入输出多源协议的传输方法， 所述方法包括： 发送至少一个帧， 主机根据所述帧携带的操作码来指示对光模块执行 读数据操作或连续读数据操作或写数据操作；
所述帧用于校验时在所述主机和所述光模块侧分别计算校验值， 根据 校验值比对的结果判断校验值的正确与否， 决定是否需要进行重复所述读 数据操作或连续读数据操作或写数据操作。
2、 根据权利要求 1所述的方法， 其中， 执行所述读数据操作情况下， 所述帧携带的操作码包含第一地址码时， 指示读操作的第一寄存器地 址； 所述帧携带的操作码包含第一读操作码时， 指示读出第一寄存器数据； 在光模块侧根据读取的所述第一寄存器地址和所述第一寄存器数据计算校 验值；
所述帧携带的操作码包含第二地址码时， 指示读操作的第二寄存器地 址， 光模块将计算得到的校验值写入所述第二寄存器地址； 所述帧携带的 操作码包含第二读操作码时， 指示读出第二寄存器地址中的所述校验值； 在主机侧将其计算的校验值与从所述第二寄存器地址读取的校验值进行校 验值比对， 如果校验值一致， 结束当前流程， 否则， 传输有误， 需重复所 述读数据操作。
3、 根据权利要求 1所述的方法， 其中， 执行所述连续读数据操作情况 下，
所述帧携带的操作码包含地址码时， 指示连续读操作的寄存器地址； 所述帧携带的操作码包含连续读操作码时， 指示读出寄存器数据， 主机直 接连续读取寄存器数据直至后续帧的操作码不为所述连续读操作码为止； 光模块在主机连续读取寄存器数据同时根据每一帧读取的寄存器地址 和寄存器数据连续计算校验值， 每当完成一帧的读取就将计算得到的校验 值写入存放校验值的寄存器地址；
主机连续读操作结束后， 读取存放校验值的寄存器地址， 在主机侧将 其计算的校验值与从所述存放校验值的寄存器地址读取的校验值进行校验 值比对， 如果校验值一致， 结束当前流程， 否则， 传输有误， 需重复所述 连续读数据操作。
4、 根据权利要求 1所述的方法， 其中， 执行所述写数据操作情况下， 所述帧携带的操作码包含第一地址码时， 指示写操作的第一寄存器地 址； 所述帧携带的操作码包含第一写操作码时， 指示需写入的第一寄存器 数据； 在光模块侧根据所述第一寄存器地址和所述第一寄存器数据计算校 验值；
所述帧携带的操作码包含第二地址码时， 指示第二寄存器地址， 所述 第二寄存器地址为主机计算得到校验值存放的寄存器地址； 所述帧携带的 操作码包含第二写操作码时， 指示将主机计算得到校验值写入第二寄存器 地址中； 在光模块侧将其计算的校验值与从所述第二寄存器地址读取的校 验值进行校验值比对， 如果校验值一致， 结束当前流程， 否则， 传输有误， 需重复所述写数据操作。
5、 一种基于管理数据输入输出多源协议的传输装置， 所述装置包括： 传输模块， 配置为发送至少一个帧， 主机根据所述帧携带的操作码来 指示对光模块执行读数据操作或连续读数据操作或写数据操作；
校验及决策模块， 配置为所述帧用于校验时在所述主机和所述光模块 侧分别计算校验值， 根据校验值比对的结果判断校验值的正确与否， 决定 是否需要进行重复所述读数据操作或连续读数据操作或写数据操作。
6、 根据权利要求 5所述的装置， 其中， 执行所述读数据操作情况下， 所述传输模块， 还配置为所述帧携带的操作码包含第一地址码时， 指 示读操作的第一寄存器地址； 所述帧携带的操作码包含第一读操作码时， 指示读出第一寄存器数据；
所述校验及决策模块， 还配置为在光模块侧根据读取的所述第一寄存 器地址和所述第一寄存器数据计算校验值；
所述传输模块， 还配置为所述帧携带的操作码包含第二地址码时， 指 示读操作的第二寄存器地址； 所述帧携带的操作码包含第二读操作码时， 指示读出第二寄存器地址中的所述校验值；
所述校验及决策模块， 还配置为指示读操作的第二寄存器地址时， 光 模块将计算得到的校验值写入所述第二寄存器地址； 在主机侧将其计算的 校验值与从所述第二寄存器地址读取的校验值进行校验值比对， 如果校验 值一致， 结束当前流程， 否则， 传输有误， 需重复所述读数据操作。
7、 根据权利要求 5所述的装置， 其中， 执行所述连续读数据操作情况 下，
所述传输模块， 还配置为所述帧携带的操作码包含地址码时， 指示连 续读操作的寄存器地址； 所述帧携带的操作码包含连续读操作码时， 指示 读出寄存器数据；
所述校验及决策模块， 还配置为主机直接连续读取寄存器数据直至后 续帧的操作码不为所述连续读操作码为止； 光模块在主机连续读取寄存器 数据同时根据每一帧读取的寄存器地址和寄存器数据连续计算校验值， 每 当完成一帧的读取就将计算得到的校验值写入存放校验值的寄存器地址； 所述校验及决策模块， 还配置为主机连续读操作结束后， 读取存放校 验值的寄存器地址， 在主机侧将其计算的校验值与从所述存放校验值的寄 存器地址读取的校验值进行校验值比对， 如果校验值一致， 结束当前流程， 否则， 传输有误， 需重复所述连续读数据操作。
8、 根据权利要求 5所述的装置， 其中， 执行所述写数据操作情况下， 所述传输模块， 还配置为所述帧携带的操作码包含第一地址码时， 指 示写操作的第一寄存器地址； 所述帧携带的操作码包含第一写操作码时， 指示需写入的第一寄存器数据；
所述校验及决策模块， 还配置为指示需写入的第一寄存器数据； 在光 模块侧根据所述第一寄存器地址和所述第一寄存器数据计算校验值；
所述传输模块， 还配置为所述帧携带的操作码包含第二地址码时， 指 示第二寄存器地址， 所述第二寄存器地址为主机计算得到校验值存放的寄 存器地址； 所述帧携带的操作码包含第二写操作码时， 指示将主机计算得 到校验值写入第二寄存器地址中；
所述校验及决策模块， 还配置为在光模块侧将其计算的校验值与从所 述第二寄存器地址读取的校验值进行校验值比对， 如果校验值一致， 结束 当前流程， 否则， 传输有误， 需重复所述写数据操作。
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