WO2014101074A1 - 液晶显示器的驱动系统的可编程伽马电路 - Google Patents
液晶显示器的驱动系统的可编程伽马电路 Download PDFInfo
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- WO2014101074A1 WO2014101074A1 PCT/CN2012/087754 CN2012087754W WO2014101074A1 WO 2014101074 A1 WO2014101074 A1 WO 2014101074A1 CN 2012087754 W CN2012087754 W CN 2012087754W WO 2014101074 A1 WO2014101074 A1 WO 2014101074A1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0271—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
- G09G2320/0276—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction
Definitions
- the invention belongs to the field of liquid crystal display, and relates to a programmable gamma circuit for reducing power consumption and temperature of a liquid crystal display. Background technique
- LCD drive systems typically include a programmable gamma (P-Gamma) circuit.
- the P-Gamma circuit generates a pixel gray scale reference voltage (Gamma voltage:), and a pixel gray scale reference voltage is supplied to the gate driver to drive each pixel of the liquid crystal display panel.
- FIG. 1 shows a block diagram of a portion of a prior art LCD drive system.
- an Inter Integrated Circuit (I2C) interface logic 1 receives a serial clock (SCL) signal, a serial data (SDA), and a write enable signal (nWR), and provides received signals and data to Timing controller 2.
- the timing controller 2 generates a timing control signal and data for generating a pixel gray scale reference voltage.
- the P-Gamma circuit 3 includes a plurality of digital to analog converters (DACs) and a plurality of OPs, each of which is connected to a corresponding one of the OPs.
- DACs digital to analog converters
- the DAC receives data for generating a pixel gray scale reference voltage from the timing controller 2, converts the data into an analog signal, and the OP amplifies the converted analog signal as a pixel gray scale reference voltage V. Utl , V. Ut2 V. Utn (the case where n is 14 is shown in Fig. 1). Timing controller
- the liquid crystal molecules is the reference voltage (V .. m:> molecules of the liquid crystal module 4 according to the timing controller 2 generates a reference voltage deflection
- VAA the operating voltage obtained by converting the reference voltage of the voltage converter of the LCD drive system:
- P V (voltage: ) xl (current:)
- a programmable gamma circuit of a driving system of a liquid crystal display comprising: a first digital to analog converter to an nth digital to analog converter, driven from the liquid crystal display
- the timing controller of the system receives data for generating a pixel gray scale reference voltage, and converts the data into an analog signal; a first operational amplifier to an nth operational amplifier, each operational amplifier being coupled to the first digital to analog converter to A corresponding one of the n-th digital-to-analog converters, the first operational amplifier to the nth operational amplifier amplifies the converted analog signal as a pixel gray scale reference voltage V. Utl to V.
- n is an even number
- the first resistor to the fifth resistor are connected in series to each other, and the operating voltage VAA obtained by converting the reference voltage of the voltage converter of the driving system of the liquid crystal display is input to one end of the first resistor, fifth One end of the resistor is grounded, wherein a voltage VAAi between the first resistor and the second resistor is input to a power supply terminal of the front ⁇ /2 operational amplifiers, and a voltage VAA between the second resistor and the third resistor, respectively.
- the voltage VAIi between the first resistor and the second resistor is greater than the pixel gray scale reference voltage V of the first operational amplifier output.
- Utl the voltage VA2 between the second resistor and the third resistor is smaller than the pixel gray scale reference voltage V of the (n/2-l) operational amplifier output.
- Ut(n/2 , the voltage VAA 3 between the third resistor and the fourth resistor is greater than the pixel gray scale reference voltage V OUT(N/2-1) of the (n/2-l) operational amplifier output,
- the voltage VAA4 between the four resistors and the fifth resistor is smaller than the pixel gray scale reference voltage V of the nth operational amplifier output.
- UTN the voltage VAIi between the first resistor and the second resistor is greater than the pixel gray scale reference voltage V of the first operational amplifier output.
- Utl the voltage VA2 between the second resistor and the third resistor is smaller than the pixel gray scale reference voltage V of the (n/2-l) operational amplifier output.
- VAA3/(R4+R 5 ) VAA 4 /R 5 , according to a predetermined pixel gray scale reference voltage V. Utl to V. The value of utn determines the value of voltage ⁇ 1 to VAA4, and then selects the resistance value R 5 of the fifth resistor, and calculates the resistance values of the first to fourth resistors according to the equation.
- 1 is a block diagram showing a portion of a drive system of a related art LCD
- 2 is a schematic view showing a P-Gamma circuit of a driving system of an LCD according to a first embodiment of the present invention
- Fig. 3 is a block diagram showing a P-Gamma circuit of a driving system of an LCD according to a second embodiment of the present invention. detailed description
- Fig. 2 is a schematic view showing a P-Gamma circuit of a driving system of an LCD according to a first embodiment of the present invention.
- the voltage converter of the driving system of the LCD is converted into half of the operating voltage VAA obtained by converting the reference voltage (HVAAM is the operating voltage of the OP of the P-Gamma circuit).
- the P-Gamma circuit includes a first DAC to an nth DAC and first to nth OPs, and n is an even number (see FIG. 3).
- Each DAC is connected to a corresponding OP.
- Each OP is connected to a corresponding DAC.
- the DAC receives data for generating a pixel gray scale reference voltage from a timing controller of the driving system of the LCD, converts the data into an analog signal, and the OP amplifies the converted analog signal as a pixel gray scale reference voltage v. Utl , v. Ut2 v. Utn .
- the n OPs are divided into the first n/2 OPs and the last n/2 OP groups.
- the first embodiment of the present invention will be described below by taking n equal to 14 as an example, but the present invention is not limited thereto, and the size of n may be changed as needed.
- the 14 0Ps were divided into the first 7 0P and the last 7 0P groups.
- the voltage converter of the drive system of the LCD into the LCD converts the reference voltage by half of the operating voltage V AA (HVAA:), and the operating voltage VAA is input to the power supply terminals of the first seven OPs respectively, and half of the operating voltage VAA is input to the HVAA.
- the operating voltage across 0P is only half of the operating voltage according to the prior art.
- the current flowing through 0P is determined by the load connected to the 0P back end. If the load is constant, the current flowing through 0P does not change.
- FIG. 3 is a schematic view showing a P-Gamma circuit of a driving system of an LCD according to a second embodiment of the present invention.
- the P-Gamma circuit includes a first DAC to an nth DAC and first to nth OPs, and n is an even number.
- Each DAC is connected to a corresponding OP.
- Each OP is connected to a corresponding one DAC.
- the first DAC to the nth DAC receive data for generating a pixel gray scale reference voltage from a timing controller of a driving system of the LCD, convert the data into an analog signal, and convert the data into an analog signal.
- the analog signal is used as the pixel gray scale reference voltage v. Utl , v. Ut2 v. Utn .
- n OPs are divided into the first n/2 OPs and the last n/2 OP groups.
- the second embodiment of the present invention will be described below by taking n equal to 14 as an example, but the present invention is not limited thereto, and the size of n can be changed as needed. Therefore, 14 0Ps are divided into the first 7 0P and the last 7 0P groups.
- the first to fifth resistors R 5 are introduced to divide the operating voltage VAA.
- the first to fifth resistors are connected in series to each other, the operating voltage V AA is input to one end of the first resistor, and one end of the fifth resistor R 5 is grounded.
- the voltage VA ⁇ between the first resistor and the second resistor R 2 is input to the power terminals of the first 7 OPs, respectively, and the voltage VAA2 between the second resistor R 2 and the third resistor R 3 is input to the front.
- ⁇ the ground terminal of the 0P the voltage ⁇ 3 between the third resistor R 3 and the fourth resistor R 4 is input to the power terminals of the last 7 0P, respectively, the fourth resistor R 4 and the fifth resistor R 5
- the voltage VAA4 is input to the ground terminals of the last 7 0P, respectively.
- the first 7 0P cross-overs are
- the crossover pressures of the last 7 OPs were VAA 3 -VAA4, (VAArVAAs) and (VAA 3 -VAA4) were all smaller than VAA.
- Each OP has two operating voltages, one high and one low, and the output voltage V of 0P.
- Ut needs to be between 0P working voltage. Therefore, , VAA2 ⁇ V OUT7 , VAA3>V OUT8 , VAA4 ⁇ V.
- UTL4 For the case of n OPs, similarly obtained , VAA2 ⁇ V out(n/2-l), VAA3>V out(n/2+l),
- VAA3/(R4+R5) VAA4/R5.
- R1 to R 5 are also used to represent the resistance values of the first to fifth resistors.
- the grayscale reference voltage V of each pixel can be used as needed.
- UTL V.
- the value of ut2 ⁇ 14 determines the value of ⁇ 1 to V AA4 , and then selects the resistance value R 5 of the fifth resistor, and then the resistance values of the first resistor to the fourth resistor can be sequentially calculated according to the above equation. .
- the current flowing through the OP is determined by the load connected to the back end of the OP. If the load does not change, the current flowing through the OP does not change.
- power consumption? 1, V becomes smaller, in theory, the power consumption of each OP will decrease, and the temperature will also decrease, so that the power consumption of the P-Gamma circuit will decrease and the temperature will decrease. Therefore, the performance of the P-Gamma circuit can be maintained and the life of the P-Gamma circuit can be extended.
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Abstract
公开了一种液晶显示器的驱动系统的可编程伽马电路。该电路包括:第一至第n数模转换器,从液晶显示器的时序控制器接收数据并将其转换为模拟信号;第一至第n运算放大器,每个运算放大器连接到相应一个数模转换器,放大模拟信号作为像素灰阶参考电压;第一(R1)至第五电阻器(R2),彼此串联连接,液晶显示器的电压转换器转换基准电压所得的操作电压(VAA)输入到第一电阻器(R1)的一端,第五电阻器(R5)的一端接地(GND),第一(R1)和第二电阻器(R2)之间的电压(VAA1)分别输入到前n/2个运算放大器的电源端,第二(R2)和第三电阻器(R3)之间的电压(VAA2)分别输入到前n/2个运算放大器的接地端,第三(R3)和第四电阻器(R4)之间的电压(VAA3)分别输入到后n/2个运算放大器的电源端,第四(R4)和第五电阻器(R5)之间的电压(VAA4)分别输入到后n/2个运算放大器的接地端。
Description
液晶显示器的驱动系统的可编程伽马电路 技术领域
本发明属于液晶显示领域, 涉及一种液晶显示器的降低功耗和温度的可 编程伽马电路。 背景技术
现有的液晶显示器 (LCD)的驱动系统通常包括可编程伽马 (P-Gamma)电 路。 P-Gamma电路产生像素灰阶参考电压 (Gamma电压:), 像素灰阶参考电压 可提供给栅极驱动器, 以驱动液晶显示面板的各个像素。
图 1示出了现有技术的 LCD的驱动系统的一部分的框图。参照图 1, 内 部集成电路 (Inter Integrated Circuit, I2C)接口逻辑 1接收串行时钟 (SCL)信号、 串行数据 (SDA)和写使能信号 (nWR),并且将接收的信号和数据提供给时序控 制器 2。 时序控制器 2产生时序控制信号以及用于产生像素灰阶参考电压的 数据。 P-Gamma电路 3包括多个数模转换器 (DAC)和多个 OP, 每个 DAC连 接到相应一个 OP。 DAC从时序控制器 2接收用于产生像素灰阶参考电压的 数据, 将所述数据转换为模拟信号, OP放大转换的模拟信号作为像素灰阶参 考电压 V。utl、 V。ut2 V。utn (图 1中示出了 n为 14的情况)。 时序控制器
2根据时序控制信号控制各个 OP产生像素灰阶参考电压的时序。此外, 液晶 分子偏转参考电压 (V。。m:>模块 4根据时序控制器 2产生液晶分子偏转参考电压
V com— out o
通常, P-Gamma电路中的 OP的工作电压为 VAA/0 (VAA是 LCD的驱动 系统的电压转换器转换基准电压所得的操作电压:), OP的跨压比较大, OP的 功耗 P = V(电压: )xl(电流:), 所以 ΟΡ功耗会较大, 相应的 P-Gamma电路的功 耗也会较大, 从而 P-Gamma电路的温度也较高, 这会降低 P-Gamma电路的 性能且缩短 P-Gamma电路的使用寿命。
发明内容
根据本发明的一方面, 提供一种液晶显示器的驱动系统的可编程伽马电 路, 所述可编程伽马电路包括: 第一数模转换器至第 n数模转换器, 从液晶 显示器的驱动系统的时序控制器接收用于产生像素灰阶参考电压的数据, 并 将所述数据转换为模拟信号; 第一运算放大器至第 n运算放大器, 每个运算 放大器连接到第一数模转换器至第 n数模转换器中的相应一个数模转换器, 第一运算放大器至第 n运算放大器放大转换的模拟信号作为像素灰阶参考电 压 V。utl至 V。utn, 其中, n为偶数; 第一电阻器至第五电阻器, 彼此串联连接, 液晶显示器的驱动系统的电压转换器转换基准电压所得的操作电压 VAA输入 到第一电阻器的一端, 第五电阻器的一端接地, 其中, 第一电阻器和第二电 阻器之间的电压 VAAi分别输入到前 Π/2个运算放大器的电源端, 第二电阻器 和第三电阻器之间的电压 VAA2分别输入到前 n/2个运算放大器的接地端, 第 三电阻器和第四电阻器之间的电压 VAA3分别输入到后 n/2个运算放大器的电 源端, 第四电阻器和第五电阻器之间的电压 VAA4分别输入到后 n 2个运算放 大器的接地端。
第一电阻器和第二电阻器之间的电压 VAAi大于第一运算放大器输出的 像素灰阶参考电压 V。utl, 第二电阻器和第三电阻器之间的电压 VA2 小于第 (n/2-l)运算放大器输出的像素灰阶参考电压 V。ut(n/2 , 第三电阻器和第四电阻 器之间的电压 VAA3大于第 (n/2-l)运算放大器输出的像素灰阶参考电压 VOUT(N/2-1), 第四电阻器和第五电阻器之间的电压 VAA4小于第 n运算放大器输 出的像素灰阶参考电压 V。UTN。
第一电阻器至第五电阻器的电阻值 至 R5 满足等式: VAA/(RI+R2+R3+R4+R5) = VAAI/(R2+R3+R4+R5) = V ^+I^+Rs) =
VAA3/(R4+R5) = VAA4/R5, 根据预定的像素灰阶参考电压 V。utl至 V。utn的值确定 电压 ^1至 VAA4的值, 然后选择第五电阻器的电阻值 R5, 根据所述等式计 算第一电阻器至第四电阻器的电阻值 至 。 附图说明
通过结合附图, 从下面的实施例的描述中, 本发明这些和 /或其它方面及 优点将会变得清楚, 并且更易于理解, 其中:
图 1是示出现有技术的 LCD的驱动系统的一部分的框图;
图 2是示出根据本发明第一实施例的 LCD的驱动系统的 P-Gamma电路 的示意图;
图 3是示出根据本发明第二实施例的 LCD的驱动系统的 P-Gamma电路 的框图。 具体实施方式
以下参照附图来详细描述本发明的实施例。
图 2是示出根据本发明第一实施例的 LCD的驱动系统的 P-Gamma电路 的示意图。
参照图 2, 在本发明的第一实施例中, 引入 LCD的驱动系统的电压转换 器转换基准电压所得的操作电压 VAA的一半 (HVAAM乍为 P-Gamma电路的 OP 的工作电压。
具体地, P-Gamma电路包括第一 DAC至第 n DAC以及第一 OP至第 n OP, n为偶数 (参见图 3)。 每个 DAC连接到相应一个 OP。 每个 OP连接到相 应一个 DAC。 DAC从 LCD的驱动系统的时序控制器接收用于产生像素灰阶 参考电压的数据, 将所述数据转换为模拟信号, OP放大转换的模拟信号作为 像素灰阶参考电压 v。utl、 v。ut2 v。utn。
将 n个 OP分为前 n/2个 OP和后 n/2个 OP两组。下面以 n等于 14为例 描述本发明的第一实施例, 但是本发明不限于此, 可根据需要改变 n的大小。 将 14个 0P分为前 7个 0P和后 7个 0P两组。 弓 I入 LCD的驱动系统的电压 转换器转换基准电压所得的操作电压 VAA的一半 (HVAA:), 操作电压 VAA分别 输入到前 7个 OP的电源端, 操作电压 VAA的一半 HVAA分别输入到前 7个 0P的接地端; 类似地, 操作电压 VAA的一半 HVAA分别输入到后 7个 0P的 电源端, 后 7个 0P的接地端接地 (SP, 电压为 0)。
因此, 跨在 0P上的工作电压就只有根据现有技术的工作电压的一半。 流经 0P的电流由 0P后端所连接的负载决定, 负载不变, 则流经 0P的电流 也不变。 根据功耗 P=VxI, 在理论上各个 0P的功耗就会降低一半, 温度也 会跟着降低, 从而 P— Gamma 电路的功耗降低, 温度也随着降低。
可通过 LCD 的驱动系统的电压转换器直接产生操作电压 VAA的一半 HVAA, 或者可通过两个相同的分压电阻器串联产生操作电压 VAA的一半 HVAAO
图 3是示出根据本发明第二实施例的 LCD的驱动系统的 P-Gamma电路 的示意图。
参照图 3, P-Gamma电路包括第一 DAC至第 n DAC以及第一 OP至第 n OP , n为偶数。 每个 DAC连接到相应一个 OP。 每个 OP连接到相应一个 DAC o第一 DAC至第 n DAC从 LCD的驱动系统的时序控制器接收用于产生 像素灰阶参考电压的数据, 将所述数据转换为模拟信号, 0P放大转换的模拟 信号作为像素灰阶参考电压 v。utl、 v。ut2 v。utn。
将 n个 OP分为前 n/2个 OP和后 n/2个 OP两组。下面以 n等于 14为例 描述本发明的第二实施例, 但是本发明不限于此, 可根据需要改变 n的大小。 因此, 将 14个 0P分为前 7个 0P和后 7个 0P两组。
在本发明的第二实施例中, 引入第一电阻器 至第五电阻器 R5对操作 电压 VAA进行分压。
具体地, 第一电阻器 至第五电阻器 ^彼此串联连接, 操作电压 VAA 输入到第一电阻器 的一端, 第五电阻器 R5的一端接地。
第一电阻器 和第二电阻器 R2之间的电压 VA^分别输入到前 7个 0P 的电源端, 第二电阻器 R2和第三电阻器 R3之间的电压 VAA2分别输入到前 Ί 个 0P的接地端, 第三电阻器 R3和第四电阻器 R4之间的电压 ^3分别输入 到后 7个 0P的电源端, 第四电阻器 R4和第五电阻器 R5之间的电压 VAA4分 别输入到后 7个 0P的接地端。 这样, 前 7个 0P的跨压为
后 7 个 0P的跨压为 VAA3-VAA4, (VAArVAAs)以及 (VAA3-VAA4)均小于 VAA。
各个 OP的工作电压为两个, 一高一低, 0P的输出电压 V。ut需要在 0P 的工作电压之间。 因此,
, VAA2<VOUT7 , VAA3>VOUT8 , VAA4<V。UTL4。 对于 n个 OP的情形, 类似得到
, VAA2<V out(n/2-l), VAA3>V out(n/2+l),
VAA4<Voutn °
根据第一电阻器 至第五电阻器 R5彼此串联连接的关系, 可以得知
VAA/(RI+R2+R3+R4+R5) = VAAI/(R2+R3+R4+R5) = V ^+I^+Rs) =
VAA3/(R4+R5) = VAA4/R5。这里, 还使用 Rl至 R5来表示第一电阻器至第五电阻 器的电阻值。
因此, 可根据需要的各个像素灰阶参考电压 V。UTL、 V。ut2 ¥^14的 值确定 ^1至 VAA4的值, 然后选定第五电阻器的电阻值 R5, 接着可根据上 面的等式依次计算出第一电阻器至第四电阻器的电阻值。
如上所述, 流经 OP的电流由 OP后端所连接的负载决定, 负载不变, 则 流经 OP的电流也不变。根据功耗?= 1, V变小, 则在理论上各个 OP的功 耗就会降低, 温度也会跟着降低, 从而 P— Gamma 电路的功耗降低, 温度也 随着降低。 因此, 可保持 P-Gamma电路的性能且延长 P-Gamma电路的使用 寿命
虽然本发明是参照其示例性的实施例被具体描述和显示的, 但是本领域 的普通技术人员应该理解, 在不脱离由权利要求限定的本发明的精神和范围 的情况下, 可以对其进行形式和细节的各种改变。
Claims
1、 一种液晶显示器的驱动系统的可编程伽马电路, 包括:
第一数模转换器至第 n数模转换器, 从液晶显示器的驱动系统的时序控 制器接收用于产生像素灰阶参考电压的数据,并将所述数据转换为模拟信号; 第一运算放大器至第 n运算放大器,每个运算放大器连接到第一数模转 换器至第 n数模转换器中的相应一个数模转换器, 第一运算放大器至第 n运 算放大器放大转换的模拟信号作为像素灰阶参考电压 V。utl S V。utn, 其中, n 为偶数;
第一电阻器至第五电阻器, 彼此串联连接, 液晶显示器的驱动系统的电 压转换器转换基准电压所得的操作电压 VAA输入到第一电阻器的一端, 第五 电阻器的一端接地,
其中, 第一电阻器和第二电阻器之间的电压 VAAi分别输入到前 Π/2个运 算放大器的电源端, 第二电阻器和第三电阻器之间的电压 VAA2分别输入到前 n/2个运算放大器的接地端, 第三电阻器和第四电阻器之间的电压 VAA3分别 输入到后 n/2个运算放大器的电源端, 第四电阻器和第五电阻器之间的电压 VAA4分别输入到后 n 2个运算放大器的接地端。
3、根据权利要求 1所述的可编程伽马电路, 其中, 第一电阻器至第五电 阻器的电阻值 至 R5满足等式: VAA/(RI+R2+R3+R4+R5) = VAAI/(R2+R3+R4+R5)
= VAA2/(R3+R4+R5) = VAA3/(R4+R5) = VAA4/R5,
根据预定的像素灰阶参考电压 V。utl至 V。utn的值确定电压 VAAi至 VAA4 的值, 然后选择第五电阻器的电阻值 R5, 根据所述等式计算第一电阻器至第 四电阻器的电阻值 至 4。
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| CN104021771B (zh) * | 2014-06-17 | 2017-02-15 | 深圳市华星光电技术有限公司 | 一种可编程伽玛校正缓冲电路芯片及产生伽马电压的方法 |
| CN104240665A (zh) * | 2014-09-16 | 2014-12-24 | 深圳市华星光电技术有限公司 | 一种源极驱动电路及显示装置 |
| CN105139885B (zh) | 2015-07-20 | 2018-01-23 | 深圳市华星光电技术有限公司 | 一种可编程伽马电压输出装置和显示设备 |
| CN106356032B (zh) * | 2016-11-15 | 2019-03-12 | 武汉华星光电技术有限公司 | 伽马校正电路及其操作方法 |
| TWI646516B (zh) * | 2018-01-30 | 2019-01-01 | 瑞鼎科技股份有限公司 | 源極驅動器 |
| CN109509462B (zh) * | 2019-01-21 | 2020-06-30 | 深圳市华星光电半导体显示技术有限公司 | 面板节能模式下亮度调整方法及装置 |
| CN110459183A (zh) * | 2019-06-11 | 2019-11-15 | 惠科股份有限公司 | 一种伽玛电路、驱动电路及显示装置 |
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| CN1954352A (zh) * | 2004-03-17 | 2007-04-25 | 罗姆股份有限公司 | 伽马校正电路、显示屏及具备它们的显示装置 |
| CN102254530A (zh) * | 2011-07-12 | 2011-11-23 | 深圳市华星光电技术有限公司 | 伽马缓冲器输出补偿电路、驱动电路及其阻值设置方法 |
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| CN102254530A (zh) * | 2011-07-12 | 2011-11-23 | 深圳市华星光电技术有限公司 | 伽马缓冲器输出补偿电路、驱动电路及其阻值设置方法 |
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