WO2014061204A1 - Semiconductor device and method for manufacturing same - Google Patents

Semiconductor device and method for manufacturing same Download PDF

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Publication number
WO2014061204A1
WO2014061204A1 PCT/JP2013/005665 JP2013005665W WO2014061204A1 WO 2014061204 A1 WO2014061204 A1 WO 2014061204A1 JP 2013005665 W JP2013005665 W JP 2013005665W WO 2014061204 A1 WO2014061204 A1 WO 2014061204A1
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WIPO (PCT)
Prior art keywords
semiconductor chip
lead
conductive adhesive
semiconductor device
convex portions
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PCT/JP2013/005665
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French (fr)
Japanese (ja)
Inventor
雄一 近藤
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株式会社デンソー
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Publication of WO2014061204A1 publication Critical patent/WO2014061204A1/en

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Definitions

  • the present disclosure relates to a semiconductor device in which a semiconductor chip and a lead are mechanically and electrically connected by a conductive adhesive and a method for manufacturing the same.
  • Patent Document 1 a conductive adhesive in which a metal powder, an adhesive resin, and a spacer made of resin beads are blended has been proposed.
  • the conductive adhesive is used to electrically connect the main member on which the electronic circuit is formed and the support member on which the wiring is formed.
  • the thickness of the conductive adhesive is set to a predetermined thickness by the spacer blended in the conductive adhesive.
  • the conductive adhesive has fluidity, the number of spacers arranged in the direction in which the main member and the support member face each other varies. In extreme terms, there are regions where spacers are stacked and regions where spacers are not stacked. As a result, the film thickness of the conductive adhesive may vary.
  • the thickness of the conductive adhesive varies, when thermal stress is generated due to the difference in coefficient of linear expansion between the main member and the support member and the conductive adhesive, the thermal stress locally increases. A site occurs between them. In other words, stress concentration occurs. For this reason, the conductive adhesive is peeled off from the main member and the support member, and mechanical and electrical connection failure occurs between the main member and the support member.
  • An object of the present disclosure is to provide a semiconductor device in which occurrence of poor mechanical and electrical connection is suppressed by suppressing occurrence of variation in the thickness of the conductive adhesive, and a manufacturing method thereof. .
  • a semiconductor device includes a semiconductor chip, a lead, a conductive adhesive that mechanically and electrically connects the semiconductor chip and the lead, and a plurality of convex portions.
  • the plurality of protrusions are formed on at least one of a surface of the semiconductor chip facing the lead and a surface of the lead facing the semiconductor chip, and extends from one facing surface to the other facing surface.
  • the ends of the plurality of protrusions are in contact with the opposing surfaces of the semiconductor chip and the leads, respectively, and the intervals between the semiconductor chip and the leads are determined by the plurality of protrusions. .
  • variations in the thickness of the conductive adhesive can be suppressed, and mechanical and electrical connection failures between the semiconductor chip and the leads can be suppressed.
  • the semiconductor device can be manufactured, for example, by the following method.
  • the plurality of convex portions are formed on at least one of the facing surface of the semiconductor chip and the facing surface of the lead.
  • the conductive adhesive in a liquid state is applied to at least one of the opposing surface of the semiconductor chip and the opposing surface of the lead.
  • the liquid state conductive adhesive adheres to both the opposing surface of the semiconductor chip and the opposing surface of the lead, and the tips of the plurality of convex portions are opposing surfaces of the semiconductor chip.
  • the semiconductor chip and the lead are opposed to each other so as to contact at least one of the opposing surfaces of the lead, and the conductive adhesive in a liquid state is cured, whereby the semiconductor chip and the lead are electrically conductive. And mechanically and electrically connected through the adhesive.
  • the plurality of convex portions are formed on at least one of the opposing surfaces of the semiconductor chip and the lead. Therefore, the distribution and shape of the plurality of protrusions that define the thickness of the conductive adhesive can be visually recognized in the manufacturing process of the semiconductor device. Thereby, the quality of the plurality of convex portions can be easily evaluated. As described above, the variation in the thickness of the conductive adhesive is suppressed due to the quality variation of the plurality of convex portions.
  • FIG. 1 is a cross-sectional view showing the semiconductor device according to the first embodiment.
  • FIG. 2 is an enlarged cross-sectional view showing a main part of the semiconductor device shown in FIG.
  • FIG. 3 is a top view of the main part shown in FIG.
  • FIG. 4 is a cross-sectional view for explaining the forming process.
  • FIG. 5 is a cross-sectional view for explaining the coating process.
  • FIG. 6 is a cross-sectional view for explaining the connection process.
  • FIG. 7 is a cross-sectional view showing a modification of the main part of the semiconductor device.
  • FIG. 8 is a cross-sectional view showing a modification of the main part of the semiconductor device.
  • FIG. 9 is a cross-sectional view showing a modification of the main part of the semiconductor device.
  • FIG. 10 is a cross-sectional view showing a modification of the main part of the semiconductor device.
  • FIG. 11 is a cross-sectional view showing a modification of the main part of the semiconductor device.
  • FIG. 12 is a cross-sectional view for explaining a modification of the forming process.
  • FIG. 13 is a cross-sectional view for explaining a modification of the coating process.
  • FIG. 14 is a cross-sectional view for explaining a modified example of the connecting step.
  • FIG. 15 is a cross-sectional view for explaining a modification of the forming process.
  • FIG. 16 is a cross-sectional view for explaining a modified example of the connecting step.
  • the semiconductor device 100 includes a semiconductor chip 10, a lead 20, a conductive adhesive 30, and a protrusion 40 as main parts.
  • the semiconductor device 100 according to this embodiment includes a housing 50, a wire 60, and a coating resin 70 in addition to the main part described above.
  • the semiconductor chip 10 is mechanically and electrically connected to the lead 20 via a conductive adhesive 30, and a part of the lead 20 is insert-molded in the housing 50.
  • the semiconductor chip 10 is electrically connected to the lead 20 via the wire 60, and the semiconductor chip 10, the conductive adhesive 30, and the wire 60 are covered and protected by the coating resin 70.
  • the feature of the semiconductor device 100 is a convex portion 40 disposed between the semiconductor chip 10 and the lead 20, and this convex portion 40 causes the gap between the semiconductor chip 10 and the lead 20 as shown in FIG. 2.
  • the thickness of the provided conductive adhesive 30 is constant in the z direction.
  • the semiconductor chip 10 is obtained by forming an electronic element 12 on a semiconductor substrate 11.
  • the semiconductor substrate 11 according to the present embodiment is a silicon substrate, and the electronic element 12 is an LED.
  • the electronic element 12 is formed on the surface layer of the surface 11a of the semiconductor substrate 11, and the pad 13 for connecting to the wire 60 is formed on the surface 11a.
  • a conductive adhesive 30 is attached to the back surface 11 b of the front surface 11 a, and the semiconductor chip 10 is mechanically and electrically connected to the lead 20 through the conductive adhesive 30.
  • the semiconductor chip 10 has a configuration in which current flows between the front surface 11a and the back surface 11b, and the light emission amount of the electronic element 12 is adjusted by adjusting the current amount in the thickness direction of the semiconductor chip 10.
  • each of the front surface 11a and the back surface 11b is along an xy plane defined by the x direction and the y direction, and is orthogonal to the z direction.
  • the lead 20 is a part of a lead frame made of a metal such as Cu or Al, and the surface thereof is plated.
  • a plurality of leads 20 are insert-molded in the housing 50, and both end portions thereof are exposed from the housing 50. As shown in FIG. 1, one end of the lead 20 is exposed to the outside, and the other end is covered with a coating resin 70.
  • the semiconductor chip 10 is mechanically and electrically connected to one other end of the plurality of leads 20 via a conductive adhesive 30.
  • the semiconductor chip 10 is electrically connected via a wire 60 to a lead 20 different from the lead 20 to which the semiconductor chip 10 is connected. As a result, the semiconductor chip 10 can be electrically connected to the outside via the lead 20, the conductive adhesive 30, and the wire 60. As shown in FIG.
  • the upper surface 20a of the lead 20 to which the semiconductor chip 10 is mechanically and electrically connected via the conductive adhesive 30 is the same as the front surface 11a and the back surface 11b, respectively.
  • the y plane it is orthogonal to the z direction.
  • the conductive adhesive 30 is formed by curing a silver paste. As shown in FIG. 2, the conductive adhesive 30 is provided between the back surface 11 b of the semiconductor substrate 11 and the top surface 20 a of the lead 20. The conductive adhesive 30 mechanically and electrically connects the semiconductor chip 10 and the lead 20 by contacting the back surface 11b of the semiconductor substrate 11 (semiconductor chip 10) and the top surface 20a of the lead 20. .
  • the back surface 11 b corresponds to a surface facing the lead 20 in the semiconductor chip 10
  • the top surface 20 a corresponds to a surface facing the semiconductor chip 10 in the lead 20.
  • the convex portion 40 is located between the back surface 11b and the top surface 20a, and by defining the distance between the back surface 11b and the top surface 20a, the thickness of the conductive adhesive 30 that contacts the back surface 11b and the top surface 20a, respectively. It prescribes.
  • a plurality of convex portions 40 according to the present embodiment are formed on the upper surface 20a of the lead 20, extend from the upper surface 20a to the back surface 11b, and a tip portion thereof is in contact with the back surface 11b.
  • the plurality of convex portions 40 have the same length in the z direction, and the back surface 11b and the top surface 20a are along the xy plane.
  • the distance between the opposing surfaces of the back surface 11b and the top surface 20a in the z direction is constant by the plurality of convex portions 40.
  • the thickness of the conductive adhesive 30 provided between the back surface 11b and the top surface 20a and contacting the back surface 11b and the top surface 20a is constant.
  • the four convex portions 40 are formed on the lead 20, and the end portions of the four convex portions 40 are in contact with the corners of the back surface 11 b of the semiconductor chip 10. . As shown in FIG. 2, the side surfaces of all the convex portions 40 are covered with the conductive adhesive 30.
  • the convex portion 40 is made of a material softer (lower Young's modulus) than the conductive adhesive 30 in the cured state. Specifically, it is made of a UV curable resin that is cured by irradiation with ultraviolet rays.
  • a UV curable resin an ultraviolet curable epoxy resin, an ultraviolet curable silicone resin, or the like can be employed.
  • the housing 50 is for mounting the semiconductor chip 10.
  • the housing 50 is made of a resin having a property of reflecting light emitted from the electronic element 12 of the semiconductor chip 10.
  • the housing 50 is made of polyphthalamide (PPA) and is white.
  • the housing 50 includes a pedestal 51 having a rectangular cross-sectional shape, and a cylindrical portion 52 having an inner space and openings at both ends thereof.
  • the edge of the opening is fixed to one surface of the pedestal 51 in such a manner that one opening of the cylinder 52 is closed.
  • the semiconductor chip 10 is provided on one surface of the pedestal 51 surrounded by the inner wall surface of the cylindrical portion 52. Further, the distance between the inner wall surfaces of the cylindrical portion 52 in the xy plane increases as the distance from the pedestal 51 increases, and the other opening farther from the pedestal 51 than the one opening blocked by the pedestal 51 is provided.
  • the section has a larger opening cross-sectional area. With this configuration, a part of the light emitted from the electronic element 12 is reflected by the inner wall surface of the cylindrical portion 52 and is emitted to the outside through the opening.
  • the wire 60 is for electrically connecting the lead 20 and the semiconductor chip 10. As shown in FIG. 1, one end of the wire 60 is connected to the lead 20, and the other end is connected to the pad 13 of the semiconductor chip 10.
  • the covering resin 70 covers and protects the semiconductor chip 10, the wire 60, and the electrical connection portion between the semiconductor chip 10 and the lead 20, and is filled in the inner space of the cylindrical portion 52.
  • the coating resin 70 is made of a resin having a property of transmitting light emitted from the electronic element 12 of the semiconductor chip 10.
  • the coating resin 70 is made of an epoxy resin and is transparent.
  • the lead 20 is prepared.
  • a UV curable resin which is a material for forming the convex portion 40, is applied to the upper surface 20 a of the lead 20.
  • the UV curable resin is cured by irradiating ultraviolet rays, and the convex portion 40 is formed.
  • the application of the UV curable resin to the upper surface 20a is performed by well-known and publicly used ink jet printing or dispensing.
  • a conductive adhesive 30 in a liquid state that is, a silver paste is applied to the upper surface 20a.
  • a silver paste is applied to the upper surface 20a so that the convex portions 40 are covered.
  • the conductive adhesive 30 does not include a spacer that defines the distance between the semiconductor chip 10 and the lead 20 and defines the thickness of the conductive adhesive 30.
  • the semiconductor chip 10 is placed on the convex portion 40 and the silver paste so that the silver paste adheres to the back surface 11b of the semiconductor substrate 11 and the tip of the convex portion 40 contacts the back surface 11b. Deploy. Thereafter, the silver paste is cured by volatilizing the solvent contained in the silver paste, and the conductive adhesive 30 is formed. Thereby, the semiconductor chip 10 and the lead 20 are mechanically and electrically connected via the conductive adhesive 30. The above is the connection process. Through the above steps, the main part of the semiconductor device 100 is manufactured.
  • the protrusions 40 that define the distance between the semiconductor chip 10 and the leads 20 are formed on the leads 20.
  • the conductive adhesive includes a spacer that defines the thickness of the conductive adhesive
  • the fluidity of the conductive adhesive 30 in the liquid state in the connection process. Therefore, the distribution and shape of the member (convex portion 40) that defines the thickness of the conductive adhesive 30 are suppressed from changing. For this reason, variation in the thickness (film thickness) of the conductive adhesive 30 is suppressed.
  • a convex portion 40 is formed on the lead 20. Therefore, unlike the configuration in which the conductive adhesive includes a spacer that defines the thickness of the conductive adhesive, the distribution and shape of the members (projections 40) that define the thickness of the conductive adhesive 30 are different. It can be visually recognized in the forming process. Thereby, the quality of the convex part 40 can be evaluated easily. As described above, the variation in the thickness of the conductive adhesive 30 due to the variation in the quality of the protrusions 40 is suppressed.
  • the semiconductor device 100 As described above, according to the semiconductor device 100 according to the present embodiment, variation in the thickness of the conductive adhesive 30 is suppressed. Therefore, when a thermal stress is generated due to a difference in coefficient of linear expansion between each of the semiconductor chip 10 and the lead 20 and the conductive adhesive 30, a portion where the thermal stress is locally increased may be generated between the two. It is suppressed. In other words, the occurrence of stress concentration is suppressed. For this reason, the conductive adhesive 30 is prevented from being peeled off from the semiconductor chip 10 and the lead 20 due to the stress concentration of thermal stress, and mechanical and electrical connection failure occurs between the semiconductor chip 10 and the lead 20. Is suppressed.
  • the end of the convex portion 40 formed on the lead 20 is in contact with the back surface 11b and the top surface 20a. Therefore, the number of convex portions 40 arranged in the z direction, which is the direction in which the semiconductor chip 10 and the lead 20 face each other, is one. According to this, unlike the configuration in which spacers are included in the conductive adhesive, the number of spacers arranged in the z direction is constant, and the facing distance between the semiconductor chip 10 and the leads 20 in the z direction is constant. Therefore, it is not necessary to apply a force for approaching at least one of the semiconductor chip 10 and the lead 20 to both.
  • the side surface of the convex portion 40 is covered with the conductive adhesive 30. According to this, the contact area of the conductive adhesive 30 is increased as compared with the configuration in which the side surface of the convex portion is not in contact with the conductive adhesive. Further, unlike the configuration in which the side surface of the convex portion is not covered with the conductive adhesive, an anchor effect occurs. Therefore, the mechanical connection strength between the semiconductor chip 10 and the lead 20 is improved, and the occurrence of poor mechanical and electrical connection in both is suppressed.
  • the convex portion 40 is softer than the conductive adhesive 30 in the cured state. According to this, unlike the structure in which the convex portion is harder than the conductive adhesive in the cured state, the thermal stress caused by the difference in the linear expansion coefficient between the convex portion 40 and the conductive adhesive 30 is Even if it occurs in the meantime, since the convex portion 40 is deformed by the thermal stress, the strength of the thermal stress applied to the conductive adhesive 30 is relaxed. Therefore, peeling of the conductive adhesive 30 from the semiconductor chip 10 and the lead 20 is suppressed, and mechanical and electrical connection failures between the semiconductor chip 10 and the lead 20 are suppressed.
  • the convex portion 40 is made of a UV curable resin. According to this, the resin in the liquid state can be cured faster than the configuration in which the convex portion is made of the thermosetting resin. Therefore, the convex part 40 can be formed reflecting the shape of the resin in the liquid state, and the convex part 40 is prevented from becoming unstable. Thereby, variation in the quality of the convex part 40 is suppressed, and variation in the thickness of the conductive adhesive 30 is suppressed. Therefore, the conductive adhesive 30 is prevented from being peeled off from the semiconductor chip 10 and the lead 20 due to the stress concentration of the thermal stress, and mechanical and electrical connection failures occur between the semiconductor chip 10 and the lead 20. It is suppressed.
  • the semiconductor chip 10 is covered and protected by the covering resin 70. Therefore, thermal stress due to the difference in linear expansion coefficient between the semiconductor chip 10 and the coating resin 70 is applied to the semiconductor chip 10.
  • variation in the thickness of the conductive adhesive 30 is suppressed, and the mechanical bonding between the semiconductor chip 10 and the lead 20 by the conductive adhesive 30 is suppressed. Connection strength has been improved. Therefore, it is possible to suppress mechanical and electrical connection failures between the semiconductor chip 10 and the leads 20 due to the thermal stress resulting from the difference in linear expansion coefficient between the semiconductor chip 10 and the coating resin 70 described above.
  • the semiconductor device 100 is the main part, the semiconductor chip 10, the lead 20, the conductive adhesive 30, the convex part 40, the housing 50, the wire 60, and the coating resin 70.
  • the semiconductor device 100 may not include the housing 50, the wire 60, and the coating resin 70.
  • the semiconductor chip 10 has been described as an example in which a current flows between the front surface 11a and the back surface 11b.
  • the current flowing through the semiconductor chip 10 may be the front surface 11a or the back surface 11b.
  • a configuration in which two electrically independent leads 20 are electrically connected via the semiconductor chip 10 may be employed.
  • the example in which the convex portion 40 is formed on the upper surface 20a of the lead 20 is shown.
  • a configuration in which the convex portion 40 is formed on the back surface 11 b of the semiconductor chip 10 can be adopted.
  • the structure formed in both the upper surface 20a and the back surface 11b is also employable.
  • the convex portion 40 is formed on the upper surface 20a of the lead 20 in the forming step.
  • the protrusion 40 may be formed on the back surface 11 b of the semiconductor substrate 11 in the forming step.
  • the convex portion 40 may be formed of a resist film using a known exposure technique.
  • a liquid conductive adhesive 30 (silver paste) is applied to the upper surface 20 a of the lead 20 in the application process.
  • the semiconductor chip 10 is installed on a silver paste so that a silver paste may adhere to the back surface 11b, and the front-end
  • the silver paste is cured by volatilizing the solvent contained in the silver paste, and the conductive adhesive 30 is formed. Thereby, the main part of the semiconductor device 100 shown in FIG. 10 is manufactured.
  • the electronic element 12 is an LED
  • the electronic element 12 is not limited to the above example, and, for example, a photodiode can be employed.
  • the conductive adhesive 30 may be any adhesive that mechanically and electrically connects the semiconductor chip 10 and the lead 20 and is not limited to the above example.
  • the conductive adhesive 30 may be formed by curing C paste or Cu paste.
  • the number of convex portions 40 is not limited to the above example. In the connection process, the number of the semiconductor chips 10 and the leads 20 may be stably supported. The number of convex portions 40 is preferably three or more.
  • the arrangement of the convex portions 40 is not limited to the above example. Any arrangement that stably supports the semiconductor chip 10 and the leads 20 in the connection step may be used. For example, it is possible to adopt a configuration in which a regular polygon is formed by a line connecting the vertices of the convex portions 40 by arranging three or more at equal intervals around the center of gravity of the semiconductor chip 10.
  • the linear expansion coefficient between the convex portion 40 and the conductive adhesive 30 is preferably the same. According to this, unlike the configuration in which the convex portion and the conductive adhesive have different linear expansion coefficients, the thermal stress caused by the difference in the linear expansion coefficient is between the convex portion 40 and the conductive adhesive 30. Occurrence is suppressed. Therefore, peeling of the conductive adhesive 30 from the semiconductor chip 10 and the lead 20 is suppressed, and mechanical and electrical connection failures between the semiconductor chip 10 and the lead 20 are suppressed.
  • the size of the semiconductor chip 10 (the size of the xy plane) and the height of the convex portion 40 (the length in the z direction) are not particularly mentioned.
  • the size of the semiconductor chip 10 may be 200 ⁇ m ⁇ 200 ⁇ m, 250 ⁇ m ⁇ 150 ⁇ m, or 250 ⁇ m ⁇ 250 ⁇ m.
  • the height of the convex portion 40 can be 2 ⁇ m to 100 ⁇ m.
  • UV curable resin is adopted as the forming material of the convex portion 40 and ink jet printing is adopted as the forming method, the height and width of the convex portion 40 are determined after the UV curable resin is printed on the lead 20 or the semiconductor chip 10.
  • the time until the printed UV curable resin is irradiated with UV (the time when the printed UV curable resin flows and the height gradually decreases) is determined.
  • the convex part 40 having a height of 20 ⁇ m and a diameter of 5 to 10 ⁇ m can be formed.
  • the adjacent distance of the convex portion 40 is determined according to the size of the semiconductor chip 10 and the lead 20. For example, when 200 ⁇ m ⁇ 200 ⁇ m is adopted as the size of the semiconductor chip 10, the adjacent distance between the convex portions 40 is approximately 150 ⁇ m.
  • the convex portion 40 is made of a UV curable resin
  • the protrusions 40 may be formed of the material for forming the leads 20 by projecting a part of the leads 20 toward the semiconductor chip 10.
  • the number of parts of the semiconductor device 100 is reduced and the manufacturing process is simplified as compared with the configuration in which the leads 20 and the protrusions 40 are made of different materials. The As a result, the manufacturing cost is reduced.
  • the convex portion 40 In order to form the convex portion 40 by projecting a part of the lead 20, it is possible to provide irregularities at predetermined positions of the lead frame forming punch and die. Further, the formation of irregularities on the punch or die is performed by a known technique such as a machining center or an end mill electric discharge machining when the height of the convex portion 40 is 2 ⁇ m to 100 ⁇ m.
  • the projecting portion 40 may be formed only at the mounting portion of the semiconductor chip 10 on the lead 20, or may be other than the mounting portion of the semiconductor chip 10. It may be adopted.
  • the convex portion 40 is formed only on the mounting portion of the semiconductor chip 10 in the lead 20, the light irradiated from the electronic element 12 formed on the semiconductor chip 10 is suppressed from being irregularly reflected by the convex portion 40.
  • the convex portion 40 is formed in each of the mounting portion of the semiconductor chip 10 and the other portion of the lead 20, a member different from the semiconductor chip 10 is bonded and fixed to the lead 20 via the conductive adhesive 30.
  • the convex portion 40 suppresses variations in the thickness of the conductive adhesive 30 between the member and the lead 20. Therefore, when a thermal stress is generated due to a difference in linear expansion coefficient between the lead 20 and each of the above-described members and the conductive adhesive 30, a portion where the thermal stress is locally increased may be generated between the two. It is suppressed. In other words, the occurrence of stress concentration is suppressed. For this reason, due to the stress concentration of thermal stress, the conductive adhesive 30 is prevented from peeling off from the lead 20 and the above-described members, and mechanical and electrical connection failures are suppressed from occurring in both.

Abstract

This semiconductor device has: a semiconductor chip (10); a lead (20); a conductive adhesive (30) that mechanically and electrically connects the semiconductor chip and the lead to each other; and a plurality of protruding sections (40). The protruding sections are formed on a facing surface (11b) of the semiconductor chip, said facing surface facing the lead, and/or on a facing surface (20a) of the lead, said facing surface facing the semiconductor chip, and the protruding sections extend from one facing surface to the other facing surface. End portions of each of the protruding sections are in contact with the facing surface of the semiconductor chip and the facing surface of the lead, respectively, and an interval between the semiconductor chip and the lead is specified by means of the protruding sections.

Description

半導体装置およびその製造方法Semiconductor device and manufacturing method thereof 関連出願の相互参照Cross-reference of related applications
　本開示は、２０１２年１０月１８日に出願された日本出願番号２０１２－２３０９７３号および２０１３年５月８日に出願された日本出願番号２０１３－９８７２８号に基づくもので、ここにその記載内容を援用する。 The present disclosure is based on Japanese Application No. 2012-230973 filed on October 18, 2012 and Japanese Application No. 2013-98728 filed on May 8, 2013. Incorporate.
　本開示は、半導体チップとリードとが導電性接着剤によって機械的及び電気的に接続された半導体装置及びその製造方法に関するものである。 The present disclosure relates to a semiconductor device in which a semiconductor chip and a lead are mechanically and electrically connected by a conductive adhesive and a method for manufacturing the same.
　従来、例えば特許文献１に示されるように、金属粉末と、接着用樹脂と、樹脂ビーズよりなるスペーサとが配合された導電性接着剤が提案されている。この導電性接着剤を用いて電子回路が形成された主要部材と配線が形成された支持部材との間を電気的に接続している。この場合、導電性接着剤に配合されたスペーサにより当該導電性接着剤の膜厚を所定膜厚としている。 Conventionally, as shown in Patent Document 1, for example, a conductive adhesive in which a metal powder, an adhesive resin, and a spacer made of resin beads are blended has been proposed. The conductive adhesive is used to electrically connect the main member on which the electronic circuit is formed and the support member on which the wiring is formed. In this case, the thickness of the conductive adhesive is set to a predetermined thickness by the spacer blended in the conductive adhesive.
　しかしながら、導電性接着剤は流動性を有するので、主要部材と支持部材とが対向する方向に配置されるスペーサの数にばらつきが生じる。極端に言えば、スペーサが積層される領域と積層されない領域とが生じる。この結果、導電性接着剤の膜厚にばらつきが生じる虞がある。 However, since the conductive adhesive has fluidity, the number of spacers arranged in the direction in which the main member and the support member face each other varies. In extreme terms, there are regions where spacers are stacked and regions where spacers are not stacked. As a result, the film thickness of the conductive adhesive may vary.
　導電性接着剤の厚さにばらつきが生じると、主要部材及び支持部材それぞれと導電性接着剤との線膨張係数の差に起因する熱応力が発生した際に、その熱応力が局所的に強まる部位が両者の間に生じる。換言すれば、応力集中が生じる。このため、導電性接着剤が、主要部材と支持部材から剥がれ、主要部材と支持部材に機械的及び電気的な接続不良が生じる。 When the thickness of the conductive adhesive varies, when thermal stress is generated due to the difference in coefficient of linear expansion between the main member and the support member and the conductive adhesive, the thermal stress locally increases. A site occurs between them. In other words, stress concentration occurs. For this reason, the conductive adhesive is peeled off from the main member and the support member, and mechanical and electrical connection failure occurs between the main member and the support member.
特開平１１－１５８４４８号公報Japanese Patent Laid-Open No. 11-158448
　本開示は、導電性接着剤の厚さにばらつきが生じることを抑制することで、機械的及び電気的な接続不良の発生が抑制された半導体装置及びその製造方法を提供することを目的とする。 An object of the present disclosure is to provide a semiconductor device in which occurrence of poor mechanical and electrical connection is suppressed by suppressing occurrence of variation in the thickness of the conductive adhesive, and a manufacturing method thereof. .
　本開示の一態様に係る半導体装置は、半導体チップと、リードと、前記半導体チップと前記リードとを機械的及び電気的に接続する導電性接着剤と、複数の凸部とを有する。前記複数の凸部は、前記半導体チップにおける前記リードとの対向面、及び、前記リードにおける前記半導体チップとの対向面の少なくとも一方に形成され、一方の対向面から他方の対向面に延びる。前記複数の凸部の端部それぞれが、前記半導体チップと前記リードそれぞれの対向面に接触しており、前記複数の凸部によって、前記半導体チップと前記リードとの間の間隔が定められている。 A semiconductor device according to one embodiment of the present disclosure includes a semiconductor chip, a lead, a conductive adhesive that mechanically and electrically connects the semiconductor chip and the lead, and a plurality of convex portions. The plurality of protrusions are formed on at least one of a surface of the semiconductor chip facing the lead and a surface of the lead facing the semiconductor chip, and extends from one facing surface to the other facing surface. The ends of the plurality of protrusions are in contact with the opposing surfaces of the semiconductor chip and the leads, respectively, and the intervals between the semiconductor chip and the leads are determined by the plurality of protrusions. .
　前記半導体装置では、前記導電性接着剤の厚さにばらつきが生じることを抑制することができ、前記半導体チップと前記リードに機械的及び電気的な接続不良が生じることを抑制することができる。 In the semiconductor device, variations in the thickness of the conductive adhesive can be suppressed, and mechanical and electrical connection failures between the semiconductor chip and the leads can be suppressed.
　前記半導体装置は、例えば、以下の方法で製造することができる。まず、前記半導体チップの対向面及び前記リードの対向面の少なくとも一方に前記複数の凸部を形成する。前記複数の凸部の形成後、前記半導体チップの対向面及び前記リードの対向面の少なくとも一方に液体状態の前記導電性接着剤を塗布する。前記導電性接着剤の塗布後、液体状態の前記導電性接着剤が前記半導体チップの対向面及び前記リードの対向面の両方に付着し、前記複数の凸部の先端が前記半導体チップの対向面及び前記リードの対向面の少なくとも一方に接触するように、前記半導体チップと前記リードとを対向させ、液体状態の前記導電性接着剤を硬化させることで、前記半導体チップと前記リードとを前記導電性接着剤を介して機械的及び電気的に接続する。 The semiconductor device can be manufactured, for example, by the following method. First, the plurality of convex portions are formed on at least one of the facing surface of the semiconductor chip and the facing surface of the lead. After forming the plurality of convex portions, the conductive adhesive in a liquid state is applied to at least one of the opposing surface of the semiconductor chip and the opposing surface of the lead. After the application of the conductive adhesive, the liquid state conductive adhesive adheres to both the opposing surface of the semiconductor chip and the opposing surface of the lead, and the tips of the plurality of convex portions are opposing surfaces of the semiconductor chip. And the semiconductor chip and the lead are opposed to each other so as to contact at least one of the opposing surfaces of the lead, and the conductive adhesive in a liquid state is cured, whereby the semiconductor chip and the lead are electrically conductive. And mechanically and electrically connected through the adhesive.
　前記製造方法では、前記複数の凸部が、前記半導体チップ及び前記リードの対向面の少なくとも一方に形成されている。そのため、前記導電性接着剤の厚さを規定する前記複数の凸部の分布や形状を、前記半導体装置の製造工程にて視認できる。これにより、前記複数の凸部の品質を容易に評価することができる。以上により、前記複数の凸部の品質ばらつきのために、導電性接着剤の厚さにばらつきが生じることが抑制される。 In the manufacturing method, the plurality of convex portions are formed on at least one of the opposing surfaces of the semiconductor chip and the lead. Therefore, the distribution and shape of the plurality of protrusions that define the thickness of the conductive adhesive can be visually recognized in the manufacturing process of the semiconductor device. Thereby, the quality of the plurality of convex portions can be easily evaluated. As described above, the variation in the thickness of the conductive adhesive is suppressed due to the quality variation of the plurality of convex portions.
　本開示における上記あるいは他の目的、構成、利点は、下記の図面を参照しながら、以下の詳細説明から、より明白となる。図面において、
図１は、第１実施形態に係る半導体装置を示す断面図である。 図２は、図１に示す半導体装置の主要部を示す拡大断面図である。 図３は、図２に示す主要部の上面図である。 図４は、形成工程を説明するための断面図である。 図５は、塗布工程を説明するための断面図である。 図６は、接続工程を説明するための断面図である。 図７は、半導体装置の主要部の変形例を示す断面図である。 図８は、半導体装置の主要部の変形例を示す断面図である。 図９は、半導体装置の主要部の変形例を示す断面図である。 図１０は、半導体装置の主要部の変形例を示す断面図である。 図１１は、半導体装置の主要部の変形例を示す断面図である。 図１２は、形成工程の変形例を説明するための断面図である。 図１３は、塗布工程の変形例を説明するための断面図である。 図１４は、接続工程の変形例を説明するための断面図である。 図１５は、形成工程の変形例を説明するための断面図である。 図１６は、接続工程の変形例を説明するための断面図である。 The above and other objects, configurations, and advantages of the present disclosure will become more apparent from the following detailed description with reference to the following drawings. In the drawing
FIG. 1 is a cross-sectional view showing the semiconductor device according to the first embodiment. FIG. 2 is an enlarged cross-sectional view showing a main part of the semiconductor device shown in FIG. FIG. 3 is a top view of the main part shown in FIG. FIG. 4 is a cross-sectional view for explaining the forming process. FIG. 5 is a cross-sectional view for explaining the coating process. FIG. 6 is a cross-sectional view for explaining the connection process. FIG. 7 is a cross-sectional view showing a modification of the main part of the semiconductor device. FIG. 8 is a cross-sectional view showing a modification of the main part of the semiconductor device. FIG. 9 is a cross-sectional view showing a modification of the main part of the semiconductor device. FIG. 10 is a cross-sectional view showing a modification of the main part of the semiconductor device. FIG. 11 is a cross-sectional view showing a modification of the main part of the semiconductor device. FIG. 12 is a cross-sectional view for explaining a modification of the forming process. FIG. 13 is a cross-sectional view for explaining a modification of the coating process. FIG. 14 is a cross-sectional view for explaining a modified example of the connecting step. FIG. 15 is a cross-sectional view for explaining a modification of the forming process. FIG. 16 is a cross-sectional view for explaining a modified example of the connecting step.
　以下、本開示の実施の形態を図に基づいて説明する。
（第１実施形態）
　図１～図６に基づいて、本実施形態に係る半導体装置を説明する。なお、図２、図３、及び、図６においては、便宜上、後述するパッド１３とワイヤ６０を省略している。また、以下においては、互いに直交の関係にある３方向をｘ方向、ｙ方向、及び、ｚ方向と示す。 Hereinafter, embodiments of the present disclosure will be described with reference to the drawings.
(First embodiment)
The semiconductor device according to the present embodiment will be described with reference to FIGS. 2, 3, and 6, a pad 13 and a wire 60 described later are omitted for convenience. In the following, the three directions that are orthogonal to each other are referred to as an x direction, a y direction, and a z direction.
　図１～図３に示すように、半導体装置１００は、主要部として、半導体チップ１０と、リード２０と、導電性接着剤３０と、凸部４０と、を有する。また、本実施形態に係る半導体装置１００は、上記した主要部の他に、ハウジング５０と、ワイヤ６０と、被覆樹脂７０と、を有する。図１に示すように、半導体チップ１０が、導電性接着剤３０を介してリード２０と機械的及び電気的に接続されており、リード２０の一部が、ハウジング５０にインサート成形されている。そして、半導体チップ１０が、ワイヤ６０を介してリード２０と電気的に接続されており、半導体チップ１０、導電性接着剤３０、ワイヤ６０それぞれが、被覆樹脂７０によって被覆保護されている。半導体装置１００の特徴点は、半導体チップ１０とリード２０との間に配置された凸部４０であり、この凸部４０によって、図２に示すように、半導体チップ１０とリード２０との間に設けられた導電性接着剤３０の厚さが、ｚ方向で一定となっている。以下、半導体装置１００について詳説する。 As shown in FIGS. 1 to 3, the semiconductor device 100 includes a semiconductor chip 10, a lead 20, a conductive adhesive 30, and a protrusion 40 as main parts. The semiconductor device 100 according to this embodiment includes a housing 50, a wire 60, and a coating resin 70 in addition to the main part described above. As shown in FIG. 1, the semiconductor chip 10 is mechanically and electrically connected to the lead 20 via a conductive adhesive 30, and a part of the lead 20 is insert-molded in the housing 50. The semiconductor chip 10 is electrically connected to the lead 20 via the wire 60, and the semiconductor chip 10, the conductive adhesive 30, and the wire 60 are covered and protected by the coating resin 70. The feature of the semiconductor device 100 is a convex portion 40 disposed between the semiconductor chip 10 and the lead 20, and this convex portion 40 causes the gap between the semiconductor chip 10 and the lead 20 as shown in FIG. 2. The thickness of the provided conductive adhesive 30 is constant in the z direction. Hereinafter, the semiconductor device 100 will be described in detail.
　半導体チップ１０は、半導体基板１１に電子素子１２が形成されたものである。本実施形態に係る半導体基板１１は、シリコン基板であり、電子素子１２は、ＬＥＤである。図２に示すように、半導体基板１１の表面１１ａの表層に電子素子１２が形成されており、表面１１ａにワイヤ６０と接続するためのパッド１３が形成されている。そして、表面１１ａの裏面１１ｂに、導電性接着剤３０が付着しており、この導電性接着剤３０を介して、半導体チップ１０がリード２０に機械的及び電気的に接続されている。半導体チップ１０は、表面１１ａと裏面１１ｂの間を電流が流れる構成となっており、この半導体チップ１０の厚さ方向の電流量を調整することで、電子素子１２の発光量が調整される。なお、図２に示すように、表面１１ａと裏面１１ｂそれぞれは、ｘ方向とｙ方向とによって規定されるｘ－ｙ平面に沿っており、ｚ方向に直交している。 The semiconductor chip 10 is obtained by forming an electronic element 12 on a semiconductor substrate 11. The semiconductor substrate 11 according to the present embodiment is a silicon substrate, and the electronic element 12 is an LED. As shown in FIG. 2, the electronic element 12 is formed on the surface layer of the surface 11a of the semiconductor substrate 11, and the pad 13 for connecting to the wire 60 is formed on the surface 11a. A conductive adhesive 30 is attached to the back surface 11 b of the front surface 11 a, and the semiconductor chip 10 is mechanically and electrically connected to the lead 20 through the conductive adhesive 30. The semiconductor chip 10 has a configuration in which current flows between the front surface 11a and the back surface 11b, and the light emission amount of the electronic element 12 is adjusted by adjusting the current amount in the thickness direction of the semiconductor chip 10. As shown in FIG. 2, each of the front surface 11a and the back surface 11b is along an xy plane defined by the x direction and the y direction, and is orthogonal to the z direction.
　リード２０は、ＣｕやＡｌなどの金属から成るリードフレームの一部であり、その表面がめっきされている。複数のリード２０が、ハウジング５０にインサート成形されており、その両端部が、ハウジング５０から露出されている。図１に示すように、リード２０の一端は、外部に露出され、その他端が、被覆樹脂７０によって被覆されている。半導体チップ１０は、複数あるリード２０の内の１つの他端に導電性接着剤３０を介して機械的及び電気的に接続されている。そして、半導体チップ１０は、自身が接続されたリード２０とは異なるリード２０と、ワイヤ６０を介して電気的に接続されている。これにより、半導体チップ１０は、リード２０、導電性接着剤３０、及び、ワイヤ６０を介して外部と電気的に接続可能となっている。なお、図２に示すように、半導体チップ１０が導電性接着剤３０を介して機械的及び電気的に接続されたリード２０の上面２０ａは、表面１１ａと裏面１１ｂそれぞれと同様にして、ｘ－ｙ平面に沿い、ｚ方向に直交している。 The lead 20 is a part of a lead frame made of a metal such as Cu or Al, and the surface thereof is plated. A plurality of leads 20 are insert-molded in the housing 50, and both end portions thereof are exposed from the housing 50. As shown in FIG. 1, one end of the lead 20 is exposed to the outside, and the other end is covered with a coating resin 70. The semiconductor chip 10 is mechanically and electrically connected to one other end of the plurality of leads 20 via a conductive adhesive 30. The semiconductor chip 10 is electrically connected via a wire 60 to a lead 20 different from the lead 20 to which the semiconductor chip 10 is connected. As a result, the semiconductor chip 10 can be electrically connected to the outside via the lead 20, the conductive adhesive 30, and the wire 60. As shown in FIG. 2, the upper surface 20a of the lead 20 to which the semiconductor chip 10 is mechanically and electrically connected via the conductive adhesive 30 is the same as the front surface 11a and the back surface 11b, respectively. Along the y plane, it is orthogonal to the z direction.
　導電性接着剤３０は、銀ペーストが硬化して成るものである。図２に示すように、導電性接着剤３０は、半導体基板１１の裏面１１ｂとリード２０の上面２０ａとの間に設けられている。そして、導電性接着剤３０は、半導体基板１１（半導体チップ１０）の裏面１１ｂとリード２０の上面２０ａに接触することで、半導体チップ１０とリード２０とを機械的及び電気的に接続している。ちなみに、裏面１１ｂが、半導体チップ１０におけるリード２０との対向面に相当し、上面２０ａが、リード２０における半導体チップ１０との対向面に相当する。 The conductive adhesive 30 is formed by curing a silver paste. As shown in FIG. 2, the conductive adhesive 30 is provided between the back surface 11 b of the semiconductor substrate 11 and the top surface 20 a of the lead 20. The conductive adhesive 30 mechanically and electrically connects the semiconductor chip 10 and the lead 20 by contacting the back surface 11b of the semiconductor substrate 11 (semiconductor chip 10) and the top surface 20a of the lead 20. . Incidentally, the back surface 11 b corresponds to a surface facing the lead 20 in the semiconductor chip 10, and the top surface 20 a corresponds to a surface facing the semiconductor chip 10 in the lead 20.
　凸部４０は、裏面１１ｂと上面２０ａとの間に位置し、裏面１１ｂと上面２０ａとの間の間隔を規定することで、裏面１１ｂと上面２０ａそれぞれに接触する導電性接着剤３０の厚さを規定するものである。本実施形態に係る凸部４０は、リード２０の上面２０ａに複数形成されており、上面２０ａから裏面１１ｂに延び、その先端部が、裏面１１ｂに接触している。複数の凸部４０それぞれのｚ方向の長さが同一となっており、裏面１１ｂと上面２０ａそれぞれはｘ－ｙ平面に沿っている。そのため、複数の凸部４０によって、ｚ方向における裏面１１ｂと上面２０ａとの対向面間距離が一定となっている。この結果、裏面１１ｂと上面２０ａとの間に設けられ、裏面１１ｂと上面２０ａとに接触する導電性接着剤３０の厚さが一定になっている。 The convex portion 40 is located between the back surface 11b and the top surface 20a, and by defining the distance between the back surface 11b and the top surface 20a, the thickness of the conductive adhesive 30 that contacts the back surface 11b and the top surface 20a, respectively. It prescribes. A plurality of convex portions 40 according to the present embodiment are formed on the upper surface 20a of the lead 20, extend from the upper surface 20a to the back surface 11b, and a tip portion thereof is in contact with the back surface 11b. The plurality of convex portions 40 have the same length in the z direction, and the back surface 11b and the top surface 20a are along the xy plane. Therefore, the distance between the opposing surfaces of the back surface 11b and the top surface 20a in the z direction is constant by the plurality of convex portions 40. As a result, the thickness of the conductive adhesive 30 provided between the back surface 11b and the top surface 20a and contacting the back surface 11b and the top surface 20a is constant.
　本実施形態では、図３に破線で示すように、４つの凸部４０がリード２０に形成され、４つの凸部４０それぞれの端部が、半導体チップ１０の裏面１１ｂの隅に接触している。そして、図２に示すように、全ての凸部４０それぞれの側面が、導電性接着剤３０によって覆われている。 In the present embodiment, as shown by broken lines in FIG. 3, the four convex portions 40 are formed on the lead 20, and the end portions of the four convex portions 40 are in contact with the corners of the back surface 11 b of the semiconductor chip 10. . As shown in FIG. 2, the side surfaces of all the convex portions 40 are covered with the conductive adhesive 30.
　ちなみに、本実施形態に係る凸部４０は、硬化状態における導電性接着剤３０よりも軟らかい（ヤング率が低い）材料から成る。具体的には、紫外線の照射によって硬化するＵＶ硬化樹脂から成る。このようなＵＶ硬化樹脂としては、紫外線硬化性エポキシ樹脂、紫外線硬化性シリコーン樹脂などを採用することができる。 Incidentally, the convex portion 40 according to the present embodiment is made of a material softer (lower Young's modulus) than the conductive adhesive 30 in the cured state. Specifically, it is made of a UV curable resin that is cured by irradiation with ultraviolet rays. As such a UV curable resin, an ultraviolet curable epoxy resin, an ultraviolet curable silicone resin, or the like can be employed.
　ハウジング５０は、半導体チップ１０を搭載するものである。ハウジング５０は、半導体チップ１０の電子素子１２から照射される光を反射する性質を有する樹脂から成る。具体的に言えば、ハウジング５０は、ポリフタルアミド（ＰＰＡ）から成り、白色である。 The housing 50 is for mounting the semiconductor chip 10. The housing 50 is made of a resin having a property of reflecting light emitted from the electronic element 12 of the semiconductor chip 10. Specifically, the housing 50 is made of polyphthalamide (PPA) and is white.
　図１に示すように、ハウジング５０は、断面形状が長方形の台座５１と、内側空間およびその両端の開口部を有する筒部５２と、を有する。筒部５２が有する一方の開口部が閉塞される態様で、その開口部の縁部が台座５１の一面に固定されている。台座５１のうち、筒部５２の内壁面によって囲まれた領域の一面には、半導体チップ１０が設けられている。また、ｘ－ｙ平面における筒部５２の内壁面間距離が台座５１から遠ざかるほどに広がる構成となっており、台座５１によって閉塞された一方の開口部よりも、台座５１から離れた他方の開口部の方が、開口断面面積が大きくなっている。この構成により、電子素子１２から照射された光の一部が、筒部５２の内壁面によって反射され、上記開口部を介して外部に出射される。 As shown in FIG. 1, the housing 50 includes a pedestal 51 having a rectangular cross-sectional shape, and a cylindrical portion 52 having an inner space and openings at both ends thereof. The edge of the opening is fixed to one surface of the pedestal 51 in such a manner that one opening of the cylinder 52 is closed. The semiconductor chip 10 is provided on one surface of the pedestal 51 surrounded by the inner wall surface of the cylindrical portion 52. Further, the distance between the inner wall surfaces of the cylindrical portion 52 in the xy plane increases as the distance from the pedestal 51 increases, and the other opening farther from the pedestal 51 than the one opening blocked by the pedestal 51 is provided. The section has a larger opening cross-sectional area. With this configuration, a part of the light emitted from the electronic element 12 is reflected by the inner wall surface of the cylindrical portion 52 and is emitted to the outside through the opening.
　ワイヤ６０は、リード２０と半導体チップ１０とを電気的に接続するものである。図１に示すように、ワイヤ６０の一端がリード２０に接続され、他端が半導体チップ１０のパッド１３に接続されている。 The wire 60 is for electrically connecting the lead 20 and the semiconductor chip 10. As shown in FIG. 1, one end of the wire 60 is connected to the lead 20, and the other end is connected to the pad 13 of the semiconductor chip 10.
　被覆樹脂７０は、半導体チップ１０、ワイヤ６０、及び、半導体チップ１０とリード２０との電気的な接続部位を被覆保護するものであって、筒部５２の内側空間内に充填されている。被覆樹脂７０は、半導体チップ１０の電子素子１２から照射される光を透過する性質を有する樹脂から成る。具体的に言えば、被覆樹脂７０は、エポキシ樹脂から成り、透明である。 The covering resin 70 covers and protects the semiconductor chip 10, the wire 60, and the electrical connection portion between the semiconductor chip 10 and the lead 20, and is filled in the inner space of the cylindrical portion 52. The coating resin 70 is made of a resin having a property of transmitting light emitted from the electronic element 12 of the semiconductor chip 10. Specifically, the coating resin 70 is made of an epoxy resin and is transparent.
　次に、本実施形態に係る半導体装置１００の主要部の製造方法を説明する。図４に示すように、先ず、リード２０を用意する。そして、リード２０の上面２０ａに、凸部４０の形成材料であるＵＶ硬化樹脂を塗布する。その後、紫外線を照射することで、ＵＶ硬化樹脂を硬化して、凸部４０を形成する。以上が、形成工程である。ちなみに、ＵＶ硬化樹脂の上面２０ａへの塗布は、周知公用であるインクジェット印刷やディスペンスによって行う。 Next, a method for manufacturing the main part of the semiconductor device 100 according to this embodiment will be described. As shown in FIG. 4, first, the lead 20 is prepared. Then, a UV curable resin, which is a material for forming the convex portion 40, is applied to the upper surface 20 a of the lead 20. Thereafter, the UV curable resin is cured by irradiating ultraviolet rays, and the convex portion 40 is formed. The above is the forming process. Incidentally, the application of the UV curable resin to the upper surface 20a is performed by well-known and publicly used ink jet printing or dispensing.
　形成工程後、図５に示すように、上面２０ａに、液体状態の導電性接着剤３０、すなわち、銀ペーストを塗布する。この際、凸部４０が覆われるように、銀ペーストを上面２０ａに塗布する。以上が、塗布工程である。なお、導電性接着剤３０には、半導体チップ１０とリード２０との間の間隔を規定して、該導電性接着剤３０の厚さを規定するスペーサは含まれていない。 After the forming step, as shown in FIG. 5, a conductive adhesive 30 in a liquid state, that is, a silver paste is applied to the upper surface 20a. At this time, a silver paste is applied to the upper surface 20a so that the convex portions 40 are covered. The above is the coating process. Note that the conductive adhesive 30 does not include a spacer that defines the distance between the semiconductor chip 10 and the lead 20 and defines the thickness of the conductive adhesive 30.
　塗布工程後、図６に示すように、銀ペーストが半導体基板１１の裏面１１ｂに付着し、凸部４０の先端が裏面１１ｂに接触するように、半導体チップ１０を凸部４０と銀ペースト上に配置する。その後、銀ペーストに含まれる溶剤を揮発させることで、銀ペーストを硬化させ、導電性接着剤３０を形成する。これにより、導電性接着剤３０を介して、半導体チップ１０とリード２０とを機械的及び電気的に接続する。以上が、接続工程である。以上の工程を経ることで、半導体装置１００の主要部が製造される。 After the coating process, as shown in FIG. 6, the semiconductor chip 10 is placed on the convex portion 40 and the silver paste so that the silver paste adheres to the back surface 11b of the semiconductor substrate 11 and the tip of the convex portion 40 contacts the back surface 11b. Deploy. Thereafter, the silver paste is cured by volatilizing the solvent contained in the silver paste, and the conductive adhesive 30 is formed. Thereby, the semiconductor chip 10 and the lead 20 are mechanically and electrically connected via the conductive adhesive 30. The above is the connection process. Through the above steps, the main part of the semiconductor device 100 is manufactured.
　次に、本実施形態に係る半導体装置１００の作用効果を説明する。上記したように、リード２０に、半導体チップ１０とリード２０との間の間隔（導電性接着剤３０の厚さ）を規定する凸部４０が形成されている。これによれば、導電性接着剤に、導電性接着剤の厚さを規定するスペーサが含まれた構成とは異なり、接続工程において、液体状態の導電性接着剤３０（銀ペースト）の流動性のために、導電性接着剤３０の厚さを規定する部材（凸部４０）の分布や形状が変動することが抑制される。このため、導電性接着剤３０の厚さ（膜厚）にばらつきが生じることが抑制される。 Next, functions and effects of the semiconductor device 100 according to this embodiment will be described. As described above, the protrusions 40 that define the distance between the semiconductor chip 10 and the leads 20 (the thickness of the conductive adhesive 30) are formed on the leads 20. According to this, unlike the configuration in which the conductive adhesive includes a spacer that defines the thickness of the conductive adhesive, the fluidity of the conductive adhesive 30 (silver paste) in the liquid state in the connection process. Therefore, the distribution and shape of the member (convex portion 40) that defines the thickness of the conductive adhesive 30 are suppressed from changing. For this reason, variation in the thickness (film thickness) of the conductive adhesive 30 is suppressed.
　凸部４０が、リード２０に形成されている。そのため、導電性接着剤に、導電性接着剤の厚さを規定するスペーサが含まれた構成とは異なり、導電性接着剤３０の厚さを規定する部材（凸部４０）の分布や形状を、形成工程にて視認できる。これにより、凸部４０の品質を容易に評価することができる。以上により、凸部４０の品質ばらつきのために、導電性接着剤３０の厚さにばらつきが生じることが抑制される。 A convex portion 40 is formed on the lead 20. Therefore, unlike the configuration in which the conductive adhesive includes a spacer that defines the thickness of the conductive adhesive, the distribution and shape of the members (projections 40) that define the thickness of the conductive adhesive 30 are different. It can be visually recognized in the forming process. Thereby, the quality of the convex part 40 can be evaluated easily. As described above, the variation in the thickness of the conductive adhesive 30 due to the variation in the quality of the protrusions 40 is suppressed.
　以上、示したように、本実施形態に係る半導体装置１００によれば、導電性接着剤３０の厚さにばらつきが生じることが抑制される。したがって、半導体チップ１０及びリード２０それぞれと導電性接着剤３０との線膨張係数の差に起因する熱応力が発生した際に、その熱応力が局所的に強まる部位が両者の間に生じることが抑制される。換言すれば、応力集中の発生が抑制される。このため、熱応力の応力集中のために、導電性接着剤３０が半導体チップ１０やリード２０から剥離することが抑制され、半導体チップ１０とリード２０に機械的及び電気的な接続不良が生じることが抑制される。 As described above, according to the semiconductor device 100 according to the present embodiment, variation in the thickness of the conductive adhesive 30 is suppressed. Therefore, when a thermal stress is generated due to a difference in coefficient of linear expansion between each of the semiconductor chip 10 and the lead 20 and the conductive adhesive 30, a portion where the thermal stress is locally increased may be generated between the two. It is suppressed. In other words, the occurrence of stress concentration is suppressed. For this reason, the conductive adhesive 30 is prevented from being peeled off from the semiconductor chip 10 and the lead 20 due to the stress concentration of thermal stress, and mechanical and electrical connection failure occurs between the semiconductor chip 10 and the lead 20. Is suppressed.
　また、リード２０に形成された凸部４０の端部が裏面１１ｂと上面２０ａそれぞれに接触している。そのため、半導体チップ１０とリード２０が対向する方向である、ｚ方向に配置される凸部４０の数が、１つとなっている。これによれば、導電性接着剤にスペーサが含まれた構成とは異なり、ｚ方向に配置されるスペーサの数を一定として、ｚ方向における半導体チップ１０とリード２０との対向間隔を一定とするために、半導体チップ１０とリード２０の少なくとも一方に、両者が近づく力を印加しなくとも良くなる。 Further, the end of the convex portion 40 formed on the lead 20 is in contact with the back surface 11b and the top surface 20a. Therefore, the number of convex portions 40 arranged in the z direction, which is the direction in which the semiconductor chip 10 and the lead 20 face each other, is one. According to this, unlike the configuration in which spacers are included in the conductive adhesive, the number of spacers arranged in the z direction is constant, and the facing distance between the semiconductor chip 10 and the leads 20 in the z direction is constant. Therefore, it is not necessary to apply a force for approaching at least one of the semiconductor chip 10 and the lead 20 to both.
　凸部４０の側面が、導電性接着剤３０によって覆われている。これによれば、凸部の側面が導電性接着剤に接触していない構成と比べて、導電性接着剤３０の接触面積が増大される。また、凸部の側面が導電性接着剤によって覆われていない構成とは異なり、アンカー効果が生じる。そのため、半導体チップ１０とリード２０との機械的な接続強度が向上され、両者に、機械的及び電気的な接続不良が生じることが抑制される。 The side surface of the convex portion 40 is covered with the conductive adhesive 30. According to this, the contact area of the conductive adhesive 30 is increased as compared with the configuration in which the side surface of the convex portion is not in contact with the conductive adhesive. Further, unlike the configuration in which the side surface of the convex portion is not covered with the conductive adhesive, an anchor effect occurs. Therefore, the mechanical connection strength between the semiconductor chip 10 and the lead 20 is improved, and the occurrence of poor mechanical and electrical connection in both is suppressed.
　凸部４０は、硬化状態における導電性接着剤３０よりも、軟らかい。これによれば、凸部が、硬化状態における導電性接着剤よりも、硬い構成とは異なり、凸部４０と導電性接着剤３０との線膨張係数の差に起因する熱応力が、両者の間に発生したとしても、熱応力によって凸部４０が変形するので、導電性接着剤３０へ印加される熱応力の強さが緩和される。そのため、導電性接着剤３０が半導体チップ１０やリード２０から剥離することが抑制され、半導体チップ１０とリード２０に機械的及び電気的な接続不良が生じることが抑制される。 The convex portion 40 is softer than the conductive adhesive 30 in the cured state. According to this, unlike the structure in which the convex portion is harder than the conductive adhesive in the cured state, the thermal stress caused by the difference in the linear expansion coefficient between the convex portion 40 and the conductive adhesive 30 is Even if it occurs in the meantime, since the convex portion 40 is deformed by the thermal stress, the strength of the thermal stress applied to the conductive adhesive 30 is relaxed. Therefore, peeling of the conductive adhesive 30 from the semiconductor chip 10 and the lead 20 is suppressed, and mechanical and electrical connection failures between the semiconductor chip 10 and the lead 20 are suppressed.
　凸部４０は、ＵＶ硬化樹脂から成る。これによれば、凸部が熱硬化樹脂から成る構成と比べて、液体状態の樹脂を早く硬化させることができる。そのため、液体状態における樹脂の形状を反映させて、凸部４０を形成することができ、凸部４０の形状が不安定となることが抑制される。これにより、凸部４０の品質にばらつきが生じることが抑制され、導電性接着剤３０の厚さにばらつきが生じることが抑制される。したがって、熱応力の応力集中のために、導電性接着剤３０が半導体チップ１０やリード２０から剥離することが抑制され、半導体チップ１０とリード２０に機械的及び電気的な接続不良が生じることが抑制される。 The convex portion 40 is made of a UV curable resin. According to this, the resin in the liquid state can be cured faster than the configuration in which the convex portion is made of the thermosetting resin. Therefore, the convex part 40 can be formed reflecting the shape of the resin in the liquid state, and the convex part 40 is prevented from becoming unstable. Thereby, variation in the quality of the convex part 40 is suppressed, and variation in the thickness of the conductive adhesive 30 is suppressed. Therefore, the conductive adhesive 30 is prevented from being peeled off from the semiconductor chip 10 and the lead 20 due to the stress concentration of the thermal stress, and mechanical and electrical connection failures occur between the semiconductor chip 10 and the lead 20. It is suppressed.
　本実施形態では、半導体チップ１０が、被覆樹脂７０によって被覆保護されている。したがって、半導体チップ１０と被覆樹脂７０との線膨張係数の差に起因する熱応力が、半導体チップ１０に印加される。しかしながら、上記したように、本実施形態に係る半導体装置１００では、導電性接着剤３０の厚さにばらつきが生じることが抑制され、導電性接着剤３０による半導体チップ１０とリード２０との機械的な接続強度が向上されている。そのため、上記した半導体チップ１０と被覆樹脂７０との線膨張係数の差に起因する熱応力によって、半導体チップ１０とリード２０に機械的及び電気的な接続不良が生じることが抑制される。 In this embodiment, the semiconductor chip 10 is covered and protected by the covering resin 70. Therefore, thermal stress due to the difference in linear expansion coefficient between the semiconductor chip 10 and the coating resin 70 is applied to the semiconductor chip 10. However, as described above, in the semiconductor device 100 according to the present embodiment, variation in the thickness of the conductive adhesive 30 is suppressed, and the mechanical bonding between the semiconductor chip 10 and the lead 20 by the conductive adhesive 30 is suppressed. Connection strength has been improved. Therefore, it is possible to suppress mechanical and electrical connection failures between the semiconductor chip 10 and the leads 20 due to the thermal stress resulting from the difference in linear expansion coefficient between the semiconductor chip 10 and the coating resin 70 described above.
　以上、本開示の好ましい実施形態について説明したが、本開示は上記した実施形態になんら制限されることなく、本開示の主旨を逸脱しない範囲において、種々変形して実施することが可能である。 The preferred embodiments of the present disclosure have been described above. However, the present disclosure is not limited to the above-described embodiments, and various modifications can be made without departing from the spirit of the present disclosure.
　前記実施形態では、半導体装置１００が、主要部である、半導体チップ１０と、リード２０と、導電性接着剤３０と、凸部４０の他に、ハウジング５０と、ワイヤ６０と、被覆樹脂７０と、を有する例を示した。しかしながら、半導体装置１００が、ハウジング５０と、ワイヤ６０と、被覆樹脂７０と、を有していなくとも良い。 In the embodiment, the semiconductor device 100 is the main part, the semiconductor chip 10, the lead 20, the conductive adhesive 30, the convex part 40, the housing 50, the wire 60, and the coating resin 70. The example which has was shown. However, the semiconductor device 100 may not include the housing 50, the wire 60, and the coating resin 70.
　前記実施形態では、全ての凸部４０それぞれの側面が、導電性接着剤３０によって覆われた例を示した。しかしながら、複数の凸部４０の内の少なくとも１つの側面が、導電性接着剤３０によって覆われた構成を採用することができる。また、図７に示すように、複数の凸部４０の内の少なくとも１つの側面に、導電性接着剤３０が接触した構成を採用することができる。更に言えば、図８に示すように、全ての凸部４０の側面に、導電性接着剤３０が接触していない構成を採用することもできる。 In the above embodiment, an example in which the side surfaces of all the convex portions 40 are covered with the conductive adhesive 30 has been described. However, a configuration in which at least one side surface of the plurality of convex portions 40 is covered with the conductive adhesive 30 can be employed. Further, as shown in FIG. 7, a configuration in which the conductive adhesive 30 is in contact with at least one side surface of the plurality of convex portions 40 can be employed. Furthermore, as shown in FIG. 8, a configuration in which the conductive adhesive 30 is not in contact with the side surfaces of all the convex portions 40 may be employed.
　前記実施形態では、半導体チップ１０は、表面１１ａと裏面１１ｂの間を電流が流れる構成である例を示した。しかしながら、半導体チップ１０を流れる電流は、表面１１ａであったり、裏面１１ｂであったりしても良い。この場合、図９に示すように、半導体チップ１０を介して、２つの電気的に独立したリード２０が電気的に接続される構成を採用することもできる。 In the above embodiment, the semiconductor chip 10 has been described as an example in which a current flows between the front surface 11a and the back surface 11b. However, the current flowing through the semiconductor chip 10 may be the front surface 11a or the back surface 11b. In this case, as shown in FIG. 9, a configuration in which two electrically independent leads 20 are electrically connected via the semiconductor chip 10 may be employed.
　前記実施形態では、凸部４０が、リード２０の上面２０ａに形成された例を示した。しかしながら、図１０に示すように、凸部４０が、半導体チップ１０の裏面１１ｂに形成された構成を採用することもできる。若しくは、図１１に示すように、上面２０ａと裏面１１ｂの両方に形成された構成を採用することもできる。 In the above embodiment, the example in which the convex portion 40 is formed on the upper surface 20a of the lead 20 is shown. However, as shown in FIG. 10, a configuration in which the convex portion 40 is formed on the back surface 11 b of the semiconductor chip 10 can be adopted. Or as shown in FIG. 11, the structure formed in both the upper surface 20a and the back surface 11b is also employable.
　前記実施形態では、形成工程において、リード２０の上面２０ａに、凸部４０を形成する例を示した。しかしながら、図１２に示すように、形成工程において、半導体基板１１の裏面１１ｂに、凸部４０を形成しても良い。この場合、周知の露光技術を用いて、凸部４０をレジスト膜によって形成しても良い。 In the above-described embodiment, an example in which the convex portion 40 is formed on the upper surface 20a of the lead 20 in the forming step has been described. However, as shown in FIG. 12, the protrusion 40 may be formed on the back surface 11 b of the semiconductor substrate 11 in the forming step. In this case, the convex portion 40 may be formed of a resist film using a known exposure technique.
　ちなみに、図１２に示す形成工程実施後は、図１３に示すように、塗布工程において、液体状態の導電性接着剤３０（銀ペースト）をリード２０の上面２０ａに塗布する。そして、図１４に示すように、接続工程において、銀ペーストが裏面１１ｂに付着し、凸部４０の先端部が上面２０ａに接触するように、半導体チップ１０を銀ペースト上に設置する。この後、銀ペーストに含まれる溶剤を揮発させることで、銀ペーストを硬化させ、導電性接着剤３０を形成する。これにより、図１０に示す半導体装置１００の主要部が製造される。 Incidentally, after the formation process shown in FIG. 12 is performed, as shown in FIG. 13, a liquid conductive adhesive 30 (silver paste) is applied to the upper surface 20 a of the lead 20 in the application process. And as shown in FIG. 14, in a connection process, the semiconductor chip 10 is installed on a silver paste so that a silver paste may adhere to the back surface 11b, and the front-end | tip part of the convex part 40 may contact the upper surface 20a. Thereafter, the silver paste is cured by volatilizing the solvent contained in the silver paste, and the conductive adhesive 30 is formed. Thereby, the main part of the semiconductor device 100 shown in FIG. 10 is manufactured.
　前記実施形態では、電子素子１２がＬＥＤである例を示した。しかしながら、電子素子１２としては、上記例に限定されず、例えば、フォトダイオードを採用することができる。 In the above embodiment, an example in which the electronic element 12 is an LED has been described. However, the electronic element 12 is not limited to the above example, and, for example, a photodiode can be employed.
　前記実施形態では、導電性接着剤３０が、銀ペーストが硬化して成るものである例を示した。しかしながら、導電性接着剤３０としては、半導体チップ１０とリード２０とを機械的及び電気的に接続するものであれば良く、上記例に限定されない。例えば、導電性接着剤３０が、ＣペーストやＣｕペーストが硬化して成るものであっても良い。 In the above-described embodiment, an example in which the conductive adhesive 30 is formed by curing a silver paste has been described. However, the conductive adhesive 30 may be any adhesive that mechanically and electrically connects the semiconductor chip 10 and the lead 20 and is not limited to the above example. For example, the conductive adhesive 30 may be formed by curing C paste or Cu paste.
　前記実施形態では、４つの凸部４０がリード２０に形成された例を示した。しかしながら、凸部４０の個数としては、上記例に限定されない。接続工程において、半導体チップ１０とリード２０とを安定して支持する個数であればよい。凸部４０の数としては、３つ以上が好ましい。 In the above embodiment, an example in which the four protrusions 40 are formed on the lead 20 has been described. However, the number of convex portions 40 is not limited to the above example. In the connection process, the number of the semiconductor chips 10 and the leads 20 may be stably supported. The number of convex portions 40 is preferably three or more.
　前記実施形態では、４つの凸部４０それぞれの端部が、半導体チップ１０の裏面１１ｂの隅に接触している例を示した。しかしながら、凸部４０の配置としては、上記例に限定されない。接続工程において、半導体チップ１０とリード２０とを安定して支持する配置であればよい。例えば、半導体チップ１０の重心周りに、等間隔で３つ以上配置されることで、各凸部４０の頂点を結んだ線によって正多角形が形作られる構成を採用することもできる。 In the above-described embodiment, an example in which the end portions of the four convex portions 40 are in contact with the corners of the back surface 11b of the semiconductor chip 10 has been described. However, the arrangement of the convex portions 40 is not limited to the above example. Any arrangement that stably supports the semiconductor chip 10 and the leads 20 in the connection step may be used. For example, it is possible to adopt a configuration in which a regular polygon is formed by a line connecting the vertices of the convex portions 40 by arranging three or more at equal intervals around the center of gravity of the semiconductor chip 10.
　前記実施形態では、凸部４０と導電性接着剤３０との線膨張係数について特に言及しなかった。しかしながら、両者の線膨張係数の関係としては、同一である関係が好ましい。これによれば、凸部と導電性接着剤とが異なる線膨張係数を有する構成とは異なり、凸部４０と導電性接着剤３０との間に、線膨張係数の差に起因する熱応力が発生することが抑制される。そのため、導電性接着剤３０が半導体チップ１０やリード２０から剥離することが抑制され、半導体チップ１０とリード２０に機械的及び電気的な接続不良が生じることが抑制される。 In the above embodiment, no particular mention was made of the linear expansion coefficient between the convex portion 40 and the conductive adhesive 30. However, the relationship between the linear expansion coefficients of both is preferably the same. According to this, unlike the configuration in which the convex portion and the conductive adhesive have different linear expansion coefficients, the thermal stress caused by the difference in the linear expansion coefficient is between the convex portion 40 and the conductive adhesive 30. Occurrence is suppressed. Therefore, peeling of the conductive adhesive 30 from the semiconductor chip 10 and the lead 20 is suppressed, and mechanical and electrical connection failures between the semiconductor chip 10 and the lead 20 are suppressed.
　前記実施形態では、半導体チップ１０のサイズ（ｘ－ｙ平面の大きさ）と凸部４０の高さ（ｚ方向の長さ）それぞれについて特に言及しなかった。しかしながら、例えば、半導体チップ１０のサイズとしては、２００μｍ×２００μｍ、２５０μｍ×１５０μｍ、２５０μｍ×２５０μｍを採用することができる。そして、凸部４０の高さとしては、２μｍ～１００μｍを採用することができる。なお、凸部４０の形成材料としてＵＶ硬化樹脂を採用し、その形成方法としてインクジェット印刷を採用した場合、凸部４０の高さや幅は、ＵＶ硬化樹脂をリード２０や半導体チップ１０に印刷した後、印刷したＵＶ硬化樹脂にＵＶを照射するまでの時間（印刷されたＵＶ硬化樹脂が流動して高さが徐々に低くなる時間）を調整することで決定される。例えば、高さが２０μｍ、径が５～１０μｍの凸部４０を形成することができる。また、凸部４０の隣接距離は、半導体チップ１０やリード２０の大きさに応じて決定される。例えば、半導体チップ１０のサイズとして２００μｍ×２００μｍを採用した場合、凸部４０の隣接距離はおよそ１５０μｍとなる。 In the above embodiment, the size of the semiconductor chip 10 (the size of the xy plane) and the height of the convex portion 40 (the length in the z direction) are not particularly mentioned. However, for example, the size of the semiconductor chip 10 may be 200 μm × 200 μm, 250 μm × 150 μm, or 250 μm × 250 μm. The height of the convex portion 40 can be 2 μm to 100 μm. In addition, when UV curable resin is adopted as the forming material of the convex portion 40 and ink jet printing is adopted as the forming method, the height and width of the convex portion 40 are determined after the UV curable resin is printed on the lead 20 or the semiconductor chip 10. The time until the printed UV curable resin is irradiated with UV (the time when the printed UV curable resin flows and the height gradually decreases) is determined. For example, the convex part 40 having a height of 20 μm and a diameter of 5 to 10 μm can be formed. Further, the adjacent distance of the convex portion 40 is determined according to the size of the semiconductor chip 10 and the lead 20. For example, when 200 μm × 200 μm is adopted as the size of the semiconductor chip 10, the adjacent distance between the convex portions 40 is approximately 150 μm.
　前記実施形態では、凸部４０がＵＶ硬化樹脂から成る例を示した。しかしながら、図１５及び図１６に示すように、リード２０の一部を半導体チップ１０側に突起させることで、凸部４０をリード２０の形成材料によって形成しても良い。この場合、リード２０とともに凸部４０が形成されるので、リード２０と凸部４０とが別材料から成る構成と比べて、半導体装置１００の部品点数が減少されるとともに、製造工程が簡略化される。この結果、製造コストが低減される。 In the above embodiment, an example in which the convex portion 40 is made of a UV curable resin has been described. However, as shown in FIGS. 15 and 16, the protrusions 40 may be formed of the material for forming the leads 20 by projecting a part of the leads 20 toward the semiconductor chip 10. In this case, since the protrusions 40 are formed together with the leads 20, the number of parts of the semiconductor device 100 is reduced and the manufacturing process is simplified as compared with the configuration in which the leads 20 and the protrusions 40 are made of different materials. The As a result, the manufacturing cost is reduced.
　なお、リード２０の一部を突起させることで凸部４０を形成するには、リードフレーム形成用のパンチ及びダイの所定位置に凹凸を設けておくことで成される。また、パンチやダイへの凹凸の形成は、凸部４０の高さが２μｍ～１００μｍの場合、マシニングセンタやエンドミル放電加工などの既知の技術にて成される。 In order to form the convex portion 40 by projecting a part of the lead 20, it is possible to provide irregularities at predetermined positions of the lead frame forming punch and die. Further, the formation of irregularities on the punch or die is performed by a known technique such as a machining center or an end mill electric discharge machining when the height of the convex portion 40 is 2 μm to 100 μm.
　図１５及び図１６に示す変形例の場合、凸部４０の形成位置は、リード２０における半導体チップ１０の搭載部位だけにしても良いし、半導体チップ１０の搭載部位だけではなく、他の部位を採用しても良い。凸部４０をリード２０における半導体チップ１０の搭載部位だけに形成した場合、半導体チップ１０に形成された電子素子１２から照射された光が凸部４０によって乱反射されることが抑制される。また、凸部４０をリード２０における半導体チップ１０の搭載部位と他の部位それぞれに形成した場合、半導体チップ１０とは別の部材をリード２０に導電性接着剤３０を介して接着固定する際、その部材とリード２０との間の導電性接着剤３０の厚さにばらつきが生じることが凸部４０によって抑制される。したがって、リード２０と上記した部材それぞれと導電性接着剤３０との線膨張係数の差に起因する熱応力が発生した際に、その熱応力が局所的に強まる部位が両者の間に生じることが抑制される。換言すれば、応力集中の発生が抑制される。このため、熱応力の応力集中のために、導電性接着剤３０がリード２０や上記した部材から剥離することが抑制され、両者に機械的及び電気的な接続不良が生じることが抑制される。 In the modification shown in FIGS. 15 and 16, the projecting portion 40 may be formed only at the mounting portion of the semiconductor chip 10 on the lead 20, or may be other than the mounting portion of the semiconductor chip 10. It may be adopted. When the convex portion 40 is formed only on the mounting portion of the semiconductor chip 10 in the lead 20, the light irradiated from the electronic element 12 formed on the semiconductor chip 10 is suppressed from being irregularly reflected by the convex portion 40. In addition, when the convex portion 40 is formed in each of the mounting portion of the semiconductor chip 10 and the other portion of the lead 20, a member different from the semiconductor chip 10 is bonded and fixed to the lead 20 via the conductive adhesive 30. The convex portion 40 suppresses variations in the thickness of the conductive adhesive 30 between the member and the lead 20. Therefore, when a thermal stress is generated due to a difference in linear expansion coefficient between the lead 20 and each of the above-described members and the conductive adhesive 30, a portion where the thermal stress is locally increased may be generated between the two. It is suppressed. In other words, the occurrence of stress concentration is suppressed. For this reason, due to the stress concentration of thermal stress, the conductive adhesive 30 is prevented from peeling off from the lead 20 and the above-described members, and mechanical and electrical connection failures are suppressed from occurring in both.

Claims (9)

  1. 　半導体チップ（１０）と、
    　リード（２０）と、
    　前記半導体チップと前記リードとを機械的及び電気的に接続する導電性接着剤（３０）と、
    　前記半導体チップにおける前記リードとの対向面（１１ｂ）、及び、前記リードにおける前記半導体チップとの対向面（２０ａ）の少なくとも一方に形成され、一方の対向面から他方の対向面に延びる複数の凸部（４０）と、
    を有する半導体装置であって、
    　前記複数の凸部の端部それぞれが、前記半導体チップと前記リードそれぞれの対向面に接触しており、前記複数の凸部によって、前記半導体チップと前記リードとの間の間隔が定められている半導体装置。     A semiconductor chip (10);
    Lead (20);
    A conductive adhesive (30) for mechanically and electrically connecting the semiconductor chip and the lead;
    A plurality of protrusions formed on at least one of the facing surface (11b) of the semiconductor chip facing the lead and the facing surface (20a) of the lead facing the semiconductor chip and extending from one facing surface to the other facing surface. Part (40);
    A semiconductor device comprising:
    The ends of the plurality of protrusions are in contact with the opposing surfaces of the semiconductor chip and the leads, respectively, and the intervals between the semiconductor chip and the leads are determined by the plurality of protrusions. Semiconductor device.
  2. 　前記複数の凸部の少なくとも１つの側面に、前記導電性接着剤が接触している請求項１に記載の半導体装置。 The semiconductor device according to claim 1, wherein the conductive adhesive is in contact with at least one side surface of the plurality of convex portions.
  3. 　前記複数の凸部の少なくとも１つの側面の全てが、前記導電性接着剤によって覆われている請求項２に記載の半導体装置。 3. The semiconductor device according to claim 2, wherein at least one side surface of the plurality of convex portions is covered with the conductive adhesive.
  4. 　前記複数の凸部は、硬化状態における前記導電性接着剤よりも、軟らかい請求項１～３いずれか１項に記載の半導体装置。 4. The semiconductor device according to claim 1, wherein the plurality of convex portions are softer than the conductive adhesive in a cured state.
  5. 　前記複数の凸部と前記導電性接着剤とは、同一の線膨張係数を有する請求項１～３いずれか１項に記載の半導体装置。 4. The semiconductor device according to claim 1, wherein the plurality of convex portions and the conductive adhesive have the same linear expansion coefficient.
  6. 　前記複数の凸部の少なくとも１つは、前記リードの一部を前記半導体チップ側に突起させた部位である請求項１～３いずれか１項に記載の半導体装置。 4. The semiconductor device according to claim 1, wherein at least one of the plurality of convex portions is a portion in which a part of the lead is protruded toward the semiconductor chip.
  7. 　前記複数の凸部は、ＵＶ硬化樹脂から成る請求項１～４いずれか１項に記載の半導体装置。 5. The semiconductor device according to claim 1, wherein the plurality of convex portions are made of UV curable resin.
  8. 　前記複数の凸部は、３つ以上の凸部を含み、前記半導体チップの重心周りに前記複数の凸部が等間隔に配置され、前記複数の凸部の頂点を結んだ線によって正多角形が形作られている請求項１～７いずれか１項に記載の半導体装置。 The plurality of protrusions includes three or more protrusions, the plurality of protrusions are arranged at equal intervals around the center of gravity of the semiconductor chip, and a regular polygon is formed by a line connecting vertices of the plurality of protrusions 8. The semiconductor device according to claim 1, wherein is formed.
  9. 　請求項１～８いずれかに記載に半導体装置の製造方法であって、
    　前記半導体チップの対向面及び前記リードの対向面の少なくとも一方に前記複数の凸部を形成し、
    　前記複数の凸部の形成後、前記半導体チップの対向面及び前記リードの対向面の少なくとも一方に液体状態の前記導電性接着剤を塗布し、
    　前記導電性接着剤の塗布後、液体状態の前記導電性接着剤が前記半導体チップの対向面及び前記リードの対向面の両方に付着し、前記複数の凸部の先端が前記半導体チップの対向面及び前記リードの対向面の少なくとも一方に接触するように、前記半導体チップと前記リードとを対向させ、液体状態の前記導電性接着剤を硬化させることで、前記半導体チップと前記リードとを前記導電性接着剤を介して機械的及び電気的に接続すること、を含む半導体装置の製造方法。     A method for manufacturing a semiconductor device according to any one of claims 1 to 8,
    Forming the plurality of convex portions on at least one of the opposing surface of the semiconductor chip and the opposing surface of the lead;
    After forming the plurality of convex portions, applying the conductive adhesive in a liquid state to at least one of the opposing surface of the semiconductor chip and the opposing surface of the lead,
    After the application of the conductive adhesive, the liquid state conductive adhesive adheres to both the opposing surface of the semiconductor chip and the opposing surface of the lead, and the tips of the plurality of convex portions are opposing surfaces of the semiconductor chip. And the semiconductor chip and the lead are opposed to each other so as to contact at least one of the opposing surfaces of the lead, and the conductive adhesive in a liquid state is cured, whereby the semiconductor chip and the lead are electrically conductive. A method for manufacturing a semiconductor device, comprising: mechanically and electrically connecting via a conductive adhesive.
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