WO2009107071A2

WO2009107071A2 - An inter-cell td-scdma channel estimation method and apparatus

Info

Publication number: WO2009107071A2
Application number: PCT/IB2009/050758
Authority: WO
Inventors: Liang Wang; Xun Fan
Original assignee: Nxp B.V.
Priority date: 2008-02-25
Filing date: 2009-02-25
Publication date: 2009-09-03
Also published as: WO2009107071A3

Abstract

A network communication system to compute a channel impulse response. The network communication system includes a receiver to receive a signal from a transmitter. The received signal includes an intended signal and a plurality of interference signals. The network communication system also includes a channel estimation module to generate a final channel impulse response from the received signal in conjunction with an interference cancellation (IC) process. The channel estimation module includes a raw channel impulse response estimator to estimate a raw channel impulse response of the received signal. The channel estimation module also includes an IC channel estimator to generate a refined channel impulse response from the estimated raw channel impulse response according to the IC process.

Description

AN INTER-CELL TD-SCDMA CHANNEL ESTIMATION METHOD AND

APPARATUS

Time Division Synchronized Code Division Multiple Access (TD-SCDMA), together with Wideband Code Division Multiple Access (WCDMA) and Code Division Multiple Access 2000 (CDMA2000), is one of the three 3 G standards. A cell is a basic element of the mobile communication network. Each cell uses a Central Frequency (CF) to transmit signals between the Base Station (BS) and User Equipment (UE). Generally, adjacent cells don't use the same CF, in order to avoid the strong same frequency inter cell interference (SF-ICI). If two cells are far away from each other, the SF-ICI is small enough that the two cells can use the same CF without substantial decrease in performance. Second generation (2G) mobile communication systems, like global system for mobile communications (GSM), use 3 CF to build a network. Implementing 3 CF is also known as Frequency Reuse Factor (FRF) 3, or FRF=3. TD-SCDMA supports FRF=I, which means that adjacent cells use the same CF. FRF=I improves frequency efficiency and provides more freedom to network deployment compared to FRF=3. However, the strong SF-ICI which can occur in FRF=I severely degrades overall system performance.

TD-SCDMA UE uses Joint Detection (JD) to demodulate the received signal. JD has better performance than a RAKE receiver, along with added complexity.

Conventional code division detectors such as a matched filter and RAKE combiners are optimized for detecting the signal of a single user. These conventional detectors are inefficient, because the interference is treated as noise and there is no utilization of the available knowledge of spreading sequences of the interferers. JD reduces interference in the code division system by taking into account not only the intended user signal but the other user signals, or interference signals, as well.

JD is suitable for a short spreading code CDMA system, like TD-SCDMA. JD is a primary function in the TD-SCDMA UE. The performance of JD relies on the accuracy of the channel estimation. Without accurate channel estimation results, the performance of JD is even worse than that of RAKE. Fig. 1 depicts a schematic block diagram of a conventional time slot burst structure 100. At a transmitter, such as a BS or UE, TD-SCDMA systems transmit signals according to a specific structure at each timeslot as shown in Fig. 1. A TD- SCDMA time slot has been designed to fit into exactly one burst, and its length is 675 μs. The time slot includes four parts. A midamble with 144 chips duration, and two identical data fields with 352 chips duration at each side of the midamble, followed by a 16 chips guard period (GP). A chip is one bit of a direct-sequence spread spectrum code. The chip rate of a code is the number of bits per second (chips per second) at which the code is transmitted (or received). On the two data parts, the same spreading code channels are allocated. On each spreading code channel (which spans over the two data parts), a sequence of modulation symbols drawn from a constellation are carried after spreading by a specific spreading code. Constellations may include phase-shift keying such as binary phase-shift keying (BPSK), quadrature phase-shift keying (QPSK), high-order PSK such as 8PSK, and quadrature amplitude modulation (QAM) such as 16QAM. A GP represents a first switching point between the downlink and uplink transmission direction. The GP is used to alleviate the effect of multipath delay, associated with radio mobile communications, for frequency flat Rayleigh fading channels, and for two-path fading channels in the presence of additive white Gaussian noise (AWGN). The midamble, or training sequence, is used by the receiver to carry out channel estimation tasks. The first 16 chips of the midamble are the cyclic prefix of the last 16 chips. The midamble is designed for channel estimation by Fast Fourier Transform (FFT). The algorithm is show by the following operations. e_m = ,e_{m 2},..., e_{m P} \ denotes the received midamble signal without the first 16 chips cyclic prefix. m_b = [m_{b l} , m_{b l} ,... , m_{b p} \ denotes the complex basic midamble for the cell. P is a predetermined constant, where, in one embodiment, P = 128.

For conventional channel estimation, first, a midamble inverse matrix is generated by:

G^"1 = {diag{FFT{m_b ψ (1) The raw channel estimation by de-convolution in the frequency domain is then given by: h = IFFT(G^~1 * FFT \e_m )) (2)

Next, the channel estimation is reordered according to the window sequence: hj ⁼ hmod{j+U2-(K-l) W-l,P)+l Λ ≤ j ≤ P (3) where K is the channel estimation window number of the burst, h^k = [h_(k__l)w+l ,..., h_kw J is the channel impulse response of the Mi window, and

P_ W = for 1 < k ≤ K .

K

The conventional channel estimation method works without taking SF-ICI into consideration. When the TD-SCDMA network uses the FRF=I configuration, the channel estimation accuracy degrades dramatically. Because the JD performance is limited by the channel estimation accuracy, the UE does not operate with the original channel estimation method when FRF=I .

One measurement of the channel estimation accuracy is Mean Square Error (MSE) given by:

where h is the estimated channel impulse response and h_ref is the reference channel impulse response.

Embodiments of a system are described. In one embodiment, the system is a network communication system to compute a channel impulse response. The system includes a receiver to receive a signal from a transmitter. The received signal comprises an intended signal and a plurality of interference signals. The network communication system includes a channel estimation module coupled to the receiver. The channel estimation module generates a final channel impulse response from the received signal in conjunction with an interference cancellation (IC) process. Additionally, the channel estimation module includes a raw channel impulse response estimator to estimate a raw channel impulse response of the received signal, an IC channel estimator to generate a refined channel impulse response from the estimated raw channel impulse response, and a post processing module to generate a final channel impulse response from the refined channel impulse response. Other embodiments of the system are also described.

Embodiments of a method are also described. In one embodiment, the method is a method for computing a channel impulse response. The method includes receiving a signal from a transmitter. The method also includes estimating a raw channel impulse response of the received signal. The method also includes generating a refined channel impulse response from the estimated raw channel impulse response. The method also includes generating a final channel impulse response from the refined channel impulse response. Other embodiments of the system are also described.

Embodiments of an apparatus are also described. In one embodiment, the apparatus is a channel estimation module. The apparatus includes means for receiving a signal from a transmitter. The apparatus also includes means for estimating a raw channel impulse response of the received signal. The apparatus also includes means for generating a refined channel impulse response from the estimated raw channel impulse response. The apparatus also includes means for generating a final channel impulse response from the refined channel impulse response. Other embodiments of the apparatus are also described. Other aspects and advantages of embodiments of the present invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrated by way of example of the principles of the invention.

Fig. 1 depicts a schematic block diagram of a conventional time slot burst structure. Fig. 2 depicts a schematic block diagram of one embodiment of a network communications system. Fig. 3 depicts a schematic diagram of one embodiment of the channel estimation module of Fig. 2.

Fig. 4 depicts a schematic flow chart diagram of one embodiment of a general channel estimation method for use with the channel estimation module of Fig. 3. Fig. 5 depicts a schematic flow chart diagram of one embodiment of a raw channel impulse response estimation operation for use with the general channel estimation method of Fig. 4.

Fig. 6 depicts a schematic flow chart diagram of one embodiment of an interference cancellation based channel estimation operation for use with the general channel estimation method of Fig. 4.

Fig. 7 depicts a schematic flow chart diagram of one embodiment of a post processing operation for use with the general channel estimation method of Fig. 4. Fig. 8 depicts a schematic flow chart diagram of one embodiment of a cancellation order operation for use with the general channel estimation method of Fig. 4. Fig. 9 depicts a schematic flow chart diagram of one embodiment of a path combination detection operation for use with the general channel estimation method of Fig. 4.

Fig. 10 depicts a mean square error (MSE) performance data chart of the channel estimation module of Fig. 3. Throughout the description, similar reference numbers may be used to identify similar elements.

Fig. 2 depicts a schematic block diagram of one embodiment of a network communication system 200. As depicted in Fig. 2, the network communication system 200 includes a base station 202, at least one antenna 204, a network interface 206, and User Equipment-1 (UE-I) 208 through User Equipment-N (UE-N) 210. Although the depicted network communication system 200 is shown and described herein with certain components and functionality, other embodiments of the network communication system 200 may be implemented with fewer or more components or with more or less functionality. For example, some embodiments of the network communication system 200 include a plurality of base stations 202, a plurality of network interfaces 206, and a plurality of UEs 208 through 210. Additionally, some embodiments of the network communication system 200 include similar components arranged in another manner to provide similar functionality, in one or more aspects. The base station 202 includes a processor 214, a memory device 216, and a channel estimation module 218. The base station 202 connects to the network interface 206 through the antenna 204. In one embodiment, the base station 202 is a radio receiver/transmitter, or transceiver. In some embodiments, the base station 202 is a hub of a local wireless network. In further embodiments, the base station 202 is a gateway between a wired network and a wireless network. In another embodiment, the base station 202 is a wireless communications station installed at a fixed location. In some embodiments, the base station is a wireless cell phone tower and/or wireless data tower.

In one embodiment, the processor 214 is a central processing unit (CPU) with one or more processing cores. In other embodiments, the processor 214 is a network processing unit (NPU) or another type of processing device such as a general purpose processor, an application specific processor, a multi-core processor, or a microprocessor. Alternatively, a separate processor may be coupled to the channel estimation module 218. In general, the processor 214 executes one or more instructions to provide operational functionality to the base station 202. The instructions may be stored locally in the processor 214 or in the memory device 216. Alternatively, the instructions may be distributed across one or more devices such as the processor 214, the memory device 216, or another data storage device.

In some embodiments, the memory device 216 is a random access memory (RAM) or another type of dynamic storage device. In other embodiments, the memory device 216 is a read-only memory (ROM) or another type of static storage device. In other embodiments, the illustrated memory device 216 is representative of both RAM and static storage memory within the network communication system 200. In some embodiment, the memory device 216 is content-addressable memory (CAM). In other embodiments, the memory device 216 is an electronically programmable read-only memory (EPROM) or another type of storage device. Alternatively, a separate memory device may be coupled to the channel estimation module 218. Additionally, some embodiments store the instructions as firmware such as embedded foundation code, basic input/output system (BIOS) code, cluster optimization code, and/or other similar code. In one embodiment, the depicted channel estimation module 218 computes the channel estimation of a given cell. In some embodiments, the channel estimation module 218 computes the channel estimation for a given cell based on an IC process. In one embodiment, the channel estimation module 218 implements a linear IC process. Alternatively, the channel estimation module 218 may implement a non- linear IC process.

In one embodiment, the antenna 204 transmits and/or receives network communication between the base station 202 and at least one of the plurality of UEs 208 through 210. In one embodiment, the antenna 204 is an omni-directional antenna. In another embodiment, the antenna 204 is a directional antenna. In one embodiment, the antenna 204 is panel, patch, sector, point-to-point antenna, or other similar antenna. In a further embodiment, the antenna 204 includes multiple antennas attached to the base station 202, such as the multiple antennas used in multiple-input and multiple-output (MIMO) systems. The antenna 204 is connected to the network interface 206. The network interface 206 facilitates over-the-air (OTA) transmissions such as Worldwide Interoperability for Microwave Access (WiMAX), Wireless Fidelity (Wi-Fi), 3^rd Generation Partenership Project (3GPP), Universal Mobile Telecommunication System (UMTS), etc., as well as physical transmissions, such as Transmission Control Protocol / Internet Protocol (TCP/IP).

In one embodiment, the UEs, including UE-I 208 through UE-N 210, connect to the network interface 206 through antennas such as the antenna 226 and the antenna 234. In some embodiments, the UEs 208 through 210 transmit and/or receive network communications with at least one base station 202. Thus, the UEs 208 through 210 connect to the base station 202 through the network interface 206. In one embodiment, the UEs 208 through 210 receive a signal from the base station 202. In another embodiment, the base station 202 receives a signal from at least one of the plurality of UEs 208 through 210. The received signal may include a plurality of signals, including an intended signal and at least one interference signal. In other words, UE-I 208 may receive an intended signal from the base station 202, and may also receive an interference signal, or unintended signal, for UE-N 210. In general, the interference signal is a signal that is intended for reception by UE-N 210. Thus, such a received signal includes the signal intended for UE-I 208 and the signal intended for UE-N 210 that is considered interference.

In one embodiment, the UE-I 208 includes a central processor unit (CPU) 220, a memory device 222, a channel estimation module 224, and a UE antenna 226. In some embodiments, at least some of the components of the UE-I 208 are substantially similar to and operate in a substantially similar manner as the components described above with reference to the base station 202. The UE-N 210 includes a central processor unit (CPU) 228, a memory device 230, a channel estimation module 232, and a UE antenna 234. In some embodiments, at least some of the components of the UE-N 210 are substantially similar to and operate in a substantially similar manner as the components described above with reference to the base station 202. In some embodiments, UE-I 208 is a wireless device that a user may use to send and/or receive network communications, via the UE antenna 226, across a network interface 206. Exemplary wireless devices include cell phones, personal digital assistants (PDAs), laptops, desktops, and other similar receiving and/or transmitting devices. In some embodiments, at least one of the UEs 208 through 210 is a stationary wireless device, such as a desktop. Alternatively, at least one of the UEs 208 through 210 is a mobile wireless device, such as a cell phone. Fig. 3 depicts a schematic diagram of one embodiment of the channel estimation module 218 of Fig. 2. The illustrated channel estimation module 300 includes a raw channel impulse response (CIR) estimator 302, an interference cancellation (IC) channel estimator 304, and a post processing module 306. Although the depicted channel estimation module 300 is shown and described herein with certain components and functionality, other embodiments of the channel estimation module 300 may be implemented with fewer or more components or with less or more functionality. For example, some embodiments of the channel estimation module 300 include a plurality of raw CIR estimators 302, a plurality of IC channel estimators 304, and a plurality of post processing modules 306. Additionally, some embodiments of the channel estimation module 300 include similar components arranged in another manner to provide similar functionality, in one or more aspects. In some embodiment, the channel estimation module 300 is substantially similar to the channel estimation modules 218, 224, and/or 232 shown in Fig. 2.

In one embodiment, the depicted channel estimation module 300 computes the channel estimation of a given cell. The depicted channel estimation module 300 maintains substantially good JD performance and enables operation of UE-I 208 through UE-N 210 when the Factory Reuse Factor (FRF) is set equal to one, or FRF=I. In some embodiments, the channel estimation module 300 computes the channel estimation for a given cell based on an IC process.

In some embodiments, the IC process is based on the interference and distortion of an intended signal that is intended for reception by an intended user equipment and the interference and distortion of an interference signal that is intended for reception by a user equipment different from the intended user equipment. In one embodiment, the UE-I 208 is the intended-user-equipment and the UE-N 210 is the other user equipment that is interfering with the signal intended for the UE-I 208, and vice versa. In some embodiments, there may be a plurality of user equipments that interfere with the intended signal of the UE-I 208, and vice versa.

In one embodiment, the channel estimation module 300 receives a signal from a base station 202. In another embodiment, the channel estimation module 300 receives a signal from at least one of the plurality of UEs 208 through 210. As described above, a received signal includes a plurality of signals, including an intended signal that is intended for a first cell (e.g., associated with the UE-I 208) and at least one interference signal that is not intended for the first cell, but is intended for a second cell (e.g., associated with the UE-N 210). The interference signal is considered interference to the first cell because the interference signal is not intended for the first cell. The first cell receives at least a portion of the interference signal in addition to the intended signal. The channel estimation module 300 computes a channel estimation for the intended signal and each interference signal included in the received signal.

In one embodiment, the depicted channel estimation module 300 computes the channel estimation of a given cell according to at least one of a plurality of channel estimation operations. In some embodiments, the depicted channel estimation module 300 computes the channel estimation of a given cell according to three channel estimation operations. One operation may include a raw CIR estimation operation to estimate a raw CIR. Another operation may include an interference cancellation based channel estimation operation to refine the raw CIR estimate.

Another operation may include a post processing operation to post-process the refined CIR and generate the final CIR. Each operation may include multiple sub-operations. In one embodiment, the IC channel estimator 304 includes an iterative function. The IC channel estimator 304 iteration may include an operation to estimate the most possible path, a operation to cancel the interference from other cell's CIR, a operation to estimate the next path, and so on. There may be some operations before the iteration for preparation and initial conditioning. The refined CIR is then sent from the IC channel estimator 304 to the post processing module 306.

In one embodiment, the post processing module 306 further refines the CIR by path combination and noise removal. In one embodiment, the post processing module 306 computes the noise power and the active window set.

In one embodiment, the raw CIR estimator 302 receives, in the received signal, a midamble training sequence, together with parameters for all cells associated with the received signal, including interference cells. In another embodiment, the raw CIR estimator 302 estimates a raw CIR based on the received midamble training sequence and cell parameters. The raw CIR estimator 302 sends the raw CIR estimate to the IC channel estimator 304. In one embodiment, the raw CIR estimator 302 estimates a raw CIR for every cell associated with the received signal, and sends all the raw CIR estimates associated with the received signal to the IC channel estimator 304. Generating a raw CIR estimate gives the IC channel estimator 304 the ability to work from a raw estimate of the CIR instead of working from an unprocessed received signal. Generating a refined CIR from a raw estimate of the CIR, in some embodiments, substantially reduces a computational load of a UE 208 and/or a base station 202 relative to generating a refined CIR from an unprocessed received signal.

In one embodiment, the IC channel estimator 304 refines the raw CIR estimate and generates a refined CIR from the raw CIR estimate. In another embodiment, the IC channel estimator 304 generates a refined CIR for each cell associated with the received signal. The IC channel estimator 304 produces a refined CIR and sends the refined CIR to the post processing module 306. As depicted, the IC channel estimator 304 includes a cancellation order determination module 308, a cancellation CIR buffer 310, a path combination detection module 312, an interference reconstruction module 314, a Basic Cross Cell Interference Cancellation Vector (BCCICV) generation storage module 316, an interference cancellation module 318, and an output CIR buffer 320.

In some embodiments, the raw CIR estimate is sent from the raw CIR estimator 302 to the cancellation order determination module 308, the cancellation CIR buffer 310, and the output CIR buffer 320 of the IC channel estimator 304. The cancellation order determination module 308 calculates an order in which the IC channel estimator 304 refines each raw CIR estimate associated with the received signal. In other words, the cancellation order determination module 308 may determine that the IC channel estimator 304 first refines the raw CIR estimate associated with the intended signal (i.e., the signal intended for a particular user equipment) and then refines the raw CIR estimate associated with an interference signal, and so on.

For a given received signal, the IC channel estimator 304 cycles through each raw CIR estimate received from the raw CIR estimator 302, according to the order determined by the cancellation order determination module 308, until each raw CIR estimate is refined by the IC channel estimator 304. The path combination detection module 312, the interference reconstruction module 314, and the interference cancellation module 318 are components of this iterative function described above.

The cancellation CIR buffer 310 stores each of the raw CIR estimates generated by the raw CIR estimator 302. As the iterative function described above cycles through and refines a raw CIR estimate, the refined CIR is stored in the cancellation CIR buffer 310. The path combination detection module 312 calculates the cancellation path parameters associated with each cell. The cancellation path parameters have two parts, the amplitude and phase, which are represented by a complex number, and the path position and quantized amplitude vector according to the number of paths associated with the received signal. The interference reconstruction module 314 reconstructs the interference vectors for each cell associated with the received signal. The interference cancellation module 318 then performs interference cancellation to cancel out the interference associated with the received signal. In one embodiment, the interference cancellation module 318 implements a linear interference cancellation (IC) process. Such linear detection includes zero-forcing block equalization (ZF-BLE), and minimum mean square error block equalization (MMSE-BLE). In linear detection, the received signal, including intended signals and interference signals, is uncorrelated by a linear transformation. The linear transformation is computed by measuring all cross correlations between pairs of user codes and then inverting the resulting matrix of cross-correlations. Alternatively, the interference cancellation module 318 implements a non-linear interference cancellation (IC) process that performs a non-linear transformation. In some embodiments, a non-linear IC process obtains better performance than a linear IC process (e.g., the aforementioned ZF-BLE, MMSE-BLE). Exemplary non-linear IC processes include a successive interference cancellation (SIC) and a parallel interference cancellation (PIC). One of the functions of the non-linear IC technique is iterative detection. By performing the interference cancellation based on the previously detected symbols at each iterative operation, detection performance may be continuously refined. In one embodiment, the BCCICV generation storage module 316 generates basic cross-cell interference cancellation vectors for each cell associated with the received signal. In another embodiment, the BCCICV generation storage module 316 stores the generated cross-cell interference cancellation vectors. As the iterative function of the IC channel estimator 304 cycles through and refines each raw CIR estimate corresponding to a particular cell, the BCCICV generation storage module 316 sends the corresponding cross-cell interference cancellation vector for the particular corresponding cell to the interference reconstruction module 314. The interference reconstruction module 314 then uses the corresponding cross-cell interference cancellation vector to reconstruct the interference vector for the particular corresponding cell.

In one embodiment, the output CIR buffer 320 receives the raw CIR estimate from the raw CIR estimator 302. In another embodiment, the output CIR buffer 320 also receives the intended signal and plurality of interference signals that have been processed by the iterative function of the IC channel estimator 304. In one embodiment, the processed intended signal includes a refined CIR of the intended signal. In another embodiment, the processed interference signal includes a refined CIR of the interference signal. In some embodiments, the output CIR buffer 320 outputs a refined CIR to the post processing module 306. When the cancellation CIR buffer 310 determines that each cell corresponding to a received signal has been processed the output CIR buffer 320 outputs all the refined CIRs corresponding to each cell associated with the received signal. In other words, when the cancellation CIR buffer 310 determines that the corresponding raw CIR estimates for each cell have been refined by the iterative function of the IC channel estimator 304, and that no raw CIR estimates remain to be refined, the cancellation CIR buffer 310 sends a notification signal to the output CIR buffer 320 to send all the refined CIRs to the post processing module 306.

In one embodiment, the post processing module 306 further refines the refined CIR and outputs the final CIR. In some embodiments, the post processing module 306 outputs the final CIR, the calculated noise power, and the active window set for each cell associated with the received signal. The post processing module 306 includes a CIR reorder module 322, a path combination module 324, an Active Window (ActWin) detection module 326, a noise power estimation module 328, and a noise removing module 330. In one embodiment, the CIR reorder module 322 reorders the CIR taps in order to further refine the refined CIR for each cell. The CIR reorder module 322 sends the refined CIR with the reordered taps to the ActWin detection module 326 and the path combination module 324. The ActWin detection module 326 detects the active window set, and the path combination module 324 combines the taps at the same position of the active windows. The ActWin detection module 326 then sends the detected active window set to the noise power estimation module 328. In addition, the path combination module 324 sends a path combination signal, where the taps are combined at the same position of the active windows, to the noise power estimation module 328 and the noise remover module 330. In one embodiment, for each cell associated with the received signal, the post processing module 306 also outputs the active window set generated by the ActWin detection module 326.

In one embodiment, the noise power estimation module 328 estimates the noise power corresponding to each cell that is associated with the received signal. In one embodiment, the noise power estimation module 328 estimates the noise power based on the path combination and ActWin detection signals that are received by the noise power estimation module 328 from the path combination module 324 and the ActWin detection module 326, respectively. The noise power estimation module 328 sends the estimated, or calculated, noise power to the noise remover module 330. In one embodiment, for each cell associated with the received signal, the post processing module 306 also outputs the calculated noise power generated by the noise power estimation module 328.

In one embodiment, the noise remover module 330 removes the noise taps associated with each refined CIR. The noise remover module 330 removes the noise taps for each refined CIR based on the calculated noise power that the noise remover module 330 receives from the noise power estimation module 328. In one embodiment, the noise remover module 330 generates a final CIR by removing the noise taps from a refined CIR. In another embodiment, for each cell associated with the received signal, the post processing module 306 outputs the final CIR generated by the noise remover module 330. Thus, through the above described process, the channel estimation module 300 generates a final CIR for a signal received by a UE 208 through 210 and/or base station 202.

The channel estimation operations described above are based on one burst (Fig. 1). There may be some extensions for different applications, such as combining in the time domain and multi-carrier TD-SCDMA. In one embodiment, for combining in the time domain, the channel estimation results and the intermediate results of adjacent bursts are combined to increase the channel estimation accuracy, substantially reducing the MSE (e.g., 10^"3 dB) when the mobile channel is a slow varying channel. For example, such a combination may be valid when the UE is moving at a pedestrian speed. In another embodiment, the multi-carrier TD-SCDMA is an extension of the single carrier TD-SCDMA. Data are transmitted on multiple carriers to increase the data rate. The bursts on the carriers are of the same format, simultaneously passing relatively the same channel. In one embodiment, the channel estimation results and the intermediate results are combined to increase the channel estimation accuracy. Fig. 4 depicts a schematic flow chart diagram of one embodiment of a general channel estimation method 400 for use with the channel estimation module 300 of Fig. 3. Although the general channel estimation method 400 is described in conjunction with the channel estimation module of Fig. 3, some embodiments of the method 400 may be implemented with other types channel estimation modules. At block 402, the raw CIR estimator 302 receives a signal and estimates a raw CIR for every cell associated with the received signal. In one embodiment, the received signal includes a midamble training sequence and parameters of each cell associated with the received signal.

At block 404, the IC channel estimator 304 implements an iterative function to cancel interference and generate a refined CIR. In one embodiment, the IC channel estimator 304 implements the iterative function such that a single cell associated with the received signal is selected and processed by the iterative function until each cell associated with the received signal is processed. In another embodiment, the IC channel estimator 304 implements an iterative function such that all the cells associated with the received signal are selected and processed in parallel. In a further embodiment, the IC channel estimator 304 cancels the interference among every cell according to a linear IC process and estimates a refined CIR based on the linear IC process. Alternatively, the IC channel estimator 304 cancels the interference among every cell according to a non-linear IC process and estimates a refined CIR based on the non-linear IC process.

After the IC CIR refining process completes and generates a refined CIR, at block 406, the post processing module 306 post-processes the refined CIR to produce a final CIR. In one embodiment, the post processing module 306 post-processes a refined CIR successively, cell by cell. In another embodiment, the post processing module 306 post-processes all the refined CIRs in parallel for all the cells associated with the received signal.

Fig. 5 depicts a schematic flow chart diagram of one embodiment of a raw channel impulse response (CIR) estimation operation 402 for use with the general channel estimation method 400 of Fig. 4. Although the raw channel impulse response (CIR) estimation operation 402 is described in conjunction with the general channel estimation method 400 of Fig. 4, some embodiments of the operation 402 may be implemented with other types of channel estimation methods. At block 502, the raw CIR estimator 302 generates a midamble inverse matrix:

Gc^"1 = {diag{FFT(mc_b )))^"1 , 1 < c ≤ C (5)

At block 504, from the generated midamble inverse matrix, the raw CIR estimator 302 determines the raw channel estimation by de-convolution in the frequency domain: he = IFFT(GC^~1 * FFT \e_m)) , 1 < c < C (6) Fig. 6 depicts a schematic flow chart diagram of one embodiment of an interference cancellation based channel estimation operation 404 for use with the general channel estimation method of Fig. 4. Although the interference cancellation based channel estimation operation 404 is described in conjunction with the general channel estimation method 400 of Fig. 4, some embodiments of the operation 404 may be implemented with other types of channel estimation methods. At block 602, the IC channel estimator 304 generates the basic cross-cell interference cancellation vectors: xij = IFFτ(όr^ι * FFT (mj _b )), l ≤ i ≠ j ≤ C (7)

where q -xij , Q₁ ≤ q ≤ Q , are stored in memory to reduce computational load. Q is the path amplitude quantize level. Q_t is determined by the noise threshold in the path combination detection process, i.e., Q=A and Q_t=3>.

At block 604, the IC channel estimator 304 initializes the interference cancellation buffers.

In one embodiment, the cancellation CIR buffer 310 is given by: xhc = he , 1 < c ≤ C (8)

In one embodiment, the output CIR buffer is given by: h c = he , 1 < c ≤ C (9)

At block 606, the IC channel estimator 304 calculates the cancellation order cell by cell. At block 608, the IC channel estimator 304 determines the next processing cell according to the calculated cancellation order. For example, cell c is the next processing cell according to equations (8) and (9).

At block 610, the IC channel estimator 304 determines the cancellation path parameters from the path combination detection module 312. In one embodiment, the cancellation path parameters have two parts:

(1) The amplitude and phase: A_p , a complex number; and The path position and quantized amplitude vector give by:

where 1 < D_n < P , Q_t ≤Q_an ≤Q , and 1 < n ≤ N_p . N_pis the number of paths for combination/detection. At block 612, the IC channel estimator 304 reconstructs the interference vectors for each cell according to:

Ij = A_p∑RRShifi(ρ_ay xjc,D_n-l), l≤j≠c≤C (11) κ=l where RRShift(a,d) is to round right shift vector a d elements. At block 614, the IC channel estimator 304 cancels the interference from the cancellation buffers. In one embodiment, the cancellation CIR buffer is given by: xhj = xhj-Ij, l≤j≠c≤C (12)

In another embodiment, the output CIR buffer 310 is given by:

At block 616, the IC channel estimator 304 updates a cell's cancellation buffer by: xhc_Dn = xhc_Dn - A_p ^■ Q_an , l≤n≤N_p (14)

At block 618, the IC channel estimator 304 determines whether each cell associated with the received signal is processed. If the IC channel estimator 304 determines that every cell associated with the received signal is processed, or that the iterative function of the IC channel estimator 304 has processed Ni_ter times, then the IC based channel estimation operation 404 proceeds to block 620. Otherwise, if the IC channel estimator 304 determines that there is at least one cell remaining unprocessed, then the IC channel estimation operation 404 proceeds back to block 608.

At block 620, the IC channel estimator 304 sends the refined CIRs, he , l≤c≤C,to the post processing module 306. Fig. 7 depicts a schematic flow chart diagram of one embodiment of a post processing operation 406 for use with the general channel estimation method 400 of Fig. 4. Although the post processing operation 406 is described in conjunction with the general channel estimation method 400 of Fig. 4, some embodiments of the operation 406 may be implemented with other types of channel estimation methods. At block 702, the post processing module 306 reorders the CIR taps according to:

Krdj ⁼ "mal(j +112-(K-I)W -I J>)+1 ' ^ - J - P (15)

At block 704, the post processing module 306 detects an active window set according to:

TH₂ = P_MX ^• a . For example, t₂ = ₂ r * -| . (18)

ActWin = {k : P_wm (k) > THl) (19)

At block 706, the post processing module 306 combines the taps at the same position as the active window set according to:

P_∞a = ∑P_^Jk) (20) ke ActWin )

At block 708, the post processing module 306 estimates the noise power, according to the algorithms in the following IF-ELSE statement:

InactWin = {k: \ ≤ k ≤ K} \ ActWin

If InactWin ≠ φ

W ^■ P ^■ size(InactWin) _keInactW ^™n

Else

_{TH =} — K - Ptotai _{For examp}ι_e f = 1/128 . (23) sizeyActWin)

End

At block 710, the post processing module 306 removes the noise taps according to: TH₃ = max (t₃ ^■ σ_n ² , TH_n ) . For example, t₃=2. (26)

At block 712, the post processing module 306 outputs the final CIR h . Fig. 8 depicts a schematic flow chart diagram of one embodiment of a cancellation order operation 606 for use with the general channel estimation method of Fig. 4. Although the cancellation order operation 606 is described in conjunction with the general channel estimation method 400 of Fig. 4, some embodiments of the operation 606 may be implemented with other types of channel estimation methods. At block 802, the cancellation order determination module 308 calculates the power sum of the taps at the same position in the window set according to:

^(^C _'O = ∑I^-_DJ² Λ ^< i ^< W , \^<c^< C (28) k=\

At block 804, the cancellation order determination module 308 determines the maximum power and the second maximum power of the taps according to:

P_tap,^ (c) = maxtø, (c,i)l l ≤ c ≤ C (29)

At block 806, the cancellation order determination module 308 calculates the power ratio according to:

, N. P ran, max ( Vc-V) ₁ . . _/~, _/"> _{1 \} rp (^c) = -β-^JL — , l ≤ c ≤ C (31) tap ,2nd max V^ / At block 808, the cancellation order determination module 308 sorts the power ratio in decreasing order and outputs the results according to: order = sort\r_p (c)\ (32)

Fig. 9 depicts a schematic flow chart diagram of one embodiment of a path combination detection operation 610 for use with the general channel estimation method 400 of Fig. 4. Although the path combination detection operation 610 is described in conjunction with the general channel estimation method 400 of Fig. 4, some embodiments of the operation 610 may be implemented with other types of channel estimation methods.

Supposing the current processing cell is c, at block 902, the cancellation order determination module 308 calculates the power of the cancellation CIR taps according to:

At block 904, the cancellation order determination module 308 combines the power of the taps at the same position in the windows according to:

P ¹ tap, i =

V {-_Ip¹ h,ι+(k-\)W ' \ ^l < ~ i ^l < ~ W ^Yr k=\ At block 906, the cancellation order determination module 308 determines the maximum power taps according to:

^_1x = ^max(O ⁽³⁵⁾

At block 908, the cancellation order determination module 308 extracts the set of the taps at position D of the windows according to:

D^ D + ij - Vj- W , \ ≤ j ≤ K (38) At block 910, the cancellation order determination module 308 removes the noise taps according to the following algorithms and IF statement embedded in a FOR loop:

TH₁ = P_{h max} • t_x . For example, t_γ = 0.25 . (40)

For 1 < j ≤ K

^J/ KJf < ^i

Remove h_{tap }} from h_tap , and remove D_} from D

End End

At block 912, the cancellation order determination module 308 combines the taps for the path phase according to:

θ = angle\

- h lap, j (41)

At block 914, the cancellation order determination module 308 quantizes the amplitude of the taps according to:

. For example, Q=4. (42)

^~Q

-tap, j

Qa, = + 0.5 Q_t ≤ Q_{a n} ≤ Q , Q₁ = V^ - β + 0.01 (43)

A step

At block 916, the cancellation order determination module 308 outputs the cancellation path parameters according to:

Jθ

^Ap = ^Astep - e (44)

(45) where N_p = the number of residual elements in h_tap .

Fig. 10 depicts a mean square error (MSE) performance data chart 1000 of the channel estimation module 300 of Fig. 3. The performance of the Interference Cancellation based Channel Estimation (ICCE) of the general channel estimation method 400, used in correlation with the channel estimation module 300, is show in Fig. 10. Fig. 10 shows the cell CIR MSE when there are three cells and the interference power from each cell is OdB to the serving cell signal power. The first three lines, serve cell MSE original 1002, neighbor cell-1 MSE 1004, and neighbor cell-2 MSE 1006, are indicative of MSE performance of channel estimation using FFT-based channel estimation without using the general channel estimation method 400 method and/or the channel estimation module 300. The second set of three lines, serve cell MSE with ICCE 1008, neighbor cell-1 MSE with ICCE 1010, and neighbor cell-2 MSE with ICCE 1012, are indicative of the MSE performance using the general channel estimation method 400 with the channel estimation module 300. In one embodiment, using the general channel estimation method 400 with the channel estimation module 300 substantially reduces the MSE of the estimated CIR (e.g., from 10° to 10^"2 dB) with only one received training sequence, or midamble, from the time slot burst structure 100. As depicted in the MSE performance data chart 1000 of Fig. 10, the neighbor cell CIR MSE has relatively the same performance as the serving cell CIR MSE. The description above is for the C = 3 cell (1 serve cell and 2 neighbor cells) case, but the above described methods 400, 500, 600, 700, 800, and 900 in conjunction with the interference cancellation based channel estimation module 300 are not limited by the number of cells.

Embodiments of the IC channel estimator 300 and general channel estimation method 400 described can have a real and positive impact on network communications. The IC channel estimation algorithms enable a low-complexity with good performance channel estimation method and apparatus based on interference cancellation. When FRF= 1 , the depicted channel estimation module 218 maintains substantially good JD performance and enables operation of UE-I 208 through UE-N 210 when UE-I 208 through UE-N 210 are communicating in a near vicinity and/or with the same base station 202. The IC channel estimator 304 and general channel estimation method 400 incorporate interference cancellation computations in order to substantially increase the accuracy of channel estimation. The Mean Square Error (MSE) of the estimated Channel Impulse Response (CIR) can be reduced (e.g., 10^~2 dB) with a single received midamble training sequence.

Although the operations of the method(s) herein are shown and described in a particular order, the order of the operations of each method may be altered so that certain operations may be performed in an inverse order or so that certain operations may be performed, at least in part, concurrently with other operations. In another embodiment, instructions or sub-operations of distinct operations may be implemented in an intermittent and/or alternating manner. Although specific embodiments of the invention have been described and illustrated, the invention is not to be limited to the specific forms or arrangements of parts so described and illustrated. The scope of the invention is to be defined by the claims appended hereto and their equivalents.

Claims

What is Claimed is:

1. A network communication system comprising: a receiver to receive a signal from a transmitter, wherein the received signal comprises an intended signal and a plurality of interference signals; and a channel estimation module coupled to the receiver, the channel estimation module to generate a final channel impulse response from the received signal in conjunction with an interference cancellation (IC) process, wherein the channel estimation module comprises: a raw channel impulse response estimator to estimate a raw channel impulse response of the received signal; and an IC channel estimator coupled to the raw channel impulse response estimator, the IC channel estimator to receive the estimated raw channel impulse response from the raw channel impulse response estimator and to generate, according to the IC process, a refined channel impulse response from the estimated raw channel impulse response.

2. The network communication system of claim 1 , wherein the channel estimation module further comprises a post processing module coupled to the IC channel estimator, the post processing module to receive the refined channel impulse response from the IC channel estimator and to generate the final channel impulse response from the refined channel impulse response.

3. The network communication system of claim 2, wherein the IC channel estimator comprises a path combination detection module, the path combination detection module to combine multipath reception signals of the received signal in order to generate a direct path estimate of the received signal, wherein the multipath reception signals travel along an actual direct path and a plurality of reflected paths between the transmitter and the receiver.

4. The network communication system of claim 3, wherein the IC channel estimator further comprises: an interference reconstruction module coupled to the path combination detection module, the interference reconstruction module to reconstruct a detected interference from the received signal; an interference cancellation module coupled to the interference reconstruction module, the interference cancellation module to cancel the detected interference associated with the received signal according to the IC process; a cancellation channel impulse response buffer coupled to the interference cancellation module, the cancellation channel impulse response buffer to store the estimated raw channel impulse response estimate and a result of an iteration function of the IC process, and to determine when the intended signal and each of the plurality of interference signals are processed by the iteration function; and an output channel impulse response buffer coupled to the cancellation channel impulse response buffer, the output channel impulse response buffer to receive the refined channel impulse response of the received signal and to send the refined channel impulse response to the post processing module in response to a determination that the intended signal and each of the plurality of interference signals are processed by the iteration function.

5. The network communication system of claim 3 , wherein the post processing module further comprises a noise power estimation module, the noise power estimation module to receive the direct path estimate from the path combination detection module and a detected active window set signal from an active window detection module, and to estimate a noise power according to the received direct path estimate and detected active window set signal.

6. The network communication system of claim 1 , wherein the IC channel estimator comprises a cancellation order determination module, the cancellation order determination module to determine an order in which to perform interference cancellation on the intended signal and the plurality of interference signals.

7. The network communication system of claim 1 , wherein the channel estimation module is further configured to generate the final channel impulse response according to a predetermined frequency reuse factor, wherein the predetermined frequency reuse factor is a number of central frequencies that a cell uses to transmit and receive network communications.

8. A method, comprising: receiving a signal from a transmitter, wherein the received signal comprises an intended signal and a plurality of interference signals; estimating a raw channel impulse response of the received signal, wherein the estimated raw channel impulse response comprises an initial channel impulse response of the received signal, and wherein the initial channel impulse response is calculated by a fast Fourier transform; generating a refined channel impulse response from the estimated raw channel impulse response according to an interference cancellation (IC) process, wherein the refined channel impulse response comprises a refinement of the initial channel impulse response via the IC process; and generating a final channel impulse response of the received signal in conjunction with the IC process.

9. The method of claim 8, further comprising generating the final channel impulse response from the refined channel impulse response, wherein the final channel impulse response comprises a further refinement of the refined channel impulse response via a post-process.

10. The method of claim 8, further comprising determining an order in which to perform interference cancellation on the intended signal and the plurality of interference signals.

11. The method of claim 8, further comprising combining multipath reception signals of the received signal in order to generate a direct path estimate of the received signal, wherein the multipath reception signals travel along an actual direct path and a plurality of reflected paths between the transmitter and a receiver.

12. The method of claim 11 , further comprising estimating a noise power according to the direct path estimate and a detected active window set signal.

13. The method of claim 8, further comprising generating the final channel impulse response according to a predetermined frequency reuse factor, wherein the predetermined frequency reuse factor is a number of central frequencies that a cell uses to transmit and receive network communications.

14. The method of claim 8, further comprising: reconstructing a detected interference from the received signal; cancelling the detected interference from the intended signal and the plurality of interference signals according to the IC process; storing the estimated raw channel impulse response estimate and a result of an iteration function of the IC process; and determining when the intended signal and each of the plurality of interference signals are processed by the iteration function of the IC process.

15. An apparatus, comprising: means for receiving a signal from a transmitter, wherein the received signal comprises an intended signal and a plurality of interference signals; means for estimating a raw channel impulse response of the received signal, wherein the estimated raw channel impulse response comprises an initial channel impulse response of the received signal, and wherein the initial channel impulse response is calculated by a fast Fourier transform; means for generating a refined channel impulse response from the estimated raw channel impulse response according to an IC process, wherein the refined channel impulse response comprises a refinement of the initial channel impulse response via the IC process; and means for generating a final channel impulse response of the received signal in conjunction with the IC process.

16. The apparatus of claim 15, further comprising means for generating the final channel impulse response from the refined channel impulse response, wherein the final channel impulse response comprises a further refinement of the refined channel impulse response via a post-process.

17. The apparatus of claim 15, further comprising means for determining an order in which to perform interference cancellation on the intended signal and the plurality of interference signals.

18. The apparatus of claim 15, further comprising means for combining multipath reception signals of the received signal in order to generate a direct path estimate of the received signal, wherein the multipath reception signals travel along an actual direct path and a plurality of reflected paths between the transmitter and the means for receiving the signal from the transmitter.

19. The apparatus of claim 18, further comprising means for estimating a noise power according to the direct path estimate and a detected active window set signal.

20. The apparatus of claim 15, further comprising: means for reconstructing a detected interference from the received signal; means for cancelling the detected interference from the received signal according to the IC process; means for storing the estimated raw channel impulse response and a result of an iteration function of the IC process; and means for determining when the intended signal and each of the plurality of interference signals are processed by the iteration function of the IC process.