WO2009098093A2

WO2009098093A2 - Inverter arrangement for feeding photovoltaically generated power into a public network

Info

Publication number: WO2009098093A2
Application number: PCT/EP2009/001000
Authority: WO
Inventors: Heribert Schmidt; Bruno Burger
Original assignee: Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.
Priority date: 2008-02-08
Filing date: 2009-02-06
Publication date: 2009-08-13
Also published as: WO2009098093A3; DE102008050765A1

Abstract

The invention relates to an inverter arrangement for feeding photovoltaically generated power into a public network. Said inverter arrangement comprises a DC converter arrangement that can be connected to the positive and to the negative terminal of a solar generator and an inverter circuit. The DC converter arrangement comprises an input buffer capacitor, a converter and at least one intermediate capacitor. The reference potential of the DC converter arrangement is the positive connecting line between the positive terminal for the solar generator and the intermediate capacitor and the converter lies in the connection between the negative terminal to the solar generator and the negative terminal of the intermediate capacitor.

Description

Inverter arrangement for feeding photovoltaic energy into a public

network

The invention relates to an inverter arrangement for feeding photovoltaic energy obtained in a public network according to the preamble of the main claim.

Such inverter arrangements are well known and Fig. 1 shows the basic structure of a system for feeding a photovoltaic energy obtained in the public network. An inverter is connected to the public network 6 on its output side, wherein this connection can be made in one or more phases via the phases P 1 to P 3 as well as a neutral conductor N and a protective conductor PE (protective earth, ground potential). On the input side, the inverter 1 is connected to one or more solar generators 5, whereby Depending on the circuit technology of the inverter 1, certain potentials are set at the connection terminals of the solar generator 5 with respect to the ground potential PE, which are designated by U _P i _us and U _M i _nu s. The solar generator 5 consists of a series circuit of many individual cells, so that ultimately every single cell assumes a defined potential compared to ground potential.

Certain cell technologies, in particular thin-film technologies, react with a decrease in performance or damage to the potential of the cells in relation to the earth. In many cases, high negative voltages are detrimental to earth potential.

FIG. 2 shows a system according to FIG. 1, in which a known frequently used inverter topology is explained in more detail. It consists of an actual inverter circuit 2, symbolically represented as a bridge circuit, which can be configured in one or more phases in a multitude of forms. Transformerless topologies which have a very high efficiency and at the same time low weight and low costs are particularly advantageous. Such topologies require a designated U _ZK input voltage, which must be greater than the amplitude of the AC line voltage, ie greater than about 350 V in single-phase systems, in three-phase topologies greater than about 700 V. To extend the input voltage range to lower voltages In many cases, the actual inverter circuit 2 is preceded by a DC-DC converter 3, these groups being combined in practice to form a structural inverter arrangement 1. In the one shown in Fig. 2, in general known prior art, the DC-DC converter 3 comprises an input buffer capacitor C ₀ , a DC / DC converter 4, which converts the input voltage to a higher voltage and in the connection between the input U _P i _us and an intermediate circuit voltage terminal + U _ZK , as well as an output or _{DC link capacitor} C _zκ . Depending on the requirements of the inverter circuit 2, this can be designed as a single capacitor or as a series connection of several partial capacitors. In the case of two _{DC link capacitors} , the illustrated intermediate _{circuit voltage} U _zκ, for example, is divided symmetrically, wherein the mean potential can be connected _inside the device via a line to the neutral of the public network and thus has ground potential. This line is indicated by dashed lines in Fig. 2.

The negative terminal U _M i _nu s of the solar generator 5 is shown in FIG. 2 directly connected to the negative DC link -U _2K . In an inverter _arrangement with a symmetrically divided _{DC link voltage} U _zκ of 700 V is therefore shown in FIG. 3, the negative terminal U _minus on a voltage of -350 V. The potential of the positive terminal results from the operating point voltage U _{SG of} the solar generator. If this is less than 350 V, then all cells have a negative potential compared to earth. At a higher voltage, as shown by way of example in FIG. 3, a part of the cells has a low positive potential. It has been shown that the high negative potential of -350 V has a damaging effect on certain solar cells.

An improvement of an inverter arrangement which takes this fact into account, is proposed in DE 10 2004 037 446 B4, wherein an embodiment of this improvement in Fig. 4 is shown. According to this prior art, the Gleichspannungswand- leranordnung 3 is constructed completely symmetrical, which is indicated by the blocks 4a, 4b. This also divides the solar generator voltage U _SG symmetrical to the ground potential, which is shown in Fig. 5. As a result, depending on the height of the solar generator voltage U _SG, less high negative potentials arise. This approach brings an improvement over the prior art presented above, yet negative voltages can occur at a harmful level, so that the function of the circuit arrangement or of the solar cells can be impaired.

The invention is therefore based on the object to provide an inverter arrangement for feeding photovoltaic energy obtained in a public grid, are avoided with the high negative potentials of the solar cell to ground potential.

This object is achieved by the characterizing features of the main claim in conjunction with the features of the preamble.

The measures specified in the dependent claims advantageous refinements and improvements are possible.

In that the reference potential of the DC-DC converter arrangement is the positive connection line between the positive terminal for a solar generator and the DC link capacitor, and the converter is essentially located in the connection between the negative terminal of a solar generator or a solar generator. largeneratoranordnung and the negative terminal of the DC link capacitor, the solar cells of the solar generator depending on the solar generator voltage all have a positive potential to earth or a portion of the cells on a low, but tolerable negative potential. As a result, such modules, which are sensitive to negative potentials compared to earth, can be operated with transformerless inverters.

Advantageously, the inverter circuit may have a full bridge whose outputs are connected via a respective choke coil to output terminals for a single-phase network, whereby the inverter assembly for solar generators with a MPP voltage (voltage at the maximum solar generator power point) in the range up to about 350 V is particularly suitable ,

It is also advantageous if the inverter circuit has a half-bridge and the DC link capacitor consists of two series-connected capacitors, wherein the connection point between the capacitors with an output terminal and the output of the half-bridge are connected via a choke coil with another output terminal for a single-phase network , whereby the inverter arrangement is particularly suitable for solar generators with an MPP voltage in the range up to 700 V approximately.

An advantageous embodiment is that three half-bridges are provided to form a three-phase inverter arrangement, and each output of the half-bridges via a choke coil with Ausgangsanschlüss- sen and the connection point of the capacitors to another output terminal for the neutral conductor a three-phase network are connected, whereby advantageously can be fed symmetrically into the network.

It is particularly advantageous that two antiparallel freewheeling paths each having at least one switch and a diode between the respective outputs of the full bridge and the choke coils or the respective output of the half-bridge and the associated throttle coil lie. As a result, lossy reactive currents are avoided within the inverter circuit, resulting in an increased efficiency over the prior art and improved EMC behavior of the inverter circuit with it.

By combining this very effective inverter circuit with the DC-DC converter arrangement according to the invention, an inverter arrangement with a high efficiency, combined with a large input voltage range with simultaneous applicability for modules, which are sensitive to negative cell potentials to earth potential.

In summary, it can be said that the

Inverter arrangement characterized by a large input - voltage range and no or only small negative voltages to earth potential occur. The inverter arrangement is therefore particularly suitable for solar cells in which degradation occurs at high negative voltages to ground, for example by corrosion of the cell material or by efficiency reductions due to polarization processes within the cells, these effects occurring preferably in thin-film modules, but also in certain crystalline cells. Embodiments of the invention are illustrated in the drawings and are explained in more detail in the following description. Show it

1 is a schematic representation of an inverter assembly for feeding photovoltaic energy obtained according to the prior art,

Fig. 2 is a more detailed representation of a

Embodiment of an inverter arrangement according to the prior art,

3 shows a characteristic curve of the solar generator voltage in a converter arrangement according to FIG. 2, FIG.

4 shows a further circuit configuration of an inverter arrangement according to the prior art,

5 shows a characteristic of the solar generator voltage in an inverter arrangement according to FIG. 4, FIG.

6 is a block diagram of the inverter arrangement according to the invention,

7 shows a characteristic of the solar generator voltage or the potentials for an inverter arrangement according to FIG. 6, FIG.

Fig. 8 shows a circuit configuration of the

DC-DC converter arrangement in the inverter arrangement, 9 shows a first embodiment of a circuit configuration of the inverter circuit together with the DC voltage arrangement according to FIG. 8 as the first exemplary embodiment of the invention

Inverter arrangement,

10 shows a second embodiment of the inverter circuit together with the DC voltage converter arrangement for forming a second exemplary embodiment of the inventive inverter arrangement,

FIG. 11 shows a third embodiment of the inverter circuit together with the DC voltage converter arrangement for forming a third exemplary embodiment of the inventive inverter arrangement, and FIG

12 shows various embodiments of the freewheel branch used in the inverter arrangement according to the invention.

FIG. 6 shows a block diagram of the inventive inverter arrangement 1 which, as in the prior art, comprises a DC-DC converter arrangement 3 and an inverter circuit 2. The DC-DC converter arrangement 3 has the input buffer capacitor C ₀ , the intermediate _{circuit capacitor} C _zκ and the converter 4, which can also be referred to as a DC voltage boost converter. The inverter circuit 2 is shown in a three-phase manner in principle and thus comprises output connections P1, P2, P3, which also designate the three phases of a public network 6, and the neutral connection. Terminated from N as well as the PE connection, usually earth potential.

The positive terminal U _P i _{uss of} the solar generator 5 is connected to the positive DC link terminal + U _ZK of

_{DC link capacitor} C _zκ connected and the converter 4 is located in contrast to the prior art in the connection between the negative terminal U _minus the solar generator 5 and the intermediate _circuit connection _{-U zκ} .

As a result of such an arrangement, according to FIG. 7, which shows the potentials U _P i _us and U _M _ius over time, all cells have a positive potential at a _{DC link voltage} U _zK of 700 V and a solar generator _voltage U _SG of less than _350V towards earth. At higher solar generator voltages U _SG tolerable negative potentials occur in a few cells, as indicated in Fig. 7.

FIG. 8 shows an embodiment of the actual converter 4. It consists of a storage choke L ₀ and a rectifier diode D ₀ , which lie in the connection path between the negative solar generator connection U _M i _nUs and the negative DC link connection -U _ZK . In this case, the term of the diode D _{0 should} also include any other form of rectifier, it may also be embodied as a semiconductor switch, for example in the form of a so-called synchronous rectifier. Between the connection point of the storage inductor L ₀ and the diode D ₀ and the positive DC link + U _ZK is a semiconductor switch S ₀ , for example, a MOS-FET (metal oxide semiconductor field effect transistor) or IGBT (bipolar transistor with insulated gate electrode), with a clock frequency of eg 16 kHz. is clocked.

When switch S is closed, the diode blocks ₀ and D ₀ in the storage inductor L ₀ flows in time increasingly mender current, connected to an energy storage in the magnetic circuit of the inductor L _0th After opening the switch S ₀ , the inductor _current flows through the diode D ₀ in the _{DC link capacitor} C _zκ and charges it. The intermediate circuit capacitor C _zκ is _realized here as a series circuit of two capacitors C _ZK i and C _Z κ ₂ . By means of a control circuit not shown here, the ratio of the switch-on duration of the switch S ₀ to its switch-off duration is set in accordance with a pulse width modulation such that the required intermediate circuit voltage U _{2K is} reached. Of the

DC link in turn feeds the actual inverter 2, which is shown here symbolically as a bridge circuit.

A first preferred single-phase version of the inverter arrangement 1 is shown in FIG. 9, the DC-DC converter arrangement 3 corresponding to that according to FIG. 8. This is followed by a full bridge, which consists of the semiconductor switches Si ₀ , S _2O and S ₃₀ , S ₄₀ . The connection point between the switch Si ₀ and the switch S ₂ o is connected via a first choke coil L ₁ to a first output terminal Pl and the connection point between the switch S ₃₀ and the switch S ₄₀ via a second choke coil L ₂ with a second output terminal N connected. Between the output lines of the full bridge in front of the storage inductors Li and L ₂ , two antiparallel freewheeling paths XII are connected, which consist of the switches and free-running diodes S ₅ and D _5, respectively. S ₆ and D _{6 are} formed. In the positive half-wave of the mains voltage, the switches Si ₀ . and S ₄₀ with variable pulse width clocked in accordance with the pulse width modulation such that in the inductors L ₁ , L ₂ an ideal _two sinusoidal current builds up, which is then discharged into the network. The two antiparallel freewheeling paths thereby avoid the lossy reactive currents within the inverter circuit 2. In the positive half-wave of the mains voltage, the switch S _{5 is} permanently closed, resulting in a freewheeling path over S ₅ and D ₅ for the positive output current. In the negative half-wave of the mains voltage, the semiconductor _switches S _2O and S _{30 are} clocked accordingly and the freewheeling path S ₆ and D ₆ is closed.

Further possible embodiments of the free-wheeling paths XII b-e are indicated in FIGS. 12b-e.

In the described inverter arrangement according to

9, a minimum intermediate _{circuit voltage} U _zK of 350 V is required, which is stored in the intermediate _{circuit capacitor} C _zK , whereby the highest conversion _efficiency is achieved at this voltage.

FIG. 10 shows a further advantageous embodiment of the inverter arrangement 1 according to the invention. In contrast to the DC voltage converter arrangement according to FIG. 9, the intermediate circuit capacitor C _Z κ is designed as a series connection of the two capacitors C _ZK1 and C _ZK2 (as in FIG indicated), wherein the center tap between the two capacitors with the output terminal for the neutral conductor N is connected. The single-phase inverter circuit 2 consists of a half-bridge Si ₀ , S ₂₀ , described in connection with FIG. 9 freewheeling paths S ₅ , D ₅ , S _s and D ₆ and a single feed throttle L _x , which lies in the connecting line between the output of the half-bridge and the output terminal Pl. Again, the antiparallel freewheeling paths XII be in embodiments, as described in connection with FIG. 12, be formed.

In the positive half-wave of the mains voltage, only the switch Si _{0 is} clocked by the control circuit, not shown, wherein the inductor current in the switching pauses on the then permanently closed switch S ₅ and the freewheeling diode D ₅ continues to flow. In the negative half-cycle, the switch S _{20 is} clocked and the freewheeling path for the inductor current is formed by the switch S ₆ and the diode D ₆ .

In the inverter _arrangement according to FIG. 10, a minimum intermediate _{circuit voltage} U _zκ of 700 V is required, whereby the highest conversion efficiency is achieved at this voltage. The inverter is thus particularly suitable for solar generators with an MPP voltage in the range up to 700 V.

A further embodiment of the inventive inverter arrangement, namely a three-phase inverter arrangement 1, is shown in FIG. 11, one phase corresponding to the embodiment according to FIG. 10. There are thus three half-bridge branches Si ₀ , S ₂₀ , S ₃₀ , S ₄₀ , S ₅₀ and S _{50 are} provided at whose outputs in the respective connecting line to the output terminals Pl, P2, P3 each have a choke coil Li, L ₂ , L ₃ wherein between the respective starting and NeutralIeiter between the connection point between the two capacitors C _Z ki, C _ZK2 of DC link and the associated output terminal N, the antiparallel freewheeling paths are connected, which are symbolically combined in the blocks Hi, H ₂ and H ₃ . The embodiments of these freewheel paths H are shown in FIG. 12.

The three-phase design of the inverter also requires a _{DC link voltage} U _zκ of at least 700 V. In this three-phase inverter arrangement 1 is fed symmetrically into the public network 6. Furthermore, the output power is constant, so that the _{DC link capacitor} C _zκ can be chosen considerably smaller in _terms of its capacity, since it does not have to _store large amounts of energy.

FIG. 12 shows possible embodiments of the free-wheeling paths XII be and H, respectively, which are shown in FIGS. 9 to 11 are used. Each of the embodiments b, c, d, e may be chosen in conjunction with the inverter arrangements 1 of these figures. The embodiment according to FIG. 12b is shown by way of example in FIGS. 9 and 10 and already described in connection with these figures. The switches, which may be formed, for example, as a MOS-FET or IGBT, and the diodes D ₅ and D ₆ may be independently selected and optimized.

These components are provided in this embodiment as four individual semiconductors, each with its own housing.

In Fig. 12c is a cross-connection between the connection point of the switch S ₅ and the diode D ₅ of a freewheeling path and the diode D _e and the switch S _{6 of} the other freewheeling path is provided. These cross Connection does not change the basic mode of operation, however, it is thereby possible that so-called CoPacks can be used, in which in each case an IGBT transistor and a diode are connected in anti-parallel with each other. Also, in this arrangement, the inherent in MOS-FETs body diode can be used as a freewheeling diode.

The Fign. FIGS. 12d and 12e respectively show identically acting arrangements in which the order of switch and diode in the respective freewheeling paths has been reversed. This can result in advantages in the control of the switch.

In the drawings, which are to be understood as basic circuits, the positive connection line is drawn as a continuous line. Of course, filter throttles or measuring resistors or the like can lie in practice in this positive line, which can lead to small potential shifts, but do not abolish the basic principle.

Claims

claims

1. inverter device for supplying photo- tovoltaisch recovered energy in a public network with the positive and negative terminals (U _P i _us, U _minus) of a Solarge- nerators (5) connectable Gleichspannungswand- leranordnung (3) and an inverter circuit (2), wherein the DC-DC converter _arrangement comprises an input buffer capacitor (C ₀ ), a converter (4) and at least one DC link capacitor (C _zκ ), characterized in that the reference potential of the DC-DC converter arrangement, the positive connecting line between the positive terminal for the solar - Forming generator and the _DC link capacitor (C _Z κ) and the converter (4) in the connection between the negative terminal (U _M i _nu s) to the solar generator (5) and the negative terminal ( _{-U zκ} ) of the _{DC link} capacitor (C _zκ ) is located.

2. An inverter arrangement according to claim 1, characterized in that the converter (4) at least one with the negative terminal (U _M- .nus) connected storage inductor (L ₀ ) and one with the negative terminal ( _{-U zκ} ) of the DC link capacitor (C _zκ ) connected rectifier device

(D ₀ ) and a clocked switch (S ₀ ), wherein the clocked switch (S ₀ ) at the connection point of the storage inductor (L ₀ ) and the rectifier device (D ₀ ) and the positive intermediate circuit terminal (+ U _ZK ) is located.

3. inverter arrangement according to claim 1 or claim 2, characterized in that the rectifier device is a diode (D ₀ ).

4. inverter arrangement according to one of claims 1 to 3, characterized in that the

Rectifier device is designed as a semiconductor switch, preferably synchronous rectifier.

5. Inverter arrangement according to one of claims 1 to 4, characterized in that the clocked switch (S ₀ ) is designed as a semiconductor switch, such as a MOS-FET and an IGBT.

6. The inverter arrangement as claimed in one of claims 1 to 5, characterized in that the inverter circuit (2) has a full bridge (Si ₀ ,

S ₂₀ / S ₃₀ , S ₄₀ ), which lies between the positive (+ U _Z κ) and the negative terminal (-U _Z κ) of the intermediate _circuit capacitor (C _zκ ), and the outputs of the full bridge via a respective Dros- (Li, L ₂ ) are connected to output terminals (Pl, N) for connection to a single-phase network (6).

7. The inverter arrangement according to claim 1, characterized in that the inverter circuit (2) is designed as a half-bridge (S ₁₀ , S ₂₀ ) and the intermediate circuit capacitor as a series circuit consisting of two capacitors (C _ZK i, C _ZK2 ) , wherein the half-bridge (S ₁₀ , S ₂₀ ) between the positive and negative terminal (+ U _ZK , _{-U zκ} ) of the series circuit is and the

Output of the half-bridge (Si ₀ , S ₂ o) via an inductor (Li) to an output terminal (Pl) and the connection point between the two Kon- capacitors (C _ZK i, C _ZK2 ) is connected to a further output terminal (N) for connection to a single-phase network (6).

8. Inverter arrangement according to claim 7, characterized in that three half-bridges (Si ₀ , S ₂₀ ,

S30 / S ₄₀ , S ₅₀ , S ₆ o) are provided, which are between the positive and negative terminal (+ U _ZK , -U _Z κ) of the series circuit and each output of the half-bridges via a choke coil (Li, L ₂ , L ₃ ) to one output terminal (Pl,

P2, P3) and the connection point of the capacitors (C _ZKI , C _2K2 ) are connected to the further connection (N) for connection to a three-phase network (6).

9. Inverter arrangement according to claim 6, characterized in that two antiparallel free-running paths each having at least one switch (S ₅ , S ₆ ) and at least one diode (D ₅ , D ₆ ) between the two outputs of the full bridge in front of the choke coils (L ₁ , L ₂ ) are connected.

10. Inverter arrangement according to one of claims 7 or 8, characterized in that two antiparallel freewheeling paths, each with at least one switch (S ₅ , S ₆ ) and at least one diode (D ₅ , D ₆ ) between the output or the outputs of Half bridge (N) and the connecting line between the connection point of the two capacitors (C _ZK i, C _2K2 ) and the other output _terminal (N) in front of the choke coils (Li, L ₂ , L ₃ ) lie.