WO2009068220A2

WO2009068220A2 - Illumination means operating device, particularly for leds, with electrically isolated pfc

Info

Publication number: WO2009068220A2
Application number: PCT/EP2008/009821
Authority: WO
Inventors: Michael Zimmermann; Eduardo Pereira
Original assignee: Tridonicatco Schweiz Ag
Priority date: 2007-11-28
Filing date: 2008-11-20
Publication date: 2009-06-04
Also published as: DE102007057312A1; WO2009068220A3; EP2225918A2; CN101878675A; EP2225918B1; AT12747U1; CN101878675B

Abstract

A circuit (30, 40) for the separate potential generation of an output voltage (Vout) originating from a mains voltage (Vin) is proposed, comprising - a power factor correction circuit (31) with an inductor (L31) supplied by the mains voltage (Vin) and a controllable switch (T31) for controlling the charging and discharging of the inductor (L31), and - at least one potential separating transformer (N1- N2, N1'-N2') for the electrical isolation of the output voltage (Vout) to the mains voltage (Vin), wherein during the discharge of the inductivity (L31) a first part of the energy stored by the inductor (L31) during charging is directly fed to the potential separating transformer (N1- N2, N1'-N2').

Description

Lamp operating device, in particular for LEDs, with galvanically isolated PFC

The present invention relates to active power factor correction ("Power Factor Control" or "PFC") lighting apparatus, and more particularly to a circuit with isolated power factor correction. The technical field of application of the invention is in particular the supply and control of a light source by means of such a circuit.

In general, the power factor reflects the current drain of an electrical appliance from the mains. The AC line voltage is known to have a sinusoidal time course and ideally therefore the current drawn from the mains should also have a sinusoidal time characteristic. However, this ideal case, which is characterized by a power factor of 1, does not always occur, but the current can even deviate considerably from a sine wave envelope, in which case the power factor drops.

At a power factor below 1, therefore, the extracted current is not sinusoidal, so that harmonics are generated in the mains current. These unwanted harmonic currents in the supply network are known to be reduced by means of a power factor correction circuit.

To a sinusoidal and in phase to the mains AC voltage input current to For example, in the prior art, the use of an up-converter topology based active power factor correction circuit 20 shown in FIG. 1 is known. "Active", therefore, because a switch is actively turned on and off by control signals from a control unit.

In this case, a smoothing capacitor C21 filters a rectified input AC voltage Vin, which is measured by means of a voltage divider R21, R22. The input AC voltage Vin is supplied to an inductor L21, and a secondary winding L22 detects the zero-crossings of the current through the inductor L21.

Furthermore, a current measuring resistor (shunt) R23 in series with the switch, for example in the source line of a transistor T21, allows the detection of the peak inductance current in order to be able to detect a possibly overcurrent state. Parallel to an output capacitor C22, a second voltage divider R24, R25 is arranged to measure the bus DC voltage Vbus and to detect an overvoltage condition, for example, due to load jumps.

These four measurements are carried out by means of four measuring inputs 21, 22, 23, 24 by a control circuit 25, which control circuit 25, depending on these measurements, controls the transistor T21 such that the bus voltage remains constant and the power factor is increased. It is disadvantageous in this prior art that the circuit 20 can not deliver a galvanically isolated voltage.

US 2007040516 A1 discloses in this context a circuit with power factor correction for the conversion of alternating voltage in galvanically isolated DC voltage. After a rectifier has converted a mains voltage into a rectified input AC voltage, it is in turn converted by a converter 10 into a DC voltage suitable for operating a lamp.

The converter 10 shown in Fig. 2 for generating the DC output voltage Vout is a half-bridge converter, which consists of a push-pull converter 11 and an output stage 12 for energy storage and low-pass filtering.

The converter 10 is preceded by a power factor correction circuit (not shown), which provides as an active power factor correction for a nearly sinusoidal current consumption from the network. This upstream power factor correction circuit provides the converter 10 with a step-up bus DC voltage Vin.

The push-pull converter or the half-bridge 11 consists of two transistors TIL, T12, such as two MOSFET transistors, which are connected in parallel to two capacitors CIl, C12. The mid point of the two series-connected transistors Tl1, T12 is connected to the primary side n1 of a transformer in such a way that one side of this primary transformer coil n1 is alternately connected to a positive and negative voltage. The other side of the primary transformer coil n2 becomes held by the capacitive voltage divider CIl, C12 to a fixed voltage.

On the secondary side n2 of the transformer, the chopped AC voltage generated by the push-pull converter 11 is rectified and smoothed by the output stage 12. The resulting output voltage Vout is then in continuous operation: Vout = f (n2 / nl * Vbus).

It is an object of the present invention to propose an improved circuit for the potential-separated generation of an output voltage starting from a mains voltage.

The basic idea of the invention is that a part of the current flow from the switch of the active power factor correction circuit is supplied directly to the transformer and is not first subjected to an intermediate storage.

A circuit for the potential-separated generation of an output voltage from a mains voltage can thus have a power factor correction circuit with an inductance and an actively controlled switch, wherein the current flow from the inductor or through the switch (when it is closed) always to a part of an intermediate storage is used in a capacitor, while the other part of the current flow is fed directly to a potential separation transformer.

The power factor correction circuit of the present invention has on the one hand the normal task of on the other hand, the function of the half-bridge of US 2007040516 A1 also takes over.

The activation of the power factor correction switch is in particular at the network level. If now the

Return on the secondary side, namely from the

Output voltage forth, this feedback must be isolated to continue to have a full potential separation between the input side (network side) and the output side.

In principle, the invention can then be used advantageously if there is a requirement for a potential-separated output voltage.

The stated object is achieved by the features of the independent claims. The dependent claims further form the central idea of the invention in a particularly advantageous manner.

According to a first aspect of the invention, a circuit for the potential-separated generation of an output voltage from a mains voltage (generally: input voltage) comprises: a power factor correction circuit with an inductance supplied by the mains voltage and a controllable switch for controlling the charging and

Discharging the inductance, and

- At least one potential separation transformer for galvanic isolation of the output voltage to the mains voltage. When unloading the ^'inductance the potential separation transformer, a first part of the data stored by the inductance during the charging energy is supplied directly. The circuit may include at least one capacitor for latching a second portion of the energy stored by the inductor during charging.

The energy cached by the capacitor may preferably be forwarded to the potential separation transformer in the next charge / discharge cycle.

The power factor correction circuit may be operated in a continuous or discontinuous mode.

The energy storage performance of the capacitor may be smaller than that of an electrolytic capacitor.

The output voltage can be filtered by a low-pass filter.

According to a further first aspect of the invention, an operating device for lighting means, such as, for example, a light-emitting diode converter is proposed with a circuit described above.

According to a further first aspect of the invention, a method is proposed for the potential-separated generation of an output voltage from a mains voltage (generally: input voltage), wherein - the mains voltage supplies an inductance of a power factor correction circuit, - a controllable switch of the power factor correction circuit the charging and discharging the inductance controls, and - A potential separation transformer for galvanic isolation of the output voltage to the mains voltage is used. When discharging the inductor, the potential separation transformer is directly supplied with a first portion of the energy stored by the inductor during charging.

A second portion of the energy stored by the inductor during charging may be latched by at least one capacitor.

The cached energy from the capacitor can be forwarded to the potential separation transformer.

According to a further first aspect of the invention, a circuit for electrically isolated generation of

Output voltage proposed based on a mains voltage. In particular, it indicates:

- A power factor correction circuit for generating a non-isolated bus voltage (internal stabilized DC voltage), a control circuit for controlling the power factor correction circuit, wherein the necessary for the purpose of this control knowledge of the bus voltage is derived from the determination of the output voltage.

According to a further first aspect of the invention, a light-emitting diode converter is proposed with such a circuit.

According to a further first aspect of the invention, a method for the potential-separated generation of an output voltage from a mains voltage is proposed, wherein a power factor correction circuit generates a non-isolated bus voltage, and a control circuit controls the power factor correction circuit, wherein the knowledge of the bus voltage necessary for the purpose of this control is derived from the determination of the output voltage.

According to a further first aspect of the invention, an integrated circuit is proposed, which is designed for carrying out a method described above.

Other features and advantages of the invention will become apparent upon reading the following description of preferred embodiments, which refers to the drawings.

1 shows a known DC-DC converter for converting a DC voltage into a galvanically isolated DC voltage,

Fig. 2 shows a known

Power factor correction circuit,

3 shows a circuit according to a first embodiment of the invention,

Fig. 4 shows a circuit according to a second embodiment of the invention, and

Fig. 5 shows a circuit according to a third embodiment of the invention. In Fig. 3 an embodiment of a power factor correction circuit 30 according to the present invention is shown.

On the input side, an input voltage Vin, which supplies a power factor correction circuit 31, which in turn generates a DC bus voltage Vbus, is applied to the power factor correction circuit 30.

"Bus voltage" is not to be understood as the voltage of an external bus line, but a DC supply voltage.

This input AC voltage Vin is preferably rectified by a rectifier (not shown) AC line voltage.

The input AC voltage Vin is applied to an inductor L31, i.e. a coil, fed. The coil L31 is connected in series with a diode D31 between a first input terminal DC_IN / MAINS supplied with the input AC voltage Vin and a second bus voltage terminal 33 at which the bus DC voltage Vbus is provided.

An output DC capacitor C31, which is preferably designed as an electrolytic capacitor, connects the bus voltage connection 33 to ground and stabilizes the bus voltage as a buffer element. Parallel to this output DC capacitor C31 and two switches T32, T33 are connected in series. The switches or the circuit breakers T31, T32, T33 are preferably the same. The output DC capacitor C31 is decoupled from the rectifier (not shown), which rectifies the AC input voltage, via the switching elements diode D31 and switch T32.

To the connection 32 between the coil L31 and the diode D31, a transistor or a controllable switch T31 is connected.

Between the drain line 32 of the switch T31 and the middle point 34 of the switches T32, T33, the primary side Nl of a first transformer N1-N2 and the primary side Nl 'of a second transformer Nl'-N2' are connected in series. Although both transformers N1-N2, Nl'-N2 'may be different, they are preferably the same size.

When the switch T31 is turned on, the coil L31 is shorted to ground and the diode D31 is turned off. The coil L31 charges, so that actually energy can be stored in this coil L31.

Thus, when the switch T31 is switched on, a current flows through the switch T31 from the mains Vin via the coil L31.

However, another current component comes from the midpoint of the switches T32, T33 across the primary side of the transformer Nl, N2 through the switch T31.

When the switch is open, the coil L31 is known to string a current through the diode D31. That is, the diode D31 is conductive and that the coil L31 then via the diode D31 in the output DC capacitor C31 discharges. The energy is thereby transmitted to the DC output capacitor C31.

Meanwhile, another current component now flows from the connection point 32 between the switch T31 and the diode D31 again (this time in the opposite direction) via the primary side Nl of the transformer Nl, N2 to the midpoint 34 of the switches T32, T33.

In an on and off cycle of the switch T31, according to the invention, only a part of the flowing current is supplied to the output capacitor C31 and to the bus voltage Vbus. In contrast, according to the prior art, the entire current flows to the bus voltage, see FIG. 2 in combination with FIG. 1.

The secondary sides N2 and N2 'of the transformers N1-N2 and Nl'-N2' are connected in series and each connected to a diode D32, D33. These two diodes D32, D33 are also connected together at a point 36.

The voltage which results between the midpoint 35 of the transformers N1-N2, Nl'-N2 'and the connection point 36 of the diodes D32, D33 is then fed to a low-pass filter and accordingly filtered or averaged.

This low-pass filter consists for example of a choke L32 and an output capacitor C32, wherein the output voltage Vout results at the output capacitor C32.

The two switches or MOSFET transistors T32, T33 can be controlled by the control circuit 50 synchronized with the switch T31. For example, the Switch T32 is turned on synchronously to the switch T31 and possibly also switched off. On the other hand, the switch T33 can be switched on when the switch T31 and optionally also the switch T32 is opened by the control circuit 50. However, the switch-on and / or switch-off time of the switches T32, T33 can also be selected by the control loop or due to the applied load. To avoid half-bridge shorting, a dead time may be inserted before turning on the switch T32 or the switch T33. This synchronous operation can be used above all during operation with high load, for example maximum brightness of the connected lighting means.

In the case of an operating mode deviating from operation with a high load, for example maximum brightness of the connected lighting means, it may be necessary to change the control of the two switches T32, T33. Such an operating mode may be present, for example, when no load, only a small load is applied or an error such as an idle case or a load short circuit is present. For example, the clock frequency of the two switches can be increased, it being possible for the control unit to switch one of the two switches T32, T33 in synchronism with the switch T31, but the two switches T32, T33 can then be clocked at a higher frequency. If necessary, there may also be periods in which either both or only one switch is not clocked. In this way, a so-called burst operation is possible.

But it is also possible to operate the switches T31, T32 and T33 asynchronously to each other. The diode D31 can also be replaced by a further switch T34, which is then also actively clocked and controlled by the control unit. The switches T31-T34 can be operated synchronously or asynchronously, in burst mode or in another operating mode

Fig. 4 shows a further embodiment of the invention. The power factor correction circuit 40 shown there essentially comprises the components of the circuit 30 shown in FIG. 3.

The power factor correction circuit has changed from FIG. 3 in that the DC output capacitor C31 has been replaced by two capacitors C41, C42 connected in series. These capacitors C41, C42 are preferably electrolytic capacitors.

The switches T32, T33 are no longer provided in this embodiment.

A diode D41, D42 is connected in parallel with each capacitor C41, C42, the center point 34 'of the capacitors C41, C42 and thus also of the diodes D41, D42 being connected to the series arrangement of the two transformers N1-N2, Nl'-N2' ,

The operation of the circuit 40 is similar to that of the circuit 30 shown in FIG.

Thus, in each cycle ton-toff of the switch T31, a portion of the flowing current is supplied to the bus voltage Vbus, while the other portion flows directly into the primary sides Nl, Nl 'of the transformers N1-N2, Nl'-N2'. Accordingly, according to the invention directly by the

Transformers N1-N2, Nl'-N2 'converted portion, which thus does not serve to hold the bus voltage Vbus via the electrolytic capacitors C41, C42, implemented directly and lossless.

As a result, the capacitors C41, C42 of Fig. 4 can be made simpler than those of a conventional power factor correction circuit.

It may even be possible to dispense with electrolytic capacitors for the capacitors C41, C42. This brings, if necessary, cost advantages and lifetime benefits.

In any case, the direct conversion of part of the current flow can significantly reduce the capacitance of the electrolytic capacitors C41, C42.

Of the two described embodiments 30, 40, the circuit embodiment 30 of FIG. 3 has the most control margin since it comprises the two switches or MOSFETs T32, T33. However, this control has the following disadvantage that these switches T32, T33 must also be synchronized.

This additional expenditure for operating or controlling the circuit 30, however, is omitted in the circuit embodiment 40 according to FIG. 4, since the switches T32, T33 are not used there. This eliminates the need for a corresponding controller for these switches T32, T33, which simplifies power factor correction as a whole. FIG. 5 shows how the active power factor correction according to the invention can be performed based on the circuit 40 shown in FIG.

Alternatively, according to the invention, the circuit topology of the embodiment shown in FIG. 3 can also be selected.

The switch T31 is driven by a control circuit 50. For this purpose, the control circuit 50 has an output 51 via which the switch T31

Control signal is supplied. The frequency of the

Control signal (typically at least 10 kHz) and therefore the switching on and off of the switch 306 is substantially higher than the frequency of the mains voltage (typically 50

Hz) and the rectified input AC voltage

(typically 100 Hz).

In order to determine the switch-on time t _on or the switch-off time toff of the switch T31, the control circuit 50 requires information about the bus voltage Vbus (or the output voltage Vout) or about the zero crossing of the current through the coil L31.

This is because the turn-on time t _{on of} the switch T31, and hence the charging time of the coil L31 is controlled based on a comparison of the bus DC voltage Vbus with a fixed reference voltage, and on the assumption that the control circuit 50 turns off the switch T31 until the current through the coil 301 has dropped to zero.

The information about the zero crossing of the current through the coil L31 is actually only in the discontinuous Operation is required in which the coil current actually drops to zero in each period. In continuous operation, however, the coil current does not go back to zero when the switch T31 is turned off, so that this zero-crossing information is also not necessary.

For the power factor correction, information about the input voltage Vin or the peak current through the coil L31 may be required, in the latter Fa-II in particular to prevent overcurrent conditions.

It should therefore be noted that the control circuit 50 must know the bus DC voltage Vbus or the output voltage Vout and possibly also the input voltage Vin, the zero crossing of the coil current or the coil peak current.

As already known from FIG. 2, the zero crossing of the coil current and the coil peak current can each be determined by means of a secondary winding L22 and a current measuring resistor R23.

However, in contrast to the prior art, in which the control circuit 25 monitors the bus voltage Vbus and the course of the mains input voltage Vin via two voltage dividers R21, R22 and R24, R25, the control of the switch T31, the course of the mains voltage and the output voltage to the filter Capture C32, L32.

The intermediate bus voltage Vbus, however, is no longer detected. This is possible because the bus voltage Vbus is "hard" coupled to the output voltage Vout via the transformers N1-N2, Nl'-N2 ', so that any impermissible states at the bus voltage Vbus could be detected directly in the output voltage Vout.

FIG. 5 likewise shows how a load 60, in particular a luminous means such as, for example, a light-emitting diode, can be connected directly to the output of the power factor correction circuit 30, 40.

Alternatively, for example, the lighting means by means of a subsequent converter (not shown) can be controlled. This subsequent converter can be a simple constant current source. However, the light source can also be controlled by one or more converters with their own control, in which case these converters preferably have mutually independent brightness settings (or controls) or controls.

The control circuit 50 has an additional input 61 which measures or detects a load dependent quantity (such as voltage, current or power).

Claims

claims

1. Operating device for lighting means, comprising a circuit (30, 40) for the isolated generation of an output voltage (Vout), starting from an input voltage, such as. A mains voltage (Vin), comprising

- An active power factor correction circuit (31) with an input of the voltage (Vin) supplied inductance (L31) and a controllable switch (T31) for controlling the charging and discharging of the inductance (L31), and

- At least one potential separation transformer (Nl-N2, Nl'-N2 ') for the galvanic isolation of the output voltage (Vout) from the input voltage (Vin), wherein when discharging the inductance (L31) the

Potential separation transformer (N1-N2, Nl'-N2 ') a first part of the energy stored by the inductance (L31) during charging is supplied directly.

Second operating device for lighting means according to claim 1, comprising at least one intermediate storage element, in particular a capacitor (C31) for latching a second part of the energy stored by the inductance (L31) during charging.

3. operating device for lighting means according to claim 2, wherein the capacitor (C31) cached energy to the potential separation transformer (N1-N2, Nl'- N2 ') is preferably forwarded in the next load / unload cycle.

4. Lamp control device according to one of the preceding claims, wherein the power factor correction circuit (31) is operated in a continuous or discontinuous mode.

5. Operating device for lighting means according to one of the preceding claims, wherein the energy storage capacity of the capacitor (C31) is smaller than that of an electrolytic capacitor.

6. Operating device for lighting means according to one of the preceding claims, wherein the output voltage (Vout) is filtered by a low-pass filter (L32, C32).

7. operating device for lamps according to one of the preceding claims, characterized in that it is a light-emitting diode converter.

8. Lighting unit with at least one lamp and a control gear according to one of the preceding claims.

9. A method for isolated generation of an output voltage (Vout) in a control gear for

Illuminant, starting from a mains voltage (Vin), wherein if necessary, the mains voltage (Vin) is rectified and supplies an inductance (L31) of a power factor correction circuit (31),

- A controllable switch (T31) of the power factor correction circuit (31) controls the charging and discharging of the inductance (L31), and

- A potential separation transformer (N1-N2, Nl'-N2 ') for the galvanic isolation of the output voltage (Vout) to the mains voltage (Vin), wherein when discharging the inductance (L31) the

10. The method of claim 9, wherein a second part of the energy stored by the inductor (L31) during charging is buffered by at least one capacitor (C31).

11. The method according to claim 10, wherein the capacitor (C31) cached energy to the potential separation transformer (N1-N2, Nl'-N2 ') is forwarded.

12. Operating device for lamps, comprising a

Circuit (30, 40) for the potential-separated generation of an output voltage (Vout) starting from a mains voltage (Vin), comprising

a power factor correction circuit (31) for generating a non-isolated bus voltage (Vbus),

- A control circuit (50) for controlling the power factor correction circuit (31), wherein the necessary for the purpose of this control knowledge of Bus voltage (Vbus) is derived from the determination of the output voltage (Vout).

13. Lighting unit with at least one lamp and a control gear according to claim 12.

14. A method for the isolated generation of an output voltage (Vout) in a control device for lighting, starting from an optionally rectified mains voltage (Vin), wherein

a power factor correction circuit (31) generates a non-isolated DC bus voltage (Vbus), and

- A control circuit (50) controls the power factor correction circuit (31), wherein for the purpose of this control necessary knowledge of the bus voltage (Vbus) is derived from the determination of the output voltage (Vout).

15. Integrated circuit, in particular ASIC, characterized in that it is designed for carrying out a method according to one of claims 9 to 11 and 14.